High-speed printer video interface using High-Definition Media Interface (HDMI)

Abstract

The system uses a high-speed memory accessible to the GPU to store compressed or raw video printer data, transmits the video data in one or more frames over an HDMI interface, and a circuit reconstructs a page of video data from the one or more HDMI frames and transmits it to the printer.

Description

[Technical Field]

[0001] (Related Applications) This application claims priority to U.S. Patent Application No. 18 / 155,307, filed January 17, 2023, the contents of which are incorporated herein by reference.

[0002] Various embodiments disclosed herein relate to a high-speed printer video interface using High-Definition Media Interface (HDMI).

[0003] Some digital printing solutions, such as those sold by Fiery, currently use custom ASICs to send raster data to the printer at high speed. Fiery's custom "VX" ASIC includes proprietary decompression and common image processing operators, such as halftoning and tone curves, to quickly send raster data to the printer. The bandwidth required to deliver raster data to many printers in real time can exceed the capabilities of a typical computer. For example, a 1200 dpi, letter-size, 120 pages per minute (PPM) color printer requires approximately 1 GB / s of raster data. Even before considering image processing operators, meeting such real-time bandwidth requirements using 10 Gb Ethernet and typical memory systems is impractical.

[0004] Modern GPU video boards with HDMI interfaces provide the memory speed, processing power, and video transmission required for off-the-shelf hardware without the cost of designing new hardware. Furthermore, as annual unit volumes decline, amortizing the non-renewable engineering (NRE) costs of ASICs for customers becomes uneconomical. The memory interface between the GPU and directly attached memory can achieve 1000 GB / s of bandwidth. A video connection compliant with the HDMI 2.1a specification can support 48 Gbit / s or 6 GB / s, which is fast enough for most high-speed printers with digital printing solutions, such as those sold by Fiery. Summary of the Invention

[0005] An embodiment of the present invention uses multiple video frames over HDMI to represent a page on a printer. In typical HDMI usage, the interface transmits a standard frame size (e.g., 4K UHD) multiple times per second to represent movement. In an embodiment of the present invention, a page with a larger number of pixels than a typical video display is divided into multiple frames. These frames are transmitted by an HDMI transmitter, and the page is reconstructed from the output of an HDMI receiver.

[0006] In an embodiment, the system uses a high-speed memory accessible to the GPU to store compressed or raw video printer data, transmits this video data in one or more frames over an HDMI interface, and a circuit reconstructs a page of video data from the one or more HDMI frames to transmit to the printer. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a block diagram illustrating a prior art high speed printer video system. [Figure 2]FIG. 1 is a block diagram illustrating a high-speed printer video interface using a high-definition media interface (HDMI) according to one embodiment of the present invention. [Figure 3] FIG. 2 is a block diagram of a method for storing compressed or raw video printer data using high-speed memory accessible to a GPU, according to one embodiment of the present invention. [Figure 4] FIG. 1 is an HDMI interface diagram illustrating the signal path between an HDMI source / transmitter that comprises a GPU in one embodiment of the present invention and an HDMI sink / receiver that comprises an FPGA in one embodiment of the present invention. [Figure 5] FIG. 1 is a block diagram showing the signal and processing path after video data is received from the HDMI receiver into the FPGA. [Figure 6] FIG. 1 is a block diagram illustrating an example of a processing system capable of implementing at least some of the operations described herein. DETAILED DESCRIPTION OF THE INVENTION

[0008] Figure 1 is a block diagram illustrating a prior art high-speed printer video system. In this system, encoded raster data output from a raster image processor (RIP) 10 is quickly compiled into a mergeable video format 12. This format is used to perform variable data applications that require data common to many pages, such as slide backgrounds or company logos, and then merge (14) it with page-specific data. The mergeable data format can be an encoded / compressed format, such as raw pixel data or run-length compressed pixel data. In the merge process, pixel page data for page elements (i.e., previously RIPed and encoded page components) is taken and merged with the current page data to form the complete composite page. The current page output from the RIP contains instructions defining which elements to place, where to place them, and the transformations (rotation and / or scaling) to apply during merge placement.

[0009] Once all the data for a page is merged, it is stored in locked frames 16. These pages (or frames) must be delivered in real time as needed. The number of locked frames varies depending on the printer architecture, such as the number of pages on the belt or drum. In Fiery printers, these pages are sent to a proprietary VX ASIC 18 for transmission to the printer 19 as needed. The VX ASIC synchronizes pixel delivery to the printer based on timing signals from the printer, such as page sync, line sync, and pixel clock signals. It can also decompress the pixel data into a mergeable format as needed, and perform real-time processing such as tone curve adjustment and halftoning. The entire page is delivered in real time to match the physical pixel printing process, including laser / head position, drum / belt / media position, and inter-line delay timing.

[0010] FIG. 2 is a block diagram illustrating a high-speed printer video interface using a High-Definition Media Interface (HDMI) according to one embodiment of the present invention. This embodiment uses multiple HDMI frames to represent a single page on the printer. In typical HDMI usage, the interface transmits a standard frame size (e.g., 4K UHD) multiple times per second to represent motion. This is done to mimic standard HDMI video transmission so that the HDMI interface behaves as if it were receiving standard video frames. In this way, the HDMI interface is compliant with the HDMI standard and requires no modifications.

[0011] A standard negotiation between the HDMI transmitter and receiver first occurs to agree on the frame size and pixel component depth (bits). The frame size and pixel depth selection is determined before printing based on the printer's page size, data rate, and the specific HDMI capabilities of the GPU card being used. This selection is made by high-level control software, which is used to program both the GPU and FPGA for the appropriate HDMI frame format. In an embodiment of the present invention, a page with more pixels than a typical video display is divided into multiple frames. Each frame represents a band of the entire page. This band represents a partial page (e.g., a certain number of printer page scanlines whose data size fits within the pre-negotiated frame size). These frames are transmitted by the HDMI transmitter, and the page is reconstructed from the output of the HDMI receiver. Reconstruction can be achieved simply by appending data from each successive frame and synchronizing transmission to the printer according to page sync, line sync, and the video clock. An additional processing step, such as a VX ASIC, is also possible, providing real-time correction and processing of the video before transmission to the printer.

[0012] Further optimizations and complexity can be leveraged as needed. For example, a color palette could represent a simple color page, and pixel data could be used as an index into this palette, similar to GIF files. Data could be run-length encoded on the GPU and decoded on the FPGA. Also, technologies such as Nvidia's "Gsync" allow sending part of a frame and then resuming it later, which would optimize the variable-sized frames that result from sending compressed data.

[0013] In one embodiment, the system uses high-speed memory accessible to the GPU to store compressed or raw video printer data. FIG. 3 is a block diagram illustrating an embodiment of the present invention in which high-speed memory accessible to the GPU is used to store compressed or raw video printer data. As shown in FIG. 3, the memory of the GPU 36 (GPU RAM 38) is separate from the memory of the system CPU 30 (CPU RAM 32). GPU memory typically has a much higher bandwidth than CPU memory. Communication between the CPU and GPU is via the PCI bus 34. Because the HDMI port reads from the GPU memory, frame data can be transmitted without burdening CPU memory or communication between the CPU and GPU, or limiting real-time performance.

[0014] The system transmits this video data over one or more frames on the HDMI interface, and the circuitry reconstructs the video data from the one or more HDMI frames into a physical page, page media, or other representation of the final pixels to be rendered, and transmits it to the printer. In embodiments, files other than files containing printer data could be split into HDMI frames and reassembled at the destination as taught herein. For example, a large database could be split into HDMI frames and transmitted to the destination. This would allow for the utilization of the enhanced bandwidth provided by the present invention when moving large amounts of data.

[0015] In an embodiment of the present invention, the merge and lock frame functionality is moved to a graphics processing unit ("GPU") enabled video board 20. This is accomplished by modifying the memory allocation control software to allocate frame data from the GPU system. This is typically done with a GPU programming API / environment such as OpenGL, OpenCL, Cuda, Vulkan, Metal, or DirectX.

[0016] The GPU performs a merge operation 21 on the video stored in the high-bandwidth GPU memory. The locked frames 22 are sent to an HDMI interface, if necessary, which transmits the video in the GPU memory over an HDMI port 23. In an embodiment, an FPGA 24 adapts the video data records received from the HDMI port to a generic printer interface.

[0017] 4 is an HDMI interface diagram illustrating the signal path between an HDMI source / transmitter 40, which in one embodiment of the present invention is implemented as a GPU, and an HDMI sink / receiver 42, which in one embodiment of the present invention is implemented as an FPGA. In the HDMI interface of FIG. 4, video data is carried by a transition-minimized differential signaling (TMDS) signal path 44.

[0018] Figure 5 is a block schematic diagram showing the signals and processing path after video data is received from the HDMI receiver into the FPGA. As shown in Figure 5, the video data is optionally decoded 50, optionally processed 52, and resynchronized for transmission by the printer interface in accordance with page sync, line sync, and video clock signals. This synchronization can be achieved, for example, by using a FIFO buffer 54 and timing circuit 56 to read the video data from the FIFO buffer to the printer in accordance with the printer's specifications. Processing System

[0019] 6 is a block diagram illustrating an example of a processing system 100 capable of implementing at least some of the operations described herein. For example, components of processing system 100 may be hosted on a computing device that includes a threat detection platform. As another example, components of processing system 100 may be hosted on a computing device that is queried by the threat detection platform to obtain emails, data, etc.

[0020] Processing system 100 may include a central processing unit (also referred to as a "processor") 102, main memory 106, non-volatile memory 110, network adapter 112 (e.g., a network interface), video display 118, input / output devices 120, control devices 122 (e.g., a keyboard or pointing device), drive units 124 including storage media 126, and signal generating devices 130, communicatively coupled to a bus 116. Bus 116 is illustrated as an abstraction representing one or more physical buses or point-to-point connections connected by appropriate bridges, adapters, or controllers. Thus, bus 116 can include a system bus, a Peripheral Component Interconnect (PCI) bus or PCI-Express bus, a HyperTransport or Industry Standard Architecture (ISA) bus, a Small Computer System Interface (SCSI) bus, a Universal Serial Bus (USB), an Inter-Integrated Circuit (I2C) bus, or an Institute of Electrical and Electronics Engineers (IEEE) standard 1394 bus (also known as "Firewire").

[0021] Processing system 100 may share a similar processor architecture such as a desktop computer, a tablet computer, a mobile phone, a game console, a music player, a wearable electronic device (e.g., watches and fitness trackers), a network-connected (“smart”) device (e.g., a television or home assistant device), a virtual reality / augmented reality system (e.g., a head-mounted display), or any other electronic device capable of executing a series of instructions (sequential or other instructions) that specify operations to be performed by processing system 100.

[0022] Although main memory 106, non-volatile memory 110, and storage medium 126 are shown as a single medium, the terms "machine-readable medium" and "storage medium" should be understood to include a single medium or multiple media (e.g., centralized / distributed databases, and / or associated caches and servers) that store one or more sets of instructions 128. The terms "machine-readable medium" and "storage medium" should be understood to include any medium that can store, encode, or carry sets of instructions for execution by processing system 100.

[0023] Generally, the routines executed to implement embodiments of the present disclosure may be implemented as part of an operating system or as a specific application, component, program, object, module, or sequence of instructions (collectively referred to as a "computer program"). A computer program typically comprises one or more instructions (e.g., instructions 104, 108, 128) that are stored at various times in various memory and storage devices within an electronic device. These instructions, when read and executed by processor 102, cause processing system 100 to perform operations to implement elements comprising various aspects of the present disclosure.

[0024] Furthermore, while embodiments have been described in terms of fully functional electronic devices, those skilled in the art will appreciate that aspects of the present technology may be distributed as program products in various forms, and the present disclosure applies regardless of the type of machine-readable or computer-readable medium used for distribution.

[0025] Further examples of machine-readable and computer-readable media include recordable media such as volatile and non-volatile memory devices 110, removable disks, hard disk drives, optical disks (e.g., compact disk read-only memories (CD-ROMs) and digital versatile disks (DVDs)), and transmission-type media such as digital and analog communications links.

[0026] Network adapter 112 allows processing system 100 to broker data within network 114 to entities external to processing system 100 according to any communication protocol supported by processing system 100 and the external entity. Network adapter 112 may include a network adapter card, a wireless network interface card, a router, an access point, a wireless router, a switch, a multi-layer switch, a protocol converter, a gateway, a bridge, a bridge router, a hub, a digital media receiver, a repeater, or any combination thereof.

[0027] The network adapter 112 may include a firewall that regulates and / or manages the authorization to access / proxy data within the network. The firewall may also track levels of trust between different machines and / or applications. The firewall may be any number of modules with any combination of hardware, firmware, or software components that can enforce a set of access rights (e.g., regulate traffic flow and resource sharing between these entities) between machines and applications, or between machines and applications. The firewall may additionally manage and / or access access control lists that specify the details of the permissions, including the authority of individuals, machines, or applications to access and manipulate objects, and the circumstances under which the permissions apply.

[0028] The language used herein has been chosen primarily for ease of reading and explanation. It has not been chosen to delineate or limit the subject matter. Accordingly, it is intended that the scope of the technology be limited not by this detailed description, but by the claims that apply to any application based hereon. Accordingly, the disclosure of various embodiments is intended to illustrate, and not limit, the scope of the technology, which is set forth in the following claims.

Claims

1. using high speed memory accessible to the GPU to store compressed or raw video printer data; transmitting the video data over one or more frames of an HDMI interface; and Reconstructing a page of video data from the one or more HDMI frames for communication to a printer. A method for providing the above.

2. Using multiple HDMI frames to represent a page on a printer The method of claim 1 further comprising:

3. the HDMI interface transmitting a standard frame size multiple times per second to represent a full-page printed image. The method of claim 1 further comprising:

4. Dividing a page having more pixels than a standard video display into multiple frames The method of claim 1 further comprising:

5. 1. A printer interface comprising a High-Definition Media Interface (HDMI) in which a plurality of frames represent a page on a printer, The High-Definition Media Interface (HDMI) further comprises: an HDMI transmitter; HDMI receiver, Equipped with the HDMI transmitter transmits a standard frame size multiple times per second to mimic the motion of a standard HDMI video transmission, and the HDMI receiver operates as if it is receiving a standard video frame; A page with more pixels than a typical video display is divided into frames, and The frames are transmitted by the HDMI transmitter and the pages are reconstructed from the output of the HDMI receiver; Printer interface.

6. The standard frame size is 4K UHD; 6. The printer interface of claim 5.

7. the HDMI interface performs standard negotiation between the HDMI transmitter and the HDMI receiver to ensure that both agree on frame dimensions and pixel component depth (bits); 6. The printer interface of claim 5.

8. the frame dimensions and pixel depth are determined prior to printing based on any printer page size, data rate, and HDMI capabilities specific to the particular HDMI transmitter being used; 6. The printer interface of claim 5.

9. a high level controller configured to determine the frame size and pixel depth and to program the HDMI transmitter and the HDMI receiver to the correct HDMI frame format; Furthermore, it is provided with:

6. The printer interface of claim 5.

10. Each frame represents a full-page band, the band comprising a fixed number of printer page scanlines whose data size fits into a pre-negotiated frame size; 6. The printer interface of claim 5.

11. said reconstruction comprising adding data from each successive frame and synchronizing transmission to the printer according to page synchronization, line synchronization and a video clock; 6. The printer interface of claim 5.

12. The color palette represents a simple color page, and the pixel data comprises an index into the palette.

6. The printer interface of claim 5.

13. The page data is compressed by the HDMI transmitter using run-length encoding or other applicable video compression techniques and decoded by the HDMI transmitter; 6. The printer interface of claim 5.

14. Some frames are transmitted and then restarted to optimize the variable size frames resulting from transmitting compressed data.

6. The printer interface of claim 5.

15. a system central processing unit (CPU) having CPU-accessible memory; a graphics processing unit (GPU) with a high-speed GPU-accessible memory for storing compressed or raw video printer data, the GPU memory being separate from the system CPU memory and the GPU-accessible memory having a higher bandwidth than the CPU-accessible memory; an HDMI port that reads from said GPU-accessible memory, and frame data is transmitted without loading said CPU-accessible memory or limiting real-time performance; The printer interface of claim 5 further comprising:

16. The GPU memory allocation control allocates frame data from the GPU, and the GPU performs frame merging and frame locking functions.

16. The printer interface of claim 15.

17. the GPU performing a merge operation on the video stored in the GPU memory; The locked frames are then distributed to the HDMI transmitter as needed, The video in the GPU memory is transmitted over the HDMI port, and The HDMI receiver adapts the video data received from the HDMI port to a common printer interface.

17. The printer interface of claim 16.

18. transmitting the printer data as video data over one or more frames of an HDMI interface; and reconstructing the video data on a physical page and / or page media representing final pixels being rendered from the one or more HDMI frames for communication as print data to a printer; A method for providing the above.

19. a GPU-accessible high-speed memory configured to store compressed or raw video printer data; an HDMI transmitter configured to transmit the video data over one or more frames of an HDMI interface; and an HDMI receiver configured to reconstruct the video data for a page from the one or more HDMI frames for communication to a printer. A printer interface comprising:

20. Multiple HDMI frames represent one page on the printer.

20. The printer interface of claim 19.

21. the HDMI transmitter transmits a standard frame size multiple times per second to represent motion; 20. The printer interface of claim 19.

22. A page with more pixels than a standard video display is divided into multiple frames, The printer interface of claim 1 .

23. providing a high-definition media interface (HDMI) where a plurality of frames represent a page on a printer, the high-definition media interface (HDMI) comprising an HDMI transmitter and an HDMI receiver; the HDMI transmitter transmitting a standard frame size multiple times per second to mimic a standard HDMI video transmission and represent motion as if the HDMI receiver were receiving a standard video frame; Dividing a page having more pixels than a typical video display into a plurality of frames; transmitting the frame by the HDMI transmitter; Reconstructing the page from the output of the HDMI receiver. A method for providing the above.

24. The standard frame size is 4K UHD; 24. The method of claim 23.

25. the HDMI interface performing standard negotiation between the HDMI transmitter and the HDMI receiver to ensure that both the HDMI transmitter and the HDMI receiver agree on frame dimensions and pixel component depth (bits).

24. The method of claim 23, further comprising:

26. determining, prior to printing, the frame dimensions and pixel depth based on the printer page size, data rate, and / or HDMI capabilities specific to the particular HDMI transmitter being used; 24. The method of claim 23, further comprising:

27. configuring a higher level control to determine the frame dimensions and pixel depth and program the HDMI transmitter and the HDMI receiver to the correct HDMI frame format; 24. The method of claim 23, further comprising:

28. representing each frame as a full-page band, the band comprising a fixed number of printer page scan lines whose data size fits into the previously negotiated frame size; 24. The method of claim 23, further comprising:

29. said reconstruction adding data from each successive frame and synchronizing transmission to the printer according to page synchronization, line synchronization, and video clock.

24. The method of claim 23, further comprising:

30. a color palette representing a simple color page, the pixel data comprising an index into the palette; 24. The method of claim 23, further comprising:

31. said HDMI transmitter compressing the page data using run-length encoding or other applicable video compression technique; and the HDMI receiver decoding the encoded data.

24. The method of claim 23, further comprising:

32. Transmitting some frames and then restarting to optimize the variable size frames resulting from transmitting compressed data.

24. The method of claim 23, further comprising:

33. providing a system central processing unit (CPU) with CPU-accessible memory; providing a graphics processing unit (GPU) with a high-speed GPU-accessible memory for storing compressed or raw video printer data, the GPU memory being separate from the system CPU memory, and the GPU-accessible memory having a higher bandwidth than the CPU-accessible memory; and providing an HDMI port that reads from said GPU accessible memory, wherein frame data is transmitted without loading said CPU accessible memory or limiting said memory to real-time performance; 24. The method of claim 23, further comprising:

34. the GPU memory allocation control allocating frame data from a GPU, the GPU performing frame merging and frame locking functions; 34. The method of claim 33, further comprising:

35. said GPU performing a merge operation on the video stored in said GPU memory; delivering locked frames as needed to the HDMI transmitter for transmitting the video in the GPU memory via an HDMI port; and The HDMI receiver adapts the video data received from the HDMI port to a generic printer interface.

35. The method of claim 34, further comprising:

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