Optical fiber shuffle circuit

Abstract

This specification describes an optical fiber shuffle circuit designed to programmatically interconnect any number of ports without relying on thousands or more optical fibers. The optical fiber shuffle circuit developed by the inventors and described herein can be incorporated into a photonic interposer. The type of photonic interposer described herein includes a semiconductor substrate patterned (by photolithography) using photonic integrated circuits such as waveguides, modulators, photodetectors, switches, couplers, or any combination thereof.

Description

Background Art

[0001] An optical fiber is a thin, flexible strand of glass or plastic used to transmit optical signals over long distances with minimal loss of signal strength. The optical fiber includes a core, which is the central region through which light propagates, and the core is surrounded by a cladding layer having a lower refractive index than the core, enabling light to be confined within the core by total internal reflection. In an optical network, an optical fiber is used as a medium for transmitting data signals in the form of optical pulses. These pulses can carry an enormous amount of information, including voice, video, and data.

Summary of the Invention

[0002] Some embodiments relate to a photonic system that includes a photonic interposer patterned on a substrate. The photonic interposer has a plurality of sites, and each of at least a portion of the plurality of sites is an optical flow switch having an input waveguide and a plurality of output waveguides, wherein at least a portion of the plurality of output waveguides couple the site to one or more other sites of the plurality of sites, an optical flow switch, a fiber coupler coupled to the optical flow switch, a plurality of optical modulators coupled to the input waveguide, a first plurality of electrical connections configured to connect to a corresponding processor die, and a second plurality of electrical connections configured to connect to a corresponding router die. The optical modulators are coupled to the second plurality of electrical connections.

[0003] In some embodiments, each of at least a portion of the plurality of sites further includes a plurality of photodetectors coupled to one of the plurality of output waveguides. In some embodiments, the fiber coupler is arranged to couple to a plurality of optical fibers.

[0004] In some embodiments, the photonic system further comprises a controller configured to transfer data generated by the processor dies at the first site to the processor dies at the second site by controlling optical flow switches at at least some of the multiple sites.

[0005] In some embodiments, the photonic system further comprises a controller configured to transfer data generated by the processor dies at the first site to the fiber couplers at the second site by controlling optical flow switches at least some of the multiple sites.

[0006] In some embodiments, the controller is further configured to transfer data generated by the processor die at the first site to the first optical fiber among a plurality of optical fibers coupled to a fiber coupler at the second site.

[0007] In some embodiments, the photonic system further comprises a controller configured to transfer data from a fiber coupler at a first site to a fiber coupler at a second site by controlling optical flow switches at at least some of the multiple sites.

[0008] In some embodiments, the controller is further configured to transfer data to a first optical fiber among a plurality of optical fibers coupled to a fiber coupler at a second site.

[0009] In some embodiments, multiple optical modulators are configured to modulate light at wavelengths that are different from each other. In some embodiments, the fiber coupler comprises an edge coupler positioned at the edge of the photonic interposer.

[0010] Some embodiments relate to a computing system comprising a plurality of processor dies, a plurality of router dies including electronic routers, and a photonic interposer patterned on a substrate. The photonic interposer has a plurality of sites, and the plurality of processor dies and the plurality of router dies are mounted on the photonic interposer, each of at least a portion of the plurality of sites includes an optical flow switch having an input waveguide and a plurality of output waveguides, the optical flow switch comprising at least a portion of the output waveguides coupling the site to one or more other sites of the plurality of sites, a fiber coupler coupled to the optical flow switch, a plurality of optical modulators coupled to the input waveguides, a first plurality of electrical connections connected to a corresponding processor die among the plurality of processor dies, and a second plurality of electrical connections connected to a corresponding router die among the plurality of router dies. The optical modulators are coupled to the electronic routers of the corresponding router dies via the second plurality of electrical connections.

[0011] In some embodiments, each of at least some of the sites further comprises a plurality of photodetectors coupled to one of the plurality of output waveguides. In some embodiments, the fiber coupler is arranged to couple multiple optical fibers.

[0012] In some embodiments, the router die connected to a second plurality of electrical connections comprises a plurality of serializers / deserializers (SerDes) coupled to a plurality of optical modulators via the second plurality of electrical connections.

[0013] In some embodiments, the router die further includes a controller configured to transfer data generated by the processor die at the first site to the processor die at the second site by controlling at least some of the optical flow switches among a plurality of sites and the electronic router at the first site.

[0014] In some embodiments, the router die further includes a controller configured to transfer data generated by the processor die at the first site to a fiber coupler at the second site by controlling at least some of the optical flow switches among a plurality of sites and the electronic router at the first site.

[0015] In some embodiments, the router die further includes a controller configured to transfer data from a fiber coupler at a first site to a fiber coupler at a second site by controlling at least some of the optical flow switches among a plurality of sites and an electronic router at a first site. In some embodiments, multiple optical modulators are configured to modulate light at wavelengths that are different from each other.

[0016] In some embodiments, the fiber coupler comprises an edge coupler positioned at the edge of the photonic interposer. Various aspects and embodiments of this application will be described with reference to the following figures. Please note that the figures are not necessarily drawn to exact scale. Components appearing in multiple figures are indicated by the same reference numeral in the figures in which they appear. [Brief explanation of the drawing]

[0017] [Figure 1] This is a block diagram showing a pair of co-packaged optics (CPO) modules coupled together in an all-to-all configuration. [Figure 2] This is a cross-sectional view of a computing system including a photonic interposer according to several embodiments. [Figure 3] This is a top view of a computing system including a photonic interposer according to several embodiments. [Figure 4] This is a cross-sectional view showing in more detail a portion of the computing system in Figure 2, according to several embodiments. [Figure 5] A block diagram showing an optical flow switch coupled to multiple waveguides according to several embodiments. [Modes for carrying out the invention]

[0018] The inventors recognized and understood that creating large-scale computing systems using conventional co-packaged optics (CPO) methods is impractical. CPO refers to a technique in which optical communication components such as lasers, modulators, and photodetectors are integrated and packaged together with electronic integrated circuits (ICs) within the same physical package or module. This integration enables tighter coupling between optical and electronic components, resulting in improved performance, reduced power consumption, and enhanced functionality compared to conventional separate packaging of optical and electronic components. Co-packaged optics are primarily used in data center and high-performance computing (HPC) environments where high-speed, low-latency, and energy-efficient optical communication is critical. By directly integrating optical components with electronic ICs, co-packaged optics can achieve higher data transmission rates and lower power consumption compared to conventional optical transceivers.

[0019] However, CPOs have a fundamental limitation that reduces the scalability of computing systems. In computing architectures where all-to-all communication links are desired, connecting I / O ports to each other in CPO-based systems often requires thousands (or tens or hundreds of thousands) of optical fibers. Each fiber must be properly plugged into the appropriate port, but this method is extremely impractical, labor-intensive, and costly. System integrators often use optical fiber looms to handle the vast number of optical fibers, but this approach is space-inefficient because the fiber looms are bulky. Figure 1 is a block diagram showing a pair of copacked optics (CPO) modules coupled to each other in an all-to-all configuration (e.g., in a bipartite scheme). In this example, each CPO module 10 contains multiple optical transceivers (TX / RX). As shown, each transceiver in one module is connected (via fiber) to each transceiver in the other module. To build a system with 1,000 endpoint / leaf nodes (which is not uncommon in high-performance computing), a system integrator would have to handle approximately 100,000 fibers, which is extremely impractical.

[0020] The inventors have developed an optical fiber shuffle circuit designed to programmatically interconnect any number of ports without relying on thousands or more optical fibers. The optical fiber shuffle circuit developed by the inventors and described herein can be incorporated into a photonic interposer. The type of photonic interposer described herein includes a semiconductor substrate patterned (by photolithography) using photonic integrated circuits such as waveguides, modulators, photodetectors, switches, couplers, or any combination thereof.

[0021] In some embodiments, the photonic interposer is organized into “sites” (also called “tiles”), for example, in a 1D or 2D arrangement. Each site may include 1) electronic circuits implemented on the photonic interposer, 2) optical fibers attached to the photonic interposer corresponding to that site, and / or 3) optical circuits configured to communicate with other sites. Sites may be patterned on the photonic interposer by photolithography, or they may be instanced (e.g., identical copies) of template sites. For example, sites may be manufactured using reticle stitching techniques, where a stepper tool forms multiple adjacent instances of a reticle. In this system, a single parent mask set defines the reticle and is used repeatedly across the substrate to form the tiled photonic integrated circuit. Note that in some embodiments, some parts of the interposer may be patterned using a first photomask set, while other parts of the interposer may be patterned using a second photomask set (which may, in some embodiments, be a mirror image of the first mask set). Furthermore, it should be noted that not all photonic interposers described herein need to be manufactured using reticle stitching technology. Instead, multiple sites can be formed with a single reticle instance.

[0022] The optical circuit of the site may include an optical flow switch configured to route optical signals in a programmable manner from one part of the interposer to another part of the interposer. The optical flow switch may include a plurality of controllable (e.g., electrically controllable) optical switches configured to selectively couple any one of a number of input channels to any one of a number of output channels. In some embodiments, for example, the optical flow switch can receive a plurality of wavelength division multiplexing (WDM) channels on a common input waveguide and route each WDM channel to a specific output waveguide. The connection between the WDM channel and the output waveguide can be changed over time in response to a control signal. The opposite arrangement (where a plurality of input waveguides are associated with WDM channels on a common output waveguide) is also possible. Additionally or alternatively, the optical flow switch may receive a plurality of channels across a plurality of input waveguides and route each channel to an output waveguide. In this case as well, the connection between the input waveguide and the output waveguide may not be fixed and may change over time in response to a control signal. The optical switch may be implemented using, among other types of controllable switches, for example, resonant devices (e.g., ring-shaped or disk-shaped) and / or Mach-Zehnder interferometers (MZIs).

[0023] In another aspect of the present disclosure, the ability to route data between a plurality of chips (e.g., a plurality of processors communicating with each other and / or a plurality of memories communicating with each other and / or a processor communicating with a memory) can be enhanced by providing a combination of routing data in the photonic domain and routing data in the electronic domain. This approach leverages the advantages provided by any technology, namely, the high-speed and low-power nature of photonic routing and the programmability of electronic routing. Thus, in addition to the optical flow switch, some embodiments include an electronic router mounted on the interposer.

[0024] FIG. 2 is a cross-sectional view of a computing system including a photonic interposer, according to some embodiments. The photonic interposer 100 includes a plurality of sites, which may be instantiations (e.g., identical copies) of template sites in some (but not all) embodiments. The representative cross-sectional view of FIG. 2 shows four sites (sites 0, 1, 2, and 3), but any other suitable number of sites may be present, regardless of whether it is a 1D arrangement or a 2D arrangement (as shown in FIG. 3).

[0025] Each site includes an optical waveguide 106 that optically couples the sites to each other. The waveguide is coupled to an optical flow switch 102, which can route signals between specific inputs and specific outputs according to the needs of the computing system. The waveguide 106 functions as either an input or an output to the optical flow switch depending on the direction of the data. The optical flow switch may be further coupled to a fiber coupler 104 and a router ASIC 202 in addition to the waveguide 106.

[0026] The fiber coupler 104 may include a passive optical device (e.g., an edge coupler and / or an out-of-plane coupler such as a grating) configured to optically couple to fibers. Thus, the optical flow switch 102 can route data from and to devices that are located outside the interposer 100 and connected to the interposer 100 via fibers. In one example, the fiber coupler 104 couples to 48 fibers, but some embodiments may include more or fewer fibers.

[0027] The router ASIC 202 may be mounted on the interposer 100 and may be a die configured to provide electronic routing of data. The router ASIC 202 may be coupled to an xPU 200 (e.g., a CPU or GPU) via trace 201. The xPU 200, also called a processor 200, may also be implemented on the interposer 100. As will be described in more detail below, in some embodiments, the router ASIC 202 may be connected to a set of multiple xPU 200s. As further shown in Figure 2, the optical channel couples the router ASIC 202 to the optical flow switch in either direction.

[0028] The optical flow switch and router ASIC are configured to route data between any two points in the computing system. In one example, one of the xPUs located at Site 0 sends data intended to be routed to memory attached to one of the fibers coupled to Site 3. In this example, the controller routes the data sent by the xPU to the optical flow switch at Site 0 by controlling the router ASIC at Site 0. The controller further controls the optical flow switch at Site 0 to route the data to the optical flow switch at Site 1, the optical flow switch at Site 1 to route the data to the optical flow switch at Site 2, and the optical flow switch at Site 2 to route the data to the optical flow switch at Site 3. Finally, the controller controls the optical flow switch at Site 3 to route the data (via fiber coupler 104) to the fiber to which the destination memory is attached.

[0029] In another example, one of the xPUs located at Site 0 sends data intended to be routed to one of the xPUs located at Site 3. In this example, the controller controls the router ASIC at Site 0 to route the data sent by the xPU to the optical flow switch at Site 0. The controller further controls the optical flow switch at Site 0 to route the data to the optical flow switch at Site 1, the optical flow switch at Site 1 to route the data to the optical flow switch at Site 2, and the optical flow switch at Site 2 to route the data to the optical flow switch at Site 3. Finally, the controller controls the optical flow switch at Site 3 to route the data to the destination xPU at Site 3 (via the router ASIC at Site 3).

[0030] In some embodiments, data is received by a router ASIC at site 3, which extracts the header and electronically transmits the data to the destination xPU at site 3. This embodiment utilizes a combination of optical flow switching enabled by a photonic interposer 100 and packet switching enabled by a router ASIC 202. In this case, two router ASICs (site 0 and site 3) determine the data and route it to its destination. The speed of optical flow switching is limited by the speed at which the optical switch element can be modulated. If the element uses a thermal effect (e.g., a thermal phase shifter), the modulation bandwidth may be limited to less than a few MHz. The speed of packet switching is limited to the speed at which the data header can be read and the data can be routed within the electrical switches of the router ASIC. These routers may be clocked at the GHz level and thus provide a fast way to redirect data (although this may be achieved at the expense of power consumption).

[0031] In yet another example, one of the xPUs located at Site 0 sends a packet intended to be routed to one of the xPUs located at Site 3, and another packet intended to be routed to memory attached to one of the fibers coupled to Site 0. In this example, the control can leverage the WDM channel to send different packets to different destinations. For example, the controller can, by controlling the router ASIC at Site 0, encode the packet destined for the xPU located at Site 3 using one wavelength (λ1) and the packet destined for the memory attached to one of the fibers coupled to Site 0 using another wavelength (λ2). The optical flow switch at Site 0 can route the packet depending on the wavelength to which it is encoded. For example, λ1 may be routed to Site 1, and λ2 may be routed to the fiber coupler at Site 0. As in the example above, a subsequent flow switch can further route the λ1 packet to its final destination.

[0032] Figure 3 is a top view of a computing system including a photonic interposer 100 having eight sites (0, 1, 2, 3, 4, 5, 6, 7) arranged in a 2x4 grid, according to some embodiments. Of course, any other number of sites is possible. Note that Figure 2 may represent a cross-section of the system in Figure 3. In the example in Figure 3, each site hosts a router ASIC 202 and four xPUs 200. The router ASIC 202 connects to each xPU in the same site via a trace 201 (shown in Figure 2). As described above, the sites are optically coupled to each other via waveguides 106 and optical flow switches 102. In this example, a fiber coupler 104 couples to a fiber bundle 110 containing 48 fibers. Note that not all sites need to be arranged the same way. For example, some sites may have more xPUs than others. In some embodiments, some sites (or all sites) may have one or more memory chips in addition to (or instead of) the xPUs. Similar to the xPU, the memory chip may be connected to the corresponding router ASIC via trace 201.

[0033] The system in Figure 3, by using a combination of optical routing (by the optical flow switch 102) and electronic routing (by the router ASIC 202), enables high programmability while maintaining a relatively small number of fibers (384 in this example), providing a significant improvement over the thousands of fibers required in conventional CPO solutions.

[0034] Figure 4 is a cross-sectional view showing in more detail a portion of the computing system of Figure 2 according to several embodiments. In particular, Figure 4 shows a portion of site 0. The die of the xPU 200 is connected to the photonic interposer 100 via an electrical connection 402. Similarly, the die of the router ASIC 202 is connected to the photonic interposer 100 via an electrical connection 404. In some embodiments, in order to accommodate different types of chips (xPU vs. router ASIC), the electrical connection 402 may differ from the electrical connection 404 in one or more respects, including, for example, pitch, number of connections, resistance, material, shape, geometric shape, etc. In one embodiment, the electrical connection 402 is a power and signal connection from the xPU to a substrate (not shown) on which the photonic interposer 100 is mounted. These electrical connections do not necessarily have direct electrical connections to the circuitry of the photonic interposer; rather, through-silicon vias (TSVs) within the photonic interposer may be used to connect the xPU to the substrate. The electrical connection section 404 may also include a TSV connection section for connecting the ASIC to a substrate, similar to the connection section 402. However, the connection section 404 may be configured to electrically connect the ASIC to the circuitry of the photonic interposer 100. The direct connection to the photonic interposer may include signals from a Tx driver available in the router ASIC to an optical Tx modulator in 100, signals from a transimpedance amplifier connected to an optical Rx modulator in 100 to the router ASIC, and control signals that modify the configuration of the optical flow switches in the photonic interposer 100. In one embodiment, the router ASIC transmits an analog voltage or current signal that directly modulates the switching elements in 100. In this case, the router ASIC also includes a controller circuit that calculates the settings of the switching elements based on a desired configuration. In another embodiment, the router ASIC transmits a digital signal to a digital controller circuit in 100. This circuit adjusts the analog voltage or current signal required to modulate the switching elements in 100 to achieve a desired configuration.

[0035] The router ASIC 202 includes an electronic router 210 and a controller 212. The controller 212 can control the operation of the electronic routers and optical flow switches at the same site. In some embodiments, each router ASIC at a site includes a dedicated controller. However, in other embodiments, a single controller can control the operation of all electronic routers and all optical flow switches across all sites. This controller may be part of one of the router ASICs or may be on a separate chip (may be mounted on the interposer 100 or externally).

[0036] In the example shown in Figure 4, the electronic router 210 and the optical flow switch 102 are coupled to each other via a WDM channel 400. The WDM channels (characterized by having different wavelengths) may share a common waveguide.

[0037] Figure 5 shows a more detailed representation of a typical optical flow switch 102 at site 0 according to several embodiments. One or more waveguides (identified as I / O waveguides 116) couple the optical flow switch 102 to a fiber coupler 104. In some embodiments, there may be an I / O waveguide 116 for each fiber attached to the fiber coupler (e.g., 48 in the example of Figure 3). The input waveguide 112 supports optical communication from the electronic router 210 to the optical flow switch 102, and the output waveguide 118 supports optical communication in the opposite direction (from the optical flow switch 102 to the electronic router 210). Both the input and output waveguides may support WDM channels.

[0038] On the input side, an array of serializer / deserializers (SerDes) (0-7) and an array of modulators 130 are coupled to the input waveguide 112. The SerDes may be integrated as part of the router ASIC 202 or as part of the interposer 100. The modulators 130 may also be integrated as part of the interposer 100. Each pair of SerDes and modulators can modulate a WDM channel using data provided by the router ASIC 202.

[0039] On the output side, the photodetector 132 and the array of SerDes (0-7) are coupled to the output waveguide 116. The SerDes may be integrated as part of the router ASIC 202 or as part of the interposer 100. The photodetector 132 may be integrated as part of the interposer 100. Each pair of SerDes and photodetector can extract data from the WDM channel and convert it into an electrical signal. In addition, the waveguide 106 couples the optical flow switch 102 to an optical flow switch at another site, and (optionally) directly to a fiber coupler at another site (e.g., by bypassing other optical flow switches). The waveguide 106 can enable communication in either direction.

[0040] In some embodiments, instead of having one optical switch for each site, the interposer may include a single optical flow switch coupled to all of the router ASICs and fiber couplers in the interposer.

[0041] While several aspects and embodiments of the technology of this application have been described above, it should be understood that various changes, modifications, and improvements will be readily conceivable to those skilled in the art. Such changes, modifications, and improvements are intended to fall within the spirit and scope of the technology described herein. Therefore, it should be understood that the embodiments described above are presented only as examples, and embodiments of the present invention may be carried out in ways other than those specifically described, within the scope of the appended claims and their equivalents. In addition, any combination of two or more features, systems, articles, materials, and / or methods described herein is included within the scope of this disclosure, provided that such features, systems, articles, materials, and / or methods are not inconsistent with each other.

[0042] Furthermore, as described, several embodiments can be embodied in one or more methods. The actions performed as part of the method can be ordered in any preferred manner. Thus, even if shown as a series of actions in the exemplary embodiments, embodiments can be constructed in which some actions are performed in a different order than shown, which may include performing some actions simultaneously.

[0043] All definitions provided and used herein should be understood to take precedence over dictionary definitions, definitions in references cited herein, and / or the common meanings of the terms defined herein.

[0044] As used herein and in the claims, the indefinite articles “a” and “an” should be understood to mean “at least one” unless otherwise explicitly stated.

[0045] As used herein and in the claims, the phrase "and / or" should be understood to mean "either or both" of the elements thus combined, i.e., elements that exist together in some cases and separately in other cases.

[0046] As used herein and in the claims, the phrase “at least one” referring to a list of one or more elements means at least one element selected from any one or more elements in the list of elements, but not necessarily including at least one of every element specifically enumerated in the list of elements, and not excluding any combination of elements in the list of elements. This definition also allows for the optional presence of elements other than those specifically identified in the list of elements, which are referred to by the phrase “at least one,” whether related to or unrelated to those specifically identified elements.

[0047] The terms “approximately” and “about” may be used to mean within ±20% of the target value in some embodiments, within ±10% of the target value in some embodiments, within ±5% of the target value in some embodiments, and within ±2% of the target value in some embodiments. The terms “approximately” and “about” may include the target value.

Claims

1. It is a photonic system, The substrate comprises a photonic interposer with a pattern formed on it, the photonic interposer having a plurality of sites, and each of at least a portion of the plurality of sites is An optical flow switch having an input waveguide and a plurality of output waveguides, wherein at least a portion of the plurality of output waveguides is configured to connect one or more sites to one or more other sites among the plurality of sites. A fiber coupler coupled to the optical flow switch, A plurality of optical modulators coupled to the input waveguide, A first set of multiple electrical connections configured to connect to the corresponding processor die, A photonic system comprising a second plurality of electrical connections configured to connect to a corresponding router die, wherein the optical modulator is coupled to the second plurality of electrical connections.

2. The photonic system according to claim 1, wherein each of the at least portion of the plurality of sites further comprises a plurality of photodetectors coupled to one of the plurality of output waveguides.

3. The photonic system according to claim 1, wherein the fiber coupler is arranged to couple with a plurality of optical fibers.

4. The photonic system according to claim 1, further comprising a controller configured to transfer data generated by the processor die of the first site to the processor die of the second site by controlling the optical flow switches of at least some of the plurality of sites.

5. The photonic system according to claim 1, further comprising a controller configured to transfer data generated by the processor die at the first site to the fiber coupler at the second site by controlling the optical flow switches of at least some of the plurality of sites.

6. The photonic system according to claim 5, wherein the controller is further configured to transfer the data generated by the processor die at the first site to a first optical fiber among a plurality of optical fibers coupled to the fiber coupler at the second site.

7. The photonic system according to claim 1, further comprising a controller configured to transfer data from the fiber coupler at a first site to the fiber coupler at a second site by controlling the optical flow switches of at least some of the plurality of sites.

8. The photonic system according to claim 7, wherein the controller is further configured to transfer data to a first optical fiber among a plurality of optical fibers coupled to the fiber coupler at the second site.

9. The photonic system according to claim 1, wherein the plurality of optical modulators are configured to modulate light at wavelengths different from each other.

10. The photonic system according to claim 1, wherein the fiber coupler comprises an edge coupler positioned at the edge of the photonic interposer.

11. A computing system, Multiple processor dies, Multiple router dies, including an electronic router, A photonic interposer with a pattern formed on a substrate, The photonic interposer has multiple sites, the multiple processor dies and the multiple router dies are implemented on the photonic interposer, and each of at least a portion of the multiple sites is An optical flow switch having an input waveguide and a plurality of output waveguides, wherein at least a portion of the output waveguides connects the site to one or more other sites among the plurality of sites, A fiber coupler coupled to the optical flow switch, A plurality of optical modulators coupled to the input waveguide, A first set of electrical connection parts connected to a corresponding processor die among the aforementioned set of processor dies, A computing system comprising: a second plurality of electrical connections connected to a corresponding router die among the plurality of router dies, wherein the optical modulator is coupled to the electronic router of the corresponding router die via the second plurality of electrical connections;

12. The computing system according to claim 11, wherein each of the at least portion of the plurality of sites further comprises a plurality of photodetectors coupled to one of the plurality of output waveguides.

13. The computing system according to claim 11, wherein the fiber coupler is arranged to couple with a plurality of optical fibers.

14. The computing system according to claim 11, wherein the router die connected to the second plurality of electrical connections comprises a plurality of serializers / deserializers (SerDes) coupled to the plurality of optical modulators via the second plurality of electrical connections.

15. The computing system according to claim 11, wherein the router die further comprises a controller, the controller configured to transfer data generated by the processor die at the first site to the processor die at the second site by controlling the optical flow switches of at least some of the plurality of sites and the electronic router at the first site.

16. The computing system according to claim 11, wherein the router die further comprises a controller, the controller configured to transfer data generated by the processor die at the first site to the fiber coupler at the second site by controlling the optical flow switches at least some of the plurality of sites and the electronic router at the first site.

17. The computing system according to claim 11, wherein the router die further comprises a controller configured to transfer data from the fiber coupler at the first site to the fiber coupler at the second site by controlling the optical flow switches of at least some of the plurality of sites and the electronic router at the first site.

18. The computing system according to claim 11, wherein the plurality of optical modulators are configured to modulate light at wavelengths different from each other.

19. The computing system according to claim 11, wherein the fiber coupler comprises an edge coupler positioned at the edge of the photonic interposer.

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