Array substrate and display device

JP2026518485APending Publication Date: 2026-06-09BOE TECHNOLOGY GROUP CO LTD +1

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
BOE TECHNOLOGY GROUP CO LTD
Filing Date
2023-05-04
Publication Date
2026-06-09

Smart Images

  • Figure 2026518485000001_ABST
    Figure 2026518485000001_ABST
Patent Text Reader

Abstract

An array substrate is provided. The array substrate includes one or more barrier walls and a plurality of signal lines located in a peripheral region and on the side of one or more barrier walls away from the base substrate. The peripheral region includes an internal region, an external region, and one or more inter-barrier regions. The internal region is located between a display region and the barrier wall closest to the display region. Each of the one or more inter-barrier regions is located between two adjacent barrier walls. The external region is located on the side of the barrier wall furthest from the display region away from the display region. The plurality of signal lines include one or more first signal lines extending in a direction substantially parallel to at least one barrier wall in at least one of the one or more inter-barrier regions.
Need to check novelty before this filing date? Find Prior Art

Claims

1. An array substrate comprising one or more barrier walls and a plurality of signal lines located in a peripheral region and on the side of the one or more barrier walls away from the base substrate, The peripheral region includes an internal region, an external region, and one or more inter-barrier regions. The aforementioned internal region is located between the display region and the barrier wall closest to the display region. Each of the one or more inter-barrier regions is located between two adjacent barrier walls. The external region is located on the side of the barrier wall furthest from the display region that is furthest from the display region. The plurality of signal lines include one or more first signal lines extending in a direction substantially parallel to at least one barrier wall in at least one of the one or more inter-barrier regions. Array substrate.

2. Each of the one or more first signal lines includes a first portion and a second portion that are connected to each other. The first portion extends in a direction substantially parallel to at least one barrier wall in at least one of the one or more inter-barrier regions, The second portion intersects with at least one barrier wall. The array substrate according to claim 1.

3. The length of the first portion extending in at least one of the one or more inter-barrier regions is at least 1.5 times the corresponding inter-barrier distance of the corresponding inter-barrier region among the one or more inter-barrier regions. The array substrate according to claim 2.

4. The orthographic projection of the first portion onto the base substrate does not substantially overlap with the orthographic projection of any barrier wall onto the base substrate. The orthographic projection of the second portion onto the base substrate at least partially overlaps with the orthographic projection of at least one barrier wall onto the base substrate. The array substrate according to claim 2.

5. The plurality of signal lines further include a plurality of second signal lines that extend at least partially into the internal region and at least partially intersect the one or more inter-barrier regions, The portion of each of the plurality of second signal lines located in the corresponding inter-barrier region of the one or more inter-barrier regions extends in a direction not parallel to the one or more barrier walls. The array substrate according to any one of claims 1 to 4.

6. The total length of the portion of each of the multiple second signal lines located in the corresponding inter-barrier region is in the range of 1.0 to 1.5 times the corresponding inter-barrier distance of the corresponding inter-barrier region among the one or more inter-barrier regions. The array substrate according to claim 5.

7. Each of the plurality of second signal lines includes a third portion and a fourth portion that are connected to each other. The third portion extends in the internal region in a direction substantially parallel to at least one barrier wall, The fourth portion intersects with at least one barrier wall. The array substrate according to claim 5.

8. The plurality of signal lines further include a plurality of third signal lines extending into the external region, Each of the plurality of third signal lines includes a fifth portion and a sixth portion that are connected to each other. The fifth portion extends in a direction substantially parallel to at least one barrier wall, The sixth portion extends in a direction not parallel to the one or more barrier walls. The array substrate according to any one of claims 1 to 7.

9. The plurality of signal lines have a stepped pattern in the region transitioning from the side region to the corner region of the peripheral region in the lower bezel. Each signal line includes a first line segment and a second line segment that are alternately connected and extend in different directions, the second line segment extending toward the display area. The array substrate according to any one of claims 1 to 8.

10. The first line segment has a first average line width, the second line segment has a second average line width, and the second average line width is greater than the first average line width. The first line segments are spaced apart by the distance between the first segments, and the second line segments are spaced apart by the distance between the second segments, and the distance between the second segments is greater than the distance between the first segments. The array substrate according to claim 9.

11. The aforementioned display area further includes a pixel definition layer located in the aforementioned display area, The aforementioned pixel definition layer is not present in the peripheral region, at least partially. The aforementioned plurality of signal lines are spaced at a distance of 100 μm or less from the edge of the pixel definition layer. The array substrate according to any one of claims 1 to 10.

12. The aforementioned peripheral region includes the corner region, The aforementioned corner region includes a first sub-region in which a pixel definition layer exists and a second sub-region from which a layer containing organic material has been removed. The array substrate is arranged in a grid pattern and includes a plurality of apertures that penetrate the pixel definition layer in the first sub-region. The first sub-region is separated from the barrier wall by the second sub-region. The second sub-region substantially does not have the plurality of signal lines. The array substrate according to claim 11.

13. The aforementioned one or more barrier walls include two adjacent barrier walls, The array substrate further includes grooves that separate the two adjacent barrier walls, One or more signal lines are located in the inter-barrier region corresponding to a groove where the width of the groove between two adjacent barrier walls is greater than the sum of the wall widths of the two adjacent barrier walls. The array substrate according to any one of claims 1 to 12.

14. The barrier wall further includes an organic material layer adjacent to the barrier wall, and a groove that separates the organic material layer from the barrier wall. One or more signal lines are present in a region corresponding to a groove between the barrier wall and the organic material layer, where the width of the groove is greater than twice the width of the barrier wall. The array substrate according to any one of claims 1 to 12.

15. The one or more barrier walls include a first adjacent barrier wall and a second adjacent barrier wall. The aforementioned array substrate is A corresponding groove located in the inter-barrier region between the first adjacent barrier wall and the second adjacent barrier wall, The system further includes a plurality of adjacent signal lines located in the inter-barrier region corresponding to the corresponding groove, The plurality of adjacent signal lines in the inter-barrier region corresponding to the corresponding groove are located alternately in two different layers. The array substrate according to any one of claims 1 to 12.

16. The portion of each of the plurality of adjacent signal lines located on the side of the adjacent barrier wall away from the corresponding groove includes a two-layer portion having a first segment located in the first conductive layer and a second segment located in the second conductive layer. The two-layer portion is connected to the portion located in the inter-barrier region corresponding to the corresponding groove of the adjacent signal line. The array substrate according to claim 15.

17. Each of the plurality of adjacent signal lines includes at least a first single segment located in the first conductive layer but not in the second conductive layer, and a second single segment located in the second conductive layer but not in the first conductive layer. One or more first single segments and one or more second single segments from each adjacent signal line are arranged alternately in the inter-barrier region corresponding to each groove. The array substrate according to claim 15.

18. The total length of the first single segment and the total length of the second single segment in each adjacent signal line are substantially the same. The total length of the single segments of the aforementioned plurality of signal lines is substantially the same. The array substrate according to claim 17.

19. The first and second single segments of the same corresponding signal line are located in different regions of the peripheral region, on different sides of the display region, respectively. The array substrate according to claim 17.

20. A display device comprising an array substrate according to any one of claims 1 to 19 and one or more integrated circuits connected to the array substrate, The aforementioned display device is A plurality of light-emitting elements located on the base substrate, A sealing layer located on the side of the plurality of light-emitting elements away from the base substrate, A first touch metal layer located on the side of the sealing layer away from the base substrate, A touch insulating layer located on the side of the first touch metal layer away from the base substrate, The touch insulating layer includes a second touch metal layer located on the side away from the base substrate, The plurality of signal lines are a plurality of touch control signal lines located in at least one of the first touch metal layer or the second touch metal layer. Display device.

21. An array substrate including a display area and a peripheral area, The array substrate includes a first organic structure, one or more barrier walls, and a second organic structure, which are sequentially arranged in the peripheral region along a direction away from the display region. Each of the one or more barrier walls includes one or more organic insulating layers. Each of the barrier walls provides two adjacent grooves that extend at least partially into the one or more organic insulating layers, with these grooves spaced apart. The two adjacent grooves are located on either side of the corresponding barrier wall, along the direction in which the first organic structure, the one or more barrier walls, and the second organic structure are sequentially arranged. The array substrate further includes a plurality of signal lines located in the peripheral region and on the side of the one or more barrier walls away from the base substrate, At least one of the plurality of signal lines extends in a direction substantially parallel to the one or more barrier walls in a region having a groove adjacent to the barrier wall. Array substrate.

22. The aforementioned one or more barrier walls include two adjacent barrier walls, The array substrate further includes grooves that separate the two adjacent barrier walls, One or more signal lines are located in the inter-barrier region corresponding to a groove where the width of the groove between two adjacent barrier walls is greater than the sum of the wall widths of the two adjacent barrier walls. The array substrate according to claim 21.

23. The invention further includes an organic structure adjacent to the barrier wall and a groove that separates the organic structure from the barrier wall. One or more signal lines are located in a region corresponding to a groove between the barrier wall and the organic structure, where the width of the groove is greater than twice the width of the barrier wall. The array substrate according to claim 21.

24. The grooves are adjacent to barrier walls or organic structures with an inclination angle in the range of 5 to 30 degrees. The width of the groove is, when the groove is located between two adjacent barrier walls, less than or equal to the sum of the widths of the two adjacent barrier walls, or when the groove is located between a barrier wall and an organic structure, less than or equal to twice the width of the barrier wall. At least one of the plurality of signal lines extends in a direction substantially parallel to the one or more barrier walls in a region having the groove adjacent to the barrier wall or organic structure, where the inclination angle is in the range of 5 to 30 degrees. The array substrate according to claim 21.

25. The grooves are adjacent to a barrier wall or organic structure with a thickness in the range of 1 μm to 2 μm. The width of the groove is, when the groove is located between two adjacent barrier walls, less than or equal to the sum of the widths of the two adjacent barrier walls, or when the groove is located between a barrier wall and an organic structure, less than or equal to twice the width of the barrier wall. At least one of the plurality of signal lines extends in a direction substantially parallel to the one or more barrier walls in a region having the groove adjacent to the barrier wall or organic structure, which has a thickness in the range of 1 μm to 2 μm. The array substrate according to claim 21.

26. The groove is adjacent to a barrier wall or organic structure with an inclination angle exceeding 30 degrees or a thickness exceeding 2 μm. The width of the groove is, when the groove is located between two adjacent barrier walls, less than or equal to the sum of the widths of the two adjacent barrier walls, or when the groove is located between a barrier wall and an organic structure, less than or equal to twice the width of the barrier wall. None of the aforementioned plurality of signal lines extend in a direction substantially parallel to one or more of the barrier walls in the region having the groove adjacent to the barrier wall or organic structure where the inclination angle exceeds 30 degrees or the thickness exceeds 2 μm. The array substrate according to claim 21.