Information processing device and recovery method

Abstract

To continue utilization of an information processing device when recovering a management unit that manages the information processing device from a failure.SOLUTION: A management unit includes an image processing part which performs image processing and manages an information processing device. A monitoring unit monitors the management unit and outputs an abnormality detection signal when an abnormality in the management unit is detected. An information processing unit performs information processing, separates the image processing part on the basis of the abnormality detection signal when the abnormality detection signal is output from the monitoring unit and reboots the management unit.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to restoration techniques. [Background technology]

[0002] During operation of a server system, a failure may occur in which the BMC (Baseboard Management Controller) in the server hangs up due to a problem in firmware or hardware. The frequency of occurrence of BMC failures is, for example, about several times a year.

[0003] BMC is a control IC (Integrated Circuit) chip for managing a server from a remote terminal. The remote terminal can obtain information about the hardware in the server and perform remote operations on the hardware via the BMC. Although a BMC hang-up does not impede the operation of the server, it does impede the acquisition of hardware information and remote operations, so BMC recovery work is performed.

[0004] In relation to BMC recovery work, a system for resetting the BMC or another component of a server system is known (see, for example, Patent Document 1). A stall monitoring device is also known that allows a computer system to continue operating even if a stall occurs in a controller such as a BMC, without duplicating the controller such as a BMC (see, for example, Patent Document 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2019-125339 A [Patent Document 2] JP 2011-204046 A Summary of the Invention [Problem to be solved by the invention]

[0006] In the BMC recovery process, the BMC is reset. Because the BMC also contains a VGA (Video Graphics Array) chip used by the Operating System (OS), resetting the BMC also affects the OS, causing abnormalities in the operation of the server system. For this reason, the entire server system, including the OS, is shut down before resetting the BMC.

[0007] Thus, BMC recovery work is a major undertaking. If the BMC hangs up in a client's server system, a worker must travel to the server system's location to perform BMC recovery work. This requires a worker to visit the client's site every time the BMC hangs up, and it takes a long time to recover the BMC. If the server system is shut down for an extended period of time due to recovery work, this will have a significant impact on the client's business.

[0008] This problem is not limited to a BMC failure, but occurs when a failure occurs in any of the various management units that manage the information processing device (computer).

[0009] In one aspect, the present invention has an object to continue the operation of an information processing device when a management unit that manages the information processing device is restored from a failure. [Means for solving the problem]

[0010] In one proposal, the information processing device includes a management unit, a monitoring unit, and an information processing unit. The management unit includes an image processing unit that performs image processing, and manages the information processing device. The monitoring unit monitors the management unit, and when an abnormality in the management unit is detected, outputs an abnormality detection signal. The information processing unit performs information processing, and when the abnormality detection signal is output from the monitoring unit, disconnects the image processing unit based on the abnormality detection signal and restarts the management unit. Effect of the Invention

[0011] According to one aspect, when a management unit that manages an information processing device is restored from a failure, the operation of the information processing device can be continued. [Brief description of the drawings]

[0012] [Figure 1] FIG. 2 is a hardware configuration diagram of a server in a server system of a comparative example. [Diagram 2] FIG. 2 is a functional configuration diagram of the information processing apparatus according to the embodiment. [Diagram 3] 13 is a flowchart of a recovery process. [Figure 4] FIG. 2 is a hardware configuration diagram of a server system according to an embodiment. [Diagram 5] FIG. 2 is a hardware configuration diagram of a server in the server system according to the embodiment. [Figure 6] FIG. 13 is a diagram illustrating a recovery process of the BMC. [Figure 7A] 13 is a flowchart (part 1) of a first recovery process. [Figure 7B] 13 is a flowchart (part 2) of the first recovery process. [Figure 7C] 13 is a flowchart (part 3) of the first recovery process. [Figure 7D] 13 is a flowchart (part 4) of the first recovery process. [Figure 8A] 13 is a flowchart (part 1) of a second recovery process. [Figure 8B] 13 is a flowchart (part 2) of the second recovery process. [Figure 9A] 13 is a flowchart (part 1) of the third recovery process. [Figure 9B] 13 is a flowchart (part 2) of the third recovery process. [Figure 9C] 13 is a flowchart (part 3) of the third recovery process. [Figure 9D] 13 is a flowchart (part 4) of the third recovery process. [Figure 10A] 13 is a flowchart (part 1) of the fourth recovery process. [Figure 10B]23 is a flowchart (part 2) of the fourth recovery process. [Figure 10C] 13 is a flowchart (part 3) of the fourth recovery process. [Figure 10D] 13 is a flowchart (part 4) of the fourth recovery process. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, the embodiments will be described in detail with reference to the drawings.

[0014] Fig. 1 shows an example of a hardware configuration of a server in a server system of a comparative example. The server 101 in Fig. 1 includes a BMC 111, a chipset 112, and a CPU (Central Processing Unit) 113, and the BMC 111 includes a VGA 121. These components are hardware. The VGA 121 and the chipset 112 are connected by a PCI-E (Peripheral Component Interconnect-Express) bus 122.

[0015] In addition to the server 101, the server system may include other devices such as a RAID (Redundant Arrays of Inexpensive Disks) device, a tape device, and the like.

[0016] The CPU 113 executes a basic input / output system (BIOS) 131 and an OS 132. The OS 132 includes a VGA driver 141. The OS 132 accesses the VGA 121 using the VGA driver 141, thereby causing the VGA 121 to perform image processing such as video redirection.

[0017] When the BMC 111 is reset during the recovery process of the BMC 111, the VGA 121 is also reset. When the VGA 121 is reset, the CPU 113 connected to the VGA 121 via the PCI-E bus 122 and the chipset 112 detects a timeout in access to the VGA 121 and stops execution of the OS 132. As a result, the screen of the OS 132 is no longer displayed on the display device of the remote terminal.

[0018] Although it is possible to detach the VGA 121 from the OS 132 by using the function of PCI Hotplug, the OS 132 does not detect that the BMC 111 has hung up and therefore does not detach the VGA 121. In addition, since the BMC 111 has a role of monitoring the server 101 independently of the OS 132, there is no mechanism for detaching the BMC 111 from the OS 132.

[0019] For this reason, in the server 101 of FIG. 1, the recovery work of the BMC 111 is carried out in the following procedure.

[0020] (P1) A problem occurs in the Web UI (User Interface) of a remote terminal, and an operator notices the occurrence of an abnormality.

[0021] (P2) The worker goes to the location where the server system is installed (such as a server room) and checks the LED (Light Emitting Diode) of the server 101. Then, since the LED has changed from on to off, it is determined that there is an abnormality in the BMC 111.

[0022] (P3) The operator terminates all processes being executed on the server 101 and then shuts down the OS 132.

[0023] (P4) The operator shuts down the server system by turning off the power of each device other than the server 101.

[0024] (P5) The operator resets the BMC 111.

[0025] (P6) The worker checks the reset result on the monitoring screen, and if the result is normal, proceeds to the work of (P7); if the result is abnormal, a maintenance work is requested.

[0026] (P7) The worker starts up the server system by turning on the power of each device.

[0027] In this way, the entire server system including the OS 132 is stopped before the BMC 111 is reset, which requires an operator to go to the server room or the like, and takes a long time to restore the BMC 111.

[0028] Fig. 2 illustrates an example of a functional configuration of an information processing apparatus according to an embodiment. The information processing apparatus 201 in Fig. 2 includes a management unit 211, a monitoring unit 212, and an information processing unit 213. The management unit 211 includes an image processing unit 221 that performs image processing, and manages the information processing apparatus 201.

[0029] Fig. 3 is a flowchart showing an example of recovery processing performed by the information processing device 201 in Fig. 2. The information processing unit 213 performs information processing (step 301). Then, the monitoring unit 212 monitors the management unit 211, and when an abnormality in the management unit 211 is detected, it outputs an abnormality detection signal.

[0030] When an abnormality detection signal is output from the monitoring unit 212, the information processing unit 213 disconnects the image processing unit 221 based on the abnormality detection signal (step 302), and restarts the management unit 211 (step 303).

[0031] According to the information processing device 201 of FIG. 2, when the management unit 211 that manages the information processing device 201 is restored from a failure, the operation of the information processing device 201 can be continued.

[0032] Fig. 4 shows an example of a hardware configuration of a server system according to an embodiment. The server system in Fig. 4 includes a server 401 and a RAID device 402. The server 401 corresponds to the information processing device 201 in Fig. 2. The server 401 and the RAID device 402 are connected via a communication network.

[0033] The RAID device 402 stores data used by the server 401. The RAID device 402 is an example of an auxiliary storage device. The server 401 performs information processing using the data stored in the RAID device 402, and stores the processing results in the RAID device 402.

[0034] Fig. 5 shows an example of a hardware configuration of the server 401 in Fig. 4. The server 401 in Fig. 5 includes a BMC 511, a chipset 512, a CPU 513, a monitoring circuit 514, a memory 515, and a communication circuit 516. The BMC 511 includes a VGA 521. These components are hardware. The CPU 513 is sometimes called a processor.

[0035] The BMC 511, the CPU 513, the monitoring circuit 514, and the VGA 521 correspond to the management unit 211, the information processing unit 213, the monitoring unit 212, and the image processing unit 221, respectively, in Fig. 2. The monitoring circuit 514 is, for example, a Complex Programmable Logic Device (CPLD).

[0036] The CPU 513, the memory 515, and the communication circuit 516 are connected to the chipset 512, and the monitor circuit 514 is connected to the BMC 511 and the chipset 512. The VGA 521 and the chipset 512 are connected by a PCI-E bus 522.

[0037] The memory 515 is, for example, a semiconductor memory such as a RAM (Random Access Memory), and stores programs and data used in information processing. The communication circuit 516 is connected to a communication network, and communicates with the RAID device 402.

[0038] The CPU 513 acquires data from the RAID device 402 via the communication circuit 516, and stores the acquired data in the memory 515. The CPU 513 then performs information processing by executing a program using the data stored in the memory 515, and transmits the processing result to the RAID device 402 via the communication circuit 516.

[0039] The BMC 511 manages the server 401. A remote terminal (not shown) can obtain information about the hardware in the server 401 and perform remote operations on the hardware via the BMC 511. The VGA 521 performs image processing such as video redirection.

[0040] When performing information processing, the CPU 513 executes a BIOS 531 and an OS 532. The BIOS 531 is an example of a first program, and the OS 532 is an example of a second program.

[0041] The BIOS 531 includes an interrupt processing routine 541. The interrupt processing routine 541 includes a process for generating an interrupt request to the OS 532, and a process for checking the communication state between the CPU 513 and the VGA 521. The interrupt processing routine 541 is sometimes called an interrupt service routine.

[0042] The OS 532 includes a VGA driver 542. The OS 532 accesses the VGA 521 using the VGA driver 542, thereby causing the VGA 521 to perform image processing. In addition, the OS 532 can separate the VGA 521 from the OS 532 using a PCI Hotplug function that the VGA driver 542 has.

[0043] Since the BIOS 531 can communicate with the OS 532, if the BMC 511 hangs up, the BIOS 531 can notify the OS 532 of the abnormality of the BMC 511. However, the BIOS 531 does not monitor the BMC 511, and does not recognize the state of the BMC 511. Therefore, in order to detect the abnormality of the BMC 511, a monitoring circuit 514 is provided.

[0044] The monitoring circuit 514 monitors the BMC 511 using a watchdog function. The monitoring circuit 514 transmits an inquiry signal to the BMC 511 and checks whether a response signal is received from the BMC 511 within a predetermined period of time. If a response signal is not received within the predetermined period of time, the monitoring circuit 514 determines that an abnormality has occurred in the BMC 511. This makes it possible to detect an abnormality in the BMC 511.

[0045] When an abnormality in the BMC 511 is detected, the monitor circuit 514 outputs an interrupt request to the BIOS 531 to the CPU 513 via the chipset 512. The interrupt request to the BIOS 531 is an example of a first interrupt request to the first program, and corresponds to the abnormality detection signal.

[0046] The CPU 513 executes an interrupt processing routine 541 of the BIOS 531 based on the interrupt request from the monitor circuit 514, thereby generating an interrupt request to the OS 532. The interrupt request to the OS 532 is an example of a second interrupt request to the second program.

[0047] Based on an interrupt request from an interrupt processing routine 541 , the CPU 513 uses a VGA driver 542 of the OS 532 to disconnect the VGA 521 from the PCI-E bus 522 , thereby disconnecting the VGA 521 from the CPU 513 .

[0048] The process of disconnecting the VGA 521 from the CPU 513 represents a process of changing the communication state between the CPU 513 and the VGA 521 from a communication possible state to a communication impossible state. The communication possible state corresponds to a link up, and the communication impossible state corresponds to a link down.

[0049] The monitoring circuit 514 outputs an interrupt request to the BIOS 531, thereby notifying the BIOS 531 of an abnormality in the BMC 511. In addition, the interrupt processing routine 541 of the BIOS 531 generates an interrupt request to the OS 532, thereby notifying the OS 532 of an abnormality in the BMC 511.

[0050] After outputting the interrupt request to the BIOS 531, the monitor circuit 514 outputs the next interrupt request to the BIOS 531 to the CPU 513 via the chipset 512. The next interrupt request to the BIOS 531 is an example of a third interrupt request to the first program.

[0051] The CPU 513 checks the communication state between the CPU 513 and the VGA 521 by executing an interrupt processing routine 541 based on the next interrupt request from the monitor circuit 514. If the communication state is not possible, the CPU 513 resets the BMC 511 to restart the BMC 511.

[0052] The monitoring circuit 514 outputs the next interrupt request to the BIOS 531, thereby making it possible for the interrupt processing routine 541 to check whether the VGA 521 has been disconnected. Then, by resetting the BMC 511 when the VGA 521 has been disconnected, it becomes possible to restart the BMC 511 without affecting the OS 532.

[0053] Fig. 6 shows an example of recovery processing of the BMC 511 in the server 401 of Fig. 5. The recovery processing is performed in the following procedure.

[0054] (P11) The monitoring circuit 514 periodically monitors the BMC 511 using a watchdog function.

[0055] (P12) An abnormality occurs in BMC511, causing it to hang up.

[0056] (P13) Because no response signal is received from the BMC 511 within a predetermined period, the monitor circuit 514 determines that an abnormality has occurred in the BMC 511, and outputs a first interrupt request for the BIOS 531 to the CPU 513. After that, the monitor circuit 514 periodically outputs interrupt requests for the BIOS 531 to the CPU 513.

[0057] (P14) The CPU 513 executes the interrupt processing routine 541 based on the first interrupt request from the monitor circuit 514, thereby generating an interrupt request to the OS 532. As a result, the CPU 513 requests the OS 532 to disconnect the VGA 521.

[0058] (P15) Based on an interrupt request from an interrupt processing routine 541, the CPU 513 uses the VGA driver 542 of the OS 532 to separate the VGA 521 from the CPU 513.

[0059] (P16) The CPU 513 executes the interrupt processing routine 541 based on an interrupt request periodically output from the monitor circuit 514, thereby checking whether the communication between the CPU 513 and the VGA 521 is in a link-down state.

[0060] (P17) If the communication between the CPU 513 and the VGA 521 is in a link-down state, the CPU 513 determines that the VGA 521 has been disconnected, and resets the BMC 511 to restart the BMC 511. Then, the BMC 511 resets the monitoring circuit 514 to stop outputting the interrupt request.

[0061] (P18) After being restarted, the BMC 511 outputs an interrupt request for the BIOS 531 to the CPU 513. In response to this, the BMC 511 requests the BIOS 531 to connect the VGA 521.

[0062] (P19) The CPU 513 executes the interrupt processing routine 541 based on the interrupt request from the BMC 511 to generate an interrupt request to the OS 532. As a result, the CPU 513 requests the OS 532 to connect the VGA 521.

[0063] (P20) Based on an interrupt request from an interrupt processing routine 541, the CPU 513 incorporates the VGA 521 into the PCI-E bus 522 using a VGA driver 542 of the OS 532, thereby connecting the VGA 521 to the CPU 513.

[0064] At (P16), the CPU 513 can check whether or not the communication between the CPU 513 and the VGA 521 is in a link-down state by the following procedure.

[0065] (P21) The CPU 513 acquires a list of PCI devices using commands such as lspci and PCI device info, or library functions. The PCI devices represent devices incorporated in the PCI-E bus 522.

[0066] (P22) The CPU 513 searches for the VGA 521 from the list of PCI devices.

[0067] (P23) If the list of PCI devices includes the VGA 521, the CPU 513 determines that the communication link is not down, and repeats the processing from (P21) onwards.

[0068] (P24) If the VGA 521 is not included in the list of PCI devices, the CPU 513 determines that the communication link is down.

[0069] According to the server 401 in FIG. 5, by providing a monitoring circuit 514 and an interrupt processing routine 541, it is possible to detect an abnormality in the BMC 511 and notify the OS 532, and it becomes possible to automatically recover the BMC 511 from a failure.

[0070] When performing recovery processing, there is no need for workers to go to the server room, etc. to perform the recovery work, so there is no waiting time until the recovery work can begin. In addition, there is no need to stop the server system, and since the BMC511 is actively reset, the operation of the server system can continue even during the recovery process.

[0071] 6 can be easily applied to existing server systems, since the only new hardware required is the addition of a monitoring circuit 514. In addition, the recovery process can be easily implemented by utilizing the interrupt processing of the BIOS 531 and the OS 532.

[0072] Next, the recovery process of the BMC 511 in the server 401 of Fig. 5 will be described in more detail with reference to Fig. 7A to Fig. 10D. In the following, the process performed by the CPU 513 executing the OS 532 may be described as the process performed by the OS 532. Also, the process performed by the CPU 513 executing the interrupt processing routine 541 of the BIOS 531 may be described as the process performed by the interrupt processing routine 541.

[0073] 7A to 7D are flowcharts showing an example of a first recovery process when OS 532 is operating. First, the user turns on the power of server 401 (step 701). This starts BMC 511 (step 702), and server 401 checks whether or not the start-up of BMC 511 has failed (step 703).

[0074] If the startup of the BMC 511 has failed (step 703, YES), the server 401 outputs an alarm (step 724) and ends the process. On the other hand, if the startup of the BMC 511 has been successful (step 703, NO), the BMC 511 starts managing the server 401. Then, the BMC 511 starts the monitoring circuit 514 (step 704), and checks whether the startup of the monitoring circuit 514 has failed (step 705).

[0075] If the startup of the monitoring circuit 514 fails (step 705, YES), the server 401 outputs an alarm (step 724) and ends the process. On the other hand, if the startup of the monitoring circuit 514 is successful (step 705, NO), the monitoring circuit 514 starts the watchdog function (step 706) and checks whether the startup of the watchdog function has failed (step 707).

[0076] If the start of the watchdog function has failed (step 707, YES), server 401 outputs an alarm (step 724) and ends the process. On the other hand, if the start of the watchdog function has succeeded (step 707, NO), CPU 513 starts OS 532 (step 708). This starts OS 532 (step 731), and CPU 513 checks whether the start of OS 532 has failed (step 732).

[0077] If the startup of the OS 532 fails (step 732, YES), the CPU 513 outputs an alarm (step 736) and ends the process. On the other hand, if the startup of the OS 532 is successful (step 732, NO), the CPU 513 executes the OS 532.

[0078] Next, the monitor circuit 514 transmits an inquiry signal to the BMC 511 (step 709), and checks whether or not a response signal has been received from the BMC 511 within a predetermined period (step 710). If a response signal has been received within the predetermined period (step 710, YES), the monitor circuit 514 repeats the processes from step 709 onwards.

[0079] On the other hand, if the response signal is not received within the predetermined period (step 710, NO), the monitor circuit 514 outputs an interrupt request for the BIOS 531 to the CPU 513 (step 711). The interrupt processing routine 541 started by the interrupt request for the BIOS 531 outputs an interrupt request for the OS 532 (step 712).

[0080] The OS 532 accepts the interrupt request to the OS 532 (step 733), and uses the VGA driver 542 to disconnect the VGA 521 from the PCI-E bus 522 (step 734).

[0081] Next, an interrupt processing routine 541 is started by an interrupt request periodically output from the monitoring circuit 514. The started interrupt processing routine 541 starts a timer and repeatedly determines whether or not the communication between the CPU 513 and the VGA 521 is in a link-down state for a certain period of time.

[0082] In determining whether a link has been down, the interrupt processing routine 541 obtains a list of PCI devices using a command or library function (step 713), and checks whether a timeout has occurred (step 714).

[0083] If the timeout has not occurred (step 714, NO), the interrupt processing routine 541 searches for the VGA 521 in the list of PCI devices (step 715). If the VGA 521 is included in the list of PCI devices (step 715, YES), the interrupt processing routine 541 repeats the processes from step 713 onwards.

[0084] On the other hand, if the list of PCI devices does not include the VGA 521 (step 715, NO), the interrupt processing routine 541 determines that the communication link between the CPU 513 and the VGA 521 is down, and resets the BMC 511 (step 716).Then, the server 401 checks whether the reset of the BMC 511 has failed (step 717).

[0085] If the reset of the BMC 511 has failed (step 717, YES), the server 401 outputs an alarm (step 724) and ends the process. On the other hand, if the reset of the BMC 511 has succeeded (step 717, NO), the BMC 511 resets the monitoring circuit 514 (step 718) and checks whether the reset of the monitoring circuit 514 has failed (step 719).

[0086] If the reset of the monitoring circuit 514 fails (step 719, YES), the server 401 outputs an alarm (step 724) and ends the process. On the other hand, if the reset of the monitoring circuit 514 succeeds (step 719, NO), the monitoring circuit 514 starts the watchdog function (step 720) and checks whether the start of the watchdog function has failed (step 721).

[0087] If the start of the watchdog function fails (step 721, YES), the server 401 outputs an alarm (step 724) and ends the process. On the other hand, if the start of the watchdog function is successful (step 721, NO), the BMC 511 outputs an interrupt request to the BIOS 531 to the CPU 513 (step 722). The interrupt processing routine 541 started by the interrupt request to the BIOS 531 outputs an interrupt request to the OS 532 (step 723).

[0088] Based on the interrupt request to the OS 532, the OS 532 incorporates the VGA 521 into the PCI-E bus 522 using the VGA driver 542 (step 735).

[0089] If a timeout occurs in the link-down determination (step 714, YES), the server 401 forcibly resets the BMC 511 by carrying out the processes in and after step 716.

[0090] 8A and 8B are flowcharts showing an example of the second recovery process when the OS 532 has stopped. The process from step 801 to step 823 is similar to the process from step 701 to step 707 and step 709 to step 715 in FIG. 7A and the process from step 716 to step 724 in FIG. 7B.

[0091] Unlike the first recovery process, if the start of the watchdog function is successful (step 807, NO), the OS 532 is not started and remains stopped. Therefore, if an interrupt request to the OS 532 is output from the interrupt processing routine 541 in step 811, the interrupt request becomes pending. Then, when the OS 532 is started, the pending interrupt request is cleared.

[0092] Similarly, when an interrupt request is output from the interrupt processing routine 541 to the OS 532 in step 822, the interrupt request is also made pending. Then, when the OS 532 is started, the pending interrupt request is cleared.

[0093] Since the OS 532 is stopped, the VGA 521 is not disconnected, and a timeout occurs in determining whether the link is down (step 813, YES). Therefore, the process from step 815 onwards is carried out, and the BMC 511 is forcibly reset.

[0094] 9A to 9D are flowcharts showing an example of the third recovery process when there is no response from the OS 532. The processes of steps 901 to 924 are similar to the processes of steps 701 to 715 in Fig. 7A and steps 716 to 724 in Fig. 7B. Moreover, the processes of steps 931, 932, and 934 are similar to the processes of steps 731 and 732 in Fig. 7C and step 736 in Fig. 7D.

[0095] Unlike the first recovery process, if the OS 532 is successfully started (step 932, NO), the started OS 532 hangs up (step 933) and becomes unresponsive. Therefore, if an interrupt request to the OS 532 is output from the interrupt processing routine 541 in step 912, the interrupt request becomes pending. Then, the next time the OS 532 is started, the pending interrupt request is cleared.

[0096] Similarly, when an interrupt request is output from the interrupt processing routine 541 to the OS 532 in step 923, the interrupt request is also made pending. Then, the next time the OS 532 is started, the pending interrupt request is cleared.

[0097] Since the OS 532 is hung up, the VGA 521 is not disconnected, and a timeout occurs in determining whether the link is down (YES in step 914). Therefore, the process from step 916 onwards is carried out, and the BMC 511 is forcibly reset.

[0098] 10A to 10D are flowcharts showing an example of a fourth recovery process when disconnection of the VGA 521 fails. The processes of steps 1001 to 1024 are similar to the processes of steps 701 to 715 in FIG. 7A and steps 716 to 724 in FIG. 7B. Moreover, the processes of steps 1031 to 1036 are similar to the processes of steps 731 to 734 in FIG. 7C and steps 735 and 736 in FIG. 7D.

[0099] Unlike the first recovery process, after receiving an interrupt request to the OS 532 (step 1033), the OS 532 attempts to disconnect the VGA 521 from the PCI-E bus 522 using the VGA driver 542, but fails to disconnect (step 1034). Therefore, a timeout occurs in determining whether the link is down (step 1014, YES), and the processes from step 1016 onwards are performed, whereby the BMC 511 is forcibly reset.

[0100] Thereafter, when an interrupt request is output from the interrupt processing routine 541 to the OS 532 (step 1023), the OS 532 attempts to incorporate the VGA 521 into the PCI-E bus 522 using the VGA driver 542. However, since the VGA 521 has not been detached, the OS 532 fails to incorporate the VGA 521 (step 1035).

[0101] 2 is merely an example, and some of the components may be omitted or changed depending on the use or conditions of the information processing device 201. The configuration of the server system in Fig. 4 is merely an example, and some of the components may be omitted or changed depending on the use or conditions of the server system. For example, the server system may include multiple servers, and may also include other devices such as a tape device.

[0102] The configurations of the server 101 in Fig. 1 and the server 401 in Fig. 5 are merely examples, and some of the components may be omitted or changed depending on the configuration or conditions of the server system. For example, if the server 401 in Fig. 5 does not communicate with the RAID device 402, the communication circuit 516 can be omitted.

[0103] The flowcharts of Figures 3 and 7A to 10D are merely examples, and some of the processes may be omitted or changed depending on the configuration or conditions of the server system. The recovery process of BMC 511 shown in Figure 6 is merely an example, and some of the processes may be omitted or changed depending on the configuration or conditions of the server system.

[0104] Although the disclosed embodiments and their advantages have been described in detail, it will be appreciated that those skilled in the art may make various modifications, additions and omissions therein without departing from the scope of the invention as clearly set forth in the claims.

[0105] The following notes are further disclosed regarding the embodiment described with reference to FIGS. 1 to 10D. (Appendix 1) An information processing device for processing information, a management unit that includes an image processing unit that performs image processing and manages the information processing device; a monitoring unit that monitors the management unit and outputs an abnormality detection signal when an abnormality is detected in the management unit; an information processing unit that performs the information processing and, when the abnormality detection signal is output from the monitoring unit, separates the image processing unit based on the abnormality detection signal and restarts the management unit; An information processing device comprising: (Appendix 2) the information processing unit executes a first program and a second program; the monitoring unit outputs a first interrupt request for the first program to the information processing unit as the abnormality detection signal; The information processing device according to claim 1, wherein the information processing unit generates a second interrupt request for the second program based on the first interrupt request, and separates the image processing unit based on the second interrupt request. (Appendix 3) after outputting the first interrupt request, the monitoring unit outputs a third interrupt request for the first program to the information processing unit; The information processing device described in Appendix 2, characterized in that the information processing unit checks the communication status between the information processing unit and the image processing unit based on the third interrupt request, and if the communication status is not communication possible, restarts the management unit. (Appendix 4) 4. The information processing device according to claim 2, wherein the first program is a basic input / output system, and the second program is an operating system. (Appendix 5) The information processing device described in any one of appendix 1 to 4, characterized in that the monitoring unit sends an inquiry signal to the management unit, and if it does not receive a response signal from the management unit within a predetermined period of time, it determines that an abnormality has occurred in the management unit and outputs the abnormality detection signal. (Appendix 6) Processing information, a management unit including an image processing unit for performing image processing and for managing an information processing device, the management unit being monitored by a monitoring unit, and when an abnormality in the management unit is detected by the monitoring unit and an abnormality detection signal is output, the image processing unit is separated based on the abnormality detection signal; Restart the management unit. A recovery method, comprising the steps of: executing a process by a processor; (Appendix 7) the information processing includes a process of executing a first program and a second program, the monitoring unit outputs a first interrupt request to the first program as the abnormality detection signal; The process of separating the image processing unit includes: generating a second interrupt request for the second program based on the first interrupt request; and disconnecting the image processing unit based on the second interrupt request. (Appendix 8) the monitoring unit outputs a third interrupt request to the first program after outputting the first interrupt request; The processor further executes a process of checking a communication state between the processor and the image processing unit based on the third interrupt request; 8. The recovery method according to claim 7, wherein the process of restarting the management unit includes a process of restarting the management unit when the communication state is communication impossible. (Appendix 9) 9. The recovery method according to claim 7 or 8, wherein the first program is a basic input / output system and the second program is an operating system. (Appendix 10) The recovery method according to any one of appendices 6 to 9, characterized in that the monitoring unit transmits an inquiry signal to the management unit, and if it does not receive a response signal from the management unit within a predetermined period of time, it determines that an abnormality has occurred in the management unit and outputs the abnormality detection signal. [Explanation of symbols]

[0106] 101, 401 Server 111, 511 BMC 112, 512 chipset 113,513 CPU 121, 521 VGA 122, 522 PCI-E bus 131, 531 BIOS 132, 532 OS 141, 542 VGA Driver 201 Information processing device 211 Management Department 212 Monitoring Department 213 Information Processing Department 221 Image Processing Unit 401 Server 402 RAID device 514 Monitoring circuit 515 Memory 516 Communication Circuit 541 Interrupt Processing Routine

Claims

1. An information processing device for processing information, a management unit that includes an image processing unit that performs image processing and manages the information processing device; a monitoring unit that monitors the management unit and outputs an abnormality detection signal when an abnormality is detected in the management unit; an information processing unit that performs the information processing and, when the abnormality detection signal is output from the monitoring unit, separates the image processing unit based on the abnormality detection signal and restarts the management unit; An information processing device comprising:

2. The information processing unit executes a first program and a second program, the monitoring unit outputs a first interrupt request for the first program to the information processing unit as the abnormality detection signal; 2 . The information processing apparatus according to claim 1 , wherein the information processing section generates a second interrupt request for the second program based on the first interrupt request, and separates the image processing section based on the second interrupt request.

3. after outputting the first interrupt request, the monitoring unit outputs a third interrupt request for the first program to the information processing unit; 3. The information processing device according to claim 2, wherein the information processing unit checks the communication status between the information processing unit and the image processing unit based on the third interrupt request, and if the communication status is communication impossible, restarts the management unit.

4. 4. The information processing apparatus according to claim 2, wherein the first program is a basic input / output system, and the second program is an operating system.

5. The information processing device according to any one of claims 1 to 4, characterized in that the monitoring unit transmits an inquiry signal to the management unit, and if it does not receive a response signal from the management unit within a predetermined period of time, it determines that an abnormality has occurred in the management unit and outputs the abnormality detection signal.

6. Processing information, a management unit including an image processing unit for performing image processing and for managing an information processing device, the management unit being monitored by a monitoring unit, and when an abnormality in the management unit is detected by the monitoring unit and an abnormality detection signal is output, the image processing unit is separated based on the abnormality detection signal; Restart the management unit. A recovery method, comprising the steps of: executing a process by a processor;

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