Light receiving element and optical receiving circuit

The light-receiving element with a ground pattern on the PD's bottom surface addresses electromagnetic field disturbances and crosstalk issues in optical receiver circuits, enhancing high-frequency transmission by minimizing return current detours and improving multi-channel performance.

JP7606135B2Active Publication Date: 2024-12-25NIPPON TELEGRAPH & TELEPHONE CORP
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Patent Information

Application Number
JP2023515893
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-04-19
Publication Date
2024-12-25
Estimated Expiration
2041-04-19

AI Technical Summary

Technical Problem

Conventional optical receiver circuits face issues with electromagnetic field disturbances, unnecessary resonance, radiation noise, and crosstalk due to limitations in PD implementation, particularly in multi-channel arrays, which deteriorate high-frequency transmission characteristics.

Method used

A light-receiving element with a ground pattern formed on the bottom surface of the PD, minimizing the return current path by ensuring it flows directly to the ground potential, thereby suppressing resonance and radiation noise and reducing crosstalk between channels.

Benefits of technology

The configuration achieves improved high-frequency transmission characteristics by eliminating detours in the return current path, resulting in suppressed resonance and radiation noise and reduced crosstalk, especially in multi-channel PD arrays.

✦ Generated by Eureka AI based on patent content.

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Abstract

This light-receiving element uses a configuration that minimizes the length of a return current path and achieves good high-frequency transmission characteristics. This light-receiving element has not only a straighter signal path for high-frequency electric signals processed by the light-receiving circuit but also a straighter path for a return current that returns to the ground side. The return current, which flows in the opposite direction to the high-frequency signal from the PD, flows through a ground pattern formed on the bottom surface of the PD, which abuts the ground potential of the PD sub-mount. This ground pattern on the PD bottom surface achieves flat high-frequency characteristics and, in a multichannel PD array, suppresses unnecessary resonance and radiated noise and effectively reduces inter-channel crosstalk.
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Description

[Technical field]

[0001] The present invention relates to optical communications, and more particularly to a light receiving element and an optical receiving circuit. [Background technology]

[0002] The transmission speed required for optical communication systems is increasing year by year. Along with the increase in transmission speed, there is also a growing demand for wider bandwidth for photodetectors that convert optical signals into electrical signals and for optical receiving circuits that use these. In response to this demand, in addition to technology to increase the transmission speed per channel, technology is being developed to increase the transmission speed by processing electrical signals of multiple channels in parallel and multiplexing the corresponding optical signals by wavelength division or other methods. Turning our attention to photodetectors, there is a demand for technology that receives multi-channel optical signals with a single photodetector and converts them all at once into electrical signals with a single optical receiving circuit.

[0003] The optical receiving circuit described above is composed of a photodetector, as well as a transimpedance amplifier (TIA) that converts the current signal obtained by the photodetector into a voltage signal and amplifies and outputs it. Photodiodes (PDs) are used exclusively as photodetectors for high-speed optical communications. Integration technology is also advancing in which multiple PDs are arrayed and mounted on a single PD array chip to convert multi-channel optical signals into multi-channel electrical signals. A multi-channel optical receiving circuit using a PD array chip uses a multi-channel TIA equipped with multiple input / output signal terminals, and can convert multi-channel current signals into voltage signals with a single TIA chip and amplify and output them. (Patent Document 1) FIG. 11 is a diagram showing the configuration of a back-illuminated PD for high-speed optical transmission according to the prior art. FIG. 11(a) is a top view of the element configuration surface (xy plane) of the back-illuminated PD from above, FIG. 11(b) is a view of the back side of the element configuration surface, and FIG. 11(c) is a cross-sectional view taken along the line XIc-XIc in FIG. 11(a) perpendicular to the substrate surface. Referring to FIG. 11(a), a light receiving section 15 for receiving an optical signal, an anode electrode pad 11 connected to the anode, and a cathode electrode pad 12 connected to the cathode are formed on the upper surface of the PD1. As shown in FIG. 11(c), an optical signal 2 incident from the lower surface side of the PD1 passes through the PD and is converted from an optical signal to an electric signal by the light receiving section 15 formed on the upper surface, and the electric signal is output from the anode electrode and the cathode electrode. When an optical receiving circuit is configured using the back-illuminated PD of FIG. 11, a mounting form is used in which a PD chip is mounted on a PD submount provided with a through hole, and an optical signal is incident through the through hole, as described later. Therefore, the lower surface (rear surface) of the PD1 onto which light is incident as shown in FIG. 11(b) is to be mounted on the submount, and no electrodes or the like are formed thereon.

[0004] FIG. 12 is a diagram showing an example of mounting an optical receiving circuit for high-speed transmission in the prior art. FIG. 12(a) is a top view of the side on which the PD chip and other components are mounted, and FIG. 12(b) is a cross-sectional view of the optical receiving circuit cut along line XIIb-XIIb in the top view of FIG. 12(a). The optical receiving circuit of FIG. 12 is configured on a substrate surface or the like in various forms such as a receiving device or an optical module, so the substrate serving as the base is not shown in FIG. 12. This is also true for other optical receiving circuit diagrams described later. FIG. 12 shows a mounting form of an optical receiving circuit using a PD1 that inputs a one-channel optical signal 2 and outputs a one-channel electrical signal. The optical receiving circuit is roughly composed of a PD submount 40 and a TIA carrier 42. The back-illuminated PD1 and the chip capacitor 30 are mounted on the PD submount 40 with the surface metallized. The TIA 20 is mounted on the TIA carrier 42 with the surface metallized.

[0005] The PD submount 40 is provided with a through hole 41 for allowing the optical signal 2 to be incident from the bottom surface of the PD 1. Usually, to avoid the influence of reflected light, the optical signal 2 is incident at an angle shifted from the normal direction to the PD light receiving section 15. The optimal angle varies depending on design conditions such as the optical system configuration and material of the PD, the wavelength of light, and the transmission speed handled by the PD. The mounting position of the PD 1 on the submount 40 requires a certain degree of freedom (margin) depending on the mounting conditions and manufacturing conditions. Therefore, the dimensions of the through hole 41 must be sufficiently large compared to the light receiving diameter of the PD light receiving section 15.

[0006] The TIA 20 includes a signal pad 21 for inputting an electrical signal from the PD 1, signal pads 22a, 22b for outputting a differential electrical signal to the outside, ground pads 23a to 23e, and a power supply, control, and monitor pad 24 for supplying power, controlling the operation of the TIA, and monitoring it.

[0007] A chip capacitor 30 connected to the cathode electrode pad 12 is also mounted on the PD submount 40. The chip capacitor 30 is a relay terminal that applies a DC voltage from the outside to the cathode electrode 12 of the PD 1, and operates to separate AC and DC components and prevent the AC signal from leaking to the outside.

[0008] The bonding wire 51 electrically connects the anode electrode pad 11 of the PD 1 and the input signal pad 21 of the TIA 20. The bonding wire 52 electrically connects the cathode electrode pad 12 of the PD 1 and the chip capacitor 30. The bonding wire 57 electrically connects the ground pad 23 of the TIA 20 and the ground potential of the PD submount 40.

[0009] Fig. 13 is a diagram showing another structure of a back-illuminated PD for high-speed optical transmission according to the prior art. As in Fig. 11, (a) of Fig. 13 is a top view of the element configuration surface (xy plane) of a back-illuminated PD seen from above, (b) is a view of the back side of the element configuration surface, and (c) is a cross-sectional view taken along line XIIIc-XIIIc in (a) perpendicular to the substrate surface.

[0010] The difference from the PD configuration shown in Fig. 11 is that a lens 17 is provided at a position corresponding to the light receiving section 15 on the lower surface side of the element. The lens 17 has a curvature that allows the optical signal 2 incident from the lower surface side of the element to be focused at the light receiving section. By integrating the lens 17 in the PD 1, it is possible to improve the optical coupling efficiency and prevent a decrease in mounting tolerance. Since alignment between the lens and the PD is not required, it is possible to reduce the mounting cost of the optical receiving circuit.

[0011] FIG. 14 is a diagram showing yet another configuration of a back-illuminated PD for high-speed optical transmission according to the prior art. As in FIG. 11, FIG. 14(a) is a top view of the element configuration surface (xy plane) of the back-illuminated PD seen from above, FIG. 14(b) is a view of the back side of the element configuration surface, and FIG. 14(c) is a cross-sectional view taken along line XIVc-XIVc in FIG. 14(a) perpendicular to the substrate surface. The PD shown in FIG. 14 is a PD array chip 101, in which four back-illuminated PDs 1 shown in FIG. 11 are arranged and integrated into one chip. One PD array chip 101 can convert four-channel optical signals into four-channel electrical signals. By integrating four PDs into one chip, the cost of mounting an optical receiving circuit can be reduced compared to the case of mounting four PD chips separately.

[0012] FIG. 15 is a diagram showing an example of mounting an optical receiving circuit for high-speed transmission using a PD array chip. FIG. 15(a) is a top view of the side on which the PD chip array and other components are mounted, and FIG. 15(b) is a cross-sectional view of the optical receiving circuit cut along line XVb-XVb in the top view of FIG. 15(a). In contrast to the optical receiving circuit using a single-channel PD shown in FIG. 12, FIG. 15 shows an optical receiving circuit using a PD array chip 101 that inputs multi-channel optical signals and outputs multi-channel electrical signals. The PD array 101 and chip capacitor 300 are mounted on a PD submount 400 that has a metallized surface. The TIA 200 is mounted on a TIA carrier 420 that has a metallized surface.

[0013] The PD submount 400 is provided with a large single through hole 410 that combines through holes for four channels to allow the four channels of optical signals 2 to be incident from the back surface of the PD array 101. As already described with reference to Fig. 12, the optical signals 2 are incident at an angle shifted from the normal direction to the PD light receiving section, and a certain degree of freedom is required for the mounting position of the PD array 101 on the submount 400. In addition, due to the issues of the processing accuracy of the ceramic, which is the material of the PD submount 400, and the processable through hole size, the dimensions of the end and short side of the through hole 410 must be sufficiently large relative to the light receiving diameter of the PD light receiving section.

[0014] The TIA chip 200 is a multi-channel TIA equipped with four amplifier circuits, and includes input signal pads 210, output signal pads 220a, 220b, ground pads 230a to 230e, and power supply / control / monitor pads 240 for four channels. The bonding wires 510 electrically connect the four anode electrode pads 110 of the PD array 101 to the four input signal pads 210 of the TIA 200. The bonding wires 520 electrically connect the four cathode electrode pads 120 of the PD array 101 to the four chip capacitors 300, respectively. The bonding wires 570 electrically connect the ground pads 230a, 230b of the four amplifier circuits of the TIA 200 to the ground potential surface of the PD submount 400. [Prior art documents] [Patent documents]

[0015] [Patent Document 1] Patent No. 5296838 Summary of the Invention [Problem to be solved by the invention]

[0016] However, as the transmission speed of optical communication systems increases, problems have become evident in that limitations in the mounting of PDs adversely affect the high-frequency characteristics of optical receiving circuits. In all of the above-mentioned optical receiving circuits using conventional PDs, electromagnetic field disturbances occur in the path of the high-frequency signal. The electromagnetic field disturbances of the high-frequency signal degrade the high-frequency transmission characteristics from the PD to the TIA, causing problems such as the increased likelihood of unwanted resonance and radiation noise. These problems are particularly severe in optical receiving circuits using multi-channel PD arrays. The bonding wires in optical receiving circuits function as antennas, and there has also been a problem of degradation of transmission quality due to crosstalk signals radiated from the bonding wires of adjacent channels.

[0017] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a light receiving element and an optical receiving circuit having good high frequency transmission characteristics. [Means for solving the problem]

[0018] One embodiment of the present invention is a light receiving element comprising: a light receiving portion for an optical signal configured on one surface of a substrate; an anode electrode pad connected to the anode of the light receiving portion; a cathode electrode pad connected to the cathode of the light receiving portion; and a ground pattern formed on the surface of the substrate opposite to the element configuration surface, outside an opening region located at a position corresponding to the light receiving portion. Effect of the Invention

[0019] The present invention provides a light receiving element and an optical receiving circuit that have good high-frequency transmission characteristics, suppress unnecessary resonance and radiation noise, and reduce crosstalk between channels. [Brief description of the drawings]

[0020] [Figure 1] 1 is a diagram showing a configuration of a light receiving element according to a first embodiment. [Diagram 2] 1 is a diagram showing an example of implementation of an optical receiving circuit using the light receiving element of the first embodiment. [Diagram 3] 4 is a diagram illustrating a path of a return current in the optical receiving circuit according to the first embodiment. FIG. [Figure 4] 4 is a diagram showing another configuration of the light receiving element of the first embodiment. FIG. [Diagram 5] FIG. 11 is a diagram showing a configuration of a light receiving element according to a second embodiment. [Figure 6] 11 is a diagram showing an example of implementation of an optical receiving circuit using the light receiving element of the second embodiment. FIG. [Figure 7] FIG. 11 is a diagram showing a configuration of a light receiving element according to a third embodiment. [Figure 8] FIG. 11 is a diagram showing an example of implementation of an optical receiving circuit using the light receiving element of the third embodiment. [Figure 9] 11 is a diagram illustrating a path of a return current in the optical receiving circuit according to the third embodiment. FIG. [Figure 10] 13 is a diagram showing another configuration of the light receiving element according to the third embodiment. FIG. [Figure 11] FIG. 1 is a diagram showing the configuration of a back-illuminated PD for high-speed optical transmission according to the prior art. [Figure 12] FIG. 1 is a diagram showing an example of implementation of an optical receiving circuit using a back-illuminated PD according to the prior art. [Figure 13] FIG. 1 is a diagram showing another configuration of a back-illuminated PD according to the prior art. [Figure 14] FIG. 13 is a diagram showing yet another configuration of a back-illuminated PD according to the prior art. [Figure 15] FIG. 1 is a diagram showing an example of implementation of an optical receiving circuit using a PD array chip. [Figure 16] FIG. 1 is a diagram of a return current path of an optical receiver circuit using a prior art PD. [Figure 17] FIG. 1 is a diagram of a return current path of an optical receiving circuit using a PD array chip. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] The photodetector of the present disclosure achieves good high-frequency transmission characteristics by adopting a configuration that minimizes the path of the return current. The inventors focused on the round-trip path of the high-frequency signal transmitted from the photodetector to the TIA. In the photodetector of the present disclosure, not only the signal path of the high-frequency electrical signal processed by the optical receiving circuit but also the path of the return current returning on the earth side is straightened. The return current flowing in the opposite direction to the high-frequency signal from the PD flows through the ground pattern formed on the underside of the PD, which is in contact with the ground potential of the PD submount. This ground pattern on the underside of the PD achieves good high-frequency transmission characteristics, and in particular in a multi-channel PD array, it suppresses unnecessary resonance and radiation noise and effectively reduces crosstalk between channels.

[0022] Hereinafter, first, the problems with the light receiving element of the conventional technology will be described in more detail, and then the configuration of the light receiving element of the present disclosure will be described in comparison with the configuration of the conventional technology.

[0023] FIG. 16 is a diagram for explaining the path of the return current in an optical receiver circuit using a back-illuminated PD of the prior art. In FIG. 16, the photocurrent generated in the prior art PD 1 shown in FIG. 12 and the return current corresponding to this photocurrent are shown by arrows without drawing bonding wires. The photocurrent generated from the signal light 2 in the PD light receiving section 15 flows as a high-frequency signal current 61 from the PD anode electrode pad 11 through the bonding wire 51 to the TIA input signal pad 21. In contrast to the transmission of the signal current 61 toward the TIA 20, return currents 67 and 69 flow from the TIA 20 in the opposite direction. The return currents 67 and 69 flow from the ground pads 23a and 23b through the respective bonding wires 57 into the ground potential surface of the PD submount 40.

[0024] The surface of the PD submount 40 is covered with metal (metallized) by vapor deposition of a metal film, and at least the portion on which the PD 1 is mounted and its surroundings, preferably the entire surface, are metallized. This metallized metal surface has an electrical ground potential that is the reference for the optical receiving circuit, and in this specification, the metallized metal surface is also referred to as the ground potential surface. The return currents 67 and 69 indicated by the dotted arrows on the PD submount 40 in Figure 16 flow through the above-mentioned ground potential surface.

[0025] Since the PD submount 40 has a through hole 41 through which the signal light 2 is incident directly below the PD 1, the return currents 67, 69 flow on the ground potential surface around the through hole 41. In other words, the return current is prevented from proceeding straight and flows in a detour around the through hole 41. This detour of the return current path can deteriorate the high frequency transmission characteristics and cause unnecessary resonance and radiation noise. This problem becomes even more significant in an optical receiving circuit that uses a multi-channel PD array.

[0026] Fig. 17 is a diagram for explaining the path of the return current in an optical receiving circuit using a back-illuminated PD array of the prior art. In Fig. 17, the photocurrents generated in the four channels 601 to 604 in the prior art PD array 101 shown in Fig. 15 and the return currents corresponding to these photocurrents are shown by arrows without drawing bonding wires. The photocurrents generated from the signal light 2 in the light receiving sections 150 of the four PDs flow as signal currents 610 from the PD anode electrode pad 110 through the bonding wires 510 to the TIA input signal pad 210. Return currents 691 to 694 flow from the TIA 200 in the opposite directions to the transmission of the four high-frequency signal currents 610 toward the TIA 200.

[0027] Focusing on the channel 601 on the left side of the TIA chip in Fig. 17, a return current 691 flows from the ground pads 230a, 230b through the bonding wire 570 into the ground potential surface of the PD submount 400. The return current 691 makes a detour around the left end of the through-hole 410 of the PD submount 400 and flows on the ground potential surface. As for the channel 604 on the right side in Fig. 17, the return current 694 detours around the right end of the through-hole 410 in a left-right symmetrical manner to the return current 691 and flows on the ground potential surface.

[0028] Focusing on the channel 602 on the inner side of FIG. 17, the return current 692 flows from the ground pads 230a and 230b through the bonding wire 570 into the ground potential surface of the PD submount 400. The return current 692 flows around the ground potential surface of the PD submount 400 from the bonding wire connection point along the longitudinal direction of the through hole, and further around the left end of the through hole. Compared to the channel 601 located near the periphery of the PD array chip, the degree of detouring of the return current of the channel 602 located on the inner side of the chip is significant. If the number of PDs in the PD array chip increases, a current loop with a large opening will be formed by the signal current path from the chip capacitor 300, which is the ground reference point for the high-frequency signal, to the signal pad 210 and the return current path. The problem of detouring the return current is particularly serious in the PD array chip.

[0029] Due to the ceramic processing accuracy, it is difficult to form a structure in which four separate small through holes are arranged for each channel instead of a single through hole 410 in the PD submount 400. As shown in FIG. 17, a structure in which the through holes for four channels are combined into one large hole must be adopted. As described above, in the channels on the inner side (center side) of the chip of a multi-channel optical receiving circuit, the detour distance of the return current becomes large. For this reason, in the optical receiving circuit using the PD array chip of the conventional technology, the high-frequency transmission characteristics deteriorate significantly, especially in the inner channels, and unwanted resonance and radiation noise are easily generated.

[0030] Resonance occurring in the signal transmission path between the PD and the TIA can cause reflection or absorption of energy at a specific frequency in the detection output from the PD. In other words, the transfer characteristics of a specific frequency can suddenly deteriorate (attenuate), or conversely, a specific frequency can be excited and have a spike-like peak. In addition, a peak signal in one channel can act as noise on other channels. The bypass of the return current causes such degradation of high-frequency transmission characteristics.

[0031] In addition, in an optical receiving circuit using a multi-channel PD array as shown in Figure 15, the distance between adjacent channels becomes as close as the length of the bonding wire (for example, about 0.5 mm). The bonding wire functions as a transmitting antenna and a receiving antenna. If unwanted resonance or radiation noise occurs in a certain channel, the electromagnetic waves radiated from the bonding wire of that channel are likely to be picked up by the bonding wire of the adjacent channel. Signals leaking from adjacent channels are superimposed on the signal of the channel itself, making it susceptible to the effects of so-called crosstalk. For example, for a signal with a transmission speed of about 10 Gbaud or more, the 1 / 4 wavelength in free space is about the same length as the bonding wire length or shorter. In this way, there was a problem that the bonding wire functions as an antenna, and crosstalk from adjacent channels deteriorates the transmission quality. The configurations of the light receiving element and the optical receiving circuit according to the present disclosure, as well as the high-frequency signal and the corresponding return current, will be described below.

[0032] [Embodiment 1] Fig. 1 is a diagram showing the configuration of a light receiving element of embodiment 1. As in Fig. 11, it shows a back-illuminated PD 10, where (a) is a top view of the component surface (xy plane) of the light receiving element seen from above, (b) is a rear view of the back side of the component surface, and (c) is a cross-sectional view taken along line Ic-Ic in (a) perpendicular to the substrate surface.

[0033] On the upper surface of the PD10, which is a light receiving element for high-speed optical communication, a light receiving section 15 for receiving an optical signal, an anode electrode pad 11 connected to the anode, and a cathode electrode pad 12 connected to the cathode are formed. As shown in (c), an optical signal 2 incident from the lower surface side of the PD10 passes through the inside of the PD and is converted from an optical signal to an electric signal by the light receiving section 15 formed on the upper surface. The electric signal is output from the anode electrode and the cathode electrode. As will be described later, the cathode electrode is grounded via a chip capacitor, so that a high-frequency signal current is taken out from the anode side to the outside. As in FIG. 11, when an optical receiving circuit is configured with the back-illuminated PD10, a mounting form is used in which a PD chip is mounted on a PD submount with a through hole and an optical signal is incident through the through hole. The light receiving element 10 of this embodiment is different from the configuration of the conventional technology in that a ground pattern 18 is formed on the entire lower surface of the PD except for the opening region 16 where the optical signal is incident.

[0034] In the back-illuminated PD 10 shown in FIG. 1, the optical signal is incident from the opposite side of the element configuration surface (the lower surface of the PD) where the light receiving section and electrode pads are formed on the PD chip. Therefore, there is no need to input or output other signals on the lower surface of the PD, which becomes an obstacle to mounting the PD on the PD submount. Even if a signal pad or the like is formed, the chip structure becomes complicated and the chip manufacturing cost increases. Therefore, no element elements or electrodes are formed on the lower surface of the PD, and the substrate material of the PD chip is exposed as it is. The inventors came up with the idea of ​​forming a ground pattern on the lower surface of the PD, which has not been used until now, and using it as a return current path. The substrate material of the PD is usually a semiconductor, and it is a simple process to vapor-deposit a metal film or the like on the surface of the semiconductor to metallize the surface. A thin metal film is sufficient to form an earth potential for high-frequency current. In addition, the ground pattern on the lower surface of the PD does not affect the process of mounting the PD on the PD submount.

[0035] Therefore, the light receiving element 10 of the present disclosure can be implemented as including a light receiving portion 15 for an optical signal, which is configured on one surface of a substrate, an anode electrode pad 11 connected to the anode of the light receiving portion, a cathode electrode pad 12 connected to the cathode of the light receiving portion, and a ground pattern 18 formed on the surface of the substrate opposite to the surface on which the element is configured, outside an opening region 16 located at a position corresponding to the light receiving portion. This ground pattern 18 can be formed on the entire surface of the opposite surface, excluding the opening region.

[0036] FIG. 2 is a diagram showing an example of mounting an optical receiving circuit using the light receiving element of the first embodiment. FIG. 2(a) is a top view of the side where the PD chip and other components are mounted, and FIG. 2(b) is a cross-sectional view of the optical receiving circuit cut along line IIb-IIb in the top view of FIG. 2(a). The optical receiving circuit of FIG. 2 is mounted and configured on a substrate surface or the like in various forms such as an optical receiving device or an optical receiving module, so the substrate serving as the base is not shown in FIG. 2. In the optical receiving circuit of FIG. 2, a mounting form of a PD 10 that inputs a one-channel optical signal 2 and outputs a one-channel electrical signal is shown. The optical receiving circuit is roughly divided into two parts, a PD submount 40 and a TIA carrier 42. The back-illuminated PD 10 and the chip capacitor 30 are mounted on the PD submount 40 with the surface metallized. The TIA 20 is mounted on the TIA carrier 42 with the surface metallized.

[0037] The PD submount 40 is provided with a through hole 41 for allowing the optical signal 2 to be incident from the bottom surface of the PD 10. Usually, to avoid the influence of reflected light, the optical signal 2 is incident at an angle shifted from the normal direction to the PD light receiving section 15. As described in the prior art, the optimal incident angle varies depending on design conditions such as the optical system configuration and material of the PD, the wavelength of light, and the transmission speed handled by the PD, and a certain degree of freedom is required for the mounting position of the PD 10. Therefore, the dimensions of the through hole 41 must be sufficiently large compared to the light receiving diameter of the PD light receiving section 15.

[0038] The respective arrangements and connection configurations on the TIA 20 and the PD submount 40 are the same as those of the conventional optical receiving circuit described in Fig. 12, and detailed description thereof will be omitted. The difference in configuration between the conventional optical receiving circuit of Fig. 12 and the optical receiving circuit of Fig. 2 using the light receiving element of the first embodiment is that a ground pattern 18 is formed on the bottom surface of the PD 10, i.e., the surface that comes into contact with the PD submount 40, except for the opening region 16.

[0039] FIG. 3 is a diagram for explaining the path of the return current in the optical receiving circuit using the light receiving element of the first embodiment. In FIG. 3, the photocurrent generated in the light receiving element of the first embodiment shown in FIG. 2 and the return current corresponding to this photocurrent are indicated by arrows without drawing bonding wires. The photocurrent generated from the signal light 2 in the PD light receiving unit 15 flows as a high-frequency signal current 61 from the PD anode electrode pad 11 through the bonding wire 51 to the TIA input signal pad 21. The cathode electrode pad 12 is grounded to the ground potential surface of the PD submount 40 in a high-frequency manner through the chip capacitor 30. A return current flows from the TIA 20 in the opposite direction to the transmission of the signal current 61 toward the TIA 20. The return currents 67a and 67b flow from the ground pads 23a and 23b through the respective bonding wires 57 into the ground potential surface of the PD submount 40.

[0040] The return currents 67a and 67b flowing from the bonding wire 57 flow as return currents 68a and 68b through the ground pattern 18 formed on the underside of the PD 10, which is in contact with the ground potential surface of the PD submount 40. The difference is clear when compared with the return currents 69a and 69b of the conventional optical receiving circuit that bypasses the through hole 41 shown in FIG. 17. In FIG. 3, the return currents 68a and 68b flowing through the ground pattern 18 on the underside of the PD reach the ground potential surface of the chip capacitor 30 in the shortest distance without bypassing. The signal current and the return current each flow in the shortest distance to form a current loop with the smallest opening. By eliminating the bypass of the return current that occurred at the through hole 41 with the ground pattern 18 on the underside of the PD, unnecessary resonance and radiation noise due to disturbance of the electromagnetic field of the high-frequency transmission line are suppressed, and flat high-frequency transmission characteristics are obtained.

[0041] Therefore, the present invention can also be implemented as an optical receiving circuit comprising a subcarrier 40 having a metallized surface, a photodetector 10 on the subcarrier, the photodetector comprising an optical signal receiving section 15 arranged on one side of a substrate, an anode electrode pad 11 connected to the anode of the photodetector, a cathode electrode pad 12 connected to the cathode of the photodetector, and a ground pattern 18 formed outside an opening region 16 located at a position corresponding to the photodetector on the side opposite to the element configuration side of the substrate, and a transimpedance amplifier 20 having a signal input pad 21 electrically connected to the anode electrode pad and ground pads 23a, 23b electrically connected to the metallized ground surface of the subcarrier, and in which return currents flow from the ground pad through paths 68a, 68b including the ground patterns in response to signal currents 61, 62 flowing from the cathode electrode pad to the signal input pad.

[0042] In the light receiving element of the first embodiment of the present disclosure, a configuration is shown in which an opening region 16 is opened concentrically at a position corresponding to the light receiving section 15 on the underside of the PD 10, and the entire surface except the opening region 16 is made into a ground pattern. If the detouring of the return current caused by the through hole is eliminated and the paths of the return currents 68a and 68b are secured so as to be the shortest paths as shown in Fig. 3, the disturbance of the electromagnetic field of the high frequency transmission line is eliminated. Therefore, the configuration of the ground pattern on the underside of the PD 10 is not limited to that shown in Fig. 1.

[0043] FIG. 4 is a diagram showing a configuration of the light receiving element of the first embodiment with another ground pattern. FIG. 4(a) is a top view of the light receiving element's configuration surface (xy plane) seen from above, FIG. 4(b) is a rear view of the back side of the configuration surface, and FIG. 4(c) is a cross-sectional view taken along the IVc-IVc line in FIG. 4(a) perpendicular to the substrate surface. The only difference from the configuration of the PD in FIG. 1 is the shape of the ground pattern 19 on the bottom surface of the PD. As shown in FIG. 4(b), the detouring of the return current path can also be eliminated by providing band-shaped partial ground patterns 19a, 19b that connect the ends of the PD chip in a bridge shape roughly parallel to the line connecting the anode electrode 11 and the cathode electrode 12. Referring to the configuration of the optical receiving circuit in FIG. 3, the direction of the signal currents 62, 61 flows along the straight line connecting the anode electrode pad 11, the light receiving unit 15, and the cathode electrode pad 12. If there is a ground pattern on the bottom surface of the PD so that the return current is also parallel or opposite to the flow of the signal current, the current loop can be minimized and shortened. In this regard, it is preferable that the anode electrode pad 11, the light receiving portion 15 and the cathode electrode pad 12 are arranged in as straight a line as possible.

[0044] Therefore, the light receiving element of the present disclosure can be implemented with the anode electrode pad 11, the light receiving portion 15, and the cathode electrode pad 12 arranged along a straight line, and the ground pattern having strip shapes 19a, 19b parallel to the straight line on both sides of the opening region. The anode electrode pad 11, the light receiving portion 15, and the cathode electrode pad 12 may be arranged generally on a straight line, and the signal current and the return current may be linearly arranged to form a minimum current loop as shown in FIG.

[0045] Normally, a back-illuminated PD is fixed onto a surface-metallized PD submount using a conductive adhesive, solder, etc. As shown in Fig. 4(b), by providing a gap between the ground patterns 19a, 19b and the opening region 16, it is possible to prevent the conductive adhesive, solder, etc. from flowing into the opening region 16.

[0046] [Embodiment 2] Fig. 5 is a diagram showing the configuration of a light receiving element of embodiment 2. Fig. 5(a) is a top view of the configuration surface (xy plane) of the light receiving element as seen from above, (b) is a rear view of the reverse side of the configuration surface, and (c) is a cross-sectional view taken along line Vc-Vc in (a) perpendicular to the substrate surface. The configuration and operation of outputting an electrical signal from an optical signal 2 is the same as that of the light receiving element 10 of embodiment 1 shown in Fig. 1, and only differences from the configuration in Fig. 1 will be described.

[0047] 1, a lens 17 having a curvature that focuses the incident optical signal 2 at the light receiving section 15 is formed in a region corresponding to the aperture region on the lower surface of the PD 10. A ground pattern 18 is formed on the entire lower surface of the PD 10 except for the lens 17. In short, the lens 17 is formed on the lower surface of the PD substrate at the position of the aperture region 16 in FIG.

[0048] FIG. 6 is a diagram showing an example of mounting an optical receiving circuit using the light receiving element of the second embodiment. FIG. 6(a) is a top view of the side where the PD chip and other components are mounted, and FIG. 6(b) is a cross-sectional view of the optical receiving circuit cut along the line VIb-VIb in the top view of FIG. 6(a). The respective arrangements on the TIA 20 and the PD submount 40 and the mutual connection configuration are the same as those of the conventional optical receiving circuit described in FIG. 12, and detailed explanations will be omitted. The difference in configuration between the conventional optical receiving circuit of FIG. 12 and the optical receiving circuit using the light receiving element of the second embodiment is that a ground pattern 18 is formed on the lower surface of the PD 10, i.e., the surface on the side that contacts the PD submount 40, except for the area where the lens 17 is formed. In the first embodiment, the ground pattern 18 is simply an opening area 16, whereas in the present embodiment, the same area is a lens 17. Except for this, the optical receiving circuits of the second embodiment shown in FIG. 6 and the first embodiment shown in FIG. 2 are configured in the same form.

[0049] The light receiving element of this embodiment also has the same shortest return current path as the return current in the first embodiment shown in Fig. 3. That is, a high-frequency signal current 61 generated in the light receiving section 15 of the PD 10 flows from the PD anode electrode pad 11 to the TIA input signal pad 21 via the bonding wire 51. A return current flows from the TIA 20 in the opposite direction to the transmission of the signal current 61 toward the TIA 20. The return currents 67a and 67b flow from the ground pads 23a and 23b to the ground potential surface of the PD submount 40 via the respective bonding wires 57.

[0050] The return currents 67a and 67b flowing from the bonding wire 57 further flow as return currents 68a and 68b through the ground pattern 18 formed on the underside of the PD 10, which contacts the ground potential surface of the PD submount 40. The return current flowing through the ground pattern 18 around the lens 17 on the underside of the PD in FIG. 5 reaches the ground potential surface of the chip capacitor 30 in the shortest distance without detouring, as shown in FIG. 3. The signal current and the return current each flow in the shortest distance to form a current loop with the smallest opening. By eliminating the detouring of the return current that occurs at the through hole 41 by the ground pattern 18 around the lens 17 on the underside of the PD, unnecessary resonance and radiation noise due to disturbance of the electromagnetic field of the high-frequency transmission line are suppressed, and flat high-frequency transmission characteristics are obtained.

[0051] Furthermore, in this embodiment, by integrating the lens 17 in the PD 10, the optical coupling efficiency between the signal light and the light receiving section can be improved and a decrease in mounting tolerance (tolerance of mounting position) can be prevented. Furthermore, by integrating the lens, which is not shown in the optical receiving circuit in Fig. 2, with the light receiving element in advance, alignment work between the lens and the PD 10 is not required, and the mounting cost can be reduced compared to the optical receiving circuit of the first embodiment.

[0052] In this embodiment, an opening area 16 is formed on the underside of the PD 10, in which the metal of the ground pattern is removed in a concentric circle with the light receiving portion 15, in the same shape as the lens 17. That is, the entire surface of the ground pattern 18 is metallized except for the opening area 16 on the underside of the PD 10. If the detouring of the return current caused by the through holes is eliminated as shown in FIG. 3 and the shortest path of the return current is secured, the disturbance of the electromagnetic field of the high frequency transmission line is eliminated. Therefore, the configuration of the ground pattern on the underside of the PD is not limited to that shown in FIG. 5. The ground pattern shown in FIG. 4 can be modified, and partial ground patterns 19a and 19b connected in a bridge shape may be used.

[0053] The above-mentioned embodiments have been described with respect to a single-channel photodetector that receives a single-channel optical signal and outputs a single-channel electrical signal. The photodetector configuration of the present disclosure can be applied to a PD array chip that receives multiple channels of optical signals and outputs corresponding electrical signals, thereby achieving even better high-frequency transmission characteristics.

[0054] [Embodiment 3] Fig. 7 is a diagram showing the configuration of a light receiving element of embodiment 3. Fig. 7(a) is a top view of the configuration surface (xy plane) of the light receiving element seen from above, (b) is a rear view of the back side of the configuration surface, and (c) is a cross-sectional view taken along line VIIc-VIIc in (a) perpendicular to the substrate surface. The light receiving element of this embodiment is a PD array 100, which is obtained by integrating four back-illuminated PDs 10 shown in Fig. 1 into one chip.

[0055] Each PD has a light receiving section 150, an anode electrode pad 110, and a cathode electrode pad 120, and four PDs of the same configuration are arrayed. An optical signal 2 incident from the lower surface side of the PD array 100 passes through the PD and is converted from an optical signal to an electric signal by the light receiving section 150 formed on the upper surface, and the electric signal is output from the anode electrode and the cathode electrode. The difference from the conventional PD array 101 shown in FIG. 15 is that an integrated ground pattern 180 is formed on the entire lower surface of the PD array 100 except for four opening regions 160 into which optical signals are incident.

[0056] Fig. 8 is a diagram showing an example of mounting an optical receiving circuit using the PD array chip of the third embodiment. Fig. 8(a) is a top view of the side on which the PD chip array and other components are mounted, and Fig. 8(b) is a cross-sectional view of the optical receiving circuit cut along line VIIIb-VIIIb in the top view of (a). This optical receiving circuit inputs four-channel optical signals 2 and outputs four-channel electrical signals. The PD array 100 and chip capacitor 300 are mounted on a PD submount 400 whose surface is metallized. The TIA 200 is mounted on a TIA carrier 420 whose surface is metallized.

[0057] The PD submount 400 is provided with a large through hole 410 that is integrated into one in order to allow four channels of optical signals to be incident from the back surface of the PD array 100. As described in FIG. 2 for the optical receiving circuit of the single light receiving element of the first embodiment, the optical signal 2 is incident at an angle shifted from the normal direction to the PD light receiving section 150 in order to avoid the influence of reflected light. The optimal incident angle varies depending on design conditions such as the optical system configuration and material of the PD, the wavelength of light, and the transmission speed handled by the PD, and a certain degree of freedom is required for the mounting position of the PD array 100. In addition, due to the processing accuracy of the ceramic material that is the material of the PD submount 400 and the problem of the size of the hole that can be processed, the dimensions of the end and short side of the through hole 410 must be sufficiently large compared to the light receiving diameter of the PD light receiving section.

[0058] The TIA chip 200 is a multi-channel TIA equipped with four amplifier circuits, has the same configuration as the conventional TIA described in Fig. 15, and is electrically connected to the PD array 100 as in the conventional technology. The difference between the optical receiving circuit of the conventional technology in Fig. 15 and the optical receiving circuit of this embodiment is that a ground pattern 180 is formed on the entire bottom surface of the PD array 100, i.e., the surface that comes into contact with the PD submount 400, except for four opening regions 160 into which the optical signal 2 is incident.

[0059] FIG. 9 is a diagram for explaining the path of the return current in the optical receiving circuit using the PD array of the third embodiment. In FIG. 9, the photocurrents generated in the four channels 601 to 604 in the PD array 100 of the third embodiment shown in FIG. 8 and the return currents corresponding to these photocurrents are shown by arrows without drawing bonding wires. The photocurrents generated from the signal light 2 in each PD light receiving unit 150 of the four PDs flow as signal currents 610 from the PD anode electrode pad 110 through the bonding wires 510 to the TIA input signal pad 210. The cathode electrode pad 120 is grounded to the ground potential surface of the PD submount 40 in a high-frequency manner via the chip capacitor 300. The return currents flow from the TIA 200 to the PD in the opposite directions to the transmission of the four high-frequency signal currents 610 toward the TIA 200.

[0060] In the optical receiving circuit using the PD array 100 of the third embodiment, the return current flows linearly and over the shortest distance in each of the four channels 601 to 604 of the TIA chip 200, which is significantly different from the conventional optical receiving circuit shown in FIG. 17. For example, when focusing on the channel 604 at the right end of FIG. 9, the return currents 670a and 670b flow from the ground pads 230a and 230b through the respective bonding wires 570 into the ground potential surface of the PD submount 400. The return currents 670a and 670b that flow from the bonding wires 570 first flow into the ground potential surface of the PD submount 400. Furthermore, they flow linearly as return currents 680a and 680b through the ground pattern 180 formed on the lower surface of the PD 100 that contacts the ground potential surface.

[0061] In comparison with the return current 694 that bypasses the through hole 410 in the conventional optical receiving circuit shown in FIG. 17, the return currents 680a and 680b that flow through the ground pattern 180 on the underside of the PD in FIG. 9 travel straight through the shortest distance without detouring, and reach the ground potential surface directly below the chip capacitor 300. The signal current and the return current each flow through the shortest distance to form a current loop with the smallest opening. The return current also flows through the other channels 602 and 603 on the inside side of the PD array chip so as to form a current loop with the shortest distance and the smallest opening, just like the channel 604. This is in stark contrast to the return current 693 that largely bypasses the through hole in the channels 602 and 603 on the inside side of the PD array chip in FIG. 17. By eliminating the extreme detouring of the return current that occurs due to the through hole 410 with the ground pattern 180 on the underside of the PD, unnecessary resonance and radiation noise due to disturbances in the electromagnetic field of the high-frequency transmission line are suppressed, and flat and excellent high-frequency transmission characteristics are obtained.

[0062] In the inner (center) channels of the optical receiving circuit including multiple channels, the amount of detouring of the return current path was large in the conventional technology without the ground pattern 180 as shown in FIG. 17. In the optical receiving circuit of this embodiment, the effect of improving the high-frequency transmission characteristics is large due to the elimination of the detouring of the return current in the inner (center) channels of the optical receiving circuit. Furthermore, in the channels on the inner side of the multi-channel optical receiving circuit, crosstalk from both channels is superimposed compared to the outer channels at the edge of the chip. Therefore, the amount of degradation of the transmission quality due to crosstalk is large in the channels on the inner side of the chip. In the multi-channel optical receiving circuit of this embodiment, the return current flows equally in all channels, so that the transmission quality can be significantly improved in the inner channels of the multi-channel optical receiving circuit.

[0063] Specifically, in the transmission characteristics of a 4-channel optical receiving circuit using the conventional PD array shown in Fig. 15, the ratio (crosstalk) of the self-channel signal in the inner channels 602-603 to the leakage signal from the adjacent channel was about 25 dB at 10 GHz. In contrast, in the optical receiving circuit of the third embodiment using a light receiving element having a ground pattern on the underside of the PD array shown in Fig. 8, the crosstalk was about 50 dB at 10 GHz. Compared to the optical receiving circuit of the conventional technology, in the optical receiving circuit of the third embodiment, a significant improvement of 25 dB in the crosstalk in the channels on the inside of the chip was confirmed.

[0064] In the light receiving element of the third embodiment of FIG. 7, the entire surface of each of the four light receiving sections 150 is made of a metal ground pattern, leaving a concentric circular opening region 160 at a position corresponding to the light receiving section. If the detouring of the return current caused by the through hole can be eliminated and the return current path can be secured to be the shortest path, the disturbance of the electromagnetic field of the high frequency transmission line can be eliminated. Therefore, the configuration of the ground pattern on the lower surface of the PD array is not limited to that of FIG. 7. For example, the shape of the opening region of the ground pattern does not necessarily have to be concentric, and any shape is acceptable as long as an opening required for the incident light is obtained. The ground pattern does not necessarily have to be the entire surface except for the opening region.

[0065] Fig. 10 is a diagram showing another configuration of the light receiving element of the third embodiment. Fig. 10(a) is a top view of the configuration surface (xy plane) of the light receiving element seen from above, (b) is a rear view of the back side of the configuration surface, and (c) is a cross-sectional view taken along the Xc-Xc line in (a) perpendicular to the substrate surface. The light receiving element of the modified example of Fig. 10 is a PD array 100, and has substantially the same configuration as the PD array shown in Fig. 7. The difference from the PD array in Fig. 7 is that the ground patterns on the lower surface of the PD array are formed in strips 190a and 190b on both sides of the opening region 160, which are parallel to the straight lines connecting the anode electrode pad, the light receiving element, and the cathode electrode pad.

[0066] The strip-shaped ground patterns 190a, 190b connecting both sides of the PD array chip, which are parallel to the straight line connecting the above-mentioned element elements, form a linear return current path from the TIA chip to the chip capacitor via the PD submount and PD array. By providing partial ground patterns 190a, 190b that connect both sides of the PD array chip in a bridge shape on the underside of the PD array, the detouring of the return current path is eliminated. Normally, a conductive adhesive, solder, or the like is used to fix a back-illuminated PD on a PD submount with a metallized surface. By providing a gap between the ground patterns 190a, 190b and the opening region 160 as shown in FIG. 10, it is possible to prevent the conductive adhesive, solder, or the like from flowing into the opening region 160.

[0067] In the light receiving element of the third embodiment, a four-element (four-channel) light receiving element that converts four-channel optical signals into four-channel electrical signals has been described as an example, but there is no limitation on the number of light receiving elements provided in the PD array. As long as one large through-hole is provided for multiple channels of the PD array, the bypass of the return current is a common problem for PD arrays regardless of the number of channels. If the number of light receiving elements is two or more, the problem of the bypass of the return current can be solved by providing a ground pattern on the bottom surface of the PD array.

[0068] As described above in detail, the photodetector and optical receiving circuit of the present disclosure realize excellent high-frequency transmission characteristics. In a multi-channel PD array, unnecessary resonance and radiation noise are suppressed, and crosstalk between channels is effectively reduced. [Industrial Applicability]

[0069] The present invention can be used in optical communications.

Claims

1. A light receiving element, configured on one side of the substrate, A light receiving unit for an optical signal; an anode electrode pad connected to the anode of the light receiving unit; a cathode electrode pad connected to the cathode of the light receiving unit; a ground pattern formed on a surface of the substrate opposite to the element configuration surface, the ground pattern having a center at an intersection with a normal line of the element configuration surface passing through the center of the light receiving portion, the ground pattern being formed outside an opening region into which light to be focused on the light receiving portion can be incident; Equipped with the anode electrode pad, the light receiving portion, and the cathode electrode pad are arranged along a straight line; The light-receiving element, wherein the ground pattern has a strip shape parallel to the straight line on both sides of the opening region.

2. 2. The light receiving element according to claim 1, wherein the optical signal incident on the opening region is transmitted through the inside of the substrate and received by the light receiving portion.

3. 3. The light-receiving element according to claim 1, wherein a lens is formed in the opening region.

4. 4. The light-receiving element according to claim 1, wherein the light-receiving portion, the anode electrode pad, and the cathode electrode pad constitute a unit element, and a plurality of the unit elements are arranged.

5. An optical receiving circuit, comprising: a surface metallized subcarrier; A photodetector on the subcarrier, configured on one side of the substrate, A light receiving unit for an optical signal; an anode electrode pad connected to the anode of the light receiving unit; a cathode electrode pad connected to the cathode of the light receiving unit; a ground pattern formed on a surface of the substrate opposite to the element configuration surface, the ground pattern having a center at an intersection with a normal line of the element configuration surface passing through the center of the light receiving portion, the ground pattern being formed outside an opening region into which light to be focused on the light receiving portion can be incident; and a signal input pad electrically connected to the anode electrode pad; and a ground pad electrically connected to the metallized ground plane of the subcarrier; Transimpedance Amplifier Equipped with An optical receiving circuit, characterized in that, for a signal current flowing from said cathode electrode pad to said signal input pad, a return current flows from said ground pad through a path including said ground pattern.

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