DC Circuit Breaker

Abstract

To handle an accident current of a DC bus by one DC circuit breaker.SOLUTION: A control unit (30) of a DC circuit breaker (1) includes: a first AD converter for a current and a second AD converter for a current that perform AD conversion of a current value flowing in a semiconductor cutoff unit (10) to derive a first digital current value and a second digital current value, respectively; and an AD converter for a voltage that performs AD conversion of a voltage value applied to a capacitor of a PN clamper (20) to derive a digital voltage value. The first AD converter for the current has higher AD conversion speed and lower resolution than the second AD converter for the current. When the first digital current value is equal to or greater than a fault current threshold value, the control unit (30) cuts off a main switch element of the semiconductor cutoff unit (10). When the digital voltage value is equal to or greater than a bypass voltage threshold value, the control unit conducts a bypass switch element of the PN clamper (20). When the first digital current value is less than an operation mode determination current threshold value, the control unit controls a surge energy consumption circuit of the PN damper (20) according to the second digital current value.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One aspect of the present invention relates to a DC circuit breaker. [Background technology]

[0002] Various technologies for DC circuit breakers have been proposed to deal with electrical abnormalities that occur when a DC bus (DC line) fails. As an example, Non-Patent Document 1 proposes a DC power transmission system in which a pair of DC circuit breakers are provided in the front and rear stages of a DC bus.

[0003] In Non-Patent Document 1, the DC circuit breaker located in front of the DC bus (DC circuit breaker on the primary side) is referred to as DC circuit breaker A, and the DC circuit breaker located in the rear of the DC bus (DC circuit breaker on the secondary side) is referred to as DC circuit breaker B. Non-Patent Document 1 proposes a method of bypassing the fault current by turning off (breaking, opening) DC circuit breaker A and turning on (conducting) DC circuit breaker B. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Kenichiro Sano, Masahiro Takasaki, DC transmission system using self-excited voltage converter capable of eliminating DC line faults using semiconductor DC circuit breakers, Research Report of the Central Research Institute of the Electric Power Industry, Research Report: R11018, May 2012 Summary of the Invention [Problem to be solved by the invention]

[0005] As described above, in the conventional technology, it is necessary to provide two DC circuit breakers (DC circuit breakers A and B) to handle a fault current in a DC line. This can complicate the configuration of a DC power transmission system. In view of the above, an object of one aspect of the present invention is to handle a fault current in a DC bus bar by using one DC circuit breaker. [Means for solving the problem]

[0006] In order to solve the above problem, a DC circuit breaker according to one aspect of the present invention is a DC circuit breaker arranged in a front stage of a DC bus composed of a main line and a return line, and includes an overcurrent interruption unit connected in series with the main line, an overvoltage protection circuit connected to a first node connected to the main line and a second node connected to the return line, and a control unit that controls the overcurrent interruption unit and the overvoltage protection circuit, the overvoltage protection circuit includes a bypass switch element and a capacitor connected in parallel with the bypass switch element, the overcurrent interruption unit includes a main switch element and a surge energy consumption circuit connected in parallel with the main switch element, the DC circuit breaker further includes a current sensor that detects a current value flowing through the overcurrent interruption unit as an analog value, and a voltage sensor that detects a voltage value applied to the capacitor as an analog value, the control unit includes a first current AD converter that derives a first digital current value by AD converting the current value detected by the current sensor, and a second current AD converter that converts the current value detected by the current sensor into an analog value. and a second current AD converter that derives a second digital current value by AD converting a current value detected by the voltage sensor, and a voltage AD converter that derives a digital voltage value by AD converting the voltage value detected by the voltage sensor, wherein the first current AD converter has a higher AD conversion speed than the second current AD converter and the second current AD converter has a higher resolution than the first current AD converter, and the control unit turns off the main switch element when the first digital current value is equal to or higher than a fault current threshold, turns on the bypass switch element when the digital voltage value is equal to or higher than a bypass voltage threshold, turns on the surge energy consumption circuit continuously until the first digital current value falls below a conduction stop current threshold that is smaller than the operation mode determination current threshold when the first digital current value is equal to or higher than an operation mode determination current threshold, and turns on the surge energy consumption circuit intermittently in accordance with the second digital current value when the first digital current value is less than the operation mode determination current threshold. Effect of the Invention

[0007] According to one aspect of the present invention, a fault current in a DC line can be handled by a single DC circuit breaker. [Brief description of the drawings]

[0008] [Figure 1] 1 is a diagram showing an overview of a DC power transmission system having a DC circuit breaker according to a first embodiment. [Diagram 2] FIG. 1 is a diagram illustrating an example of the configuration of a PN clamper in a DC circuit breaker. [Diagram 3] 1 is a diagram illustrating a configuration of a semiconductor breaker in a DC breaker; [Figure 4] 2 is a diagram illustrating a configuration example of a control unit in a DC circuit breaker. FIG. [Diagram 5] 10A to 10C are diagrams illustrating an example of time changes in each voltage corresponding to time changes in bus current and the operation of each switch element. [Figure 6] 10A to 10C are diagrams illustrating an example of time changes in each voltage corresponding to time changes in bus current and the operation of each switch element. [Figure 7] FIG. 11 is a diagram illustrating an example of a control technique for SW1 and SW2 in a chopper control mode. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] [Embodiment 1] The DC power transmission system 1000 (particularly the DC circuit breaker 1) of the first embodiment will be described below. For convenience of explanation, the same reference numerals will be given to components having the same functions as those described in the first embodiment in the following embodiments, and the explanations thereof will not be repeated. For simplicity, the explanations of matters similar to those in the publicly known technology will also be omitted as appropriate.

[0010] Please note that each configuration and each numerical value described in this specification is merely an example unless otherwise specified. Therefore, unless otherwise specified, the positional relationship of each member is not limited to the example of each figure. In this specification, the description "A to B" regarding two numbers A and B means "A or more and B or less" unless otherwise specified. In addition, the wording "connected" in this specification means "electrically connected" unless otherwise specified.

[0011] (Overview of DC power transmission system 1000) 1 is a diagram showing an overview of a DC power transmission system 1000. The DC power transmission system 1000 transmits DC power from a primary side to a secondary side via a DC bus composed of a P line (main line) and an N line (return line). The DC power transmission system 1000 includes a DC circuit breaker 1.

[0012] As shown in Fig. 1, the DC circuit breaker 1 is disposed in front of the DC bus. That is, the DC circuit breaker 1 is disposed in the same position as the DC circuit breaker A in Non-Patent Document 1. In this way, the DC circuit breaker 1 is disposed on the primary side of the DC power transmission system 1000. As shown in Fig. 1, the DC power transmission system 1000 does not have a DC circuit breaker in the rear (i.e., secondary side) of the DC bus. In this way, the DC power transmission system 1000, unlike the DC power transmission system in Non-Patent Document 1, does not have a DC circuit breaker corresponding to the DC circuit breaker B.

[0013] The DC circuit breaker 1 includes terminals TA1, TA2, TB1, and TB2, a semiconductor circuit breaker unit 10, a PN clamper 20, a control unit 30, and a current sensor 410. As shown in Figs. 2 and 3, the DC circuit breaker 1 further includes voltage sensors 420 and 430. In the following, for example, the terminal TA1 will be abbreviated simply as TA1. Other members (elements) will be similarly abbreviated as appropriate. In the following, for example, the current value of a current Iin, which will be described later, will be written as Iin. Other signal values ​​will be similarly abbreviated.

[0014] TA1 and TA2 are terminals on the input side of the DC circuit breaker 1. As an example, the DC circuit breaker 1 is connected to a power converter (e.g., an AC / DC converter) (not shown) via TA1 and TA2. TB1 and TB2 are terminals on the output side of the DC circuit breaker 1. The DC circuit breaker 1 is connected to a DC bus via TB1 and TB2. More specifically, in the P line of the DC circuit breaker 1, the semiconductor circuit breaker 10 is connected in series with the P line of the DC bus via TB1. Also, the N line of the DC circuit breaker 1 is connected to the N line of the DC bus via TB2.

[0015] As shown in FIG. 1, TB1 is connected to TA1 via the semiconductor circuit breaker 10. TB2 is connected to TA2 so as to have the same potential as TA2. Nodes N1 and N2 in FIG. 1 are nodes on the P line and N line of the DC circuit breaker 1, respectively. N1 and N2 are also referred to as the first node and the second node, respectively. N1 is a node with the same potential as TA1. N2 is a node with the same potential as TB2. The PN clamper 20 is connected to N1 and N2. N1 is connected to the P line of the DC bus via the semiconductor circuit breaker 10 and TB1. N2 is connected to the N line of the DC bus via TB2. In the DC power transmission system 1000, when SWm, which will be described later, is turned on, it can be approximately considered that a voltage equal to the PN bus voltage (the voltage between the P line and the N line of the DC bus) is applied to the PN clamper 20. Hereinafter, the PN bus voltage is represented as Vpn.

[0016] The control unit 30 comprehensively controls each unit of the DC circuit breaker 1. In particular, in the first embodiment, the control unit 30 controls the semiconductor circuit breaker 10 and the PN clamper 20 by current FB (feedback) control and voltage FB control. The specific configuration and operation of the control unit 30 will be described later.

[0017] The current sensor 410 detects the current Iin flowing through the DC circuit breaker 1 (more specifically, flowing through the P line of the DC circuit breaker 1). More specifically, the current sensor 410 is an analog current sensor that detects Iin as an analog value. The current sensor 410 supplies the detected Iin to the control unit 30. In the DC power transmission system 1000, Iin can be considered to be equal to the current flowing through the DC bus. For this reason, Iin may be referred to as a bus current.

[0018] (PN Clamper 20 Configuration) 2 is a diagram illustrating a configuration of the PN clamper 20. The PN clamper 20 is a circuit for protecting a DC bus from an overvoltage. The PN clamper 20 is an example of an overvoltage protection circuit according to an embodiment of the present invention. The PN clamper 20 includes terminals TC1 and TC2, capacitors Cm and Cpn, a resistor element Rc, a switch element SWp, and a diode Dc. TC1 is connected to N1. TC2 is connected to N2. Any of the switch elements according to an embodiment of the present disclosure may be known semiconductor switch elements.

[0019] The ON / OFF of SWp is controlled by the control unit 30. As described later, by turning SWp ON, the fault current can be bypassed. For this reason, SWp may be called a bypass switch element. Cpn is a capacitor connected in parallel with SWp. Cpn may be called a first capacitor. Cm is a capacitor connected in series with SWp. Cm may be called a second capacitor. In the PN clamper 20, Dc, Rc, and Cpn are connected to form a snubber circuit in the PN clamper 20.

[0020] The voltage sensor 420 detects a voltage applied to Cpn (hereinafter, referred to as voltage Vcpn). More specifically, the voltage sensor 420 is an analog voltage sensor that detects Vcpn as an analog value. Vcpn is an example of a voltage corresponding to Vpn. The voltage sensor 420 supplies the detected Vcpn to the control unit 30. To distinguish it from the voltage sensor 430 in FIG. 3, the voltage sensor 420 may be referred to as a first voltage sensor. For this reason, Vcpn may be referred to as a first voltage (or a first voltage value). Note that, when the parameters of each element in the PN clamper 20 are known, the control unit 30 can also calculate Vpn using the Vcpn detected by the voltage sensor 420 and the parameters.

[0021] (Configuration of semiconductor cutoff unit 10) 3 is a diagram illustrating a configuration of the semiconductor cutoff unit 10. The semiconductor cutoff unit 10 is a circuit for cutting off an overcurrent flowing through a DC bus. The semiconductor cutoff unit 10 is an example of an overcurrent cutoff unit according to an embodiment of the present invention. The semiconductor cutoff unit 10 includes terminals TD1 and TD2, a switch element SWm, a capacitor Csw, a diode Dsw, and a SW clamper (switching clamper) 110. TD1 is connected to N1. TD2 is connected to TB1.

[0022] SWm is connected in series with the P line of the DC bus. The ON / OFF of SWm is controlled by the control unit 30. Therefore, by turning SWm OFF, it is possible to cut off an overcurrent flowing through the DC bus. For this reason, SWm may be referred to as a main switching element.

[0023] Csw and the SW clamper 110 are connected in parallel to SWm. Dsw, Csw, and the SW clamper 110 are connected to form a snubber circuit in the semiconductor cutoff unit 10.

[0024] The SW clamper 110 is a circuit for consuming surge energy when an abnormal current (e.g., short-circuit current) occurs in a DC bus. The SW clamper 110 is an example of a surge energy consumption circuit according to an embodiment of the present disclosure. The SW clamper 110 includes switch elements SW1 and SW2 and resistor elements R1 and R2. SW1 and SW2 may be referred to as secondary switch elements.

[0025] The SW clamper 110 may include n energy consumption units in which secondary switching elements and resistive elements are connected in series. n is an integer equal to or greater than 1. However, as described below, n is preferably equal to or greater than 2. Thus, the case of n=2 is illustrated in FIG. 3. SW1 and SW2 and R1 and R2 in the example of FIG. 3 are examples of secondary switching elements and resistive elements, respectively.

[0026] 3, an energy consuming unit configured with SW1 and R1 connected in series is referred to as a first energy consuming unit 111. Similarly, an energy consuming unit configured with SW2 and R2 connected in series is referred to as a second energy consuming unit 112. The first energy consuming unit 111 and the second energy consuming unit 112 are connected in parallel. The ON / OFF of each of the n sub switch elements in the SW clamper 110 (each of SW1 and SW2 in the example of FIG. 3) is controlled by the control unit 30.

[0027] Voltage sensor 430 detects a voltage applied to SWm (hereinafter, referred to as voltage Vswm). More specifically, voltage sensor 430 is an analog voltage sensor that detects Vswm as an analog value. Voltage sensor 430 supplies the detected Vswm to control unit 30. To distinguish it from voltage sensor 420 in FIG. 2, voltage sensor 430 may be referred to as a second voltage sensor. For this reason, Vswm may be referred to as a second voltage (or a second voltage value).

[0028] (Configuration of control unit 30) 4 is a diagram illustrating an example of the configuration of the control unit 30. The control unit 30 includes terminals TEin1 to TEin3, a terminal TEout, AD (Analogue / Digital) converters 311 to 314, an amplifier 320, a hold circuit 330, a microcomputer 340, and an OR circuit 350. The amplifier 320 in the example of FIG. 4 is a two-input, one-output analog differential amplifier. The OR circuit 350 in the example of FIG. 4 is a two-input, one-output logic gate (logic circuit). For ease of explanation, the two input terminals of the OR circuit 350 are referred to as a first input terminal and a second input terminal.

[0029] 4, in order to distinguish between AD converters 311 to 314, (i) AD converter 311 is written as AD1, (ii) AD converter 312 is written as AD2, (iii) AD converter 313 is written as AD3, and (iv) AD converter 314 is written as AD4. AD1 to AD4 may be referred to as a first AD converter to a fourth AD converter, respectively.

[0030] AD converter 311 has a higher AD conversion speed (hereinafter simply referred to as conversion speed) than AD converters 312 to 314. However, AD converter 311 has a lower resolution than AD converters 312 to 314. Therefore, AD converter 311 can output digital data at a higher speed than AD converters 312 to 314.

[0031] As an example, the AD converter 311 may be realized by a batch output type IC (Integrated Circuit) having 8-bit resolution, while the AD converters 312 to 314 may be realized by sequential output type ICs having 12- to 16-bit resolution, respectively.

[0032] In this case, AD converter 311 has (i) 12 to 16 times the conversion speed and (ii) 1 / 64 to 1 / 16 times the resolution of AD converters 312 to 314. In other words, AD converters 312 to 314 have (i) 1 / 16 to 1 / 12 times the conversion speed and (ii) 16 to 64 times the resolution of AD converter 311. For the above reasons, AD converter 311 may be called a high-speed AD converter (or a high-speed, low-resolution AD converter). On the other hand, AD converters 312 to 314 may be called high-resolution AD converters (or high-resolution, low-speed AD converters).

[0033] TEin1 to TEin3 are input terminals in the control unit 30. TEin1 is connected to the current sensor 410. Each of the AD converters 311 and 312 is connected to TEin1. Therefore, each of the AD converters 311 and 312 acquires Iin as an analog value via TEin1. The AD converters 311 and 312 are AD converters for the current FB based on Iin.

[0034] The AD converter 311 converts Iin as an analog value into an AD value to derive Iin as a digital current value. The digital current value obtained by the AD conversion by the AD converter 311 may be referred to as a first digital current value. The AD converter 311 may be referred to as a first AD converter for current. The AD converter 311 supplies the first digital current value to the microcomputer 340.

[0035] The AD converter 312 converts Iin as an analog value into an AD value to derive Iin as a digital current value. The digital current value obtained by the AD conversion by the AD converter 312 may be referred to as a second digital current value. The AD converter 312 may be referred to as a second AD converter for current. The AD converter 312 supplies the second digital current value to the microcomputer 340.

[0036] In the first embodiment, the full scale of the converted value of AD converter 311 (hereinafter simply referred to as full scale) is set to be larger than the full scale of AD converter 312. As an example, the full scale of AD converter 311 may be set to about 10 to 20 times the rated current (hereinafter referred to as Ir) of DC circuit breaker 1. In this case, the full scale of AD converter 312 may be set to about 5 to 10 times Ir.

[0037] TEin2 is connected to the voltage sensor 420. And, the AD converter 314 is connected to TEin2. Therefore, the AD converter 314 acquires Vcpn as an analog value via TEin2. The AD converter 314 is an AD converter for the voltage FB based on Vcpn.

[0038] The AD converter 314 derives Vcpn as a digital voltage value by AD converting Vcpn as an analog value. The digital voltage value obtained by AD conversion by the AD converter 314 may be referred to as a first digital voltage value. The AD converter 314 may be referred to as a first AD converter for voltage. The AD converter 314 supplies the first digital voltage value to the microcomputer 340.

[0039] TEin3 is connected to the voltage sensor 430. And, the AD converter 313 is connected to TEin3. Therefore, the AD converter 314 acquires Vswm as an analog value via TEin3. The AD converter 314 is an AD converter for the voltage FB based on Vswm.

[0040] AD converter 314 derives Vswm as a digital voltage value by AD converting Vswm as an analog value. The digital voltage value obtained by AD conversion by AD converter 314 may be referred to as a second digital voltage value. AD converter 314 may be referred to as a second AD converter for voltage. AD converter 314 supplies the second digital voltage value to microcomputer 340.

[0041] The + terminal of the amplifier 320 is connected to TEin3. Therefore, Vswm is supplied from the voltage sensor 430 via TEin3 to the + terminal of the amplifier 320. The - terminal of the amplifier 320 receives the reference voltage ref-a.

[0042] The amplifier 320 generates a differential amplified signal, which is a signal obtained by amplifying the difference between Vswm and ref-a. The amplifier 320 then supplies the differential amplified signal to the hold circuit 330. When Vswm is greater than ref-a, the sign of the differential amplified signal is positive. On the other hand, when Vswm is less than ref-a, the sign of the differential amplified signal is negative. Furthermore, when Vswm is equal to ref-a, the signal value of the differential amplified signal is 0. Therefore, ref-a may be used as a reference value for Vswm.

[0043] The hold circuit 330 obtains the differential amplified signal as an analog signal from the amplifier 320. The hold circuit 330 converts the differential amplified signal into a digital signal by holding the signal value of the differential amplified signal for a predetermined fixed period of time. Hereinafter, the differential amplified signal output as a digital signal from the hold circuit 330 will be referred to as a digital differential amplified signal.

[0044] Microcomputer 340 obtains (i) a first digital current value from AD converter 311, (ii) a second digital current value from AD converter 312, (iii) a first digital voltage value from AD converter 314, and (iv) a second digital voltage value from AD converter 313. Microcomputer 340 generates a control signal as a digital signal based on the first digital current value, the second digital current value, the first digital voltage value, and the second digital voltage value.

[0045] In the OR circuit 350, (i) a control signal is input to a first input terminal from the microcomputer 340, and (ii) a digital differential amplified signal is input to a second input terminal from the microcomputer 340. The OR circuit 350 generates an output control signal as a logical sum of the control signal and the digital differential amplified signal. The OR circuit 350 outputs the output control signal to TEout. TEout is an output terminal of the control unit 30. In this way, the OR circuit 350 outputs the output control signal to the outside of the control unit 30 via TEout.

[0046] The output control signal collectively represents a signal for controlling the ON / OFF of each switch element of the DC circuit breaker 1. As an example, the output control signal may be a gate drive signal for driving the gate of each switch element. The control unit 30 generates the output control signal so that each switch element can be turned ON / OFF at a desired timing. More specifically, the microcomputer 340 generates the control signal based on the first digital current value, the second digital current value, the first digital voltage value, and the second digital voltage value so that a desired output control signal can be obtained. In this way, in the DC circuit breaker 1, the ON / OFF of each switch element of the DC circuit breaker 1 is controlled by the current FB and the voltage FB.

[0047] (An example of the operation of DC circuit breaker 1) Fig. 5 is a timing chart showing an example of the change over time of each voltage according to the change over time of Iin and the operation of each switch element. In the example of Fig. 5, it is assumed that a short circuit accident occurs on the DC bus at time t1. Therefore, in the example of Fig. 5, Vpn drops to 0 at t1. Note that before the short circuit accident occurs, (i) SWm is set to ON, and (ii) SWp, SW1, and SW2 are set to OFF.

[0048] 2, Vcpn is always equal to or greater than Vpn. Also, when Vpn is not 0, Vcpn is roughly equivalent to Vpn. Therefore, when Vpn is not 0, Vcpn can be understood to be an approximation of Vpn.

[0049] In many cases, Iin increases after the occurrence of a short circuit. In particular, when Iin becomes excessively large, it is preferable to quickly cut off such excessive Iin (fault current) in order to protect the devices disposed before and after the DC circuit breaker 1 in the DC power transmission system 1000.

[0050] Therefore, in the first embodiment, the control unit 30 controls SWm of the semiconductor cutoff unit 10 by the current FB based on the first digital current value (Iin as a digital value derived by the AD converter 311). As described above, the AD converter 311 is a high-speed AD converter. Therefore, the AD converter 311 can output the first digital current value at high speed. Therefore, the current FB based on the first digital current value allows SWm to be quickly turned off, and therefore the fault current can be quickly cut off.

[0051] In the first embodiment, the control unit 30 compares the first digital current value with a predetermined fault current threshold (not shown in FIG. 5). The fault current threshold may be referred to as an abnormal current threshold. The fault current threshold (and other thresholds described below) may be set in advance in the microcomputer 340. When the first digital current value is equal to or greater than the fault current threshold, the control unit 30 turns OFF SWm. In the example of FIG. 5, at time t2, the control unit 30 switches SWm from ON to OFF.

[0052] As a result of SWm being turned OFF, Iin changes from increasing to decreasing. That is, at t2, the current reduction operation of the DC circuit breaker 1 begins. As shown in FIG. 5, Iin becomes 0 at time t3. As a result of Iin becoming 0, the current reduction operation of the DC circuit breaker 1 ends. In this manner, the current reduction operation by the DC circuit breaker 1 is performed over the period from t2 to t3. The period from t2 to t3 may be referred to as a period during which the DC circuit breaker 1 performs current reduction operation.

[0053] In addition, at t2, the control unit 30 determines whether the first digital current value is equal to or greater than the operation mode determination current threshold (not shown in FIG. 5). FIG. 5 illustrates an example in which the first digital current value is equal to or greater than the operation mode determination current threshold. When the first digital current value is equal to the operation mode determination current threshold, the control unit 30 continuously turns on the SW clamper 110 (more specifically, each of the secondary switch elements in the SW clamper 110) until the first digital current value falls below the ON stop current threshold (conduction stop current threshold). The ON stop current threshold is set to be smaller than the operation mode determination current threshold. Ith in FIG. 5 is an example of the ON stop current threshold.

[0054] In the example of FIG. 5, at time tm3, the first digital current value becomes equal to the ON stop current threshold. In the example of FIG. 5, at t2, SW1 and SW2 are switched from OFF to ON by the control unit 30. Then, over the period from t2 to tm3, the control unit 30 maintains SW1 and SW2 in the ON state. Then, immediately after tm3, the control unit 30 switches SW1 and SW2 from ON to OFF. tm3 in the example of FIG. 5 is a time later than times tm1 and tm2, which will be described later. Thereafter, until t3, the control unit 30 maintains SW1 and SW2 in the OFF state.

[0055] The mode in which each sub switch element (e.g., SW1 and SW2) in the SW clamper 110 is controlled in this manner over the current reduction operation period of the DC circuit breaker 1 may be referred to as a two-value control mode. As described above, when the first digital current value is equal to or greater than the operation mode current determination threshold, the control unit 30 may control the SW clamper 110 in the two-value control mode.

[0056] According to the two-value control mode, the surge energy can be consumed quickly by the SW clamper 110 (more specifically, each energy consumption unit of the SW clamper 110). Therefore, Iin can be attenuated quickly. When Iin is relatively large, it is preferable to attenuate Iin quickly. Therefore, in the first embodiment, as described above, when the first digital current value is equal to or greater than the operation mode determination current threshold at t2, the SW clamper 110 is driven in the two-value control mode.

[0057] Incidentally, as shown in Fig. 5, in the DC power transmission system 1000, Vpn may temporarily increase when SWm is switched from ON to OFF. Therefore, when the current reduction operation starts, a temporary abnormal voltage (e.g., overvoltage) may occur on the primary side. In this way, it can be said that the occurrence of an abnormal voltage is closely related to the occurrence of an abnormal current. In consideration of this, in the first embodiment, the control unit 30 is configured to control SWp of the SW clamper 110 by the voltage FB.

[0058] The control unit 30 may control SWp by a voltage FB based on a first digital voltage value (Vcpn as a digital value). As an example, the control unit 30 compares the first digital voltage value with a predetermined first bypass voltage threshold. When the first digital voltage value is equal to or greater than the first bypass voltage threshold, the control unit 30 turns ON SWp. Vth in FIG. 5 is an example of the first bypass voltage threshold.

[0059] In the example of FIG. 5, Vcpn increases after t2, and Vcpn becomes equal to Vth at time tm1. Therefore, the control unit 30 switches SWp from OFF to ON at tm1. With the switching of SWp to ON, Vpn decreases. Therefore, Vcpn also decreases. In the example of FIG. 5, Vcpn becomes equal to Vth at time tm2. Therefore, the control unit 30 switches SWp from ON to OFF immediately after tm2.

[0060] In the DC circuit breaker 1, by turning on SWp, a part of the excessive Iin (overcurrent) flowing from the primary side can be bypassed to the Cm side. That is, a part of the overcurrent can be absorbed by Cm. This makes it possible to reduce Iin more quickly. In addition, it is also possible to quickly remove the overvoltage applied to the primary side. In this way, the PN clamper 20 can protect the primary side from the overvoltage.

[0061] In addition, as described above, in the PN clamper 20 of the first embodiment, Cm is connected in series with SWm. Therefore, when SWp is turned ON, the current flowing through SWp can be absorbed by Cm, so that SWp can be protected. Similarly, other elements in the PN clamper 20 can also be protected. In this way, by providing Cm, damage to each member of the PN clamper 20 can be prevented.

[0062] The control unit 30 may control SWp by a voltage FB based on the second digital voltage value (Vswm as a digital value). For example, the control unit 30 may compare the second digital voltage value with a predetermined second bypass voltage threshold (not shown in FIG. 5). When the second digital voltage value is equal to or greater than the second bypass voltage threshold, the control unit 30 turns ON SWp.

[0063] When an accident occurs in the DC power transmission system 1000, a high voltage may be applied to SWm. In such a case, it is considered that there is a high need to protect the primary side from an overvoltage. Therefore, by turning on SWp when the second digital voltage value is equal to or higher than the second bypass voltage threshold, the PN clamper 20 can protect the primary side from an overvoltage even in the above case.

[0064] (Another example of the operation of DC circuit breaker 1) Hereinafter, another example of the operation of the DC circuit breaker 1 will be described with reference to Fig. 6. Fig. 6 is a timing chart showing another example of the time change of each voltage according to the time change of Iin and the operation of each switch element. Fig. 6 is a diagram paired with Fig. 5. In Fig. 6, another example of the control of SW1 and SW2 by the current FB will be described.

[0065] In the example of Fig. 6, SWm is switched from ON to OFF at t2, similarly to the example of Fig. 5. However, unlike Fig. 5, Fig. 6 illustrates a case where the first digital current value is less than the operation mode determination current. At t2, when the first digital current value is less than the operation mode determination current threshold, the control unit 30 controls SW110 according to the second digital current value (Iin as a digital value derived by the AD converter 312). In this way, when the first digital current value is the operation mode determination current threshold, current FB control based on the second digital current value may be performed.

[0066] 6, when the first digital current value is the operation mode determination current threshold, the control unit 30 intermittently turns on SW110 (more specifically, each of the sub switch elements in the SW clamper 110). In the example of FIG 6, over the current reduction operation period of the DC circuit breaker 1, each of SW1 and SW2 is switched on and off intermittently.

[0067] The mode in which each sub switch element (e.g., SW1 and SW2) in the SW clamper 110 is controlled in this manner over the current reduction operation period of the DC circuit breaker 1 may be referred to as a chopper control mode. As described above, when the first digital current value is less than the operation mode current determination threshold, the control unit 30 may drive the SW clamper 110 in the chopper control mode.

[0068] In the chopper control mode, surge energy is consumed more slowly and quickly in the SW clamper 110 compared to the above-mentioned two-value control mode. Therefore, in the chopper control mode, overcurrent is attenuated more slowly than in the above-mentioned two-value control mode. When Iin is relatively large, it is considered that there is not much need to attenuate Iin quickly. Therefore, in the first embodiment, as described above, when the first digital current value is less than the operation mode determination current threshold, the SW clamper 110 is controlled in the chopper control mode.

[0069] In the chopper control mode, current does not flow continuously to each energy consumption unit of the SW clamper 110. Therefore, in the chopper control mode, the temperature rise of the energy consumption units (particularly the temperature rise of the resistance elements) is reduced compared to the two-value control mode. Therefore, the chopper control mode can extend the life of the energy consumption units.

[0070] Moreover, in the chopper control mode, unlike the two-value control mode, the SW clamper 110 is controlled based on the second digital current value. As described above, the second digital current value is a digital current value supplied from the AD converter 312 (second AD converter for current) which is a high-resolution AD converter. Therefore, the second digital current value is a digital current value with a smaller quantization error than the first digital current value. Therefore, by controlling the SW clamper 110 based on the second digital current value, it is possible to switch the SW clamper 110 intermittently ON / OFF more flexibly than when controlling the SW clamper 110 based on the first digital current value.

[0071] FIG. 7 is a diagram for explaining an example of a control method of SW1 and SW2 in the chopper control mode. In the example of FIG. 7, ON / OFF of SW1 and SW2 is controlled based on the control amount CONT. In the example of FIG. 7, the control unit 30 sets CONT as an amount proportional to the second digital current value. Therefore, CONT can be approximately regarded as an amount proportional to Iin, which is a continuous amount. For this reason, the chopper control mode using the control method of FIG. 7 may be referred to as a continuous amount control mode. For the control method of FIG. 7, please also refer to, for example, "JP Patent Publication No. 2020-10532".

[0072] As an example, the control unit 30 may set the duty ratio of each of the n sub switching elements in response to CONT (in other words, in response to the second digital current value). Then, the control unit 30 may control the ON / OFF of each of the n sub switching elements in accordance with the duty ratio. In the example of Fig. 7, the control unit 30 sets the duty ratio of each of SW1 and SW2 in response to CONT.

[0073] The control unit 30 may generate n carriers (carrier waves) corresponding to the n sub switch elements, respectively. In the example of Fig. 7, CSW1 and CSW2 are carriers corresponding to SW1 and SW2, respectively. In the example of Fig. 7, CSW1 and CSW2 are illustrated as triangular waves. However, the waveform of the carrier may be another known waveform (e.g., a square wave or a sawtooth wave).

[0074] The control unit 30 may set the duty ratio of each of the n sub switching elements by comparing the magnitude relationship between CONT and each of the n carriers. In this way, the control unit 30 may set the ON / OFF of each of the n sub switching elements using the n carriers. In this case, by making the phases of the n carriers different from each other, the n sub switching elements can be turned ON / OFF at different timings.

[0075] As an example, it is preferable that the phases of the n carriers are shifted by 2π / n. By setting the phases of the n carriers in this way, it is possible to sufficiently reduce the overlap of the ON periods of the n sub switching elements. Therefore, in the example of Fig. 7, CSW1 and CSW2 are set as triangular waves with a phase shift of π from each other.

[0076] In the example of Fig. 7, the control unit 30 sets SW1 ON during (i) the period when CONT is equal to or greater than CSW1, and sets SW1 OFF during (ii) the period when CONT is smaller than CSW1. Similarly, the control unit 30 sets SW2 ON during (i) the period when CONT is equal to or greater than CSW2, and sets SW2 OFF during (ii) the period when CONT is smaller than CSW2. In the example of Fig. 7, CONT decreases as time progresses. Therefore, the ON periods of SW1 and SW2 become shorter as time progresses.

[0077] According to the control method of FIG. 7, the load factor of each of the n energy consumption units (more precisely, the load factor of each of the resistive elements in the n energy consumption units) can be flexibly set according to CONT (in other words, according to the second digital current value).

[0078] (effect) The DC circuit breaker 1 is configured to control the PN clamper 20 by the voltage FB and the semiconductor circuit breaker 10 by the current FB. Therefore, the DC circuit breaker 1 can handle a fault current (excessive Iin) in the DC bus by coordinating the voltage FB control and the current FB control.

[0079] For example, as described above, in the DC circuit breaker 1, when the first digital current value (digital current value supplied from the first current AD converter, which is a high-speed AD converter) is equal to or greater than the fault current threshold, SWm of the semiconductor circuit breaker 10 is turned OFF. Therefore, SWm can be turned OFF quickly. And, in the DC circuit breaker 1, when the first digital voltage value is equal to or greater than the first bypass voltage threshold, SWp is turned ON. Therefore, by turning SWp ON, a part of the fault current can be bypassed to the PN clamper 20, so that the fault current can be reduced more quickly. In addition, by turning SWp ON, the overvoltage that occurs when SWm is turned OFF can also be quickly removed.

[0080] As described above, the DC circuit breaker 1, unlike conventional DC circuit breakers (e.g., the DC circuit breaker disclosed in Non-Patent Document 1), can achieve fault current interruption and bypass with a single DC circuit breaker. In this way, the DC circuit breaker 1 can handle fault currents in DC lines with a single DC circuit breaker. Furthermore, the DC circuit breaker 1 can complementarily control the semiconductor circuit breaker 10 and the PN clamper 20 with the current FB and voltage FB. Therefore, damage to each part of the semiconductor circuit breaker 10 and the PN clamper 20 caused by overcurrent or overvoltage can be effectively prevented.

[0081] In addition, in the DC circuit breaker 1, when the first digital current value is equal to or greater than the operation mode determination current threshold, the SW clamper 110 is driven in the two-value control mode. On the other hand, when the first digital current value is less than the operation mode determination current threshold, the SW clamper 110 is driven in the chopper control mode. In this way, in the DC circuit breaker 1, whether or not to drive the SW clamper 110 so as to quickly consume surge energy is selected according to the magnitude of the first digital current value. As a result, when Iin is not so large, the SW clamper 110 can be driven in the chopper control mode. Therefore, the life of the energy consumption unit of the SW clamper 110 can be extended compared to when the SW clamper 110 is always driven in the two-value control mode.

[0082] 〔supplement〕 As is clear from the description of the first embodiment, n may be 1. However, when n is 1, no current can flow through the SW clamper 110 during the period in which one sub switch element is turned off. During this period, surge energy cannot be consumed by the energy consumption unit.

[0083] Therefore, in order to quickly consume surge energy in the chopper control mode, n is preferably 2 or more. When n is 2 or more, the ON periods of the n sub switching elements are made different from each other, so that a current can be caused to flow through at least one resistive element in the n energy consuming units. Therefore, the energy consuming units can be made to consume surge energy during the entire current reduction operation period.

[0084] [Embodiment 2] In the first embodiment, the case where each switch element is controlled based on the current and voltage detected in each part of the DC circuit breaker 1 has been exemplified. However, it is obvious that the control method of each switch element in the DC circuit breaker 1 is not limited to the above example. For example, in the DC circuit breaker 1, the power consumption in each part of the DC circuit breaker 1 may be calculated by the control unit 30 based on the detected current and voltage. In this case, the control unit 30 may control each switch element further based on the power consumption.

[0085] The control unit 30 may also control the ON / OFF of each switch element based on a predetermined time characteristic. The time characteristic may be set in advance in consideration of at least one of the electrical characteristic and the frequency characteristic of each switch element.

[0086] [Software implementation example] The functions of the DC circuit breaker 1 (hereinafter, for convenience, referred to as the "device") can be realized by a program for causing a computer to function as the device, and by a program for causing a computer to function as each control block of the device (particularly each part included in the control unit 30).

[0087] In this case, the device includes a computer having at least one control device (e.g., a processor) and at least one storage device (e.g., a memory) as hardware for executing the program. The control device and storage device execute the program to realize each function described in each of the above embodiments.

[0088] The program may be non-transitory and may be recorded in one or more computer-readable recording media. The recording media may or may not be included in the device. In the latter case, the program may be provided to the device via any wired or wireless transmission medium.

[0089] In addition, some or all of the functions of each of the control blocks can be realized by a logic circuit. For example, an integrated circuit in which a logic circuit that functions as each of the control blocks is formed is also included in the scope of one aspect of the present invention. In addition, the functions of each of the control blocks can be realized by, for example, a quantum computer.

[0090] Furthermore, each process described in each of the above embodiments may be executed by AI (Artificial Intelligence). In this case, the AI ​​may be executed by the control device or another device (for example, an edge computer or a cloud server).

[0091] [Additional Notes] One aspect of the present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of one aspect of the present invention. [Explanation of symbols]

[0092] 1 DC circuit breaker 10 Semiconductor circuit breaker (overcurrent circuit breaker) 20 PN clamper (overvoltage protection circuit) 30 Control section 110 SW clamper (surge energy dissipation circuit) 111 First Energy Consumption Unit (Energy Consumption Unit) 112 Second energy consumption unit (energy consumption unit) 311 AD converter (first AD converter for current) 312 AD converter (second AD converter for current) 313 AD converter (second AD converter for voltage) 314 AD converter (voltage AD converter, first voltage AD converter) 410 Current Sensor 420 Voltage sensor (first voltage sensor) 430 Voltage sensor (second voltage sensor) 1000 DC Power Transmission System Cpn capacitor (first capacitor, a capacitor connected in parallel with the bypass switch element) Cm Capacitor (second capacitor, capacitor connected in series with bypass switch element) Iin Current (current flowing through the overcurrent interrupter) N1 node (first node) N2 node (second node) SWm Switch element (main switch element) SWp switch element (bypass switch element) SW1 Switch element (secondary switch element of the first energy consumption unit) SW2 switch element (secondary switch element of the second energy consumption unit) R1 Resistor (resistor of the first energy consumption unit) R1 Resistor (resistor of the second energy consumption unit) Vcpn voltage (voltage applied to the bypass switch element, first voltage) Vswm voltage (voltage applied to the main switch element, second voltage)

Claims

1. A DC circuit breaker arranged in front of a DC bus bar composed of a main line and a return line, an overcurrent interrupter connected in series with the main line; an overvoltage protection circuit connected to a first node connected to the main line and a second node connected to the return line; a control unit that controls the overcurrent interruption unit and the overvoltage protection circuit, the overvoltage protection circuit includes a bypass switch element and a capacitor connected in parallel with the bypass switch element, the overcurrent interrupter includes a main switch element and a surge energy consumption circuit connected in parallel with the main switch element, The DC circuit breaker is a current sensor that detects a current value flowing through the overcurrent interrupter as an analog value; a voltage sensor that detects a voltage value applied to the capacitor as an analog value, The control unit is a first current AD converter that derives a first digital current value by AD converting the current value detected by the current sensor; a second current AD converter that derives a second digital current value by AD converting the current value detected by the current sensor; a voltage AD converter that derives a digital voltage value by AD converting the voltage value detected by the voltage sensor, the first current A / D converter has a higher A / D conversion speed than the second current A / D converter; the second current A / D converter has a higher resolution than the first current A / D converter; The control unit is When the first digital current value is equal to or greater than a fault current threshold, the main switch element is turned off; When the digital voltage value is equal to or greater than a bypass voltage threshold, the bypass switch element is made conductive; When the first digital current value is equal to or greater than an operation mode determination current threshold, the surge energy dissipation circuit is continuously conductive until the first digital current value falls below a conduction stop current threshold that is smaller than the operation mode determination current threshold; When the first digital current value is less than the operation mode determination current threshold, the DC circuit breaker causes the surge energy consumption circuit to be intermittently conductive in response to the second digital current value.

2. The capacitor is referred to as a first capacitor.

2. The DC circuit breaker according to claim 1, wherein the overvoltage protection circuit further comprises a second capacitor connected in series with the bypass switch element.

3. The capacitor is referred to as a first capacitor. The voltage value applied to the first capacitor is referred to as a first voltage value, The voltage sensor is referred to as a first voltage sensor. The voltage AD converter is referred to as a first voltage AD converter. The digital voltage value derived by the first voltage AD converter is referred to as a first digital voltage value, The bypass voltage threshold corresponding to the first digital voltage value is referred to as a first bypass voltage threshold; The DC circuit breaker further includes a second voltage sensor that detects a second voltage value, which is a voltage value applied to the main switch element, as an analog value, the control unit further includes a second voltage AD converter that derives a second digital voltage value by AD converting the second voltage value detected by the second voltage sensor, 3. The DC circuit breaker according to claim 1, wherein the control unit brings the bypass switch element into a conductive state when the second digital voltage value is equal to or greater than a second bypass voltage threshold value.

4. the surge energy consumption circuit includes n energy consumption units (n is an integer equal to or greater than 1) each having a sub switching element and a resistance element connected in series; Each of the n energy consumption units is connected in parallel with each other; When the first digital current value is less than the operation mode determination current threshold, 4. The DC circuit breaker according to claim 1, further comprising: a control circuit for controlling a conductive state of each of the n sub switching elements in response to the second digital current value.

5. The DC circuit breaker according to claim 4 , wherein n is 2 or more.

6. When the first digital current value is less than the operation mode determination current threshold, setting a duty ratio of each of the n sub switching elements in accordance with the second digital current value; 6. The DC circuit breaker according to claim 4, wherein the conductive state of each of the n sub switching elements is controlled in accordance with the duty ratio.

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