Multiplexing of radar beat signals

Abstract

An apparatus for multiplexing radar beat signals is disclosed. In one exemplary embodiment, the apparatus includes an antenna array and a wireless transceiver jointly configured to transmit a radar transmission signal and receive two or more radar reception signals. The two or more radar reception signals represent portions of the radar transmission signal that are reflected by an object. The wireless transceiver includes a radio frequency integrated circuit having two or more receive chains and a multiplexing circuit. Each of the two or more receive chains is configured to generate a radar beat signal by downconverting a respective radar reception signal of the two or more radar reception signals using the radar transmission signal. The multiplexing circuit is coupled to the two or more receive chains and configured to multiplex the two or more radar beat signals together to generate a composite radar beat signal.

Description

[Technical Field]

[0001] Priority This patent application claims priority to Non-Provisional Application No. 16 / 696,550, entitled "MULTIPLEXING RADAR BEAT SIGNALS," filed November 26, 2019, which is assigned to the assignee of the present application and expressly incorporated herein by reference.

[0002] The present disclosure relates generally to wireless transceivers, and more particularly to wireless transceivers for radar signals. [Background technology]

[0003] To increase transmission rates and throughput, cellular and other wireless networks are using higher frequency and shorter wavelength signals. As an example, fifth-generation (5G)-enabled devices communicate with networks using frequencies including frequencies in or near the extremely high frequency (EHF) spectrum (e.g., frequencies higher than 24 gigahertz (GHz)) with wavelengths at or near millimeter wavelengths. These signals have various technical challenges, such as greater path loss, compared to signals for earlier generations of wireless communications. In some scenarios, it may be difficult for 5G wireless signals at these higher frequencies to travel far enough to make cellular communications feasible.

[0004] To compensate for greater path loss, transmit power levels can be increased, or transmit beamforming can focus energy in specific directions. However, these types of compensation techniques increase power density. The Federal Communications Commission (FCC) determines maximum permitted exposure (MPE) limits to accommodate these greater power densities. Based on these MPE limits, devices balance performance with transmit power and other considerations to meet targeted guidelines. This balancing act can be cumbersome given cost, size, functional design goals, and / or related constraints. Summary of the Invention [Means for solving the problem]

[0005] An apparatus is disclosed that implements a technique for multiplexing radar beat signals, which can be used for object detection, which can further include object identification and / or ranging. In an exemplary implementation, a wireless transceiver includes a radio frequency integrated circuit, a processor, and interface circuitry. The interface circuitry couples the radio frequency integrated circuit to the processor and includes at least one communication path that may be bandwidth-limited. The radio frequency integrated circuit includes multiple receive chains that generate respective radar beat signals by downconverting multiple radar receive signals using a radar transmit signal. Through the use of the radar transmit signal, the downconversion operation performs a beating operation, and the bandwidth of the radar beat signal is narrower than the bandwidth of the radar receive signal.

[0006] A multiplexing circuit, which may be disposed within the radio frequency integrated circuit, generates at least one composite radar beat signal by multiplexing the radar beat signals together. The multiplexing circuit may use, for example, analog frequency division multiplexing (FDM), digital frequency division multiplexing, code division multiplexing (CDM), digital time division multiplexing (TDM), or digital bit packing. In some implementations, the multiplexing circuit performs sub-Nyquist sampling to reduce the sampling rate of the analog-to-digital converter due to sparsity of the spectral content of the beat signal. The multiplexing circuit may also generate a composite radar beat signal whose bandwidth is narrower than the bandwidth of the interface circuitry. Using the composite radar beat signal, the interface circuitry can pass multiple radar beat signals in parallel from the radio frequency integrated circuit to a processor, even with resource-constrained communication paths.

[0007] The demultiplexing circuit, implemented by, for example, a processor, demultiplexes the composite radar beat signal to extract the radar beat signal. For object detection or object identification, for example, the processor implements a digital beamformer that processes the radar beat signal to generate a spatial response. By analyzing the spatial response, the processor can determine the angle to the object that reflected the radar transmission signal. Based on the determined angle, the wireless transceiver can adjust transmission parameters used to transmit a subsequent uplink signal. By adjusting the transmission parameters, the processor can control the power density of the uplink signal at the object to meet targeted guidelines.

[0008] In one exemplary aspect, an apparatus for multiplexing radar beat signals is disclosed. The apparatus includes an antenna array and a wireless transceiver coupled to the antenna array. The antenna array and the wireless transceiver are collectively configured to transmit a radar transmit signal and receive two or more radar receive signals. The two or more radar receive signals represent portions of the radar transmit signal that are reflected by an object. The wireless transceiver includes a radio frequency integrated circuit having two or more receive chains and a multiplexing circuit. Each of the two or more receive chains is configured to generate a radar beat signal by downconverting a respective radar receive signal of the two or more radar receive signals using the radar transmit signal. The multiplexing circuit is coupled to the two or more receive chains and configured to multiplex the radar beat signals together to generate a composite radar beat signal.

[0009] In one exemplary aspect, an apparatus for multiplexing radar beat signals is disclosed. The apparatus includes a transmitting means for transmitting a radar transmission signal and a receiving means for receiving two or more radar reception signals. The two or more radar reception signals represent portions of the radar transmission signal that are reflected by an object. The apparatus also includes a downconversion means for generating two or more radar beat signals by downconverting the two or more radar reception signals using the radar transmission signal. The apparatus further includes a multiplexing means for generating a composite radar beat signal by multiplexing the two or more radar beat signals together.

[0010] In one exemplary aspect, a method for multiplexing radar beat signals to facilitate propagation across resource-constrained interface circuitry is disclosed. The method includes transmitting a radar transmit signal and receiving two or more radar receive signals. The two or more radar receive signals represent portions of the radar transmit signal that are reflected by an object. The method also includes downconverting the two or more radar receive signals using the radar transmit signal to generate two or more radar beat signals. The method further includes multiplexing the two or more radar beat signals together to generate a composite radar beat signal and propagating the composite radar beat signal across the resource-constrained interface circuitry.

[0011] In one exemplary aspect, an apparatus for multiplexing radar beat signals is disclosed. The apparatus includes a wireless transceiver having a radio frequency integrated circuit, the radio frequency integrated circuit including a transmit chain, two or more receive chains, and a multiplexing circuit. The radio frequency integrated circuit is configured to connect to an antenna array. The transmit chain includes an up-conversion mixer. Each of the two or more receive chains includes a down-conversion mixer having an input coupled to an output of the up-conversion mixer. The multiplexing circuit is coupled to the outputs of the two or more down-conversion mixers. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 illustrates an exemplary computing device for multiplexing radar beat signals. [Figure 2-1] FIG. 1 illustrates an exemplary operating environment for a computing device. [Figure 2-2] FIG. 1 illustrates another exemplary operating environment for a computing device. [Figure 3] FIG. 1 is an exemplary sequence flow diagram for operating a computing device. [Figure 4]FIG. 1 illustrates an exemplary wireless transceiver for multiplexing radar beat signals, including a processor, a radio frequency integrated circuit, and a multiplexing circuit. [Figure 5-1] FIG. 1 illustrates an exemplary radio frequency integrated circuit for multiplexing radar beat signals. [Figure 5-2] FIG. 1 illustrates an exemplary processor that supports multiplexing radar beat signals. [Figure 6] 1A-1C illustrate various exemplary types of multiplexing circuits for multiplexing radar beat signals. [Figure 7-1] FIG. 1 illustrates an exemplary analog frequency division multiplexing circuit for multiplexing radar beat signals. [Figure 7-2] FIG. 1 illustrates an exemplary digital frequency division multiplexing circuit for multiplexing radar beat signals. [Figure 8] FIG. 2 illustrates an exemplary code division multiplexing circuit for multiplexing radar beat signals. [Figure 9-1] FIG. 1 illustrates an exemplary digital time division multiplexing circuit for multiplexing radar beat signals. [Figure 9-2] FIG. 1 illustrates an exemplary digital packing circuit for multiplexing radar beat signals. [Figure 10] FIG. 1 is a flow diagram illustrating an example process for multiplexing radar beat signals. DETAILED DESCRIPTION OF THE INVENTION

[0013] Implementations of high-frequency, short-wavelength communications may balance performance with the need to meet the Federal Communications Commission's maximum permissible exposure limits (e.g., FCC MPE limits). Devices that correctly achieve this balance can take advantage of increased data rates, such as those enabled by 5G and Wi-Fi 6™ wireless communications. Because MPE limits are affected by a user's proximity to a device's antenna, techniques described herein can be used to detect a user's proximity to a device and improve wireless performance while staying within the FCC MPE limits. Based on the detected proximity, a device can balance the power density of its transmitted wireless signals with the requirement to meet the MPE limits. As a result, the device is permitted to transmit wireless signals with higher average power levels, which allows the wireless signals to travel greater distances, such as between a smartphone and a remote cellular base station.

[0014] Some proximity detection techniques use dedicated sensors to detect users, such as cameras or infrared sensors. However, these sensors can be bulky or expensive. Furthermore, a single electronic device may include multiple antennas located on different surfaces (e.g., on the top, bottom, front, or both sides). To account for each of these antennas, multiple cameras or other sensors may need to be mounted near each of these antennas, which further increases the cost and size of the electronic device.

[0015] The techniques described herein use a wireless transceiver to perform radar sensing in addition to wireless communication. Using radar sensing, nearby objects (e.g., a user's appendages) may be detected, and transmission parameters of subsequent uplink signals for wireless communication may be adjusted to meet targeted guidelines, such as MPE limits determined by the FCC. In particular, the wireless transceiver may use radar sensing to determine the distance to the object (e.g., crow flies) and adjust the power density of the uplink signal based on the distance to the object.

[0016] It is also desirable to determine an angle to an object so that subsequent uplink signals can be steered away from the object to reduce power density at the object. However, the design of a wireless transceiver can make determining this angle via radar sensing problematic. For example, if the wireless transceiver performs analog beamforming using analog phase shifters, these analog phase shifters may not have enough bit resolution to achieve target angle resolution for radar sensing.

[0017] In addition to or instead of using analog beamforming, digital beamforming can be used to determine the angle to an object. Generally, digital beamforming analyzes the phase rotation across multiple receive antenna elements in the digital domain to determine the angle of arrival of a received signal. However, the design of a wireless transceiver can make it cumbersome to pass information from multiple receive chains to a processor (e.g., a modem or digital signal processor) for digital beamforming. For example, the interface between the radio frequency integrated circuit and the processor may include one or fewer communication paths (e.g., electrical connectors) for reception than there are antennas receiving the signals. While using a limited number of communication paths, including one, for reception can reduce interference and noise within the wireless transceiver and reduce the footprint, it does not easily support parallel propagation of multiple receive signals associated with multiple receive chains. Furthermore, the bandwidth of the electrical connector may be smaller than the bandwidth of the received radar signal. Therefore, passing individual radar signals associated with different antenna elements of the antenna array during radar sensing for techniques such as digital beamforming or classification of detected objects can be even more cumbersome.

[0018] To address this issue, techniques for multiplexing radar beat signals that can be used for object detection are described herein. Object detection can further include object identification and / or ranging. In an exemplary implementation, a wireless transceiver includes a radio frequency integrated circuit, a processor, and interface circuitry. The interface circuitry couples the radio frequency integrated circuit to the processor and includes at least one communication path that may be bandwidth-limited. The radio frequency integrated circuit includes multiple receive chains that generate respective radar beat signals by downconverting multiple radar receive signals using a radar transmit signal. Through the use of the radar transmit signal, the downconversion operation performs a beating operation, and the bandwidth of the radar beat signal is narrower than the bandwidth of the radar receive signal.

[0019] A multiplexing circuit, which may be disposed within the radio frequency integrated circuit, generates at least one composite radar beat signal by multiplexing the radar beat signals together. The multiplexing circuit may use, for example, analog frequency division multiplexing (FDM), digital frequency division multiplexing, code division multiplexing (CDM), digital time division multiplexing (TDM), or digital bit packing. In some implementations, the multiplexing circuit performs sub-Nyquist sampling to reduce the sampling rate of the analog-to-digital converter due to sparsity of the spectral content of the beat signal. The multiplexing circuit may also generate a composite radar beat signal whose bandwidth is narrower than the bandwidth of the interface circuitry. Using the composite radar beat signal, the interface circuitry can pass multiple radar beat signals in parallel from the radio frequency integrated circuit to a processor, even with resource-constrained communication paths.

[0020] The demultiplexing circuit, implemented by, for example, a processor, demultiplexes the composite radar beat signal to extract the radar beat signal. For object detection, the processor implements a digital beamformer that processes the radar beat signal to generate a spatial response. By analyzing the spatial response, the processor can determine the angle to the object that reflected the radar transmission signal. Based on the determined angle, the wireless transceiver can adjust transmit parameters used to transmit a subsequent uplink signal. By adjusting the transmit parameters, the processor can control the power density of the uplink signal at the object to meet targeting guidelines.

[0021] 1 illustrates an exemplary computing device 102 for multiplexing radar beat signals. In the environment 100, the computing device 102 communicates with a base station 104 over a wireless communication link 106 (wireless link 106). In this example, the computing device 102 is illustrated as a smartphone. However, the computing device 102 may be implemented as any suitable computing or electronic device, such as a modem, a cellular base station, a broadband router, an access point, a cellular phone, a gaming device, a navigation device, a media device, a laptop computer, a desktop computer, a tablet computer, a wearable computer, a server, a network-attached storage (NAS) device, a smart appliance or other Internet of Things (IoT) device, a medical device, a vehicle-based communication system, a radar, a radio, etc.

[0022] The base station 104 communicates with the computing device 102 via a wireless link 106, which may be implemented as any suitable type of wireless link. While illustrated as a tower of a cellular network, the base station 104 may represent or be implemented as another device, such as a satellite, a server device, a terrestrial television broadcast tower, an access point, a peer-to-peer device, a mesh network node, etc. Thus, the computing device 102 may communicate with the base station 104 or another device via a wireless connection or a combination of wireless and wired connections.

[0023] The wireless link 106 may include a downlink of data or control information communicated from the base station 104 to the computing device 102, or an uplink of other data or control information communicated from the computing device 102 to the base station 104. The wireless link 106 may be implemented using any suitable communications protocol or standard, such as second-generation (2G), third-generation (3G), fourth-generation (4G), or fifth-generation (5G) cellular, IEEE 802.11 (e.g., Wi-Fi™), IEEE 802.15 (e.g., Bluetooth™), IEEE 802.16 (e.g., WiMAX™), etc. In some implementations, the base station 104 is a power source, and the wireless link 106 provides power wirelessly from the base station 104 to the computing device 102.

[0024] As shown, computing device 102 includes an application processor 108 and a computer-readable storage medium 110 (CRM 110). The application processor 108 may include any type of processor, such as a multi-core processor, that executes processor-executable code stored by the CRM 110. The CRM 110 may include any suitable type of data storage medium, such as volatile memory (e.g., random access memory (RAM)), non-volatile memory (e.g., flash memory), optical media, magnetic media (e.g., disks), etc. In the context of the present disclosure, the CRM 110 is implemented to store instructions 112, data 114, and other information for the computing device 102 and, therefore, does not include a transitory, propagating signal or carrier wave.

[0025] Computing device 102 may also include input / output ports 116 (I / O ports 116) and a display 118. I / O ports 116 enable data exchange or interaction with other devices, networks, or users. I / O ports 116 may include serial ports (e.g., Universal Serial Bus (USB) ports), parallel ports, audio ports, infrared (IR) ports, user interface ports such as touch screens, and the like. Display 118 presents graphics for computing device 102, such as user interfaces associated with an operating system, programs, or applications. Alternatively or additionally, display 118 may be implemented as a display port or virtual interface through which graphical content for computing device 102 is presented.

[0026] The wireless transceiver 120 of the computing device 102 provides connectivity to respective networks and other electronic devices connected thereto. Alternatively or additionally, the computing device 102 may include a wired transceiver, such as an Ethernet or fiber optic interface, for communicating over a local network, an intranet, or the Internet. The wireless transceiver 120 may facilitate communication over any suitable type of wireless network, such as a wireless local area network (LAN) (WLAN), a peer-to-peer (P2P) network, a mesh network, a cellular network, a wireless wide area network (WWAN), and / or a wireless personal area network (WPAN). In the context of the exemplary environment 100, the wireless transceiver 120 enables the computing device 102 to communicate with the base station 104 and the network connected to the base station 104. However, the wireless transceiver 120 may also enable the computing device 102 to communicate “directly” with other devices or networks.

[0027] The wireless transceiver 120 includes circuitry and logic for transmitting and receiving communication signals via the antenna array 122. Components of the wireless transceiver 120 may include amplifiers, switches, mixers, analog-to-digital converters, filters, etc. for conditioning communication signals (e.g., for generating or processing signals). The wireless transceiver 120 may also include logic for performing in-phase / quadrature (I / Q) operations such as combining, encoding, modulation, decoding, and demodulation. In some cases, the components of the wireless transceiver 120 are implemented as separate receiver and transmitter entities. Additionally or alternatively, the wireless transceiver 120 may be realized using multiple or different sections (e.g., separate transmit and receive chains) for performing respective receive and transmit operations. Generally, the wireless transceiver 120 processes data and / or signals associated with communicating data for the computing device 102 via the antenna array 122.

[0028] The wireless transceiver 120 also includes a radio frequency integrated circuit (IC) 124, a processor 126, and interface circuitry 128. The interface circuitry 128 couples the radio frequency integrated circuit 124 to the processor 126. In some implementations, at least a portion of the interface circuitry 128 includes a resource-constrained interface. The resource-constrained interface may prevent the wireless transceiver 120 from independently and in parallel (or independently and simultaneously) propagating information from multiple receive chains of the radio frequency integrated circuit 124 to the processor 126.

[0029] For example, a resource-constrained interface may have a limited number of communication paths (e.g., a limited number of electrical connectors) between at least two circuits for processing receive operations involving propagating receive signals between the at least two circuits. The two circuits may include a radio frequency integrated circuit 124 and a processor 126, a radio frequency integrated circuit 124 and another integrated circuit, or another integrated circuit and a processor 126. The limited number of communication paths may be less than the number of receive signals to be propagated, for example, to perform digital beamforming. In such a case, there are not enough communication paths to independently propagate receive signals in parallel.

[0030] Additionally or alternatively, the resource-constrained interface may have a relatively narrow bandwidth, smaller than the bandwidth of the radar receive signal. As an example, the bandwidth of the resource-constrained interface may be on the order of 100 megahertz (e.g., approximately 100 MHz), while the bandwidth of the radar receive signal may be on the order of gigahertz (GHz) (e.g., 1 GHz or greater). Thus, there is insufficient bandwidth for direct radar receive signals to propagate independently without losing information. To address these challenges arising from a limited number of communication paths or bandwidth limitations, techniques described herein for multiplexing radar beat signals may enable information from multiple receive chains to propagate across such a resource-constrained interface.

[0031] In some cases, the interface circuitry 128 includes a single communication path between at least two circuits within the wireless transceiver 120. Using this single communication path, the interface circuitry 128 can pass signals for transmission, signals for reception, and control information. In some implementations, the control information propagates through the communication path during the same time that signals for transmission or signals for reception propagate through the communication path. The interface circuitry 128 can include a serial interface and can use Manchester encoding and decoding to pass control information across the serial interface from the processor 126 to another circuit within the wireless transceiver 120.

[0032] The interface circuitry 128 can include other integrated circuits, such as baseband and / or intermediate frequency integrated circuits. The baseband integrated circuits can include digital-to-analog converters and analog-to-digital converters that convert baseband signals between the digital and analog domains. The intermediate frequency integrated circuits can include mixers that upconvert baseband signals to an intermediate frequency or downconvert intermediate frequency signals to baseband. The intermediate frequency can be on the order of several GHz, such as between approximately 5 GHz and 15 GHz.

[0033] The radio frequency integrated circuit 124 upconverts baseband or intermediate frequency signals to radio frequencies and downconverts radio frequency signals to baseband or intermediate frequencies. Radio frequencies may include frequencies in the ultra-high frequency spectrum, such as frequencies between or above approximately 24 GHz and 39 GHz (e.g., 57-66 GHz, 71-86 GHz, or any frequencies therebetween or higher). The radio frequency integrated circuit 124 includes multiple receive chains (as shown in FIG. 5-1 ) and a multiplexing circuit 130. The multiple receive chains receive multiple radar receive signals and perform a beating operation to generate multiple radar beat signals by downconverting the radar receive signals using the radar transmit signal.

[0034] The multiplexing circuit 130 generates at least one composite radar beat signal by multiplexing the radar beat signals together. By providing the composite radar beat signal to the interface circuitry 128, the interface circuitry 128 can propagate the radar beat signal in parallel from the radio frequency integrated circuit 124 to the processor 126. Generally, the multiplexing circuit 130 combines the respective received signals propagating through the multiple receive chains into one or more composite signals. Although described with respect to radar beat signals, the multiplexing circuit 130 may also be used to multiplex multiple downlink signals together to support digital beamforming during wireless communication. Alternatively, the multiplexing circuit 130 may be bypassed during wireless communication.

[0035] The processor 126, which may comprise a modem or digital signal processor, may be implemented within the wireless transceiver 120 or separately from the wireless transceiver 120. While not explicitly shown, the processor 126 may comprise a portion of the CRM 110 or may access the CRM 110 to obtain computer-readable instructions. The processor 126 controls the wireless transceiver 120 and enables wireless communication and object detection to be performed. For object detection, the processor 126 may determine the proximity (e.g., linear distance) of an object or the angular position of an object. The processor 126 may provide communication data to the wireless transceiver 120 for transmission. The processor 126 may also process baseband versions of signals received from the wireless transceiver 120 to generate data, which may be provided to other portions of the computing device 102 via a communication interface for wireless communication or object detection.

[0036] Generally, the processor 126 may control the operating mode of the wireless transceiver 120 or may have knowledge of the active operating mode. Different types of operating modes may include an object detection mode, a wireless communication mode, various transceiver modes (e.g., a transmit mode or a receive mode), various power modes (e.g., a low power mode or a high power mode), various resource control states (e.g., a connected mode, an inactive mode, or an idle mode), various modulation modes (e.g., a lower order modulation mode such as a quadrature phase shift keying (QPSK) mode, or a higher order modulation mode such as 64 quadrature amplitude modulation (QAM) or 256 QAM), etc. Additionally, the processor 126 may adjust one or more transmission parameters of the wireless transceiver 120.

[0037] Processor 126 may include baseband circuitry for performing high-rate sampling processes, which may include analog-to-digital conversion, digital-to-analog conversion, gain correction, skew correction, frequency conversion, demultiplexing, digital beamforming, MPE techniques, etc. In Figure 1, processor 126 includes demultiplexing circuitry 132 and digital beamformer 134. Demultiplexing circuitry 132 demultiplexes the composite radar beat signal to extract the radar beat signal.

[0038] The digital beamformer 134 processes the radar beat signals to generate a spatial response. Generally, the digital beamformer 134 is implemented by the processor 126 due to limited space available within other circuitry of the wireless transceiver 120. However, other implementations may integrate the digital beamformer 134 within other circuitry of the wireless transceiver 120. Consider an example in which the radio frequency integrated circuit 124 includes a digital signal processor with sufficient processing power to implement the digital beamformer 134. In this case, the digital beamformer 134 is integrated within the radio frequency integrated circuit 124 rather than the processor 126.

[0039] The processor 126 analyzes the spatial response to determine the angle to the object that reflected the radar transmission. Based on the determined angle, the processor 126 can adjust one or more transmit parameters of the wireless transceiver 120 used to transmit the subsequent uplink signal. In particular, the processor 126 can adjust the transmit parameters to control the power density of the uplink signal at the object and to meet MPE guidelines.

[0040] Generally, the multiplexing circuit 130 and the demultiplexing circuit 132 are disposed in two separate circuits that are connected together by a resource-constrained interface. In the above implementation shown in FIG. 1, the resource-constrained interface is between the radio frequency integrated circuit 124 and the processor 126. Thus, the multiplexing circuit 130 is implemented in the radio frequency integrated circuit 124, and the demultiplexing circuit 132 is implemented in the processor 126.

[0041] In another implementation, not shown, the resource-constrained interface resides across a portion of the interface circuitry 128, such as between the radio frequency integrated circuit 124 and another integrated circuit (e.g., an intermediate frequency integrated circuit) disposed within the interface circuitry 128. In this case, the multiplexing circuit 130 is disposed within the radio frequency integrated circuit 124, and the demultiplexing circuit is disposed within an integrated circuit within the interface circuitry 128. In an additional implementation, not shown, the resource-constrained interface resides between an integrated circuit disposed within the interface circuitry 128 and the processor 126. Thus, the multiplexing circuit 130 is disposed within the interface circuitry 128, and the demultiplexing circuit 132 is disposed within the processor 126. Depending on where the multiplexing circuit 130 or the demultiplexing circuit 132 are implemented within the wireless transceiver 120, these circuits may be implemented using analog components, digital components, or a combination thereof.

[0042] 2-1 illustrates an exemplary operating environment 200 for a computing device 102. In the exemplary environment 200, a user's hand 214 holds the computing device 102. In one aspect, the computing device 102 communicates with a base station 104 by transmitting an uplink signal 202 (UL signal 202) or receiving a downlink signal 204 (DL signal 204) via an antenna array 122. However, the user's thumb may represent a nearby object 206 that may be exposed to radiation via the uplink signal 202 and may block at least a portion of the antenna array 122.

[0043] The antenna array 122 includes multiple antenna elements 208, such as antenna elements 208-1, 208-2...208-N, where N represents a positive integer greater than 2. The antenna array 122 may be a linear or multidimensional antenna array and may be configured for beam management techniques, such as beam determination, beam measurement, beam reporting, or beam sweeping. The distance between the antenna elements 208 in the antenna array 122 may be based on the frequency at which the wireless transceiver 120 radiates. For example, the antenna elements 208-1 through 208-N may be spaced apart by approximately half a wavelength from each other (e.g., approximately ½ centimeter (cm) apart for frequencies around 30 GHz). The antenna elements 208-1 through 208-N may be implemented using any type of antenna, including patch antennas, dipole antennas, bowtie antennas, or a combination thereof.

[0044] To detect whether an object 206 is present or within a detectable distance and angle, the computing device 102 transmits a radar transmission signal 210 via at least one antenna element 208 of the antenna array 122. The radar transmission signal 210 may be a frequency-modulated continuous-wave (FMCW) signal or a frequency-modulated pulse signal. Types of frequency modulation may include linear frequency modulation, triangular frequency modulation, sawtooth frequency modulation, etc.

[0045] The computing device 102 additionally receives two or more radar receive signals 212-1 through 212-M via two or more other antenna elements 208 of the antenna array 122, where M represents a positive integer greater than 1. The radar receive signals 212-1 through 212-M represent portions of the radar transmit signal 210 that are reflected by the object 206 and individually received by the antenna elements 208 of the antenna array 122. Due to different physical locations of the antenna elements 208 and scattering of the radar transmit signal 210, the radar receive signals 212-1 through 212-M may be out of phase with each other. In some cases, the radar receive signals 212-1 through 212-M are received during a portion of the time that the radar transmit signal 210 is transmitted. Based on the radar receive signals 212-1 through 212-M, the distance to and angle to the object 206 may be determined.

[0046] In general, the number of antenna elements 208-1 through 208-M used for transmission or reception may vary based on the operating mode of the wireless transceiver 120, or may vary over time for the same operating mode. During an object detection mode, for example, one of the antenna elements 208-1 through 208-N is used for transmission, and at least one of the antenna elements 208-1 through 208-N is used for reception. During reception, a single antenna element 208 may be used to enable the computing device 102 to determine the distance to the object 206. Alternatively or additionally, at least two antenna elements 208 may be used to enable the computing device 102 to determine the angle to the object. In contrast, during a wireless communication mode using time division duplexing, all of the antenna elements 208-1 through 208-N may be used to transmit the uplink signal 202 during a first time, and all of the antenna elements 208-1 through 208-N may be used to receive the downlink signal 204 during a second time. In other words, wireless transceiver 120 dynamically uses any number of antenna elements 208-1 through 208-M for transmission and reception.

[0047] FIG. 2-2 illustrates another exemplary operating environment 216 for a computing device 102. In the illustrated configuration, the computing device 102 includes antenna arrays 122-1 and 122-2. Through the antenna arrays 122-1 and 122-2, the computing device 102 can communicate with a base station 104 through multiple signal paths 218-1 through 218-3. A first signal path 218-1 represents a direct signal path between the antenna array 122-1 and the base station 104. A second signal path 218-2 represents an indirect signal path between the antenna array 122-1, a reflector 220, and the base station 104. A third signal path 218-3 represents an indirect signal path between the antenna array 122-2, a reflector 220, and the base station 104.

[0048] In the illustrated environment, a finger 206 blocks the first signal path 218-1. Through object detection, the computing device 102 determines that the antenna array 122-1 is blocked. Accordingly, the computing device 102 can adjust transmission parameters for the uplink signal 202 based on the detection. In some implementations, the transmission parameters specify a different beam steering angle that allows the uplink signal 202 to be transmitted through the antenna array 122-1 using the second signal path 218-2 rather than the first signal path 218-1. The beam steering angle can reduce radiation exposure at the finger 206 by directing the main lobe of the uplink signal 202 away from the finger 206. Additionally or alternatively, the transmit power for the uplink signal 202 can be reduced for the second signal path 218-2 or the first signal path 218-1. In other situations, the transmission parameters can specify a different antenna array 122 for transmitting the communication signal. For example, antenna array 122-2 may be used rather than antenna array 122-1 to transmit uplink signal 202 using third signal path 218-3. By adjusting transmission parameters, computing device 102 may maintain communication with base station 104 while ensuring compliance. An exemplary sequence for switching between wireless communication mode and object detection mode is further described with respect to FIG.

[0049] 3 illustrates, in a time-delayed manner, an example sequence flow diagram 300 for operating the computing device 102. Examples of wireless communication modes are shown at 302 and 306, and examples of object detection modes are shown at 304 and 308. The object detection mode may be performed at regular time intervals, between active data cycles occurring during wireless communication, at predetermined times as set by the processor 126, during unused random access channel (RACH) time slots, as part of an initialization process before wireless communication occurs, in response to detection of device movement, or based on an indication that a user may be in proximity to the device (e.g., based on the wireless transceiver 120 observing a drop in power in the downlink signal 204 or the application processor 108 determining that a user is interacting with the display 118 of the computing device 102), or during other times or in response to other events. In some situations, the computing device 102 multiplexes radar beat signals during the object detection mode at 304 and / or 308 to determine an angle to an object. However, multiplexing of radar beat signals is not necessary for some types of radar sensing, such as determining the distance to an object.

[0050] At 302, the wireless transceiver 120 transmits a high-power (e.g., conventional) uplink signal 202-1 configured to provide sufficient range to a destination, such as a base station 104. After transmitting the uplink signal 202-1, a radar transmission signal 210-1 is transmitted at 304 via the wireless transceiver 120 and the antenna array 122. As described above, the radar transmission signal 210 may enable the computing device 102 to detect an object 206 and determine whether the object 206 is near the computing device 102. In this case, the radar transmission signal 210-1 is represented by a low-power, wideband signal. Based on the detection, the wireless transceiver 120 can adjust transmission parameters for the subsequent uplink signal 202 to take into account MPE compliance guidelines.

[0051] The object detection mode can also determine the distance to and angle to the object 206, thereby allowing the transmission of the uplink signal 202 to comply with distance- and angle-dependent guidelines, such as maximum power density. Because power density is proportional to transmit power and inversely proportional to distance, an object 206 at a closer range will be exposed to a greater power density for the same transmit power level than another object 206 at a greater distance. Therefore, a similar power density at the object 206 can be achieved by increasing the transmit power level when the object 206 is at a greater distance and decreasing the transmit power level when the object 206 is at a closer distance.

[0052] The power density at the object 206 also depends on the beam steering angle (e.g., the angle of the main lobe of the radiation pattern). Steering the beam steering angle away from the object, for example, reduces the power density at the object 206. By controlling the transmit power and / or the beam steering angle, the wireless transceiver 120 can tailor the transmission of the uplink signal 202 to allow the power density at the object 206 to be less than the maximum power density. At the same time, because the distance and angle are known, the transmit power level can be increased to a level that facilitates wireless communication and meets compliance guidelines.

[0053] At 306, the wireless transceiver 120 transmits the subsequent uplink signal 202. In the illustrated example, if no object 206 is detected, a high-power uplink signal 202-2 is transmitted. Alternatively, if an object 206 is detected, a low-power uplink signal 202-3 is transmitted. The low transmit power may be, for example, between approximately 5 and 20 decibel milliwatts (dBm) less than the high-power signal at 302. In addition to or instead of changing the power of the subsequent uplink signal 202, the uplink signal 202 may be transmitted using a different antenna array within the computing device 102, using a different beam steering angle, using a different frequency, or using a different communication protocol (e.g., as compared to the antenna array, beam steering angle, frequency, or communication protocol used to transmit the uplink signal 202-1 at 302). Although not shown, the wireless transceiver 120 can alternatively skip the wireless communication mode at 306 and perform a different object detection mode using a different antenna array or different transmit power levels to detect objects 206 at various locations or distances around the computing device 102.

[0054] At 308, the wireless transceiver 120 and antenna array 122 transmit another radar transmission 210-2 to attempt to detect the object 206. By scheduling multiple radar transmissions 210 over a period of time, the transmission of the uplink signal 202 can be dynamically adjusted based on the changing environment or movement by the object 206. Furthermore, appropriate adjustments can be made to balance communication performance with compliance or emissions requirements.

[0055] The above-described sequences may also be applied to other antenna arrays within the computing device 102. Other antenna arrays may transmit multiple radar transmit signals 210 serially or in parallel. To enable digital beamforming for object detection, the wireless transceiver 120 multiplexes multiple radar beat signals together, as further described with respect to FIGS. 4 and 5-1.

[0056] 4 illustrates an exemplary wireless transceiver 120 for multiplexing radar beat signals. The wireless transceiver 120 includes at least one radio frequency transmit (RF TX) node 402 and two or more radio frequency receive (RF RX) nodes 404, such as radio frequency receive nodes 404-1, 404-2, ... 404-M. The radio frequency transmit node 402 and the radio frequency receive nodes 404-1 through 404-M are coupled to respective antenna elements 208-1 through 208-N of the antenna array 122 (shown in FIG. 2-1). The wireless transceiver 120 also includes a transmitter 406 and a receiver 408, portions of which are disposed within the radio frequency integrated circuit, interface circuitry 128, and processor 126.

[0057] During operation, the processor 126 obtains data 410 from the computing device 102. The data 410 may include communication data to be transmitted to another entity, such as the base station 104. In some circumstances, the data 410 includes a request from a radar-based function or application of the computing device 102 to perform object detection. As an example, the data 410 may be provided by the application processor 108. For wireless communication, the processor 126 provides the data 410 to the interface circuitry 128 (e.g., to the transmitter 406). However, it should be noted that the object detection process may be initiated by the processor 126 autonomously or separately from the application processor 108. For example, the processor 126 may determine a beamforming pattern without explicit instructions from the application processor 108.

[0058] The interface circuitry 128 provides the transmit signal 412 to the radio frequency integrated circuit 124. Additionally, the interface circuitry 128 provides the control information 420 to the radio frequency integrated circuit 124. In some implementations, the processor 126 uses frequency division multiplexing to allow both the transmit signal 412 and the control information 420 to be passed over a single communication path within the interface circuitry 128. In other implementations, the transmit signal 412 and the control information 420 are passed to the radio frequency integrated circuit 124 using separate communication paths.

[0059] The control information 420 includes at least one transmit parameter and / or at least one receive parameter that configures at least one component within the transmitter 406 or receiver 408, respectively. As an example, the control information 420 specifies the gain of an amplifier (e.g., a power amplifier, a low noise amplifier, or a variable gain amplifier), phase shift information for an analog phase shifter, the operating state of a switch connecting an antenna element 208 of a selected antenna array 122 to the transmitter 406 or receiver 408, etc.

[0060] Depending on the operating mode of the wireless transceiver 120, the transmit signal 412 may be used to generate the uplink signal 202 or the radar transmit signal 210. The processor 126 or the interface circuitry 128 may generate the transmit signal 412. In some implementations, the interface circuitry 128 further conditions the transmit signal 412. For example, the interface circuitry 128 may convert the transmit signal 412 from the digital domain to the analog domain, modulate characteristics of the transmit signal 412 based on the data 410, filter the transmit signal 412, or upconvert the transmit signal 412.

[0061] The radio frequency integrated circuit 124 upconverts the transmit signal 412 from a baseband frequency or an intermediate frequency to a radio frequency to generate the uplink signal 202 or radar transmit signal 210. The radio frequency integrated circuit 124 provides the uplink signal 202 or radar transmit signal 210 to the antenna array 122 for transmission.

[0062] The antenna array 122 can additionally receive multiple downlink signals 204-1, 204-2...204-M or radar received signals 212-1 through 212-M using multiple antenna elements 208. According to the wireless communication mode, the radio frequency integrated circuit 124 downconverts the downlink signals 204-1 through 204-M using a local oscillator signal. In some implementations, the radio frequency integrated circuit 124 includes an analog beamformer that adjusts the phases of the multiple downlink signals 204-1 through 204-M and combines the phase-shifted downlink signals 204-1 through 204-M to generate a composite downlink signal 414. In other implementations, the multiplexing circuit 130 generates the composite downlink signal 414 by multiplexing the multiple downlink signals 204-1 through 204-M together, for example, for digital beamforming.

[0063] For object detection, the radio frequency integrated circuit 124 performs a beating operation using the radar receive signals 212-1 through 212-M and the radar transmit signal 210 to generate a radar beat signal (shown in FIG. 5-1). The multiplexing circuit 130 multiplexes the radar beat signals together to generate a composite radar beat signal 416. As described above with respect to FIG. 1, the multiplexing circuit 130 may be implemented within the radio frequency integrated circuit 124 or within another integrated circuit of the interface circuitry 128. Depending on the implementation, the analog beamformer may also adjust the phase of the radar receive signals 212-1 through 212-M before the multiplexing circuit 130 generates the composite radar beat signal 416.

[0064] The interface circuitry 128 provides the composite downlink signal 414 or the composite radar beat signal 416 to a demultiplexing circuit 132, which may be implemented within the processor 126 or within a separate integrated circuit from the interface circuitry 128, as described above with respect to FIG. 1. In some implementations, the interface circuitry 128 further conditions the composite downlink signal 414 or the composite radar beat signal 416. For example, the interface circuitry 128 may further downconvert the composite downlink signal 414 or the composite radar beat signal 416, filter the composite downlink signal 414 or the composite radar beat signal 416, or convert the composite downlink signal 414 or the composite radar beat signal 416 from the analog domain to the digital domain.

[0065] In the wireless communication mode, the demultiplexing circuit 132 demultiplexes the composite downlink signal 414 to extract the downlink signals 204-1 through 204-M. Additionally or alternatively, in the object detection mode, the demultiplexing circuit 132 demultiplexes the composite radar beat signal 416 to extract the radar beat signals associated with at least a portion of the antenna elements 208-1 through 208-N.

[0066] The processor 126 acquires and analyzes the demultiplexed downlink signals 204-1 through 204-M or the demultiplexed radar beat signals to generate data 418 for the computing device 102. The data 418 may be provided to the processor 108 to communicate the data to a user or provide a proximity alert. The processor 126 can also analyze the demultiplexed signals and use digital beamforming to determine an angle to a base station for a wireless communication mode or an angle to an object 206 for an object detection mode. Components of the transmitter 406 and receiver 408 are further described with respect to FIG. 5-1 .

[0067] 5-1 shows an exemplary radio frequency integrated circuit 124 for multiplexing radar beat signals. Although described with respect to an object detection mode, the components in FIG. 5-1 can perform similar operations for a wireless communication mode.

[0068] In the illustrated configuration, radio frequency integrated circuit 124 includes at least one radio frequency transmit chain 502 disposed in transmitter 406 and multiple radio frequency receive chains 504-1 through 504-M disposed in receiver 408. Radio frequency transmit chain 502 is coupled to a transmit antenna element 506 of antenna array 122. Radio frequency receive chains 504-1 through 504-M are coupled to receive antenna elements 508-1 through 508-M, respectively, of antenna array 122. Together, transmit antenna element 506 and receive antenna elements 508-1 through 508-M represent at least a portion of antenna elements 208-1 through 208-N shown in FIG. 2-1 .

[0069] The radio frequency transmit chain 502 includes an upconversion mixer 510 and an amplifier 512 (e.g., a power amplifier). One input of the upconversion mixer 510 is coupled to a local oscillator 514, and another input of the upconversion mixer 510 is coupled to the interface circuitry 128. The local oscillator 514 may be implemented as a voltage-controlled oscillator that generates a local oscillator signal 516. In the wireless communication mode, the local oscillator 514 generates the local oscillator signal 516, which should have a constant frequency that does not change substantially over time. However, in the object detection mode, the local oscillator 514 generates the local oscillator signal 516, which should have a frequency that changes over time (e.g., linearly increases or decreases over time). Using the local oscillator signal 516, the upconversion mixer 510 increases the frequency of the transmit signal 412 to generate the radar transmit signal 210. Amplifier 512 further amplifies radar transmit signal 210 for transmission.

[0070] The radio frequency receive chains 504-1 through 504-M include amplifiers 518-1 through 518-M (e.g., low-noise amplifiers) and down-conversion mixers 520-1 through 520-M, respectively. The amplifiers 518-1 through 518-M are coupled to the receive antenna elements 508-1 through 508-M, respectively, and amplify the radar receive signals 212-1 through 212-M. The inputs of the down-conversion mixers 520-1 through 520-M are coupled to a switch 540. The switch 540 dynamically connects the inputs of the down-conversion mixers 520-1 through 520-M to the output of the up-conversion mixer 510 for the object detection mode or to the output of the local oscillator 514 for the wireless communication mode. The other input of each of the down-conversion mixers 520-1 through 520-M is coupled to a respective amplifier 518-1 through 518-M. The outputs of downconversion mixers 520-1 to 520-M are coupled to multiplexing circuit 130. Downconversion mixers 520-1 to 520-M downconvert radar received signals 212-1 to 212-M using radar transmit signal 210 provided by upconversion mixer 510. By using radar transmit signal 210, downconversion mixers 520-1 to 520-M perform a beating operation to generate radar beat signals 522-1 to 522-M.

[0071] In an exemplary implementation, radar beat signals 522-1 through 522-M are time-domain signals having respective frequencies approximately equal to the respective differences between the frequency of radar transmit signal 210 and the respective frequencies of radar receive signals 212-1 through 212-M. Based on these differences and assuming a detection range for the object detection mode of approximately 30 centimeters, the frequencies of radar beat signals 522-1 through 522-M may be, for example, approximately less than 1 MHz. Accordingly, the frequencies of radar beat signals 522-1 through 522-M are proportional to the distance between antenna array 122 and at least a portion of object 206 that reflects radar transmit signal 210. Due to the beating behavior, the bandwidths of radar beat signals 522-1 through 522-M are narrower than the bandwidths of corresponding radar receive signals 212-1 through 212-M. In some cases, these bandwidths are also narrower than the bandwidths of downlink signals 204-1 through 204-M, which may be on the order of several hundred MHz. Radio frequency receive chains 504-1 through 504-M provide radar beat signals 522-1 through 522-M to multiplexing circuitry 130.

[0072] Multiplexing circuitry 130 multiplexes radar beat signals 522-1 through 522-M together to generate composite radar beat signal 416, which is provided to interface circuitry 128. Exemplary techniques for generating composite radar beat signal 416, which may be analog or digital, are described below with reference to FIGS. 6 through 9-2. Interface circuitry 128 passes composite radar beat signal 416 to demultiplexing circuitry 132 using at least one communication path (not explicitly shown). Generally, the number of communication paths traversing at least a portion of interface circuitry 128 is less than the number of radar beat signals 522-1 through 522-M (e.g., the number of communication paths is less than M).

[0073] The multiplexing circuit 130 may generate the composite radar beat signal 416 such that the bandwidth of the composite radar beat signal 416 is smaller than the bandwidth of the interface circuitry 128. For example, if the bandwidth of the interface circuitry 128 is approximately 100 MHz, the bandwidth of the composite radar beat signal 416 may be less than 50 MHz. In some implementations, the bandwidth of the composite radar beat signal 416 may be on the order of a few MHz, such as less than 5 MHz. Generally, the bandwidth of the composite radar beat signal 416 depends on the number of radar beat signals 522-1 through 522-M and / or the design of the multiplexing circuit 130, as further described with respect to FIG. 6. The composite radar beat signal 416 is provided to the demultiplexing circuit 132, as further described with respect to FIG. 5-2.

[0074] Some of the figures described herein show RFICs 124 coupled to antenna arrays 122. In some embodiments, each antenna array 122 is coupled to a respective RFIC 124. In some such embodiments, antenna arrays 122 and respective RFICs 124 are packaged together in the same module. In some embodiments, several antenna arrays (e.g., antenna arrays 122-1 and 122-2) are coupled to a common RFIC 124.

[0075] 5-2 illustrates an exemplary processor 126 that supports multiplexing radar beat signals. In the illustrated configuration, the processor 126 includes a demultiplexing circuit 132, digital receive chains 524-1, 524-2...524-M, and a digital beamformer 134. The processor 126 also includes an object classification module 528, an angle estimation module 530, and a transmit (TX) parameter adjustment module 532.

[0076] The interface circuitry 128 provides the composite radar beat signal 416 to the demultiplexing circuitry 132. In some cases, the interface circuitry 128 or the processor 126 digitizes the composite radar beat signal 416 using an analog-to-digital converter before providing the composite radar beat signal 416 to the demultiplexing circuitry 132.

[0077] Demultiplexing circuit 132 is coupled between interface circuitry 128 and digital receive chains 524-1 through 524-M. Demultiplexing circuit 132 demultiplexes composite radar beat signal 416 to extract radar beat signals 522-1, 522-2, ... 522-M. To demultiplex composite radar beat signal 416, demultiplexing circuit 132 performs an operation that is reciprocal compared to the multiplexing operation performed by multiplexing circuit 130. Demultiplexing circuit 132 provides radar beat signals 522-1 through 522-M to digital receive chains 524-1 through 524-M, respectively.

[0078] Digital receive chains 524-1 through 524-M provide radar beat signals 522-1 through 522-M to digital beamformer 134. In some implementations, digital receive chains 524-1 through 524-M further condition radar beat signals 522-1 through 522-M (e.g., filter radar beat signals 522-1 through 522-M).

[0079] The digital beamformer 134 includes digital weighting circuits 534-1, 534-2...534-M and at least one summing circuit 536. The digital weighting circuits 534-1 through 534-M apply complex weights to adjust the amplitude and / or phase of the radar beat signals 522-1 through 522-M. The summing circuit 536 combines the weighted radar beat signals 522-1 through 522-M to generate a spatial response 538. The spatial response 538 represents the complex amplitude of the radar beat signals 522-1 through 522-M for different beam steering angles formed across one or more angular dimensions (e.g., across the azimuth dimension, the elevation dimension, or both the azimuth and elevation dimensions). The digital beamformer 134 provides the spatial response 538 to the object classification module 528 and the angle estimation module 530.

[0080] The object classification module 528 analyzes the spatial response 538 to determine whether the object 206 is likely associated with an animate object (e.g., a human) or an inanimate object (e.g., a table). Based on the spatial response 538, the object classification module 528 measures the amount of scattering observed from the object 206. Generally, an object 206 with a flat surface exhibits a smaller amount of scattering compared to an object 206 with a curved surface. If the amount of scattering indicates that the object 206 is relatively flat, the object classification module 528 classifies the object 206 as an inanimate object. Alternatively, if the amount of scattering indicates that the object 206 is relatively curved, the object classification module 528 classifies the object 206 as a likely animate object.

[0081] The angle estimation module 530 analyzes the spatial response 538 to determine an angle to the object 206. As an example, the angle estimation module 530 may determine the angle to the object 206 based on the angle associated with the maximum peak amplitude in the spatial response 538. Although not explicitly shown, the processor 126 may also include an object detection module that performs a fast Fourier transform operation based on the radar beat signals 522-1 through 522-M or the spatial response 538. The object detection module may generate one or more range-Doppler maps for determining the range to the object 206 and the range rate of the object 206.

[0082] Information from the object classification module 528, the angle estimation module 530, and / or the object detection module may be provided to the transmit parameter adjustment module 532. Using this information, the transmit parameter adjustment module 532 adjusts the transmit parameters of the wireless transceiver 120 to meet targeted guidelines (e.g., MPE guidelines). Exemplary transmit parameters include transmit power level, beam steering angle, frequency, selected antenna array, and / or communication protocol. Upon detecting the object 206, for example, the transmit parameter adjustment module 532 causes the wireless transceiver 120 to transmit a subsequent uplink signal 202-3 at a lower power, as shown at 306 in FIG. 3. Alternatively or additionally, the transmit parameter adjustment module 532 causes the wireless transceiver 120 to transmit the subsequent uplink signal 202 using another unobstructed antenna array 122, such as the antenna array 122-2 of FIG. 2-2.

[0083] Although described with respect to the object detection mode, the components of FIGS. 5-1 and 5-2 may perform similar operations to enable digital beamforming for the wireless communication mode, which may enable the computing device 102 to determine an angle to the base station 104. However, in the wireless communication mode, the inputs of the downconversion mixers 520-1 through 520-M of FIG. 5-1 are coupled to the local oscillator 514 rather than the output of the upconversion mixer 510. The radio frequency integrated circuit 124 may also include switching circuitry (not shown) that can selectively connect the inputs of the downconversion mixers 520-1 through 520-M to the output of the upconversion mixer 510 based on the object detection mode or to the local oscillator 514 based on the wireless communication mode.

[0084] If interface circuitry 128 includes two or more communication paths available during reception, multiplexing circuit 130 can alternatively multiplex radar beat signals 522-1 through 522-M together into two or more groups to generate two or more composite radar beat signals 416. In some cases, this allows individual composite radar beat signals of multiple composite radar beat signals 416 to have smaller bandwidths compared to implementations that generate a single composite radar beat signal 416.

[0085] The techniques described herein are also applicable to hybrid beamforming, in which an analog beamformer in radio frequency integrated circuit 124 can combine two or more groups of radar receive signals 212-1 through 212-M together. Accordingly, radar beat signals 522-1 through 522-M generated by downconversion mixers 520-1 through 520-M represent versions of the combined radar receive signals. In this case, each of radar beat signals 522-1 through 522-M is associated with a group of receive antenna elements, and the number of receive antenna elements 508 is greater than the number of radar beat signals 522.

[0086] 6 illustrates various exemplary types of multiplexing circuitry 130 for multiplexing radar beat signals. The multiplexing circuitry 130 may be implemented as a frequency division multiplexing (FDM) circuitry 602, a code division multiplexing (CDM) circuitry 604, or a time division multiplexing (TDM) circuitry 606. Although not explicitly shown, the demultiplexing circuitry 132 may be implemented using similar circuitry that performs reciprocal operations compared to the multiplexing circuitry 130.

[0087] Exemplary types of frequency division multiplexing circuit 602 include analog frequency division multiplexing circuit 608 and digital frequency division multiplexing circuit 610. Analog frequency division multiplexing circuit 608 performs frequency division multiplexing in the analog domain to generate composite radar beat signal 416 based on radar beat signals 522-1 through 522-M. In contrast, digital frequency division multiplexing circuit 610 performs frequency division multiplexing in the digital domain to generate composite radar beat signal 416 based on radar beat signals 522-1 through 522-M. Analog frequency division multiplexing circuit 608 and digital frequency division multiplexing circuit 610 are further described with respect to Figures 7-1 and 7-2, respectively.

[0088] Generally, the bandwidth of the composite radar beat signal 416 generated using frequency division multiplexing depends on the number of receive antenna elements 508-1 through 508-M (e.g., the number of radar beat signals 522-1 through 522-M) and the detection range of the wireless transceiver 120. If the bandwidth of the composite radar beat signal 416 may be greater than the bandwidth of the interface circuitry 128, the multiplexing circuit 130 may alternatively be implemented using a code division multiplexing circuit 604 or a time division multiplexing circuit 606.

[0089] Code division multiplexing circuit 604 performs code division multiplexing based on radar beat signals 522-1 through 522-M to generate composite radar beat signal 416. Code division multiplexing circuit 604 is further described with respect to FIG.

[0090] To further improve the signal-to-noise ratio of composite radar beat signal 416, multiplexing circuit 130 may be implemented using time division multiplexing circuit 606. Time division multiplexing circuit 606 does not need to use a combiner circuit or summing circuit to combine radar beat signals 522-1 through 522-M together. Thus, additional noise introduced through the combiner circuit or summing circuit through folding may be mitigated.

[0091] An exemplary type of time division multiplexing circuit 606 includes a digital time division multiplexing circuit 612 and a digital packing circuit 614. The digital time division multiplexing circuit 612 interleaves together radar beat signals 522-1 through 522-M of different time segments to generate composite radar beat signal 416. In contrast, the digital packing circuit 614 concatenates together radar beat signals 522-1 through 522-M of similar time segments to generate composite radar beat signal 416. The digital time division multiplexing circuit 612 and the digital packing circuit 614 are further described with respect to Figures 9-1 and 9-2, respectively.

[0092] FIG. 7-1 illustrates an exemplary analog frequency division multiplexing circuit 608 for multiplexing radar beat signals. In the illustrated configuration, the analog frequency division multiplexing circuit 608 includes at least one frequency shift circuit 702 and at least one combiner circuit 704. In this case, the analog frequency division multiplexing circuit 608 includes frequency shift circuits 702-1 through 702-M, which are disposed within radio frequency receive chains 504-1 through 504-M, respectively, and each include analog mixers 706-1 through 706-M and frequency synthesizers 708-1 through 708-M, respectively. Inputs of the analog mixers 706-1 through 706-M are coupled to outputs of the downconversion mixers 520-1 through 520-M (of FIG. 5-1), respectively. The other inputs of analog mixers 706-1 through 706-M are coupled to frequency synthesizers 708-1 through 708-M, respectively. Frequency shift circuits 702-1 through 702-M shift the frequencies of radar beat signals 522-1 through 522-M, respectively. By way of example, the frequency shift can be between approximately 1.5 MHz and 2 MHz between each radar beat signal 522-1 through 522-M.

[0093] Combiner circuit 704 is coupled to the outputs of analog mixers 706-1 through 706-M and to interface circuitry 128. Combiner circuit 704 may be implemented as a Wilkinson combiner, a transformer, a directional coupler, etc. Generally, combiner circuit 704 combines radar beat signals 522-1 through 522-M together to generate composite radar beat signal 416.

[0094] During operation, frequency synthesizers 708-1 through 708-M generate analog reference signals 710-1 through 710-M having different frequencies 712-1 through 712-M. The frequency difference between analog reference signals 710-1 through 710-M shifts each radar beat signal 522-1 through 522-M in frequency by various amounts so that the beat signals are unique in frequency (e.g., do not overlap in frequency). As an example, frequencies 712-1 through 712-M may differ by approximately 1.5 MHz to 2 MHz. Generally, frequency synthesizers 708-1 through 708-M generate analog reference signals 710-1 through 710-M based on a reference clock signal or a local oscillator signal, such as local oscillator signal 516. Alternatively, frequency synthesizers 708-1 through 708-M may be implemented as local oscillators.

[0095] Analog mixers 706-1 through 706-M mix radar beat signals 522-1 through 522-M with analog reference signals 710-1 through 710-M, respectively, to generate frequency-shifted radar beat signals 714-1 through 714-M. Combiner circuit 704 combines frequency-shifted radar beat signals 714-1 through 714-M together to generate composite radar beat signal 416. In this example, composite radar beat signal 416 is an analog signal.

[0096] In an alternative implementation, analog frequency division multiplexing circuit 608 does not include, disables, or bypasses one of frequency shift circuits 702-1 through 702-M. Considering the case where frequency shift circuit 702-1 is not included, radar beat signal 522-1 is passed directly to coupler circuit 704. Coupler circuit 704 accordingly combines radar beat signal 522-1 with frequency-shifted radar beat signals 714-2 through 714-M. To separate radar beat signal 522-1 from frequency-shifted radar beat signals 714-2 through 714-M in the frequency domain, frequencies 712-2 through 712-M of analog reference signals 710-2 through 710-M are determined to shift frequency-shifted radar beat signals 714-2 through 714-M by different amounts compared to radar beat signal 522-1.

[0097] While the analog frequency division multiplexing circuit 608 can conserve space within the radio frequency integrated circuit 124 compared to some of the other types of multiplexing circuits 130 described in FIG. 6 , in some embodiments, the frequency synthesizer 708-1 may increase the cost of the radio frequency integrated circuit 124. Additionally, the proximity of the frequency synthesizers 708-1 through 708-M to other signal-generating components within the radio frequency integrated circuit 124 may, in some embodiments, increase interference and reduce the dynamic range of the wireless transceiver 120. Alternatively, the multiplexing circuit 130 may be implemented as a digital frequency division multiplexing circuit 610 that uses a digital signal generator to shift the frequency of the radar beat signals 522-1 through 522-M. In some implementations, the digital signal generator may be simpler and less costly to implement compared to the frequency synthesizers 708-1 through 708-M.

[0098] As indicated above, demultiplexing circuit 132, although not explicitly shown, may be implemented using similar circuitry that performs reciprocal operations compared to multiplexing circuit 130. For example, in the example analog frequency division multiplexing circuit 608 of FIG. 7-1, demultiplexing circuit 132 includes filters and mixers (or multipliers), which may be implemented using analog or digital components. To recover radar beat signals 522-1 through 522-M (or some version thereof, such as a digital version), the filters extract frequency-shifted radar beat signals 714-1 through 714-M from composite radar beat signal 416, and the mixers (or multipliers) shift the frequencies of frequency-shifted radar beat signals 714-1 through 714-M.

[0099] FIG. 7-2 illustrates an exemplary digital frequency division multiplexing circuit 610 for multiplexing radar beat signals. In the illustrated configuration, the digital frequency division multiplexing circuit 610 includes at least one frequency shifting circuit 702 and at least one summing circuit 716. In this example, the digital frequency division multiplexing circuit 610 includes frequency shifting circuits 702-1 through 702-M, which are disposed in the radio frequency receive chains 504-1 through 504-M, respectively. The summing circuit 716 is coupled to the frequency shifting circuits 702-1 through 702-M and the interface circuitry 128. The digital frequency division multiplexing circuit 610 also includes bandpass filters 718-1 through 718-M and analog-to-digital converters 720-1 through 720-M. Bandpass filters 718-1 through 718-M, analog-to-digital converters 720-1 through 720-M, and frequency shift circuits 702-1 through 702-M are disposed in radio frequency receive chains 504-1 through 504-M, respectively.

[0100] Bandpass filters 718-1 through 718-M are coupled to the outputs of downconversion mixers 520-1 through 520-M, respectively, to filter radar beat signals 522-1 through 522-M. In some implementations, bandpass filters 718-1 through 718-M have a bandwidth of approximately 1 GHz and provide approximately 10 decibels of attenuation (e.g., rejection). In other implementations, bandpass filters 718-1 through 718-M are implemented as lowpass filters with a bandwidth of approximately 8 GHz. Bandpass filters 718-1 through 718-M can improve the signal-to-noise ratio of composite radar beat signal 416 by attenuating noise in radar beat signals 522-1 through 522-M. This can reduce the amount of noise that aliases back when radar beat signals 522-1 through 522-M are combined by summing circuit 716.

[0101] Analog-to-digital converters 720-1 through 720-M are coupled to bandpass filters 718-1 through 718-M, respectively. In some implementations, analog-to-digital converters 720-1 through 720-M sample radar beat signals 522-1 through 522-M, respectively, at a sampling rate lower than the Nyquist rate of radar beat signals 522-1 through 522-M. In other words, the sampling rate of analog-to-digital converters 720-1 through 720-M comprises a sub-Nyquist sampling rate, which may be, for example, 1 / 32 or 1 / 64 lower than the Nyquist sampling rate. Using a sub-Nyquist sampling rate allows analog-to-digital converters 720-1 through 720-M to reduce their sampling rate and thus reduce the bandwidth requirements of interface circuitry 128 that couples radio frequency integrated circuit 124 to processor 126.

[0102] The frequency shift circuits 702-1 through 702-M include digital mixer circuits 722-1 through 722-M and digital signal generators 724-1 through 724-M. In some implementations, the digital signal generators 724-1 through 724-M are implemented as numerically controlled oscillators. Inputs of the digital mixer circuits 722-1 through 722-M are coupled to the analog-to-digital converters 720-1 through 720-M, respectively. Other inputs of the digital mixer circuits 722-1 through 722-M are coupled to the digital signal generators 724-1 through 724-M, respectively. The frequency shift circuits 702-1 through 702-M shift the frequencies of the radar beat signals 522-1 through 522-M, respectively. As an example, the frequency shift can be between approximately 1.5 MHz and 2 MHz between each radar beat signal 522-1 through 522-M.

[0103] Summing circuit 716 is coupled to the outputs of digital mixer circuits 722-1 through 722-M and to interface circuitry 128. Generally, summing circuit 716 combines radar beat signals 522-1 through 522-M together to generate composite radar beat signal 416.

[0104] In operation, bandpass filters 718-1 through 718-M filter radar beat signals 522-1 through 522-M to generate filtered radar beat signals 726-1 through 726-M. Analog-to-digital converters 720-1 through 720-M digitize filtered radar beat signals 726-1 through 726-M to generate digital radar beat signals 728-1 through 728-M, which are provided to digital mixer circuits 722-1 through 722-M.

[0105] Within frequency shift circuits 702-1 through 702-M, digital signal generators 724-1 through 724-M generate digital reference signals 730-1 through 730-M having different frequencies 712-1 through 712-M. Digital mixer circuits 722-1 through 722-M mix digital radar beat signals 728-1 through 728-M with digital reference signals 730-1 through 730-M to generate frequency-shifted radar beat signals 714-1 through 714-M. Adder circuit 716 combines frequency-shifted radar beat signals 714-1 through 714-M together to generate composite radar beat signal 416. In this example, composite radar beat signal 416 is a digital signal.

[0106] In an alternative implementation, digital frequency division multiplexing circuit 610 does not include, disables, or bypasses frequency shift circuit 702-1. In this case, digital radar beat signal 728-1 is passed directly to summing circuit 716. Summing circuit 716 accordingly combines digital radar beat signal 728-1 with frequency-shifted radar beat signals 714-2 through 714-M. To separate digital radar beat signal 728-1 from frequency-shifted radar beat signals 714-2 through 714-M in the frequency domain, frequencies 712-2 through 712-M of digital reference signals 730-2 through 730-M are determined to shift frequency-shifted radar beat signals 714-2 through 714-M by different amounts compared to digital radar beat signal 728-1.

[0107] As noted above, demultiplexing circuit 132, while not explicitly shown, may be implemented using similar circuitry that performs the opposite operations compared to multiplexing circuit 130. For example, in the example digital frequency division multiplexing circuit 610 of FIG. 7-2, demultiplexing circuit 132 includes filters and multipliers that may be implemented using digital components. The filters extract frequency-shifted radar beat signals 714-1 through 714-M from composite radar beat signal 416, and the multipliers shift the frequencies of frequency-shifted radar beat signals 714-1 through 714-M to recover radar beat signals 522-1 through 522-M.

[0108] FIG. 8 illustrates an exemplary code division multiplexing circuit 604 for multiplexing radar beat signals. The code division multiplexing circuit 604 includes bandpass filters 718-1 through 718-M, analog-to-digital converters 720-1 through 720-M, and summing circuit 716, as described above with reference to FIG. 7-2. However, rather than including frequency shift circuits 702-1 through 702-M of FIG. 7-2, the code division multiplexing circuit 604 includes modulation circuits 802-1 through 802-M disposed in radio frequency receive chains 504-1 through 504-M, respectively. The modulation circuits 802-1 through 802-M include code generators 804-1 through 804-M and digital mixer circuits 722-1 through 722-M, respectively. Generally, the modulation circuits 802-1 through 802-M modulate the phases of the radar beat signals 522-1 through 522-M.

[0109] During operation, code generators 804-1 through 804-M generate code sequences 806-1 through 806-M that are orthogonal to one another. As an example, code sequences 806-1 through 806-M may be Walsh code sequences. Digital mixer circuits 722-1 through 722-M generate coded radar beat signals 808-1 through 808-M by modulating digital radar beat signals 728-1 through 728-M based on code sequences 806-1 through 806-M. Adder circuit 716 combines coded radar beat signals 808-1 through 808-M together to generate composite radar beat signal 416. In this example, composite radar beat signal 416 is a digital signal.

[0110] As indicated above, demultiplexing circuit 132, although not explicitly shown, may be implemented using similar circuitry that performs reciprocal operations compared to multiplexing circuit 130. For example, in the case of example code division multiplexing circuit 604 of FIG. 8, demultiplexing circuit 132 includes another digital mixer circuit that demodulates composite radar beat signal 416 using code sequences 806-1 through 806-M to recover digital radar beat signals 728-1 through 728-M.

[0111] FIG. 9-1 shows an exemplary digital time division multiplexing circuit 612 for multiplexing radar beat signals. The digital time division multiplexing circuit 612 includes bandpass filters 718-1 through 718-M and analog-to-digital converters 720-1 through 720-M, as described above with respect to FIG. 7-2. However, rather than including frequency shift circuits 702-1 through 702-M of FIG. 7-2, the digital time division multiplexing circuit 612 includes a switching circuit 902 coupled to the analog-to-digital converters 720-1 through 720-M and coupled to interface circuitry 128.

[0112] In the illustrated configuration, switching circuit 902 is implemented as a single-pole, multi-throw switch with throws 904-1 through 904-M coupled to analog-to-digital converters 720-1 through 720-M, respectively, and pole 906 coupled to interface circuitry 128. Alternatively, switching circuit 902 may be implemented as a multiplexer.

[0113] In operation, switching circuit 902 selectively connects analog-to-digital converters 720-1 through 720-M to interface circuitry 128. Thus, switching circuit 902 interleaves together digital radar beat signals 728-1 through 728-M of different time segments to generate composite radar beat signal 416. As an example, composite radar beat signal 416 includes a first set of bits of digital radar beat signal 728-1 associated with a first time interval, a second set of bits of digital radar beat signal 728-M associated with a second time interval, a third set of bits of digital radar beat signal 728-1 associated with a third time interval, etc. In this example, composite radar beat signal 416 is a digital signal.

[0114] Due to the operation of switching circuit 902, some bits of digital radar beat signals 728-1 through 728-M are not included in composite radar beat signal 416. To avoid this, multiplexing circuit 130 may alternatively be implemented by digital packing circuit 614 such that composite radar beat signal 416 includes all of the bits associated with digital radar beat signals 728-1 through 728-M.

[0115] As indicated above, demultiplexing circuit 132, although not explicitly shown, may be implemented using similar circuitry that performs reciprocal operations compared to multiplexing circuit 130. For example, in the case of example digital time division multiplexing circuit 612 of FIG. 9-1, demultiplexing circuit 132 includes another switching circuit that demodulates composite radar beat signal 416 to recover digital radar beat signals 728-1 through 728-M.

[0116] FIG. 9-2 shows an exemplary digital packing circuit 614 for multiplexing radar beat signals. The digital packing circuit 614 includes bandpass filters 718-1 through 718-M and analog-to-digital converters 720-1 through 720-M, as described above with respect to FIG. 7-2. However, rather than including frequency shift circuits 702-1 through 702-M of FIG. 7-2, the digital packing circuit 614 includes a bit packing circuit 908 coupled to the analog-to-digital converters 720-1 through 720-M and coupled to interface circuitry 128. The bit packing circuit 908 includes registers 910-1 through 910-M.

[0117] During operation, bit packing circuit 908 performs a series of parallel operations. Specifically, bit packing circuit 908 stores sets of bits from digital radar beat signals 728-1 through 728-M in registers 910-1 through 910-M. These sets of bits are from different digital radar beat signals 728-1 through 728-M, but the sets of bits are associated with the same time interval. Once registers 910-1 through 910-M are full, bit packing circuit 908 concatenates the sets of bits in registers 910-1 through 910-M together and passes the concatenated sets of bits to interface circuitry 128. The process continues for subsequent sets of bits associated with subsequent time intervals. Thus, composite radar beat signal 416 comprises a series of concatenated sets of bits associated with digital radar beat signals 728-1 through 728-M and grouped together based on a given time interval.

[0118] As indicated above, demultiplexing circuit 132 is not explicitly shown but may be implemented using similar circuitry that performs the opposite operations compared to multiplexing circuit 130. For example, in the case of the example digital packing circuit 614 of FIG. 9-2, demultiplexing circuit 132 unpacks composite radar beat signal 416 to recover digital radar beat signals 728-1 through 728-M.

[0119] FIG. 10 is a flow diagram illustrating an example process 1000 for multiplexing radar beat signals. Process 1000 is described in the form of a set of blocks 1002-1010, which specify operations that may be performed. However, the operations are not necessarily limited to the order shown in FIG. 10 or described herein, as the operations may be performed in alternate orders or may overlap in whole or in part. Also, more, fewer, and / or different operations may be performed to implement process 1000 or alternate processes. The operations represented by the illustrated blocks of process 1000 may be performed by a wireless transceiver 120 (e.g., of FIG. 1 or FIG. 4) or a radio frequency integrated circuit 124 (e.g., of FIG. 1, FIG. 4, or FIG. 5-1). More particularly, the operations of process 1000 may be performed, at least in part, by a multiplexing circuit 130, such as those shown in FIGS. 4, 5-1, and 7-1-9-2.

[0120] In block 1002, a radar transmission signal is transmitted. For example, at least one transmit antenna element 506 of the antenna array 122 and at least one radio frequency transmit chain 502 jointly transmit the radar transmission signal 210 of FIG. 2-1. The radar transmission signal 210 may be a frequency modulated continuous wave (FMCW) signal or a frequency modulated pulse signal. Types of frequency modulation may include linear frequency modulation, triangular wave frequency modulation, sawtooth wave frequency modulation, etc.

[0121] At block 1004, two or more radar receive signals are received. The two or more radar receive signals represent portions of the radar transmit signal that are reflected by an object. For example, as shown in FIG. 5-1, two or more receive antenna elements 508-1 through 508-M and two or more receive chains 504-1 through 504-M of the antenna array 122 receive two or more radar receive signals 212-1 through 212-M, respectively. The radar receive signals 212-1 through 212-M represent portions of the radar transmit signal 210 that are reflected by an object 206, such as a user's appendage.

[0122] The radar receive signals 212-1 through 212-M and the radar transmit signal 210 are associated with the same frequency band. The frequency band may be, for example, a sub-6 GHz frequency band or a frequency band associated with millimeter wavelengths. The frequency band may also be associated with a specific radar frequency band, such as L-band, S-band, C-band, X-band, or Ka-band. The L-band includes frequencies between 1 GHz and 2 GHz, the S-band includes frequencies between 2 GHz and 4 GHz, the C-band includes frequencies between 4 GHz and 8 GHz, the X-band includes frequencies between 8 GHz and 12 GHz, and the Ka-band includes frequencies between 27 GHz and 40 GHz.

[0123] In block 1006, two or more radar receive signals are downconverted using the radar transmit signal to generate two or more radar beat signals. For example, downconversion mixers 520-1 through 520-M generate radar beat signals 522-1 through 522-M, respectively, by downconverting radar receive signals 212-1 through 212-M using radar transmit signal 210. Because the downconversion operation uses radar transmit signal 210, the downconversion operation is a beating operation that demodulates radar receive signals 212-1 through 212-M. Due to the beating operation, the frequency of radar beat signals 522-1 through 522-M is proportional to the distance between antenna array 122 and at least a portion of object 206 that reflects radar transmit signal 210. Furthermore, the bandwidths of radar beat signals 522-1 to 522-M are narrower than the bandwidths of corresponding radar reception signals 212-1 to 212-M.

[0124] In block 1008, two or more radar beat signals are multiplexed together to generate a composite radar beat signal. For example, as shown in FIG. 5-1, multiplexing circuit 130 multiplexes radar beat signals 522-1 through 522-M together to generate composite radar beat signal 416. Depending on the implementation of multiplexing circuit 130, composite radar beat signal 416 may be an analog signal or a digital signal. Multiplexing circuit 130 may be implemented as a frequency division multiplexing (FDM) circuit 602 (as shown in FIGS. 7-1 and 7-2), a code division multiplexing (CDM) circuit 604 (as shown in FIG. 8), a time division multiplexing (TDM) circuit 606 (as shown in FIGS. 9-1 and 9-2), etc.

[0125] At block 1010, the composite radar beat signal is propagated across interface circuitry. For example, interface circuitry 128 propagates composite radar beat signal 416 from radio frequency integrated circuit 124 to processor 126. In some cases, at least a portion of interface circuitry 128 includes a resource-constrained interface. A resource-constrained interface may have a limited number of communication paths (e.g., electrical connectors) and / or a constrained bandwidth available during reception. As an example, the resource-constrained interface includes a small number of communication paths compared to the number of two or more radar beat signals 522-1 through 522-M. As another example, the bandwidth of the resource-constrained interface is smaller than the bandwidth of any of radar receive signals 212-1 through 212-M. By propagating composite radar beat signal 416, interface circuitry 128 can efficiently pass radar beat signals 522-1 through 522-M in parallel from radio frequency integrated circuit 124 to processor 126, even across resource-constrained interfaces.

[0126] Although not shown, additional operations may be performed as part of process 1000. For example, in some implementations, demultiplexing circuit 132 demultiplexes composite radar beat signal 416 as shown in FIG. 5-2. Digital beamformer 134 may also generate spatial response 538 based on demultiplexed radar beat signals 522-1 through 522-M. Furthermore, computing device 102 may detect object 206 and determine characteristics about object 206 using object classification module 528 and / or angle estimation module 530. Upon detecting object 206, transmit parameter adjustment module 532 may adjust transmit parameters for subsequent signals, such as subsequently transmitted uplink signal 202.

[0127] Unless the context dictates otherwise, the use of the word "or" herein may be considered as the use of "inclusive or," or as a term admitting the inclusion or application of one or more items associated by the word "or" (e.g., the phrase "A or B" may be interpreted as admitting only "A," as admitting only "B," or as admitting both "A" and "B"). Furthermore, items depicted in the accompanying drawings and terms described herein may refer to one or more items or terms, and thus, reference may be made interchangeably to the singular or plural forms of the items and terms herein. Finally, although subject matter has been described in language specific to structural features or methodological operations, it will be understood that the subject matter defined in the appended claims is not necessarily limited to the particular features or operations described above, including not necessarily to the organization in which features are arranged or the order in which operations are performed. [Explanation of symbols]

[0128] 102 Computing Devices 104 Base station 106 Wireless Communication Links 108 Application Processors 110 Computer-readable storage medium 112 Instructions 114 Data 116 input / output ports 118 Display 120 Wireless Transceiver 122 Antenna Array 124 Radio Frequency Integrated Circuits 126 processors 128 Interface circuit configuration 130 Multiplexing circuit 132 Demultiplexing circuit 134 Digital Beamformer 202 Uplink Signal 204 Downlink Signal 206 Object 208 Antenna Elements 210 Radar Transmission Signal 212 Radar Received Signal 214 hands 218 Signal Path 220 Reflector 402 Radio Frequency Transmitting (RF TX) Node 404 Radio Frequency Receiver (RF RX) Node 406 Transmitter 408 Receiver 410 Data 412 Transmission Signal 414 Composite Downlink Signal 416 Composite Radar Beat Signal 418 Data 420 Control Information 502 Radio Frequency Transmit Chain 504 Radio Frequency Receive Chain 506 Transmitting antenna element 508 receiving antenna element 510 Upconversion Mixer 512 Amplifier 514 Local Oscillator 516 Local Oscillator Signal 518 Amplifier 520 Downconversion Mixer 522 radar beat signal 524 Digital Receive Chain 528 Object Classification Module 530 Angle Estimation Module 532 Transmit (TX) parameter adjustment module 534 Digital Weighting Circuit 536 Addition Circuit 538 Spatial Response 540 Switch 602 Frequency division multiplexing (FDM) circuit 604 Code division multiplexing (CDM) circuit 606 Time division multiplexing (TDM) circuit 608 Analog Frequency Division Multiplexing Circuit 610 Digital Frequency Division Multiplexing Circuit 612 Digital Time Division Multiplexing Circuit 614 Digital Packing Circuit 702 Frequency Shift Circuit 704 Combiner Circuit 706 Analog Mixer 708 Frequency Synthesizer 710 Analog Reference Signal 712 frequency 714 Frequency-shifted radar beat signal 716 Addition Circuit 718 Bandpass Filter 720 Analog-to-Digital Converter 722 Digital Mixer Circuit 724 Digital Signal Generator 726 Filtered Radar Beat Signal 728 Digital Radar Beat Signal 730 Digital Reference Signal 802 Modulation circuit 804 Code Generator 806 code sequence 808 coded radar beat signal 902 Switching Circuit 904 Throw 906 pole 908 Bit Packing Circuit 910 Register

Claims

1. 1. A device that is a cellular phone, a wearable computer, a broadband router, an access point, a gaming device, a media device, a laptop computer, a desktop computer, or a tablet computer, the device comprising: an antenna array comprising two or more receive antenna elements; and a wireless transceiver coupled to the antenna array, the antenna array and the wireless transceiver collectively configured to transmit a radar transmit signal and receive two or more radar receive signals via the two or more receive antenna elements, the two or more radar receive signals representing portions of the radar transmit signal that are reflected by an object, the wireless transceiver comprising a radio frequency integrated circuit, the radio frequency integrated circuit comprising: two or more receive chains, each configured to generate a radar beat signal by downconverting a respective radar receive signal of the two or more radar receive signals using the radar transmit signal; a multiplexing circuit coupled to the two or more receive chains, the multiplexing circuit comprising a frequency division multiplexing circuit configured to multiplex the radar beat signals together to generate a composite radar beat signal; and demultiplexing means configured to demultiplex the composite radar beat signal to extract the two or more radar beat signals; digital beamforming means configured to generate a spatial response indicative of an angle to the object based on the extracted radar beat signal; an angle estimation module configured to analyze the spatial response to determine an angle to the object; the wireless transceiver comprises a transmit parameter adjustment module configured to adjust transmit parameters based on the determined angle to the object for a subsequent signal using adjusted transmit parameters, the radar transmit signal being a frequency modulated continuous wave signal; The frequency division multiplexing circuit, shifting the frequency of the radar beat signal by different amounts to generate a frequency-shifted radar beat signal; generating the composite radar beat signal based on the frequency-shifted radar beat signal. Device.

2. the radar transmit signal and the two or more radar receive signals are associated with the same frequency band; the antenna array comprises transmit antenna elements; the two or more receive antenna elements are respectively coupled to the two or more receive chains; the radio frequency integrated circuit comprising a transmit chain coupled to the transmit antenna element; the two or more receive antenna elements and the two or more receive chains are jointly configured to receive the two or more radar receive signals during a portion of the time that the transmit chains and the transmit antenna elements jointly transmit the radar transmit signals.

2. The apparatus of claim 1.

3. The wireless transceiver, A processor; a demultiplexing means which is a demultiplexing circuit; interface circuitry coupled between the radio frequency integrated circuit and the processor; the multiplexing circuitry is coupled between the two or more receive chains and the interface circuitry, the multiplexing circuitry configured to provide the composite radar beat signal to the demultiplexing circuitry via the interface circuitry.

2. The apparatus of claim 1.

4. The demultiplexing circuit and the angle estimation module are implemented within the processor.

4. The apparatus of claim 3.

5. the interface circuitry comprises at least one communication path coupled between the multiplexing circuitry and the demultiplexing circuitry, the quantity of the radar beat signals being greater than the quantity of paths in the at least one communication path; the at least one communication path comprises at least one electrical connection coupled between the multiplexing circuitry and the demultiplexing circuitry.

4. The apparatus of claim 3.

6. the processor comprises two or more digital receive chains, a quantity of the digital receive chains among the two or more digital receive chains is equal to a quantity of the receive chains among the two or more receive chains of the radio frequency integrated circuit; the demultiplexing circuitry is coupled between the interface circuitry and the two or more digital receive chains, the demultiplexing circuitry comprising: configured to provide the extracted radar beat signal to the two or more digital receive chains, respectively; the processor comprising the digital beamforming means coupled to the two or more digital receive chains; 4. The apparatus of claim 3.

7. The frequency division multiplexing circuit comprises an analog frequency division multiplexing circuit, the analog frequency division multiplexing circuit comprising: two or more frequency synthesizers disposed respectively in the two or more receive chains, the two or more frequency synthesizers being configured to generate respective analog reference signals having different frequencies; two or more analog mixers respectively disposed in the two or more receive chains and respectively coupled to the two or more frequency synthesizers, the two or more analog mixers being configured to generate the frequency-shifted radar beat signal respectively using the analog reference signal; a combiner circuit coupled to the two or more analog mixers and configured to generate the composite radar beat signal based on the frequency-shifted radar beat signal.

2. The apparatus of claim 1.

8. The frequency division multiplexing circuit comprises a digital frequency division multiplexing circuit, the digital frequency division multiplexing circuit comprising: two or more analog-to-digital converters respectively disposed in the two or more receive chains, each configured to generate a digital radar beat signal based on a respective radar beat signal; two or more digital signal generators disposed respectively in the two or more receive chains and configured to generate respective digital reference signals having different frequencies; two or more digital mixer circuits respectively disposed in the two or more receive chains, respectively coupled to the two or more analog-to-digital converters, and respectively coupled to the two or more digital signal generators, each configured to generate a frequency-shifted radar beat signal using a respective digital reference signal; a summing circuit coupled to the two or more digital mixer circuits and configured to generate the composite radar beat signal based on the frequency-shifted radar beat signal; the multiplexing circuitry comprises two or more bandpass filters respectively disposed in the two or more receive chains, the two or more bandpass filters respectively coupled to the two or more analog-to-digital converters, each of the two or more bandpass filters configured to generate a filtered radar beat signal based on a respective radar beat signal; each of the two or more analog-to-digital converters configured to generate a digital radar beat signal based on a respective filtered radar beat signal; 2. The apparatus of claim 1.

9. the multiplexing circuitry comprises a code division multiplexing circuit configured to perform code division multiplexing to generate the composite radar beat signal; The code division multiplexing circuit, two or more analog-to-digital converters respectively disposed in the two or more receive chains, each configured to generate a digital radar beat signal based on a respective radar beat signal; two or more code generators disposed respectively in the two or more receive chains and configured to generate respective orthogonal code sequences; two or more digital mixer circuits respectively disposed in the two or more receive chains, respectively coupled to the two or more analog-to-digital converters, and respectively coupled to the two or more code generators, each configured to generate a coded radar beat signal by modulating a phase of a respective digital radar beat signal based on a respective orthogonal code sequence; a summing circuit coupled to the two or more digital mixer circuits and configured to generate the composite radar beat signal based on the coded radar beat signal.

2. The apparatus of claim 1.

10. the multiplexing circuitry comprising a time division multiplexing circuit configured to perform time division multiplexing to generate the composite radar beat signal.

2. The apparatus of claim 1.

11. the time division multiplexing circuit comprises a digital time division multiplexing circuit, two or more analog-to-digital converters respectively disposed in the two or more receive chains, each configured to generate a digital radar beat signal based on a respective radar beat signal; a switching circuit coupled to the two or more analog-to-digital converters and configured to interleave together the digital radar beat signals of different time segments to generate the composite radar beat signal.

11. The apparatus of claim 10.

12. The time division multiplexing circuitry comprises a digital packing circuitry, the digital packing circuitry comprising: two or more analog-to-digital converters respectively disposed in the two or more receive chains, each configured to generate a digital radar beat signal based on a respective radar beat signal; and a bit packing circuit configured to concatenate together the digital radar beat signals of the same time segments to generate the composite radar beat signal.

11. The apparatus of claim 10.

13. 1. A method for multiplexing radar beat signals to facilitate propagation across interface circuitry, and implemented in a cellular phone, a wearable computer, a broadband router, an access point, a gaming device, a media device, a laptop computer, a desktop computer, or a tablet computer, comprising: transmitting a radar transmission signal, the radar transmission signal being a frequency modulated continuous wave signal; receiving two or more radar receive signals via two or more receive antenna elements, the two or more radar receive signals representing portions of the radar transmit signal that are reflected by an object; downconverting the two or more radar receive signals using the radar transmit signal to generate two or more radar beat signals; multiplexing the two or more radar beat signals together to generate a composite radar beat signal, the multiplexing step including shifting frequencies of the radar beat signals by different amounts to generate a frequency-shifted radar beat signal, and generating the composite radar beat signal based on the frequency-shifted radar beat signals; propagating the composite radar beat signal across the interface circuitry; demultiplexing the composite radar beat signal to extract the two or more radar beat signals; performing digital beamforming to generate a spatial response representative of an angle to the object based on the two or more radar beat signals; determining the angle to the object based on the spatial response; adjusting transmit parameters based on the angle to generate adjusted transmit parameters; transmitting a subsequent signal using the adjusted transmit parameters; A method comprising:

14. the interface circuitry comprises resource-constrained interface circuitry including a small number of communication paths compared to a number of radar beat signals among the two or more radar beat signals; or 14. The method of claim 13, wherein the interface circuitry comprises resource-constrained interface circuitry having a bandwidth that is small compared to a bandwidth of any of the two or more radar receive signals.

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