Apparatus, communication method and integrated circuit

Abstract

To properly place CCEs that make up a CORESET.SOLUTION: In a base station 100, a signal allocation unit 105 allocates a downlink control signal (DCI) to a control channel region (CORESET), which is made up of a plurality of control channel elements (CCEs). A transmitting unit 106 transmits the downlink control signal. The number of resource element groups (REGs) that make up a CCE is a power of 2, and a bundling size, which indicates the number of REGs placed in adjacent resource blocks among the REGs that make up the CCE, is a power of 2.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present disclosure relates to a communication device, a communication method, and an integrated circuit. [Background technology]

[0002] A communication system called the fifth generation mobile communication system (5G) is being considered. In 5G, it is being considered to flexibly provide functions for each use case that requires an increase in communication traffic, an increase in the number of connected terminals, high reliability, and low latency. There are three representative use cases: enhanced mobile broadband (eMBB), massive machine type communications / multiple connections (mMTC), and ultra reliable and low latency communications (URLLC). The 3rd Generation Partnership Project (3GPP), an international standardization organization, is considering the advancement of communication systems from the perspectives of both the advancement of LTE systems and New RAT (Radio Access Technology) (see, for example, Non-Patent Document 1). [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] RP-161596, "Revision of SI: Study on New Radio Access Technology", NTT DOCOMO, September 2016 [Non-Patent Document 2] R1-1702765, "DL control channel design", Panasonic, February 2017 Summary of the Invention [Problem to be solved by the invention]

[0004] In the New RAT, it is being considered to configure multiple control resource sets (hereinafter referred to as "CORESET") in a terminal (UE: User Equipment) as an area in which a PDCCH (Physical Downlink Control Channel), which is a control signal channel including a DCI (Downlink Control Indicator), is arranged. However, in the New RAT, the method of arranging CCEs (Control Channel Elements) that constitute a search space in the CORESET has not been fully considered.

[0005] One aspect of the present disclosure contributes to providing a base station, a terminal, and a communication method capable of appropriately arranging CCEs that configure a search space in a CORESET. [Means for solving the problem]

[0006] A base station according to one embodiment of the present disclosure includes a circuit for allocating downlink control signals to a control channel area consisting of a plurality of control channel elements (CCEs), and a transmitter for transmitting the downlink control signals, wherein the number of resource element groups (REGs) constituting the CCEs is a power of two, and a bundling size indicating the number of REGs constituting the CCEs that are placed in adjacent resource blocks is also a power of two.

[0007] A terminal according to one embodiment of the present disclosure comprises a receiver that receives a downlink control signal in a control channel area composed of a plurality of control channel elements (CCEs), and a circuit that decodes the downlink control signal, wherein the number of resource element groups (REGs) that constitute the CCEs is a power of two, and a bundling size indicating the number of REGs that are placed in adjacent resource blocks among the REGs that constitute the CCEs is a power of two.

[0008] A communication method according to one embodiment of the present disclosure assigns a downlink control signal to a control channel region consisting of a plurality of control channel elements (CCEs), transmits the downlink control signal, the number of resource element groups (REGs) constituting the CCE being a power of two, and a bundling size indicating the number of REGs among the REGs constituting the CCE that are arranged in adjacent resource blocks being a power of two.

[0009] A communication method according to one embodiment of the present disclosure receives a downlink control signal in a control channel area consisting of a plurality of control channel elements (CCEs), decodes the downlink control signal, the number of resource element groups (REGs) constituting the CCE being a power of two, and a bundling size indicating the number of REGs among the REGs constituting the CCE that are arranged in adjacent resource blocks being a power of two.

[0010] These comprehensive or specific aspects may be realized as a system, an apparatus, a method, an integrated circuit, a computer program, or a recording medium, or may be realized as any combination of a system, an apparatus, a method, an integrated circuit, a computer program, and a recording medium. Effect of the Invention

[0011] According to one aspect of the present disclosure, it is possible to appropriately arrange CCEs that constitute a CORESET.

[0012] Further advantages and benefits of certain aspects of the present disclosure will become apparent from the specification and drawings, in which such advantages and / or benefits are provided by some of the embodiments and features described in the specification and drawings, respectively, but not necessarily all of which are provided to obtain one or more identical features. [Brief description of the drawings]

[0013] [Figure 1A] FIG. 1A shows an example of REG mapping (frequency first mapping). [Figure 1B] FIG. 1B shows an example of REG mapping (frequency first mapping). [Figure 1C] FIG. 1C shows an example of REG mapping (time first mapping). [Figure 1D] FIG. 1D shows an example of REG mapping (time first mapping). [Figure 2A] FIG. 2A shows an example of REG bundling. [Figure 2B] FIG. 2B shows an example of REG bundling. [Figure 2C] FIG. 2C shows an example of REG bundling. [Diagram 3] FIG. 3 shows an example of REG mapping when the number of REGs per CCE is 4, the number of symbols is 3, and the REG bundling size is 2. [Figure 4] FIG. 4 shows an example of the number of REGs constituting the same DCI per symbol for each aggregation level. [Diagram 5] FIG. 5 shows a partial configuration of the base station according to the first embodiment. [Figure 6] FIG. 6 shows a partial configuration of the terminal according to the first embodiment. [Figure 7] FIG. 7 shows the configuration of the base station according to the first embodiment. [Figure 8] FIG. 8 shows the configuration of a terminal according to the first embodiment. [Figure 9] FIG. 9 shows an example of the operation of the base station and the terminal according to the first embodiment. [Figure 10A] FIG. 10A shows a mapping example of REG according to operation example 1-1 of embodiment 1 (when the number of symbols is 1). [Figure 10B] FIG. 10B shows a mapping example of REG according to operation example 1-1 of the first embodiment (when the number of symbols is 2). [Figure 10C] FIG. 10C shows a mapping example of REG according to operation example 1-1 of embodiment 1 (when the number of symbols is 4). [Figure 11] FIG. 11 shows an example of the number of REGs constituting the same DCI per symbol for each aggregation level according to operation example 1-1 of the first embodiment. [Figure 12] FIG. 12 illustrates an example of the number of REGs constituting the same DCI per symbol for each aggregation level according to operation example 1-1 of the first embodiment. [Figure 13] FIG. 13 shows a mapping example of REG according to operation example 1-2 of the first embodiment. [Figure 14] FIG. 14 illustrates an example of the number of REGs constituting the same DCI per symbol for each aggregation level according to operation example 1-2 of the first embodiment. [Figure 15] FIG. 15 shows an example of mapping of a DMRS according to operation example 1-3 of the first embodiment (when the number of symbols is 2). [Figure 16A] FIG. 16A illustrates an example of mapping of a DMRS according to operation example 1-3 of the first embodiment (when the number of symbols is 4). [Figure 16B] FIG. 16B shows a mapping example of a DMRS according to operation example 1-3 of the first embodiment (when the number of symbols is 4). [Figure 17A] FIG. 17A shows a mapping example of REG according to the second embodiment (when the number of symbols is 2). [Figure 17B] FIG. 17B shows a mapping example of REG according to the second embodiment (when the number of symbols is 4). [Figure 17C] FIG. 17C shows a mapping example of REG according to the second embodiment (when the number of symbols is 3). [Figure 17D] FIG. 17D shows a mapping example of REG according to the second embodiment (when the number of symbols is 6). [Figure 18] FIG. 18 shows an example of the number of REGs constituting the same DCI per symbol for each aggregation level according to the second embodiment (when the number of symbols is 2). [Figure 19]FIG. 19 shows an example of the number of REGs constituting the same DCI per symbol for each aggregation level according to the second embodiment (when the number of symbols is 4). [Figure 20] FIG. 20 shows an example of the number of REGs constituting the same DCI per symbol for each aggregation level according to the second embodiment (when the number of symbols is 3). [Figure 21] FIG. 21 shows an example of the number of REGs constituting the same DCI per symbol for each aggregation level according to the second embodiment (when the number of symbols is 6). DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings.

[0015] As described above, in the New RAT, a CORESET, which is an area of ​​a control channel including DCI, which is a control signal, is set in a UE, and the UE monitors (by blind decoding) a search space in the set CORESET to detect DCI addressed to the UE. In addition, it is being considered that the search space in which DCI is placed will be defined by CCE.

[0016] In the New RAT, the number of REGs (Resource Element Groups) per CCE is considered to be between 4 and 8. In addition, the number of symbols for which a CORESET is set may range from 1 symbol to all symbols in a slot or subframe.

[0017] However, depending on the combination of the number of REGs per CCE and the number of symbols to which CORESET is set, the number of REGs per symbol in each CCE may become uneven. If the number of REGs between symbols in a CCE is uneven, the received signal to interference and noise ratio (SINR) for each symbol varies, making it difficult to adjust the power between CCEs.

[0018] This will be explained in more detail below.

[0019] DCI is transmitted using one or more CCEs. Here, the number of CCEs used for one DCI is called "aggregation level". In other words, aggregation level indicates the amount of resources used when transmitting DCI. When DCI is transmitted in a CORESET (PDCCH region), for example, in aggregation level 1, DCI is transmitted using one CCE, and in aggregation level 2, DCI is transmitted using two CCEs.

[0020] As one form of a plurality of REGs constituting a CCE, consideration is being given to designating one symbol in one PRB (Physical Resource Block) as a "REG" (see, for example, FIG. 1A).

[0021] In such a case, possible CCE configurations include a CCE (sometimes referred to as NR-CCE) configured with REGs placed in the same symbol, as shown in Figures 1A and 1B, and a CCE configured with REGs placed in multiple symbols, as shown in Figures 1C and 1D.

[0022] When REGs constituting one CCE are arranged in the same symbol, this is called "frequency first mapping." Frequency first mapping has the advantage of reducing the number of symbols occupied by CCEs and increasing the amount of resources allocated to PDSCH (Physical Downlink Shared Channel). On the other hand, when REGs constituting one CCE are arranged in multiple symbols, this is called "time first mapping." Time first mapping has the advantage of improving transmission power since CCEs can be transmitted in multiple symbols when there is a limit to the transmission power available for each symbol (see, for example, Non-Patent Document 2).

[0023] In addition, a method called "REG bundling" is also being considered for the New RAT. REG bundling is a method for improving channel estimation accuracy by allocating multiple REGs constituting the same CCE to adjacent PRBs and sharing reference signals (DMRS: Demodulation Reference Signals) allocated to the adjacent PRBs between the REGs.

[0024] 2A to 2C show a mapping example (arrangement example) of REGs when the bundling number (hereinafter referred to as "REG bundling size"), which is the number of REGs arranged in adjacent PRBs, is set to 2. As shown in FIG. 2A to 2C, two REGs out of the REGs constituting the same CCE are arranged in adjacent PRBs. This allows channel estimation to be interpolated in the frequency direction even when multiple DMRSs are not arranged in the time direction (symbol direction), thereby improving the accuracy of channel estimation.

[0025] Here, if the number of REGs per CCE is 4 or 8 and the number of symbols in the CORESET is 3, it is difficult to uniformly allocate the REGs for each CCE to 3 symbols. Fig. 3 shows an example of REG mapping when the number of REGs per CCE is 4, the number of symbols in the CORESET is 3, and the REG bundling size is 2. Fig. 4 also shows the number of REGs constituting the same DCI per symbol for each aggregation level (sometimes represented as AL) in the example of REG mapping shown in Fig. 3.

[0026] For example, in the case of Aggregation level 1 (AL1) in Fig. 3, that is, when the number of REGs in which DCI is placed is four, two REGs are placed in two of the three symbols, and no REG is placed in the remaining symbol. Also, in the case of Aggregation level 2 (AL2) in Fig. 3, that is, when the number of REGs in which DCI is placed is eight, four REGs are placed in one of the three symbols (symbol #0 in the example of Fig. 3), and two REGs are placed in the remaining two symbols (symbols #1 and #2 in the example of Fig. 3). The same applies to Aggregation levels 4 and 8 (AL4 and AL8).

[0027] That is, in AL1, REGs constituting one CCE used for transmitting DCI are arranged in only two symbols, not in one symbol, as shown in Fig. 4. Also, in AL2, AL4, and AL8, REGs constituting multiple CCEs used for transmitting DCI are arranged unevenly between symbols, as shown in Fig. 4. For this reason, the number of REGs between symbols is uneven in one or multiple CCEs used for transmitting DCI, which causes variation in the received SINR for each symbol, making it difficult to adjust the power between CCEs.

[0028] Therefore, below, a method is described in which REGs constituting multiple CCEs used to transmit DCI are evenly arranged across symbols, thereby reducing the variation in the received SINR for each symbol and facilitating the adjustment of power between CCEs.

[0029] (Embodiment 1) [Communication system overview] A communication system according to each embodiment of the present disclosure includes a base station 100 and a terminal 200 (UE).

[0030] Fig. 5 is a block diagram showing a configuration of a portion of a base station 100 according to an embodiment of the present disclosure. In the base station 100 shown in Fig. 5, a signal allocation unit 105 allocates a downlink control signal (DCI) to a control channel region (CORESET) composed of a plurality of control channel elements (CCEs). A transmission unit 106 transmits the downlink control signal.

[0031] Fig. 6 is a block diagram showing a partial configuration of terminal 200 according to an embodiment of the present disclosure. In terminal 200 shown in Fig. 6, receiver 201 receives a downlink control signal (DCI) in a control channel region (CORESET) composed of a plurality of control channel elements (CCEs). DCI receiver 203 decodes (blind decodes) the downlink control signal.

[0032] Here, the number of resource element groups (REG) constituting a CCE is a power of two, and a bundling size indicating the number of REGs constituting a CCE that are arranged in adjacent resource blocks is also a power of two.

[0033] [Base station configuration] Fig. 7 is a block diagram showing a configuration of base station 100 according to this embodiment. In Fig. 7, base station 100 has CORESET setting section 101, DCI generation section 102, error correction coding section 103, modulation section 104, signal allocation section 105, transmission section 106, reception section 107, signal separation section 108, demodulation section 109, and error correction decoding section 110.

[0034] The CORESET setting unit 101 sets a CORESET for each terminal 200 (UE). The setting (definition) of the CORESET includes, for example, the number of PRBs to which each CORESET is set, the PRB number, the symbol number, the number of symbols, an ID used for scrambling the CORESET, a mapping method (localized or distributed) of a REG (Resource Element Group), Quasi collocation (QCL), and the like. The CORESET setting unit 101 generates higher layer signaling (for example, a SIB (System Information Block) or a dedicated RRC (Radio Resource Control)) including CORESET setting information indicating the setting of the CORESET. The CORESET setting unit 101 outputs the higher layer signaling to the error correction coding unit 103, and outputs the CORESET setting information to the signal allocation unit 105.

[0035] DCI generating section 102 generates DCI including resource allocation information (DL allocation information or UL allocation information) of a DL (Downlink) data signal or a UL (Uplink) data signal, and outputs the DCI to signal allocating section 105. Furthermore, DCI generating section 102 outputs, of the generated DCI, DL allocation information to signal allocating section 105 and outputs UL allocation information to signal separating section 108.

[0036] Error correction coding section 103 performs error correction coding on the transmission data signal (DL data signal) and higher layer signaling (CORESET setting information) inputted from CORESET setting section 101 , and outputs the coded signal to modulation section 104 .

[0037] The modulation unit 104 performs modulation processing on the signal received from the error correction coding unit 103 and outputs the modulated signal to the signal allocation unit 105 .

[0038] The signal allocation unit 105 allocates the signal (DL data signal, higher layer signaling) received from the modulation unit 104 to downlink resources based on the DL allocation information input from the DCI generation unit 102. Furthermore, the signal allocation unit 105 allocates the DCI input from the DCI generation unit 102 to resources (one or more CCEs in the CORESET) according to the CORESET setting information input from the DCI generation unit 102. For example, the signal allocation unit 105 may change the mapping of REGs or the mapping of CCEs to search spaces according to the number of symbols to which the CORESET indicated in the CORESET setting information is set. In this manner, a transmission signal is formed. The formed transmission signal is output to the transmission unit 106.

[0039] Transmitting section 106 performs radio transmission processing such as up-conversion on the transmission signal input from signal allocating section 105, and transmits the signal to terminal 200 via an antenna.

[0040] Receiving section 107 receives a signal transmitted from terminal 200 via an antenna, performs radio reception processing such as down-conversion on the received signal, and outputs the signal to signal separating section .

[0041] Based on the UL allocation information input from DCI generation section 102 , signal separation section 108 separates the UL data signal from the received signal received from receiving section 106 , and outputs the UL data signal to demodulation section 109 .

[0042] The demodulation section 109 performs demodulation processing on the signal input from the signal separation section 108 , and outputs the obtained signal to the error correction decoding section 110 .

[0043] Error correction decoding section 110 decodes the signal inputted from demodulation section 109 and obtains a received data signal from terminal 200 (UL data signal).

[0044] [Device configuration] Fig. 8 is a block diagram showing a configuration of terminal 200 according to this embodiment. In Fig. 8, terminal 200 has receiving section 201, signal separating section 202, DCI receiving section 203, demodulating section 204, error correction decoding section 205, configuration information receiving section 206, error correction coding section 207, modulating section 208, signal allocating section 209 and transmitting section 210.

[0045] The receiving unit 201 receives a received signal via an antenna, performs reception processing such as down-conversion on the received signal, and then outputs the received signal to the signal separating unit 202. The received signal includes, for example, a DL data signal, higher layer signaling (including CORESET setting information), or DCI (including resource allocation information, etc.).

[0046] The signal separator 202 separates an uplink signal from the received signal and outputs the signal to the demodulator 204. Furthermore, based on information indicating the CORESET setting input from the setting information receiver 206, the signal separator 202 identifies a resource corresponding to a CORESET to be monitored by the own device (a CORESET to be separated) from the received signal received from the receiver 201, separates a signal allocated to the resource, and outputs the signal to the DCI receiver 203. Furthermore, based on DL allocation information input from the DCI receiver 203, the signal separator 202 separates a DL data signal from the received signal and outputs the signal to the demodulator 204.

[0047] DCI receiving section 203 detects (receives) DCI addressed to its own device by attempting to decode the signal allocated to the resource corresponding to CORESET input from signal separating section 202. DCI receiving section 203 outputs UL allocation information indicated in the received DCI to signal allocating section 209, and outputs DL allocation information to signal separating section 202.

[0048] The demodulation unit 204 demodulates the signal input from the signal separation unit 202 and outputs the demodulated signal to the error correction decoding unit 205 .

[0049] The error correction decoding unit 205 decodes the demodulated signal received from the demodulation unit 204 , outputs the obtained received data signal, and outputs the obtained higher layer signaling to the configuration information receiving unit 206 .

[0050] The setting information receiving unit 206 specifies the setting of CORESET for each terminal 200, based on the CORESET setting information included in the higher layer signaling output from the error correction decoding unit 205. Then, the setting information receiving unit 206 outputs the specified information to the signal separating unit 202.

[0051] Error correction coding section 207 performs error correction coding on the transmission data signal (UL data signal) and outputs the coded data signal to modulation section 208.

[0052] The modulation section 208 modulates the data signal inputted from the error correction coding section 207 and outputs the modulated data signal to the signal allocation section 209 .

[0053] Signal allocating section 209 identifies resources to which UL data is allocated, based on the UL allocation information input from DCI receiving section 203. Then, signal allocating section 209 allocates the data signal input from modulating section 209 to the identified resources, and outputs the data signal to transmitting section 210.

[0054] The transmitter 210 performs transmission processing such as up-conversion on the signal input from the signal allocation unit 209, and transmits the signal via an antenna.

[0055] [Operation of base station 100 and terminal 200] The operations of base station 100 and terminal 200 having the above configuration will now be described in detail.

[0056] FIG. 9 is a sequence diagram showing the operations of base station 100 and terminal 200.

[0057] Base station 100 configures a CORESET for each terminal 200 (ST101). Base station 100 transmits the configured CORESET configuration information to terminal 200 using higher layer signaling (ST102). Next, base station 100 generates DCI including resource allocation information and the like (ST103). Base station 100 arranges the generated DCI in one of the search spaces in the CORESET configured in ST101, and transmits it to terminal 200 (ST104). Details of the mapping method (arrangement method) of CCEs (REGs) constituting a CORESET will be described later.

[0058] Meanwhile, terminal 200 monitors the CORESET (search space) based on the CORESET setting information included in the higher layer signaling received in ST102, and detects DCI addressed to itself (ST105).

[0059] Next, a mapping method for CCEs (REGs) constituting a CORESET will be described in detail.

[0060] Operational examples 1-1 to 1-3 according to this embodiment will be described below.

[0061] <Example of operation 1-1> In operation example 1-1, for mapping of CCEs and REGs to a CORESET, the number of REGs constituting a CCE (the number of REGs per CCE) is a power of two, and the REG bundling size is a power of two.

[0062] Furthermore, in the operation example 1-1, the number of symbols for which CORESET is set is a power of two.

[0063] In this way, even if the number of symbols in a CORESET set in terminal 200 is different, the mapping of REGs constituting CCEs in a CORESET is common, and the mapping of REGs becomes simple.

[0064] In addition, by making the REG bundling size a power of 2, adjustments become easier when different subcarrier spacings (numerology) are assigned to the same slot or when interference control is performed between cells.

[0065] Figure 10A-C shows the number of REGs per CCE is 4 (=2 2 ), REG bundling size is 2 (=2 1 ) is a mapping example of REG in the case of

[0066] 10A to 10C, the mapping of REGs is time first mapping. That is, the REGs constituting one CCE are arranged in units of REG bundling size with priority in the time direction (symbols) over the frequency direction (PRB). Also, in FIG. 10A to 10C, the mapping of CCEs to search spaces is time first mapping. That is, base station 100 allocates DCI in units of CCEs with priority in the time direction (symbols) over the frequency direction (PRB). As a result, the REGs constituting the CCEs used for transmitting DCI are arranged in different symbols as much as possible in units of REG bundling size.

[0067] In Figure 10A, the number of symbols in CORESET is 1 (=2 0 ) is a mapping example of REG in the case of

[0068] As shown in Fig. 10A, when the number of symbols in CORESET is 1, even in the case of time first mapping, all REGs constituting CCE are arranged in the same symbol (symbol #0). Therefore, for example, by limiting the number of symbols in CORESET to 1, it is possible to realize frequency first mapping with the same design as time first mapping without separately defining the mapping of frequency first mapping.

[0069] In particular, in high frequency bands, such as the millimeter wave band, it is possible to change the beam (precoding) for each symbol. In such a case, the terminal 200 (UE) can easily perform time division multiplexing by monitoring multiple CORESETs (FIG. 10A) arranged in one symbol with different symbols. Therefore, in high frequency bands, it is also effective to limit the number of symbols in a CORESET to one.

[0070] In Figure 10B, the number of symbols in CORESET is 2 (=2 1 ) is a mapping example of REG in the case of

[0071] As shown in Fig. 10B, when the number of symbols in the CORESET is 2, two of the REGs constituting the CCE are arranged in symbol #0, and the remaining two REGs are arranged in symbol #1. In other words, the REGs constituting the CCE are arranged in two symbols, two each, in units of the REG bundling size.

[0072] In Figure 10C, the number of symbols in CORESET is 4 (=2 2 ) is a mapping example of REG in the case of

[0073] As shown in Fig. 10C, when the number of symbols in a CORESET is 4, REGs constituting one CCE are each arranged in two symbols in REG bundling size units (2REGs). Also, for example, REGs constituting two CCEs used to transmit DCI of Aggregation level 2 are each arranged in four different symbols.

[0074] By arranging the REGs of each CCE as shown in FIG. 10B and FIG. 10C, the REGs constituting one or more CCEs used for transmitting DCI are arranged uniformly for each symbol.

[0075] For example, Fig. 11 shows an example of the number of REGs per symbol for each aggregation level (AL1, AL2, AL4, AL8) when the number of REGs per CCE is 4, the number of symbols is 2, and the number of REG bundlings is 2 (see Fig. 10B, for example). As shown in Fig. 11, it can be seen that the number of REGs per symbol constituting a CCE used to transmit the same DCI is the same for all aggregation levels.

[0076] Moreover, Fig. 12 shows an example of the number of REGs per symbol for each aggregation level when the number of REGs per CCE is 4, the number of symbols is 4, and the number of REG bundlings is 2 (for example, see Fig. 10C). As shown in Fig. 12, in AL1, four REGs constituting one CCE used for transmitting DCI are evenly arranged in two symbols. Also, as shown in Fig. 12, it can be seen that the number of REGs per symbol constituting a CCE used for transmitting the same DCI is equal in all aggregation levels in AL2, AL4, and AL8.

[0077] In this way, by arranging the REGs that are a power of 2 that make up each CCE in symbols in units of a REG bundling size that is a power of 2, the number of REGs that make up the CCEs used to transmit DCI becomes uniform for each symbol, making it easier to adjust the power between CCEs.

[0078] In addition, since the mapping of REGs and the mapping of CCEs to search spaces are based on time first mapping, when the aggregation level is high, PDCCH (DCI) is arranged in multiple symbols, which has the advantage of making power boosting easier.

[0079] Furthermore, by setting the REG bundling size to a power of 2, even if terminals 200 with different subcarrier intervals exist, it is possible to align the PRB intervals in the frequency domain, thereby improving resource utilization efficiency.

[0080] <Example 1-2> In the operation example 1-1, a case has been described in which the number of symbols in CORESET is a power of 2. In contrast to this, in the operation example 1-2, a case in which the number of symbols in CORESET is a value other than a power of 2 will be described.

[0081] For example, when the number of symbols in CORESET is a number of symbols other than a power of two, the mapping of REG is set as a reference for the number of symbols in the nearest power of two that is greater than the number of symbols in CORESET.

[0082] Specifically, when the number of symbols in CORESET is 3, as shown in FIG. 13, the number of symbols is 4 (=2 2 In the mapping of REG in the CORESET (see, for example, FIG. 10C), the mapping of REG in the CORESET symbols is set by puncturing or rate matching the final symbol.

[0083] In this way, although the number of REGs actually used differs from the standard REG mapping, the number of REGs per symbol constituting the CCE used to transmit the same DCI is equal when the aggregation level is 2, 4, or 8. In addition, since a common REG mapping design can be used for all symbols, there is an advantage in that the design is simplified.

[0084] For example, Fig. 14 shows the number of REGs per symbol for each aggregation level when the number of REGs per CCE is 4, the number of symbols is 3, and the number of REG bundlings is 2. Fig. 14 shows the number of REGs per symbol when the final symbol is punctured or rate matched based on REG mapping (see Fig. 10C and Fig. 12, for example) when the number of REGs per CCE is 4, the number of symbols is 4, and the number of REG bundlings is 2. As shown in Fig. 14, it can be seen that the number of REGs per symbol constituting CCEs used for transmitting the same DCI is equal in AL2, AL4, and AL8 at any aggregation level.

[0085] Also, as shown in Fig. 14, in AL1, REG constituting one CCE used for transmitting DCI may be arranged in two symbols or may be arranged in one symbol. When the number of symbols in which REG is arranged in AL1 is one symbol, that is, when the number of REGs is half the usual value (4 REGs), it is considered that sufficient reception quality cannot be expected. Therefore, for AL1, terminal 200 may be limited to monitor only CCEs arranged in two symbols.

[0086] In addition, when the number of symbols in CORESET is not a power of 2, the symbols are punctured or rate matched based on the mapping design of REG in a number of symbols greater than the number of symbols in CORESET. However, when the number of symbols in CORESET is not a power of 2, the symbols may be repeated based on the mapping design of REG in a number of symbols less than the number of symbols in CORESET. For example, when the number of symbols in CORESET is 5, the mapping of REG in a case where the number of symbols in CORESET is 4 (see, for example, FIG. 10C) is used as a reference, and the last symbol (symbol #3) or the first symbol (symbol #0) is repeated, so that the mapping of REG in a case where the number of symbols is 5 can be set.

[0087] In this way, according to operation example 1-2, even if the number of symbols in the CORESET is a number other than a power of 2, the number of REGs that make up the CCEs used to transmit DCI becomes uniform for each symbol, making it easier to adjust the power between CCEs.

[0088] In the operation example 1-2, the number of symbols in CORESET is not limited to three or five.

[0089] <Example 1-3> In the operation example 1-3, in addition to the above operation example 1-1, REG bundlings of the same CCE are arranged in the same PRB. That is, REGs constituting one CCE are arranged in multiple symbols of the same frequency in units of the REG bundling size.

[0090] Furthermore, at this time, the DMRS used for demodulating the CCE is allocated to the first symbol among the multiple symbols in which the CCE is allocated, and is not allocated to the remaining symbols.

[0091] In this way, the number of DMRSs can be reduced.

[0092] FIG. 15 shows an example of mapping of DMRS and REG when the number of COREST symbols is 2, the number of REGs per CCE is 4, and the REG bundling size is 2.

[0093] In Fig. 15, since the REG bundling size is 2, REGs constituting the same CCE are arranged in two adjacent PRBs. Also, REGs constituting the same CCE are arranged in two symbols #0 and #1 of the same frequency (2PRB) in units of the REG bundling size.

[0094] At this time, as shown in Fig. 15, the DMRS constitutes a CCE used for transmitting the same DCI, and is arranged in the leading symbol #0 among symbols in which REGs arranged in the same frequency in REG bundling size units are arranged. That is, as shown in Fig. 15, the DMRS is not arranged in symbol #1. In this case, terminal 200 performs channel estimation in symbol #1 using the DMRS of symbol #0 in which REGs constituting the same CCE are arranged.

[0095] Next, FIGS. 16A and 16B show an example of mapping of DMRS and REG when the number of COREST symbols is 4, the number of REGs per CCE is 4, and the bundling size of REG is 2.

[0096] 16A and 16B, similarly to FIG. 15, the bundling size of the REG is 2, so that the REGs constituting the same CCE are arranged in two adjacent PRBs.

[0097] In FIG. 16A, REGs constituting the same CCE are arranged in the same PRB (2PRBs) in units of REG bundling.

[0098] At this time, the DMRS constitutes the CCE used for transmitting the same DCI, and is allocated to the first symbol among the symbols in which REGs arranged at the same frequency in REG bundling size units are allocated.

[0099] For example, in FIG. 16A, in the case of aggregation level 2, two CCEs used for transmitting the same DCI are arranged in four symbols #0 to #3 of the same PRB (see, for example, PRBs #0 and #1). In this case, the DMRS is arranged in the first symbol #0 in PRBs #0 and #1, and is not arranged in the remaining symbols #1 to #3. Therefore, in a PRB (PRBs #0 and #1 in FIG. 16A) in which two CCEs used for DCI of aggregation level 2 are arranged, terminal 200 can use the DMRS of symbol #0 for demodulation in symbol #2 and symbol #3 in addition to symbol #1.

[0100] On the other hand, when the aggregation level is 1, as in PRBs #8 and #9 and PRBs #12 and #13 in Fig. 16A, the DMRS is placed in the first symbol (symbol #0 or symbol #2 in Fig. 16A) among symbols in which one CCE (REG) used for transmitting the same DCI is placed. In other words, in the case of aggregation level 1, the DMRS is placed in the first symbol among symbols in which the REG constituting each CCE is placed.

[0101] Also, in FIG. 16B, in the case of Aggregation level 2, two CCEs used for transmitting the same DCI are arranged in different PRBs (for example, PRB#0,#1 and PRB#8,#9). In this case, the DMRS is arranged in the leading symbol among the symbols in which the REGs constituting these CCEs are arranged for each frequency (2PRBs) in which the REGs constituting these CCEs are arranged in REG bundling size units. For example, when two CCEs used for transmitting the same DCI are CCEs arranged in symbols #0,#1 of PRB#0,#1 and CCEs arranged in symbols #2,#3 of PRB#8,#9, the DMRS is arranged in the leading symbols #0,#2 among the symbols in which the CCEs of PRB#0,#1 and PRB#8,#9 are arranged, respectively. In this case, for CCEs placed in symbols #0 and #1 in FIG. 16B, terminal 200 performs channel estimation using the DMRS placed in symbol #0, and for CCEs placed in symbols #2 and #3, terminal 200 performs channel estimation using the DMRS placed in symbol #2.

[0102] In this way, according to the operation example 1-3, the DMRS is shared among the CCEs arranged in multiple symbols of the same PRB. Specifically, the DMRS is arranged in the first symbol and not in the remaining symbols, so that the number of DMRSs can be reduced. Furthermore, the terminal 200 can demodulate the DCI arranged in the subsequent symbols early by using the DMRS arranged in the first symbol.

[0103] In addition, when it is specified that a DMRS is shared among a plurality of UEs, as shown in FIG. 16B, in the case of Aggregation level 2, even if two CCEs are arranged in different PRBs, terminal 200 may perform channel estimation using the DMRS arranged in the first PRB of each CCE. In this way, although the precoding cannot be changed for each CCE, the amount of DMRS resources can be reduced by the amount of DMRS arranged in the subsequent PRB. In addition, when DMRS is spatially or code-multiplexed, it is also possible to use a part of the DMRS multiplexed in the first symbol for the front symbol and the other part for the rear symbol.

[0104] Operation examples 1-1 to 1-3 have been described above.

[0105] In this manner, in this embodiment, for mapping of CCEs and REGs arranged in a CORESET, the number of REGs per CCE is a power of two, and the size of REG bundling is a power of two.

[0106] That is, the multiple REGs constituting the CCE are divided into powers of 2 in units of REG bundling size. This simplifies the mapping design of the REG. For example, by making the number of symbols of the CORESET a power of 2, the REGs are uniformly arranged in each symbol in units of REG bundling in each CCE. Therefore, the number of REGs between symbols is uniform in one or more CCEs used for transmitting DCI, which prevents the variation in the received SINR for each symbol and simplifies the adjustment of power between CCEs.

[0107] Furthermore, in this embodiment, based on the mapping setting of REG when the number of symbols is a power of 2, it is possible to realize REG mapping when the number of symbols in CORESET is other than a power of 2 by puncturing, repetition or rate matching of the symbols from the mapping setting of the REG. As a result, even if the number of symbols in CORESET is not a power of 2, the number of REGs between symbols becomes uniform, and it is possible to prevent variation in the received SINR for each symbol and facilitate the adjustment of power between CCEs.

[0108] As described above, according to this embodiment, it is possible to appropriately arrange the CCEs that make up a CORESET.

[0109] In the above example, the number of REGs per CCE is 4 (=2 2 ), REG bundling size is 2 (=2 1 ) REG mapping example was explained, but the REG bundling size is 4 (=2 2 In this case, the REGs constituting the CCE are arranged in the same symbol. Also, if the number of REGs constituting the CCE (the number of REGs per CCE) is 8 (=2 3 ), the REG bundling size is 2(=2 1 ), 4(=2 2 ) or 8(=2 3 ) can be used.

[0110] In the above, a case has been described in which base station 100 notifies terminal 200 of configuration information of CORESET to be set by higher layer signaling. However, the configuration information of CORESET may be defined between base station 100 and terminal 200. In this case, it is not necessary to notify the configuration of CORESET by higher layer signaling.

[0111] (Embodiment 2) A base station and a terminal according to this embodiment have basic configurations in common with base station 100 and terminal 200 according to embodiment 1, and therefore will be described with reference to FIGS.

[0112] In this embodiment, regarding the mapping of CCEs and REGs to the CORESET, the number of REGs per CCE is set to 6, and the size of the REG bundling is changed according to the number of symbols in the CORESET.

[0113] By doing so, even when the number of REGs per CCE is 6, it is possible to make the number of REGs arranged in each symbol uniform for CORESET symbol numbers 2, 3, and 4.

[0114] Hereinafter, the operation example according to this embodiment will be specifically described.

[0115] Note that hereinafter, the number of REGs per CCE is set to 6, the REG bundling size is set to 3 when the number of symbols in the CORESET is a power of 2 (1, 2, 4, 8,...), and the REG bundling size is set to 2 when the number of symbols in the CORESET is 3 or 6. Also, the aggregation level is a power of 2.

[0116] Figs. 17A to 17D show examples of REG mapping according to this embodiment.

[0117] <When the number of symbols in the CORESET is a power of 2> Figs. 17A and 17B show examples of REG mapping when the number of symbols in the CORESET is a power of 2. Specifically, Fig. 17A shows an example of REG mapping when the CORESET has 2 symbols, and Fig. 17B shows an example of REG mapping when the CORESET has 4 symbols.

[0118] As shown in Figs. 17A and 17B, when the number of symbols in the CORESET is a power of 2, the REG bundling size is 3.

[0119] Here, assuming Time first mapping, as shown in FIGS. 17A and 17B, each CCE is arranged in 2 symbols. Also, as shown in FIG. 17B, when the CORESET is 4 symbols, at Aggregation level 2, the REGs that make up the two CCEs used for DCI transmission are arranged 3 by 3 in 4 symbols. Also, although not shown, when the number of symbols of the CORESET is another value that is a power of 2 (1 symbol or 8 symbols), the REG bundling size can be arranged as 3 in the same way.

[0120] <When the number of symbols of the CORESET is 3 or 6> FIG. 17C shows an example of REG mapping when the CORESET is 3 symbols, and FIG. 17D shows an example of REG mapping when the CORESET is 6 symbols.

[0121] As shown in FIGS. 17C and 17D, when the number of symbols of the CORESET is 3 or 6, the REG bundling size is 2.

[0122] Here, assuming Time first mapping, as shown in FIGS. 17C and 17D, each CCE is arranged in 3 symbols. Also, as shown in FIG. 17D, when the CORESET is 6 symbols, at Aggregation level 2, the REGs that make up the two CCEs used for DCI transmission are arranged 2 by 2 in 6 symbols.

[0123] FIGS. 18, 19, 20, and 21 respectively show examples of REG mapping for each Aggregation level (AL1, AL2, AL4, AL8) when the number of REGs per CCE is 6 and the number of symbols of the CORESET is 2, 4, 3, 6 (refer to FIGS. 17A - D).

[0124] For the number of symbols of the CORESET 2 shown in FIG. 18 and the number of symbols of the CORESET 3 shown in FIG. 20, the number of REGs arranged in each symbol is equal at all Aggregation levels.

[0125] Furthermore, when the number of symbols in the CORESET shown in Fig. 19 is 4 and when the number of symbols in the CORESET shown in Fig. 21 is 6, the number of REGs arranged in each symbol is equal at aggregation level 2 or higher. Furthermore, at aggregation level 1, when the number of symbols in the CORESET shown in Fig. 19 is 4, the REGs constituting the DCI are arranged in two symbols, and when the number of symbols in the CORESET shown in Fig. 21 is 6, the REGs constituting the DCI are arranged in three symbols.

[0126] In this way, in this embodiment, the number of REGs per CCE is set to 6, and the REG bundling size is changed according to the number of symbols in the CORESET. As a result, in each CCE, REGs are uniformly arranged in each symbol in units of REG bundling. Therefore, the number of REGs between symbols is uniform in one or more CCEs used for transmitting DCI, preventing the variation in the received SINR for each symbol and making it possible to easily adjust the power between CCEs.

[0127] In addition, the CORESET symbol numbers of 5, 7, etc. not shown in the above examples may be expanded to the actual CORESET symbol number using puncturing, rate matching, or repetition based on a mapping design of a symbol number close to the actual CORESET symbol number (e.g., symbol number 2, 3, 4, 6), as in operation examples 1-3.

[0128] Also, the number of symbols in the CORESET may be limited to 1, 2, 3, 4, 6, or 8, which are numbers of symbols that make it easy to allocate 6 REGs per CCE.

[0129] The embodiments of the present disclosure have been described above.

[0130] In the above embodiment, the physical mapping of the frequency domain (PRB#) is described as an example, but the logical mapping can also be applied. In the case of the logical mapping, the logical mapping is changed to the physical mapping, so that even if the frequency domain is continuous in the logical mapping, it is arranged at a physically separated position, so that a frequency diversity effect can be obtained.

[0131] Also, in order to obtain a frequency diversity effect, an example has been shown in which REGs constituting each CCE are arranged in different PRBs for each REG bundling, but the mapping of REGs constituting each CCE is not limited to this.

[0132] The control resource set (CORESET) is also sometimes called a search space.

[0133] Furthermore, multiple CORESETs may be set for a UE. For example, in the above embodiment, symbol #0 is shown as the leading symbol to which a CORESET is set, but other CORESETs may be set from subsequent symbols.

[0134] Moreover, the higher layer signaling may be replaced with MAC signaling, which allows the frequency of changing the case set in the UE to be increased compared to RRC signaling.

[0135] Furthermore, the above-mentioned DMRS may be a reference signal with a different name.

[0136] Moreover, the above-mentioned embodiment 1 and embodiment 2 may be combined. That is, base station 100 and terminal 200 may determine the REG bundling size or the number of symbols of a CORESET and set mapping of REGs depending on whether the number of REGs per CCE is a power of 2 (embodiment 1) or whether the number of REGs per CCE is 6 (embodiment 2).

[0137] The present disclosure can be realized by software, hardware, or software linked to hardware. Each functional block used in the description of the above embodiment may be realized partially or entirely as an LSI, which is an integrated circuit, and each process described in the above embodiment may be controlled partially or entirely by one LSI or a combination of LSIs. The LSI may be composed of individual chips, or may be composed of one chip to include some or all of the functional blocks. The LSI may have input and output data. Depending on the degree of integration, the LSI may be called an IC, a system LSI, a super LSI, or an ultra LSI. The method of integration is not limited to LSI, and may be realized by a dedicated circuit, a general-purpose processor, or a dedicated processor. In addition, a field programmable gate array (FPGA) that can be programmed after LSI manufacture, or a reconfigurable processor that can reconfigure the connections and settings of circuit cells inside the LSI may be used. The present disclosure may be realized as digital processing or analog processing. Furthermore, if a new integrated circuit technology that can replace LSI appears due to the progress of semiconductor technology or a derivative technology, it is possible to integrate the functional blocks using that technology. The application of biotechnology is also a possibility.

[0138] The base station of the present disclosure includes a circuit for allocating downlink control signals to a control channel area consisting of a plurality of control channel elements (CCEs), and a transmitter for transmitting the downlink control signals, wherein the number of resource element groups (REGs) constituting the CCEs is a power of two, and a bundling size indicating the number of REGs constituting the CCEs that are placed in adjacent resource blocks is also a power of two.

[0139] In the base station of the present disclosure, the number of symbols in which the control channel region is allocated is a power of two.

[0140] In the base station of the present disclosure, the REGs constituting one CCE are arranged in units of the bundling size with priority in the time direction over the frequency direction.

[0141] In the base station of the present disclosure, the circuit allocates the downlink control signal in units of the CCE, giving priority to the time direction over the frequency direction.

[0142] In the base station of the present disclosure, REGs constituting one of the CCEs are arranged in a plurality of symbols of the same frequency in units of the bundling size.

[0143] In the base station of the present disclosure, a reference signal is placed in the first symbol among the plurality of symbols, and no reference signal is placed in the remaining symbols.

[0144] The base station of the present disclosure includes a circuit that assigns downlink control signals to a control channel area consisting of multiple control channel elements (CCEs) and a transmitter that transmits the downlink control signals, and when the number of resource element groups (REGs) constituting the CCEs is 6 and the number of symbols in which the control channel area is arranged is a power of 2, a bundling size indicating the number of REGs constituting the CCE that are arranged in adjacent resource blocks is 3, and when the number of symbols in which the control channel area is arranged is 3 or 6, the bundling size is 2.

[0145] A terminal of the present disclosure comprises a receiver that receives a downlink control signal in a control channel area composed of a plurality of control channel elements (CCEs), and a circuit that decodes the downlink control signal, wherein the number of resource element groups (REGs) that constitute the CCEs is a power of two, and a bundling size indicating the number of REGs that are placed in adjacent resource blocks among the REGs that constitute the CCEs is a power of two.

[0146] The communication method disclosed herein assigns a downlink control signal to a control channel area consisting of a plurality of control channel elements (CCEs), transmits the downlink control signal, the number of resource element groups (REGs) constituting the CCE being a power of two, and a bundling size indicating the number of REGs among the REGs constituting the CCE that are arranged in adjacent resource blocks being a power of two.

[0147] The communication method disclosed herein receives a downlink control signal in a control channel area consisting of a plurality of control channel elements (CCEs), decodes the downlink control signal, the number of resource element groups (REGs) constituting the CCE being a power of two, and a bundling size indicating the number of REGs among the REGs constituting the CCE that are arranged in adjacent resource blocks being a power of two. [Industrial Applicability]

[0148] One aspect of the present disclosure is useful for mobile communication systems. [Explanation of symbols]

[0149] 100 base stations 101 CORESET setting section 102 DCI generation section 103,207 Error correction coding section 104,208 Modulation section 105,209 Signal allocation section 106,210 Transmitter 107,201 Receiver 108,202 Signal separation section 109,204 Demodulation section 110,205 Error correction decoding section 200 terminals 203 DCI Receiver 206 Setting information receiver

Claims

1. A control circuit is provided for generating and outputting a downlink control signal in a control channel region formed of a plurality of control channel elements (CCEs); In a control resource set (CORESET), each of the plurality of CCEs is composed of six resource element groups (REGs), the six REGs constitute one or more REG bundles, and the size of the one or more REG bundles varies according to the number of symbols of the CORESET; Device.

2. The number of symbols of the CORESET is notified by higher layer signaling.

2. The apparatus of claim 1.

3. The number of symbols in the CORESET represents the duration of the CORESET.

2. The apparatus of claim 1.

4. The number of REGs arranged in each symbol of the CORESET from the six REGs is the same; 2. The apparatus of claim 1.

5. A common demodulation reference signal (DMRS) is applied to each of the REG bundles.

2. The apparatus of claim 1.

6. The REGs included in each of the one or more REG bundles are contiguously mapped in the CORESET.

2. The apparatus of claim 1.

7. generating and outputting a downlink control signal in a control channel region formed of a plurality of control channel elements (CCEs); In a control resource set (CORESET), each of the plurality of CCEs is composed of six resource element groups (REGs), the six REGs constitute one or more REG bundles, and the size of the one or more REG bundles varies according to the number of symbols of the CORESET; Communication methods.

8. The number of REGs arranged in each symbol of the CORESET from the six REGs is the same; The communication method according to claim 7.

9. A control channel area including a plurality of control channel elements (CCEs) is used to generate and output a downlink control signal. In a control resource set (CORESET), each of the plurality of CCEs is composed of six resource element groups (REGs), the six REGs constitute one or more REG bundles, and the size of the one or more REG bundles varies according to the number of symbols of the CORESET; Integrated circuits.

10. The number of REGs arranged in each symbol of the CORESET from the six REGs is the same; 10. The integrated circuit of claim 9.

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