Calculation device, calculation program, recording medium, and calculation method
The computing device addresses the inefficiencies in solving optimization problems by employing a processing procedure that updates vectors using binary and non-binary values, resulting in high-speed and efficient solutions to optimization problems with multiple constraints.
Patent Information
- Application Number
- JP2022033245
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-03-04
- Publication Date
- 2025-05-12
- Estimated Expiration
- 2042-03-04
AI Technical Summary
Existing computing devices struggle to efficiently solve optimization problems, particularly those involving binary and non-binary values, with existing methods often being slow and inefficient.
A computing device is designed with a processing procedure that includes updates to first, second, and third vectors, where the updates involve using binary and non-binary values to optimize the solution, allowing for efficient handling of optimization problems with multiple constraints.
The computing device effectively solves optimization problems, including those with binary and non-binary values, at high speed and efficiency, even with multiple inequality constraints, thereby improving calculation speed and accuracy.
Smart Images

Figure 0007675038000049 
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Figure 0007675038000051
Abstract
Description
[Technical field]
[0001] The present invention relates to a computing device, a computing program, a recording medium, and a computing method. [Background technology]
[0002] Optimization problems and the like are solved by computing devices. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] International Publication No. 2020 / 196862 Summary of the Invention [Problem to be solved by the invention]
[0004] The embodiments of the present invention provide a computing device, a computing program, a recording medium, and a computing method capable of solving an optimization problem. [Means for solving the problem]
[0005] According to an embodiment of the present invention, a computing device includes a processing device capable of performing a processing procedure. The processing procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector. The first update includes updating the first vector using the second vector and the third vector. The second update includes updating the second vector using the first vector. The processing device is capable of outputting at least one output of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure. The output includes an i-th value and a j-th value. The i is an integer between 1 and n inclusive. The n is an integer between 2 and 1 inclusive. The j is an integer between 1 and n inclusive. The j is different from the i. The i-th value is binary. The j-th value is non-binary. The variables of the first vector include the i-th first variable x i and the jth first variable x j The variables of the second vector include the i-th second variable y i and the j-th second variable y j The second update includes updating the i-th first variable x i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i The second update includes updating the j-th first variable x j The first function is calculated from the j-th second variable y before updating j In addition, the j-th second variable y j This includes updating the [Brief description of the drawings]
[0006] [Figure 1] FIG. 1 is a schematic diagram illustrating a computing device according to an embodiment. [Diagram 2] FIG. 2 is a schematic diagram illustrating a part of a computing device according to an embodiment. [Diagram 3]FIG. 3 is a schematic diagram illustrating a computing device according to the embodiment. [Figure 4] FIG. 4 is a schematic diagram illustrating a computing device according to the embodiment. [Diagram 5] FIG. 5 is a schematic diagram illustrating a computing device according to the embodiment. [Figure 6] FIG. 6 is a schematic diagram illustrating a computing device according to the embodiment. [Figure 7] FIG. 7 is a schematic diagram illustrating a computing device according to the embodiment. [Figure 8] 8(a) to 8(d) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 9] 9(a) to 9(d) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 10] 10(a) to 10(e) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 11] 11(a) to 11(d) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 12] 12(a) to 12(d) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 13] 13(a) to 13(e) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 14] 14(a) to 14(d) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 15] 15(a) to 15(d) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 16] 16(a) to 16(e) are graphs illustrating the operation of the computing device according to the embodiment. [Figure 17] FIG. 17 is a schematic diagram illustrating the operation of the computing device according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In this specification and each drawing, elements similar to those described above with reference to the previous drawings are given the same reference numerals and detailed descriptions thereof will be omitted as appropriate.
[0008] (First embodiment) FIG. 1 is a schematic diagram illustrating a computing device according to an embodiment. 1, a computing device 110 according to an embodiment includes a processing device 70. The processing device 70 is capable of repeatedly executing a processing procedure.
[0009] The procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector. The first vector corresponds to a first set of variables {x}. The second vector corresponds to a second set of variables {y}. The third vector corresponds to a third set of variables {u}.
[0010] The first update includes updating the first vector with the second vector and the third vector. The second update includes updating the second vector with the first vector. For example, the second update can be performed without using the third vector.
[0011] The processing device 70 can output at least one of the output (output data 77O) of the first vector obtained after repeating the processing procedure and the function of the first vector obtained after repeating the processing procedure. The function of the first vector, for example, converts the elements of the first vector into integers. In one example, when the elements of the first vector are equal to or greater than 1 / 2, the output of the function of the first vector is 1, and when the elements of the first vector are less than 1 / 2, the output of the function of the first vector is 0. In the embodiment, the function of the first vector can be modified in various ways.
[0012] 1, the calculation device 110 may include an acquisition unit 78. The acquisition unit 78 may acquire conditions (input information 77I) to be applied to the calculation, etc. The output data 77O may be output to the outside via the acquisition unit 78. In this case, the acquisition unit 78 may be an interface for input / output.
[0013] In the example shown in FIG. 1, the third update includes updating the third vector using the first vector and the second vector.
[0014] The computing device 110 according to the embodiment can solve, for example, an optimization problem. The optimization problem may include, for example, an Ising problem. For example, in the optimization problem, an objective function f(x) and a plurality of inequality constraints (or a plurality of equality constraints) are set. When these constraints are given, a first vector is obtained that reduces the value of the objective function f(x).
[0015] The output output from the processing device 70 includes a plurality of values. The plurality of values includes a first value to an nth value, where "n" is an integer equal to or greater than 2. The output includes an i-th value and a j-th value. "i" is an integer equal to or greater than 1 and equal to or less than n. "j" is an integer equal to or greater than 1 and equal to or less than n. "j" is different from "i". In one example, the i-th value is a binary value and the j-th value is a non-binary value. The non-binary value is, for example, a continuous value. The non-binary value is, for example, a multi-value having three or more values. In this way, a portion of the plurality of values is output as a binary value. Another portion of the plurality of values is output as a non-binary value.
[0016] The first vector and the second vector are n-dimensional. The first vector is a set of variables x1 to x n The second vector is a set of variables y1 to y n The variables in the first vector are the i-th first variable x i and the jth first variable x j The variables of the second vector are the i-th second variable y i and the jth second variable y j Including.
[0017] In an embodiment, the update of the second vector corresponding to a binary output is different from the update of the second vector corresponding to a non-binary output.
[0018] For example, the following is performed as an update for the binary output: i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i This includes updating the
[0019] For example, the following updates are performed for the non-binary outputs: j The first function calculated from the jth second variable y before updating j In addition, the jth second variable y j This includes updating the
[0020] In this manner, in the embodiment, optimization problems involving binary and non-binary values can be properly solved.
[0021] The third vector has dimension m, where m is an integer equal to or greater than 1. The variables of the third vector are the qth third variable u q The variables of the third vector are the set of variables u1 to u q "m" is the number of inequality constraints set with respect to the first vector.
[0022] In the embodiment, when multiple inequality constraints (or multiple equality constraints) are set, the optimization problem can be solved, for example, the optimization problem can be solved quickly.
[0023] 1, in this example, the processing device 70 includes a processing unit 70P and a storage unit 70M. The processing unit 70P can perform a first update, a second update, and a third update. The storage unit 70M can store a first vector, a second vector, and a third vector.
[0024] In this example, the processing unit 70P includes a first processing portion 10P, a second processing portion 20P, and a third processing portion 30P. The first processing portion 10P is capable of performing a first update. The second processing portion 20P is capable of performing a second update. The third processing portion 30P is capable of performing a third update.
[0025] In this example, the memory unit 70M includes a first memory portion 10M, a second memory portion 20M, and a third memory portion 30M. The first memory portion 10M can store a first vector. The second memory portion 20M can store a second vector. The third memory portion 30M can store a third vector.
[0026] Let "k" be the number of times the processing procedure is repeated. In this example, the processing device 70 includes a second control unit 75. The second control unit 75 may provide "k" to the second processing part 20P. The second control unit 75 may provide "k" to the third processing part 30P.
[0027] 1, the first vector x(k) before updating stored in the first storage portion 10M is supplied to the first processing portion 10P and the third processing portion 30P. The second vector y(k) before updating stored in the second storage portion 20M is supplied to the second processing portion 20P and the first processing portion 10P. The third vector u(k) before updating stored in the third storage portion 30M is supplied to the third processing portion 30P and the first processing portion 10P.
[0028] The updated first vector x(k+1) output from the first processing portion 10P is supplied to the first storage portion 10M, the second processing portion 20P, and the third processing portion 30P. The updated second vector y(k+1) output from the second processing portion 20P is supplied to the second storage portion 20M. The updated third vector u(k+1) output from the third processing portion 30P is input to the third storage portion 30M.
[0029] By performing such an iterative procedure including updates, a solution can be obtained, for example, quickly, when there are constraints.
[0030] 1, the processing device may include first to sixth signal paths 76a to 76f. Signals (e.g., information) are transmitted and received between the processing device 70P and the storage device 70M via these signal paths. The first processing part 10P includes a first processing input part 10Pi and a first processing output part 10Po. The second processing part 20P includes a second processing input part 20Pi and a second processing output part 20Po. The third processing part 30P includes a third processing input part 30Pi and a third processing output part 30Po.
[0031] The first memory portion 10M includes a first memory input portion 10Mi and a first memory output portion 10Mo. The second memory portion 20M includes a second memory input portion 20Mi and a second memory output portion 20Mo. The third memory portion 30M includes a third memory input portion 30Mi and a third memory output portion 30Mo.
[0032] As shown in FIG. 1, the first to sixth signal paths 76a to 76f are connected to a processing input section, a processing output section, and Department , the storage input and the storage output are connected.
[0033] For example, these signal paths perform a first vector update, a second vector update, and a third vector update. A connection via a sixth signal path 76f uses the third vector to update the first vector.
[0034] First, an example of processing related to the "i-th" value corresponding to the binary output will be described. In the first processing portion 10P, for example, the following first formula is calculated.
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[0035] In the second processing portion 20P, for example, the following second equation is calculated.
number
[0036] In the third processing portion 30P, for example, the following third equation is calculated.
number
[0037] In the first formula above, "P h " is a function that will be described later. h " corresponds to, for example, a function related to the first proximity effect calculation. T " is the transpose of "Matrix A".
[0038] In the above second equation, "μ" corresponds to an adjustment coefficient. The second term on the right side of the second equation is the first function. The first function corresponds to the gradient of f(x(k+1)). "β" is a coefficient. The function d(x(k+1), k) of the third term of the second equation is expressed by the following fourth equation. In the fourth equation, p(k) is a coefficient.
number
[0039] In the above third formula, "Pg" is a function described later. "Pg" corresponds to, for example, a function related to the second proximity effect calculation. "σ" is a coefficient.
[0040] Thus, for example, in an update for a binary output, the first variable x i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i will be updated.
[0041] On the other hand, in the process of the "jth" value corresponding to the non-binary output, the third term function d(x(k+1), k) is deleted in the second equation above. That is, in the second update for the non-binary output, the jth first variable x j The first function calculated from the jth second variable y before updating jIn addition, the jth second variable y j will be updated.
[0042] In one example, the control of the difference between the process for binary output and the process for non-binary output may be equivalent to controlling whether or not to set the function d(x(k+1), k) to 0. In one example, the processing device 70 may include a first control unit 74 (see FIG. 1). The first control unit 74 may set the value of the i-th output to binary and the value of the j-th output to non-binary based on information Id1 on the calculation conditions. In this case, the first control unit 74 may control the above difference for the second update by setting the function d(x(k+1), k) to 0.
[0043] In the embodiment, when an objective function f(x) and a plurality of inequality constraints are given, a first vector is obtained that reduces the value of the objective function f(x) under the condition that all of the plurality of inequalities are satisfied. As already described, the first vector is n-dimensional. This process is expressed by the fifth equation.
[0044]
number
[0045] In the fifth formula, "a q " is an element of "vector a". "b q " is an element of "vector b". "A q,i " is an element of "Matrix A".
[0046] The inequality in equation 5 corresponds to equation 6.
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[0047] A computing device according to an embodiment (e.g., computing device 110) can derive a solution that is considered to be good for the optimization problem expressed by the above-mentioned formula 5 (or formula 6). In the computing device according to an embodiment, a first vector that reduces the value of the objective function f(x) is obtained. The first vector is, for example, "0" or "1". The first vector may be, for example, "-1" or "1". "A q,i " are the coefficients of the inequality constraints. The matrix "A" is the coefficient matrix of the inequality constraints.
[0048] Constraints may be given as equations. In this case, "a q =b q " Equality constraints can be treated as a kind of inequality constraint.
[0049] In the following description, in the process of calculation in the calculation device 110, for example, the element x i (i=1 to n) is treated as a continuous value ranging from 0 to 1. A "continuous value" is treated as numeric data, for example, as a floating point number or a fixed point number.
[0050] For example, the i-th element x corresponds to the i-th value of the binary output. i 0≦x i In relation to this constraint (0≦xi≦1), the function "P h (x)" is used. "x" is an n-dimensional vector. The function "P h The value of (x) is an n-dimensional vector. h (x)" is element x i Set the value of 0≦x i The function "P h The i-th element of "(x)" is expressed by the following equation 7.
[0051]
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[0052] Function "P h The function h(x) corresponds to the proximity operator of the function h(x). The function h(x) is a convex function. For example, if the function h(x) contains an element that is not between 0 and 1, then the function h(x) is 0. If all elements of x are not between 0 and 1, then the function h(x) is infinity.
[0053] In the embodiment, regarding the sixth equation, which is an inequality constraint, the function "P g (w)" is used. The vector w has dimension m. The function "P g (w) is an m-dimensional vector value. The function "P g The q-th element of "(w)" is expressed by the 8th equation.
[0054]
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[0055] In the eighth formula, "σ" is a parameter that adjusts the operation of the computing device according to the embodiment. "σ" is a positive constant. The value of "σ" may have some degrees of freedom. "σ" may be, for example, the value of the inverse of the square of the maximum singular value of the coefficient matrix "A" of the inequality constraint. "σ" may be, for example, a value slightly smaller than the value of the inverse of the square.
[0056] Function "P g For example, "g(w)" corresponds to the proximity operator of the function obtained by multiplying the convex conjugate of the function "g(w)" by σ. The function "g(w)" is a convex function. If the m-dimensional vector w satisfies "a≦w≦b", the function "g(w)" is 0. If the m-dimensional vector w does not satisfy "a≦w≦b", the function "g(w)" is infinity.
[0057] "p(k)" is a function that gradually increases from 0. For example, "p(k)" can increase from 0 to 2. "p(k)" causes a bifurcation phenomenon in the process of repeated calculations by a computing device. "d(x,k)" is a function that gradually increases from 0 to 2. i " has the role of setting the value to either 0 or 1.
[0058] The third vector is updated, for example, according to the following equation 9.
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[0059] In the 9th formula, "V" is a vector. The function "G" on the right hand side of the 9th formula is "Pg" in the 3rd formula.
[0060] In the embodiment, in the case of non-binary values (e.g., continuous values), "i" in the explanation of the above formulas 1 to 9 is replaced with "j". j The value range of the function "P" does not have to be 0 to 1. For example, the input information 77I (see FIG. 1) may include information (data) specifying the range of values of the continuous variables in the optimization model. The information Id2 may be provided from the acquisition unit 78 to the first processing part 10P. For example, h (x)" is the jth range according to the range specification information Id2. of "x j " value may be restricted.
[0061] Below, an example of a configuration that can be applied to updating the third vector will be described. FIG. 2 is a schematic diagram illustrating a part of a computing device according to an embodiment. As shown in FIG. 2, the third processing part 30P includes, for example, a multiplication circuit 30L, an addition circuit 30A, and a third vector function circuit 30G. The multiplication circuit 30L derives the product of a matrix "A" and a vector "V". The result (output) of the multiplication circuit 30L is supplied to the addition circuit 30A. The addition circuit 30A derives the sum of the result (output) of the multiplication circuit 30L and the third vector u(k) before the update stored in the third storage part 30M. The result (output) of the addition circuit 30A is supplied to the third vector function circuit 30G. With this configuration, the third vector u(k+1) after the update is obtained. The third vector u(k+1) after the update is supplied to the third storage part 30M.
[0062] The third vector, for example, adjusts the influence of the multiple inequality constraints. For example, if the first vector does not satisfy one of the multiple inequalities, the element of the third vector u(k+1) corresponding to that one inequality is changed. The third vector is repeatedly changed, and the changes in the third vector are accumulated. This adjusts the influence of each of the multiple inequalities. As a result, the first vector can be appropriately returned to the region of the allowable solution.
[0063] In the circuit block illustrated in FIG. 2, it is determined whether a first vector satisfies an inequality constraint. If the first vector does not satisfy the inequality constraint, a correction is made using a third vector. For the determination, a value whose main component is the first vector may be used as vector "V", which is an input to the circuit block. The value of vector "V" affects the speed of convergence of the optimization calculation or the error in the result of the optimization calculation.
[0064] In embodiments, optimization problems can be properly solved when inequality constraints are present, for example, in embodiments that can handle non-convex objective functions.
[0065] In the embodiment, it is not necessary to calculate the Hessian matrix or the inverse matrix of the Hessian matrix. For example, compared to the Newton method, the capacity of the storage unit 70M can be small. For example, it is possible to handle large-scale optimization.
[0066] In an embodiment, for example, each element of an n-dimensional or m-dimensional vector can be calculated in parallel.
[0067] In the embodiment, in the calculation of the first function, for example, a calculation by pipeline can be performed. For example, in the calculation of the product of a matrix and a vector, for example, a calculation by pipeline can be performed. For example, a calculation with high efficiency is possible. Speedup is possible by parallel calculation and pipelined calculation. According to the embodiment, a calculation device capable of improving the calculation speed can be provided.
[0068] In this embodiment, three types of vector value data are stored in the storage unit 70M. It is sufficient that the past data is stored. A flip-flop circuit can be used as the storage unit 70M.
[0069] In the embodiment, the processing portion does not need to hold the calculation result after the calculation result is supplied to another circuit. For example, the processing portion can be composed of a gate circuit.
[0070] The computing device according to the embodiment can be configured, for example, by a digital circuit. In the embodiment, the digital circuit is easy to design. The digital circuit may include, for example, an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit). The computing device according to the embodiment may be configured, for example, by a GPU (Graphics Processing Unit). For example, it may be configured as software with a high degree of parallelism. The computing device according to the embodiment may function as software of a general-purpose processor. The operation of the computing device according to the embodiment may be executed, for example, in the cloud.
[0071] FIG. 3 is a schematic diagram illustrating a computing device according to the embodiment. 3, a computing device 111 according to the embodiment includes a processing device 70. In the computing device 111, some of the configurations and operations of the processing unit and the storage unit are different from those in the computing device 110.
[0072] In the calculation device 111, the first vector x(k) before update stored in the first storage portion 10M is supplied to the first processing portion 10P. The second vector y(k) before update stored in the second storage portion 20M is supplied to the second processing portion 20P and the first processing portion 10P. The third vector u(k) before update stored in the third storage portion 30M is supplied to the third processing portion 30P and the first processing portion 10P.
[0073] In the calculation device 111, the updated first vector x(k+1) output from the first processing portion 10P is supplied to the first storage portion 10M, the second processing portion 20P, and the third processing portion 30P. The updated second vector y(k+1) output from the second processing portion 20P is supplied to the second storage portion 20M. The updated third vector u(k+1) output from the third processing portion 30P is input to the third storage portion 30M. In the calculation device 111, the third update includes updating the third vector using the first vector. Other configurations in the calculation device 111 may be similar to those in the calculation device 110.
[0074] 3, in this example, the calculation device 111 includes first to sixth signal paths 76a to 76f. Department , the storage input and the storage output may be connected.
[0075] In the calculation device 111, the first processing section 10P performs calculation of, for example, the following equation 10.
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[0076] In the second processing portion 20P, for example, the following equation 11 is calculated.
number
[0077] In the third processing portion 30P, for example, the following equation 12 is calculated.
number
[0078] The calculation device 111 can also appropriately solve an optimization problem when an inequality constraint exists. For example, a non-convex objective function can be handled. For example, large-scale optimization can be handled. Parallel calculation is possible. A calculation device capable of improving calculation speed can be provided.
[0079] FIG. 4 is a schematic diagram illustrating a computing device according to the embodiment. 4, a computing device 112 according to the embodiment includes a processing device 70. In the computing device 112, some of the configurations and operations of the processing unit and the storage unit are different from those in the computing device 110 or the computing device 111.
[0080] In the calculation device 112, the first vector x(k) before update stored in the first storage portion 10M is supplied to the first processing portion 10P and the second processing portion 20P. The second vector y(k) before update stored in the second storage portion 20M is supplied to the second processing portion 20P. The third vector u(k) before update stored in the third storage portion 30M is supplied to the third processing portion 30P and the first processing portion 10P.
[0081] In the calculation device 112, the updated first vector x(k+1) output from the first processing portion 10P is supplied to the first storage portion 10M and the third processing portion 30P. The updated second vector y(k+1) output from the second processing portion 20P is supplied to the second storage portion 20M and the first processing portion 10P. The updated third vector u(k+1) output from the third processing portion 30P is input to the third storage portion 30M.
[0082] In the computing device 112, the third update includes updating the third vector using the first vector. The other configurations of the computing device 112 may be similar to those of the computing device 110 or the computing device 111.
[0083] 4, the computing device 112 may include first to sixth signal paths 76a to 76f. The first to sixth signal paths 76a to 76f connect a processing input section, a processing output section, Department , the storage input and the storage output may be connected.
[0084] In the calculation device 112, the first processing section 10P performs calculation of, for example, the following equation 13.
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[0085] In the second processing portion 20P, for example, the following equation 14 is calculated.
number
[0086] In the third processing portion 30P, for example, the following equation 15 is calculated.
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[0087] The computing device 112 can also appropriately solve optimization problems when inequality constraints exist. For example, non-convex objective functions can be handled. For example, large-scale optimization can be handled. Parallel calculation is possible. A computing device capable of improving calculation speed can be provided.
[0088] An example of a configuration for parallel computing will be described below. FIG. 5 is a schematic diagram illustrating a computing device according to the embodiment. In the computing device 120 according to the embodiment shown in FIG. 5, the computation in the computing device 110 is performed in parallel. In the computing device 120, the first processing portion 10P includes a plurality of first processing portions 18. The plurality of first processing portions 18 include, for example, processing portion 11 and processing portion 12. One of the plurality of first processing portions 18 performs a portion of the first update. Another of the plurality of first processing portions 18 performs another portion of the first update. At least a portion of the other portion of the first update can be performed simultaneously with the portion of the first update. Parallel computation can increase speed.
[0089] As shown in Fig. 5, the first storage portion 10M may include a plurality of first storage portions 18M. The plurality of first storage portions 18M may include, for example, storage portion 11M and storage portion 12M. One of the plurality of first storage portions 18M stores a portion of the first vector after the above-mentioned portion of the first update. Another of the plurality of first storage portions 18M stores another portion of the first vector after the above-mentioned portion of the first update, for example, one of the plurality of first storage portions 18M is combined with one of the plurality of first processing portions 18. For example, another of the plurality of first storage portions 18M is combined with another of the plurality of first processing portions 18.
[0090] As shown in Fig. 5, the second processing portion 20P may include a plurality of second processing portions 28. The plurality of second processing portions 28 include, for example, processing portion 21 and processing portion 22. One of the plurality of second processing portions 28 performs a portion of the second update. Another of the plurality of second processing portions 28 performs another portion of the second update. At least a portion of the other portion of the second update can be performed simultaneously with the portion of the second update. Speedup is possible through parallel calculation.
[0091] As shown in FIG. 5, the second storage portion 20M may include a plurality of second storage portions 28M. The plurality of second storage portions 28M may include, for example, storage portion 21M and storage portion 22M. One of the plurality of second storage portions 28M stores a portion of the second vector after the above-mentioned portion of the second update. Another of the plurality of second storage portions 28M stores another portion of the second vector after the above-mentioned another portion of the second update. For example, one of the plurality of second storage portions 28M is combined with one of the plurality of second processing portions 28. For example, another of the plurality of second storage portions 28M is combined with another of the plurality of second processing portions 28.
[0092] As shown in Fig. 5, the third processing portion 30P may include a plurality of third processing portions 38. The plurality of third processing portions 38 include, for example, processing portion 31 and processing portion 32. One of the plurality of third processing portions 38 performs a portion of the third update. Another of the plurality of third processing portions 38 performs another portion of the third update. At least a portion of the another portion of the third update can be performed simultaneously with the portion of the third update. Speedup is possible through parallel calculation.
[0093] As shown in FIG. 5, the third storage portion 30M may include a plurality of third storage portions 38M. The plurality of third storage portions 38M may include, for example, storage portion 31M and storage portion 32M. One of the plurality of third storage portions 38M stores a portion of the third vector after the above-mentioned portion of the third update. Another of the plurality of third storage portions 38M stores another portion of the third vector after the above-mentioned another portion of the third update. For example, one of the plurality of third storage portions 38M is combined with one of the plurality of third processing portions 38. For example, another of the plurality of third storage portions 38M is combined with another of the plurality of third processing portions 38.
[0094] FIG. 6 is a schematic diagram illustrating a computing device according to the embodiment. 6, the calculations in the calculation device 111 are performed in parallel. The configurations of the multiple processing units and multiple storage units in the calculation device 121 may be similar to those in the calculation device 120.
[0095] FIG. 7 is a schematic diagram illustrating a computing device according to the embodiment. 7, the calculations in the calculation device 112 are performed in parallel. The configurations of the multiple processing units and multiple storage units in the calculation device 122 may be similar to those in the calculation device 120.
[0096] In this manner, parallel computing may be performed in the computing device according to the embodiment. The processing unit 70P may include a plurality of processing parts. The plurality of processing parts corresponds to at least one of a plurality of first processing parts 18, a plurality of second processing parts 28, and a plurality of third processing parts 38, for example.
[0097] For example, one of the plurality of processing portions can perform a portion of a first update and another of the plurality of processing portions can perform another portion of the first update. For example, one of the plurality of processing portions can perform a portion of a second update and another of the plurality of processing portions can perform another portion of the second update. For example, one of the plurality of processing portions can perform a portion of a third update and another of the plurality of processing portions can perform another portion of the third update.
[0098] The storage unit 70M may include a plurality of storage portions. The plurality of storage portions correspond to, for example, at least one of a plurality of first storage portions 18M, a plurality of second storage portions 28M, and a plurality of third storage portions 38M. For example, a portion of the plurality of storage portions can store a portion of the first vector, and another portion of the plurality of storage portions can store another portion of the first vector. For example, another portion of the plurality of storage portions can store a portion of the second vector, and another portion of the plurality of storage portions can store another portion of the second vector. For example, another portion of the plurality of storage portions can store a portion of the third vector, and another portion of the plurality of storage portions can store another portion of the third vector.
[0099] Various calculation conditions are input to the calculation device according to the embodiment. For example, the calculation conditions are acquired by the acquisition unit 78, and the calculation conditions are supplied to the processing device 70. The calculation conditions include, for example, a calculation method (such as a calculation formula) of the gradient of the objective function. The calculation conditions include, for example, an initial value of a first vector and an initial value of a second vector. The calculation conditions include, for example, the number of iterations "T". The calculation conditions include, for example, an adjustment coefficient "μ". The calculation conditions include, for example, an inequality constraint (or an equality constraint). The calculation conditions include, for example, a matrix "A", a vector "a", and a vector "b".
[0100] A calculation example will be described below. In the example calculation, the optimization problem of the production plan using two machines is solved. The two machines manufacture the same product.
[0101] In the calculation example, the variable "x1" corresponds to whether or not the first machine is operated. If the first machine is operated, the variable "x1" is 1. If the first machine is not operated, the variable "x1" is 0.
[0102] In the calculation example, the variable "x2" corresponds to whether or not the second machine is operated. If the second machine is operated, the "variable x2" is 1. If the second machine is not operated, the variable "x2" is 0. The variables "x1" and "x2" are binary.
[0103] Let the amount of production by the first machine be variable "x3". Let the amount of production by the second machine be variable "x4". The variables "x3" and "x4" are non-binary. These variables are continuous variables.
[0104] In this calculation example, it is assumed that the production cost is expressed by the following Equation 16.
number
[0105] For example, if the first machine is operated, a fixed cost of "1" is incurred. If the first machine is not operated, the fixed cost is considered to be "0". If the second machine is operated, a fixed cost of "2" is incurred. If the second machine is not operated, the fixed cost is considered to be "0".
[0106] For example, when the first machine is operated, a running cost proportional to the square of the production volume is incurred. For the first machine, the coefficient related to the running cost is "2".
[0107] For example, when the second machine is operated, a running cost proportional to the square of the production volume is incurred. For the second machine, the coefficient related to the running cost is "1".
[0108] The production volume of the product is the sum of the production volume by the first machine and the production volume by the second machine. The target production volume (the sum of the two) is "1.2".
[0109] In this case, the following constraints are imposed. That is, when the first machine is operated, the production volume of the first machine is set to be between 0.5 and 1.0. When the first machine is not operated, the production volume of the first machine is 0. When the second machine is operated, the production volume of the second machine is set to be between 0.5 and 1.0. When the second machine is not operated, the production volume of the second machine is 0.
[0110] The above condition is expressed by the following equation 17.
[0111]
number
[0112] Under these conditions, the variables "x1", "x2", "x3", and "x4" that minimize the cost are found. As shown in the calculation results described later, the cost is minimized when "x1" = 1, "x2" = 1, "x3" = 0.5, and "x4" = 0.7. In other words, the cost is minimized when the first machine produces at a production volume of 0.5 and the second machine produces at a production volume of 0.7.
[0113] Below, examples of matrix and vector notation will be described. The variables "x1", "x2", "x3", and "x4" can be collectively expressed as a four-dimensional column vector x. The objective function (cost equation) f(x) is expressed by the following Equation 18.
[0114]
number
[0115] The objective function f(x) is expressed by the following Equation 19.
[0116]
number
[0117] The constraint condition is expressed by the following Equation 20.
[0118]
number
[0119] In this case, the above-described formula 6 is applied.
[0120] In the calculation example, the number of iterations (total number) "T" is 1000. The coefficient "β" is 0.1. The adjustment coefficient "μ" is 3 / 4. The coefficient "σ" is 0.2.
[0121] 8(a) to 8(d), 9(a) to 9(d), and 10(a) to 10(e) are graphs illustrating the operation of the computing device according to the embodiment. These figures are calculation examples in the calculation device 110. In these figures, the horizontal axis is "k" (the number of iterations). The vertical axes of Figs. 8(a) to 8(d) are x1, x2, x3, and x4, respectively. The vertical axes of Figs. 9(a) to 9(d) are y1, y2, y3, and y4, respectively. The vertical axes of Figs. 10(a) to 10(e) are u1, u2, u3, u4, and u5, respectively. As shown in Figs. 8(a) to 8(d), solutions of "x1" = 1, "x2" = 1, "x3" = 0.5, and "x4" = 0.7 are obtained.
[0122] 11(a) to 11(d), 12(a) to 12(d), and 13(a) to 13(e) are graphs illustrating the operation of the computing device according to the embodiment. These figures are examples of calculations in the calculation device 111. The horizontal and vertical axes in these figures are the same as the horizontal and vertical axes explained with reference to Figures 8(a) to 8(d), 9(a) to 9(d), and 10(a) to 10(e). As shown in Figures 11(a) to 11(d), solutions of "x1" = 1, "x2" = 1, "x3" = 0.5, and "x4" = 0.7 are obtained.
[0123] FIGS. 14(a) to 14(d), 15(a) to 15(d), and 16(a) to 16(e) are graphs illustrating the operation of the computing device according to the embodiment. These figures are examples of calculations in the calculation device 112. The horizontal and vertical axes in these figures are the same as the horizontal and vertical axes described with reference to Figures 8(a) to 8(d), 9(a) to 9(d), and 10(a) to 10(e). As shown in Figures 14(a) to 14(d), solutions of "x1" = 1, "x2" = 1, "x3" = 0.5, and "x4" = 0.7 are obtained.
[0124] In the embodiment, the first processing portion 10P, the second processing portion 20P, and the third processing portion 30P may be, for example, a first portion, a second portion, and a third portion of a single integrated circuit. The first processing portions 18, the second processing portions 28, and the third processing portions 38 may be different portions of a single integrated circuit. In the embodiment, the first storage portion 10M, the second storage portion 20M, and the third storage portion 30M may be, for example, a first portion, a second portion, and a third portion of a single storage portion. The first storage portions 18M, the second storage portions 28M, and the third storage portions 38M may be different portions of a single storage portion.
[0125] FIG. 1 and FIG. 3 to FIG. 7 are Processing Equipment 70. The "processing portion" corresponds to, for example, the "processing operation" in the flowchart. The "storage portion" corresponds to, for example, the "storage operation" in the flowchart.
[0126] As already described, the computing device according to the embodiment may be configured, for example, by any computer.
[0127] FIG. 17 is a schematic diagram illustrating the operation of the computing device according to the embodiment. As shown in FIG. 17, the computing device 130 according to the embodiment includes a processing device 70. The processing device 70 includes, for example, a CPU (Central Processing Unit) and the like. The processing device 70 includes, for example, an electronic circuit and the like. The computing device 130 may include an acquisition unit 78 (for example, an interface). The computing device 130 may include a storage device 79a. The storage device 79a may include, for example, at least one of a ROM (Read Only Memory) and a RAM (Random Access Memory). The computing device 130 may include a display unit 79b and an input unit 79c and the like. The input unit 79c may include, for example, an operation device (for example, a keyboard, a mouse, or a touch input unit).
[0128] The elements included in the computing device 130 can communicate with each other by at least one of wireless and wired methods. The elements included in the computing device 130 may be provided in different locations. For example, a general-purpose computer may be used as the computing device 130. For example, a plurality of computers connected to each other may be used as the computing device 130.
[0129] Second embodiment The second embodiment relates to a calculation program. This calculation program is a calculation program that causes a computer to execute a processing procedure. The processing procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector. The first update includes updating the first vector using the second vector and the third vector. The second update includes updating the second vector using the first vector. The output of at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure is output. The second update updates the i-th first variable x i The first function calculated from and the i-th first variable x iThe second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i The second update involves updating the j-th first variable x j The first function calculated from the jth second variable y before updating j In addition, the jth second variable y j The value of the i-th output is binary. The value of the j-th output is non-binary.
[0130] Third embodiment The third embodiment relates to a recording medium. The recording medium is a computer-readable recording medium having recorded thereon a calculation program for causing a computer to execute a processing procedure. The processing procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector. The first update includes updating the first vector using the second vector and the third vector. The second update includes updating the second vector using the first vector. The output of at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure is output. The second update updates the i-th first variable x i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i The second update involves updating the j-th first variable x j The first function calculated from the jth second variable y before updating j In addition, the jth second variable y j The value of the i-th output is binary. The value of the j-th output is non-binary.
[0131] (Fourth embodiment) The fourth embodiment relates to a calculation method. The calculation method causes a processing device 70 to execute a processing procedure. The processing procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector. The first update includes updating the first vector using the second vector and the third vector. The second update includes updating the second vector using the first vector. The processing device outputs at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure. The second update updates the i-th first variable x i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i The second update involves updating the j-th first variable x j The first function calculated from the jth second variable y before updating j In addition, the jth second variable y j The value of the i-th output is binary. The value of the j-th output is non-binary.
[0132] The processing (instructions) of the various pieces of information (data) described above is executed based on, for example, a program (software). For example, a computer stores this program and reads out this program to process the various pieces of information described above.
[0133] The above various types of information processing may be recorded on a magnetic disk (such as a flexible disk or hard disk), an optical disk (such as a CD-ROM, CD-R, CD-RW, DVD-ROM, DVD±R, DVD±RW), a semiconductor memory, or other recording medium as a program that can be executed by a computer.
[0134] For example, information recorded on a recording medium can be read by a computer (or an embedded system). The recording medium may have any recording format (storage format). For example, the computer reads a program from the recording medium and causes a CPU to execute instructions described in the program based on the program. The computer may acquire (or read) the program via a network.
[0135] At least a part of the above information processing may be performed in various software programs running on a computer based on a program installed in the computer (or embedded system) from a recording medium. This software may include, for example, an operating system. This software may also include, for example, middleware that operates on a network.
[0136] The recording medium in the embodiment includes a recording medium on which a program is downloaded and stored, the program being obtained via a LAN or the Internet, etc. The above processing may be performed based on a plurality of recording media.
[0137] The computer according to the embodiment includes one or more devices (for example, a personal computer, etc.) The computer according to the embodiment may include multiple devices connected via a network.
[0138] The embodiment may include the following configurations (e.g., technical solutions). (Configuration 1) a processing device capable of performing a processing procedure; the procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector; the first update includes updating the first vector using the second vector and the third vector; the second updating includes updating the second vector using the first vector; The processing device is capable of outputting at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure; the output includes an i-th value and a j-th value; The i is an integer of 1 to n, The n is an integer of 2 or more, The j is an integer equal to or greater than 1 and equal to or less than the n, The j is different from the i, The i-th value is a binary value, the jth value is non-binary; The variables of the first vector are the i-th first variable x i and the jth first variable x j Including, The variables of the second vector are the i-th second variable y i and the j-th second variable y j Including, The second update is the i-th first variable x i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i Including updating The second update is the jth first variable x j The first function is calculated from the j-th second variable y before updating j In addition, the j-th second variable y j updating the
[0139] (Configuration 2) The processing device includes a first control unit, 2. The computing device according to configuration 1, wherein the first control unit is capable of setting the i-th value to a binary value and setting the j-th value to a non-binary value based on information relating to a computation condition.
[0140] (Configuration 3) The variables of the third vector are the qth third variable u q Including, The q is an integer of 1 or more and m or less, 3. The computing device of configuration 1 or 2, wherein m is an integer greater than or equal to 1.
[0141] (Configuration 4) 4. The computing device of configuration 3, wherein m is the number of inequality constraints set with respect to the first vector.
[0142] (Configuration 5) The processing device includes a processing unit and a storage unit, The processing unit is capable of performing the first update, the second update, and the third update; the storage unit is capable of storing the first vector, the second vector, and the third vector; The processing section includes a plurality of processing parts, One of the plurality of processing portions is capable of performing a portion of the first update; 5. The computing device according to any one of configurations 1 to 4, wherein another of the plurality of processing parts is capable of performing another part of the first update.
[0143] (Configuration 6) The processing device includes a processing unit and a storage unit, The processing unit is capable of performing the first update, the second update, and the third update; the storage unit is capable of storing the first vector, the second vector, and the third vector; The processing section includes a plurality of processing parts, one of the plurality of processing portions is capable of performing a portion of the second update; 5. The computing device according to any one of configurations 1 to 4, wherein another one of the plurality of processing parts is capable of performing another part of the second update.
[0144] (Configuration 7) The processing device includes a processing unit and a storage unit, The processing unit is capable of performing the first update, the second update, and the third update; the storage unit is capable of storing the first vector, the second vector, and the third vector; The processing section includes a plurality of processing parts, One of the plurality of processing portions is capable of performing a portion of the third update; 5. The computing device according to any one of configurations 1 to 4, wherein another one of the plurality of processing parts is capable of performing another part of the third update.
[0145] (Configuration 8) The storage unit includes a plurality of storage portions, a portion of the plurality of storage portions capable of storing a portion of the first vector; Another part of the plurality of storage parts is capable of storing another part of the first vector; Another part of the plurality of storage parts is capable of storing a part of the second vector; Another part of the plurality of storage parts is capable of storing another part of the second vector; Another part of the plurality of storage parts is capable of storing a part of the third vector; 5. The computing device according to any one of configurations 1 to 4, wherein another part of the plurality of storage portions is capable of storing another part of the third vector.
[0146] (Configuration 9) The processing device includes a processing unit and a storage unit, The processing unit includes: a first processing portion capable of performing the first update; a second processing portion operable to perform the second update; a third processing portion capable of performing the third update; Including, The storage unit is a first storage portion capable of storing the first vector; a second storage portion capable of storing the second vector; a third storage portion capable of storing the third vector; Including, the first vector before updating stored in the first storage section is supplied to the first processing section and the third processing section; the second vector before updating stored in the second storage portion is supplied to the second processing portion and the first processing portion; the third vector before updating stored in the third storage section is supplied to the third processing section and the first processing section; The updated first vector output from the first processing section is supplied to the first storage section, the second processing section, and the third processing section; The updated second vector output from the second processing section is supplied to the second storage section; 5. The calculation device according to any one of configurations 1 to 4, wherein the updated third vector output from the third processing portion is input to the third storage portion.
[0147] (Configuration 10) The processing device includes a processing unit and a storage unit, The processing unit includes: a first processing portion capable of performing the first update; a second processing portion operable to perform the second update; a third processing portion capable of performing the third update; Including, The storage unit is a first storage portion capable of storing the first vector; a second storage portion capable of storing the second vector; a third storage portion capable of storing the third vector; Including, The first vector before updating stored in the first storage section is supplied to the first processing section; the second vector before updating stored in the second storage portion is supplied to the second processing portion and the first processing portion; the third vector before updating stored in the third storage section is supplied to the third processing section and the first processing section; The updated first vector output from the first processing section is supplied to the first storage section, the second processing section, and the third processing section; The updated second vector output from the second processing section is supplied to the second storage section; 5. The calculation device according to any one of configurations 1 to 4, wherein the updated third vector output from the third processing portion is input to the third storage portion.
[0148] (Configuration 11) The processing device includes a processing unit and a storage unit, The processing unit includes: a first processing portion capable of performing the first update; a second processing portion operable to perform the second update; a third processing portion capable of performing the third update; Including, The storage unit is a first storage portion capable of storing the first vector; a second storage portion capable of storing the second vector; a third storage portion capable of storing the third vector; Including, the first vector before updating stored in the first storage section is supplied to the first processing section and the second processing section; The second vector before updating stored in the second storage section is supplied to the second processing section; the third vector before updating stored in the third storage section is supplied to the third processing section and the first processing section; The updated first vector output from the first processing section is supplied to the first storage section and the third processing section; The updated second vector output from the second processing section is supplied to the second storage section and the first processing section; 5. The calculation device according to any one of configurations 1 to 4, wherein the updated third vector output from the third processing portion is input to the third storage portion.
[0149] (Configuration 12) The first processing portion includes a plurality of first processing portions; one of the plurality of first processing portions performs a portion of the first update; another one of the plurality of first processing portions performs another portion of the first update; 12. The computing device of any one of configurations 9 to 11, wherein at least a portion of the other portion of the first update is performed simultaneously with the portion of the first update.
[0150] (Configuration 13) the second processing portion includes a plurality of second processing portions; one of the plurality of second processing portions performs a portion of the second update; another one of the plurality of second processing portions performs another portion of the second update; 12. The computing device of any one of configurations 9 to 11, wherein at least a portion of the another portion of the second update is performed simultaneously with the portion of the second update.
[0151] (Configuration 14) the third processing portion includes a plurality of third processing portions; one of the plurality of third processing portions performs a portion of the third update; another one of the plurality of third processing portions performs another portion of the third update; 12. The computing device of any one of configurations 9 to 11, wherein at least a portion of the another portion of the third update is performed simultaneously with the portion of the third update.
[0152] (Configuration 15) A calculation program for causing a computer to execute a processing procedure, the procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector; the first update includes updating the first vector using the second vector and the third vector; the second updating includes updating the second vector using the first vector; outputting at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure; the output includes an i-th value and a j-th value; The i is an integer of 1 to n, The n is an integer of 2 or more, The j is an integer equal to or greater than 1 and equal to or less than the n, The j is different from the i, The i-th value is a binary value, the jth value is non-binary; The variables of the first vector are the i-th first variable x i and the jth first variable x j Including, The variables of the second vector are the i-th second variable y i and the j-th second variable y j Including, The second update is the i-th first variable x i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i Including updating The second update is the jth first variable x j The first function is calculated from the j-th second variable y before updating j In addition, the j-th second variable y j updating the computing program.
[0153] (Configuration 16) A computer-readable recording medium having a calculation program recorded thereon for causing a computer to execute a processing procedure, the procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector; the first update includes updating the first vector using the second vector and the third vector; the second updating includes updating the second vector using the first vector; outputting at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure; the output includes an i-th value and a j-th value; The i is an integer of 1 to n, The n is an integer of 2 or more, The j is an integer equal to or greater than 1 and equal to or less than the n, The j is different from the i, The i-th value is a binary value, the jth value is non-binary; The variables of the first vector are the i-th first variable x i and the jth first variable x j Including, The variables of the second vector are the i-th second variable y i and the j-th second variable y j Including, The second update is the i-th first variable x i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i Including updating The second update is the jth first variable x j The first function is calculated from the j-th second variable y before updating j In addition, the j-th second variable y j A recording medium, including updating the above.
[0154] (Configuration 17) causing the processing device to perform a processing procedure; the procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector; the first update includes updating the first vector using the second vector and the third vector; the second updating includes updating the second vector using the first vector; The processing device outputs at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure; the output includes an i-th value and a j-th value; The i is an integer of 1 to n, The n is an integer of 2 or more, The j is an integer equal to or greater than 1 and equal to or less than the n, The j is different from the i, The i-th value is a binary value, the jth value is non-binary; The variables of the first vector are the i-th first variable x i and the jth first variable x j Including, The variables of the second vector are the i-th second variable y i and the j-th second variable y j Including, The second update is the i-th first variable x i The first function calculated from and the i-th first variable x i The second function calculated from the i-th second variable y before updating i In addition, the i-th second variable y i Including updating The second update is the jth first variable x j The first function is calculated from the j-th second variable y before updating j In addition, the j-th second variable y j A calculation method including updating
[0155] According to the embodiments, a calculation device, a calculation program, a recording medium, and a calculation method capable of solving an optimization problem can be provided.
[0156] The above describes the embodiment of the present invention with reference to examples. However, the present invention is not limited to these examples. For example, the specific configuration of each element such as a processing device, an acquisition unit, a processing unit, and a storage unit included in a computing device is included in the scope of the present invention as long as a person skilled in the art can implement the present invention in the same way and obtain the same effect by appropriately selecting from the known range.
[0157] Any combination of two or more elements of each example, within the scope of technical feasibility, is also included within the scope of the present invention as long as it includes the gist of the present invention.
[0158] All computing devices, computing programs, recording media, and computing methods that can be implemented by a person skilled in the art through appropriate design modifications based on the computing device, computing program, recording medium, and computing method described above as the embodiments of the present invention also fall within the scope of the present invention, so long as they include the gist of the present invention.
[0159] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it is understood that these modifications and alterations also fall within the scope of the present invention.
[0160] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]
[0161] 10M, 20M, 30M...first, second, third memory parts; 10Mi, 20Mi, 30Mi...first, second, third memory input parts; 10Mo, 20Mo, 30Mo...first, second, third memory output parts; 10P, 20P, 30P...first, second, third processing parts; 10Pi, 20Pi, 30Pi...first, second, third processing input parts; 10Po, 20Po, 30Po...first, second, third processing output parts; 11, 12, 21, 22, 31, 32...processing parts; 11M, 12M, 21M, 22M, 31M, 32M...memory parts; 18, 28, 38...first, second, third processing parts; 18M, 28M, 38M...first, second, third memory parts; 30A...addition circuit, 30G...third vector function circuit, 30L...multiplication circuit, 70...processing device, 70M...storage unit, 70P...processing unit, 74...first control unit, 75...second control unit, 76a-76f...first to sixth signal paths, 77I...input information, 77O...output data, 78...acquisition unit, 79a...storage device, 79b...display unit, 79c...input unit, 110-112, 120-122, 130...calculation device, Id1, Id2...information, Sc1...control signal
Claims
1. a processing device capable of performing a processing procedure; The processing unit is capable of solving an optimization problem; In the optimization problem, an objective function f(x) and a plurality of inequality constraints or a plurality of equality constraints are set, The processing device determines a first vector that reduces a value of an objective function f(x) when the constraint is given, the procedure includes a first update of the first vector, a second update of the second vector, and a third update of a third vector; the first updating includes updating the first vector using the second vector and the third vector; the second updating includes updating the second vector using the first vector; The processing device is capable of outputting at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure; the output includes an i-th value and a j-th value; The i is an integer of 1 or more and n or less, The n is an integer of 2 or more, The j is an integer of 1 or more and n or less, The j is different from the i, The i-th value is a binary value, the jth value is non-binary; The variables of the first vector are the i-th first variable x i and the j-th first variable x j Including, The variables of the second vector are the i-th second variable y i and the j-th second variable y j Including, The second update is the i-th first variable x i and the i-th first variable x i The second function calculated from the i-th second variable y i In addition, the i-th second variable y i Including updating The second update is the jth first variable x j The first function is calculated from the j-th second variable y before updating i In addition, the j-th second variable y i Including updating The processing device includes a first control unit, The first control unit is capable of setting the i-th value to a binary value and the j-th value to a non-binary value based on information on a calculation condition, The variables of the third vector include a q-th third variable u q ; The q is an integer of 1 or more and m or less, The m is an integer of 1 or more, The m is the number of inequality constraints set for the first vector. In the first update, [0010] The first equation is calculated, In the second update, [0025] The second equation is calculated, In the third update, [0030] The third equation is calculated, The i-th element of the function P h (x) is [0070] This is expressed by the seventh formula: The A T is a transposed matrix of the matrix A, The μ is a coefficient, The second term on the right side of the second equation is the first function, The β is a coefficient, The function d(x(k+1), k) of the third term of the second equation, which is the second function, is [0045] This is expressed by the fourth formula: The p(k) is a coefficient, The σ is a coefficient, The q-th element of P g (w) is [0080] This is expressed by the eighth formula: The update of the third vector is [0097] This is expressed by the ninth formula: For the jth value that is non-binary, the third term of the second equation is deleted.
2. The processing device includes a processing unit and a storage unit, The processing unit is capable of performing the first update, the second update, and the third update; the storage unit is capable of storing the first vector, the second vector, and the third vector; The processing section includes a plurality of processing parts, One of the plurality of processing portions is capable of performing a portion of the first update; The computing device of claim 1 , wherein another one of the plurality of processing portions is capable of performing another portion of the first update.
3. The processing device includes a processing unit and a storage unit, The processing unit is capable of performing the first update, the second update, and the third update; the storage unit is capable of storing the first vector, the second vector, and the third vector; The processing section includes a plurality of processing parts, One of the plurality of processing portions is capable of performing a portion of the second update; The computing device of claim 1 , wherein another one of the plurality of processing portions is capable of performing another portion of the second update.
4. The processing device includes a processing unit and a storage unit, The processing unit is capable of performing the first update, the second update, and the third update; the storage unit is capable of storing the first vector, the second vector, and the third vector; The processing section includes a plurality of processing parts, One of the plurality of processing portions is capable of performing a portion of the third update; The computing device of claim 1 , wherein another one of the plurality of processing portions is capable of performing another portion of the third update.
5. The processing device includes a processing unit and a storage unit, The processing unit includes: a first processing portion capable of performing the first update; a second processing portion operable to perform the second update; a third processing portion capable of performing the third update; Including, The storage unit is a first storage portion capable of storing the first vector; a second storage portion capable of storing the second vector; a third storage portion capable of storing the third vector; Including, the first vector before updating stored in the first storage section is supplied to the first processing section and the third processing section; the second vector before updating stored in the second storage portion is supplied to the second processing portion and the first processing portion; the third vector before updating stored in the third storage portion is supplied to the third processing portion and the first processing portion; the updated first vector output from the first processing section is supplied to the first storage section, the second processing section and the third processing section; The updated second vector output from the second processing section is supplied to the second storage section; The computing device of claim 1 , wherein the updated third vector output from the third processing portion is input to the third storage portion.
6. The processing device includes a processing unit and a storage unit, The processing unit includes: a first processing portion capable of performing the first update; a second processing portion operable to perform the second update; a third processing portion capable of performing the third update; Including, The storage unit is a first storage portion capable of storing the first vector; a second storage portion capable of storing the second vector; a third storage portion capable of storing the third vector; Including, The first vector before updating stored in the first storage portion is supplied to the first processing portion; the second vector before updating stored in the second storage portion is supplied to the second processing portion and the first processing portion; the third vector before updating stored in the third storage portion is supplied to the third processing portion and the first processing portion; the updated first vector output from the first processing section is supplied to the first storage section, the second processing section and the third processing section; The updated second vector output from the second processing section is supplied to the second storage section; The computing device of claim 1 , wherein the updated third vector output from the third processing portion is input to the third storage portion.
7. The processing device includes a processing unit and a storage unit, The processing unit includes: a first processing portion capable of performing the first update; a second processing portion operable to perform the second update; a third processing portion capable of performing the third update; Including, The storage unit is a first storage portion capable of storing the first vector; a second storage portion capable of storing the second vector; a third storage portion capable of storing the third vector; Including, the first vector before updating stored in the first storage portion is supplied to the first processing portion and the second processing portion; The second vector before updating stored in the second storage portion is supplied to the second processing portion; the third vector before updating stored in the third storage portion is supplied to the third processing portion and the first processing portion; the updated first vector output from the first processing section is supplied to the first storage section and the third processing section; The updated second vector output from the second processing section is supplied to the second storage section and the first processing section; The computing device of claim 1 , wherein the updated third vector output from the third processing portion is input to the third storage portion.
8. A calculation program for causing a computer to execute a processing procedure, the computer is capable of solving an optimization problem; In the optimization problem, an objective function f(x) and a plurality of inequality constraints or a plurality of equality constraints are set, The computer determines a first vector that reduces a value of an objective function f(x) when the constraint is given, the procedure includes a first update of the first vector, a second update of the second vector, and a third update of a third vector; the first updating includes updating the first vector using the second vector and the third vector; the second updating includes updating the second vector using the first vector; outputting at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure; the output includes an i-th value and a j-th value; The i is an integer of 1 or more and n or less, The n is an integer of 2 or more, The j is an integer of 1 or more and n or less, The j is different from the i, The i-th value is a binary value, the jth value is non-binary; The variables of the first vector are the i-th first variable x i and the j-th first variable x j Including, The variables of the second vector are the i-th second variable y i and the j-th second variable y j Including, The second update is the i-th first variable x i and the i-th first variable x i The second function calculated from the i-th second variable y i In addition, the i-th second variable y i Including updating The second update is the jth first variable x j The first function is calculated from the j-th second variable y before updating i In addition, the j-th second variable y i Including updating The computer is capable of setting the i-th value to a binary value and the j-th value to a non-binary value based on information on a calculation condition; The variables of the third vector include a q-th third variable u q ; The q is an integer of 1 or more and m or less, The m is an integer of 1 or more, The m is the number of inequality constraints set for the first vector. In the first update, [0010] The first equation is calculated, In the second update, [0025] The second equation is calculated, In the third update, [0030] The third equation is calculated, The i-th element of the function P h (x) is [0070] This is expressed by the seventh formula: The A T is a transposed matrix of the matrix A, The μ is a coefficient, The second term on the right side of the second equation is the first function, The β is a coefficient, The function d(x(k+1), k) of the third term of the second equation, which is the second function, is [0045] This is expressed by the fourth formula: The p(k) is a coefficient, The σ is a coefficient, The q-th element of P g (w) is [0080] This is expressed by the eighth formula: The update of the third vector is [0097] This is expressed by the ninth formula: For the jth value that is non-binary, the third term of the second equation is deleted.
9. A computer-readable recording medium having a calculation program recorded thereon for causing a computer to execute a processing procedure, the computer is capable of solving an optimization problem; In the optimization problem, an objective function f(x) and a plurality of inequality constraints or a plurality of equality constraints are set, The computer determines a first vector that reduces a value of an objective function f(x) when the constraint is given, the procedure includes a first update of the first vector, a second update of the second vector, and a third update of a third vector; the first updating includes updating the first vector using the second vector and the third vector; the second updating includes updating the second vector using the first vector; outputting at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure; the output includes an i-th value and a j-th value; The i is an integer of 1 or more and n or less, The n is an integer of 2 or more, The j is an integer of 1 or more and n or less, The j is different from the i, The i-th value is a binary value, the jth value is non-binary; The variables of the first vector are the i-th first variable x i and the j-th first variable x j Including, The variables of the second vector are the i-th second variable y i and the j-th second variable y j Including, The second update is the i-th first variable x i and the i-th first variable x i The second function calculated from the i-th second variable y i In addition, the i-th second variable y i Including updating The second update is the jth first variable x j The first function is calculated from the j-th second variable y before updating i In addition, the j-th second variable y i Including updating The computer is capable of setting the i-th value to a binary value and the j-th value to a non-binary value based on information on a calculation condition; The variables of the third vector include a q-th third variable u q ; The q is an integer of 1 or more and m or less, The m is an integer of 1 or more, The m is the number of inequality constraints set for the first vector. In the first update, [0010] The first equation is calculated, In the second update, [0025] The second equation is calculated, In the third update, [0030] The third equation is calculated, The i-th element of the function P h (x) is [0070] This is expressed by the seventh formula: The A T is a transposed matrix of the matrix A, The μ is a coefficient, The second term on the right side of the second equation is the first function, The β is a coefficient, The function d(x(k+1), k) of the third term of the second equation, which is the second function, is [0045] This is expressed by the fourth formula: The p(k) is a coefficient, The σ is a coefficient, The q-th element of P g (w) is [0080] This is expressed by the eighth formula: The update of the third vector is [0097] This is expressed by the ninth formula: For the jth value that is non-binary, the third term of the second equation is deleted. Recording medium.
10. causing the processing device to perform a processing procedure; The processing unit is capable of solving an optimization problem; In the optimization problem, an objective function f(x) and a plurality of inequality constraints or a plurality of equality constraints are set, The processing device determines a first vector that reduces a value of an objective function f(x) when the constraint is given, the procedure includes a first update of the first vector, a second update of the second vector, and a third update of a third vector; the first updating includes updating the first vector using the second vector and the third vector; the second updating includes updating the second vector using the first vector; The processing device outputs at least one of the first vector obtained after repeating the processing procedure and a function of the first vector obtained after repeating the processing procedure; the output includes an i-th value and a j-th value; The i is an integer of 1 or more and n or less, The n is an integer of 2 or more, The j is an integer of 1 or more and n or less, The j is different from the i, The i-th value is a binary value, the jth value is non-binary; The variables of the first vector are the i-th first variable x i and the j-th first variable x j Including, The variables of the second vector are the i-th second variable y i and the j-th second variable y j Including, The second update is the i-th first variable x i and the i-th first variable x i The second function calculated from the i-th second variable y i In addition, the i-th second variable y i Including updating The second update is the jth first variable x j The first function is calculated from the j-th second variable y before updating i In addition, the j-th second variable y i Including updating The processing device includes a first control unit, The first control unit is capable of setting the i-th value to a binary value and the j-th value to a non-binary value based on information on a calculation condition, The variables of the third vector include a q-th third variable u q ; The q is an integer of 1 or more and m or less, The m is an integer of 1 or more, The m is the number of inequality constraints set for the first vector. In the first update, [0010] The first equation is calculated, In the second update, [0025] The second equation is calculated, In the third update, [0030] The third equation is calculated, The i-th element of the function P h (x) is [0070] This is expressed by the seventh formula: The A T is a transposed matrix of the matrix A, The μ is a coefficient, The second term on the right side of the second equation is the first function, The β is a coefficient, The function d(x(k+1), k) of the third term of the second equation, which is the second function, is [0045] This is expressed by the fourth formula: The p(k) is a coefficient, The σ is a coefficient, The q-th element of P g (w) is [0080] This is expressed by the eighth formula: The update of the third vector is [0097] This is expressed by the ninth formula: For the jth value that is non-binary, the third term of the second equation is deleted.
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