Indicating device

Abstract

To increase the efficiency of light emission of a display device.SOLUTION: The display device includes: a first planarization film with an opening part; a reflection film provided along an inclined surface in the inside of an opening part in the first planarization film; an LED chip provided on the inner side of the opening and surrounded by the reflection film; and a second planarization film formed on the first planarization film, the second planarization covering the LED chip and filling the opening part. The distance from the upper end part of the inclined surface of the first planarization film to the interface between the second planarization film and air is not larger than 20 μm.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a display device having LEDs.

Background Art

[0002] In recent years, development of a display device has been progressing with pixels having tiny LED chips with a size of less than 1 mm (in the micron order) for each LED. In an LED display device, a cavity structure has been proposed to improve light extraction efficiency. The cavity structure is a structure in which a reflective structure is arranged around an LED chip.

[0003] Patent Document 1 discloses an LED display device having a cavity structure. According to the cavity structure, light emitted from an LED chip is reflected by a reflective structure provided around the LED chip, so that light extraction efficiency is improved.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, also in a micro LED display device having a cavity structure, due to the thickness of the planarization film and the cover glass on the LED chip being thick, a component that undergoes total reflection occurs at the boundary between the cover glass and the air layer. Therefore, even when the cavity structure is adopted, loss occurs when light is extracted to the outside of the display device, which causes a decrease in luminous efficiency and brightness.

[0006] In view of the above problems, one of the objects of one embodiment of the present invention is to improve the luminous efficiency of a display device.

Means for Solving the Problems

[0007] A display device according to an embodiment of the present invention includes a first planarization film having an opening, a reflective film provided along an inclined surface inside the opening in the first planarization film, an LED chip provided inside the opening surrounded by the reflective film, and a second planarization film provided on the first planarization film, covering the LED chip, and provided so as to fill the opening. The height from the upper end of the inclined surface of the first planarization film to the interface with air in the second planarization film is 20 μm or less.

[0008] A display device according to an embodiment of the present invention includes a first planarization film having an opening, a reflective film provided along an inclined surface inside the opening in the first planarization film, an LED chip provided inside the opening surrounded by the reflective film, a second planarization film provided on the first planarization film, covering the LED chip, and provided so as to fill the opening, and a substrate provided on the second planarization film. The height from the upper end of the inclined surface of the first planarization film to the interface with air in the substrate is 20 μm or less.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Mode for Carrying Out the Invention

[0010] Hereinafter, embodiments of the present invention will be described with reference to the drawings and the like. However, the present invention can be implemented in many different modes and is not to be construed as being limited to the description of the embodiments exemplified below. Also, for the purpose of making the description clearer, the drawings may schematically represent the widths, thicknesses, shapes, etc. of each part compared to the actual modes, but this is merely an example and does not limit the interpretation of the present invention. Further, in this specification and each drawing, the same reference numerals may be given to the same elements as those described above with respect to the already shown drawings, and detailed descriptions may be omitted as appropriate.

[0011] <First Embodiment> The configuration of a display device 100 according to an embodiment of the present invention will be described with reference to FIGS. 1 to 5.

[0012] <Schematic Configuration of Display Device> FIG. 1 is a plan view for explaining the schematic configuration of a display device 100 according to an embodiment of the present invention. The display device 100 includes a substrate 101, pixels 110, drive circuits 105 - 1 and 105 - 2, a driver IC 106, and a terminal portion 107.

[0013] As shown in FIG. 1, the display device 100 has a display area 103 and a peripheral area 104. The display area 103 is an area for displaying an image. The peripheral area 104 is an area that does not overlap with the display area 103 and is arranged outside the display area 103.

[0014] The display area 103 has a plurality of pixels 110. The plurality of pixels 110 are arranged in a matrix in the first direction D1 and the second direction D2. Note that the first direction D1 and the second direction D2 are directions parallel to the surface of the substrate 101. In FIG. 1, the first direction D1 is shown as being orthogonal to the second direction D2, but the first direction D1 and the second direction D2 may intersect. The third direction D3 is a direction orthogonal to the first direction D1 and the second direction D2. Note that a plan view refers to the positional relationship when viewed from the third direction D3.

[0015] The pixel 110 is connected to a gate line 118 arranged along the first direction D1 and a source line 122 arranged along the second direction D2. The pixel 110 has a driving transistor and a light-emitting element. By controlling the driving transistor with the gate voltage supplied to the gate line 118 and the video signal supplied to the source line 122, the light emission of the light-emitting element is controlled.

[0016] The driving circuits 105-1 and 105-2, the driver IC 106, and the terminal portion 107 are provided in the peripheral area. The terminal portion 107 is provided along the first direction D1 in the peripheral area 104. The terminal portion 107 has a plurality of terminals, and the plurality of terminals are connected to the FPC 108. Various control signals are supplied to the plurality of terminals by the FPC 108. The driver IC 106 supplies various control signals to the driving circuits 105-1 and 105-2 and the plurality of pixels 110. The driving circuits 105-1 and 105-2 are circuits that drive the plurality of gate lines 118 based on various control signals from the driver IC 106. The driving circuits 105-1 and 105-2 sequentially or simultaneously select the plurality of gate lines 118 and supply a gate voltage to the selected gate line 118.

[0017] FIG. 2 is a plan view showing a plurality of pixels 110 arranged in the display area 103. FIG. 3 is a cross-sectional view when the pixel 110 (pixel 110G) is cut along the line A1 - A2. As shown in FIG. 2, the pixel 110R has an LED chip 130R and displays red as the first color. The pixel 110G has an LED chip 130G and displays green as the second color. The pixel 110B has an LED chip 130B and displays blue as the third color. In FIG. 2, an example is shown in which the pixels 110R and 110B are arranged along the first direction D1, and the pixels 110R and 110G are arranged along the second direction D2. The first color, the second color, and the third color are not limited to red, green, and blue, and any color such as complementary colors may be selected. Note that the notations R, G, and B in FIG. 2 indicate a red pixel, a green pixel, and a blue pixel, respectively, and the same notations are used for the components of the pixel.

[0018] Also, a planarization film is provided on the insulating surface, and in FIG. 2, the openings 131R, 131G, and 131B provided in the planarization film are shown. Further, reflection films 132R, 132G, and 132B are provided on the inclined surfaces of the openings 131R, 131G, and 131B, respectively. Inside the openings 131R, 131G, and 131B, the LED chips 130R, 130G, and 130B are provided. In the following description, when it is not necessary to distinguish the pixels 110R, 110G, and 110B from each other, they are simply referred to as the pixel 110. The same applies to the components of the pixel 110.

[0019] As shown in FIG. 3, the LED chip 130 is provided above the substrate 101. The substrate 101 is an insulating substrate, and for example, a glass substrate, a resin substrate, or a resin film is used. In this specification and the like, the direction from the substrate 101 toward the LED chip 130 in the third direction D3 perpendicular to the surface of the substrate 101 is referred to as the "upper side".

[0020] On the substrate 101, a transistor 120 is provided via an underlayer film 112. The underlayer film 112 is formed by, for example, a single layer or a stack of silicon oxide and silicon nitride. The transistor 120 functions as a transistor for driving the LED chip 130. In the present embodiment, the transistor 120 is shown in a top gate structure, but it may also be a bottom gate structure or a dual gate structure. The transistor 120 has at least a semiconductor layer 114, a gate insulating film 116, and a gate electrode 118a.

[0021] As the semiconductor layer 114, for example, amorphous silicon, polysilicon, or an oxide semiconductor is used. Examples of the oxide semiconductor include IGZO (Indium Gallium Zinc Oxide), ITZO (Indium Tin Zinc Oxide), ZnON (Zinc Oxide Nitride), IGO (Indium Gallium Oxide), and the like. As the gate insulating film 116, for example, silicon oxide and silicon nitride are used as a single layer or a stack. The gate electrode 118a is provided on the semiconductor layer 114 via the gate insulating film 116. The gate electrode 118a is electrically connected to the gate line 118 and may be formed of the same conductive layer as the gate line 118 or a different conductive layer.

[0022] An interlayer insulating film 119 is provided on the gate electrode 118a. A source electrode 122-1a and a drain electrode 122-2 are provided on the interlayer insulating film 119. The source electrode 122-1a and the drain electrode 122-2 are electrically connected to the semiconductor layer 114 through contact holes provided in the interlayer insulating film 119. A planarization film 124 is provided on the source electrode 122-1a and the drain electrode 122-2. As the planarization film 124, an organic resin such as polyimide, acrylic, or epoxy is used. An electrode 126 is provided on the planarization film 124. The electrode 126 is electrically connected to the drain electrode 122-2 through a contact hole formed in the planarization film 124. The electrode 126 functions as a pixel electrode. An insulating film 127 is provided on the planarization film 124 and the electrode 126. As the insulating film 127, for example, silicon oxide or silicon nitride is provided in a single layer or a stack. An electrode 128 is provided on the insulating film 127. The electrode 128 functions as a common electrode.

[0023] A planarization film 129 is provided on the insulating film 127 and the electrode 128. The planarization film 129 covers the end portion of the electrode 128. An opening 131 (also referred to as a cavity) is provided in the planarization film 129. The opening 131 is an area where an LED chip 130 will be provided later. The thickness (height H1) of the planarization film 129 is provided to be at least higher than the height (H2) of the LED chip 130. Here, the thickness of the planarization film 129 is the thickness from the surface (bottom surface) in contact with the insulating film 127 to the surface of the planarization film 129. When the pixel 110 is viewed in plan view, the opening 131 is square-shaped. Specifically, the opening 131 has a frustum of a square pyramid shape in which the area of the square on the surface of the planarization film 129 is larger than the area of the square on the bottom surface side of the planarization film 129. In the present embodiment, the shape of the opening 131 will be described as a regular frustum of a square pyramid shape. In FIG. 3, the opening 131 has inclined surfaces 129-1 and 129-2. The inclined surfaces 129-1 and 129-2 are inclined at an angle θ with respect to the third direction D3 perpendicular to the horizontal planes (the first direction D1 and the second direction D) of the substrates 101 and 102.

[0024] Inside the opening 131, a reflective film 132 is provided on the planarization film 129. The reflective film 132 is provided along the inclined surfaces 129-1 and 129-2 inside the opening 131 in the planarization film 129. The reflective film 132 is also provided on the inclined surfaces adjacent to the inclined surfaces 129-1 and 129-2 of the planarization film 129 in the same manner as the inclined surfaces 129-1 and 129-2. That is, the reflective film 132 is provided across the entire inner inclined surface of the opening 131 when viewed in plan. In the reflective film 132, the upper end portion of the reflective film 132 is provided at the upper end portion 129-1a on the surface side of the opening 131 in the planarization film 129, and the lower end portion of the planarization film 129 is provided at the lower end portion 129-1b on the bottom surface side of the planarization film. Here, the lower end portion on the bottom surface side of the planarization film 129 is the portion in contact with the electrode 128. The reflective film 132 is not provided on the surface (upper surface) of the planarization film 129. That is, the reflective film 132 is located on the upper end portion 129-1a side of the inner inclined surface 129-1 in the planarization film 129, and at the lower end portion 129-1b of the inclined surface 129-1 of the planarization film 129, the inclined surface 129-1 of the planarization film 129 is exposed from the reflective film 132. The reflective film 132 may be, for example, a metal having reflectivity, and for example, aluminum is used. In the present embodiment, although the reflective film 132 is provided across the entire upper end portion 129-1a side of the inclined surface 129-1 of the opening 131 in plan view, it is not formed on the lower end portion 129-1b side of the opening 131 in cross-sectional view. Therefore, the reflective film 132 is electrically insulated from the electrode 128.

[0025] Inside the opening 131, an electrode 134-1 is provided on the electrode 128, and an electrode 134-2 is provided on the insulating film 127. The electrode 134-2 is electrically connected to the electrode 126 through a contact hole provided in the insulating film 127. The electrodes 134-1 and 134-2 are electrodes for electrically connecting the LED chip 130. In the present embodiment, the electrodes 134-1 and 134-2 are provided so as to be electrically insulated from the reflective film 132.

[0026] The LED chip 130 is surrounded by a reflective film 132 and is provided inside the opening 131. Also, the LED chip 130 is provided on the electrodes 134-1 and 134-2. The LED chip 130 is electrically connected to the electrode 134-1 via the electrode 136-1 and is electrically connected to the electrode 134-2 via the electrode 136-2. The electrodes 136-1 and 136-2 are formed of a conductive material such as gold (Au), copper (Cu), silver (Ag), tin (Sn), or aluminum (Al). As the LED chip 130, a micro LED or a mini LED is used. A micro LED is an LED with a size of 100 μm or less, and a mini LED is an LED with a size of 100 μm to 200 μm. In the display device 100, LEDs of any size can be used, and they can be appropriately selected according to the size of the pixel 110. The side surface of the LED chip 130 faces the inclined surfaces 129-1 and 129-2 of the planarization film 129 and the reflective film 132.

[0027] FIG. 4 shows an example of the structure of an LED wafer constituting the LED chip 130. The LED chip 130 has a structure including a substrate using a semiconductor wafer such as GaAs, or a buffer layer 204 formed of a nitride such as gallium nitride on a substrate 202 formed of an insulating material such as sapphire, an n-type layer 206 formed of a gallium nitride-based compound semiconductor, an active layer 208 in which a quantum well structure is formed of a gallium nitride-based compound semiconductor, a p-type layer 210 formed of a gallium nitride-based compound semiconductor, a passivation layer 214, and electrodes 136-1 and 136-2. However, when the LED chip 130 is mounted on the electrodes 134-1 and 134-2, the substrate 202 of the LED chip 130 is removed. In this embodiment, the size of the LED chip 130 is what is called a so-called micro LED, and for example, it has a size with a vertical width L2 of about 10 μm to 150 μm, a horizontal width W2 of about 5 μm to 100 μm, and a height H2 of about 5 μm to 15 μm.

[0028] The planarization film 138 is provided on the planarization film 129, covers the LED chip 130, and is provided so as to fill the opening 131. The planarization film 138 has a function as a protective film for protecting the LED chip 130, and also has a function as a planarization film for planarizing the step caused by the LED chip 130.

[0029] The planarization film 138 is formed of a resin such as acrylic, for example, and is applied by, for example, a slit coating method after mounting the LED chip 130. For example, when the substrate 101 is a resin substrate having flexibility, in order to realize the flexible display device 100, it may be preferable to have a structure in which the cover glass is not provided intentionally and the planarization film 138 protects the substrate 101 including the LED chip 130.

[0030] When a voltage equal to or higher than the light emission threshold is applied between the electrode 126 and the electrode 128, light is emitted from the active layer 208 of the LED chip 130. The emitted light passes through the planarization film 138 and the substrate 102 and is radiated to the outside. The light emitted from the LED chip 130 has weak directivity and is radiated not only in the front direction (the third direction D3 shown in FIG. 3) but also laterally with a wide solid angle.

[0031] In a conventional micro-LED display device having a cavity structure, among the light emitted from the LED, there is a component that is totally reflected at the boundary between the cover glass and the air layer. The totally reflected light is multiply reflected and confined in the medium (here, an organic resin or glass), and is attenuated in the medium without being taken out of the display device to the outside, so that a loss occurs when the light is taken out of the display device to the outside. This causes a decrease in the light emission efficiency and luminance of the display device.

[0032] Therefore, in the display device 100 according to an embodiment of the present invention, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is reduced. Specifically, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is set to 20 μm or less. Here, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air refers to the height (thickness) from the upper end portion (surface) of the inclined surface of the planarization film 129 to the surface of the planarization film 138. Note that the smaller the height H3, the better, and the height H3 may be 0 μm.

[0033] FIG. 5 is a diagram showing how light is refracted in the pixel structure shown in FIG. 3. In FIG. 5, the layers below the planarization film 124 are not shown. In the present embodiment, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is reduced. As a result, as shown in FIG. 5, even if the light emitted from the LED chip 130 is totally reflected by the planarization film 138, it is reflected in a direction that does not satisfy the total reflection condition by the reflection film 132 and can pass through the planarization film 138 and be taken out to the outside. Therefore, since the light emitted from the LED chip 130 can be suppressed from being lost by total reflection, the light emission efficiency and luminance of the display device 100 can be improved.

[0034] At this time, the angles θ of the inclined surfaces 129-1 and 129-2 of the planarization film 129 are preferably 15° or more and 50° or less. By the angles θ of the inclined surfaces 129-1 and 129-2 of the planarization film 129 being within the above range, the light emission efficiency and luminance of the display device 100 can be further improved.

[0035] <Modification 1> FIG. 6 shows the pixel structure of a display device 100A according to an embodiment of the present invention. In FIG. 6, the configuration is the same as that of the display device 100 except that a substrate 102 is provided as a cover glass on the planarization film 138.

[0036] On the opening 131, a planarization film 138 and a substrate 102 are provided. The planarization film 138 not only fills the opening 131 but is also provided on the surface of the planarization film 129. The substrate 102 functions as a cover glass. The substrate 102 may be made of the same material as the substrate 101. The substrate 102 is an insulating substrate, and for example, a glass substrate, a resin substrate, or a resin film, etc. may be used.

[0037] The planarization film 138 has a function as a protective film for protecting the LED chip 130, and also has a function as an adhesive layer for bonding to the substrate 102. Further, when the substrate 102 is bonded, the planarization film 138 also has a function as a planarization film for planarizing the step caused by the LED chip 130.

[0038] The planarization film 138 is formed of a resin such as acrylic. The planarization film 138 is applied, for example, by a slit coating method after the mounting of the LED chip 130. After applying the planarization film 138, the cover glass is attached and cured by ultraviolet rays to achieve adhesion.

[0039] Also in the display device 100A, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is made small. Specifically, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is set to 20 μm or less. Here, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air refers to the height from the upper end portion (surface) of the inclined surface of the planarization film 129 to the surface of the substrate 102. Here, the height H3 may or may not include the thickness of the planarization film 138. Note that the smaller the height H3 is, the better, and the height H3 may be 0 μm. When glass is used as the substrate 102, the refractive index of the glass is, for example, 1.4 to 1.6. Since the refractive index of the planarization film 138 is the same as that of the glass, the height H3 is treated as the height from the upper end portion 129-1a of the opening 131 to the interface 160 with air.

[0040] FIG. 7 is a diagram showing how light refracts in the pixel structure of the display device 100A shown in FIG. 6. In FIG. 7, the layers below the planarization film 124 are not shown. In the present embodiment, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is made small. Even if the refractive index of the planarization film 138 is approximately the same as the refractive index of the substrate 102, there may be a component of the light emitted from the LED chip 130 that is totally reflected at the interface between the planarization film 138 and the substrate 102. As shown in FIG. 7, even if the light emitted from the LED chip 130 is totally reflected by the planarization film 138 and the substrate 102, it is reflected by the reflection film 132 in a direction that does not satisfy the total reflection condition, passes through the planarization film 138 and the substrate 102, and can be taken out to the outside. Therefore, since the loss of the light emitted from the LED chip 130 due to total reflection can be suppressed, the light emission efficiency and luminance of the display device 100 can be improved.

[0041] <Second Embodiment> In the present embodiment, a mode in which the structure of the reflection film 132 is partially different from the pixel structure of the display device 100 in the first embodiment will be described with reference to FIG. 8. In the following description, the differences from the first embodiment will be described.

[0042] FIG. 8 is a cross-sectional view of the pixel structure of the display device 100B according to the present embodiment. In the present embodiment, the position where the reflective film 132 is provided is different from that in the first embodiment. In the present embodiment, on the inclined surface 129-1, the position of the lower end portion 132b of the reflective film 132 is provided above the position of the lower surface of the LED chip 130. The reflective film 132 is provided from the position of height H4 to the position of the upper end portion 129-1a of the planarization film 129 with reference to the lower surface of the LED chip 130. That is, the height from the lower surface of the LED chip 130 to the lower end portion 132b of the reflective film 132 corresponds to the height H4. On the inclined surface 129-1, it corresponds to the height H5 from the lower end portion 132b to the upper end portion 132a of the reflective film 132. The position where the upper end portion 132a of the reflective film 132 is provided substantially coincides with the position of the upper end portion 129-1a of the planarization film 129. In this specification and the like, "substantially coincides" means that the position of the upper end portion 129-1a of the planarization film 129 is in the range of -10 nm or more and 10 nm or less with reference to the upper end portion 129-1a of the planarization film 129. Here, the height H5 is obtained based on the angle θ at which the inclined surface 129-1 inclines in a cross-sectional view and the length from the lower end portion 132b to the upper end portion 132a of the reflective film 132 on the inclined surface 129-1. Here, the reflective film 132 on the inclined surface 129-1 is taken as an example for description, but the same applies to the reflective film 132 on the inclined surface 129-2. When the height H4 = 0 μm, that is, when the position of the lower surface of the LED chip 130 from the surface of the substrate 101 and the position of the lower end portion 132b of the reflective film 132 from the surface of the substrate 101 substantially coincide, or when the position of the lower end portion 132b of the reflective film 132 is provided below the position of the lower surface of the LED chip, it corresponds to the pixel structure of the first embodiment. As shown in FIG. 2, the reflective film 132 is provided over the entire inner inclined surface in the opening 131 in a plan view. Also in FIG. 8, the reflective film 132 is not provided on the surface (upper surface) of the planarization film 129. That is, the reflective film 132 is located on the upper end portion 129-1a side of the inclined surface 129-1 of the planarization film 129, and at the lower end portion 129-1b of the inclined surface 129-1 of the planarization film 129, the inclined surface 129-1 of the planarization film 129 is exposed from the reflective film 132.In the present embodiment, although the reflective film 132 is provided over the entire upper end portion 129-1a side of the inclined surface 129-1 of the opening 131 in a plan view, it is not formed on the lower end portion 129-1b side of the opening 131 in a cross-sectional view. Therefore, the reflective film 132 is electrically insulated from the electrode 128.

[0043] Also in the case of the pixel structure of the display device 100B shown in the present embodiment, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is preferably 20 μm or less. Further, the height H4 from the lower surface of the LED chip 130 to the lower end portion 132b of the reflective film 132 is preferably 0 μm or more and 20 μm or less. Furthermore, the height H5 from the lower end portion 132b to the upper end portion 132a of the reflective film 132 is preferably 5 μm or more and 40 μm or less. In this way, by defining the thickness of the planarization film 129, the thickness of the planarization film 138, and the thickness of the substrate 102, the inclination angle of the planarization film 129, and the region where the reflective film 132 is provided, even if the light emitted from the LED chip 130 is totally reflected by the substrate 102, the distance that the light passes through the medium can be shortened. Therefore, it is possible to suppress the loss of the light emitted from the LED chip 130 due to total reflection. As a result, the luminous efficiency and luminance of the display device 100 can be improved. Although the configuration in which the substrate 102 is provided on the planarization film 138 is illustrated in FIG. 8, a configuration in which the substrate 102 is not provided on the planarization film 138 may also be used.

[0044] <Third Embodiment> In the present embodiment, a mode in which the structure of the reflective film 132 is partially different from the pixel structure of the display device 100 in the first embodiment will be described with reference to FIGS. 9 and 10. In the following description, differences from the first and second embodiments will be described.

[0045] FIG. 9 is a plan view showing a plurality of pixels 110 arranged in the display area 103 of the display device 100C. FIG. 10 is a cross-sectional view when the pixel 110 (pixel 110G) is cut along the line B1 - B2. In the present embodiment, a case where the reflective film 132 is divided for each inclined surface inside the opening 131 will be described.

[0046] As shown in FIG. 9, for example, in the pixel 110G, reflective films 132G - 1, 132G - 2, 132G - 3, 132G - 4 are provided for each inclined surface in the opening 131G. In the pixel 110R, reflective films 132R - 1, 132R - 2, 132R - 3, 132R - 4 are provided for each inclined surface in the opening 131R. In the pixel 110B, reflective films 132B - 1, 132B - 2, 132B - 3, 132B - 4 are provided for each inclined surface in the opening 131.

[0047] In the present embodiment, each of the reflective films 132 - 1, 132 - 2, 132 - 3, 132 - 4 is electrically separated. Therefore, for example, as shown in FIG. 10, the reflective film 132 - 1 may be provided between the electrode 128 and the electrode 134 - 1 and be electrically connected to the electrode 128 and the electrode 134 - 1. Similarly, the reflective film 132 - 2 may be provided between the electrode 126 and the electrode 134 - 2 and be electrically connected to the electrode 126 and the electrode 134 - 2. When ionic impurities enter from the outside of the display device 100 and enter the planarization film 138, if a potential is applied from the electrode to the reflective film, the reflective film can trap ions. Also, when aluminum is used as the reflective film, it is preferable because applying a relatively low potential to the reflective film makes it difficult for aluminum to be anodized.

[0048] Note that in the present embodiment, a case where the reflective film 132 - 1 is electrically connected to the electrode 128 and the electrode 134 - 1 and the reflective film 132 - 2 is electrically connected to the electrode 126 and the electrode 134 - 2 has been described, but the configuration is not limited to this. A configuration in which the reflective film 132 - 1 is electrically insulated from the electrode 128 and the electrode 134 - 1 and the reflective film 132 - 2 is electrically insulated from the electrode 126 and the electrode 134 - 2 may also be used.

[0049] Also in the case of the pixel structure shown in this embodiment, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is preferably 20 μm or less. Thereby, since the light emitted from the LED chip 130 can be suppressed from being lost by total reflection, the light emission efficiency and luminance of the display device 100 can be improved. Further, the angles θ of the inclined surfaces 129-1 and 129-2 of the planarization film 129 are preferably 15° or more and 50° or less. Thereby, since the angles θ of the inclined surfaces 129-1 and 129-2 of the planarization film 129 are within the above-described range, the light emission efficiency and luminance can be further improved.

[0050] <Fourth Embodiment> In this embodiment, a display device 100D having a configuration partially different from that of the first to third embodiments will be described with reference to FIG. 11.

[0051] FIG. 11 is a cross-sectional view showing the pixel structure of a display device 100D according to an embodiment of the present invention. Note that the pixel structure is the same as the pixel structure shown in FIG. 3. In this embodiment, a substrate 144 is provided on the substrate 102 via an adhesive layer 142. The thickness of the adhesive layer 142 is, for example, 3 μm to 10 μm. The substrate 144 is, for example, a glass substrate. An air layer is provided between the substrate 102 and the substrate 144. By providing a thick film substrate 144 (for example, glass) on the substrate 102, the physical strength can be improved.

[0052] Also in the display device 100D, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is made small. Specifically, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is set to 20 μm or less. In FIG. 11, the height H3 from the upper end portion 129-1a of the opening 131 to the interface 160 with air is the height from the upper end portion (surface) of the inclined surface of the planarization film 129 to the surface of the substrate 102.

Example

[0053] In this embodiment, the results of obtaining the luminous efficiency in the pixel structure of the display device according to an embodiment of the present invention by simulation will be described.

[0054] (Simulation conditions) FIG. 12 is a cross-sectional view showing the pixel structure in this embodiment. An electrode 328 and an electrode 336 are disposed on an insulating surface 324, and an LED chip 330 is disposed on the electrode 336. Inclined surfaces 329-1 and 329-2 of a planarization film 329 are disposed so as to surround the LED chip 330, and a reflective film 332 is disposed on the inner inclined surfaces 329-1 and 329-2 of the planarization film 329. An interface 360 with air is set as an interface between glass and air on the planarization film 329.

[0055] In FIG. 12, aluminum is set for the electrode 328, and tin is set for the electrode 336. The LED chip 330 is set as a gallium nitride (GaN)-based LED. Also, the length of one side on the upper surface of the opening 331 is 45 μm, and the length L2 of one side on the upper surface of the LED chip 130 is set to 20 μm.

[0056] Here, the thickness H1 of the planarization film 329, the height H3 of the interface 360 with air from the surface of the planarization film 338, the height H4 from the lower surface of the LED chip 330 to the lower end portion 332b of the reflective film 332, and the height H5 from the lower end portion 332b to the upper end portion 332a of the reflective film 332 are set. At this time, the angle formed by the inclined surface 329-1 of the planarization film 329 and the third direction D3 is set as θ.

[0057] (Simulation method) The shape of the opening 331 is a frustum of a regular quadrangular pyramid, and the length of one side on the surface of the planarization film 329 is 45 μm. Also, the length of one side of the LED chip 330 is 30 μm, and the height H2 of the LED chip 330 is 3 μm. Also, the material of the electrode 328 is approximated by the material of aluminum, and the material of the electrode 336 is tin. The total thickness of the electrode 328 and the electrode 336 combined is 5 μm.

[0058] Calculations were made based on the conditions shown in Examples 1 and 2 and Comparative Examples 1 and 2 described below.

[0059] (Example 1) In the pixel structure shown in FIG. 12, the height H5 was set to 7.5 μm, and the total height of the planarization film 329 and the glass (height H1 + H3) was set to 20 μm (Condition 1). In Condition 1, when the height H4 was 0 μm, 2.5 μm, 5.0 μm, 7.5 μm, 10 μm, 12.5 μm, the relationship between the angle θ and 10°, 15°, 20°, 25°, 30°, 35°, 40°, 45°, 50°, 55° was calculated.

[0060] (Comparative Example 1) In the pixel structure shown in FIG. 12, the height H5 was set to 7.5 μm, and the total height of the planarization film 329 and the glass (height H1 + H3) was set to 90 μm (Condition 2). In Condition 2, when the height H4 was 0 μm, 2.5 μm, 5.0 μm, 7.5 μm, 10 μm, 12.5 μm, the relationship between the angle θ and 10°, 15°, 20°, 25°, 30°, 35°, 40°, 45°, 50°, 55° was calculated.

[0061] (Example 2) In the pixel structure shown in FIG. 12, the height H5 was set to 10.0 μm, and the total height of the planarization film 329 and the glass height H1 (height H1 + H3) was set to 20 μm (Condition 3). In Condition 3, when the height H4 was 0 μm, 2.5 μm, 5.0 μm, 7.5 μm, 10 μm, the relationship between the angle θ and 10°, 15°, 20°, 25°, 30°, 35°, 40°, 45°, 50° was calculated.

[0062] (Comparative Example 2) In the pixel structure shown in FIG. 12, the height H5 was set to 7.5 μm, and the total height of the planarization film 329 and the glass height H1 (height H1 + H3) was set to 90 μm (Condition 4). In Condition 4, when the height H4 was 0 μm, 2.5 μm, 5.0 μm, 7.5 μm, 10 μm, the relationship between the angle θ and 10°, 15°, 20°, 25°, 30°, 35°, 40°, 45°, 50° was calculated.

[0063] (Result) The calculation results in Examples 1 and 2 and Comparative Examples 1 and 2 are shown in Tables 1 to 4. Table 1 shows the calculation results in Example 1, Table 2 shows the calculation results in Comparative Example 1, Table 3 shows the calculation results in Example 2, and Table 4 shows the calculation results in Comparative Example 2.

[0064]

Table 1

[0065]

Table 2

[0066]

Table 3

[0067]

Table 4

[0068] In the results of Example 1, the lowest luminous efficiency was 0.2709 when the height H4 was 12.5 μm and the angle θ was 55°. The highest luminous efficiency was 0.4384 when the height H4 was 5.0 μm and the angle θ was 25°.

[0069] In the results of Comparative Example 1, the lowest luminous efficiency was 0.2368 when the height H4 was 12.5 μm and the angle θ was 55°. The highest luminous efficiency was 0.4265 when the height H4 was 5.0 μm and the angle θ was 25°.

[0070] From the results in Tables 1 and 2, it was found that the highest luminous efficiency in Example 1 was 3.0% higher than the highest luminous efficiency in Comparative Example 1.

[0071] In the results of Example 2, the lowest luminous efficiency was 0.3278 when the height H4 was 12.5 μm and the angle θ was 55°. The highest luminous efficiency was 0.4685 when the height H4 was 0 μm and the angle θ was 40°.

[0072] In the results of Comparative Example 2, the lowest luminous efficiency was 0.2388 when the height H4 was 12.5 μm and the angle θ was 55°. The highest luminous efficiency was 0.5467 when the height H4 was 5.0 μm and the angle θ was 0°.

[0073] From the results in Table 3 and Table 4, it was found that the highest luminous efficiency in Example 2 was improved by 18.0% compared with the highest luminous efficiency in Comparative Example 2.

[0074] Furthermore, when the angle θ was set to 50°, the height H4 was set to 0 μm, and the height H5 was set to 10 μm, the relationship between the height H3 (μm) and the upward emission efficiency was calculated. Table 5 shows the relationship between the height H3 and the upward emission efficiency.

[0075]

Table 5

[0076] Figure 13 is a diagram showing the relationship between the height H3 (μm) and the upward emission efficiency. The horizontal axis is the height H3 (μm), and the vertical axis is the upward emission efficiency. As shown in Figure 13, when the height H3 was in the range of 35 μm to 75 μm, the upward emission efficiency remained at 0.45 without change. When the height H3 became 15 μm to 25 μm, the upward emission efficiency became 0.46. As the thickness became smaller than 25 μm, the upward emission efficiency improved, and when the thickness became 0.5 μm, the upward emission efficiency became 0.76, showing the highest efficiency.

[0077] From the results of the above calculations, it was shown that when the height H3 was 25 μm or less, the upward emission efficiency improved.

[0078] Based on the display device described as an embodiment and an example of the present invention, those in which a person skilled in the art appropriately adds, deletes, or changes the design of components, or adds, omits, or changes conditions of processes, as long as they have the gist of the present invention, are included in the scope of the present invention. Also, the above-described embodiments can be combined with each other as long as no technical contradiction occurs.

[0079] Moreover, even other operational effects different from those brought about by the aspects of the above-described embodiments, as long as they are obvious from the description in this specification or can be easily predicted by a person skilled in the art, are naturally considered to be brought about by the present invention.

[0080] Within the scope of the present invention, those skilled in the art can conceive various modifications and corrections, and it is understood that those modifications and corrections also belong to the scope of the present invention. For example, with respect to each of the above-described embodiments, those in which a person skilled in the art appropriately adds, deletes, or changes the design of components, or adds, omits, or changes conditions of processes, as long as they have the gist of the present invention, are included in the scope of the present invention.

Description of Reference Numerals

[0081] 100: Indicating device, 101: Substrate, 102: Substrate, 103: Indicating area, 104: Peripheral area, 105-1, 105-2: Driving circuit, 107: Terminal portion, 110: Pixel, 112: Underlayer film, 114: Semiconductor layer, 116: Gate insulating film, 118: Gate line, 118a: Gate electrode, 119: Interlayer insulating film, 120: Transistor, 122: Source line, 122-1a: Source electrode, 122-2: Drain electrode, 124: Planarization film, 126: Electrode, 127: Insulating film, 128: Electrode, 129: Planarization film, 129-1, 129-2, 129-3, 129-4: Inclined surface, 129-1a: Upper end portion, 129-1b: Lower end portion, 130: LED chip, 131: Opening, 131G: Opening, 132: Reflective film, 132-1, 132-2, 132-3, 132-4: Reflective film, 132a: Upper end portion, 132b: Lower end portion, 134-1, 134-2: Electrode, 134-1, 134-2: Electrode, 136-1, 136-2: Electrode, 138: Planarization film, 144: Substrate, 150: Light, 160: Interface with air, 202: Substrate, 204: Buffer layer, 206: n-type layer, 208: Active layer, 210: p-type layer, 214: Passivation layer, 324: Insulating surface, 328: Electrode, 329: Planarization film, 329-1: Inclined surface, 329-2: Inclined surface, 330: LED chip, 331: Opening, 332: Reflective film, 332: Reflective film, 332a: Upper end portion, 332b: Lower end portion, 336: Electrode, 338: Planarization film, 360: Interface with air

Claims

1. A first planarization film having an opening, A reflective film provided along an inclined surface inside the opening in the first planarization film, An LED chip provided inside the opening surrounded by the reflective film, A second planarization film provided on the first planarization film, covering the LED chip, and provided so as to embed the opening, and A display device, wherein a height from an upper end portion of the inclined surface of the first planarization film to an interface with air in the second planarization film is 20 μm or less.

2. The display device according to claim 1, wherein a lower end portion of the reflective film is provided below a lower surface of the LED chip.

3. The display device according to claim 1, wherein a lower end portion of the reflective film is provided above a lower surface of the LED chip.

4. The display device according to claim 3, wherein a height from a lower surface of the LED chip to a lower end portion of the reflective film is 0 μm or more and 20 μm or less when viewed in cross section.

5. The display device according to claim 1, wherein an upper end portion of the reflective film substantially coincides with an upper end portion of the inclined surface.

6. The display device according to claim 1, wherein a height from a lower end portion of the reflective film to an upper end portion of the reflective film is 5 μm or more and 40 μm or less when viewed in cross section.

7. The display device according to claim 1, wherein an angle θ formed between the inclined surface and a direction perpendicular to a surface of the second planarization film is 25° or more and 55° or less when viewed in cross section.

8. The display device according to claim 1, wherein the reflective film is provided over the entire inclined surface of the opening.

9. The display device according to claim 1, wherein the reflective film is provided separately for each inclined surface of the opening.

10. The display device according to claim 9, wherein one of the divided reflective films is connected to one of electrodes of the LED chip, and the other of the divided reflective films is connected to the other of the electrodes of the LED chip.

11. A first planarization film having an opening, A reflective film provided along an inclined surface inside the opening in the first planarization film, An LED chip provided inside the opening surrounded by the reflective film, A second planarization film provided on the first planarization film, covering the LED chip, and provided so as to embed the opening, and A substrate provided on the second planarization film, and A display device, wherein a height from an upper end portion of the inclined surface of the first planarization film to an interface with air in the substrate is 20 μm or less.

12. The display device according to claim 11, wherein a lower end portion of the reflective film is provided below a lower surface of the LED chip.

13. The display device according to claim 11, wherein a lower end portion of the reflective film is provided above a lower surface of the LED chip.

14. The display device according to claim 13, wherein in a cross-sectional view, a height from the lower surface of the LED chip to the lower end portion of the reflective film is 0 μm or more and 20 μm or less.

15. The display device according to claim 11, wherein an upper end portion of the reflective film substantially coincides with an upper end portion of the inclined surface.

16. The display device according to claim 11, wherein in a cross-sectional view, a height from the lower end portion of the reflective film to the upper end portion of the reflective film is 5 μm or more and 40 μm or less.

17. The display device according to claim 11, wherein in a cross-sectional view, an angle θ formed between the inclined surface and a direction perpendicular to a surface of the substrate is 25° or more and 55° or less.

18. The display device according to claim 11, wherein the reflective film is provided over the entire inclined surface of the opening.

19. The display device according to claim 11, wherein the reflective film is provided in a divided manner for each inclined surface of the opening.

20. The display device according to claim 19, wherein one of the divided reflective films is connected to one of the electrodes of the LED chip, and the other of the divided reflective films is connected to the other of the electrodes of the LED chip.

Images