Projector and method for controlling the projector

Abstract

To prevent a reduction in the quality of an image that is visually recognized by a user.SOLUTION: A projector comprises: an electro-optical panel that has a plurality of pixels arranged thereon, and emits light from the plurality of pixels to display an image; an optical path shift element that changes an optical path of the light emitted from the plurality of pixels; and an image processing circuit that, for each of a plurality of unit periods included in one frame period for displaying an image for one frame represented by an input image signal, supplies image signals generated based on the input image signal and corresponding to the plurality of pixels in predetermined order to the plurality of pixels. The image processing circuit includes an adjustment circuit that adjusts the response speed of the plurality of pixels when switching the image displayed by the electro-optical panel based on the order in which the image signals are supplied or the positions of the pixels on the electro-optical panel.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present invention relates to a projector and a method for controlling the projector.

Background Art

[0002] In the technical field of projectors, as a method for pseudo-increasing the resolution of an image visually recognized by a user, a pixel shift technique using an optical path shift element that optically shifts a display position is known (for example, Patent Document 1). In the pixel shift technique, one frame period corresponding to one frame is divided into a plurality of unit periods, and the optical path shift element is controlled so that the state of the optical path shift element is different for each unit period. As a result, the display position of the image projected from the projector onto the projection surface shifts for each unit period.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the pixel shift technique, it is desirable that the state change of the optical path shift element and the switching of the projected image for each unit period be performed instantaneously. However, in reality, a certain amount of time is required for the state change of the optical path shift element and the switching of the projected image. For this reason, in the conventional method for controlling a projector, a deviation occurs between the period from the start to the end of the state change of the optical path shift element and the period from the start to the end of the switching of the projected image, and there is a possibility that the quality of the image visually recognized by the user deteriorates.

Means for Solving the Problems

[0005] A projector according to an aspect of the present invention includes an electro-optical panel in which a plurality of pixels are arranged and an image is displayed by emitting light from the plurality of pixels, an optical path shift element that changes the optical path of the light emitted from the plurality of pixels, and in each of a plurality of unit periods included in a one-frame period for displaying an image for one frame indicated by an input image signal, an image processing circuit that is generated based on the input image signal and supplies an image signal corresponding to the plurality of pixels to the plurality of pixels in a predetermined order, and the image processing circuit includes an adjustment circuit that adjusts the response speed of the plurality of pixels when the image displayed on the electro-optical panel is switched, based on the order in which the image signals are supplied or the positions of the pixels in the electro-optical panel.

[0006] Also, a control method for a projector according to an aspect of the present invention is a control method for a projector having an electro-optical panel in which a plurality of pixels are arranged and an image is displayed by emitting light from the plurality of pixels, and an optical path shift element that changes the optical path of the light emitted from the plurality of pixels. In each of a plurality of unit periods included in a one-frame period for displaying an image for one frame indicated by an input image signal, an image signal is generated based on the input image signal and supplied to the plurality of pixels in a predetermined order, and the response speed of the plurality of pixels when the image displayed on the electro-optical panel is switched is adjusted based on the order in which the image signals are supplied or the positions of the pixels in the electro-optical panel.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Mode for Carrying Out the Invention

[0008] Hereinafter, embodiments will be described with reference to the drawings. In each figure, the dimensions and scales of each part are appropriately different from the actual ones. Further, the embodiments described below are preferred specific examples, and thus various technically preferable limitations are imposed. Therefore, the scope of the present disclosure is not limited to these embodiments unless otherwise specified in the following description to particularly limit the present disclosure.

[0009] [1. Embodiment] First, with reference to FIG. 1, an example of the outline of the projector 1 according to the embodiment will be described.

[0010] FIG. 1 is an explanatory diagram showing a configuration example of the optical system of the projector 1 according to the embodiment. The configuration example of the control system of the projector 1 will be described later with reference to FIG. 4.

[0011] In the projector 1, an optical pixel shift described later is executed. For example, the projector 1 includes an illumination device 20, a separation optical system 40, three liquid crystal panels 10R, 10G, and 10B, and a projection optical system 60. The projector 1 has a control circuit 100 as shown in FIG. 4 described later in addition to the elements shown in FIG. 1. The liquid crystal panel 10 is an example of an "electro-optical panel".

[0012] The illumination device 20 emits white light which is visible light. For example, the illumination device 20 has a laser light source or a halogen lamp light source.

[0013] The separation optical system 40 includes three mirrors 41, 42, and 45, and dichroic mirrors 43 and 44. For example, the separation optical system 40 separates the white light emitted from the illumination device 20 into color light components of red, green, and blue, which are the three primary colors of light.

[0014] Specifically, for example, the dichroic mirror 44 transmits light in the red wavelength range among the white light emitted from the illumination device 20 and reflects light in the green and blue wavelength ranges. The light in the red wavelength range that has passed through the dichroic mirror 44 is guided to the liquid crystal panel 10R by the mirror 45. Also, the light in the green and blue wavelength ranges that has been reflected by the dichroic mirror 44 reaches the dichroic mirror 43. The dichroic mirror 43 transmits light in the blue wavelength range among the light in the green and blue wavelength ranges that has been reflected by the dichroic mirror 44 and reflects light in the green wavelength range. The light in the green wavelength range that has been reflected by the dichroic mirror 43 is guided to the liquid crystal panel 10G. Also, the light in the blue wavelength range that has passed through the dichroic mirror 43 is guided to the liquid crystal panel 10G by the mirrors 41 and 42.

[0015] In this way, light corresponding to the primary colors of red, green, and blue is incident on the liquid crystal panels 10R, 10G, and 10B. Therefore, in this embodiment, it is not necessary to provide color filters on the liquid crystal panels 10R, 10G, and 10B.

[0016] Each of the liquid crystal panels 10R, 10G, and 10B is used as a spatial light modulator. Details will be described later with reference to FIG. 2. In each of the liquid crystal panels 10R, 10G, and 10B, pixels PX are provided corresponding to the intersections of m scanning lines SLN and n data lines DLN. That is, in the present embodiment, each of the liquid crystal panels 10R, 10G, and 10B has a plurality of pixels PX arranged in a matrix of m rows * n columns. Note that m is an integer of 2 or more, and n is an integer of 2 or more. Each of the liquid crystal panels 10R, 10G, and 10B projects an image, for example, by emitting light from a plurality of pixels PX arranged in a matrix. For example, in each pixel PX, the transmittance of the emitted light with respect to the incident light is controlled according to the gradation. Hereinafter, the liquid crystal panels 10R, 10G, and 10B may be collectively referred to as the liquid crystal panel 10.

[0017] The projection optical system 60 includes a dichroic prism 61, a projection lens system 62, and an optical path shift element 80. The light modulated by the liquid crystal panel 10R, the light modulated by the liquid crystal panel 10G, and the light modulated by the liquid crystal panel 10B enter the dichroic prism 61 from three different directions. In the dichroic prism 61, the light in the red wavelength range and the light in the blue wavelength range are refracted by 90 degrees, and the light in the green wavelength range travels straight. Thereby, a red image, a green image, and a blue image are synthesized.

[0018] The light emitted from the dichroic prism 61 passes through the optical path shift element 80 and reaches the projection lens system 62. That is, the optical path shift element 80 is disposed between the dichroic prism 61 and the projection lens system 62. The optical path shift element 80 shifts the optical path of the light emitted from the dichroic prism 61. That is, the optical path shift element 80 changes the optical path of the light emitted from the plurality of pixels PX included in the liquid crystal panel 10. As a result, the position of the pixel displayed on the projection surface SCR is shifted. Hereinafter, the position of the pixel displayed on the projection surface SCR is also referred to as the projection position.

[0019] In this embodiment, it is assumed that the optical path shift element 80 can shift the projection position in the horizontal and vertical directions on the projection surface SCR. In FIG. 1, the horizontal direction on the projection surface SCR is the front or depth direction of the paper surface, and the vertical direction on the projection surface SCR is the vertical direction of the paper surface. Hereinafter, shifting the projection position is also referred to as pixel shift.

[0020] The projection lens system 62 projects the light emitted from the optical path shift element 80 onto a projection surface SCR such as a screen. More specifically, for example, the projection lens system 62 projects the combined image emitted from the dichroic prism 61 and transmitted through the optical path shift element 80 onto the projection surface SCR after magnification.

[0021] Here, the transmitted images of the liquid crystal panels 10R and 10B are reflected by the dichroic prism 61 and projected onto the projection surface SCR. On the other hand, the transmitted image of the liquid crystal panel 10G travels straight through the dichroic prism 61 and is projected onto the projection surface SCR. Therefore, the images formed by each of the liquid crystal panels 10R and 10B and the image formed by the liquid crystal panel 10G are in a horizontally reversed relationship.

[0022] FIG. 2 is an explanatory diagram showing an example of the liquid crystal panel 10 shown in FIG. 1. Since the liquid crystal panels 10R, 10G, and 10B are similar to each other, each of the liquid crystal panels 10R, 10G, and 10B is described by the liquid crystal panel 10 shown in FIG. 2. Also, FIG. 2 shows an example of the configuration of the pixel PX.

[0023] The liquid crystal panel 10 has, for example, m scanning lines SLN, n data lines DLN, a display area 12, a scanning line driving circuit 14, and a data line driving circuit 16. Here, m is an integer of 2 or more, and n is an integer of 2 or more. In FIG. 2, in order to distinguish the m scanning lines SLN from each other, "1", "2", "i", and "m" indicating row numbers are attached to the ends of the symbols of the scanning lines SLN. Similarly, in order to distinguish the n data lines DLN from each other, "1", "2", "3", "j", and "n" indicating column numbers are attached to the ends of the symbols of the data lines DLN. In the example shown in FIG. 2, i is an integer greater than or equal to 3 and less than m, and j is an integer greater than or equal to 4 and less than n. However, i may be an integer between 1 and m, and j may be an integer between 1 and n.

[0024] The m scanning lines SLN extend horizontally on the plane of FIG. 2, and the n data lines DLN extend vertically on the plane of FIG. 2. The display area 12 includes pixels PX provided corresponding to the intersections of each of the m scanning lines SLN and each of the n data lines DLN. That is, a plurality of pixels PX are arranged in a matrix of m rows * n columns in the display area 12. The horizontal direction of the display area 12 is the horizontal direction of the liquid crystal panel 10 and corresponds to the horizontal direction on the projection surface SCR. The vertical direction of the display area 12 is the vertical direction of the liquid crystal panel 10 and corresponds to the vertical direction on the projection surface SCR.

[0025] Here, for example, each of the plurality of pixels PX has a transistor TR and a liquid crystal element LCE. The liquid crystal element LCE has, for example, a pixel electrode ELa that is substantially square in plan view, a counter electrode ELb facing the pixel electrode ELa, and a VA-mode liquid crystal LC disposed between the pixel electrode ELa and the counter electrode ELb. For example, the liquid crystal element LCE has a transmittance corresponding to the effective value of the voltage between the pixel electrode ELa and the counter electrode ELb. In the present embodiment, a case where the liquid crystal element LCE is in the normally black mode is assumed. In the normally black mode, when the voltage between the pixel electrode ELa and the counter electrode ELb is large, the transmittance of the liquid crystal element LCE is higher than when the voltage between the pixel electrode ELa and the counter electrode ELb is small.

[0026] The counter electrode ELb is common to a plurality of pixels PX, and a common voltage Vcom, which is a constant voltage, is supplied to the counter electrode ELb. The transistor TR is, for example, an n-channel thin film transistor, and controls the electrical connection between the pixel electrode ELa and the data line DLN. For example, the gate of the transistor TR is connected to the scanning line SLN, the source of the transistor TR is connected to the data line DLN, and the drain of the transistor TR is connected to the pixel electrode ELa. Each of the plurality of pixels PX may have a storage capacitor arranged in parallel with respect to the liquid crystal element LCE.

[0027] The scanning line driving circuit 14 selects each scanning line SLN one by one in a predetermined order based on the control signal CTL3, and supplies a high-level scanning signal to the selected scanning line SLN. The scanning line driving circuit 14 supplies a low-level scanning signal to the scanning lines SLN other than the selected scanning line SLN. In the present embodiment, it is assumed that the predetermined order is the order of the first, second,..., m-th rows. That is, in the present embodiment, the plurality of pixels PX are scanned in the order of the first, second,..., m-th rows.

[0028] The data line driving circuit 16 latches the output image signal VI for one row. Then, the data line driving circuit 16 supplies the output image signal VI for each column of the row corresponding to the scanning line SLN selected by the high-level scanning signal to each of the n data lines DLN. The latching of the output image signal VI and the supply of the output image signal VI to the data line DLN are executed based on, for example, the control signal CTL3.

[0029] When the transistor TR connected to the scanning line SLN supplied with a high-level scanning signal is turned on, the output image signal VI supplied to the data line DLN is supplied to the pixel electrode ELa. When the level of the scanning signal switches from high level to low level, the transistor TR turns off, but the voltage of the output image signal VI supplied to the pixel electrode ELa is held by the capacitance of the liquid crystal element LCE. In this way, the transmittance of the light emitted from the liquid crystal element LCE is controlled by the output image signal VI corresponding to the gradation. That is, in each pixel PX, the transmittance of the emitted light with respect to the incident light is controlled according to the gradation. As a result, a modulated image based on the output image signal VI is generated. Hereinafter, the transmittance of the liquid crystal element LCE is also referred to as the transmittance of the pixel PX.

[0030] In this way, in the liquid crystal panel 10, for example, there is a certain difference between the timing of supplying the output image signal VI to the pixel PX arranged at the upper part of the display area 12 and the timing of supplying the output image signal VI to the pixel PX arranged at the lower part of the display area 12. For this reason, for example, even when all the pixels PX are switched to the same transmittance, a situation occurs in which the transmittance of the pixels PX in one row among the plurality of rows is different from the transmittance of the pixels PX in other rows.

[0031] The optical path shift element 80 changes its state so as to pseudo-increase the resolution of the image projected onto the projection surface SCR. For the driving of the liquid crystal panel 10 described above, during the period when the state of the optical path shift element 80 has not changed, the difference between the actual transmittance and the target transmittance of the pixel PX may vary depending on the row in which the pixel PX is arranged. When the variation in the difference between the actual transmittance and the target transmittance of the pixel PX is large during the period when the state of the optical path shift element 80 has not changed, the quality of the image visually recognized by the user deteriorates compared to the case where the variation in the difference between the actual transmittance and the target transmittance of the pixel PX is small. For this reason, in the present embodiment, the output image signal VI is generated so as to suppress an increase in the variation in the difference between the actual transmittance and the target transmittance of the pixel PX during the period when the state of the optical path shift element 80 has not changed.

[0032] In the projector 1, in order to prevent electrical degradation of the electro-optical material, polarity inversion driving is adopted in which the polarity of the voltage applied to the liquid crystal element LCE is inverted at regular intervals. In the present embodiment, it is assumed that the period of half of the field period FL shown in FIG. 3 described later is the period in which the polarity of the output image signal VI is inverted. However, the period in which the polarity of the output image signal VI is inverted is not limited to half of the field period FL. For example, the period in which the polarity of the output image signal VI is inverted may be one field period FL, or may be one frame period FM shown in FIG. 3 described later. Before explaining the generation of the output image signal VI, the effect of pixel shift will be explained with reference to FIG. 3.

[0033] FIG. 3 is an explanatory diagram schematically showing the effect of pixel shift. In FIG. 3, for convenience of explanation, a two-axis orthogonal coordinate system having an X-axis and a Y-axis orthogonal to each other is introduced. Hereinafter, the direction indicated by the arrow on the X-axis is referred to as the +X direction, and the direction opposite to the +X direction is referred to as the -X direction. Also, the direction indicated by the arrow on the Y-axis is referred to as the +Y direction, and the direction opposite to the +Y direction is referred to as the -Y direction. Also, hereinafter, the +X direction and the -X direction may be referred to as the X direction without particular distinction, and the +Y direction and the -Y direction may be referred to as the Y direction without particular distinction. The X direction corresponds to the horizontal direction on the projection plane SCR, and the Y direction corresponds to the vertical direction on the projection plane SCR.

[0034] In pixel shift, one frame period FM corresponding to one frame is divided into a plurality of field periods FL. Then, the optical path shift element 80 is controlled by the optical path shift element drive circuit 150 so that the state of the optical path shift element 80 is different for each field period FL. Here, one frame period FM is, for example, a period for displaying an input image for one frame indicated by the input image signal DIH on the liquid crystal panel 10. In the present embodiment, a case where one frame period FM is divided into four field periods FL1, FL2, FL3, and FL4 is assumed. The field period FL is an example of the "unit period". Further, when the field period FL1 corresponds to the "first unit period", the field period FL2 corresponds to the "second unit period", and when the field period FL2 corresponds to the "first unit period", the field period FL3 corresponds to the "second unit period". And when the field period FL3 corresponds to the "first unit period", the field period FL4 corresponds to the "second unit period".

[0035] In FIG. 3, pixel shift is described by taking as an example the case where four pixels PIa, PIb, Pic, and PId of the image indicated by the input image signal DIH are projected onto the projection surface SCR by one pixel PXij of each of the liquid crystal panels 10R, 10G, and 10B. The optical path shift element 80 is controlled by the optical path shift element drive circuit 150 so that the light from the pixel PXij of the liquid crystal panel 10 reaches the positions A, B, C, and D of the projection surface SCR in the field periods FL1, FL2, FL3, and FL4, respectively. The pixel PXij of the liquid crystal panel 10 displays the pixels PIa, PIb, Pic, and PId of the input image in the field periods FL1, FL2, FL3, and FL4, respectively.

[0036] The pixel PIa is the pixel PI at the (2*j - 1)-th column and (2*i - 1)-th row among a plurality of pixels PI of the input image indicated by the input image signal DIH. The pixel PIb is the pixel PI at the 2*j-th column and (2*i - 1)-th row among the plurality of pixels PI. Also, the pixel PIc is the pixel PI at the 2*j-th column and 2*i-th row among the plurality of pixels PI, and the pixel PId is the pixel PI at the (2*j - 1)-th column and 2*i-th row among the plurality of pixels PI. Here, i is an integer from 1 to m, and j is an integer from 1 to n.

[0037] Also, the pixel PXij in FIG. 3 indicates the pixel PX at the i-th row and j-th column of each of the liquid crystal panels 10R, 10G, and 10B.

[0038] Also, the pixel PXS in FIG. 3 indicates the pixel PXS corresponding to each pixel PXij of the liquid crystal panels 10R, 10G, and 10B among a plurality of pixels PXS projected onto the projection surface SCR.

[0039] Hereinafter, the state of the optical path shift element 80 that causes the light emitted from the pixel PXij of the liquid crystal panel 10 to reach the first position A on the projection surface SCR is also referred to as the first state Ast. Also, the state of the optical path shift element 80 that causes the light emitted from the pixel PXij to reach the second position B on the projection surface SCR is also referred to as the second state Bst, and the state of the optical path shift element 80 that causes the light emitted from the pixel PXij to reach the third position C on the projection surface SCR is also referred to as the third state Cst. Also, the state of the optical path shift element 80 that causes the light emitted from the pixel PXij to reach the fourth position D on the projection surface SCR is also referred to as the fourth state Dst.

[0040] Note that the first position A on the projection plane SCR is a position shifted by 1 / 2 pixel pitch in the +Y direction from the fourth position D. The 1 / 2 pixel pitch corresponds to, for example, the distance between the center of one pixel PXS and the center of another pixel PXS adjacent to each other among two adjacent pixels PXS in the image projected onto the projection plane SCR during one field period FL. For example, the second position B is a position shifted by 1 / 2 pixel pitch in the +X direction from the first position A on the projection plane SCR, the third position C is a position shifted by 1 / 2 pixel pitch in the -Y direction from the second position B, and the fourth position D is a position shifted by 1 / 2 pixel pitch in the -X direction from the third position C.

[0041] In the pixel shift shown in FIG. 3, the optical path shift element 80 is controlled so that the position on the projection plane SCR where the light emitted from the pixel PXij of the liquid crystal panel 10 arrives shifts to the first position A, the second position B, the third position C, and the fourth position D during one frame period FM. For example, the optical path shift element 80 is controlled so that its state becomes the first state Ast, the second state Bst, the third state Cst, and the fourth state Dst during the field periods FL1, FL2, FL3, and FDL4, respectively.

[0042] During the field period FL1, the light corresponding to the pixel PIa of the input image is emitted from the pixel PXij of the liquid crystal panel 10. Then, the light emitted from the pixel PXij of the liquid crystal panel 10 passes through the optical path shift element 80 in the first state Ast and reaches the first position A on the projection plane SCR.

[0043] Also, during the field period FL2, the light corresponding to the pixel PIb of the input image is emitted from the pixel PXij of the liquid crystal panel 10. Then, the light emitted from the pixel PXij of the liquid crystal panel 10 passes through the optical path shift element 80 in the second state Bst and reaches the second position B on the projection plane SCR.

[0044] Also, in the field period FL3, light corresponding to the pixel PIc of the input image is emitted from the pixel PXij of the liquid crystal panel 10. Then, the light emitted from the pixel PXij of the liquid crystal panel 10 passes through the optical path shift element 80 in the third state Cst and reaches the third position C on the projection surface SCR.

[0045] Also, in the field period FL4, light corresponding to the pixel PId of the input image is emitted from the pixel PXij of the liquid crystal panel 10. Then, the light emitted from the pixel PXij of the liquid crystal panel 10 passes through the optical path shift element 80 in the fourth state Dst and reaches the fourth position D on the projection surface SCR.

[0046] In this way, the resolution of the image projected onto the projection surface SCR is pseudo-increased by pixel shift. For example, the pixels PXS displayed at the first position A and the second position B on the projection surface SCR respectively correspond to the two pixels PIa and PIb in the "2*j - 1" column and the "2*j" column of the "2*i - 1" row in the input image. Also, the pixels displayed at the fourth position D and the third position C on the projection surface SCR respectively correspond to the two pixels PId and PIc in the "2*j - 1" column and the "2*j" column of the "2*i" row in the input image.

[0047] Note that the order and position in which the light emitted from the pixel PX of the liquid crystal panel 10 shifts on the projection surface SCR are not limited to the example shown in FIG. 3. Next, with reference to FIG. 4, the configuration of the control system of the projector 1 will be described.

[0048] FIG. 4 is a block diagram showing a configuration example of the control system of the projector 1 shown in FIG. 1. The projector 1 has a control circuit 100 in addition to the elements shown in FIG. 1.

[0049] The control circuit 100 controls, for example, the liquid crystal panels 10R, 10G, and 10B and the optical path shift element 80. For example, based on an input image signal DIH supplied to the control circuit 100 from a host device or the like (not shown), the control circuit 100 generates output image signals VIr, VIg, and VIb for driving the liquid crystal panels 10R, 10G, and 10B. In FIG. 4, in order to distinguish the output image signals VI supplied to the liquid crystal panels 10R, 10G, and 10B, lowercase alphabet letters "r", "g", and "b" are respectively appended to the end of the symbols of the output image signals VI. Further, the control circuit 100 generates a control signal for driving the optical path shift element 80 based on the input image signal DIH.

[0050] For example, the control circuit 100 includes an image processing circuit 110 including a conversion circuit 120 and an adjustment circuit 130, a timing control circuit 140, and an optical path shift element drive circuit 150.

[0051] The image processing circuit 110 generates, for example, output image signals VIr, VIg, and VIb for driving the liquid crystal panels 10R, 10G, and 10B based on the input image signal DIH in each of a plurality of field periods FL included in one frame period FM. For example, the output image signal VIr for driving the liquid crystal panel 10R is generated corresponding to a plurality of pixels PX of the liquid crystal panel 10R and is supplied to the plurality of pixels PX in a predetermined order. Further, the output image signal VIg for driving the liquid crystal panel 10G is generated corresponding to a plurality of pixels PX of the liquid crystal panel 10G and is supplied to the plurality of pixels PX in a predetermined order. Further, the output image signal VIb for driving the liquid crystal panel 10B is generated corresponding to a plurality of pixels PX of the liquid crystal panel 10B and is supplied to the plurality of pixels PX in a predetermined order.

[0052] In this way, in each of the plurality of field periods FL within one frame period FM, the image processing circuit 110 supplies the output image signal VI, which is generated based on the input image signal DIH and corresponds to the plurality of pixels PX, to the plurality of pixels PX of the liquid crystal panel 10 in a predetermined order. Note that the predetermined order is, for example, the order in which the scanning lines SLN are selected. Also, the output image signal VI is an example of an "image signal".

[0053] The conversion circuit 120 accumulates, for example, the input image signal DIH and outputs the accumulated input image signal DIH to the adjustment circuit 130. The adjustment circuit 130 adjusts the response speed of the plurality of pixels PX when switching the image projected from the liquid crystal panel 10 based on the order in which the output image signal VI is supplied or the positions of the pixels PX in the liquid crystal panel 10. Although details will be described later with reference to FIG. 6, the response speed of the plurality of pixels PX is adjusted by adjusting the gradation value of the output image signal VI.

[0054] The timing control circuit 140 generates a control signal CTL1 for controlling the optical path shift element drive circuit 150 based on the input image signal DIH. For example, the timing control circuit 140 time-divisionally divides one frame period FM into a plurality of field periods FL. Then, the timing control circuit 140 supplies the control signal CTL1 for controlling the state of the optical path shift element 80 for each field period FL to the optical path shift element drive circuit 150. In this way, the control signal CTL1 is a signal for controlling the state of the optical path shift element 80. Therefore, the control signal CTL1 is also a signal for controlling the projection position of the light emitted from the optical path shift element 80.

[0055] Also, the timing control circuit 140 generates a control signal CTL2 for controlling the adjustment circuit 130 based on the input image signal DIH. Since the control signals CTL1 and CTL2 are generated based on the input image signal DIH, for example, the adjustment circuit 130 can output the output image signals VIr, VIg, and VIb in synchronization with the change in the state of the optical path shift element 80 due to pixel shift.

[0056] Further, the timing control circuit 140 generates control signals CTL3r, CTL3g, and CTL3b such as a clock signal for supplying the output image signal VI to each pixel electrode ELa of the liquid crystal panels 10R, 10G, and 10B. Then, the timing control circuit 140 supplies the control signals CTL3r, CTL3g, and CTL3b to the liquid crystal panels 10R, 10G, and 10B, respectively. In FIG. 4, in order to distinguish the control signals CTL3 supplied to the liquid crystal panels 10R, 10G, and 10B, small letters "r", "g", and "b" are respectively appended to the end of the reference signs of the control signals CTL3.

[0057] The optical path shift element drive circuit 150 drives the optical path shift element 80 based on the control signal CTL1 supplied from the timing control circuit 140. For example, the optical path shift element drive circuit 150 changes the state of the optical path shift element 80 in synchronization with the field period FL in the order of the first state Ast, the second state Bst, the third state Cst, and the fourth state Dst based on the control signal CTL1.

[0058] Next, with reference to FIG. 5, the detailed configuration of the image processing circuit 110 will be described.

[0059] FIG. 5 is a block diagram showing a configuration example of the image processing circuit 110 shown in FIG. 4. The image processing circuit 110 includes a conversion circuit 120 and an adjustment circuit 130. The adjustment circuit 130 includes, for example, an adjustment circuit 130r that supplies the output image signal VIr to the liquid crystal panel 10R, an adjustment circuit 130g that supplies the output image signal VIg to the liquid crystal panel 10G, and an adjustment circuit 130b that supplies the output image signal VIb to the liquid crystal panel 10B. In FIG. 5, the adjustment circuit 130r will be described, but the adjustment circuits 130g and 130b are configured in the same manner as the adjustment circuit 130r. Also, the operation of the conversion circuit 120 with respect to the adjustment circuit 130 will be described by taking the operation of the conversion circuit 120 with respect to the adjustment circuit 130r as an example.

[0060] The conversion circuit 120 converts the input image signal DIH into the image signal DIL. For example, the input image signal DIH is an image signal indicating an input image with "2*m" pixels in the vertical direction and "2*n" pixels in the horizontal direction. Note that m and n are integers of 2 or more as described in FIG. 2 and the like. The image signal DIL is an image signal indicating an image with m pixels in the vertical direction and n pixels in the horizontal direction. Each of the input image signal DIH and the image signal DIL includes image signals of red, green, and blue components. In FIG. 5, in order to distinguish the image signal DIL supplied to the adjustment circuits 130r, 130g, and 130b, lowercase alphabet letters "r", "g", and "b" are respectively attached to the end of the symbol of the image signal DIL.

[0061] The conversion circuit 120 has, for example, a first frame memory 122 that stores the input image signal DIH for one frame. For example, the conversion circuit 120 uses the first frame memory 122 to generate the image signal DIL.

[0062] For example, the conversion circuit 120 reads out from the first frame memory 122 the input image signal DIH corresponding to the pixels PI in the odd rows and odd columns of the input image. Then, among the input image signals DIH read out from the first frame memory 122, the input image signal DIH of the red component is supplied to the adjustment circuit 130r as the image signal DILr in the field period FL1. Note that among the input image signals DIH read out from the first frame memory 122, the input image signal DIH of the green component is supplied to the adjustment circuit 130g as the image signal DILg in the field period FL1. Also, among the input image signals DIH read out from the first frame memory 122, the input image signal DIH of the blue component is supplied to the adjustment circuit 130b as the image signal DILb in the field period FL1.

[0063] The image signals DILr, DILg, and DILb for each of the field periods FL2, FL3, and FL4 are also supplied to the adjustment circuits 130r, 130g, and 130b, respectively, in the same manner as the image signals DILr, DILg, and DILb for the field period FL1. For example, the conversion circuit 120 reads out the input image signal DIH corresponding to the pixels PI of the odd rows and even columns of the input image as the image signals DILr, DILg, and DILb for the field period FL2 from the first frame memory 122. Further, the conversion circuit 120 reads out the input image signal DIH corresponding to the pixels PI of the even rows and even columns of the input image as the image signals DILr, DILg, and DILb for the field period FL3 from the first frame memory 122. Further, the conversion circuit 120 reads out the input image signal DIH corresponding to the pixels PI of the even rows and odd columns of the input image as the image signals DILr, DILg, and DILb for the field period FL4 from the first frame memory 122.

[0064] The adjustment circuit 130r includes a second frame memory 132, a look-up table 134, and a correction circuit 136. The storage capacity of the second frame memory 132 is smaller than the storage capacity of the storage area in the first frame memory 122 of the conversion circuit 120 where the input image signal DIH of the red component is stored. For example, the storage capacity of the second frame memory 132 of the adjustment circuit 130r is 1 / 4 of the storage capacity of the storage area in the first frame memory 122 of the conversion circuit 120 where the input image signal DIH of the red component is stored. Note that the second frame memory 132 of the adjustment circuit 130r only needs to have a storage capacity for storing the image signal DILr for at least one screen of the liquid crystal panel 10R.

[0065] The look-up table 134 is supplied with the image signal DILr read from the first frame memory 122 and the image signal DILD read from the second frame memory 132. The image signal DILD is the past image signal DILr one field period FL before the image signal DILr read from the first frame memory 122.

[0066] The lookup table 134 is a two-dimensional lookup table that stores in advance data Dod for overdrive corresponding to, for example, the gradation level indicated by the image signal DILr and the gradation level indicated by the image signal DILD. The value of the data Dod is determined in advance, for example, in consideration of the response characteristics of the liquid crystal element LCE.

[0067] For example, when the gradation level indicated by the image signal DILr is greater than the gradation level indicated by the image signal DILD, data Dod indicating a positive value is output from the lookup table 134. When the gradation level indicated by the image signal DILr is less than the gradation level indicated by the image signal DILD, data Dod indicating a negative value is output from the lookup table 134. When the gradation level indicated by the image signal DILr is the same as the gradation level indicated by the image signal DILD, data Dod indicating zero is output from the lookup table 134.

[0068] The data Dod output from the lookup table 134 is supplied to the correction circuit 136. Note that the data Dod is an example of "the compensation amount determined by the overdrive process". Also, the data Dml described later is an example of "the compensation amount used for generating the image signal".

[0069] The correction circuit 136 includes a multiplier 136a, an adder 136b, and a DAC 136c. Note that DAC is an abbreviation for Digital Analog Converter. The multiplier 136a multiplies the data Dod output from the lookup table 134 by a coefficient Ki and outputs the multiplication result to the adder 136b as correction data Dml. The coefficient Ki is, for example, a coefficient used for generating the output image signal VIr supplied to the pixel PX connected to the scanning line SLNi in the i-th row, and is set to a positive value. i is an integer from 1 to m or less. Also, hereinafter, unless otherwise specified, it is assumed that m is an even number of 4 or more.

[0070] For example, when i is greater than or equal to 1 and less than or equal to "m / 2 - α", the coefficient Ki is set to a value greater than 0 and less than 1. When i is greater than "m / 2 - α" and less than "m / 2 + β", the coefficient Ki is set to 1. Here, α is an integer greater than or equal to 0 and less than "m / 2", and β is an integer greater than or equal to 1 and less than or equal to "m / 2". Then, when i is greater than or equal to "m / 2 + β" and less than or equal to m, the coefficient Ki is set to a value greater than 1 and less than a predetermined value. The predetermined value is not particularly limited, and for example, it may be 2. When α is 0 and β is 1, the condition of being greater than "m / 2 - α" and less than "m / 2 + β" does not hold, so there is no coefficient Ki set to 1.

[0071] In this way, the coefficient Ki used for generating the output image signal VIr supplied to the pixel PX connected to the scanning line SLNi from the first line to the "m / 2 - α" - th line is set to a value greater than 0 and less than 1. Also, the coefficient Ki used for generating the output image signal VIr supplied to the pixel PX connected to the scanning line SLNi from the "m / 2 + β" - th line to the "m" - th line is set to a value greater than 1 and less than a predetermined value. Hereinafter, the pixel PX connected to the scanning line SLNi from the first line to the "m / 2 - α" - th line is also referred to as the upper pixel PX, and the pixel PX connected to the scanning line SLNi from the "m / 2 + β" - th line to the "m" - th line is also referred to as the lower pixel PX.

[0072] For example, in the range where i is greater than or equal to 1 and less than or equal to "m / 2 - α", the value of the coefficient Ki when i is large is less than or equal to the value of the coefficient Ki when i is small. Also, in the range where i is greater than or equal to "m / 2 + β" and less than or equal to m, the value of the coefficient Ki when i is large is greater than or equal to the value of the coefficient Ki when i is small. In the range where i is greater than or equal to 1 and less than or equal to "m / 2 - α", all the coefficients Ki may have different values from each other, or at least some of the coefficients Ki may have the same value as each other. For example, the coefficient Ki when i is 1 and the coefficient Ki when i is 2 may be a common value greater than 0 and less than 1. Similarly, in the range where i is greater than or equal to "m / 2 + β" and less than or equal to m, all the coefficients Ki may have different values from each other, or at least some of the coefficients Ki may have the same value as each other.

[0073] When the coefficient Ki is set as in the above example, the data Dml used for generating the output image signal VIr supplied to the upper pixel PX is smaller than the data Dod. Also, the data Dml used for generating the output image signal VIr supplied to the lower pixel PX is larger than the data Dod.

[0074] That is, the correction circuit 136 makes the data Dml used for generating the output image signal VIr supplied to the upper pixel PX smaller than the data Dod determined by the overdrive process. Also, the correction circuit 136 makes the data Dml used for generating the output image signal VIr supplied to the lower pixel PX larger than the data Dod determined by the overdrive process.

[0075] Here, in the present embodiment, since the scanning lines SLN are selected in the order of the 1st, 2nd, …, m-th rows, the output image signal VIr is supplied to the plurality of pixels PX in the order of the 1st, 2nd, …, m-th rows. Therefore, the order of the 1st, 2nd, …, m-th rows corresponds to the “predetermined order”. That is, the output image signal VIr is supplied to the upper pixel PX in the first half of the predetermined order, and the output image signal VIr is supplied to the lower pixel PX in the second half of the predetermined order. Therefore, the upper pixel PX is an example of the “first pixel”, and the lower pixel PX is an example of the “second pixel”. Also, the “first pixel” is an example of the pixel PX to which the output image signal VIr is supplied in the first half of the predetermined order, and the “second pixel” is an example of the pixel PX to which the output image signal VIr is supplied in the second half of the predetermined order.

[0076] The adder 136b adds the data Dml to the image signal DILr and outputs the addition result as the image data DI to the DAC 136c. Note that since the data Dod can take a negative value, the data Dml can also take a negative value. For this reason, the substantial operation content in the adder 136b includes not only addition but also subtraction.

[0077] The DAC 136c converts the image data DI into an analog output image signal VIr. In this embodiment, it is assumed that the information indicating the polarities of the output image signals VIr, VIg, and VIb is included in the control signal CTL2. In this case, the DAC 136c converts the image data DI into an analog output image signal VIr with the polarity specified by the control signal CTL2.

[0078] In this way, the adjustment circuit 130r adds a correction amount corresponding to the change from the gradation level before one field period FL and the position of the pixel PX to the image signal DILr, converts the addition result into an analog signal, and outputs the conversion result as the output image signal VIr to the liquid crystal panel 100R. The adjustment circuits 130g and 130b operate in the same manner as the adjustment circuit 130r.

[0079] For example, the adjustment circuit 130g adds a correction amount corresponding to the change from the gradation level before one field period FL and the position of the pixel PX to the image signal DILg, converts the addition result into an analog signal, and outputs the conversion result as the output image signal VIg to the liquid crystal panel 100G. Also, the adjustment circuit 130b adds a correction amount corresponding to the change from the gradation level before one field period FL and the position of the pixel PX to the image signal DILb, converts the addition result into an analog signal, and outputs the conversion result as the output image signal VIb to the liquid crystal panel 100B.

[0080] Note that the configuration of the control circuit 100 is not limited to the examples shown in FIGS. 4 and 5. For example, the look-up tables 134 of the adjustment circuit 130r, the look-up tables 134 of the adjustment circuit 130g, and the look-up tables 134 of the adjustment circuit 130b may be shared among the adjustment circuits 130r, 130g, and 130b. Also, for example, the adjustment circuit 130 may obtain the data Dod for overdrive by calculation without using the look-up table 134.

[0081] In addition, in this embodiment, it is assumed that the timing control circuit 140 shown in FIG. 4 executes various controls based on the input image signal DIH. However, the timing control circuit 140 may execute various controls based on the image signal DIL output from the conversion circuit 120.

[0082] Next, the operation of the control circuit 100 will be described with reference to FIG. 6.

[0083] FIG. 6 is a diagram for explaining the operation of the control circuit 100 shown in FIG. 4. Note that FIG. 6 shows an example of the relationship among the selection transition of the scanning lines SLN, the liquid crystal response, and the state transition of the optical path shift element 80, with the horizontal axis representing the elapsed time.

[0084] In this embodiment, in each of the plurality of field periods FL1, FL2, FL3, and FL4, scanning for selecting a plurality of pixels PX in the order of the 1st, 2nd,..., m-th rows is performed twice. For example, the period T1 of each field period FL is the period in which the first scanning is performed. The period T2 is a period following the period T1 and is the period in which the second scanning is performed. Also, in this embodiment, the polarity of the output image signal VI supplied to the pixel PX by the second scanning is inverted from the polarity of the output image signal VI supplied to the pixel PX by the first scanning. The period T1 is an example of the "first period", and the period T2 is an example of the "second period".

[0085] As shown by the black-filled rectangles in the diagram of the selection transition of the scanning lines SLN, the scanning lines SLN are exclusively selected one by one in the order of the 1st, 2nd,..., m-th rows. The output image signal VI is supplied to the pixel PX connected to the scanning line SLN selected by the scanning line driving circuit 14 via the data line DLN. That is, a voltage corresponding to the output image signal VI is applied to the pixel electrode ELa of the pixel PX connected to the scanning line SLN selected by the scanning line driving circuit 14. Thereby, the liquid crystal element LCE of the pixel PX changes to a transmittance corresponding to the voltage of the output image signal VI.

[0086] In FIG. 6, as the liquid crystal response, the change in the transmittance of the liquid crystal element LCE in response to the change in the applied voltage of the liquid crystal element LCE is shown. The applied voltage of the liquid crystal element LCE is the voltage between the pixel electrode ELa and the counter electrode ELb. For example, in the liquid crystal response shown in FIG. 6, the waveform of the broken line indicates the applied voltage of the liquid crystal element LCE, and the waveform of the solid line indicates the transmittance of the liquid crystal element LCE.

[0087] In FIG. 6, for the sake of easy understanding of the explanation, it is assumed that in the field periods FL1 and FL3, the target gradation value of all the pixels PX is the gradation value G2, and in the field periods FL2 and FL4, the target gradation value of all the pixels PX is the gradation value G1. The gradation value G2 is smaller than the gradation value G1. Note that the target gradation value is the gradation value determined based on the input image signal DIH and is the gradation value indicated by the image signal DIL before being corrected by the correction circuit 136.

[0088] In the figure of the liquid crystal response, when paying attention to the applied voltage, the symbols G1 and G2 respectively indicate the voltage corresponding to the gradation value G1 and the voltage corresponding to the gradation value G2. Also, when paying attention to the transmittance, the symbols G1 and G2 respectively indicate the transmittance corresponding to the gradation value G1 and the transmittance corresponding to the gradation value G2. In FIG. 6, the liquid crystal responses of the liquid crystal elements LCE located at the first row, the “m / 2”-th row, and the m-th row are shown. The coefficient Ki corresponding to the pixel PX in the first row is set to a value greater than 0 and less than 1, and the coefficient Ki corresponding to the pixel PX in the m-th row is set to a value greater than 1 and less than a predetermined value. Note that in FIG. 6, the coefficient Ki corresponding to the pixel PX in the m-th row is set to 1.

[0089] For example, at time T100, by the first scan of the field period FL1, the pixels PX in the first row are selected, and an output image signal VI with a voltage smaller than the voltage corresponding to the target gradation value G2 is supplied to the pixels PX in the first row. That is, an output image signal VI corrected so that the response speed of the pixel PX is slower than when the voltage corresponding to the gradation value G2 is supplied to the pixel PX is supplied to the pixels PX in the first row. Since an output image signal VI with a voltage larger than the output image signal VI of the field period FL (not shown) before time T100 is supplied to the pixels PX in the first row, the transmittance of the liquid crystal elements LCE of the pixels PX in the first row rises gently compared to the change in the applied voltage. Also, at time T100, the optical path shift element 80 starts to transition from the fourth state Dst to the first state Ast.

[0090] Then, at time T120, by the first scan, the pixels PX in the "m / 2"-th row are selected, and an output image signal VI with a voltage corresponding to the target gradation value G2 is supplied to the pixels PX in the "m / 2"-th row. Since an output image signal VI with a voltage larger than the output image signal VI of the field period FL (not shown) before time T100 is supplied to the pixels PX in the "m / 2"-th row, the transmittance of the liquid crystal elements LCE of the pixels PX in the "m / 2"-th row rises gently compared to the change in the applied voltage. Note that at time T120, the optical path shift element 80 is in the middle of a state transition.

[0091] At time T140, by the first scan, the pixels PX in the m-th row are selected, and an output image signal VI with a voltage larger than the voltage corresponding to the target gradation value G2 is supplied to the pixels PX in the m-th row. That is, an output image signal VI corrected so that the response speed of the pixel PX is faster than when the voltage corresponding to the gradation value G2 is supplied to the pixel PX is supplied to the pixels PX in the m-th row. Since an output image signal VI with a voltage larger than the output image signal VI of the field period FL (not shown) before time T100 is supplied to the pixels PX in the m-th row, the transmittance of the liquid crystal elements LCE of the pixels PX in the m-th row rises gently compared to the change in the applied voltage.

[0092] Note that at time T140, the optical path shift element 80 is in the middle of a state transition. Also, the transmittance of the liquid crystal element LCE of the pixel PX in the first row has increased to a transmittance that can be regarded as the same as the transmittance corresponding to the output image signal VI. Note that the transmittance of the liquid crystal element LCE of the pixel PX in the "m / 2"-th row has not yet reached a transmittance that can be regarded as the same as the transmittance corresponding to the output image signal VI.

[0093] During the period T2 from time T150 to time T200, the second scan of the field period FL1 is performed. For example, at time T150, by the second scan, the pixel PX in the first row is selected, and the output image signal VI with the polarity inverted from the polarity of the output image signal VI in the first scan is supplied to the pixel PX in the first row. Note that the magnitude of the voltage of the output image signal VI supplied to the pixel PX in the first row by the second scan is the same as the magnitude of the voltage of the output image signal VI supplied to the pixel PX in the first row by the first scan. Therefore, the transmittance of the liquid crystal element LCE of the pixel PX in the first row increases, for example, until it reaches the transmittance corresponding to the output image signal VI. Also, at time T150, the optical path shift element 80 finishes the transition from the fourth state Dst to the first state Ast. That is, at time T150, the state of the optical path shift element 80 becomes the first state Ast. The state of the optical path shift element 80 is maintained in the first state Ast until time T200.

[0094] During the period from time T150 to time T200 when the state of the optical path shift element 80 is maintained in the first state Ast, the transmittance of the liquid crystal element LCE of the pixel PX in the first row is maintained at a transmittance that can be regarded as the same as the transmittance corresponding to the output image signal VI. That is, the transmittance of the liquid crystal element LCE of the pixel PX in the first row is maintained at a transmittance lower than the transmittance corresponding to the target gradation value G2.

[0095] In addition, the transmittance of the liquid crystal element LCE of the pixel PX in the "m / 2"-th row reaches a transmittance that can be regarded as the same as the transmittance corresponding to the output image signal VI in the vicinity of the midpoint between time T150 and time T200. That is, the transmittance of the liquid crystal element LCE of the pixel PX in the "m / 2"-th row reaches a transmittance that can be regarded as the same as the transmittance corresponding to the target gradation value G2 in the vicinity of the midpoint between time T150 and time T200.

[0096] In addition, the transmittance of the liquid crystal element LCE of the pixel PX in the m-th row does not reach a transmittance that can be regarded as the same as the transmittance corresponding to the output image signal VI even near time T200. However, the voltage of the output image signal VI supplied to the pixel PX in the m-th row is larger than the voltage corresponding to the target gradation value G2. Therefore, near time T200, the transmittance of the liquid crystal element LCE of the pixel PX in the m-th row reaches a transmittance that can be regarded as the same as the transmittance corresponding to the target gradation value G2.

[0097] As described above, in the present embodiment, the average value of the transmittances of the respective pixels PX during the period in which the state of the optical path shift element 80 is maintained in the first state Ast is distributed at a transmittance lower than the transmittance corresponding to the target gradation value G2.

[0098] Here, as a comparative example of the present embodiment, the liquid crystal response in a form in which the multiplier 136a shown in FIG. 5 is omitted will be briefly described. In the comparative example, since the multiplier 136a is omitted, the data Dod determined by the overdrive process is added to the image signal DIL without being corrected. Therefore, during the period in which the state of the optical path shift element 80 is maintained in the first state Ast, the transmittance of the liquid crystal element LCE of the pixel PX in the first row is maintained at a transmittance that can be regarded as the same as the transmittance corresponding to the target gradation value G2. Therefore, in the comparative example, compared with the present embodiment, the average value of the transmittances of the respective pixels PX in the first row during the period in which the state of the optical path shift element 80 is maintained in the first state Ast is higher.

[0099] Also, in the proportional ratio, the voltage of the output image signal VI supplied to the pixel PX in the m-th row is the voltage corresponding to the target gradation value G2. Therefore, the transmittance corresponding to the output image signal VI is the transmittance corresponding to the target gradation value G2. Thus, in the proportional ratio, the transmittance of the liquid crystal element LCE of the pixel PX in the m-th row does not reach a transmittance that can be regarded as the same as the transmittance corresponding to the target gradation value G2 even near the time T200. Further, in the proportional ratio, since the voltage of the output image signal VI supplied to the pixel PX in the m-th row is smaller than that in the present embodiment, the increase in transmittance becomes gentle. Therefore, in the proportional ratio, the average value of the transmittance of each pixel PX in the m-th row during the period in which the state of the optical path shift element 80 is maintained in the first state Ast is lower than that in the present embodiment.

[0100] Thus, in the proportional ratio, the average value of the transmittance of each pixel PX in the first row is higher than that in the present embodiment, and the average value of the transmittance of each pixel PX in the m-th row is lower than that in the present embodiment. That is, in the proportional ratio, compared with the present embodiment, the difference between the average value of the transmittance of each pixel PX in the first row and the average value of the transmittance of each pixel PX in the m-th row during the period in which the state of the optical path shift element 80 is maintained in the first state Ast becomes larger. In other words, in the present embodiment, compared with the proportional ratio, the difference between the average value of the transmittance of each pixel PX in the first row and the average value of the transmittance of each pixel PX in the m-th row during the period in which the state of the optical path shift element 80 is maintained in the first state Ast can be reduced. That is, in the present embodiment, compared with the proportional ratio, the variation in the difference between the actual transmittance of the pixel PX and the target transmittance during the period in which the state of the optical path shift element 80 is maintained in the first state Ast can be reduced. Thereby, in the present embodiment, it is possible to suppress a decrease in the quality of the image visually recognized by the user.

[0101] Return to FIG. 6. For example, at time T200, by the first scan of the field period FL2, the pixel PX in the first row is selected, and the output image signal VI having a voltage larger than the voltage corresponding to the target gradation value G1 is supplied to the pixel PX in the first row. Thus, in the present embodiment, the output image signal VI is supplied to the pixel PX in the first row so that the change in the applied voltage of the liquid crystal element LCE becomes smaller than the case where the voltage corresponding to the target gradation value G1 is supplied to the pixel PX in the first row. That is, the output image signal VI corrected so that the response speed of the pixel PX becomes slower than the case where the voltage corresponding to the gradation value G1 is supplied to the pixel PX is supplied to the pixel PX in the first row.

[0102] Since the output image signal VI having a voltage smaller than the output image signal VI in the field period FL1 is supplied to the pixel PX in the first row, the transmittance of the liquid crystal element LCE of the pixel PX in the first row gradually decreases. At time T200, the optical path shift element 80 starts to transition from the first state Ast to the second state Bst.

[0103] Then, at time T220, by the first scan, the pixel PX in the "m / 2"-th row is selected, and the output image signal VI having a voltage corresponding to the target gradation value G1 is supplied to the pixel PX in the "m / 2"-th row. Since the output image signal VI having a voltage smaller than the output image signal VI in the field period FL1 is supplied to the pixel PX in the "m / 2"-th row, the transmittance of the liquid crystal element LCE of the pixel PX in the "m / 2"-th row gradually decreases compared to the change in the applied voltage. At time T220, the optical path shift element 80 is in the middle of the state transition.

[0104] At time T240, by the first scan, the pixel PX in the m-th row is selected, and an output image signal VI with a voltage smaller than the voltage corresponding to the target gradation value G1 is supplied to the pixel PX in the m-th row. Thus, in the present embodiment, the output image signal VI is supplied to the pixel PX in the m-th row so that the change in the applied voltage of the liquid crystal element LCE becomes larger than when the voltage corresponding to the target gradation value G1 is supplied to the pixel PX in the m-th row. That is, an output image signal VI corrected so that the response speed of the pixel PX becomes faster than when the voltage corresponding to the gradation value G1 is supplied to the pixel PX is supplied to the pixel PX in the m-th row.

[0105] Since an output image signal VI with a voltage smaller than the output image signal VI in the field period FL1 is supplied to the pixel PX in the m-th row, the transmittance of the liquid crystal element LCE of the pixel PX in the m-th row gradually decreases compared to the change in the applied voltage. Note that at time T240, the optical path shift element 80 is in a state of transition. Also, the transmittance of the liquid crystal element LCE of the pixel PX in the first row has decreased to a transmittance that can be regarded as the same as the transmittance corresponding to the output image signal VI. Note that the transmittance of the liquid crystal element LCE of the pixel PX in the "m / 2"-th row has not yet reached a transmittance that can be regarded as the same as the transmittance corresponding to the output image signal VI.

[0106] During period T2 from time T250 to time T300, the second scan of the field period FL2 is performed. For example, at time T250, by the second scan, the pixel PX in the first row is selected, and the output image signal VI with the polarity inverted from the polarity of the output image signal VI in the first scan is supplied to the pixel PX in the first row. Note that the magnitude of the voltage of the output image signal VI supplied to the pixel PX in the first row by the second scan is the same as the magnitude of the voltage of the output image signal VI supplied to the pixel PX in the first row by the first scan. Therefore, the transmittance of the liquid crystal element LCE of the pixel PX in the first row decreases, for example, until it reaches the transmittance corresponding to the output image signal VI. Also, at time T250, the optical path shift element 80 finishes the transition from the first state Ast to the second state Bst. That is, at time T250, the state of the optical path shift element 80 becomes the second state Bst. The state of the optical path shift element 80 is maintained in the second state Bst until time T300.

[0107] During the period from time T250 to time T300 when the state of the optical path shift element 80 is maintained in the second state Bst, the transmittance of the liquid crystal element LCE of the pixel PX in the first row is maintained at a transmittance comparable to the transmittance corresponding to the output image signal VI. That is, the transmittance of the liquid crystal element LCE of the pixel PX in the first row is maintained at a transmittance higher than the transmittance corresponding to the target gradation value G1.

[0108] Also, the transmittance of the liquid crystal element LCE of the pixel PX in the "m / 2"-th row reaches a transmittance comparable to the transmittance corresponding to the output image signal VI near the middle between time T250 and time T300. That is, the transmittance of the liquid crystal element LCE of the pixel PX in the "m / 2"-th row reaches a transmittance comparable to the transmittance corresponding to the target gradation value G1 near the middle between time T250 and time T300.

[0109] Also, the transmittance of the liquid crystal element LCE of the pixel PX in the m-th row does not reach a transmittance that can be regarded as the same as the transmittance corresponding to the output image signal VI, even near time T300. However, the voltage of the output image signal VI supplied to the pixel PX in the m-th row is smaller than the voltage corresponding to the target gradation value G1. Therefore, near time T300, the transmittance of the liquid crystal element LCE of the pixel PX in the m-th row reaches a transmittance that can be regarded as the same as the transmittance corresponding to the target gradation value G1.

[0110] Thus, in this embodiment, the average value of the transmittance of each pixel PX during the period when the state of the optical path shift element 80 is maintained in the second state Bst is distributed at a transmittance higher than the transmittance corresponding to the target gradation value G1. As a result, similar to the period when the state of the optical path shift element 80 is maintained in the second state Bst, the difference between the average value of the transmittance of each pixel PX in the first row and the average value of the transmittance of each pixel PX in the m-th row becomes smaller. Therefore, even during the period when the state of the optical path shift element 80 is maintained in the second state Bst, it is possible to suppress a decrease in the quality of the image visually recognized by the user.

[0111] The operation of the field period FL3 is the same as the operation of the field period FL1, except that the state of the optical path shift element 80 transitions from the second state Bst to the third state Cst. Also, the operation of the field period FL4 is the same as the operation of the field period FL2, except that the state of the optical path shift element 80 transitions from the third state Cst to the fourth state Dst.

[0112] Thus, the gradation value of the output image signal VI supplied to the pixel PX in the first row during the field period FL2 is corrected by the adjustment circuit 130 so that the difference from the gradation value of the output image signal VI supplied to the pixel PX in the first row during the field period FL1 becomes smaller. Also, the gradation value of the output image signal VI supplied to the pixel PX in the m-th row during the field period FL2 is corrected by the adjustment circuit 130 so that the difference from the gradation value of the output image signal VI supplied to the pixel PX in the m-th row during the field period FL1 becomes larger.

[0113] Note that the operation of the control circuit 100 is not limited to the example shown in FIG. 6. For example, the timing at which the state transition of the optical path shift element 80 starts is preferably the same timing as the timing at which the first scan line SLN of the first row is selected by the first scan in each field period FL, but is not particularly limited. Also, the timing at which the state transition of the optical path shift element 80 ends is preferably after the timing at which the scan line SLN of the m-th row is selected by the first scan in each field period FL, but is not particularly limited. Note that, in each field period FL, the period from the start of the holding period during which the state of the optical path shift element 80 is maintained in the first state Ast or the like to the selection of the first scan line SLN of the first row in the next field period FL is preferably at least half of the holding period.

[0114] As described above, in this embodiment, the projector 1 includes a liquid crystal panel 10 in which a plurality of pixels PX are arranged and an image is displayed by emitting light from the plurality of pixels PX, an optical path shift element 80 that changes the optical path of the light emitted from the plurality of pixels PX, and an image processing circuit 110. The image processing circuit 110 supplies the output image signal VI corresponding to the plurality of pixels PX to the plurality of pixels PX in a predetermined order in each of the plurality of field periods FL included in one frame period FM for displaying the input image indicated by the input image signal DIH. The output image signal VI corresponding to the plurality of pixels PX is generated based on the input image signal DIH. The image processing circuit 110 also includes an adjustment circuit 1300 that adjusts the response speed of the plurality of pixels PX when the image displayed on the liquid crystal panel 10 is switched, based on the order in which the output image signal VI is supplied or the positions of the pixels PX in the liquid crystal panel 10.

[0115] Thus, in this embodiment, the response speeds of a plurality of pixels PX can be adjusted based on the order in which the output image signal VI is supplied or the positions of the pixels PX in the liquid crystal panel 10. Thereby, in this embodiment, for example, when the output image signal VI is supplied to the pixels PX in one row and then to the pixels PX in another row, the response speed of the pixels PX in one row can be slowed down, and the response speed of the pixels PX in the other row can be increased. Therefore, in this embodiment, for example, it is possible to suppress an increase in the variation of the difference between the actual transmittance and the target transmittance of the pixels PX during a period when the state of the optical path shift element 80 does not change. As a result, in this embodiment, it is possible to suppress a decrease in the quality of the image visually recognized by the user.

[0116] Further, in this embodiment, the plurality of pixels PX include upper pixels PX to which the output image signal VI is supplied in the first half of a predetermined order and lower pixels PX to which the output image signal VI is supplied in the second half of the predetermined order. The adjustment circuit 130 corrects the gradation value of the output image signal VI supplied to the first pixel in the field period FL2 so that the difference between the gradation value of the output image signal VI supplied to the upper pixel PX in the field period FL2 and the gradation value of the output image signal VI supplied to the upper pixel PX in the field period FL1 becomes small. Further, the adjustment circuit 130 corrects the gradation value of the output image signal VI supplied to the lower pixel PX in the field period FL2 so that the difference between the gradation value of the output image signal VI supplied to the lower pixel PX in the field period FL2 and the gradation value of the output image signal VI supplied to the lower pixel PX in the field period FL1 becomes large.

[0117] Thus, in this embodiment, by correcting the gradation value of the output image signal VI, the response speed of the upper pixel PX can be slowed down, and the response speed of the lower pixel PX can be increased. Thereby, in this embodiment, it is possible to suppress an increase in the variation of the difference between the actual transmittance and the target transmittance of the pixels PX during a period when the state of the optical path shift element 80 does not change. As a result, in this embodiment, it is possible to suppress a decrease in the quality of the image visually recognized by the user.

[0118] Also, in the present embodiment, the adjustment circuit 130 executes overdrive processing to compensate for the response speed of the pixel PX. In each of the plurality of pixels PX, based on the order in which the output image signal VI is supplied, the data Dod determined by the overdrive processing is adjusted, and the output image signal VI is generated based on the data Dml which is the adjusted data Dod. Thereby, in the present embodiment, the gradation value of the output image signal VI determined by the overdrive processing can be corrected based on the order in which the output image signal VI is supplied or the position of the pixel PX in the liquid crystal panel 10. Also in this case, since it is possible to suppress an increase in the variation between the actual transmittance and the target transmittance of the pixel PX during the period in which the state of the optical path shift element 80 has not changed, it is possible to suppress a decrease in the quality of the image visually recognized by the user.

[0119] Also, in the present embodiment, the adjustment circuit 130 makes the data Dml used for generating the output image signal VI supplied to the upper pixel PX smaller than the data Dod determined by the overdrive processing. Further, the adjustment circuit 130 makes the data Dml used for generating the output image signal VI supplied to the lower pixel PX larger than the data Dod determined by the overdrive processing. Thereby, in the present embodiment, it is possible to slow down the response speed of the upper pixel PX and speed up the response speed of the lower pixel PX. As a result, in the present embodiment, as described above, it is possible to suppress a decrease in the quality of the image visually recognized by the user.

[0120] [2. Modification Example] Each of the above embodiments can be variously modified. Specific modification modes are exemplified below. Two or more modes arbitrarily selected from the following examples can be appropriately combined within a range where they do not conflict with each other. In the modification examples exemplified below, for elements whose actions and functions are equivalent to those of the embodiment, the reference numerals referred to in the above description are reused, and the detailed description of each is appropriately omitted.

[0121] [First Modification Example] In the above-described embodiments, the case where the magnitude of the voltage of the output image signal VI supplied to each pixel PX is the same in the period T1 and the period T2 in each field period FL has been exemplified. However, the present invention is not limited to such a mode. For example, when focusing on one pixel PX, the magnitude of the voltage of the output image signal VI supplied to one pixel PX by the second scan may be different from the magnitude of the voltage of the output image signal VI supplied to one pixel PX by the first scan.

[0122] FIG. 7 is a diagram for explaining the operation of the projector according to the first modification. The operation shown in FIG. 7 is the same as the operation shown in FIG. 6, except that the magnitude of the voltage of the output image signal VI supplied to each pixel PX by the second scan is the same as the voltage corresponding to the target gradation value G1 or G2.

[0123] For example, at time T150, by the second scan of the field period FL1, the pixels PX in the first row are selected, and the output image signal VI having a voltage corresponding to the target gradation value G2 is supplied to the pixels PX in the first row. In the example shown in FIG. 7, the magnitude of the voltage of the output image signal VI supplied to the pixels PX in the first row by the first scan is smaller than the voltage of the output image signal VI shown in FIG. 6. Therefore, the response speed of the pixels PX in the first row during the period from the first supply to the second supply of the output image signal VI is slower than the operation shown in FIG. 6. Also, in this modification, near the end of the period T2, the transmittance of the liquid crystal element LCE of the pixels PX in the first row has reached a transmittance that can be regarded as the same as the transmittance corresponding to the target gradation value G2.

[0124] Also, in the example shown in FIG. 7, the magnitude of the voltage of the output image signal VI supplied to the pixels PX in the m-th row by the first scan is larger than the voltage of the output image signal VI shown in FIG. 6. Therefore, the response speed of the pixels PX in the m-th row during the period from the first supply to the second supply of the output image signal VI is faster than the operation shown in FIG. 6. For this reason, in the example shown in FIG. 7, near the middle between time T140 and time T190, the transmittance of the liquid crystal element LCE of the pixels PX in the m-th row has reached the transmittance corresponding to the target gradation value G2.

[0125] And at time T190 when the output image signal VI of the voltage corresponding to the target gradation value G2 is supplied to the pixel PX in the m-th row, the transmittance of the liquid crystal element LCE of the pixel PX in the m-th row has reached a transmittance higher than the transmittance corresponding to the target gradation value G2. Note that at time T190, since the output image signal VI of a voltage smaller than the output image signal VI in period T1 is supplied to the pixel PX in the m-th row, the transmittance of the liquid crystal element LCE of the pixel PX in the m-th row decreases gently compared to the change in the applied voltage.

[0126] Thus, in the operation shown in FIG. 7, compared with the operation shown in FIG. 6, the output image signal VI corrected so that the response speed of the pixel PX in the period from the first supply to the second supply of the output image signal VI becomes slower is supplied to the pixel PX in the first row. Also, in the operation shown in FIG. 7, compared with the operation shown in FIG. 6, the output image signal VI corrected so that the response speed of the pixel PX in the period from the first supply to the second supply of the output image signal VI becomes faster is supplied to the pixel PX in the m-th row.

[0127] Note that the operation of this modified example is not limited to the example shown in FIG. 7. For example, the magnitude of the voltage of the output image signal VI supplied to each pixel PX by the first scan may be the same as or smaller than the voltage of the output image signal VI shown in FIG. 6.

[0128] In this way, in this modification example, the adjustment circuit 130 makes the data Dml used for generating the output image signal VI supplied to the upper pixels PX during the period T1 smaller than the data Dod determined by the overdrive process. Also, the adjustment circuit 130 makes the data Dml used for generating the output image signal VI supplied to the lower pixels PX during the period T1 larger than the data Dod determined by the overdrive process. Further, for the data Dml used for generating the output image signal VI supplied to the upper pixels PX during the period T2 and the data Dml used for generating the output image signal VI supplied to the lower pixels PX during the period T2, the adjustment circuit 130 does not change them from the data Dod determined by the overdrive process. That is, in the period T2, the coefficient Ki is set to 1 for all rows. As described above, also in this modification example, the same effects as those of the above-described embodiment can be obtained.

[0129] [Second Modification Example] In the above-described embodiment and modification examples, the case where the correction data Dml is calculated by multiplying the data Dod determined by the overdrive process by the coefficient Ki has been exemplified, but the present invention is not limited to such a mode. For example, the adjustment circuit 130 may generate the image data DI by multiplying the addition result of the image signal DIL and the data Dod by a coefficient similar to the coefficient Ki. Alternatively, the adjustment circuit 130 may generate the image data DI by multiplying the image signal DIL by a coefficient similar to the coefficient Ki without performing the overdrive process. As described above, also in this modification example, the same effects as those of the above-described embodiment can be obtained.

[0130] [Third Modification Example] In the above-described embodiments and modified examples, the case where the liquid crystal element LCE is in the normally black mode has been exemplified. However, the present invention is not limited to such a mode. For example, the liquid crystal element LCE may be in the normally white mode. Also, for example, the liquid crystal LC is not limited to the VA mode liquid crystal, and may be the TN mode or the IPS mode liquid crystal. The liquid crystal panel 10 is not limited to the transmissive type, and may be the reflective type. When the liquid crystal panel 10 is the reflective type, in the above description, the transmittance may be read as the reflectance. Further, the projector 1 may be configured by a method using a digital micromirror device instead of the liquid crystal panel 10. In this case, the digital micromirror device corresponds to the "electro-optical panel".

[0131] [Fourth Modified Example] In the above-described embodiments and modified examples, the case where the timing control circuit 140 time-divisionally divides one frame period FM into a plurality of field periods FL has been exemplified. However, the present invention is not limited to such a mode. For example, a plurality of components included in the projector 1, particularly, a plurality of components included in the control circuit 100 may cooperate to time-divisionally divide one frame period FM into a plurality of field periods FL.

Description of Reference Numerals

[0132] 1... Projector, 10R, 10G, 10B... Liquid crystal panel, 12... Display area, 14... Scanning line drive circuit, 16... Data line drive circuit, 20... Lighting device, 40... Separation optical system, 41, 42, 45... Mirror, 43, 44... Dichroic mirror, 60... Projection optical system, 62... Projection lens system, 80... Optical path shift element, 100... Control circuit, 110... Image processing circuit, 120... Conversion circuit, 122... First frame memory, 130... Adjustment circuit, 132... Second frame memory, 134... Look-up table, 136... Correction circuit, 140... Timing control circuit, 150... Optical path shift element drive circuit, SCR... Projection surface, PIa, PIb, PIc, PId, PX, PXS... Pixel.

Claims

1. An electro-optical panel in which a plurality of pixels are arranged and an image is displayed by emitting light from the plurality of pixels, An optical path shift element that changes the optical path of the light emitted from the plurality of pixels, In each of a plurality of unit periods included in one frame period for displaying an image for one frame indicated by an input image signal, an image signal generated based on the input image signal and corresponding to the plurality of pixels is supplied to the plurality of pixels in a predetermined order. An image processing circuit, comprising: The image processing circuit, includes an adjustment circuit that adjusts the response speed of the plurality of pixels of the electro-optical panel when switching the image displayed by the electro-optical panel based on the order in which the image signal is supplied to the electro-optical panel or the position of the pixels in the electro-optical panel. A projector characterized by this.

2. An electro-optical panel in which a plurality of pixels are arranged and an image is displayed by emitting light from the plurality of pixels, An optical path shift element that changes the optical path of the light emitted from the plurality of pixels, In each of a plurality of unit periods included in one frame period for displaying an image for one frame indicated by an input image signal, an image signal generated based on the input image signal and corresponding to the plurality of pixels is supplied to the plurality of pixels in a predetermined order. An image processing circuit, comprising: The image processing circuit, includes an adjustment circuit that adjusts the response speed of the plurality of pixels when switching the image displayed by the electro-optical panel based on the order in which the image signal is supplied or the position of the pixels in the electro-optical panel, The plurality of pixels include a first pixel to which the image signal is supplied in the first half of the predetermined order and a second pixel to which the image signal is supplied in the second half of the predetermined order. The plurality of unit periods include a first unit period and a second unit period following the first unit period, In the second unit period, the adjustment circuit corrects the gradation value of the image signal supplied to the first pixel in the second unit period so that the difference between the gradation value of the image signal supplied to the first pixel in the second unit period and the gradation value of the image signal supplied to the first pixel in the first unit period becomes small, corrects the gradation value of the image signal supplied to the second pixel in the second unit period so that the difference between the gradation value of the image signal supplied to the second pixel in the second unit period and the gradation value of the image signal supplied to the second pixel in the first unit period becomes large, A projector characterized by the above.

3. An electro-optical panel in which a plurality of pixels are arranged and an image is displayed by emitting light from the plurality of pixels, An optical path shift element that changes the optical path of the light emitted from the plurality of pixels, In each of a plurality of unit periods included in one frame period for displaying an image for one frame indicated by an input image signal, an image signal generated based on the input image signal and corresponding to the plurality of pixels is supplied to the plurality of pixels in a predetermined order. An image processing circuit, comprising: The image processing circuit includes an adjustment circuit that adjusts the response speed of the plurality of pixels when switching the image displayed on the electro-optical panel based on the order in which the image signal is supplied or the position of the pixels in the electro-optical panel, The adjustment circuit performs an overdrive process for compensating the response speed, In each of the plurality of pixels, based on the order in which the image signal is supplied, the compensation amount determined by the overdrive process is adjusted, and the image signal is generated based on the adjusted compensation amount. A projector characterized by the above.

4. The plurality of pixels include a first pixel to which the image signal is supplied in the first half of the predetermined order, and a second pixel to which the image signal is supplied in the second half of the predetermined order, The adjustment circuit, makes the compensation amount used for generating the image signal supplied to the first pixel smaller than the compensation amount determined by the overdrive process, and makes the compensation amount used for generating the image signal supplied to the second pixel larger than the compensation amount determined by the overdrive process. The projector according to claim 3, characterized in that.

5. The plurality of pixels include a first pixel to which the image signal is supplied in the first half of the predetermined order, and a second pixel to which the image signal is supplied in the second half of the predetermined order, Each of the plurality of unit periods includes a first period and a second period following the first period, The adjustment circuit, makes the compensation amount used for generating the image signal supplied to the first pixel in the first period smaller than the compensation amount determined by the overdrive process, makes the compensation amount used for generating the image signal supplied to the second pixel in the first period larger than the compensation amount determined by the overdrive process, For the compensation amount used for generating the image signal supplied to the first pixel in the second period and the compensation amount used for generating the image signal supplied to the second pixel in the second period, no change is made from the compensation amount determined by the overdrive process, The projector according to claim 3, characterized in that.

6. A control method for a projector having an electro-optical panel in which a plurality of pixels are arranged and an image is displayed by emitting light from the plurality of pixels, and an optical path shift element that changes the optical path of the light emitted from the plurality of pixels, In each of a plurality of unit periods included in one frame period for displaying an image for one frame indicated by an input image signal, an image signal generated based on the input image signal and corresponding to the plurality of pixels is supplied to the plurality of pixels in a predetermined order. When switching the image displayed on the electro-optical panel, the response speed of the plurality of pixels of the electro-optical panel is adjusted based on the order in which the image signal is supplied to the electro-optical panel or the positions of the pixels in the electro-optical panel. A method for controlling a projector, characterized by the above.

Images