Dimming sheet repair device and dimming sheet repair method

Abstract

To provide a device and method for repairing light control sheets.SOLUTION: A light control sheet repair device is provided, comprising: a voltage application unit configured to apply a drive voltage VLD for driving a liquid crystal compound between transparent electrode layers 22, 23 of a light control sheet 20 provided with the liquid crystal compound between the transparent electrode layers 22, 23; a current detection circuit 35 and failure determination circuit 32 configured to detect presence / absence of micro short circuits between the transparent electrode layers 22, 23 on the basis of current flowed by the drive voltage; and a voltage modification unit configured to change the voltage between the transparent electrode layers 22, 23 from the drive voltage VLD to a repair voltage VLR that is higher than the drive voltage VLD when the presence of micro short circuits is detected by the failure determination circuit 32.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a repair device for a dimming sheet and a method for repairing a dimming sheet.

Background Art

[0002] A polymer-dispersed dimming sheet includes a polymer compound layer between a first transparent electrode layer and a second transparent electrode layer. The polymer compound layer partitions voids filled with a liquid crystal compound. The alignment state of the liquid crystal compound follows a voltage change between the first transparent electrode layer and the second transparent electrode layer. A driving device for the dimming sheet changes the dimming sheet from transparent to opaque or from opaque to transparent by changing the voltage between the first transparent electrode layer and the second transparent electrode layer (see, for example, Patent Document 1).

[0003] When structural abnormalities such as breakage or cracking occur in the transparent electrode layer, electrical characteristic values such as resistance value, voltage value, and current value change in the transparent electrode. A failure diagnosis device for the dimming sheet detects that the electrical characteristic value of the transparent electrode is not a normal value as a failure of the dimming sheet (see, for example, Patent Document 2).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] A micro short circuit between the first transparent electrode layer and the second transparent electrode layer may occur in various situations such as during the manufacturing, installation, or use of the dimming sheet. The micro short circuit repair technology improves the productivity, maintainability, and safety of the dimming sheet, thereby further promoting the popularization of the dimming sheet.

[0006] For example, in the scenario of manufacturing a dimming sheet, the end face of the dimming sheet is formed by a process of cutting a series of sheets to the product size. Alternatively, in the scenario of attaching the dimming sheet to a transparent plate, the end face of the dimming sheet is formed by a process of cutting the edge of the dimming sheet along the transparent plate. At this time, since the thickness of the polymer compound layer is less than 1 mm, these processes are carefully carried out so as not to cause a short circuit between the first transparent electrode layer and the second transparent electrode layer in the minute portion of the transparent electrode layer.

[0007] Further consider the cause of the short circuit. For example, in the scenario of manufacturing a dimming sheet, the conductive fine particles existing in the manufacturing environment of the dimming sheet are mixed into the polymer compound layer. The mixing of the conductive fine particles is said to cause a short circuit between the first transparent electrode layer and the second transparent electrode layer in the minute portion within the plane of the dimming sheet. Alternatively, in the scenario of using the dimming sheet, the moisture existing in the use environment of the dimming sheet adheres to the end face of the dimming sheet. The adhesion of the moisture is said to cause a short circuit between the first transparent electrode layer and the second transparent electrode layer in the minute portion on the end face of the dimming sheet.

[0008] These minute short circuits are difficult to be reflected in the electrical characteristic values of a single transparent electrode layer. As a result, the presence or absence of minute short circuits is not detected, and a difference in transmittance due to the minute short circuits occurs in the dimming sheet. Alternatively, even if the first transparent electrode layer and the second transparent electrode layer are short-circuited in the minute portion, a power supply device having a margin in output power drives the dimming sheet to such an extent that it is difficult to visually discriminate the difference in transmittance due to the minute short circuit. Then, the drive circuit of the dimming sheet continues to pass a current larger than the originally required current.

Means for Solving the Problem

[0009] The repair device for a dimming sheet for solving the above problems includes a voltage application unit that applies a driving voltage for driving the liquid crystal compound between the transparent electrode layers of the dimming sheet provided with the liquid crystal compound between the transparent electrode layers, a detection unit that detects a current flowing between the transparent electrode layers by the application of the driving voltage and detects the presence of a micro short circuit between the transparent electrode layers based on the detected current, and a voltage change unit that changes the voltage applied between the transparent electrode layers from the driving voltage to a repair voltage higher than the driving voltage when the detection unit detects the presence of the micro short circuit.

[0010] The repair method for a dimming sheet for solving the above problems includes applying a driving voltage for driving the liquid crystal compound provided between the transparent electrode layers of the dimming sheet between the transparent electrode layers, detecting a current flowing between the transparent electrode layers by the application of the driving voltage, and when it is detected based on the detected current that a micro short circuit exists between the transparent electrode layers, changing the voltage applied between the transparent electrode layers from the driving voltage to a repair voltage higher than the driving voltage.

[0011] Applying a repair voltage that is higher than the driving voltage causes a larger current to flow at the location where the micro short circuit occurs than when the driving voltage is applied. Supplying a large current by applying the repair voltage electrically cuts off the micro short circuit. In this regard, when the repair device for the dimming sheet detects a micro short circuit during the application of the driving voltage, it changes the voltage between the transparent electrode layers from the driving voltage to the repair voltage. Thereby, it becomes possible to repair the micro short circuit generated between the transparent electrode layers.

[0012] The repair device for the dimming sheet may further include a notification unit that notifies that the voltage change unit has changed the voltage applied between the transparent electrode layers from the driving voltage to the repair voltage. According to the above configuration, since the application of the repair voltage is notified, the safety of the operation is enhanced when repairing the dimming sheet to which a high voltage is applied.

[0013] In the repair device for the dimming sheet, after changing the voltage applied between the transparent electrode layers to the repair voltage, the voltage changing unit returns the voltage applied between the transparent electrode layers to the driving voltage, and when the detection unit detects the absence of the micro short circuit in a state where the voltage applied between the transparent electrode layers has been returned to the driving voltage, the notification unit may notify that the repair of the micro short circuit has been completed.

[0014] According to the above configuration, the user of the dimming sheet can grasp that the repair of the micro short circuit has been completed. And it becomes possible to prompt the user for the corresponding measures after the repair of the micro short circuit. As a result, the period during which the repair voltage, which is a high voltage, is applied can be made more appropriate, and the period during which the driving of the dimming sheet is stopped for repair can be made more appropriate.

[0015] In the repair device for the dimming sheet, after changing the voltage applied between the transparent electrode layers to the repair voltage, the voltage changing unit returns the voltage applied between the transparent electrode layers to the driving voltage, and when the detection unit redetects the presence of the micro short circuit in a state where the voltage applied between the transparent electrode layers has been returned to the driving voltage, the voltage application unit may stop applying a voltage between the transparent electrode layers.

[0016] According to the above configuration, when the repair of the micro short circuit by applying the repair voltage is impossible, the voltage application between the transparent electrode layers is stopped. Thereby, it is suppressed that a voltage continues to be applied between the transparent electrode layers in a state where the micro short circuit exists.

[0017] In the repair device for the dimming sheet, when the voltage changing unit stops applying a voltage between the transparent electrode layers, the notification unit may notify that the repair of the micro short circuit is impossible.

[0018] According to the above configuration, when the repair of the micro short circuit by applying the repair voltage is impossible, the user can grasp that the repair of the micro short circuit is impossible by applying the repair voltage. Therefore, it is suppressed that the user repeatedly applies the repair voltage, which is a high voltage, unnecessarily.

[0019] In the repair device for the dimming sheet, the detection unit may detect that the converged value of the detected current is greater than a predetermined threshold value as a failure in which the micro short circuit exists between the transparent electrode layers. According to this configuration, the presence of the micro short circuit is detected based on the fact that the converged value of the current flowing between the transparent electrode layers is greater than the threshold value. Thereby, the presence of the micro short circuit is detected more appropriately.

[0020] In the repair device for the dimming sheet, the detection unit detects that the peak value of the detected current is equal to or less than a predetermined threshold value as an increase in the contact resistance between the transparent electrode layer and the external wiring, and the voltage application unit may stop applying a voltage between the transparent electrode layers when the detection unit detects the increase in the contact resistance.

[0021] According to the above configuration, the fact that the peak value is equal to or less than a predetermined threshold value is detected as a predetermined failure other than the micro short circuit. Then, when the presence of a predetermined failure other than the micro short circuit is detected, the application of the voltage between the transparent electrode layers is stopped, so that the use of the repair voltage for a predetermined failure other than the micro short circuit can be suppressed.

Brief Description of the Drawings

[0022]

Figure 1

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DETAILED DESCRIPTION OF THE INVENTION

[0023] Hereinafter, an embodiment of a repair device for a dimming sheet and a method for repairing a dimming sheet will be described. The dimming system includes a repair device for a dimming sheet. The repair device for a dimming sheet executes a method for repairing a dimming sheet. The dimming system includes a power supply circuit 10 and a dimming sheet 20. The power supply circuit 10 constitutes a repair device for a dimming sheet and a driving device for a dimming sheet.

[0024] [Configuration of Dimming Sheet] The dimming sheet 20 includes a dimming layer 21. The dimming layer 21 includes a polymer compound layer and a liquid crystal compound held in the polymer compound layer. The holding form of the liquid crystal compound by the dimming layer 21 is a polymer dispersed type, a polymer network type, or a capsule type. The dimming sheet 20 includes a first transparent electrode layer 22 and a second transparent electrode layer 23. The dimming layer 21 is located between the first transparent electrode layer 22 and the second transparent electrode layer 23.

[0025] A driving voltage is applied between the first transparent electrode layer 22 and the second transparent electrode layer 23. The alignment state of the liquid crystal compound takes a first state by the application of the driving voltage. The alignment state of the liquid crystal compound takes a second state by the stop of energization.

[0026] The repair voltage is applied between the first transparent electrode layer 22 and the second transparent electrode layer 23. The minute short circuits that may occur in the dimming sheet 20 are cut off by the application of the repair voltage. An example of a minute short circuit may occur inside the dimming layer 21 or at the end face of the dimming sheet 20. The minute short circuit causes an excessive current to flow through the circuit of the dimming system to such an extent that the fuse does not blow in the protection circuit of the dimming system. The minute short circuit causes an excessive current to flow through the dimming layer 21 to such an extent that differences in optical characteristic values such as transmittance and haze occur.

[0027] The driving mode of the dimming sheet 20 is either the normal type or the reverse type. The normal-type dimming sheet 20 is transparent in the first state. The normal-type dimming sheet 20 is opaque in the second state. In contrast, the reverse-type dimming sheet 20 is opaque in the first state. The reverse-type dimming sheet 20 is transparent in the second state. The transparent dimming sheet 20 has a higher light transmittance than the opaque dimming sheet 20.

[0028] When the normal-type dimming sheet 20 is opaque, the light transmittance of the dimming sheet 20 has the lowest value within the driving range of the dimming sheet 20. When the reverse-type dimming sheet 20 is transparent, the light transmittance of the dimming sheet 20 has the highest value within the driving range of the dimming sheet 20.

[0029] When the normal-type dimming sheet 20 is transparent, the light transmittance of the dimming sheet 20 may have the highest value within the driving range of the dimming sheet 20, or may have an intermediate value within the driving range of the dimming sheet 20. When the reverse-type dimming sheet 20 is opaque, the light transmittance of the dimming sheet 20 may have the lowest value within the driving range of the dimming sheet 20, or may have an intermediate value within the driving range of the dimming sheet 20.

[0030] [Functional Configuration of Power Supply Circuit] Next, the functional configuration of the power supply circuit 10 will be described. The power supply circuit 10 is connected to an external power supply 50. The external power supply 50 may be an AC power supply that outputs an AC voltage as the power supply voltage, or a DC power supply that outputs a DC voltage as the power supply voltage. An example of the AC power supply is a commercial power supply. An example of the DC power supply is a power supply for auxiliary equipment mounted on a moving body.

[0031] The power supply circuit 10 converts the power supply voltage into a drive voltage and generates a drive signal from the drive voltage. The power supply circuit 10 converts the power supply voltage into a repair voltage and generates a repair signal from the repair voltage. The power supply circuit 10 supplies a drive signal to the dimming sheet 20. The power supply circuit 10 determines the presence or absence of a micro short circuit, and when it is determined that a micro short circuit exists, switches the supply of the drive signal to the supply of the repair signal. The power supply circuit 10 switches the supply of the repair signal to the supply of the drive signal after supplying the repair signal for a predetermined time. Note that the power supply circuit 10 may switch the supply of the repair signal to the supply of the drive signal after executing the supply of the repair signal for a predetermined time a predetermined number of times.

[0032] The power supply circuit 10 detects at least one of the source current and the sink current as a detection current. The source current is the current flowing from the power supply circuit 10 to the dimming sheet 20. The sink current is the current flowing from the dimming sheet 20 back to the power supply circuit 10.

[0033] The power supply circuit 10 determines the presence or absence of a failure based on the instantaneous value of the detection current. The power supply circuit 10 identifies the type of failure based on the instantaneous value of the detection current. The types of failures are as follows [A] to [C]. The instantaneous value of the detection current is at least one of the peak value of the detection current and the converged value of the detection current. [A] System leakage [B] Transmission line high resistance, or liquid crystal low capacitance / abnormal during inversion [C] Micro short circuit / abnormal during convergence

[0034] (A: System leakage) Deterioration of the member that electrically insulates the dimming system from the surrounding environment shorts the transmission path of the dimming system to the surrounding environment. For example, deterioration of the member that insulates each of the transparent electrode layers 22 and 23 from the surrounding environment shorts each of the transparent electrode layers 22 and 23 themselves to the surrounding environment. For example, deterioration of the member that insulates the wiring connecting each of the transparent electrode layers 22 and 23 to the power supply circuit 10 shorts the wiring to the surrounding environment. Thus, the range in which the transmission path is shorted to the surrounding environment can expand with the deterioration of the dimming system over time.

[0035] A short circuit in the transmission path in the dimming system can leak a part of the current entering the first transparent electrode layer 22 and a part of the current exiting the first transparent electrode layer 22 from the dimming system. A short circuit in the transmission path in the dimming system can leak a part of the current entering the second transparent electrode layer 23 and a part of the current exiting the first transparent electrode layer 22 from the dimming system.

[0036] Such system leakage can cause an abnormal current to flow between the first transparent electrode layer 22 and the power supply circuit 10, or between the second transparent electrode layer 23 and the power supply circuit 10, to the extent that the dimming sheet 20 is driven. Events resulting from system leakage appear as a difference between the source current and the sink current.

[0037] The power supply circuit 10 determines the presence or absence of system leakage based on the difference between the source current and the sink current. For example, when the difference between the source current and the sink current is equal to or less than a predetermined threshold value, the power supply circuit 10 determines that no system leakage has occurred. On the other hand, when the difference between the source current and the sink current is greater than the threshold value, the power supply circuit 10 determines that system leakage has occurred.

[0038] (B: Abnormality at inversion / High resistance of transmission path) The transmission path for electrically connecting the first transparent electrode layer 22 to the power supply circuit 10 changes the electrical characteristic values due to various deteriorations such as deterioration of the transmission material and deterioration of the electrical junction. The transmission path for electrically connecting the second transparent electrode layer 23 to the power supply circuit 10 also changes the electrical characteristic values due to various deteriorations such as deterioration of the transmission material and deterioration of the electrical junction.

[0039] An example of the characteristic value in the transmission path of the dimming system is the electrical resistance value of the transmission member itself and the contact resistance value between the transmission members. For example, the characteristic value of the wiring connecting each transparent electrode layer 22, 23 to the power supply circuit 10 is the resistance value of the wiring itself. For example, the characteristic value between each transparent electrode layer 22, 23 and the wiring is the contact resistance value between each transparent electrode layer 22, 23 and the wiring.

[0040] An increase in the resistance value of the transmission member or an increase in the contact resistance value between the transmission members increases the power consumption of the dimming system or causes the light transmittance of the dimming sheet 20 to deviate from its original value. Events caused by the high resistance of the transmission member or the high resistance between the transmission members appear as a decrease in the peak value of the source current or a decrease in the peak value of the sink current.

[0041] The power supply circuit 10 determines the presence or absence of high resistance based on the peak value of the source current or the peak value of the sink current. For example, when the peak value of the source current is greater than a predetermined threshold value, the power supply circuit 10 determines that there is no high resistance in the transmission path of the source current. On the other hand, when the peak value of the source current is less than or equal to the predetermined threshold value, the power supply circuit 10 determines that high resistance has occurred in the transmission path of the source current. Also, for example, when the peak value of the sink current is greater than a predetermined threshold value, the power supply circuit 10 determines that there is no high resistance in the transmission path of the sink current. On the other hand, when the peak value of the sink current is less than or equal to the predetermined threshold value, the power supply circuit 10 determines that high resistance has occurred in the transmission path of the sink current.

[0042] (B: Abnormal at inversion / Low liquid crystal capacity) Deterioration of the liquid crystal composition causes a decrease in the capacity of the liquid crystal composition in the dimming layer 21. The decrease in the capacity of the dimming layer 21 increases the power consumption of the dimming system or causes the light transmittance of the dimming sheet 20 to deviate from its original value. Events caused by the decrease in the capacity due to the liquid crystal composition appear as a decrease in the peak value of the source current or a decrease in the peak value of the sink current.

[0043] The power supply circuit 10 determines the presence or absence of capacitance reduction based on the peak value of the source current or the peak value of the sink current. For example, when the peak value of the source current or the peak value of the sink current is greater than a predetermined threshold value, the power supply circuit 10 determines that no capacitance reduction has occurred in the dimming layer 21. On the other hand, when the peak value of the source current or the peak value of the sink current is equal to or less than the predetermined threshold value, the power supply circuit 10 determines that capacitance reduction has occurred in the dimming layer 21.

[0044] (C: Abnormal at Convergence / Micro Short Circuit) When the first transparent electrode layer 22 is short-circuited to the second transparent electrode layer 23, an excessive current flows through the dimming sheet 20 and the power supply circuit 10. To suppress the flow of the short-circuit current, the power supply circuit 10 may include a fuse. The fuse is blown by the supply of the short-circuit current. However, the fusing current of the fuse is set large so that the fuse is not blown by the supply of the ripple current. Thus, even if the power supply circuit 10 includes a fuse, the fusing characteristics of the fuse are required to withstand the supply of the ripple current. As a result, the generation of a minute short-circuit current that does not blow the fuse still remains regardless of the presence or absence of the fuse.

[0045] The event that generates a minute short-circuit current is a short circuit in a minute portion of the dimming sheet 20. The short circuit in a minute portion of the dimming sheet 20 includes a short circuit between a part of the edge of the first transparent electrode layer 22 and the second transparent electrode layer 23, a short circuit between a part of the edge of the second transparent electrode layer 23 and the first transparent electrode layer 22, and a short circuit in the plane of the dimming sheet 20 through conductive fine particles that are foreign matter. The generation of a minute short-circuit current causes the light transmittance of the dimming sheet 20 to deviate from its original value. Also, whether the deviation of the light transmittance is visible or not, the continuous generation of a minute short-circuit current increases the power consumption of the dimming sheet 20 to a certain extent.

[0046] Such a micro short circuit can cause an abnormal current to flow between the first transparent electrode layer 22 and the second transparent electrode layer 23 to such an extent that the dimming sheet 20 is driven. An event caused by a micro short circuit appears as a leakage current value that is a converged value of the source current or a leakage current value that is a converged value of the sink current.

[0047] The power supply circuit 10 determines the presence or absence of a micro short circuit based on the converged value of the source current or the converged value of the sink current. For example, when the converged value of the source current or the converged value of the sink current is equal to or less than a predetermined threshold, the power supply circuit 10 determines that no micro short circuit has occurred. On the other hand, when the converged value of the source current or the converged value of the sink current is greater than the predetermined threshold, the power supply circuit 10 determines that a micro short circuit has occurred.

[0048] [Electrical Configuration of Power Supply Circuit] Next, a detailed electrical configuration of an example of the power supply circuit 10 will be described. The power supply circuit 10 includes a transformer circuit 11, a first boost circuit 12, a second boost circuit 13, a control power supply creation circuit 14, a timing control circuit 15, a drive voltage generation circuit 16, a switching circuit 17, a clock generation circuit 18, and a drive circuit 31. The drive circuit 31 includes a failure determination circuit 32, a failure state display circuit 33, and a current detection circuit 35.

[0049] The first boost circuit 12, the timing control circuit 15, the drive voltage generation circuit 16, and the current detection circuit 35 constitute a voltage application unit. The timing control circuit 15 and the clock generation circuit 18 constitute a timing control unit. The timing control unit, the failure determination circuit 32, and the current detection circuit 35 constitute a failure detection unit. The second boost circuit 13, the switching circuit 17, the timing control circuit 15, the drive voltage generation circuit 16, and the current detection circuit 35 constitute a voltage change unit.

[0050] The transformer circuit 11 converts the output voltage of the external power supply 50 into the input voltage of the boosting circuit. The transformer circuit 11 converts the output voltage of the external power supply 50 into the input voltage of the control power supply creation circuit 14. For example, when the output voltage of the external power supply 50 is an AC voltage of 100V, the transformer circuit 11 generates the input voltages of the first boosting circuit 12, the second boosting circuit 13, and the control power supply creation circuit 14 from the 100V AC voltage.

[0051] The first boosting circuit 12 generates the drive voltage VLD from the output voltage of the transformer circuit 11. The drive voltage VLD is of a magnitude suitable for driving the dimming sheet 20 that has not experienced a failure. An example of the drive voltage VLD is 50V. The driving of the dimming sheet 20 causes the dimming sheet 20 to transition from the second state to the first state.

[0052] The second boosting circuit 13 generates the repair voltage VLR from the output voltage of the transformer circuit 11. The repair voltage VLR is of a magnitude suitable for repairing the dimming sheet 20 that has experienced a failure. The repair voltage VLR is higher than the drive voltage VLD. The micro short circuit in the dimming sheet 20 is cut by the application of the voltage of the repair voltage VLR. An example of the repair voltage VLR is 80V.

[0053] The control power supply creation circuit 14 generates a voltage of a logical level from the output voltage of the transformer circuit 11. The control level is of a magnitude suitable for the operation of the timing control circuit 15. Also, the control level is of a magnitude suitable for the operation of the drive circuit 31. The logical level is lower than the drive level. An example of the logical level is 3.3V.

[0054] The timing control circuit 15 reverses the polarity of the voltage applied to the dimming sheet 20 to the drive voltage generation circuit 16. The polarity inversion frequency of the voltage applied to the dimming sheet 20 may be a low frequency of 1 Hz or more and 60 Hz or less, or may be a frequency higher than 60 Hz. Note that, as the polarity inversion frequency increases, the power consumption of the dimming system increases. The polarity inversion frequency of the voltage applied to the dimming sheet 20 may be appropriately set based on the power consumption required for the dimming system. Also, as the polarity inversion frequency decreases, uneven distribution of impurities contained in the liquid crystal composition is likely to occur. The polarity inversion frequency of the voltage applied to the dimming sheet 20 may be appropriately set based on various physical property values in the liquid crystal composition.

[0055] The timing control circuit 15 aligns the polarity inversion timing of the drive voltage generation circuit 16 with the sample extraction period by the current detection circuit 35. An example of the sample extraction period defines a period for extracting a sample for detecting the peak value of the detected current. Another example of the sample extraction period defines a period for extracting a sample for detecting the convergence value of the detected current. The peak value and the convergence value of the detected current are examples of instantaneous values.

[0056] Since the dimming layer 21 is a capacitive element, the peak value of the detected current appears immediately after a voltage is applied to the dimming sheet 20. That is, the peak value of the detected current appears immediately after the polarity inversion of the voltage applied to the dimming sheet 20. The timing control circuit 15 refers to the timing of the polarity inversion of the voltage applied to the dimming sheet 20, and aligns the timing immediately after the polarity inversion of the voltage applied to the dimming sheet 20 with the start of sample extraction of the peak value.

[0057] Since the dimming layer 21 is a capacitive element, the convergence value of the detected current appears immediately before the polarity inversion of the voltage applied to the dimming sheet 20. The timing control circuit 15 refers to the timing of the polarity inversion of the voltage applied to the dimming sheet 20, and aligns the timing immediately before the polarity inversion of the voltage applied to the dimming sheet 20 with the end of sample extraction of the convergence value.

[0058] The timing control circuit 15 generates an internal clock signal for generating the inversion control signal SIGR. The timing control circuit 15 generates the inversion control signal SIGR from the internal clock signal. The timing control circuit 15 outputs the inversion control signal SIGR to the drive voltage generation circuit 16. The drive voltage generation circuit 16 inverts the polarity of the voltage applied to the dimming sheet 20 based on the inversion control signal SIGR.

[0059] The drive voltage generation circuit 16 generates the drive signal SVD from the output voltage of the switching circuit 17. The drive voltage generation circuit 16 generates the repair signal SVR from the output voltage of the switching circuit 17. The drive signal SVD is an AC voltage signal. The drive signal SVD sets the drive voltage VLD to the peak-to-peak value and repeats the polarity inversion of the drive voltage VLD based on the inversion control signal SIGR. The repair signal SVR is an AC voltage signal. The repair signal SVR sets the repair voltage VLR to the peak-to-peak value and repeats the polarity inversion of the repair voltage VLR based on the inversion control signal SIGR.

[0060] The drive voltage generation circuit 16 supplies the drive signal SVD to the dimming sheet 20 through the current detection circuit 35. The drive voltage generation circuit 16 supplies the repair signal SVR to the dimming sheet 20 through the current detection circuit 35.

[0061] The switching circuit 17 inputs either the output voltage of the first boost circuit 12 or the output voltage of the second boost circuit 13 to the drive voltage generation circuit 16. The switching circuit 17 sets either the drive voltage VLD or the repair voltage VLR to the output level VD of the switching circuit 17.

[0062] The failure determination circuit 32 supplies the repair request signal SIGS to the switching circuit 17. The switching circuit 17 switches the output level VD from the drive voltage VLD to the repair voltage VLR by the supply of the repair request signal SIGS. The switching circuit 17 switches the output level VD from the repair voltage VLR to the drive voltage VLD by the stop of the supply of the repair request signal SIGS.

[0063] [Circuit Configuration of Voltage Application Unit] Next, the circuit configuration of an example of the voltage application unit included in the power supply circuit 10 will be described. As shown in FIG. 2, the drive voltage generation circuit 16 includes an H-bridge circuit. The H-bridge circuit includes a first switch SW1, a second switch SW2, a third switch SW3, and a fourth switch SW4. The H-bridge circuit is a parallel circuit composed of a series circuit composed of the first switch SW1 and the third switch SW3 and a series circuit composed of the second switch SW2 and the fourth switch SW4.

[0064] The input terminal of the H-bridge circuit is connected to the output terminal of the switching circuit 17. The output terminal of the H-bridge circuit is connected to the ground terminal of the power supply circuit 10. The connection point between the first switch SW1 and the third switch SW3 is connected to the second transparent electrode layer 23. The connection point between the second switch SW2 and the fourth switch SW4 is connected to the first transparent electrode layer 22.

[0065] As shown in FIG. 3, the first switch SW1 and the fourth switch SW4 take an on state at the same timing. The first switch SW1 and the fourth switch SW4 take an off state at the same timing. The second switch SW2 and the third switch SW3 take an on state at the same timing. The second switch SW2 and the third switch SW3 take an off state at the same timing. The states of the switches SW1, SW2, SW3, and SW4 are respectively determined by the polarity inversion signal. The on state of the first switch SW1 and the on state of the second switch SW2 are alternately repeated.

[0066] For example, the timing control circuit 15 outputs an inversion control signal SIGR so that from timing T1 to timing T2, the first switch SW1 and the fourth switch SW4 are in the on state and the second switch SW2 and the third switch SW3 are in the off state. When the first switch SW1 and the fourth switch SW4 are in the on state, the second transparent electrode layer 23 is connected to the output level VD of the switching circuit 17. When the second switch SW2 and the third switch SW3 are in the off state, the first transparent electrode layer 22 is connected to the ground level GND.

[0067] For example, the timing control circuit 15 outputs an inversion control signal SIGR such that from timing T3 to timing T4, the first switch SW1 and the fourth switch SW4 are in the off state, and the second switch SW2 and the third switch SW3 are in the on state. When the first switch SW1 and the fourth switch SW4 are in the off state, the second transparent electrode layer 23 is connected to the ground level GND. When the second switch SW2 and the third switch SW3 are in the on state, the first transparent electrode layer 22 is connected to the output level VD of the switching circuit 17.

[0068] When the first switch SW1 and the fourth switch SW4 are in the off state, and the second switch SW2 and the third switch SW3 are in the on state, the first transparent electrode layer 22 is connected to the output level VD of the switching circuit 17, and the second transparent electrode layer 23 is connected to the ground level GND. When the second switch SW2 and the third switch SW3 are in the off state, and the first switch SW1 and the fourth switch SW4 are in the on state, the second transparent electrode layer 23 is connected to the output level VD of the switching circuit 17, and the first transparent electrode layer 22 is connected to the ground level GND.

[0069] The timing control circuit 15 outputs an inversion control signal SIGR such that the period during which the output level VD of the switching circuit 17 is connected to the second transparent electrode layer 23 and the period during which the output level VD of the switching circuit 17 is connected to the first transparent electrode layer 22 are alternately repeated.

[0070] The timing control circuit 15 applies the voltage made alternating by the output of the inversion control signal SIGR to the dimming sheet 20 as a drive signal SVD through the current detection circuit 35. Also, the timing control circuit 15 applies the voltage made alternating by the output of the inversion control signal SIGR to the dimming sheet 20 as a repair signal SVR through the current detection circuit 35.

[0071] [Circuit Configuration of Timing Control Unit] Next, the circuit configuration of an example of the timing control unit included in the power supply circuit 10 will be described. Returning to FIG. 1, the timing control circuit 15 outputs an inverted clock signal CLK1 and a reference clock signal CLK2 to the clock generation circuit 18. The inverted clock signal CLK1 and the reference clock signal CLK2 are internal clock signals for generating an inversion control signal SIGR.

[0072] The clock generation circuit 18 generates a first detection clock signal SMP1 and a second detection clock signal SMP2 from the inverted clock signal CLK1 and the reference clock signal CLK2. The first detection clock signal SMP1 defines a sample extraction period for detecting the peak value of the detection current. The second detection clock signal SMP2 defines a sample extraction period for detecting the convergence value of the detection current.

[0073] As shown in FIG. 6, the inverted clock signal CLK1 changes from a high level to a low level at the inversion timing of the inversion control signal SIGR, and changes from a low level to a high level at the next inversion timing. The reference clock signal CLK2 alternately repeats a high level and a low level at a period shorter than the inversion period of the inversion control signal SIGR. For example, the inversion control signal SIGR is generated by dividing the reference clock signal CLK2 by 1 / 4. The inversion control signal SIGR rises at the fall of the reference clock signal CLK2. Also, the inversion control signal SIGR falls at the fall of the reference clock signal CLK2.

[0074] The clock generation circuit 18 generates a latch output signal LTS1, a latch output inverted signal LTS2, a shift signal RMP1, a first detection clock signal SMP1, and a second detection clock signal SMP2.

[0075] The clock generation circuit 18 uses the inverted clock signal CLK1 as a data input and the reference clock signal CLK2 as a clock input, and generates a latch output signal LTS1 by latching the inverted clock signal CLK1 with the reference clock signal CLK2.

[0076] The clock generation circuit 18 generates a latch output inverted signal LTS2 by inverting the latch output signal LTS1. The clock generation circuit 18 generates a shift signal RMP1 by shifting the latch output signal LTS1 by a predetermined time shorter than half a period of the inverted clock signal CLK1. The shift amount of the shift signal RMP1 with respect to the latch output signal LTS1 is, for example, three periods of the reference clock signal CLK2.

[0077] The clock generation circuit 18 generates a first detection clock signal SMP1 by taking the logical product of the inverted clock signal CLK1 and the latch output inverted signal LTS2. The first detection clock signal SMP1 rises with the rising edge of the inverted clock signal CLK1 and remains at a high level for a first sample extraction period TSM1 that is one period of the reference clock signal CLK2.

[0078] The current detection circuit 35 uses the rising timing of the first detection clock signal SMP1 as the start of a sample extraction period for detecting the peak value. The current detection circuit 35 uses the falling timing of the first detection clock signal SMP1 as the end of a sample extraction period for detecting the peak value.

[0079] The clock generation circuit 18 generates a second detection clock signal SMP2 by taking the logical product of the inverted clock signal CLK1 and the shift signal RMP1. The second detection clock signal SMP2 remains at a high level for a second sample extraction period TSM2 that is one period of the reference clock signal CLK2, prior to the falling edge of the inverted clock signal CLK1.

[0080] The current detection circuit 35 uses the rising timing of the second detection clock signal SMP2 as the start of a sample extraction period for detecting the convergence value. The current detection circuit 35 uses the falling timing of the second detection clock signal SMP2 as the end of a sample extraction period for detecting the convergence value.

[0081] Then, the current detection circuit 35 detects the peak values of the detected currents IMA, IMB, and IMC during the first sample extraction period TSM1 from the rising timing of the first detection clock signal SMP1. The fault determination circuit 32 determines that there is no abnormal inversion for the detected currents IMA and IMC having peak values greater than the first determination threshold Ith1. On the other hand, the fault determination circuit 32 determines that there is an abnormal inversion for the detected current IMB having a peak value equal to or less than the first determination threshold Ith1. The first determination threshold Ith1 is an example of the first threshold.

[0082] Also, the current detection circuit 35 detects the convergence values of the detected currents IMA, IMB, and IMC during the second sample extraction period TSM2 from the rising timing of the second detection clock signal SMP2. The fault determination circuit 32 determines that there is no abnormal convergence for the detected currents IMA and IMB having convergence values equal to or less than the second determination threshold Ith2. On the other hand, the fault determination circuit 32 determines that there is an abnormal convergence for the detected current IMC having a convergence value greater than the second determination threshold Ith2. The second determination threshold Ith2 is an example of the second threshold.

[0083] [Functional Configuration of Fault Detection Unit] Next, a functional configuration of an example of the fault detection unit included in the power supply circuit 10 will be described. Returning to FIG. 1, the current detection circuit 35 detects at least one of the source current and the sink current as the detected current. The source current is the current flowing from the current detection circuit 35 to the dimming sheet 20. The sink current is the current flowing from the dimming sheet 20 back to the current detection circuit 35.

[0084] In order for the fault determination circuit 32 to determine [A] the presence or absence of system leakage, the current detection circuit 35 detects the difference between one of the source current and the sink current and the other. To determine the presence or absence of an abnormality during inversion by the failure determination circuit 32, the current detection circuit 35 starts sampling the detected current from the rising edge of the first detection clock signal SMP1. Then, until the first sampling period TSM1 elapses, the current detection circuit 35 samples the detected current as samples and detects the peak value among the sampled detected currents.

[0085] To determine the presence or absence of an abnormality during convergence by the failure determination circuit 32, the current detection circuit 35 starts sampling the detected current from the rising edge of the second detection clock signal SMP2. Then, until the second sampling period TSM2 elapses, the current detection circuit 35 samples the detected current as samples and detects the convergence value among the sampled detected currents.

[0086] For example, when the drive voltage generation circuit 16 includes an H-bridge circuit, the source current flows from the input terminal of the H-bridge circuit to the connection terminal between the first switch SW1 and the second switch SW2. The current detection circuit 35 detects the current flowing from the input terminal of the H-bridge circuit to the connection terminal between the first switch SW1 and the second switch SW2. When the drive voltage generation circuit 16 includes an H-bridge circuit, the sink current flows from the connection terminal between the third switch SW3 and the fourth switch SW4 to the output terminal of the H-bridge circuit. The current detection circuit 35 detects the current flowing from the connection terminal between the third switch SW3 and the fourth switch SW4 to the output terminal of the H-bridge circuit.

[0087] [A] The current detection circuit 35 simultaneously detects the source current and the sink current, and detects the difference between the other one with respect to either the source current or the sink current. The failure determination circuit 32 determines whether the detected difference is greater than a predetermined threshold value.

[0088] [B] The current detection circuit 35 designates the sampling period of the source current by the first detection clock signal SMP1 input by the timing control circuit 15. The current detection circuit 35 detects the peak value from the source current during the first sampling period TSM1 designated by the first detection clock signal SMP1. The fault determination circuit 32 determines whether or not the detected peak value is greater than a predetermined first determination threshold Ith1 (see FIG. 6).

[0089] [C] The current detection circuit 35 designates the sampling period of the source current by the second detection clock signal SMP2 input by the timing control circuit 15. The current detection circuit 35 detects the convergence value from the source current during the second sampling period TSM2 designated by the second detection clock signal SMP2. The fault determination circuit 32 determines whether or not the detected convergence value is greater than a predetermined second determination threshold Ith2 (see FIG. 6).

[0090] Note that even when an AC voltage is applied to the dimming sheet 20, the current detection circuit 35 can detect the source current without changing the direction of the source current flow. Also, the current detection circuit 35 can detect the sink current without changing the direction of the sink current flow.

[0091] Further, the clock generation circuit 18 may separately shape the first detection clock signal SMP1 so that the first detection clock signal SMP1 rises with the fall of the inverted clock signal CLK1 and maintains a high level for only the first sampling period TSM1. The current detection circuit 35 may receive the input of the thus shaped first detection clock signal SMP1 and detect the peak value of the sink current during the sampling period designated by the first detection clock signal SMP1. Then, the fault determination circuit 32 may determine whether or not the peak value of the sink current is greater than the first determination threshold Ith1. Note that the power supply circuit 10 may also determine whether or not the peak value of the source current is greater than the predetermined first determination threshold Ith1 and whether or not the peak value of the sink current is greater than the first determination threshold Ith1.

[0092] Further, the clock generation circuit 18 may separately shape the second detection clock signal SMP2 so that the second detection clock signal SMP2 maintains a high level for a second sample extraction period TSM2 prior to the rising edge of the inverted clock signal CLK1. The current detection circuit 35 may receive the input of the second detection clock signal SMP2 shaped in this way and detect the convergence value of the sink current during the sample extraction period specified by the second detection clock signal SMP2. Then, the failure determination circuit 32 may determine whether the convergence value of the sink current is greater than a predetermined second determination threshold Ith2. Note that the power supply circuit 10 may determine whether the convergence value of the source current is greater than a predetermined second determination threshold Ith2 and whether the peak value of the sink current is greater than a predetermined second determination threshold Ith2.

[0093] [Configuration Example of Failure Detection Unit] Next, a functional configuration example of the failure detection unit included in the power supply circuit 10 will be described. As shown in FIG. 4, the power supply circuit 10 includes a first detection circuit 352, a second detection circuit 353, a differential detection circuit 354, a leakage detection circuit 355, a first sample extraction circuit 356, and a first determination circuit 357. The power supply circuit 10 may further include a second sample extraction circuit 358 and a second determination circuit 359.

[0094] The first detection circuit 352, the second detection circuit 353, the differential detection circuit 354, the first sample extraction circuit 356, and the second sample extraction circuit 358 constitute the current detection circuit 35. The leakage detection circuit 355, the first determination circuit 357, and the second determination circuit 359 constitute the failure determination circuit 32.

[0095] The first detection circuit 352, the second detection circuit 353, the differential detection circuit 354, and the leakage detection circuit 355 detect the difference between one of the source current and the sink current for the other in order for the power supply circuit 10 to determine the presence or absence of [A] system leakage, and output whether the detected difference is greater than a predetermined threshold value.

[0096] The first detection circuit 352 detects the source current flowing into the first transparent electrode layer 22 and the sink current flowing out of the first transparent electrode layer 22. The second detection circuit 353 detects the source current flowing into the second transparent electrode layer 23 and the sink current flowing out of the second transparent electrode layer 23.

[0097] The differential detection circuit 354 detects the difference between the source current flowing into the first transparent electrode layer 22 and the sink current flowing out of the second transparent electrode layer 23. The differential detection circuit 354 detects the difference between the source current flowing into the second transparent electrode layer 23 and the sink current flowing out of the first transparent electrode layer 22.

[0098] The leakage detection circuit 355 compares the detection result of the differential detection circuit 354 with a predetermined threshold value, and determines whether the detection result of the differential detection circuit 354 is greater than the predetermined threshold value. When the leakage detection circuit 355 determines that the detection result of the differential detection circuit 354 is greater than the predetermined threshold value, [A] it outputs that system leakage has occurred. On the contrary, when the leakage detection circuit 355 determines that the detection result of the differential detection circuit 354 is equal to or less than the predetermined threshold value, [A] it outputs that no system leakage has occurred.

[0099] The first detection circuit 352 and the first sample extraction circuit 356 detect a peak voltage corresponding to a peak value from the temporal change of the detection current in order for the power supply circuit 10 to determine the presence or absence of [B] abnormal inversion. The first sample extraction circuit 356 detects, for example, the peak voltage during a period when the first detection clock signal SMP1 input by the clock generation circuit 18 is at a high level, from the detection current of the first detection circuit 352.

[0100] The first determination circuit 357 compares the peak value detected by the first sample extraction circuit 356 with the first determination threshold Ith1, and determines whether the peak value detected by the first sample extraction circuit 356 is greater than the first determination threshold Ith1. When the first determination circuit 357 determines that the peak value detected by the first sample extraction circuit 356 is greater than the first determination threshold Ith1, [B] it outputs that an abnormality has occurred during inversion. On the contrary, when the first determination circuit 357 determines that the peak value detected by the first sample extraction circuit 356 is less than or equal to the first determination threshold Ith1, [B] it outputs that no abnormality has occurred during inversion.

[0101] The first detection circuit 352 and the first sample extraction circuit 356 detect a convergence value from the temporal change of the detection current in order for the power supply circuit 10 to [C] determine the presence or absence of an abnormality during convergence. The first sample extraction circuit 356 detects, for example, the convergence value during a period when the second detection clock signal SMP2 input by the clock generation circuit 18 is at a high level, from the detection current of the first detection circuit 352.

[0102] The first determination circuit 357 compares the convergence value detected by the first sample extraction circuit 356 with the second determination threshold Ith2, and determines whether the convergence value detected by the first sample extraction circuit 356 is greater than the second determination threshold Ith2. When the first determination circuit 357 determines that the convergence value detected by the first sample extraction circuit 356 is greater than the second determination threshold Ith2, [C] it outputs that an abnormality has occurred during convergence. On the contrary, when the first determination circuit 357 determines that the convergence value detected by the first sample extraction circuit 356 is less than or equal to the second determination threshold Ith2, [C] it outputs that no abnormality has occurred during convergence.

[0103] The second detection circuit 353 and the second sample extraction circuit 358 may also detect a peak value from the temporal change of the detection current in order for the power supply circuit 10 to [B] determine the presence or absence of an abnormality during inversion. The second determination circuit 359 may also compare the peak value detected by the second sample extraction circuit 358 with the first determination threshold Ith1, and determine whether the peak value detected by the second sample extraction circuit 358 is greater than the first determination threshold Ith1.

[0104] The configuration for further detecting an abnormality at the time of [B] inversion by the second sample extraction circuit 358 and the second determination circuit 359 increases the accuracy of the detected result as compared with only the detection by the first sample extraction circuit 356 and the first determination circuit 357.

[0105] The second detection circuit 353 and the second sample extraction circuit 358 may also detect a convergence value from the temporal change of the detection current in order for the power supply circuit 10 to determine the presence or absence of an abnormality at the time of [C] convergence. The second determination circuit 359 may also compare the convergence value detected by the second sample extraction circuit 358 with a second determination threshold Ith2 and determine whether the convergence value detected by the second sample extraction circuit 358 is greater than the second determination threshold Ith2.

[0106] The configuration for further detecting an abnormality at the time of [C] convergence by the second sample extraction circuit 358 and the second determination circuit 359 increases the accuracy of the detected result related to the abnormality at the time of [C] convergence as compared with only the detection by the second sample extraction circuit 358 and the second determination circuit 359.

[0107] [Circuit configuration example of the failure detection unit] Next, a circuit configuration example of the failure detection unit included in the power supply circuit 10 will be described. Note that the circuit configuration example for detecting an abnormality at the time of [B] inversion can be embodied by changing the differential detection circuit 354 of the circuit configuration example for detecting [A] system leakage to a circuit configuration for extracting a sample from the detection current. The circuit configuration example for detecting an abnormality at the time of [C] convergence can also be embodied by changing the differential detection circuit 354 of the circuit configuration example for detecting [A] system leakage to a circuit configuration for extracting a sample from the detection current.

[0108] That is, an example of the first sample extraction circuit 356 and the first determination circuit 357 can be embodied by changing the circuit configuration of the differential detection circuit 354 among the differential detection circuit 354 and the leakage detection circuit 355 to extract a sample from the detection current. The second sample extraction circuit 358 and the second determination circuit 359 can also be embodied by changing the circuit configuration of the differential detection circuit 354 among the differential detection circuit 354 and the leakage detection circuit 355 to extract a sample from the detection current.

[0109] Therefore, hereinafter, an example of the first detection circuit 352, the second detection circuit 353, the differential detection circuit 354, and the leakage detection circuit 355 will be mainly described. And for the first sample extraction circuit 356, the first determination circuit 357, the second sample extraction circuit 358, and the second determination circuit 359, the points different from the differential detection circuit 354 and the leakage detection circuit 355 will be mainly described.

[0110] As shown in FIG. 5, the first detection circuit 352 is a differential amplifier circuit. The first detection circuit 352 includes a first shunt resistor 2R0, a first operational amplifier 20P1, and resistors 2R1, 2R2, 2R3, and 2R4.

[0111] The inverting input terminal of the first operational amplifier 20P1 is connected to the first transparent electrode layer 22 via the first shunt resistor 2R0 and the resistor 2R1. The inverting input terminal of the first operational amplifier 20P1 is also connected to the output terminal of the first operational amplifier 20P1 via the resistor 2R2. The non-inverting input terminal of the first operational amplifier 20P1 is connected to the first transparent electrode layer 22 via the resistor 2R3. The non-inverting input terminal of the first operational amplifier 20P1 is also connected to the reference voltage via the resistor 2R4.

[0112] The first detection circuit 352 amplifies the voltage of the first shunt resistor 2R0 to the first output voltage at a predetermined amplification factor. The first detection circuit 352 outputs the first output voltage to the differential detection circuit 354. The output terminal 352A of the first detection circuit 352 is connected to the differential detection circuit 354 and the first sample extraction circuit 356.

[0113] The second detection circuit 353 is a differential amplification circuit. The second detection circuit 353 includes a second shunt resistor 3R0, a second operational amplifier 30P1, a resistor 3R1, a resistor 3R2, a resistor 3R3, and a resistor 3R4.

[0114] The inverting input terminal of the second operational amplifier 30P1 is connected to the second transparent electrode layer 23 via the second shunt resistor 3R0 and the resistor 3R1. The inverting input terminal of the second operational amplifier 30P1 is also connected to the output terminal of the second operational amplifier 30P1 via the resistor 3R2. The non-inverting input terminal of the second operational amplifier 30P1 is connected to the second transparent electrode layer 23 via the resistor 3R3. The non-inverting input terminal of the second operational amplifier 30P1 is also connected to a reference voltage via the resistor 3R4.

[0115] The second detection circuit 353 amplifies the voltage of the second shunt resistor 3R0 to a second output voltage at a predetermined amplification factor. The second detection circuit 353 outputs the second output voltage to the differential detection circuit 354. The output terminal 353A of the second detection circuit 353 is connected to the differential detection circuit 354 and the second sample extraction circuit 358.

[0116] The differential detection circuit 354 is a differential amplification circuit. The differential detection circuit 354 includes a third operational amplifier 40P1, a resistor 4R1, a resistor 4R2, a resistor 4R3, and a resistor 4R4.

[0117] The inverting input terminal of the third operational amplifier 40P1 is connected to the output terminal of the second detection circuit 353 via the resistor 4R1. The inverting input terminal of the third operational amplifier 40P1 is also connected to the output terminal of the third operational amplifier 40P1 via the resistor 4R2. The non-inverting input terminal of the third operational amplifier 40P1 is connected to the output terminal of the first detection circuit 352 via the resistor 4R3. The non-inverting input terminal of the third operational amplifier 40P1 is also connected to a reference voltage via the resistor 3R4.

[0118] The differential detection circuit 354 amplifies the difference between the output voltage of the first detection circuit 352 and the output voltage of the second detection circuit 353 to a differential voltage at a predetermined amplification factor. The differential detection circuit 354 outputs the differential voltage to the leakage detection circuit 355.

[0119] The leakage detection circuit 355 is a comparison circuit that compares the output voltage of the differential detection circuit 354 with a predetermined reference voltage, i.e., the leakage reference voltage. The leakage detection circuit 355 includes a fourth operational amplifier 50P1, a resistor 5R1, a resistor 5R2, a variable resistor 5R3, and a resistor 5R4.

[0120] The resistor 5R2, the variable resistor 5R3, and the resistor 5R4 form a series resistor voltage division circuit. The output voltage of the resistor voltage division circuit changes according to the resistance value of the variable resistor 5R3. The output voltage of the resistor voltage division circuit is the leakage reference voltage and functions as a threshold value for determining the presence or absence of [A] system leakage.

[0121] The inverting input terminal of the fourth operational amplifier 50P1 is connected to the connection terminal between the resistor 5R2 and the variable resistor 5R3. The non-inverting input terminal of the fourth operational amplifier 50P1 is connected to the output terminal of the differential detection circuit 354. The non-inverting input terminal of the fourth operational amplifier 50P1 is connected to the output terminal of the differential detection circuit 354 via the resistor 5R1.

[0122] The leakage detection circuit 355 amplifies the difference between the output voltage of the differential detection circuit 354 and the leakage reference voltage. When the output voltage of the differential detection circuit 354 is higher than the leakage reference voltage, the leakage detection circuit 355 outputs a high-level voltage. When the output voltage of the differential detection circuit 354 is lower than the leakage reference voltage, the leakage detection circuit 355 outputs a low-level voltage. When the leakage detection circuit 355 outputs a high-level voltage, the fault determination circuit 32 determines that [A] system leakage has occurred. Conversely, when the leakage detection circuit 355 outputs a low-level voltage, the fault determination circuit 32 determines that [A] system leakage has not occurred.

[0123] The first sample extraction circuit 356 and the second sample extraction circuit 358 each include a sample-and-hold circuit. The sample-and-hold circuit uses the first detection clock signal SMP1 and the second detection clock signal SMP2 as separate input clocks. The sample-and-hold circuit includes a hold capacitor for holding the detected current. When the first detection clock signal SMP1 is at a high level, the sample-and-hold circuit holds the peak value among the samples during the period when the first detection clock signal SMP1 is at a high level as the peak voltage. When the second detection clock signal SMP2 is at a high level, the sample-and-hold circuit holds the convergence value among the samples during the period when the second detection clock signal SMP2 is at a high level as the convergence voltage.

[0124] The first determination circuit 357 and the second determination circuit 359 each include a comparison circuit. The comparison circuit of the first determination circuit 357 is connected to the output terminal of the first sample extraction circuit 356. The comparison circuit of the first determination circuit 357 receives, from the first sample extraction circuit 356, the peak voltage held by the first sample extraction circuit 356. The comparison circuit of the first determination circuit 357 receives, from the first sample extraction circuit 356, the convergence voltage held by the first sample extraction circuit 356.

[0125] The comparison circuit of the second determination circuit 359 is connected to the output terminal of the second sample extraction circuit 358. The comparison circuit of the second determination circuit 359 receives, from the second sample extraction circuit 358, the peak voltage held by the second sample extraction circuit 358. The comparison circuit of the second determination circuit 359 receives, from the second sample extraction circuit 358, the convergence voltage held by the second sample extraction circuit 358.

[0126] The comparison circuit holds the peak voltage detected during the current first sample extraction period TSM1 until the start of the next first sample extraction period TSM1. The comparison circuit amplifies the difference between the peak voltage detected during the current first sample extraction period TSM1 and the first fault reference voltage, which is a predetermined reference voltage, before the current first sample extraction period TSM1 elapses and before the next first sample extraction period TSM1 starts. The first fault reference voltage used for generating the difference functions as the first determination threshold Ith1 for detecting an abnormal condition during inversion.

[0127] When the convergence voltage is higher than the first fault reference voltage, the comparison circuit outputs a high-level voltage. When the peak voltage is lower than the first fault reference voltage, the comparison circuit outputs a low-level voltage. When both the comparison circuit of the first determination circuit 357 and the comparison circuit of the second determination circuit 359 output a high-level voltage, the fault determination circuit 32 determines that no abnormal condition during inversion has occurred. Conversely, when the comparison circuit of the first determination circuit 357 or the comparison circuit of the second determination circuit 359 outputs a low-level voltage, the fault determination circuit 32 determines that an abnormal condition during inversion has occurred.

[0128] The comparison circuit holds the convergence voltage detected during the current second sample extraction period TSM2 until the start of the next second sample extraction period TSM2. The comparison circuit amplifies the difference between the convergence value detected during the current second sample extraction period TSM2 and the second fault reference voltage, which is a predetermined reference voltage, before the current second sample extraction period TSM2 elapses and before the next second sample extraction period TSM2 starts. The second fault reference voltage used for generating the difference functions as the second determination threshold Ith2 for detecting an abnormal condition during convergence.

[0129] When the convergence value is higher than the second failure reference voltage, the comparison circuit outputs a high-level voltage. When the convergence value is lower than the second failure reference voltage, the comparison circuit outputs a low-level voltage. When both the comparison circuit of the first determination circuit 357 and the comparison circuit of the second determination circuit 359 output a high-level voltage, the failure determination circuit 32 determines that an abnormality has occurred during convergence. Conversely, when the comparison circuit of the first determination circuit 357 or the comparison circuit of the second determination circuit 359 outputs a low-level voltage, the failure determination circuit 32 determines that no abnormality has occurred during convergence.

[0130] [Operation of Power Supply Circuit 10] The power supply circuit 10 performs processing for detecting the above-described peak value, processing for detecting the convergence value, processing for determining the presence or absence of a failure based on comparison between the peak value and the first determination threshold Ith1, and processing for determining the presence or absence of a failure based on comparison between the convergence value and the second determination threshold Ith2. The power supply circuit 10 includes those that perform various processes by software. The power supply circuit 10 may be provided with dedicated hardware such as an Application Specific Integrated Circuit (ASIC) that executes at least a part of various processes. The power supply circuit 10 is also configured as a circuit including one or more dedicated hardware circuits such as an ASIC, one or more processors that operate according to a computer program, or a combination thereof. Hereinafter, an example will be described in which a processor provided in the power supply circuit 10 reads and executes a drive program stored in a readable medium provided in the power supply circuit 10 and performs various processes.

[0131] As shown in FIG. 7, the processor of the power supply circuit 10 receives an operation instruction to drive the dimming sheet 20 and drives the first boost circuit 12, the control power supply creation circuit 14, the timing control circuit 15, the drive voltage generation circuit 16, and the drive circuit 31. Thereby, the processor of the power supply circuit 10 supplies a drive signal SVD that is polarity-inverted based on the inversion control signal SIGR to the dimming sheet 20 (step S11).

[0132] The processor of the power supply circuit 10 drives the second boost circuit 13, the switching circuit 17, and the clock generation circuit 18 together with the supply of the drive signal SVD, and causes the failure determination circuit 32 to determine the presence or absence of a failure at a predetermined control cycle (step S12). That is, the processor of the power supply circuit 10 causes the failure determination circuit 32 to determine whether any of [A] system leakage, [B] abnormality during inversion, and [C] abnormality during convergence has occurred. The processor of the power supply circuit 10 continues to supply the drive signal SVD until a failure is detected in the failure determination circuit 32 (NO in step S12).

[0133] When the processor of the power supply circuit 10 detects that the failure determination circuit 32 has detected [A] system leakage, the processor causes the failure state display circuit 33 to externally display that [A] system leakage has occurred through the output of the failure determination circuit 32. When the processor of the power supply circuit 10 detects that the failure determination circuit 32 has detected [B] abnormality during inversion, the processor causes the failure state display circuit 33 to externally display that [B] inversion abnormality has occurred through the output of the failure determination circuit 32 (step S18).

[0134] Next, when the processor of the power supply circuit 10 detects that the failure determination circuit 32 has detected [A] system leakage, the processor controls the timing control circuit 15 and the drive voltage generation circuit 16 to stop applying the drive signal SVD. When the processor of the power supply circuit 10 detects that the failure determination circuit 32 has detected [B] abnormality during inversion, the processor controls the timing control circuit 15 and the drive voltage generation circuit 16 to stop applying the drive signal SVD (step S19).

[0135] Thereby, when at least one of [A] system leakage and [B] inversion abnormality is detected, the processor of the power supply circuit 10 stops supplying the drive signal SVD to the dimming sheet 20.

[0136] On the other hand, when the processor of the power supply circuit 10 detects only an abnormality at the time of [C] convergence by the failure determination circuit 32, the processor causes the failure state display circuit 33 to externally display that an abnormality at the time of [C] convergence has occurred (step S13). Further, the processor of the power supply circuit 10 clears an internal timer for measuring the supply time Ta of the repair signal SVR (step S14).

[0137] The failure determination circuit 32 outputs a repair request signal SIGS so that the signal supplied to the dimming sheet 20 is switched from the drive signal SVD to the repair signal SVR, and controls the switching circuit 17 (step S15). Further, the processor of the power supply circuit 10 starts measuring the supply time Ta of the repair signal SVR with the internal timer together with the output of the repair request signal SIGS by the failure determination circuit 32 (step S16). At this time, the display by the failure state display circuit 33 described above functions as a notification of the application of the repair voltage VLR which is a voltage higher than the drive voltage VLD.

[0138] Next, the processor of the power supply circuit 10 continues to supply the repair signal SVR to the failure determination circuit 32 until the supply time Ta of the repair signal SVR elapses the set time Tp (NO in step S17). On the other hand, when the supply time Ta of the repair signal SVR reaches the set time Tp, the processor of the power supply circuit 10 stops the output of the repair request signal SIGS to the failure determination circuit 32. The set time Tp is a time obtained by test or simulation as a time capable of disconnecting a micro short circuit by the supply of the repair signal SVR. Further, the set time Tp is a time preset in the processor of the power supply circuit 10. Then, the processor of the power supply circuit 10 switches the signal supplied to the dimming sheet 20 from the repair signal SVR to the drive signal SVD (YES in step S17). Thereby, the processor of the power supply circuit 10 supplies the repair signal SVR and disconnects the micro short circuit generated in the dimming sheet 20.

[0139] [Judgment Threshold Value] Next, the time variation of the detection current will be described using the results of circuit simulation. Note that FIG. 8 is a load circuit used for circuit simulation to obtain the time variation of the detection current. The load circuit shows an equivalent circuit including the dimming sheet 20 and the resistance of the transmission line connecting the dimming sheet 20 to the power supply circuit 10.

[0140] As shown in FIG. 8, the load circuit includes a first terminal PaS and a second terminal PbS. The first terminal PaS is, for example, a terminal constituting the dimming sheet 20 and is a terminal for connecting the first transparent electrode layer 22 to the drive circuit 31. The second terminal PbS is, for example, a terminal constituting the dimming sheet 20 and is a terminal for connecting the second transparent electrode layer 23 to the drive circuit 31.

[0141] The load circuit includes a first wiring resistance R1S and a second wiring resistance R5S. The first wiring resistance R1S is a wiring resistance for connecting the first transparent electrode layer 22 to the drive circuit 31. The second wiring resistance R5S is a wiring resistance for connecting the second transparent electrode layer 23 to the drive circuit 31.

[0142] The load circuit includes a first ground resistance R12S and a second ground resistance R13S. The first ground resistance R12S is a resistance for connecting the first transparent electrode layer 22 to the ground potential. The second ground resistance R13S is a resistance for connecting the second transparent electrode layer 23 to the ground potential. The first ground resistance R12S and the second ground resistance R13S are caused by moisture or foreign matter that separately connects the transparent electrode layers 22 and 23 to the surrounding environment where the dimming sheet 20 is installed.

[0143] The load circuit includes a first contact resistance R2S and a second contact resistance R6S. The first contact resistance R2S is a resistance connected in series with the first wiring resistance R1S and is the contact resistance between the first transparent electrode layer 22 and the wiring. The second contact resistance R6S is a resistance connected in series with the second wiring resistance R5S and is the contact resistance between the second transparent electrode layer 23 and the wiring.

[0144] The load circuit includes a first input terminal electrode resistance R3S and a first peripheral electrode resistance R4S. The first input terminal electrode resistance R3S and the first peripheral electrode resistance R4S are resistances in a part of the first transparent electrode layer 22 respectively. The first input terminal electrode resistance R3S and the first peripheral electrode resistance R4S form a series circuit which is the equivalent circuit of the first transparent electrode layer 22.

[0145] The load circuit includes a second input terminal electrode resistance R7S and a second peripheral electrode resistance R8S. The second input terminal electrode resistance R7S and the second peripheral electrode resistance R8S are resistances in a part of the second transparent electrode layer 23 respectively. The second input terminal electrode resistance R7S and the second peripheral electrode resistance R8S form a series circuit which is the equivalent circuit of the second transparent electrode layer 23.

[0146] The load circuit includes an input terminal liquid crystal capacitance C1S, an internal liquid crystal capacitance C2S, and an edge liquid crystal capacitance C3S. The load circuit includes an input terminal liquid crystal resistance R9S, an internal liquid crystal resistance R10S, and an edge liquid crystal resistance R11S.

[0147] The input terminal liquid crystal capacitance C1S and the input terminal liquid crystal resistance R9S are a parallel circuit connecting the first transparent electrode layer 22 and the second transparent electrode layer 23, and connect the first contact resistance R2S and the second contact resistance R6S. The internal liquid crystal capacitance C2S and the internal liquid crystal resistance R10S are a parallel circuit connecting the first transparent electrode layer 22 and the second transparent electrode layer 23, and connect the first input terminal electrode resistance R3S and the second input terminal electrode resistance R7S. The edge liquid crystal capacitance C3S and the edge liquid crystal resistance R11S are a parallel circuit connecting the first transparent electrode layer 22 and the second transparent electrode layer 23, and connect the first peripheral electrode resistance R4S and the second peripheral electrode resistance R8S.

[0148] Using the equivalent circuit described above, a square wave was input between the first terminal PaS and the second terminal PbS, and the current flowing through the first wiring resistance R1S was used as the detection current to obtain the temporal change of the detection current by circuit simulation. At this time, as the drive signal SVD which is a square wave, 0V was set for the low level, 80V for the high level, and 50Hz (cycle TS = 20msec) for the frequency. Also, the following reference values were used as the characteristic values of the circuit elements constituting the equivalent circuit. First wiring resistance R1S: 5 Ω Second wiring resistance R5S: 5 Ω First ground resistance R12S: 500 kΩ Second ground resistance R13S: 500 kΩ First contact resistance R2S: 20 Ω Second contact resistance R6S: 20 Ω First input terminal electrode resistance R3S: 10 Ω First peripheral electrode resistance R4S: 10 Ω Second input terminal electrode resistance R7S: 10 Ω Second peripheral electrode resistance R8S: 10 Ω Input terminal liquid crystal capacitance C1S: 10 μF Internal liquid crystal capacitance C2S: 10 μF Edge liquid crystal capacitance C3S: 10 μF Input terminal liquid crystal resistance R9S: 500 kΩ Internal liquid crystal resistance R10S: 500 kΩ Edge liquid crystal resistance R11S: 500 kΩ

[0149] Figure 9 shows the temporal change of the detection current when the resistance value of the first contact resistance R2S is changed from the reference value to 100 Ω. That is, Figure 9 shows the temporal change of the detection current when [B] high resistance occurs in the transmission line.

[0150] As shown by the solid line in Figure 9, when the resistance value of the first contact resistance R2S is the reference value, the detection current has a peak current value Ipk immediately after the inversion of the drive signal SVD. As shown by the dashed line in Figure 9, when the resistance value of the first contact resistance R2S is 50 Ω, which is higher than the reference value, the detection current during the inversion period TS has a peak current value lower than that when the resistance value of the first contact resistance R2S is the reference value immediately after the inversion of the drive signal SVD. Also, as shown by the dash-dotted line in Figure 9, when the resistance value of the first contact resistance R2S is 100 Ω, which is even higher, the detection current has an even lower peak current value immediately after the inversion of the drive signal SVD.

[0151] As shown in FIG. 10, the peak current value Ipk of the detection current is lower as the resistance value of the first contact resistance R2S is higher. In other words, an increase in the resistance value in the transmission member or an increase in the contact resistance value between the transmission members, such as the first contact resistance R2S, can be said to appear as a decrease in the peak value in the source current or a decrease in the peak value in the sink current.

[0152] In addition, even in the temporal change of the detection current when the capacitance value of the input terminal liquid crystal capacitance C1S is changed from 0 μF to the reference value, a tendency similar to the change in the resistance value of the first contact resistance R2S was observed. That is, it was confirmed that the lower the capacitance value of the input terminal liquid crystal capacitance C1S, the lower the peak value of the detection current immediately after the inversion of the drive signal SVD. Thus, also regarding the capacitance value of the liquid crystal, it can be said that a decrease in the capacitance value appears as a decrease in the peak value in the source current or a decrease in the peak value in the sink current.

[0153] From the above, if the lower limit value of the peak value when the resistance value in the transmission member, the contact resistance value between the transmission members, and the capacitance value of the liquid crystal are normal is set to the first determination threshold Ith1, it can be said that [B] whether or not an abnormality occurs during inversion is detected.

[0154] FIG. 11 shows the temporal change of the detection current when the resistance value of the edge liquid crystal resistance R11S is changed from 0 Ω to the reference value. That is, FIG. 11 shows [C] the temporal change of the detection current when a micro short circuit occurs.

[0155] As shown by the solid line in FIG. 11, when the resistance value of the edge liquid crystal resistance R11S is 0 Ω, the detection current has a reach current value Isa immediately before the inversion of the drive signal SVD. As shown by the dashed line in FIG. 10, when the resistance value of the edge liquid crystal resistance R11S is 50 Ω, which is higher than 0 Ω, the detection current has a reach current value lower than that when the resistance value of the edge liquid crystal resistance R11S is 0 Ω immediately before the inversion of the drive signal SVD. Further, as shown by the two-dot chain line in FIG. 11, when the resistance value of the edge liquid crystal resistance R11S is even higher at the reference value, the detection current has an even lower reach current value immediately before the inversion of the drive signal SVD.

[0156] As shown in FIG. 12, the peak current value Isa of the detection current is lower as the resistance value of the edge liquid crystal resistor R11S is higher. In other words, the occurrence of a micro short circuit, such as the edge liquid crystal resistor R11S, can be said to appear as an increase in the convergence value in the source current or an increase in the convergence value in the sink current.

[0157] From the above, if the lower limit value of the convergence value when a micro short circuit is recognized between the first transparent electrode layer 22 and the second transparent electrode layer 23 is set to the second determination threshold Ith2, it can be said that [C] whether or not an abnormal inversion occurs is detected.

[0158] FIG. 13 shows the temporal change of the detection current when the resistance value of the second ground resistor R13S is changed from 100 Ω to the reference value of 100 Ω. That is, FIG. 13 shows the temporal change of the detection current when the transparent electrode layer is grounded.

[0159] As shown in FIG. 13, when the resistance value of the second ground resistor R13S is 100 Ω and when the resistance value of the second ground resistor R13S is the reference value, they show equal peak current values and have equal peak current values Isa.

[0160] From the above, whether the first transparent electrode layer 22 is grounded or the second transparent electrode layer 23 is grounded, the respective groundings can be said not to be involved in the failure determination result based on the peak value and the failure determination result based on the convergence value.

[0161] According to the above embodiment, the following effects can be obtained. (1) The application of the repair voltage VLR, which is higher than the drive voltage VLD, causes a larger current to flow through the location where the micro short circuit occurs than when the drive voltage VLD is applied. And the supply of the large current by the application of the repair voltage VLR electrically cuts off the micro short circuit. Therefore, when an [C] abnormal convergence due to the micro short circuit is detected, if the voltage between the transparent electrode layers 22 and 23 changes from the drive voltage VLD to the repair voltage VLR, the micro short circuit can be repaired.

[0162] (2) Since the application of the repair voltage VLR is notified by the failure state display circuit 33, the safety of the operation is enhanced during the repair of the dimming sheet to which the high-voltage repair voltage VLR is applied. (3) The convergence value of the detected current is compared with the second determination threshold Ith2, and the detection of a convergence value larger than the second determination threshold Ith2 is treated as the presence of a micro short circuit. Thereby, the presence of the micro short circuit is detected more appropriately.

[0163] (4) When it is detected that the peak value of the detected current is equal to or less than the first determination threshold Ith1 as an [B]abnormality during inversion, and the presence of the [B]abnormality during inversion is detected, the voltage application between the transparent electrode layers 22 and 23 is stopped. Thereby, it becomes possible to prompt an appropriate response to the [B]abnormality during inversion that cannot be repaired by applying the repair voltage VLR to the user of the dimming sheet 20. Also, the unnecessary application of the high-voltage repair voltage VLR can be suppressed.

[0164] Note that the above embodiment can also be implemented with the following modifications. [External power supply] · When the supply voltage of the external power supply 50 is a DC voltage of 24V, the transformer circuit 11 converts the DC voltage to the input level of the control power supply creation circuit 14. The transformer circuit 11 outputs the converted DC voltage to the first boost circuit 12, the second boost circuit 13, and the control power supply creation circuit 14, respectively. Note that when the output voltage of the external power supply 50 is the input level of the boost circuit and the control power supply creation circuit 14, the transformer circuit 11 may be omitted, and the first boost circuit 12, the second boost circuit 13, and the control power supply creation circuit 14 may be connected to the external power supply 50, respectively.

[0165] [Timing control circuit 15] · The timing control circuit 15 uses a clock signal to generate an inversion control signal SIGR for the alignment between the polarity inversion timing of the drive voltage generation circuit 16 and the start of the first sample extraction period TSM1. On the other hand, the alignment between the polarity inversion timing of the drive voltage generation circuit 16 and the start of the first sample extraction period TSM1 can also be performed based on the monitoring of the drive signal SVD by the clock generation circuit 18. That is, the clock generation circuit 18 may detect the zero-crossing timing in the drive signal SVD and align the detected timing with the start of the first sample extraction period TSM1.

[0166] · The timing control circuit 15 uses a clock signal to generate an inversion control signal SIGR for the alignment between the polarity inversion timing of the drive voltage generation circuit 16 and the end of the second sample extraction period TSM2. On the other hand, the alignment between the polarity inversion timing of the drive voltage generation circuit 16 and the end of the second sample extraction period TSM2 can also be performed based on the monitoring of the drive signal SVD by the clock generation circuit 18. That is, the clock generation circuit 18 may detect the zero-crossing timing in the drive signal SVD and align the detected timing with the end of the second sample extraction period TSM2.

[0167] [Repair signal SVR] · The power supply circuit 10 may change the repair signal SVR into a DC voltage signal. For example, every time an abnormality during [C] convergence is detected, the failure determination circuit 32 may input a repair request signal SIGS to the timing control circuit 15 for a predetermined time. When receiving the repair request signal SIGS, the timing control circuit 15 may stop the output of the inversion control signal SIGR. With the stop of the input of the inversion control signal SIGR, the drive voltage generation circuit 16 may output a DC voltage signal as the repair signal SVR. The current detection circuit 35 continuously applies a repair voltage VLR to the short-circuited minute portion for a predetermined time as the supply of the DC voltage signal. According to this, compared with the supply of the repair signal SVR in which the polarity inversion is repeated, the insulation of the short-circuited minute portion is performed in a short time.

[0168] For example, every time an abnormality at convergence is detected, the failure determination circuit 32 may input a repair request signal SIGS to the drive voltage generation circuit 16 for a predetermined time. When receiving the repair request signal SIGS, the drive voltage generation circuit 16 may stop the processing based on the inversion control signal SIGR and prioritize the processing based on the repair request signal SIGS. The processing based on the repair request signal SIGS outputs a repair voltage VLR for a predetermined time. The current detection circuit 35 continues to apply the repair voltage VLR to the short-circuited minute portion for a predetermined time as the supply of the DC voltage signal. According to this, compared with the supply of the repair signal SVR in which the inversion of the repair voltage VLR is repeated, the insulation of the short-circuited minute portion is performed in a short time.

[0169] [Determination of Repairability] · The processor of the power supply circuit 10 may determine the repairability of the repair by the supply of the repair signal SVR based on the number of times the repair signal SVR is supplied. When determining that the repair by the supply of the repair signal SVR is impossible, the processor of the power supply circuit 10 may cause the failure state display circuit 33 to display that the repair by the supply of the repair signal SVR is impossible.

[0170] According to this, when the repair of the minute short circuit by the application of the repair voltage VLR is impossible, the user can grasp that the repair of the minute short circuit is impossible by the application of the repair voltage VLR. Therefore, it is possible to prevent the user from repeatedly applying the repair voltage VLR, which is a high voltage, unnecessarily.

[0171] For example, when the previous repair request signal SIGS and the current repair request signal SIGS are consecutive within the failure determination period, the processor of the power supply circuit 10 may count up the number of times the repair request signal SIGS is output. That is, when a failure is detected each time step S12 is executed, the processor of the power supply circuit 10 may count up the number of times the repair request signal SIGS is output. The processor of the power supply circuit 10 may determine that repair by supplying the repair signal SVR is possible until the number of times the repair request signal SIGS is output reaches a predetermined number. On the other hand, when the number of times the repair request signal SIGS is output reaches the predetermined number, the processor of the power supply circuit 10 may determine that repair by supplying the repair signal SVR is impossible and stop the supply of the repair signal SVR and the drive signal SVD.

[0172] Thereby, when repair of the micro short circuit by applying the repair voltage VLR is impossible, the voltage application between the transparent electrode layers 22 and 23 is stopped, so that it is suppressed that the voltage is continuously applied between the transparent electrode layers 22 and 23 in a state where the micro short circuit exists.

[0173] · The processor of the power supply circuit 10 may determine the possibility of repair by supplying the repair signal SVR based on the supply time of the repair voltage VLR. When the processor of the power supply circuit 10 determines that repair by supplying the repair signal is impossible, it may cause the failure state display circuit 33 to display that repair by supplying the repair signal SVR is impossible.

[0174] According to this, when repair of the micro short circuit by applying the repair voltage VLR is impossible, the user can grasp that repair of the micro short circuit is impossible by applying the repair voltage VLR. Therefore, it is suppressed that the user repeatedly applies the repair voltage VLR, which is a high voltage, unnecessarily.

[0175] For example, when the previous repair request signal SIGS and the current repair request signal SIGS are consecutive within the failure determination period, the processor of the power supply circuit 10 may calculate the total time for which the repair signal SVR has been supplied. That is, when a failure is detected each time step S12 is executed, the processor of the power supply circuit 10 may calculate the total supply time of the repair signal SVR. The processor of the power supply circuit 10 may determine that repair by the supply of the repair signal SVR is possible until the total supply time of the repair signal SVR reaches a predetermined time. On the other hand, when the total supply time of the repair signal SVR reaches the predetermined time, the processor of the power supply circuit 10 may determine that repair by the supply of the repair signal SVR is impossible and stop the supply of the repair signal SVR and the drive signal SVD.

[0176] Also by this, when repair of the micro short circuit by application of the repair voltage VLR is impossible, voltage application between the transparent electrode layers 22 and 23 is stopped, so that it is suppressed that voltage continues to be applied between the transparent electrode layers 22 and 23 in a state where a micro short circuit exists.

[0177] · When the supply time Ta of the repair signal SVR reaches the set time Tp, the processor of the power supply circuit 10 stops the output of the repair request signal SIGS to the failure determination circuit 32. Then, the processor of the power supply circuit 10 switches the signal supplied to the dimming sheet 20 from the repair signal SVR to the drive signal SVD. At this time, when the failure determination circuit 32 does not detect a failure after the supply of the drive signal SVD, the processor of the power supply circuit 10 may cause the failure state display circuit 33 to externally display that the abnormality at convergence has been repaired, that is, that the repair of the micro short circuit has been completed.

[0178] According to this, the user of the dimming sheet 20 can grasp that the repair of the micro short circuit has been completed. And the repair device of the dimming sheet can also prompt the user about the response after the repair of the micro short circuit. As a result, it is possible to make the period for applying the high voltage repair voltage an appropriate length, and to make the period for stopping the drive of the dimming sheet for repair an appropriate length.

[0179] [Failure determination] · The power supply circuit 10 may be configured to detect [A] system leakage and [C] abnormal convergence, and may also be configured without the configuration to detect [B] abnormal inversion. Further, the power supply circuit 10 may be configured to detect [B] abnormal inversion and [C] abnormal convergence, and may also be configured without the configuration to detect [A] system leakage. Further, the power supply circuit 10 may be configured to detect [C] abnormal convergence, and may also be configured without the configurations to detect [A] system leakage and [B] abnormal inversion.

[0180] · The power supply circuit 10 may detect a micro short circuit based on an electrical characteristic value other than the convergence value of the detected current. For example, the power supply circuit 10 may adopt the time change of the detected current as the second characteristic value.

[0181] As shown in FIG. 11, the lower the resistance value of the edge liquid crystal resistor R11S, the shorter the period during which the detected current decreases. Therefore, the power supply circuit 10 sets a threshold value for the length of the period that satisfies that the decrease per unit time of the detected current is equal to or greater than a predetermined value, and when a current decrease equal to or greater than the predetermined value is detected over a period longer than the threshold value, it may be determined that there is no micro short circuit. Further, the power supply circuit 10 may determine that a micro short circuit exists when the current decrease equal to or greater than the predetermined value is within a period equal to or less than the threshold value.

[0182] Note that, as shown in FIG. 11, the period in which a difference is recognized in the convergence value of the detected current is longer than the period in which a difference is recognized in the decrease per unit time of the detected current. Therefore, if it is a configuration that detects a micro short circuit based on the fact that the convergence value of the detected current described above is greater than the threshold value, the presence of the micro short circuit can be accurately detected.

[0183] · The power supply circuit 10 may detect an increase in the transmission line resistance based on an electrical characteristic value other than the peak value of the detected current. For example, the power supply circuit 10 may adopt the time change of the detected current as the first characteristic value.

[0184] As shown in FIG. 9, the lower the resistance value of the first contact resistance R2S, the greater the decrease in the detection current from the peak. Therefore, the power supply circuit 10 may set a threshold for the decrease per unit time of the detection current, and when the decrease per unit time is greater than the threshold, it may be determined that there is no micro short circuit. Further, when the decrease per unit time is equal to or less than the threshold, the power supply circuit 10 may determine that there is a micro short circuit.

[0185] · The failure state display circuit 33 is an example of the notification unit, and may notify that a failure has occurred by display and voice, or may notify only by voice. [Repair device] · The dimming sheet 20 may be in a state of being attached to the transparent body, may be in a state before being attached to the transparent body, or may be in a state of being inspected during the manufacturing process of the dimming sheet 20. The transparent body is, for example, a glass plate or a resin plate. The repair device for the dimming sheet may be applied to the driving device for the dimming sheet or may be applied to the inspection device for the dimming sheet. The repair method for the dimming sheet may be applied to the driving method for the dimming sheet or may be applied to the inspection method for the dimming sheet.

[0186] When the planar dimming sheet 20 is attached to the curved transparent body, a tension acts on the dimming sheet 20 to narrow the distance between the transparent electrode layers 22 and 23. Such tension is likely to cause a micro short circuit due to conductive foreign matter present in the gap between the transparent electrode layers 22 and 23. Therefore, the repair device for the dimming sheet and the repair method for the dimming sheet targeting the dimming sheet 20 attached to the curved transparent body make the effect of cutting off the micro short circuit more remarkable.

Explanation of symbols

[0187] VLD… Driving voltage VLR… Repair voltage 10… Power supply circuit 11… Transformer circuit 12… First boosting circuit 13… Second boosting circuit 14… Control power supply creation circuit 15…Timing control circuit 16…Drive voltage generation circuit 17…Switching circuit 18…Clock generation circuit 20…Dimming sheet 21…Dimming layer 22…First transparent electrode layer 23…Second transparent electrode layer 31…Drive circuit 32…Fault determination circuit 33…Fault state display circuit 35…Current detection circuit

Claims

1. A voltage application unit that applies a driving voltage for driving the liquid crystal compound between the transparent electrode layers of a dimming sheet provided with a liquid crystal compound between the transparent electrode layers; A detection unit that detects a current flowing between the transparent electrode layers by applying the driving voltage and detects the presence of a micro short circuit between the transparent electrode layers based on the detected current; A voltage changing unit that changes the voltage applied between the transparent electrode layers from the driving voltage to a repair voltage higher than the driving voltage when the detection unit detects the presence of the micro short circuit, comprising: The detection unit detects that the peak value of the detected current is equal to or less than a predetermined threshold as an increase in the contact resistance between the transparent electrode layer and the external wiring, When the detection unit detects the increase in the contact resistance, the voltage application unit stops applying a voltage between the transparent electrode layers A repair device for a dimming sheet.

2. Further comprising a notification unit that notifies that the voltage application unit has changed the voltage applied between the transparent electrode layers from the driving voltage to the repair voltage The repair device for a dimming sheet according to claim 1.

3. After the voltage changing unit changes the voltage applied between the transparent electrode layers to the repair voltage, the voltage changing unit returns the voltage applied between the transparent electrode layers to the driving voltage, When the detection unit detects the absence of the micro short circuit in a state where the voltage applied between the transparent electrode layers has been returned to the driving voltage, the notification unit notifies that the repair of the micro short circuit is completed The repair device for a dimming sheet according to claim 2.

4. After the voltage changing unit changes the voltage applied between the transparent electrode layers to the repair voltage, the voltage changing unit returns the voltage applied between the transparent electrode layers to the driving voltage, When the detection unit detects the presence of the micro short circuit again in a state where the voltage applied between the transparent electrode layers has been returned to the driving voltage, the voltage application unit stops applying a voltage between the transparent electrode layers The repair device for the dimming sheet according to claim 2 or 3.

5. When the voltage change unit stops applying a voltage between the transparent electrode layers, the notification unit notifies that it is impossible to repair the micro short circuit. The repair device for the dimming sheet according to claim 4.

6. The detection unit detects that the converged value of the detected current is greater than a predetermined threshold as a failure in which a micro short circuit exists between the transparent electrode layers. The repair device for the dimming sheet according to any one of claims 1 to 5.

7. applying a driving voltage for driving a liquid crystal compound provided between the transparent electrode layers of the dimming sheet between the transparent electrode layers; detecting a current flowing between the transparent electrode layers by applying the driving voltage, and when it is detected that a micro short circuit exists between the transparent electrode layers based on the detected current, changing the voltage applied between the transparent electrode layers from the driving voltage to a repair voltage higher than the driving voltage; detecting that the peak value of the detected current is equal to or less than a predetermined threshold as an increase in the contact resistance between the transparent electrode layer and the external wiring; further including stopping applying a voltage between the transparent electrode layers when an increase in the contact resistance is detected. A method for repairing a dimming sheet.

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