Automated Analog and Mixed-Signal Circuit Design and Verification
Machine learning models enable efficient conversion of analog circuits across process technologies by predicting performance and physical parameters, addressing the challenges of scaling analog circuits and reducing manual redesign efforts.
Patent Information
- Application Number
- JP2022576367
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-04-30
- Filing Date
- 2021-06-07
- Publication Date
- 2025-08-21
- Estimated Expiration
- 2041-06-07
AI Technical Summary
Scaling analog circuits between different semiconductor process nodes is challenging due to voltage headroom, gain degradation, and nonlinear interactions between components, requiring extensive manual redesign and simulation.
Utilizing machine learning (ML) models to predict sub-circuit performance parameters and transform circuits across process technologies by converting sub-circuit physical parameters, leveraging trained ML models for predicting performance parameters and physical parameters in different process technologies.
Facilitates automated and efficient conversion of analog circuits between process technologies, reducing manual effort and improving design accuracy through iterative simulation and parameter adjustments.
Smart Images

Figure 0007727158000005 
Figure 0007727158000006 
Figure 0007727158000007
Abstract
Description
[Technical Field]
[0001] Analog circuits are often used to sense, interact with, and / or control real-world signals. Real-world signals or information are analog because they are continuous quantities. For example, temperature varies over an infinite range (e.g., has infinite values) rather than just discrete integer values. In contrast, digital circuits operate with the discrete values 1 and 0 used to represent analog signals or information. To help digital circuits handle analog signals or information, digital circuits can interact with or incorporate analog circuits. For example, a temperature sensor may include one or more analog circuits for sampling temperature, one or more hybrid circuits for converting the sampled temperature to a digital value, and one or more digital circuits for processing the digital value. Similarly, a digital circuit may process an audio file, a hybrid circuit may perform digital-to-analog conversion, an analog circuit may amplify the analog signal, and a speaker may output the actual sound encoded in the audio file. It should be understood that, as used herein, analog circuitry can refer to either analog circuits or hybrid circuits (e.g., mixed-signal circuits) that may include both analog and digital portions.
[0002] As integrated circuits advance, the number of components that can fit into the area of a semiconductor die is rapidly increasing. This reduction in size, also known as die shrink, helps reduce costs and improve the performance of the resulting integrated circuit chip. While die shrink and semiconductor scaling techniques are relatively straightforward for digital circuits, scaling analog circuits is much more difficult. For example, analog circuits may be substantially more affected by voltage headroom, gain degradation, signal-to-noise ratio adjustments, etc., compared to digital circuits. The circuit geometry and configuration in an analog or hybrid sub-circuit, such as a differential pair, may not only affect the performance of the differential pair but also the performance of other sub-circuits, such as current mirrors, in other parts of the overall circuit. Also, different process nodes or semiconductor process technologies may affect how circuit geometry and configuration affect performance. Depending on the overall circuit objectives, this performance difference may be unacceptable. Scaling between different-sized process nodes may also affect sub-circuits differently, such that each sub-circuit, or even individual components, may have different scale factors. Some analog circuits may require extensive manual modifications or redesign when attempting to scale a design between process nodes. Summary of the Invention
[0003] The present disclosure relates to techniques for designing circuits. More particularly, but not by way of limitation, aspects of the present disclosure relate to a method including: receiving a data object representing a circuit for a first process technology, the circuit including a first subcircuit, the first subcircuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first subcircuit in the data object by comparing the first topology with a stored topology associated with the first process technology; identifying subcircuit physical parameter values associated with the first and second electrical components of the first subcircuit; determining a set of subcircuit performance parameter values for the first subcircuit based on a first machine learning (ML) model of the first subcircuit and the identified subcircuit physical parameters; converting the identified first subcircuit to a second subcircuit for a second process technology based on the determined set of subcircuit performance parameter values; and outputting the second subcircuit.
[0004] Another aspect of the present disclosure relates to a non-transitory program storage device including instructions stored therein to cause one or more processors to perform the following acts: receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology with stored topologies associated with the first process technology; identifying sub-circuit physical parameter values associated with the first and second electrical components of the first sub-circuit; determining a set of sub-circuit performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified sub-circuit physical parameters; transforming the identified first sub-circuit into a second sub-circuit for a second process technology based on the determined set of sub-circuit performance parameter values; and outputting the transformed second sub-circuit.
[0005] Another aspect of the present disclosure relates to an electronic device including a memory and one or more processors operatively coupled to the memory, the one or more processors configured to execute instructions to cause the one or more processors to perform the following acts: receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; and associating the first topology with a stored topology associated with the first process technology. identifying a first sub-circuit in the data object by comparing it to a first electrical component and a second electrical component of the first sub-circuit; identifying sub-circuit physical parameter values associated with a first electrical component and a second electrical component of the first sub-circuit; determining a set of sub-circuit performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified sub-circuit physical parameters; transforming the identified first sub-circuit into a second sub-circuit for a second process technology based on the determined set of sub-circuit performance parameter values; and outputting the transformed second sub-circuit.
[0006] Another aspect of the present disclosure relates to a method including: receiving a data object representing a circuit, the circuit including a sub-circuit including a first electrical component and a second electrical component arranged in a first topology; receiving a set of stored topologies; identifying the first electrical component, the second electrical component, and a connection between the first electrical component and the second electrical component; determining a coupling between the first electrical component and the second electrical component based on the connection of the first electrical component; determining a first topology based on the identified first electrical component, the identified second electrical component, the determined coupling between the first electrical component and the second electrical component, and a topology of the set of stored topologies; and outputting the identified first topology.
[0007] Another aspect of the present disclosure relates to a non-transitory program storage device, the non-transitory program storage device including instructions stored thereon to cause one or more processors to perform the following acts: receive a data object representing a circuit including a sub-circuit, the sub-circuit including a first electrical component and a second electrical component arranged in a first topology; receive a set of stored topologies; identify the first electrical component, the second electrical component, and a connection of the first electrical component and the second electrical component based on a connection of the first electrical component and the second electrical component; determine a connection of the first electrical component and the second electrical component; determine a first topology based on a comparison between the identified first electrical component, the identified second electrical component, the determined connection of the first electrical component and the second electrical component, and the set of stored topologies; and output the identified first topology.
[0008] Another aspect of the present disclosure relates to an electronic device including a memory and one or more processors operably coupled to the memory, the one or more processors configured to execute instructions that cause the one or more processors to perform the following acts: receive a data object representing a circuit including a sub-circuit, the sub-circuit including a first electrical component and a second electrical component arranged in a first topology, receive a set of stored topologies, identify the first electrical component, the second electrical component, and a connection of the first electrical component and the second electrical component, determine a coupling between the first electrical component and the second electrical component based on the connection of the first electrical component, determine a first topology based on a comparison between the identified first electrical component, the identified second electrical component, the determined coupling between the first electrical component and the second electrical component, and a topology of the set of stored topologies, and output the identified first topology.
[0009] Another aspect of the present disclosure relates to a method including receiving a data object representing a circuit for a process technology, the circuit including a first sub-circuit, the first sub-circuit including first and second electrical components arranged in a first topology; identifying the first sub-circuit in the circuit by comparing the first topology to a stored topology associated with the first process technology; identifying a first set of physical parameter values associated with the first and second electrical components of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of physical parameter values; converting the identified first sub-circuit to a second sub-circuit for the process technology based on the determined set of performance parameter values, the second sub-circuit having third and fourth electrical components arranged in a second topology; and outputting the second sub-circuit.
[0010] Another aspect of the present disclosure relates to a non-transitory program storage device including instructions that cause one or more processors to perform the following acts: receive a data object representing a circuit for a process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identify a type of the first sub-circuit based on a connection of the first electrical component and the second electrical component; and identify a type of the first sub-circuit in the circuit by comparing the first topology with stored topologies associated with the first process technology. identifying a first set of physical parameter values associated with the first electrical component and the second electrical component of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of physical parameter values; converting the identified first sub-circuit into a second sub-circuit for the process technology based on the determined set of performance parameter values, the second sub-circuit having a third electrical component and a fourth electrical component arranged in a second topology; and outputting the second sub-circuit.
[0011] Another aspect of the present disclosure relates to an electronic device including a memory and one or more processors operatively coupled to the memory, the one or more processors configured to cause the one or more processors to perform the following acts: These acts include receiving a data object representing a circuit for a process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying a type of the first sub-circuit based on a connection of the first electrical component and the second electrical component; identifying the first sub-circuit in the circuit by comparing the first topology to a stored topology associated with the first process technology; identifying a first set of physical parameter values associated with the first and second electrical components of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of physical parameter values; converting the identified first sub-circuit into a second sub-circuit for the process technology based on the determined set of performance parameter values, the second sub-circuit having a third electrical component and a fourth electrical component arranged in a second topology; and outputting the second sub-circuit.
[0012] Another aspect of the present disclosure relates to a method that includes receiving an indication of a subcircuit type and a set of subcircuit performance parameter values, determining a subcircuit topology based on the subcircuit type and the set of subcircuit performance parameter values, determining a set of subcircuit physical parameter values based on a first machine learning (ML) model of the subcircuit topology and the set of subcircuit performance parameter values, generating a data object representing the subcircuit based on the determined set of subcircuit physical parameter values and the determined subcircuit topology, and outputting the data object.
[0013] Another aspect of the present disclosure relates to a non-transitory program storage device, the non-transitory program storage device including instructions that cause one or more processors to perform the following acts: receive an indication of a subcircuit type and a set of subcircuit performance parameter values; determine a subcircuit topology based on the subcircuit type and the set of subcircuit performance parameter values; determine a set of subcircuit physical parameter values based on a first machine learning (ML) model of the subcircuit topology and the set of subcircuit performance parameter values; generate a data object representing the subcircuit based on the determined set of subcircuit physical parameter values and the determined subcircuit topology; and output the data object.
[0014] Another aspect of the present disclosure relates to an electronic device that includes a memory and one or more processors operably coupled to the memory, the one or more processors configured to execute instructions that cause the one or more processors to perform the following acts: receive an indication of a subcircuit type and a set of subcircuit performance parameter values; determine a subcircuit topology based on the subcircuit type and the set of subcircuit performance parameter values; determine a set of subcircuit physical parameter values based on a first machine learning (ML) model of the subcircuit topology and the set of subcircuit performance parameter values; generate a data object representing the subcircuit based on the determined set of subcircuit physical parameter values and the determined subcircuit topology; and output the data object.
[0015] Another aspect of the present disclosure includes a method including receiving a first set of sub-circuit physical parameters for electrical components of the sub-circuit and an indication of a first process technology; determining first variations of the sub-circuit physical parameters for the electrical components of the structural sub-circuit, the first variations including at least one sub-circuit physical parameter that varies from a sub-circuit physical parameter of the first set of sub-circuit physical parameters; simulating the first variations of the sub-circuit physical parameters in the first process technology to generate a first set of sub-circuit performance parameter values associated with the first variations; training a machine learning (ML) model of the structural sub-circuit based on the set of variations, the set of variations including the first variation and a set of sub-circuit physical parameter values associated with the first variation, for the first process technology; and storing the trained ML model.
[0016] Another aspect of the present disclosure relates to a non-transitory program storage device including instructions for causing one or more processors to perform the following acts: receive a first set of sub-circuit physical parameters for electrical components of the sub-circuit and an indication of a first process technology; determine first variations of the sub-circuit physical parameters for the electrical components of the structural sub-circuit, the first variations including at least one sub-circuit physical parameter that varies from a sub-circuit physical parameter of the first set of sub-circuit physical parameters; simulate the first variations of the sub-circuit physical parameters for the first process technology to generate a first set of sub-circuit performance parameter values associated with the first variations; train a machine learning (ML) model of the structural sub-circuit based on the set of variations, the set of variations including the first variation for the first process technology and a set of sub-circuit physical parameters associated with the first variation; and store the trained ML model.
[0017] Another aspect of the present disclosure relates to an electronic device including a memory and one or more processors operably coupled to the memory, the one or more processors configured to execute instructions to cause the one or more processors to perform the following acts: receiving a first set of sub-circuit physical parameters for an electrical component of the sub-circuit and an indication of a first process technology, determining first variations of the sub-circuit physical parameters for the electrical component of the structural sub-circuit, the first variation including at least one sub-circuit physical parameter that varies from a sub-circuit physical parameter of the first set of sub-circuit physical parameters, simulating the first variations of the sub-circuit physical parameters for the first process technology to generate a first set of sub-circuit performance parameter values associated with the first variations, training a machine learning (ML) model of the structural sub-circuit based on the set of variations, the set of variations including the first variation for the first process technology and a set of sub-circuit physical parameters associated with the first variation, and storing the trained ML model.
[0018] Another aspect of the present disclosure relates to a method comprising: receiving an initial set of parameters associated with a sub-circuit; interacting a first parameter of the initial set of parameters with other parameters of the initial set of parameters to generate an interacted parameter set; adding the interacted parameter to the initial set of parameters to generate a candidate set of parameters; performing a linear regression on parameters of the candidate set of parameters against a set of expected parameter values to determine predicted values for the parameters of the candidate set of parameters; removing parameters of the candidate set of parameters based on a comparison between the predicted values and a predetermined prediction threshold; determining accuracy of the candidate set of parameters based on the linear regression; the accuracy of the candidate set of parameters reaches the predetermined accuracy level, outputting the candidate set of parameters if the accuracy of the candidate set of parameters reaches the predetermined accuracy level; if the accuracy of the candidate set of parameters does not reach the predetermined accuracy level, interacting a second parameter of the initial set of parameters with other parameters of the candidate set of parameters until the accuracy of the second candidate set of parameters reaches the predetermined accuracy or until each parameter of the initial set of parameters has been interacted with other parameters of the candidate set of parameters a predetermined number of times, adding the interacted parameter to the candidate set of parameters, repeating the linear regression, removing parameters, determining accuracy, and comparing accuracy steps, and outputting the candidate set of parameters.
[0019] Another aspect of the present disclosure relates to a non-transitory program storage device, the non-transitory program storage device including instructions stored on the non-transitory program storage device to cause one or more processors to perform the following acts: receive an initial set of parameters associated with a subcircuit; interacting a first parameter of the initial set of parameters with another parameter of the initial set of parameters to generate an interacted set of parameters; appending the interacted set of parameters to the initial set of parameters to generate a candidate set of parameters; performing a linear regression on the parameters of the candidate set of parameters against a set of expected parameter values to determine predicted values for the parameters of the candidate set of parameters; and evaluating the parameters of the candidate set of parameters based on a comparison between the predicted values and a predetermined prediction threshold. determining the accuracy of the candidate set of parameters based on the linear regression; comparing the accuracy of the candidate set of parameters to a predetermined accuracy level, where if the accuracy of the candidate set of parameters reaches the predetermined accuracy level, outputting the candidate set of parameters; if the accuracy of the candidate set of parameters does not reach the predetermined accuracy level, interacting a second parameter of the initial set of parameters with another parameter of the candidate set of parameters, adding the interacted parameter to the candidate set of parameters, performing the linear regression, removing the parameter, determining the accuracy, and comparing the accuracy until the accuracy of the second candidate set of parameters reaches the predetermined accuracy or until each parameter of the initial set of parameters has been interacted with another parameter of the candidate set a predetermined number of times; and outputting the candidate set of parameters.
[0020] Another aspect of the present disclosure relates to an electronic device including a memory and one or more processors operably coupled to the memory, the one or more processors configured to execute instructions that cause the one or more processors to perform the following acts: receiving an initial set of parameters associated with a subcircuit; interacting a first parameter of the initial set of parameters with another parameter of the initial set of parameters to generate an interacted parameter set; adding the interacted parameter to the initial set of parameters to generate a candidate set of parameters; performing a linear regression on parameters of the candidate set of parameters against a set of expected parameter values to determine predicted values for the parameters of the candidate set of parameters; and evaluating the parameters of the candidate set of parameters based on a comparison between the predicted values and a predetermined prediction threshold. determining the accuracy of the candidate set of parameters based on the linear regression; comparing the accuracy of the candidate set of parameters to a predetermined accuracy level; outputting the candidate set of parameters if the accuracy of the candidate set of parameters reaches the predetermined accuracy level; if the accuracy of the candidate set of parameters does not reach the predetermined accuracy level, interacting a second parameter of the initial set of parameters with other parameters of the candidate set of parameters until the accuracy of the second candidate set of parameters reaches the predetermined accuracy or until each parameter of the initial set of parameters has been interacted with other parameters of the candidate set of parameters a predetermined number of times; adding the interacted parameter to the candidate set of parameters; performing the linear regression;
[0021] For a detailed description of various examples, reference will now be made to the accompanying drawings. [Brief explanation of the drawings]
[0022] [Figure 1] 1 illustrates an example of circuit design evolution according to aspects of the present disclosure.
[0023] [Figure 2] FIG. 1 is a block diagram of an analog circuit according to an aspect of the present disclosure.
[0024] [Figure 3A] FIG. 2 is a circuit diagram of an example circuit block according to an aspect of the present disclosure. [Figure 3B] FIG. 2 is a circuit diagram of an example circuit block according to an aspect of the present disclosure.
[0025] [Figure 4] FIG. 1 is a circuit diagram illustrating a sub-circuit according to an aspect of the present disclosure.
[0026] [Figure 5] FIG. 1 is a block diagram of an example embodiment of a technique for automated analog and mixed-signal circuit design and verification according to aspects of the present disclosure.
[0027] [Figure 6] FIG. 1 is a block diagram of an example embodiment of a technique for automated analog and mixed-signal circuit design and verification according to aspects of the present disclosure.
[0028] [Figure 7A] 1 illustrates an example set of known input or gain stage topologies for a given process technology, in accordance with aspects of the present disclosure. [Figure 7B] 1 illustrates an example set of known input or gain stage topologies for a given process technology, in accordance with aspects of the present disclosure.
[0029] [Figure 8] FIG. 1 is a system diagram illustrating an overview of a technique for designing a new analog circuit from an original analog circuit, according to aspects of the present disclosure.
[0030] [Figure 9]FIG. 10 illustrates a set of performance parameters for a sub-circuit according to aspects of the present disclosure.
[0031] [Figure 10] 1 illustrates an example neural network ML model according to aspects of the present disclosure.
[0032] [Figure 11] 1 illustrates a series of ML model parameters for stepwise selection of thresholds, according to aspects of the present disclosure.
[0033] [Figure 12] 1 is a flowchart outlining a technique for designing a circuit according to an aspect of the present disclosure.
[0034] [Figure 13] 1 is a flowchart illustrating a technique for designing a circuit according to an aspect of the present disclosure.
[0035] [Figure 14] 1 is a flowchart illustrating a technique for designing a circuit according to an aspect of the present disclosure.
[0036] [Figure 15] 1 is a flowchart illustrating a technique for designing a circuit according to an aspect of the present disclosure.
[0037] [Figure 16] 1 is a flowchart illustrating a technique for designing a circuit according to an aspect of the present disclosure.
[0038] [Figure 17A] 1 is a flowchart illustrating a technique for designing a circuit according to an aspect of the present disclosure. [Figure 17B] 1 is a flowchart illustrating a technique for designing a circuit according to an aspect of the present disclosure.
[0039] [Figure 18] FIG. 1 is a block diagram of an example computing device according to an aspect of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION
[0040] Specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. In the following detailed description of embodiments of the present invention, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known features have not been described in detail to avoid unnecessarily complicating the description.
[0041] As digital circuits become more and more common in our lives, interfaces between these digital circuits and the real analog world become more prevalent. As improved manufacturing process technologies for producing semiconductors are developed, the size of digital circuits steadily shrinks, allowing digital circuits to utilize newer, smaller process technology nodes. Generally, a process technology node refers to the size of the transistor gate length for a particular semiconductor manufacturing process technology. However, analog circuits tend to shrink at a slower pace because analog circuits often require extensive redesign between different semiconductor manufacturing process technologies and / or process technology nodes (hereinafter referred to as process technologies) rather than a relatively simple size reduction. Circuits can also be modified to increase functionality. For example, a circuit may be modified to adjust the circuit's operating voltage to help reduce power requirements, or a circuit may be modified to extend the circuit's operating range. For a particular process technology, the aspects of each electrical component of an analog circuit and how the electrical components may interact with the characteristics of the manufacturing process can affect the performance of the overall circuit in ways that are nonlinear and difficult to predict. This makes it difficult to simply resize or replicate a circuit from one process technology to another. Likewise, these interactions make it difficult to implement modifications to the functionality of the circuit.
[0042] As digital and analog circuits become more common, manufacturing process technologies for producing semiconductors are evolving. FIG. 1 illustrates an example circuit design evolution 100 according to aspects of the present disclosure. In this example 100, a circuit 102 (individually 102A, 102B, and 102C, collectively 102) includes three sub-circuit blocks: a bandgap 104 (individually 104A, 104B, and 104C, collectively 104), an operational amplifier 106 (individually 106A, 106B, and 106C, collectively 106), and a driver 108 (individually 108A, 108B, and 108C, collectively 108). In this example, the circuit 102A may currently be implemented in a first process technology 110. The circuit 102 may be converted from the first process technology 110 to a second process technology 112 while maintaining the same overall operating specifications, such as operating voltage. For example, in this case, the circuit 102 may be converted from a first process technology 110 to a second process technology 112 while maintaining an operating voltage of 3.3V.
[0043] Also, in some cases, circuit 102 may be redesigned, for example, to increase functionality. In this example, circuit 102B may be redesigned as circuit 102C to reduce the operating voltage while using the same process technology, here second process technology 114. In some cases, the redesign of circuit 102 may include updated design specifications for electrical devices of particular sub-circuit blocks, such as operational amplifier 106C or bandgap 104C. In other cases, restructuring to adjust the circuit layout may be included, for example, as shown for driver 108C.
[0044] Currently, modifying a circuit design or converting a circuit design from one process technology to another is a largely manual process. For example, a circuit designer may have a set of design specifications that the circuit must meet. These design specifications may be based on the expected performance of the circuit, so, for example, an amplifier circuit may have design specifications for output resistance, distortion, impedance, etc. The designer may then convert each electronic component of the circuit by taking into account the physical parameters of the electronic components in the original process technology and determining the physical parameters of the electronic components in the target process technology. This determination is primarily based on experience and intuition. After the electronic components are converted to the target process technology, the completed circuit can be simulated against the design specifications using circuit simulation software such as Simulation Program with Integrated Circuit Emphasis (SPICE). If the converted circuit does not meet the design specifications, the circuit designer may adjust the circuit by, for example, changing the physical parameters of certain electronic components and simulating the circuit again. This adjustment is also primarily based on experience and intuition and is generally an iterative process. As used herein, electrical components should be understood to refer to components or devices that make up a circuit, such as transistors, resistors, capacitors, inductors, diodes, etc.
[0045] To help accelerate the effort of migrating analog circuits from one process to another, as well as the development of new and improved analog circuits, automated analog and mixed-signal circuit design and verification implementations are desired.
[0046] In some cases, a circuit may be represented visually, for example, by a circuit design or simulation program, but the underlying representation of the circuit may be in the form of one or more netlists or a hardware description language (HDL). A netlist or HDL is generally a list of the electrical components of the circuit and the nodes to which each electronic component is connected. In some cases, attributes, structural information, physical parameters, or other information may also be included in the netlist. In some embodiments, the netlist or HDL is stored in a data object.
[0047] Subcircuit
[0048] FIG. 2 is a block diagram 200 of an analog circuit according to an embodiment of the present disclosure. The analog circuit 202 is any type of analog or hybrid analog-digital circuit including multiple electrical components. In most embodiments, the analog circuit 202 processes, generates, transmits, or receives analog signals using one or more of the multiple electrical components within the analog circuit 202. The analog circuit 202 may be part of a larger circuit (e.g., an integrated circuit), or the analog circuit 202 may be an entire circuit (e.g., an integrated circuit). Typically, the analog circuit 202 is made up of one or more circuit blocks 204. Often, circuits are designed such that specific portions of the circuit perform specific tasks. For example, the circuit 202 may be divided into portions or circuit blocks 204 that perform specific functions. The circuit blocks 204 may be any type of intellectual property ("IP") block, IP core, functional block, or collection of components. In some embodiments, the circuit blocks 204 are circuits 202. Additionally, circuit blocks 204 may provide one or more functions for analog integrated circuit 202. In some embodiments, circuit blocks 204 are analog integrated circuits 202. These circuit blocks 204 may be described, for example, in a netlist in a manner similar to software functions and may be referenced, for example, by another netlist or circuit block that describes a larger portion of the circuit. In some cases, circuit blocks 204 may contain other circuit blocks.
[0049] Analog circuit 202 may include one or more sub-circuits, and circuit block 204 may also include one or more sub-circuits. In some embodiments, a sub-circuit may be the same as circuit block 204 and / or analog circuit 202. In other embodiments, circuit block 204 may include a subset of one or more sub-circuits of circuit block 204. A sub-circuit refers to a portion of a circuit that is smaller than the entire circuit (e.g., a subset of the circuit). In alternative embodiments, a sub-circuit may refer to the entire circuit.
[0050] A sub-circuit may include one or more of multiple electrical components within the analog circuit 202. The sub-circuits may be categorized into sub-circuit types. A non-exhaustive list of sub-circuit types may include, but is not limited to, a current mirror, a current divider, a current source, a current reference, a driver circuit, a level shift stage, a gain stage, an operational amplifier, a current mirror operational amplifier, an inverting or non-inverting amplifier, a filter (e.g., a band-pass filter, a low-pass filter, or a high-pass filter), an RC circuit, a resistor ladder, a voltage ladder, a power amplifier, a clock source, an analog-to-digital converter (“ADC”), a digital-to-analog converter (“DAC”), a voltage follower, a voltage regulator, a Darlington transistor or pair, a boost circuit (e.g., a step-up circuit), a buck circuit (e.g., a step-down circuit), a mixer, a modulator, an inverter, a signal conditioner, an integrator, a differentiator, an input stage, an output stage, or any other identifiable sub-circuit type used in an analog circuit.
[0051] 3A and 3B are circuit diagrams of an example circuit block 300 according to an embodiment of the present disclosure. As shown in FIGS. 3A and 3B , the circuit block 300 can be further divided into subcircuits 302. In this example, the circuit block 300 performs the function of amplifying a signal. The subcircuits 302 are portions of the circuit block 300 intended to achieve a purpose, such as providing a reference voltage, replicating a current, or filtering a signal. The subcircuits 302 include sets of electrical components configured to operate together to achieve such a purpose, which may affect one or many output parameters of the circuit block. A subcircuit often functions as a component of an overall circuit block and may perform a common function across many circuit blocks. In some cases, the subcircuits may be classified into types or categories by function. Classifying the subcircuits of a circuit block can aid in analyzing the circuit block for transformation and / or generation at the subcircuit level and aid in decomposing the circuit block into more easily analyzed components. Examples of subcircuit types include current mirrors 304, input stages 306, output stages 308, passive components 310, voltage ladders, resistor ladders, etc. In some cases, miscellaneous blocks 312 may also be identified for a circuit block. These miscellaneous blocks 312 may include, for example, nested circuit blocks 314, single electrical components 316 that may not be included with other identified subcircuits, unidentified subcircuits that may require further analysis, etc.
[0052] 4 is a circuit diagram illustrating a sub-circuit 400 according to an embodiment of the present disclosure. In this example, the sub-circuit 400 is a type of current mirror and includes two electrical components: a first transistor 402 and a second transistor 402. Each electrical component has several physical parameters, which describe measurable physical characteristics of the electrical component, such as channel width (W) and channel length (L), input and output current, impedance, operating region (e.g., condition), n-type / p-type, etc. The sub-circuit physical parameters may refer to the physical parameters of the electrical components of the sub-circuit, and may also include operating information (e.g., operating point, bias point, quiescent point, Q-point, etc.). The operating point represents the current or voltage at the terminals of the electrical component for the electrical component to operate. Each electrical component can play a specific role; for example, the current (IREF) flowing through the first transistor 404 is mirrored through the second transistor 402 as a function of the ratio (N) of the sizes of the transistors 402 and 404, such that the first transistor 404 can act as a current-to-voltage converter, while the second transistor 402 can act as a voltage-to-current converter. Based on the electrical components of the sub-circuit and their associated physical parameters, the entire sub-circuit can be associated with various sub-circuit performance parameters. Although various sub-circuit performance parameters can be determined, not all sub-circuit performance parameters may be important for a given sub-circuit type.
[0053] A subcircuit may have multiple subcircuit parameters. The subcircuit parameters may include subcircuit physical parameters of the subcircuit, subcircuit operational parameters of the subcircuit, subcircuit performance parameters of the subcircuit, or a combination of physical parameters, operational parameters, and performance parameters of the subcircuit. There may be various subcircuit parameters that can describe how a particular subcircuit operates in various ways. The physical parameters of the electrical components and how the electrical components of the subcircuit are connected are factors that affect the subcircuit parameters, but the relationship between these factors and the subcircuit parameters is often nonlinear and varies depending on the process technology. Subcircuit parameters may be determined for a particular subcircuit using circuit simulation software such as SPICE simulation. For example, operational information of a subcircuit may be determined using circuit simulation software. The operational information considers external influences on the circuit, such as characteristics of supply currents, and determines the state of the subcircuit and / or electrical devices of the circuit (e.g., bias currents). In some cases, determining operational information using circuit simulation software may be performed relatively quickly compared to determining subcircuit performance parameters of the subcircuit using circuit simulation software.
[0054] Among the sub-circuit parameters, a set of sub-circuit performance parameters may be identified as more relevant by describing the performance of a particular sub-circuit with respect to the physical parameters of the sub-circuit's electrical components. This set of sub-circuit performance parameters may be determined to be more relevant based on the function of the particular sub-circuit. In some cases, the sub-circuit performance parameters of the set of sub-circuit performance parameters to be included for a particular type of sub-circuit may be pre-determined. In some cases, this pre-determination of the set of sub-circuit performance parameters for a particular type of sub-circuit may be made based on expert knowledge and / or experience regarding which sub-circuit performance parameters are more relevant for that type of sub-circuit.
[0055] In some cases, subcircuit performance parameters for a subcircuit type may be algorithmically pre-determined. For example, if a circuit including the subcircuit type in question is successfully converted from a first process technology to a second process technology, the subcircuit type may be modeled, such as in circuit simulation software, as designed in the first process technology and then remodeled as designed in the second process technology. Various subcircuit performance parameters may be determined for both models and then compared to determine which performance parameters are most closely maintained after conversion. This process may be repeated using multiple examples of the subcircuit type, in the same or different circuits, as well as with different topologies of the subcircuit type, to obtain a representative sample and determine the most relevant set of performance parameters for converting the subcircuit type.
[0056] The subcircuit performance parameters included in a set of subcircuit performance parameters may be different for different types of subcircuits because the purposes served by different types of subcircuits are different. As an example, a set of subcircuit performance parameters for a current mirror may include current matching, output impedance, operating region, and transistor width and length. The subcircuit performance parameters included in this set of subcircuit performance parameters may be different from the subcircuit performance parameters included in another set of subcircuit performance parameters associated with an input state subcircuit type. In some cases, if a set of subcircuit performance parameters is not defined for a particular subcircuit type, performance parameters of electrical components may be used instead of the subcircuit performance parameters.
[0057] FIG. 5 is a block diagram 500 of an example embodiment of a technique for automated analog and mixed-signal circuit design and verification according to aspects of the present disclosure. The example embodiment shown in block diagram 500 provides an overview of an example technique for converting a circuit design from a first process technology to a second process technology, aspects of which are discussed in more detail below. An analog circuit may be divided into one or more circuit blocks. These circuit blocks are often designed to perform specific functions and include one or more sub-circuits. These sub-circuits include one or more electrical components configured to operate together, and a set of known sub-circuits may be identified. These known sub-circuits may be several arrangements of electrical components (e.g., topologies) known to be sufficiently robust to be usable in a circuit for a certain process technology. Each component of a sub-circuit may be associated with a specific range of physical parameters. Sets of sub-circuit physical parameters may be identified, each set having a different combination of physical parameters for the electrical components. These known subcircuits can be modeled for each set of subcircuit physical parameters, for example, as a netlist for use with a circuit simulator. This modeling can be based on a netlist, which is generally a list of the electrical components of a circuit and a list of nodes to which each electronic component is connected. In block 502, models of these known subcircuits can be simulated using circuit simulation software such as SPICE. Each set of subcircuit physical parameters can be simulated to identify certain subcircuit performance parameters associated with a given set of subcircuit physical parameters for a first process technology. In block 504, an ML model for each subcircuit of the known subcircuits (or subcircuits supported by a particular embodiment) can be trained to create a set of trained ML models for a process technology.In this example, these trained ML models in ML model library 506 may receive as input a set of sub-circuit physical parameters for the sub-circuit's electronic components for a first process technology and may predict as output a set of sub-circuit performance parameters for the first process technology. These trained ML models may be stored in ML model library 506. In some cases, ML model library 506 may be created once for a process technology and reused as needed.
[0058] Similarly, for a second process technology, a set of trained ML models may be configured to receive as input a set of subcircuit performance parameters and predict a set of subcircuit physical parameters for an electronic component of the subcircuit. As described above, each component of a subcircuit may be associated with a particular range of physical parameters, and a set of subcircuit physical parameters may be identified, each set having a different combination of physical parameters for the electrical component. A set of known subcircuits may be modeled, for example, as a netlist, for each set of subcircuit physical parameters. Each set of subcircuit physical parameters may be simulated in block 508 to identify certain subcircuit performance parameters associated with the given set of subcircuit physical parameters for the second process technology. In block 510, an ML model for each subcircuit of the known subcircuits (or subcircuits supported by a particular embodiment) may be trained to create a set of trained ML models for the second process technology. In this example, these trained ML models in ML model library 512 may receive as input a set of sub-circuit performance parameters for a second process technology and may predict as output sub-circuit physical parameters for the electronic components of the sub-circuit for the second process technology. This set of trained ML models may be stored in the ML model library.
[0059] Thus, this example includes two sets of ML models: a first set of ML models that obtains sub-circuit physical parameters for a first process technology and predicts certain sub-circuit performance parameters for a particular sub-circuit, and a second set of ML models that obtains certain sub-circuit performance parameters for a particular sub-circuit and predicts sub-circuit physical parameters for electrical components of the particular sub-circuit for a second process technology.
[0060] In this example, a representation 514 of the circuit, such as a netlist describing the circuit, may be analyzed to identify one or more circuit blocks in block 516. The circuit blocks may be analyzed to identify subcircuits of the circuit block in block 518. Subcircuit types may also be identified. In block 520, for each identified subcircuit, subcircuit physical parameters of the subcircuit's components are identified and input into an ML model corresponding to the identified subcircuit for a first process technology (e.g., stored in ML model library 506) to predict certain subcircuit performance parameters. These predicted certain subcircuit performance parameters are then input into a second ML model corresponding to the identified subcircuit for a second process technology (e.g., stored in ML model library 512) to predict certain subcircuit physical parameters for the subcircuit's components in the second process technology. In block 522, a sub-circuit representation, such as a netlist, is created for each identified sub-circuit based on certain predicted sub-circuit physical parameters for each sub-circuit's components, and the sub-circuits may be connected into circuit blocks, which are then connected to form an overall circuit, thus transforming the original circuit into a new circuit in the second process technology. In block 524, this new circuit may be simulated to verify that the new circuit meets design specifications, and if the design specifications are met, a representation of the new circuit may be output in block 526.
[0061] FIG. 6 is a block diagram 600 of an example embodiment of a technique for automated analog and mixed-signal circuit design and verification according to aspects of the present disclosure. The example embodiment shown in block diagram 600 provides an overview of an example technique for creating new circuits or optimizing existing circuits, aspects of which are described in more detail below. As described in connection with FIG. 5, an analog circuit may be divided into circuit blocks and sub-circuits. Known sub-circuits may be modeled for a set of sub-circuit physical parameters, e.g., as a netlist for use with a circuit simulator. In block 502, models of these models may be simulated using circuit simulation software such as SPICE. Each set of sub-circuit physical parameters may be simulated to identify certain sub-circuit performance parameters associated with a given set of sub-circuit physical parameters for a first process technology. In block 504, an ML model for each sub-circuit of the known sub-circuits (or sub-circuits supported by a particular embodiment) may be trained to create a set of trained ML models for a process technology. In this example, one trained ML model in the ML model library 506 may receive as input a set of sub-circuit physical parameters for an electronic component of a sub-circuit for a first process technology and may predict as output a set of sub-circuit performance parameters. Another trained ML model in the ML model library may receive as input a set of sub-circuit performance parameters for a first process technology and may predict as output a set of sub-circuit physical parameters for an electronic component of a sub-circuit for the first process technology. These trained ML models may be stored in the ML model library 506.
[0062] At block 516, circuit blocks may be identified from the representation of the circuit 514. For example, an algorithm attempting to optimize an existing circuit may analyze a representation of the circuit, stored as a data object such as a netlist, to identify circuit blocks. As another example, a user attempting to create a new circuit may identify the circuit block 516 on which the user is working. At block 518, one or more subcircuits of the circuit block may be identified. For example, an algorithm may analyze the circuit block to identify its subcircuits. As another example, the user may identify a subcircuit type for which the user is attempting to design. Alternatively, or additionally, the user may identify other subcircuits of the circuit block. At block 520, a set of performance parameter values for the subcircuits may be identified. For example, an algorithm may identify subcircuit physical parameters for the components of the subcircuit for each identified subcircuit, and these subcircuit physical parameters may be input into an ML model corresponding to the identified subcircuit for the first process technology (e.g., stored in the ML model library 506) to predict a set of subcircuit performance parameters. As another example, a user may identify certain sub-circuit performance parameters for the sub-circuit being created.
[0063] In block 602, one or more subcircuit performance parameters may be provided for optimization. The one or more subcircuit performance parameters for optimization may be provided along with other subcircuit performance parameters in the set of subcircuit performance parameters. For example, an algorithm may optimize one or more subcircuit performance parameters from the set of subcircuit performance parameters identified in block 520 to help improve the performance of the subcircuit. Alternatively, the set of subcircuit performance parameters identified in block 520 may be provided to attempt to optimize the topology of the subcircuit, for example. As another example, a user may provide a set of subcircuit performance parameters and an identified subcircuit type for the subcircuit being created. In some cases, an indication of the subcircuit type and / or subcircuit topology may also be provided. Alternatively, the subcircuit type may be inferred, for example, based on the subcircuit performance parameters included in the set of performance parameters. In still other cases, the subcircuit may be optimized based on characteristics of components in the topology, such as, for example, based on the size or number of components in the topology of the subcircuit type.
[0064] The topology of a sub-circuit refers to the particular arrangement of the electrical components of the sub-circuit. For a given sub-circuit type, there may be many practical topologies for implementing the sub-circuit. For example, Figures 7A-7B show a set of different topologies for an input (or gain) stage sub-circuit type.
[0065] In block 604, an optimized subcircuit may be identified. For example, new subcircuit performance parameters may be determined for electrical components of the subcircuit by selecting an appropriate ML model based on the subcircuit topology based on the subcircuit topology and inputting the optimized subcircuit performance parameters into the ML model to obtain new subcircuit performance parameters for the subcircuit topology. In some cases, the subcircuit topology of the optimized subcircuit may be the same as the original subcircuit topology. In other cases, the subcircuit topology may be optimized. For example, the optimized subcircuit performance parameters may be input into multiple ML models of a subcircuit type to generate multiple sets of subcircuit physical parameters for multiple subcircuit topologies of the subcircuit type. A subcircuit topology of the multiple subcircuit topologies may then be selected by an optimization function. The optimization function may be any known optimization technique, such as a cost function, a loss function, or the like. As an example, the optimization function may select a subcircuit topology based on a minimum number of electrical components having subcircuit physical parameters of those electrical components within a range selected to facilitate manufacturing based on a first process technology. At block 524, this new optimized circuit may be simulated to verify that the new circuit meets the design specifications, and if the design specifications are met, at block 526, a representation of the new circuit may be output.
[0066] In some cases, one or more known sub-circuits may be identified. While there may be multiple approaches to designing a particular set of electrical components to achieve a particular purpose of the sub-circuit, in practice, there may be a limited number of practical electrical component configurations (e.g., topologies) that are robust enough to be usable for the expected environmental conditions (e.g., temperature range, humidity range, operating voltage, etc.) for a given process technology. For example, FIGS. 7A-7B illustrate an example set 700 of known input or gain stage topologies for a given process technology in accordance with aspects of the present disclosure. Note that the set 700 of known topologies is not exhaustive. Rather, the set 700 may include topologies that are known to be feasible and / or usable in practice. In some cases, the set 700 of known topologies for a particular sub-circuit may be predetermined based at least in part on expert knowledge and / or experience regarding which topologies are feasible and / or usable in practice.
[0067] In some cases, the set of known topologies 700 is not fixed, and additional topologies can be added as needed. For example, as additional topologies are identified, these additional topologies can be added manually. In other cases, additional topologies can be identified, for example, by noting the components and their connections of a new topology candidate that are not identified as part of a known topology, and matching this new topology candidate against a list of other topology candidates that were not previously recognized as part of a known topology. If there is a match, these candidate topologies can be presented to the user. Alternatively, a set of subcircuit performance parameters can be algorithmically determined for a candidate topology, as described above. A candidate topology can be added to the set of known topologies 700 if the set of subcircuit performance parameters matches the set of subcircuit performance parameters of a corresponding type of subcircuit. In some cases, the set of known topologies can be organized based on different types of subcircuits, or a single set of known subcircuits can include all types of topologies of subcircuits.
[0068] Subcircuit Identification
[0069] FIG. 8 is a system diagram illustrating an overview of a technique 800 for designing a new analog circuit from an original analog circuit according to an embodiment of the present disclosure. In some cases, technique 800 may be implemented in software as one or more software programs that may include various modules. While technique 800 is described in the context of an embodiment organized using multiple modules, tools, libraries, etc., it can be understood that this organization is chosen for clarity and that other embodiments may implement the technique described in technique 800 using a different organization. In technique 800, an existing analog circuit is described by a first data object representing the original circuit 802. The data object may be a storage or memory location or region containing a value or a group of values. The data object may include an electronic file in a file system, block storage, or any other type of electronic storage capable of storing data. The original circuit may be a schematic, an electrical diagram, a netlist, an HDL, or any type of representation or design of a circuit (e.g., a circuit design). The original circuit may also be a subset of a larger circuit (e.g., an integrated circuit). The first data object representing the original circuit 802 can be any type of electronic representation of a circuit or a circuit design. The first data object representing the original circuit 802 can be associated with a first process technology, such as a current circuit manufacturing process. The representation of the current circuit manufacturing process can be obtained in any manner. For example, the representation can be input by a user and / or extracted from the first data object. In some embodiments, the technique 800 can identify the first process technology from the first data object representing the original circuit 802, a circuit design associated with the circuit, a circuit block within the original circuit, a sub-circuit within the original circuit, or one or more electrical components within the original circuit.
[0070] The first data object representing the original circuit 802 may include representations of electrical components and interconnections between the electrical components. Thus, the first data object representing the original circuit 802 describes how the circuit is designed in the current process technology. In some cases, the first data object representing the original circuit 802 may be described as one or more netlists, HDL, or any other electronic representation of the circuit. A netlist is an electronic representation of the electrical components in a circuit and the connections between the electrical components in the circuit. In some embodiments, the netlist may also include nodes representing connections between first and second electrical components in the circuit. The netlist may include multiple circuit blocks, and each circuit block may organize the circuit. In some cases, the netlist and corresponding circuit blocks may be organized into portions that perform specific tasks or functions. In some embodiments, the technique 800 may include a component that identifies circuit blocks in the first data object representing the original circuit 802. A circuit block parser 803 may parse the first data object to identify individual circuit blocks. The circuit block may be further analyzed by a subcircuit parser 804 to identify subcircuits of the circuit block based on a set of subcircuit analysis rules 806. In other embodiments, technique 800 may identify the subcircuits using the original circuit represented by the first data object. In some embodiments, the original circuit in the first data object representing 802 is a circuit block.
[0071] The subcircuit analysis rules 806 may be based at least in part on the electrical components of the subcircuit, the physical parameters of the electrical components, how the electrical components of the subcircuit are connected, what purpose the electrical components serve, what purpose other subcircuits or electrical components to which the identified subcircuit is connected serve, etc. In some cases, the subcircuit analysis rules 806 may first attempt to identify a subcircuit based on the electrical components and their connections. In a netlist, each electrical component is identified by type (e.g., transistor (e.g., NMOS transistor or PMOS transistor), capacitor, resistor, inductor, or any type of electrical component or device), and the electrical component connections (e.g., couplings) are given. The analysis rules 806 may, for example, analyze the netlist to group a first electrical component with one or more other electrical components to which it is connected and attempt to match this group of electrical components against a set of known topologies, examples of which are shown in FIGS. 7A-7B. As an example, such a rule may indicate that if an electrical component is a transistor with its source connected to another electrical component or subcircuit, its drain connected to another electrical component or subcircuit, and its gate connected to another transistor, and the other transistor has a certain connection, this set of electrical components is a certain topology of an input stage or a gain stage. In some cases, the role of the electrical components (e.g., shunt, diode-connected, gain stage, cascode stage, etc.) and physical parameters (e.g., width (W), length (L), W / L ratio, etc.) may also be considered and recorded. For example, a current mirror subcircuit block may include a first transistor that is diode-connected and a second transistor that is a slave current source. Although both the first and second transistors belong to the same subcircuit block, the first and second transistors may play different roles in the subcircuit block, have different electrical component parameters, and affect the performance parameters of the structural block in different ways. The analysis may be repeated using additional electrical components until only one or no matching known topology remains.If only one matching topology remains, a subcircuit can be identified based on the matching topology. If no matching topologies remain, the last additional other electrical component that was added can be dropped. By dropping this last additional other electrical component, multiple matching known topologies can be left, and conflict resolution can be performed to determine which known topology of the multiple matching known topologies is the best match. In some embodiments, the netlist can identify one or more subcircuits, and the subcircuit analysis rules can identify the subcircuits using the identification of the subcircuits by the netlist.
[0072] Conflict resolution can take into account the electrical components of a group of electrical components as well as one or more connections (e.g., inputs and outputs) of the group of electrical components. In some cases, connections, such as between electrical components of a sub-circuit, can be considered, and if a unique match is still not found, connections, such as between electrical components of a sub-circuit and other sub-circuits and / or other electrical components, can be considered as well. For example, with reference to FIGS. 2A and 2B , current mirror 220 can be identified as a current mirror because it includes a pair of transistors 222 connected to ground 226 through a pair of resistors 224. Similarly, input stage 228 also includes a pair of transistors 230. However, here, the pair of transistors 230 is connected to power supply line VDD 232 through other electrical components, allowing input stage 228 to be identified as an input stage. These one or more connections can be compared to connections of multiple matching known topologies to identify the best matching known topology. In some cases, if a matching known topology is not found, the group of electrical components can be flagged for later consideration and / or the electrical components can be analyzed individually. In some cases, rather than performing sub-circuit identification, each electrical component may be individually identified based on its connections to the electrical component as well as the electrical component's role in the functional circuit block.
[0073] Subcircuit Performance Parameters
[0074] Once the sub-circuits are identified, a set of sub-circuit performance parameters may be determined based on the identification. In some embodiments, the set of sub-circuit performance parameters may be determined based on the identified functionality of the sub-circuit, circuit block, or analog circuit. FIG. 9 is a diagram illustrating a set of sub-circuit performance parameters for a sub-circuit 900 according to aspects of the present disclosure. How a sub-circuit performs can be determined by a transconductance (G m ), channel conductance (G DS ), the minimum drain-source voltage at which the current saturates (V DSat ), drain current mismatch (I dmm ), threshold voltage mismatch (V tmm ), output impedance (r), voltage at the bulk substrate, voltage at the drain, etc. In some cases, each type of sub-circuit may be associated with a set of sub-circuit performance parameters.
[0075] In some embodiments, a set of subcircuit performance parameters may be defined for each subcircuit type. The specific subcircuit performance parameters included in the set of subcircuit performance parameters may vary for each subcircuit type. Some subcircuit performance parameters 904 may be more relevant to a particular subcircuit type than to another subcircuit type. For example, a current mirror may have a certain transconductance value, but the transconductance value of the current mirror may be relatively unimportant to the function of the current mirror 902. Rather, the channel conductance, the minimum drain-source voltage at which the current saturates, and I dmm Sub-circuit performance parameters 904 that are more related to the function of the current mirror 902, such as transconductance (G m ), channel conductance (G DS ), and threshold voltage mismatch (V tmm) subcircuit performance parameters 904. The subcircuit performance parameters of the set of subcircuit performance parameters for a particular subcircuit may be determined in advance. In some cases, the particular subcircuit performance parameters of the set of subcircuit performance parameters for a particular subcircuit may be determined at least in part based on expert knowledge and / or experience. In other embodiments, the relevant subcircuit performance parameters in the set of subcircuit performance parameters are dynamically identified by an identified subcircuit, an identified function of the subcircuit, a circuit block, a function of the circuit block, a circuit, or a function of the circuit. Also, the relevant subcircuit performance parameters in the set of subcircuit performance parameters for a certain type of subcircuit may vary based on the identified subcircuit.
[0076] Returning to FIG. 8 , an operational simulation 808 (e.g., operating point simulation) may be performed according to aspects of the present disclosure. For operational simulation 808, a circuit or portion of a circuit may be simulated in circuit simulation software to determine sub-circuit operating parameters of the sub-circuits for one or more of the circuits. For example, circuit blocks and / or sub-circuits of the original circuit 802 may be simulated in a circuit simulator, such as a SPICE simulator, to determine sub-circuit operating point information for the sub-circuits. The sub-circuit operating parameters, which may include operating point information and bias point information, may be determined by measuring the voltage or current (e.g., drain voltage (V)) at a particular point of an electrical component with no input signal applied. DS ), gate-source voltage (V gs In some examples, the operating parameters may include information or parameters corresponding to one or more operating or bias points of an electrical component, sub-circuit, circuit block, or circuit.
[0077] In some cases, the operational parameters may be based on the identified subcircuit. For example, subcircuit operational parameters may be generated for the identified subcircuit based on simulation of the circuit block and / or subcircuit. In some cases, the operational parameters may also be generated at the electrical component level. For example, if an electrical component of the original circuit 808 is not included in the identified subcircuit, operational parameters may be generated for the electrical component. In other cases where an electrical component is identified, operational parameters may be generated for the electrical component of the original circuit 808. In some cases, the operational parameters may be used by the first process technology characterization module 810 along with subcircuit physical parameters and subcircuit type information (e.g., obtained from the data object) to determine subcircuit performance parameter values for a set of subcircuit performance parameters associated with the identified subcircuit or electrical component for the first process technology associated with the original circuit.
[0078] The first circuit process technology characterization module 810 may optionally create, train, store, and provide machine learning models for predicting sub-circuit performance parameters based on the operational information and the sub-circuit physical parameters. The first process technology characterization module 810 may include trained ML models 812 in a machine learning (ML) library 506. In some cases, there may be ML models corresponding to known topologies on which the technique 800 is configured to operate. The trained ML models 812 may be stored and represented in data objects. The trained ML models 812 may be stored in the ML library 506. The ML library 506 may store and provide access to multiple ML models. In some embodiments, the trained ML models 812 may be any set of rules, instructions, algorithms, or any type of data object that recognizes patterns. could be.
[0079] An ML model 812 may be trained based on the set of simulated subcircuits 502 (504). In some cases, the ML model 812 may be trained based on variations of the subcircuit for a first (e.g., source) process technology. For example, a first subcircuit topology of a known subcircuit topology may be simulated using various subcircuit performance parameters and operational parameters for the first process technology (502). This simulation may be performed using a circuit simulator, such as a SPICE simulation. The simulation generates a set of subcircuit performance parameters corresponding to variations of the subcircuit performance parameters and operational parameters for the first topology in the first technology process. An ML model for the first subcircuit topology may then be trained using variations of the subcircuit performance parameters and operational parameters to predict corresponding subcircuit performance parameters for that ML model for the first process technology (504). The simulated subcircuits 502 and the results of the simulated subcircuits 502 may be stored and represented in a data object.
[0080] In some cases, the ML model 812 may be stored in the ML model library 506. The ML model 812 may use various ML modeling techniques, including linear regression models, large-margin classifiers (e.g., support vector machines), principal component analysis, tree-based techniques (e.g., random forests or gradient-boosted trees), or neural networks. A linear regression model may be an ML model that assumes a linear relationship between input parameters and output. A large-margin classifier may be an ML model that returns the distance (e.g., margin) of the output from the decision boundary. A support vector machine ML model plots data items in an n-dimensional space based on n features of the data input to find a hyperplane that distinguishes the data items into different classes. A principal component analysis ML model creates a matrix of how the features of a data item relate to determine which features are more important. A random forest tree ML model creates a large group of decision trees for class prediction given a data item and generates a prediction from the group of decision trees. The most common prediction in the group of decision trees is the class prediction. A gradient boosted tree ML model uses a set of linked, hierarchical decision trees, and predictions are based on a weighted sum of predictions made by each layer of a group of decision trees. A neural network ML model uses a set of linked, hierarchical functions (e.g., nodes, neurons, etc.) that are weighted to evaluate input data. Neural network ML modeling techniques can include fully connected (where every neuron in a layer is connected to every other node in the layer), fully connected with regularization (where a regularization function is added to a fully connected neural network to help avoid overfitting), and fully connected with optimizers, such as dropout (which removes nodes to simplify the network) and adaptive moment estimation optimizer augmented neural networks (which use a gradient descent algorithm to reduce the data parameters of the network).
[0081] A particular type of sub-circuit implemented in a given process technology may be associated with practical ranges of sub-circuit physical parameters (e.g., physical parameters) and operational parameters for the first process technology. The practical ranges of the sub-circuit physical parameters may be provided, for example, by a user, or the practical ranges may be based on the limitations of the process technology. For example, a current mirror sub-circuit implemented in a first process technology may have ranges of acceptable input reference currents (e.g., 10 nA to 20 μA), minimum and maximum transistor widths (e.g., 1 μm to 100 μm), and lengths (e.g., 1 μm to 10 μm) for the sub-circuit's electrical components. In other cases, the practical ranges of the sub-circuit may be determined automatically, for example, by analyzing the range of parameters associated with the process technology or by simulating the circuit and / or sub-circuit over a range of parameters until the circuit and / or sub-circuit fails the simulation. A particular sub-circuit topology can then be simulated (502) over a practical range of sub-circuit physical parameters (e.g., physical parameters) and sub-circuit operational parameters to generate sub-circuit performance parameters (e.g., performance parameters) associated with the particular sub-circuit topology for the first process technology. For example, a particular circuit mirror topology, such as that shown in FIG. 4, can be simulated (502) using various combinations of sub-circuit performance parameters and sub-circuit operational parameters, such as W / L, input / output current, impedance, operating region (e.g., state), n-type / p-type, etc., of electrical components, to generate sub-circuit performance parameters (e.g., performance parameters) associated with the respective physical parameters and the respective sub-circuit operational parameters. The sub-circuit performance parameters can include transconductance (G m ), channel conductance (G DS ), the minimum drain-source voltage at which the current saturates (V Dsat ), drain current mismatch (I dmm ), threshold voltage mismatch (V tmm), output impedance (r), voltage at the bulk substrate, voltage at the drain, etc., as described in connection with FIG. 9 . In some embodiments, a sub-circuit may be simulated using various combinations of sub-circuit parameters (including physical parameters and performance parameters) and operational parameters to generate additional sub-circuit performance parameters. Also, in some cases, the combinations of sub-circuit physical parameters, sub-circuit performance parameters, and sub-circuit operational parameters are not exhaustive; rather, combinations of sub-circuit physical parameters, sub-circuit performance parameters, and sub-circuit operational parameters are selected and simulated to encompass Gaussian and uniform distributions, including those typically identified in analog semiconductor technology manufacturing variations. For example, operating points may be selected substantially uniformly across a practical range of the sub-circuit physical parameters, and additional operating points are selected within the range of the most commonly used (or expected to be used) sub-circuit physical parameters for a given sub-circuit or circuit.
[0082] In some cases, the set of sub-circuit physical parameters, sub-circuit operational parameters, and generated sub-circuit performance parameters obtained from the simulation may be used to train an ML model 504 corresponding to the simulated sub-circuit topology.
[0083] Using ML models
[0084] An ML model for a particular sub-circuit topology in a particular process technology can be trained based on the sub-circuit physical parameters and operational parameters, and the corresponding generated sub-circuit performance parameters. As described above, multiple sets of sub-circuit physical parameters, operational parameters, and corresponding generated sub-circuit performance parameters are obtained across a practical range of the sub-circuit physical parameters. These sets of parameters can be divided into a training set and a test set. The ML model 812 can be trained using the training set, and the training 504 of the ML model 812 can be validated by the test set. To train the ML model 812, certain parameters can be provided as input parameters to the ML model 812, which then makes certain predictions based on the input parameters, and these predictions are compared to known correct output parameters found from simulation. Based on this comparison, the ML model 812 can adjust the ML model 812 to match the known correct output parameters, for example, by adjusting node weights. The output parameters may be adjusted to enable the ML model 812 to make predictions that closely match the known correct output parameters. The ML model training 504 may then be validated with the ML model 812 making predictions using a test set, and the predictions output by the ML model 812 may then be compared to the known correct outputs associated with the test set.
[0085] The subcircuit parameters (including subcircuit physical parameters, subcircuit performance parameters, and subcircuit operational parameters) for a particular subcircuit topology may be used to train an ML model 812 for the particular subcircuit topology for a first process technology. For example, the subcircuit physical parameters and subcircuit operational parameters from a simulated particular subcircuit topology may be used as a training set to train the ML model 812 to predict certain subcircuit performance parameters when presented with a set of subcircuit physical parameters and subcircuit operational parameters for the particular subcircuit topology in the first process technology. This ML model 812 may be tested using a test set to verify the training. For example, the subcircuit physical parameters and operational parameters of the test set may be input into the ML model 812 to generate predicted subcircuit performance parameters. These predicted subcircuit performance parameters are then compared to known subcircuit performance parameters generated by simulating the subcircuit with the associated subcircuit physical parameters and operational parameters to verify that the ML model 812 is generating accurate predictions. Techniques for training the ML model 812 are described in more detail below.
[0086] Once trained, this ML model 812 for the particular subcircuit topology may be stored in the ML model library 506 along with other ML models for other subcircuit topologies for the first process technology. In some cases, the ML model library 506 may include trained ML models for identified subcircuit topologies supported by embodiments of the technique 800.
[0087] Given the subcircuit operating parameters, along with the subcircuit performance parameters for the identified subcircuit of the original circuit 802, the source circuit process technology characterization module 810 may locate a corresponding trained ML model 812 for the identified subcircuit from the ML model library 506 and may use the located ML model to predict specific subcircuit performance parameters 818 for the identified subcircuit.
[0088] In some cases, the second process technology characterization module 820 is similar to the first process technology characterization module 810. For example, the second circuit process technology characterization module 820 may also include a trained ML model 822 in the ML library 512. In some cases, there may be an ML model corresponding to a known topology on which the technique 800 is configured to operate. The trained ML model 822 may be stored and represented in a data object. The trained ML model 822 may be stored in the ML library 512. The ML library 512 may store and provide access to multiple ML models. In some embodiments, the trained ML model 822 may be any set of rules, instructions, algorithms, or any type of data object that recognizes patterns. It may be understood that the second circuit process technology characterization module may include ML models associated with any number of circuit process technologies. In some cases, the second circuit process technology characterization module may include an ML model related to the first process technology, for example, to help optimize a sub-circuit.
[0089] An ML model 822 may be trained (510) based on the set of simulated subcircuits 508. In some cases, the ML model 822 may be trained based on variations of the subcircuit for a second (e.g., target) process technology. For example, a first subcircuit topology of a known subcircuit topology may be simulated (508) using various subcircuit physical and operational parameters for the second process technology. This simulation may be performed using a circuit simulator, such as a SPICE simulation. The simulation generates a set of subcircuit performance parameters corresponding to each variation of the subcircuit physical and operational parameters of the first topology in the second process technology. An ML model 822 for the first subcircuit topology may then be trained (510) using variations of the subcircuit physical and operational parameters to predict corresponding subcircuit performance parameters for that ML model for the second process technology. The simulated subcircuits 508 and the results of the simulated subcircuits 508 may be stored and represented in a data object. It can be appreciated that for a given process technology, multiple sets of sub-circuit physical parameters, sub-circuit operational parameters, and corresponding generated sub-circuit performance parameters can be obtained across a practical range of sub-circuit performance parameters, and the same multiple sets can be used for ML model training 504 or ML model training 510. In some cases, ML model 822 can be stored in ML model library 512. ML model 822 can also use various ML modeling techniques, including linear regression models, large-margin classifiers (e.g., support vector machines), principal component analysis, tree-based techniques (e.g., random forests or gradient-boosted trees), or neural networks. A particular sub-circuit topology can be simulated (508) across a selection of practical ranges of certain sub-circuit physical and operational parameters to generate additional sub-circuit performance parameters associated with the particular sub-circuit topology for a second process technology.The practical ranges of the sub-circuit physical parameters may be provided by a user, for example, or the practical ranges may be based on the limitations of a process technology. For example, a particular circuit mirror topology such as that shown in FIG. 3 may be simulated using various combinations of sub-circuit physical parameters and sub-circuit operational parameters (e.g., W / L, input / output currents, impedances, operating ranges (e.g., states), n-type / p-type, etc.) of electrical components to generate a set of sub-circuit performance parameters associated with each sub-circuit physical parameter (e.g., physical parameters and / or operational parameters) for a second process technology. In other cases, the practical ranges of the sub-circuits may be determined automatically, for example, by analyzing parameter ranges associated with the process technology or by simulating the circuit and / or sub-circuit over a range of parameters until the circuit and / or sub-circuit fails simulation. The sub-circuit physical parameters, operational parameters, and generated sub-circuit performance parameters resulting from the simulation of the particular sub-circuit topology may then be used to train an ML model 510 of the particular sub-circuit topology for the second process technology. For example, the sub-circuit physical parameters, sub-circuit operational parameters, and corresponding generated sub-circuit performance parameters resulting from a simulated circuit mirror topology may be used as a training set for training an ML model to predict the sub-circuit physical parameters and sub-circuit operational parameters when presented with a set of sub-circuit performance parameters for a particular circuit mirror topology in a second process technology.
[0090] The ML model 822 may be trained using a training set, and the training 510 of the ML model 822 may be validated by a test set. To train the ML model 822, certain parameters may be provided as input parameters to the ML model 822, which then makes certain predictions based on the input parameters and compares these predictions to known correct output parameters found from simulation. Based on this comparison, the ML model 822 may be adjusted, for example, by adjusting node weights, to enable the ML model 822 to make predictions that more closely match the known correct output parameters. For example, after training, the ML model 822 may predict sub-circuit physical parameters and sub-circuit operational parameters when it receives a set of sub-circuit performance values for a circuit mirror topology in a second process technology.
[0091] The ML model may be tested using a test set to validate the training. The training 510 may be validated using the ML model 822 to make predictions using the test set and then compare the predictions output by the ML model 822 to known correct outputs associated with the test set. For example, the sub-circuit physical parameters and sub-circuit operational parameters of the test set may be input to the ML model to generate predicted sub-circuit performance parameters. These predicted sub-circuit performance parameters are then compared to known sub-circuit performance parameters generated by simulating the sub-circuit with the associated sub-circuit physical parameters and sub-circuit operational parameters to verify that the ML model is generating accurate predictions.
[0092] Once trained, this ML model for the particular subcircuit topology may be stored in a set of trained ML models 822 (e.g., a separate ML model library) along with other ML models for other subcircuit topologies for the second process technology. In some cases, the set of trained ML models 822 may include a trained ML model for each identified subcircuit. In some cases, the model library 812 and the separate model library 822 may be combined into a single model library.
[0093] As described above, subcircuit parameters (including subcircuit physical parameters, subcircuit performance parameters, and subcircuit operational parameters) for a particular subcircuit topology for a second process technology may be used to train an ML model 822 for the particular subcircuit topology for the second process technology. For example, certain subcircuit performance parameters may be used as a training set to train the ML model 812 to predict certain other subcircuit physical parameters and subcircuit operational parameters. This ML model 812 may be tested using a test set to verify the training. For example, the predicted other subcircuit physical parameters and subcircuit operational parameters may then be compared with the known subcircuit physical parameters and operational parameters used to simulate the subcircuit and generate the subcircuit performance parameters to verify that the ML model 822 is generating an accurate prediction for the particular subcircuit topology. Once trained, the ML model 822 for the particular subcircuit topology may be stored in the ML model library 512 along with other ML models for other subcircuit topologies for the second process technology. In some cases, the ML model library 512 may include trained ML models for identified subcircuit topologies supported by embodiments of the technique 800.
[0094] Thus, given the subcircuit performance parameters for an identified subcircuit of the original circuit represented by data object 802, second process technology characterization module 820 can locate a corresponding trained ML model 822 for the identified subcircuit from ML model library 512 and use the trained ML model 822 to predict (828) the subcircuit operational parameters and / or performance parameters for the identified subcircuit. Once the set of subcircuit physical parameters has been determined for the components of the identified subcircuit, the data object representation of the identified subcircuit is transformed to the second process technology using the set of subcircuit physical parameters for the corresponding components of the subcircuit. For example, a netlist of the transformed subcircuit can be generated using the determined subcircuit physical parameters.
[0095] The formatting tool 830 can correct formatting, connectivity, and / or mapping issues that may arise during the conversion. In some cases, the formatting tool 830 can extract certain formatting, connectivity, and / or mapping information from the original circuit design 802 for use in modifying the converted data object (e.g., a netlist). In some cases, this netlist can be connected or appended to another netlist, such as a netlist for a converted version of the circuit block and other circuit blocks, as needed, to output a data object representing a new circuit 832 for the second process technology. In some cases, the converted subcircuits, converted circuit blocks, and / or new circuit in the data object representing the new circuit 832 can be simulated, for example, in a circuit simulator, to verify that the performance of the new circuit in the data object representing the new circuit 832 is within a certain performance range of the original circuit 802. This performance range can vary depending on the intended purpose of the new circuit 832, and this performance range can be defined in various ways by a circuit designer, engineer, etc. As an example, a new control circuit may be tested to ensure that it has an output voltage or current within a certain range, such as a percentage, of a target voltage / current for a given input setting.
[0096] As described above, trained ML models may be stored in ML model libraries for various process technologies. An ML model library may refer to any number of data structures, objects, or processes used to organize, store, and / or retrieve ML model libraries from a non-transitory data storage medium. For example, ML library 506 and ML library 512 may be logical ML libraries within a single ML library (not shown) that includes multiple ML libraries associated with various process technologies. In some cases, these ML model libraries may be used as part of designing a new analog circuit. For example, an analog chip designer may desire a particular subcircuit having certain subcircuit performance parameters. Rather than manually determining the physical parameters of each electrical component of the subcircuit, a trained ML model corresponding to a particular topology of the subcircuit can be selected from the ML model library. The subcircuit physical parameters may be provided to the selected trained ML model and the appropriate subcircuit physical parameters determined by the selected trained ML model.
[0097] In some cases, a trained ML model can be selected from an ML model library using one or more techniques. For example, because running a trained ML model is often substantially faster than training an ML model, a given set of subcircuit performance parameters can be provided to any number or all of the trained ML models in the ML model library corresponding to a selected subcircuit type. A trained ML model corresponding to a topology for the selected subcircuit can then be selected from the trained ML models that were able to generate appropriate subcircuit performance parameters. For example, the selected trained ML model can correspond to the trained ML model having the fewest electrical components for the provided physical parameters. As another example, the ML model library can be used to select a particular topology for a subcircuit by providing appropriate subcircuit parameters, such as subcircuit performance parameters, to the ML model library (or logic associated with the ML model library). The subcircuit type can be provided or inferred, for example, based on the particular subcircuit performance parameters provided. Various (or all) ML models of different topologies associated with the subcircuit type can then be run using the provided subcircuit performance parameters to determine a set of topologies for the subcircuit type that may be suitable for use. A particular topology for a sub-circuit type may then be selected from the set of topologies. In some cases, this selection may be made by a user. In some cases, one or more topologies for a sub-circuit type may be selected or suggested to the user. The topologies of the set of topologies for a sub-circuit may be analyzed based on, for example, complexity, cost functions related to various performance parameters, overall size, etc., to provide a selection or suggestion.
[0098] In the above example, the physical parameters can be used by the ML models in the first ML library 506 to predict subcircuit performance parameters for a particular subcircuit designed for a first process technology. These subcircuit performance parameters can then be used by the ML models in the second ML library 512 to generate subcircuit performance parameters for a particular subcircuit designed for a second process technology. As such, each ML library is associated with a particular process technology. Using a different ML library for each process technology helps enable various scenarios, such as converting a circuit from one process technology to another, designing a circuit having one portion using one process technology and other portions using another process technology, or searching across many process technologies to determine which process technology is most appropriate (e.g., in terms of cost, performance, etc.) for a particular circuit. In some cases, for example, when such flexibility is not needed, a single ML model trained to directly convert subcircuit performance parameters of a subcircuit in a first process technology to subcircuit performance parameters of a subcircuit in a second process technology can be used instead of the first and second ML models.
[0099] Although described with respect to a sub-circuit, it can be understood that other sub-circuits, such as electrical components, can also be simulated over a range of sub-circuit physical parameters to predict similar sub-circuit performance parameters for training an ML model of the sub-circuit.
[0100] Example ML model
[0101] FIG. 10 illustrates an example neural network ML model 1000 according to aspects of the present disclosure. In certain embodiments, modeling of an analog circuit using an ML model may be performed by using sub-circuit parameters as input parameters (e.g., features) of the ML model. In alternative embodiments, modeling of an analog circuit using an ML model may be performed using sub-circuit physical parameters as parameters of the ML model. The example neural network ML model 1000 is a simplified example presented to aid in understanding how such a neural network ML model 1000 may be trained. It should be understood that each implementation of an ML model may be trained or tuned differently depending on various factors, including, but not limited to, the type of ML model used, the parameters used in the ML model, the relationship between the parameters, the desired training speed, etc. In this simplified example, the W and L sub-circuit physical parameter values are parameter inputs 1002 and 1004 to the ML model 1000. Each layer (e.g., first layer 1006, second layer 1008, and third layer 1010) includes multiple nodes (e.g., neurons) and generally represents a set of operations performed on parameters, such as a set of matrix multiplications. For example, each node (apart from the nodes in first layer 1006) represents a mathematical function that takes as input the output from the previous layer and weights. The weights are typically adjusted during ML model training and fixed after ML model training. The specific mathematical functions of the nodes may vary depending on the ML model implementation. The current example addresses three layers, but in some cases, an ML model may include any number of layers. Generally, each layer transforms M input parameters into N output parameters. The parameters input to the first layer 1006 are output as inputs to the second layer 1008, which has a set of connections. Because each node in a layer (such as the first layer 1006) outputs to each node in a subsequent layer (such as the second layer 1008), the ML model 1000 is a fully connected neural network.Other embodiments may utilize partially connected neural networks or other neural network designs, which do not require connecting every node in a layer to every node in a subsequent layer.
[0102] In this example, the first layer 1006 represents a function based on a set of weights applied to input parameters (e.g., input parameters 1002 and 1004) to generate an output from the first layer 1006 that is input to the second layer 1008. Different weights may be applied by subsequent layers to inputs received from each node in the previous layer. For example, for a node in the second layer 1008, the node may apply weights to inputs received from the node in the first layer 1006, and the node may apply different weights to inputs received from each node in the first layer 1006. The node calculates one or more functions based on the received inputs and corresponding weights and outputs a number. For example, the node may use a linear combination function that multiplies input values from nodes in the previous layer by the corresponding weights and sums over the results of the multiplication, combined with a nonlinear activation function that acts as a floor for the resulting number for output. It may be understood that any known weighted function may be applied by a node within the scope of the present disclosure. This output number may be input to a subsequent layer, or if the layer is a final layer, such as the third layer 1010 in this example, the number may be output as a result (e.g., an output parameter). In some cases, the functions applied by the nodes of a layer may vary between layers. The weights applied by the nodes may be adjusted during training based on a loss function, which is a function that describes how accurately the neural network's predictions compare to expected results, an optimization algorithm that serves to determine weight setting adjustments based on the loss function, and a backpropagation error algorithm that applies the weight adjustments back through the layers of the neural network. Any optimization algorithm (e.g., gradient descent, mini-batch gradient descent, stochastic gradient descent, adaptive optimizer, momentum, etc.), loss factor (e.g., mean squared error, cross-entropy, maximum likelihood estimation, etc.), and backpropagation error algorithm (e.g., static or iterative backpropagation) may be used within the scope of the present disclosure.
[0103] Some ML models, such as neural networks, may include hyperparameters, which may refer to parameters that control the behavior of the ML model that cannot be derived through training, such as the number of nodes in a layer, the number of layers, the learning rate, etc. Expanded ML modeling techniques
[0104] As described above, because multiple topologies for multiple types of subcircuits may exist, it may be useful to extend ML modeling techniques to efficiently generate ML models for these topologies and subcircuits. Generating ML models for analog and hybrid circuits that accurately predict the parameters of these circuits may be challenging because analog and hybrid circuits may respond in a highly nonlinear manner as the physical parameters of their electrical components change. Furthermore, modeling such behavior using current ML modeling techniques, such as neural network ML models, may require substantial training time and / or manual tuning of the model's parameters to achieve the desired accuracy. This can make bulk generation of ML models challenging. To help streamline bulk ML model creation, ML model creation may be extended by including interaction parameters as input parameters in the ML model and performing dimensionality reduction on the input parameters using threshold stepwise selection.
[0105] In some cases, the characteristics of the process technology can affect the behavior of the analog circuit. To help address this, one or more process technology parameters that describe the behavior of the process technology can be included as input parameters to the ML model. Examples of such process technology parameters can include oxide thickness, channel doping concentration, electron mobility, etc.
[0106] To further help address nonlinearities, parameter interactions, such as interaction parameters 1012, can be added as input parameters to the ML model 1000. Interaction parameters represent, for example, one or more functions that describe how different input parameters may interact with one another. For example, a function A×B can have input parameters A and B. An interaction parameter C can be created, where C=A×B, which represents how the model responds to changes based on the multiplication of parameters A and B. As another example, an interaction parameter D can be created, where TIFF0007727158000001.tif39, which represents how the model responds to changes based on the square root of the multiplication of parameters A and B. In some cases, these interactions may be based on circuit theory equations. As an example, the input parameters to the ML model may be based on an equation for determining the transconductance of a CMOS transistor. In this example, the ML model ML gm ML gm =f(W,L,T,NCH,T ox ,I D ,I DS ), where the input parameters respectively represent the width of the electrical component, the length of the electrical component, the temperature, the N-channel doping concentration, the oxide thickness, the drain current bias of the electrical component, and the voltage between the drain-source terminals of the electrical component. One known nonlinear parameter interaction is the transconductance Linear equation for TIFF0007727158000002.tif620. Parameter interactions TIFF0007727158000003.tif2231 is W, L, and I D determined from input parameter data for TIFF0007727158000004.tif1845 and ML gm =f(W,L,T,NCH,T ox ,I D ,I DS) can be provided to the ML model as an input parameter. Adding nonlinear interactions as inputs to the ML model helps to prioritize known interactions, which can help reduce the amount of training required by the ML model.
[0107] In some examples, attempting to characterize nonlinearities based on circuit theory, such as by including known circuit theory equations (e.g., linear equations for transconductance), may introduce higher-order interaction terms and increase dimensionality (e.g., the number of parameters input to the ML model). Dimensionality reduction can be performed to help reduce the number of parameters for input to the ML model. Dimensionality reduction removes parameters as input to the ML model if it is determined that those parameters do not affect model behavior. Dimensionality reduction can help reduce the number of variables, identify an optimal set of parameters input to the ML model, and / or reduce the processing time of the ML model. In some cases, dimensionality reduction can be performed using threshold stepwise selection.
[0108] Threshold Stepwise Selection
[0109] Threshold stepwise selection helps build higher-order parameter interactions by incrementally iterating through input parameter interactions, determining the significance the parameter interactions have on model behavior, and eliminating parameter interactions that do not meet a threshold. In this way, higher-order interactions can be determined while minimizing the dimensionality of the ML model. FIG. 11 illustrates a set of ML model parameters for threshold stepwise selection 1100, according to aspects of the present disclosure. Threshold stepwise selection begins with an initial set of parameters 1102. In this example, variables A, B, C, and D in initial set 1102 represent general input parameters to the ML model (e.g., subcircuit physical parameters, subcircuit performance parameters, constants, parameters describing process technology, etc.), such that the result R of the ML model is a function of A, B, C, and D: R = f(A, B, C, D). In some cases, R may represent an expected result of the ML model (e.g., a subcircuit performance parameter or subcircuit performance parameters) of the subcircuit being modeled by the ML model. The initial set of parameters 1102 may also include interaction parameters 1012. In a first stage, a first parameter may be interacted with each of the other parameters to generate a second set of parameters 1104. This interaction between parameters may be based on a mathematical function of the nodes in the ML model. For example, assuming that a general parameter A represents an input parameter 1002 and B represents an input parameter 1004 of FIG. 10, then AB may represent an interaction corresponding to a function applied to input parameters 1002 and 1004 without weighting in the second layer 1008 of the ML model 1000. Thus, higher-order parameter values represent interaction values obtained from the constituent parameters. For example, assuming the interaction is multiplicative, if A=2 and B=3, then AB=6. If C=4, then ABC=24. If A is an equation, such as a known circuit theory equation, the expression is evaluated to obtain a value, and this value is used for the interaction.
[0110] In this example, parameter A interacts with parameters B, C, and D to generate parameters AB, AC, and AD, as shown in second set of parameters 1104, such that R of second set of parameters 1104 corresponds to R=f(A, B, C, D, AB, AC, AD). While parameter A is interacted in this example, it can be understood that any parameter in initial set 1102 can be interacted with any other parameter in first set 1102. In some cases, the interactions can be based on mathematical functions applied between parameters at nodes of the neural network. A linear regression can then be performed on the parameters of second set 1104. A linear regression is a linear function that attempts to model the relationships between the parameters of second set 1104, and the results of the linear regression can be compared to the expected results of the ML model (e.g., as determined by circuit simulation of the subcircuit topology being modeled by the ML model). A statistical significance test (e.g., a null hypothesis test) can be used to determine a statistical significance value (e.g., a null hypothesis p-value) to predict the contribution of each parameter of the second set of parameters 1104 to the linear regression results. The statistical significance value can then be compared to a defined threshold for statistical significance. The statistical significance threshold can be determined as a fixed value as input to a threshold stepwise selection algorithm, or the threshold can be determined by known techniques such as Bayesian hyperparameter optimization. Bayesian hyperparameter optimization is a technique for determining hyperparameters of an ML model. Hyperparameters of an ML model may refer to parameters that control the behavior of the ML model that cannot be derived through training, such as the number of nodes in a layer, the number of layers, and the learning rate. In this example, the hyperparameter to be optimized may be the statistical significance threshold. In a third stage, parameters that do not meet the statistical significance threshold—in this example, parameters C, AB, and AC of the second set of parameters 1104—can be discarded.
[0111] In a fourth stage, stages one through three may be repeated with each parameter in the initial set of parameters 1102 to obtain a fourth set of parameters 1110. For example, the second parameter in the initial set 1102 may be interacted with the parameters in the second set 1104 (without any parameters that did not meet the statistical significance threshold). This interaction may be substantially similar to the interaction performed to generate the second set of parameters 1104. Linear regression may be performed on the parameters in the third set 1106 in substantially the same manner as it was performed on the parameters in the second set 1104, and parameters that do not meet the statistical significance threshold—in this example, parameters BA and BAD in the third set of parameters 1106—may be discarded. This interaction / linear regression / discarding parameters may be repeated for each parameter in the initial set 1102 to obtain parameters resulting from a round of stepwise threshold selection, such as the fourth set of parameters 1110. In some cases, this stage is repeated through all of the initial set of parameters 1102, even if subsequent stages determine that the parameter is not important to the modeling problem. Even if a parameter does not alone contribute to the model results, its interactions with other parameters may be important. Including all of the initial set of parameters 1102, regardless of their individual significance when looping through the interactions, helps ensure that significant interactions of all parameters are not lost.
[0112] The resulting parameters in fourth set 1110 may be compared to expected results (e.g., obtained via circuit simulation) to determine the accuracy of the resulting parameters in fourth set 1110. If the accuracy meets a threshold accuracy value, fourth set of parameters 1110 may be used as input parameters for an ML model of the subcircuit. The threshold accuracy value may be determined in any manner, for example, by experiment, experience, etc.
[0113] In the fifth stage, if the accuracy does not meet the threshold accuracy value, the first through fourth stages may be repeated by interacting the initial set of parameters 1102 with the resulting parameters (e.g., parameters in the fourth set 1110) until the threshold accuracy value is met by parameters resulting from a round of threshold stepwise selection, such as a final set of parameters 1108. Doing so may result in higher-order interaction parameters, such as interaction parameters CBD and ABCD in the final set 1108 in this example. In some cases, the number of iterations in this fifth stage may be limited, for example, if the accuracy of the resulting parameters no longer increases based on a predetermined number of rounds or if the parameters of the resulting parameters remain unchanged. Note that in this example, the higher-order parameters may be represented by interaction parameters resulting from interacted parameters (e.g., parameters represented in FIG. 11 by multiple letters). As shown, threshold stepwise selection allows higher-order parameters to be developed while still limiting the total number of parameters through dimensionality reduction. The final set of parameters 1108, as determined by the threshold stepwise selection step, represents the set of parameters that are most statistically significant for the subcircuit being modeled. By using the parameters determined by the threshold stepwise selection step to be most statistically significant as a starting point (e.g., as initial parameters for input to the ML model), the amount of time required to train the ML model to achieve a certain level of accuracy may be reduced.
[0114] In some cases, if the desired threshold accuracy value is not met by threshold stepwise selection, threshold stepwise selection can be applied in conjunction with the stacked model to help improve accuracy. The stacked model uses information derived from the initial model, such as the final set of parameters 1108 output from threshold stepwise selection, as input to help guide subsequent modeling techniques. For example, if the desired threshold accuracy value is not met after applying a predetermined number of rounds of threshold stepwise selection, the parameters selected during the final round of threshold stepwise selection can be used as input to an ML model, such as a neural network trained on the sub-circuit physical parameters and simulated sub-circuit performance parameters. This ML model can then be further tuned using any known ML tuning technique. For example, Bayesian hyperparameter optimization can be applied to the ML model to tune the hyperparameters of the ML model. Bayesian hyperparameter optimization is a technique for determining the hyperparameters of an ML model based on a probabilistic model of how the hyperparameters affect the accuracy of the ML model when different hyperparameters are tuned based on validation scores. The validation score may be determined by tuning the hyperparameters of the ML model, training the ML model to generate predictions for the ML model using the tuned hyperparameters, and evaluating these predictions against expected outcomes to calculate the validation score.
[0115] FIG. 12 is a flowchart illustrating an overview of a technique for designing an analog circuit 1200 according to an aspect of the present disclosure. At block 1202, a data object representing a circuit for a first process technology can be received, the circuit including a first subcircuit, the first subcircuit including a first electrical component and a second electrical component, the first electrical component and the second electrical component arranged in a first topology. For example, the analog circuit can be described as a netlist, which is a list of electrical components and their connections. At block 1204, the first subcircuit can be identified in the data object by comparing the first topology to a stored topology associated with the first process technology. For example, a functional circuit block can be part of an analog circuit representing a set of circuits that perform a function, such as amplifying a signal, comparing two signals, or generating a clock signal, and the functional circuit block can be located by a functional boundary in the netlist, such as the start and end of the function. The netlist can be analyzed to locate these functional circuit blocks. A functional circuit block includes one or more subcircuits. A subcircuit may be made up of one or more electrical components that together serve a specific purpose within the functional circuit block. The number of electrical component arrangements that can actually implement the purpose of a subcircuit may be relatively limited. These electrical component arrangements may be pre-determined as a set of predetermined subcircuits, for example, based on chip design experience. In some cases, this set of predetermined subcircuits may not be exhaustive and may include subcircuits determined to be more likely to be found in analog circuits. In some cases, a first subcircuit may be identified based on a set of rules. In some cases, these rules may be based, at least in part, on the connectivity of the first subcircuit.
[0116] At block 1206, subcircuit physical parameter values associated with the first electrical component and the second electrical component of the first subcircuit are identified. For example, a netlist may include physical parameters associated with the electrical components of the circuit. Furthermore, operating point simulation may be used to obtain operational parameters for the subcircuit. At block 1208, a set of subcircuit performance parameter values for the first subcircuit is determined based on a first machine learning (ML) model of the first subcircuit and the identified subcircuit physical parameters. For example, different types of subcircuits may be associated with different sets of performance parameters. Examples of performance parameters include transconductance, channel conductance, minimum drain-source voltage, threshold voltage mismatch, etc. In some cases, performance parameter values for a set of physical parameters associated with the identified first subcircuit may be determined based on the first ML model of the identified subcircuit. For example, the physical parameters associated with the identified first subcircuit may be input into a first trained ML model of the identified subcircuit for a first process technology to determine performance parameter values for the identified first subcircuit.
[0117] In block 1210, a transformation from the identified first subcircuit to a second subcircuit for the second process technology is performed based on the determined set of subcircuit performance parameter values. For example, a second ML model may be selected based on the type of the identified first subcircuit. The second ML model may be configured to determine a second set of subcircuit physical parameters associated with a third electrical component and a fourth electrical component of the second subcircuit based on the second ML model for the second process technology and the set of subcircuit performance parameter values, and to associate the subcircuit physical parameters of the second set of subcircuit physical parameters with the third electrical component and the fourth electrical component of the second subcircuit. For example, the performance parameters may be input into a second trained ML model of the identified subcircuit for the second process technology to determine physical parameter values of the electrical components of the second subcircuit for the second process technology. In some cases, the first and second trained ML models may be neural networks. A netlist for the second subcircuit in the second process technology may then be determined based on the physical parameter values. At block 1212, the transformed second sub-circuit may be output. For example, a netlist of the second sub-circuit may be output. In some cases, the second process technology includes a second semiconductor manufacturing process associated with smaller circuit electrical components compared to the first process technology of the analog circuit. For example, the second process technology may be associated with smaller-sized transistors compared to the first process technology. In some cases, the second sub-circuit may be verified based on a circuit simulation of the second sub-circuit and performance parameters associated with the first sub-circuit. For example, the output netlist may be simulated on a circuit simulator to verify that the performance parameters of the second sub-circuit are within a threshold amount of the performance parameters associated with the first sub-circuit.
[0118] FIG. 13 is a flowchart illustrating an overview of a technique for designing an analog circuit 1300 according to an aspect of the present disclosure. At block 1302, a data object representing a circuit is received, the circuit including subcircuits, each including a first electrical component and a second electrical component arranged in a first topology. For example, the analog circuit may be described as a netlist including one or more circuit blocks. Each of these circuit blocks includes one or more electrical components, such as the circuit block's transistors, resistors, capacitors, inductors, and diodes. At block 1304, a set of stored topologies is received. For example, a library of trained ML models including trained ML models for known subcircuits may be stored and accessed from memory storage. At block 1306, the first electrical component, the second electrical component, and connections between the first and second electrical components may be identified. For example, the first electrical component of a functional circuit block may be identified based on a set of predetermined electrical component types stored in memory storage. For example, electrical components may play specific roles within a functional circuit block, and the role of a first electrical component may be determined based on which other electrical components the first electrical component is connected to. This role, along with the type of the electrical component, may be used to identify the first electrical component from a set of predetermined electrical components. In some cases, the first circuit may be identified based on a set of rules. At block 1308, coupling between the first electrical component and a second electrical component is determined based on the connections of the first electrical component. For example, a netlist may include a description of connections, such as between electrical components, which may be analyzed to determine the connections, such as between electrical components. The analysis may be performed using a set of rules. In some cases, the rules of the set of analysis rules may be based at least in part on the identified type of the first electrical component, the connections of the first electrical component, and the identified type of the second electrical component. As an example, the set of rules may describe possible connections of electrical components and a mapping of those connections to various sub-circuit types or topologies.In some cases, the rules of the set of analysis rules may be based at least in part on physical parameters of the first electrical component and the second electrical component.
[0119] At block 1310, a first topology is determined based on a comparison between the identified first electrical component, the identified second electrical component, the determined coupling between the first electrical component and the second electrical component, and the topologies of the set of stored topologies. At block 1312, the identified first topology may be output. For example, the identified topology may be output for use by one or more ML models to predict sub-circuit performance parameters or sub-circuit physical parameters. In some cases, based on the comparison, a determination is made that multiple topologies of the set of stored topologies may match. In such a case, a third electrical component and a connection of the third electrical component may be identified, and a coupling between the third electrical component and either the first electrical component or the second electrical component is determined based on the connection of the third electrical component. The topology of the stored set of topologies is compared with the identified first electrical component, the identified second electrical component, the identified third electrical component, the determined coupling between the first electrical component and the second electrical component, and the identified coupling between the third electrical component and either the first electrical component or the second electrical component to identify a first topology. For example, if multiple matches are found between the set of electrical components and the topology of the set of known topologies, the set of electrical components may be expanded to include additional electrical components coupled to the current electrical component of the set of electrical components. Matching against the set of known topologies may then be performed again using the expanded set of electrical components.
[0120] FIG. 14 is a flowchart illustrating a technique for identifying a subcircuit 1400 according to an aspect of the present disclosure. At block 1402, a data object representing a circuit for a process technology is received, the circuit including a first subcircuit, the first subcircuit including a first electrical component and a second electrical component arranged in a first topology. For example, an analog circuit may be described as a netlist including one or more circuit blocks. A functional circuit block includes one or more subcircuits. A subcircuit may be created from a set of electrical components that together serve a specific purpose within the functional circuit block. At block 1404, a first subcircuit within the circuit is identified by comparing the first topology with stored topologies associated with the first process technology. For example, the number of arrangements of electrical components that can actually implement the purpose of the subcircuit is relatively limited. These arrangements of electrical components may be predetermined as a set of predetermined subcircuits, for example, based on chip design experience. In some cases, this set of pre-determined sub-circuits may not be exhaustive and may include sub-circuits determined to be more likely to be found in an analog circuit. A first sub-circuit may be compared to the set of pre-determined sub-circuits.
[0121] At block 1406, a first set of physical parameter values associated with the first electrical component and the second electrical component of the first subcircuit is identified. For example, a netlist may include the physical parameters associated with the electrical components of the circuit. Operating point simulation may also be used to obtain the operational parameters for the subcircuit. At block 1408, a set of performance parameter values for the first subcircuit is determined based on a first machine learning (ML) model of the first subcircuit and the identified set of physical parameter values. For example, different types of subcircuits may be associated with different sets of performance parameters. Examples of performance parameters include transconductance, channel conductance, minimum drain-source voltage, threshold voltage mismatch, etc. In some cases, the set of performance parameter values for the physical parameters associated with the identified first subcircuit may be determined based on the first ML model of the identified subcircuit. For example, the physical parameters associated with the identified first subcircuit may be input into a first trained ML model of the identified subcircuit for a first process technology to determine the performance parameter values for the identified first subcircuit. In block 1410, the identified first subcircuit is transformed into a second subcircuit for the process technology based on the determined set of performance parameter values, the second subcircuit having a third electrical component and a fourth electrical component arranged in a second topology. In some cases, a type of the first subcircuit is identified based on connections between the first and second electrical components. The determined set of performance parameter values is input into one or more ML models of the identified type of the first subcircuit for that process technology, and one or more sets of physical parameter values corresponding to one or more topologies associated with the first subcircuit type are received. The second topology is selected from one or more topologies. In some cases, selecting the second topology is based on an optimization function. The optimization function may be based on some electrical components of the one or more topologies.In some cases, the optimization function is associated with the third electrical component and the fourth electrical component based on physical parameter values corresponding to one or more topology physical parameter values of the set of physical parameter values corresponding to the selected second topology.
[0122] FIG. 15 is a flowchart illustrating a technique for designing a circuit 1500 according to an aspect of the disclosure. At block 1502, an indication of a subcircuit type and a set of subcircuit performance parameter values may be received. For example, a user may provide an indication of the subcircuit type and one or more subcircuit performance parameter values for the subcircuit type. At block 1504, a subcircuit topology may be determined based on the subcircuit type and the set of subcircuit performance parameter values. For example, a specific subcircuit topology for the subcircuit type may be provided, and an ML model for the subcircuit type may be identified. As another example, subcircuit performance parameter values may be provided for multiple subcircuit ML models corresponding to the subcircuit type. This set of subcircuit ML models and the corresponding subcircuit topologies may be retrieved from an ML model library. The subcircuit performance parameter values may be input into a subcircuit ML model of the set of subcircuit ML models to determine corresponding subcircuit performance parameters for the subcircuit topology corresponding to the subcircuit ML model. In some cases, if a subcircuit performance parameter for the subcircuit topology cannot be determined for the subcircuit performance parameter, the subcircuit topology may be removed from the set of subcircuit topologies. An optimization function may then be applied to the sub-circuit topologies of the set of sub-circuit topologies to select a sub-circuit topology. The optimization function may be any known optimization technique, such as a cost function, a loss function, etc. As an example, the optimization function may select a sub-circuit topology based on a minimum number of electrical components having sub-circuit performance parameters of those electrical components within a particular range selected to facilitate manufacturing based on a first process technology.
[0123] At block 1506, a set of subcircuit physical parameter values is determined based on the first machine learning (ML) model of the subcircuit topology and the set of subcircuit performance parameter values. In some cases, the set of subcircuit physical parameter values may be determined as part of determining the subcircuit topology. At block 1508, a data object representing the subcircuit is generated based on the determined set of subcircuit physical parameter values and the determined subcircuit topology. For example, a netlist representation of the subcircuit may be generated using the determined subcircuit topology and the determined subcircuit physical parameter values. At block 1510, the data object is output.
[0124] FIG. 16 is a flowchart illustrating a technique for designing a circuit 1600 according to an aspect of the present disclosure. At block 1602, a first set of sub-circuit physical parameters for electrical components of the sub-circuit and an indication of a first process technology are received. For example, the physical parameters for the electrical components of the first sub-circuit may be received along with a description of how the electrical components are connected, as well as information related to the process technology with which the first sub-circuit is associated. In some cases, a set of performance parameters may also be received, the performance parameters indicating which performance parameters are applicable to the first sub-circuit. At block 1604, first variations of sub-circuit performance parameters for the electrical components of the structural sub-circuit are determined, the first variations including at least one sub-circuit physical parameter that varies from a sub-circuit physical parameter of the first set of sub-circuit physical parameters. In some cases, determining the set of variations of physical parameters for the electrical components of the sub-circuit includes determining the variations of the physical parameters for the electrical components based on a practical range of physical parameter values for the first process technology. In block 1606, a first variation of a sub-circuit physical parameter in a first process technology is simulated to generate a first set of sub-circuit performance parameter values associated with the first variation. For example, for a particular sub-circuit, a set of physical parameters may be generated by simulating the particular sub-circuit using a set of physical parameter values. The physical parameter values in these sets of physical parameter values may vary over a range of practical values associated with each physical parameter value. In some cases, a set of physical parameter variations is identified to exhibit nonlinear behavior of the sub-circuit. In some cases, the set of physical parameter variations for the sub-circuit may be simulated using a simulation program having a SPICE circuit model of the sub-circuit.
[0125] At block 1608, a machine learning (ML) model of the structural subcircuit is trained based on a set of variations for a first process technology, the set including a first variation and a set of subcircuit performance parameters associated with the first variation. In some cases, the ML model of the subcircuit includes one of a linear regression, a large margin classifier, a principal component analysis, a tree-based, or a neural network machine learning model. In some cases, training the ML model includes identifying a set of parameters for input to the ML model. In some cases, the set of parameters for input to the ML model is based on a set of physical parameters or generated performance parameters and one or more parameters associated with the first process technology or one or more parameters associated with the second process technology. In some cases, the trained ML model is stored at block 1610. In some cases, a library of trained ML models includes a trained ML model for each subcircuit of a predetermined set of subcircuits. In some cases, in the library of trained ML models, each trained ML model is associated with a particular subcircuit, and each trained ML model may be different from other trained ML models in the library of trained ML models.
[0126] 17A-17B are flowcharts illustrating a technique for circuit modeling 1700 according to aspects of the disclosure. At block 1702, an initial set of parameters is received, the initial set of parameters being associated with a subcircuit. For example, a set of subcircuit performance parameters or subcircuit physical parameters for an ML model of the subcircuit may be received. At block 1704, a first parameter of the initial set of parameters is interacted with other parameters of the initial set of parameters to generate a set of interacted parameters. For example, the first parameter may be interacted with another parameter of the set of parameters to generate an interacted parameter. At block 1706, the interacted parameter is added to the initial set parameters to generate a candidate set of parameters. For example, the interacted parameter may be added to the set of parameters. At block 1708, a linear regression may be performed on the parameters of the candidate set of parameters against a set of expected parameter values to determine predicted values of the parameters of the candidate set of parameters. For example, linear regression attempts to model the relationship between parameters compared to the expected results of an ML model, and a statistical significance test may be applied to the results of the linear regression to determine the statistical significance of a parameter in the set of parameters. In some cases, the linear regression equation may be based on a Taylor series regression.
[0127] At block 1710, parameters of the candidate set of parameters are eliminated based on a comparison between the predicted value and a predetermined prediction threshold. For example, the statistical significance value of the parameters of the set of parameters may be compared to a predetermined threshold, and parameters that do not meet the predetermined threshold may be eliminated from the set of parameters. In some cases, the statistical p-value may be compared to a minimum p-value, and variables with p-values less than the minimum p-value may be eliminated from the candidate set. Multiple variables may be eliminated from the candidate set of variables in each round. At block 1712, the accuracy of the candidate set of parameters may be determined based on a set of expected parameter values. For example, the candidate set of parameters may be compared to expected results to determine accuracy. The predicted value based on the candidate set of variables may be compared to the expected set of parameter values to determine the accuracy of the candidate set of variables. In some cases, each parameter of the initial set of parameters may be interacted with other parameters of the initial set of parameters before accuracy determination. For example, each original variable may be interacted with a candidate variable of the set of candidate variables, even if the original variable was eliminated from the set of candidate variables. At block 1714, the accuracy of the candidate set of parameters may be compared to a predetermined accuracy level. If the accuracy of the candidate set of parameters reaches a predetermined accuracy level at block 1716, the candidate set of parameters is output at block 1718. If the accuracy of the candidate set of parameters does not reach a predetermined accuracy level, certain steps may be repeated.
[0128] At block 1720, a second parameter of the initial set of parameters is interacted with another parameter of the candidate set of parameters. This interaction may be similar to the interaction described in connection with block 1704, where another parameter may be interacted with another parameter of the set of parameters to generate an interacted parameter. At block 1722, the interacted parameter is added to the candidate set of parameters. For example, the interacted parameter may be added to the set of parameters. At block 1724, a linear regression may be performed on the parameters of the candidate set of parameters against the set of expected parameter values to determine a predicted value for the parameter of the candidate set of parameters. At block 1726, a parameter of the candidate set of parameters is removed based on a comparison between the predicted value and a predetermined prediction threshold. At block 1728, the accuracy of the candidate set of parameters may be determined based on the set of expected parameter values. At block 1730, the accuracy of the candidate set of parameters may be compared to a predetermined accuracy level. At block 1732, if the accuracy of the second candidate set of parameters reaches a predetermined accuracy, the candidate set of parameters is output at block 1718. If each parameter in the initial set of parameters has been interacted with other parameters in the candidate set a predetermined number of times in block 1732, a candidate set of parameters is output in block 1718. Otherwise, blocks 1720-1730 may be repeated with another parameter in the initial set of parameters.
[0129] In some cases, the initial set of parameters may include one or more parameter values based on characteristics of the process technology. In some cases, the initial set of parameters may include one or more parameter values based on theoretical interactions between one or more parameter values of the first set of parameters.
[0130] If the accuracy does not reach a predetermined accuracy level, a second ML model may be trained based on the set of selected variables and the parameter values of the second set of parameter values. For example, if a sufficient level of accuracy is not met and the iterations terminate after each variable in the original set of variables has been interacted with a predetermined number of times, another ML model may be trained using the final set of candidate variables. If the other ML model is sufficiently accurate, the other ML model may be stored, for example, in an ML library, instead of the linear regression equation. Additionally, the accuracy of the second ML model may be determined. A determination may also be made that the accuracy of the second ML model is greater than a predetermined accuracy level, and the set of selected variables and the second ML model may be stored as the first ML model for the subcircuit for the process technology. In some cases, the second ML model may be a neural network. In some cases, Bayesian hyperparameter optimization may be applied to the second ML model. In some cases, the hyperparameters optimized by Bayesian hyperparameter optimization include one of the number of layers of neurons in the neural network, the number of neurons in each layer of the neural network, and a weight decay value.
[0131] As illustrated in FIG. 18 , device 1800 includes processing elements, such as processor 1805, which includes one or more hardware processors, each of which may have a single or multiple processor cores. Examples of processors include, but are not limited to, a central processing unit (CPU) or a microprocessor. Although not illustrated in FIG. 18 , the processing elements comprising processor 1805 may also include one or more other types of hardware processing components, such as a graphics processing unit (GPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), and / or a digital signal processor (DSP). In some cases, processor 1805 may be configured to perform the functions described in connection with FIGS. 5 , 6 , 8 , 11 , and 12-17 . Also, while described in connection with a single device, it should be understood that the described functions may be performed by any number of processing elements, and that these processing elements may be associated with multiple communicatively coupled devices. For example, generation of ML models, ML libraries, netlists, etc. may be performed on separate devices, as compared to circuit transformation or optimization. In some cases, these various devices may be networked by any known networking technology, examples of which include Ethernet, Wireless Fidelity (Wi-Fi), the Internet, etc. In some cases, data objects may be provided and / or received via non-transitory computer-readable storage media.
[0132] FIG. 18 illustrates that memory 1810 may be operatively and communicatively coupled to processor 1805. Memory 1810 may be a non-transitory computer-readable storage medium configured to store various types of data. For example, memory 1810 may include one or more volatile devices, such as random access memory (RAM). In some cases, SRAM and circuits such as those described in FIGS. 4-8 may be incorporated as part of memory 1810. Non-volatile storage device 1820 may include one or more disk drives, optical drives, solid-state drives (SSDs), tap drives, flash memory, electrically programmable read-only memory (EEPROM), and / or any other type of memory designed to retain data for a period of time after a power loss or shutdown operation. Volatile storage device 1820 may also be used to store programs that are loaded into RAM when such programs are executed.
[0133] Those skilled in the art will recognize that software programs can be developed, coded, and compiled in a variety of computing languages for a variety of software platforms and / or operating systems, and then loaded and executed by processor 1805. In one embodiment, the software program compilation process may convert program code written in one programming language into another computer language so that processor 1805 can execute the programming code. For example, the software program compilation process may generate an executable program that provides coded instructions (e.g., machine code instructions) to processor 1805 to accomplish a particular, non-general-purpose, specific computing function.
[0134] After the compilation process, the encoded instructions may be loaded as computer-executable instructions or process steps from storage 1820, from memory 1810, into processor 1805, and / or embedded within processor 1805 (e.g., via cache or on-board ROM). Processor 1805 may be configured to execute the stored instructions or process steps to perform instructions or process steps to transform the computing device into a non-general-purpose, specific, specially programmed machine or apparatus. Stored data, such as data stored by storage device 1820, may be accessed by processor 1805 during execution of the computer-executable instructions or process steps to instruct one or more components within computing device 1800. Storage 1820 may be partitioned or divided into multiple sections that can be accessed by different software programs. For example, storage 1820 may include sections designated for specific purposes, such as storing program instructions or data for updating software on computing device 1800. In one embodiment, the updated software comprises the ROM or firmware of the computing device. In some cases, computing device 1800 may include multiple operating systems. For example, computing device 1800 may include a general-purpose operating system that is utilized for normal operation. Computing device 1800 may also include another operating system, such as a boot loader, to perform specific tasks, such as upgrading and recovering the general-purpose operating system, and to allow access to computing device 1800 at levels not generally available through the general-purpose operating system. Both the general-purpose operating system and the other operating system may access sections of storage 1820 designated for specific purposes.
[0135] The one or more communication interfaces may include a wireless communication interface for interfacing with one or more wireless communication devices. In some cases, elements coupled to the processor may be included on hardware shared with the processor. For example, the communication interface 1825, storage 1820, and memory 1810 may be included on a single chip or package such as a system-on-chip (SOC) along with other elements, such as a digital radio. The computing device may also include input and / or output devices (not shown), examples of which include sensors, cameras, or human input devices such as a mouse, keyboard, touchscreen, monitor, display screen, haptic or motion generator, speaker, and light. For example, processed input from the radar device 1830 may be output from the computing device 1800 to one or more other devices via the communication interface 1825.
[0136] Modifications may be made to the exemplary embodiments described, and other embodiments are possible, within the scope of the following claims.
[0137] For example, the first process technology characterization module 810 may be implemented using any number of decision techniques, such as, for example, statistical regression analysis and statistical classifiers, such as neural networks, decision trees, Bayesian classifiers, fuzzy logic-based classifiers, deep learning, and statistical pattern recognition.
[0138] Similarly, as another example, the second process technology characterization module 820 may be implemented using any number of decision techniques, such as statistical regression analysis and statistical classifiers, such as neural networks, decision trees, Bayesian classifiers, fuzzy logic-based classifiers, deep learning, and statistical pattern recognition.
Claims
1. 1. A method comprising: receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology to a stored topology associated with a first process technology; identifying a set of first sub-circuit physical parameter values associated with a first electrical component and a second electrical component of the first sub-circuit; determining a set of sub-circuit performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of first sub-circuit physical parameter values; converting the identified first sub-circuit based on the determined set of sub-circuit performance parameter values into a second sub-circuit for a second process technology; outputting the second sub-circuit; A method comprising:
2. 10. The method of claim 1, converting the identified first sub-circuit into a second sub-circuit; determining a second set of sub-circuit physical parameter values associated with a third electrical component and a fourth electrical component of the second sub-circuit based on a second ML model for the second process technology and the set of sub-circuit performance parameter values; associating sub-circuit physical parameter values of the second sub-circuit physical parameter value set with a third electrical component and a fourth electrical component of the second sub-circuit; A method comprising:
3. 3. The method of claim 2, The method, wherein the third electrical component and the fourth electrical component correspond to the first electrical component and the second electrical component, respectively.
4. 3. The method of claim 2, The method, wherein the first ML model and the second ML model comprise neural networks.
5. 10. The method of claim 1, The method, wherein the second process technology comprises a second semiconductor manufacturing process involving smaller electrical components compared to the first process technology.
6. 10. The method of claim 1, The method further includes verifying the second sub-circuit based on a circuit simulation of the second sub-circuit.
7. 10. The method of claim 1, A method wherein a sub-circuit performance parameter value of the set of sub-circuit performance parameter values is determined based on a type of the identified first sub-circuit.
8. 10. The method of claim 1, A method wherein identifying the first sub-circuit is based on a set of rules.
9. a non-transitory program storage device containing stored instructions, The instruction: receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology with a stored topology, the stored topology identifying the first sub-circuit associated with the first process technology; identifying a set of first sub-circuit physical parameter values associated with a first electrical component and a second electrical component of the first sub-circuit; determining a set of sub-circuit performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of first sub-circuit physical parameter values; converting the identified first sub-circuit into a second sub-circuit for a second process technology based on the determined set of sub-circuit performance parameter values; outputting the second sub-circuit; a non-transitory program storage device that causes one or more processors to
10. 10. The non-transitory program storage device of claim 9, instructions for transforming the identified first sub-circuit into a second sub-circuit; determining a second set of sub-circuit physical parameter values associated with a third electrical component and a fourth electrical component of the second sub-circuit based on a second ML model for the second process technology and the set of sub-circuit performance parameter values; associating sub-circuit physical parameter values of the second sub-circuit physical parameter value set with a third electrical component and a fourth electrical component of the second sub-circuit; a non-transitory program storage device containing instructions for causing said one or more processors to:
11. 11. The non-transitory program storage device of claim 10, a non-transitory program storage device, wherein the third electrical component and the fourth electrical component correspond to the first electrical component and the second electrical component, respectively;
12. 11. The non-transitory program storage device of claim 10, a non-transitory program storage device, wherein the first ML model and the second ML model comprise neural networks;
13. 10. The non-transitory program storage device of claim 9, A non-transitory program storage device comprising a second semiconductor manufacturing process, wherein the second process technology involves smaller electrical components compared to the first process technology.
14. 11. The non-transitory program storage device of claim 10, 4. A non-transitory program storage device, wherein the instructions further include instructions to cause the one or more processors to verify the second sub-circuit based on a circuit simulation of the second sub-circuit.
15. 10. The non-transitory program storage device of claim 9, A non-transitory program storage device, wherein a sub-circuit performance parameter value of the set of sub-circuit performance parameter values is determined based on the identified first sub-circuit type.
16. 10. The non-transitory program storage device of claim 9, A non-transitory program storage device, wherein identifying the first sub-circuit is based on a set of rules.
17. 1. An electronic device comprising: Memory and one or more processors operably coupled to the memory, receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology with a stored topology, the stored topology identifying the first sub-circuit associated with a first process technology; identifying a set of first sub-circuit physical parameter values associated with a first electrical component and a second electrical component of the first sub-circuit; determining a set of sub-circuit performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of first sub-circuit physical parameter values; converting the identified first sub-circuit into a second sub-circuit for a second process technology based on the determined set of sub-circuit performance parameter values; outputting the second sub-circuit; the one or more processors configured to execute instructions that cause the one or more processors to , an electronic device.
18. 18. The electronic device of claim 17, the instructions for transforming the identified first sub-circuit into a second sub-circuit include: determining a second set of sub-circuit physical parameter values associated with a third electrical component and a fourth electrical component of the second sub-circuit based on a second ML model for the second process technology and the set of sub-circuit performance parameter values; associating sub-circuit physical parameter values of the second sub-circuit physical parameter value set with a third electrical component and a fourth electrical component of the second sub-circuit; 20. An electronic device comprising: instructions for causing said one or more processors to:
19. 20. The electronic device of claim 18, The third electrical component and the fourth electrical component correspond to the first electrical component and the second electrical component, respectively.
20. 20. The electronic device of claim 18, The electronic device, wherein the first ML model and the second ML model include neural networks.
21. 20. The electronic device of claim 18, A sub-circuit performance parameter value of the set of sub-circuit performance parameter values is determined based on a type of the identified first sub-circuit.
Citation Information
Patent Citations
Circuit optimization system
JP1992199369A
Analog Design Retargeting
US20080134109A1
Trustworthy structural synthesis and expert knowledge extraction with application to analog circuit design
US20090307638A1
Intelligent metamodel integrated verilog-AMS for fast and accurate analog block design exploration
US20140282314A1
Knowledge-based analog layout generator
US20150067626A1