Method for driving an electro-optic display

Abstract

A method of driving an electro-optic display including a layer of electro-optic material disposed between a common electrode and a backplane including an array of pixel electrodes, each coupled to a transistor including a source, gate, and drain electrode. The gate electrode is coupled to a gate line, the source electrode is coupled to a scan line, and the drain electrode is coupled to a pixel electrode. A controller provides time-dependent voltages to the gate, scan, and common electrodes, including a common electrode that is the maximum voltage the controller is capable of applying, and a scan line voltage for all pixels that is the maximum voltage the controller is capable of applying. A gate voltage sufficient to activate the pixel transistors is applied to the gates of all pixel transistors, thereby applying a voltage potential across the electro-optic material.

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority to U.S. Provisional Patent Application No. 63 / 292,458, filed December 22, 2021, the entire contents of which are incorporated herein by reference. Additionally, the entire contents of any patents, published applications, or other published works referenced herein are incorporated by reference in their entirety.

[0002] FIELD OF THE INVENTION The present invention relates to a method for driving an electro-optic display, and more particularly to a driving method for applying voltages globally to display pixels substantially simultaneously. [Background technology]

[0003] BACKGROUND OF THE INVENTION An electro-optic display typically has a backplane comprising a plurality of pixel electrodes, each of which defines one pixel of the display; conventionally, a single common electrode extends across many of the pixels, usually provided across the entire display, on the side opposite the electro-optic medium. Individual pixel electrodes may be driven directly (i.e., a separate conductor may be provided for each pixel electrode), or the pixel electrodes may be driven in an active matrix manner, which will be familiar to those skilled in the art of backplane technology.

[0004] In active matrix addressing, each display pixel is attached to a transistor and capacitor that actively maintains the pixel's state while other pixels are addressed. For some applications, it is desirable to have a large voltage applied globally across the ink stack. For such applications, a voltage can be applied to the top plane, which is a common reference shared by all pixels. This method of switching modules is called global top-plane switching.

[0005] U.S. Patent No. 10,037,735, assigned to E INK CORPORATION, describes globally driving an active matrix display through a top plane by temporarily switching the connection of the counter electrode of each reservoir capacitor from the top plane to a ground reference separate from the top plane. The reservoir capacitors then act as a virtual ground during global driving when one or more voltages are applied to the top plane.

[0006] However, this method does not allow for additional voltage to be applied to the bottom electrode due to the configuration of the reservoir capacitor. Therefore, without further modification, the maximum voltage potential that can be generated across the ink is limited to the maximum voltage that can be applied to the top plane. Furthermore, if a higher voltage is applied to the top plane in this configuration, coupling may occur and the virtual ground may not hold, causing undesired charging or discharging of the reservoir capacitor.

[0007] Other complications can arise based on active matrix addressing, which activates each row select line at a different time. Thus, when using global top-plane switching for an active matrix, every pixel experiences the voltage applied to the top plane at a different time, with the longest time difference occurring between the application of the first and last row select lines. This can result in uneven application of voltage across the ink stack, which is counter to the intended purpose for using global top-plane switching. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] U.S. Patent No. 10,037,735 Summary of the Invention [Means for solving the problem]

[0009] (Summary of the Invention) Thus, there is a need for drive methods to perform top-plane switching more effectively and efficiently. In particular, there is therefore a need for systems and methods for performing global top-plane switching that are capable of applying a high voltage across the ink stack while simultaneously or nearly simultaneously addressing all of the transistors.

[0010] In one aspect, the subject matter presented herein provides a method for driving an electro-optic display having a plurality of display pixels. The method can include simultaneously or nearly simultaneously turning on all pixel transistors and applying appropriate voltages to generate a desired voltage potential across the ink stack. The subject matter presented herein can also drive displays using voltages higher than the capabilities of conventional driver devices without exceeding the driver voltage specifications or requiring substantial driver redesign.

[0011] In one aspect, the invention features a method of driving an electro-optic display including a layer of electro-optic material disposed between a common electrode and a backplane. The backplane includes an array of pixel electrodes. Each pixel electrode is coupled to a pixel transistor including a source electrode, a gate electrode, and a drain electrode. The gate electrode is coupled to a gate line, the source electrode is coupled to a scan line, and the drain electrode is coupled to the pixel electrode. A controller provides time-dependent voltages to the gate lines, the scan lines, and the common electrode. The driving method includes applying a first voltage to the common electrode. The first voltage has a first amplitude that is the maximum voltage the controller is capable of applying to the common electrode. The driving method also includes applying a second voltage to the scan lines of all pixels, the second voltage having a second amplitude that is the maximum voltage the controller is capable of applying to the scan lines of all pixels, the second voltage having an opposite polarity to the first voltage. The driving method also includes applying a gate line voltage in parallel to the gate lines of all of the pixel transistors at a level high enough to activate the pixel transistors, thereby applying a third voltage across the electro-optic material, the third voltage having a third amplitude sufficient to drive the optical state of the display to the first extreme optical state.

[0012] In some embodiments, the first voltage has a positive polarity and the second voltage has a negative polarity. In some embodiments, the first voltage has a negative polarity and the second voltage has a positive polarity. In some embodiments, the third voltage has a magnitude of substantially 30 V. In some embodiments, the third voltage has a magnitude of substantially 45 V. In some embodiments, the first extreme optical state is one of white and black.

[0013] In some embodiments, the method further includes applying a gate line voltage to the gate lines of all of the pixel transistors in parallel at a low level sufficient to deactivate the pixel transistors; applying a fourth voltage to the common electrode, the fourth voltage having a fourth amplitude that is a maximum voltage that the controller is capable of applying to the common electrode; applying a fifth voltage to the scan lines of all of the pixels, the fifth voltage having a fifth amplitude that is a maximum voltage that the controller is capable of applying to the scan lines of all of the pixels, the fifth voltage having an opposite polarity to the second voltage and the fourth voltage; and applying a gate line voltage to the gate lines of all of the pixel transistors in parallel at a high level sufficient to activate the pixel transistors, thereby applying a sixth voltage across the electro-optic material, the sixth voltage having a sixth amplitude sufficient to drive the optical state of the display to the second extreme optical state.

[0014] In some embodiments, the second extreme optical state is one of white and black, and the second extreme optical state is opposite to the first extreme optical state. In some embodiments, the sixth voltage has a magnitude of substantially 30 V. In some embodiments, the sixth voltage has a magnitude of substantially 45 V.

[0015] In another aspect, the invention features an electro-optic display including a backplane including a light-transmitting common electrode, an array of pixel electrodes, and a layer of electro-optic material disposed between the common electrode and the array of pixel electrodes. Each pixel electrode is coupled to a pixel transistor including a source electrode, a gate electrode, and a drain electrode, where the gate electrode is coupled to a gate line, the source electrode is coupled to a scan line, and the drain electrode is coupled to the pixel electrode. The electro-optic display further includes a controller capable of applying time-dependent voltages to the gate lines, the scan lines, and the common electrode. The controller is configured to (i) apply a first voltage to the common electrode. The first voltage has a first amplitude that is the maximum voltage the controller is capable of applying to the common electrode. (ii) apply a second voltage to the scan lines of all pixels, the second voltage having a second amplitude that is the maximum voltage the controller is capable of applying to the scan lines of all pixels. The second voltage has an opposite polarity to the first voltage. (iii) applying a gate line voltage to the gate lines of all of the pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a third voltage across the electro-optic material, the third voltage having a third amplitude sufficient to drive the optical state of the display to the first extreme optical state.

[0016] In some embodiments, the first voltage has a positive polarity and the second voltage has a negative polarity. In some embodiments, the first voltage has a negative polarity and the second voltage has a positive polarity. In some embodiments, the third voltage has a magnitude of substantially 30 V. In some embodiments, the third voltage has a magnitude of substantially 45 V. In some embodiments, the first extreme optical state is one of white and black.

[0017] In some embodiments, the controller is further configured to (i) apply a gate line voltage to the gate lines of all of the pixel transistors in parallel at a level low enough to deactivate the pixel transistors; (ii) apply a fourth voltage to the common electrode, the fourth voltage having a fourth amplitude that is the maximum voltage the controller is capable of applying to the common electrode; (iii) apply a fifth voltage to the scan lines of all of the pixels, the fifth voltage having a fifth amplitude that is the maximum voltage the controller is capable of applying to the scan lines of all of the pixels, the fifth voltage having an opposite polarity to the second voltage and the fourth voltage; and (iv) apply a gate line voltage to the gate lines of all of the pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a sixth voltage across the electro-optical material, the sixth voltage having a sixth amplitude sufficient to drive the optical state of the display to the second extreme optical state.

[0018] In some embodiments, the second extreme optical state is one of white and black, and the second extreme optical state is opposite to the first extreme optical state. In some embodiments, the sixth voltage has a magnitude of substantially 30 V. In some embodiments, the sixth voltage has a magnitude of substantially 45 V. The present specification also provides, for example, the following items: (Item 1) 1. A method of driving an electro-optic display comprising a layer of electro-optic material disposed between a common electrode and a backplane, the backplane including an array of pixel electrodes, each pixel electrode coupled to a pixel transistor including a source electrode, a gate electrode, and a drain electrode, the gate electrode coupled to a gate line, the source electrode coupled to a scan line, and the drain electrode coupled to the pixel electrode, a controller providing time-dependent voltages to the gate lines, the scan lines, and the common electrode, the method comprising: applying a first voltage to the common electrode, the first voltage having a first amplitude that is a maximum voltage that the controller is capable of applying to the common electrode; applying a second voltage to the scan lines of all pixels, the second voltage having a second amplitude that is the maximum voltage the controller is capable of applying to the scan lines of all pixels, the second voltage having an opposite polarity to the first voltage; applying a gate line voltage to the gate lines of all pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a third voltage across the electro-optic material, the third voltage having a third amplitude sufficient to drive the optical state of the display to a first extreme optical state; A method comprising: (Item 2) Item 10. The method of item 1, wherein the first voltage has a positive polarity and the second voltage has a negative polarity. (Item 3) Item 10. The method of item 1, wherein the first voltage has a negative polarity and the second voltage has a positive polarity. (Item 4) Item 10. The method of item 1, wherein the third voltage has a magnitude of substantially 30V. (Item 5) Item 10. The method of item 1, wherein the third voltage has a magnitude of substantially 45V. (Item 6) Item 10. The method of item 1, wherein the first extreme optical state is one of white and black. (Item 7) applying a gate line voltage to the gate lines of all pixel transistors in parallel at a low level sufficient to deactivate the pixel transistors; applying a fourth voltage to the common electrode, the fourth voltage having a fourth amplitude that is the maximum voltage that the controller is capable of applying to the common electrode; applying a fifth voltage to the scan lines of all pixels, the fifth voltage having a fifth amplitude that is the maximum voltage that the controller is capable of applying to the scan lines of all pixels, the fifth voltage having an opposite polarity to the second voltage and the fourth voltage; applying a gate line voltage to the gate lines of all pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a sixth voltage across the electro-optic material, the sixth voltage having a sixth amplitude sufficient to drive the optical state of the display to a second extreme optical state; Item 1, the method of claim 1 further comprising: (Item 8) Item 8. The method of item 7, wherein the second extreme optical state is one of white and black, and the second extreme optical state is opposite to the first extreme optical state. (Item 9) 8. The method of claim 7, wherein the sixth voltage has a magnitude of substantially 30V. (Item 10) 8. The method of claim 7, wherein the sixth voltage has a magnitude of substantially 45V. (Item 11) 1. An electro-optic display, comprising: a light-transmitting common electrode; a backplane including an array of pixel electrodes; a layer of electro-optical material disposed between the common electrode and the array of pixel electrodes, each pixel electrode coupled to a pixel transistor including a source electrode, a gate electrode, and a drain electrode, the gate electrode coupled to a gate line, the source electrode coupled to a scan line, and the drain electrode coupled to the pixel electrode; a controller capable of applying time-dependent voltages to the gate lines, the scan lines, and the common electrode; Equipped with The controller applying a first voltage to the common electrode, the first voltage having a first amplitude that is the maximum voltage that the controller is capable of applying to the common electrode; applying a second voltage to the scan lines of all pixels, the second voltage having a second amplitude that is the maximum voltage the controller is capable of applying to the scan lines of all pixels, the second voltage having an opposite polarity to the first voltage; applying a gate line voltage to the gate lines of all pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a third voltage across the electro-optic material, the third voltage having a third amplitude sufficient to drive the optical state of the display to a first extreme optical state; An electro-optic display configured to: (Item 12) 10. The electro-optic display of item 9, wherein the first voltage has a positive polarity and the second voltage has a negative polarity. (Item 13) 10. An electro-optic display as described in item 9, wherein the first voltage has a negative polarity and the second voltage has a positive polarity. (Item 14) Item 10. An electro-optic display as described in item 9, wherein the third voltage has a magnitude of substantially 30V. (Item 15) Item 10. An electro-optic display as described in item 9, wherein the third voltage has a magnitude of substantially 45V. (Item 16) 10. The electro-optic display of item 9, wherein the first extreme optical state is one of white and black. (Item 17) The controller further comprises: applying a gate line voltage to the gate lines of all pixel transistors in parallel at a low level sufficient to deactivate the pixel transistors; applying a fourth voltage to the common electrode, the fourth voltage having a fourth amplitude that is the maximum voltage that the controller is capable of applying to the common electrode; applying a fifth voltage to the scan lines of all pixels, the fifth voltage having a fifth amplitude that is the maximum voltage that the controller is capable of applying to the scan lines of all pixels, the fifth voltage having an opposite polarity to the second voltage and the fourth voltage; applying a gate line voltage to the gate lines of all pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a sixth voltage across the electro-optic material, the sixth voltage having a sixth amplitude sufficient to drive the optical state of the display to a second extreme optical state; Item 10. An electro-optic display according to item 9, configured to perform (Item 18) Item 16. An electro-optic display as described in item 15, wherein the second extreme optical state is one of white and black, and the second extreme optical state is opposite to the first extreme optical state. (Item 19) Item 18. An electro-optic display as described in item 17, wherein the sixth voltage has a magnitude of substantially 30V. (Item 20) Item 18. An electro-optic display as described in item 17, wherein the sixth voltage has a magnitude of substantially 45V. [Brief explanation of the drawings]

[0019] [Figure 1] FIG. 1 is a circuit diagram illustrating an electrophoretic display.

[0020] [Figure 2] FIG. 2 shows a circuit model of the electro-optic imaging layer.

[0021] [Figure 3A] FIG. 3A shows a schematic diagram and signal diagram of an exemplary electro-optic display in accordance with the subject matter presented herein.

[0022] [Figure 3B] FIG. 3B shows two illustrative frames during which positive and negative voltages are applied to a display pixel in accordance with the subject matter presented herein.

[0023] [Figure 4] FIG. 4 shows an example schematic diagram of two adjacent rows of display pixels in accordance with the subject matter presented herein.

[0024] [Figure 5A]FIG. 5A shows a schematic diagram of an exemplary electro-optic display including a plurality of display pixels arranged in rows and columns in accordance with the subject matter presented herein.

[0025] [Figure 5B] FIG. 5B illustrates a signal timing selection diagram for row select lines of an exemplary electro-optic display in accordance with the subject matter presented herein.

[0026] [Figure 5C] FIG. 5C shows a signal diagram of the applied voltage in accordance with the subject matter presented herein. DETAILED DESCRIPTION OF THE INVENTION

[0027] (Detailed Description of the Invention) The present invention relates to a method for driving electro-optic displays, particularly bistable electro-optic displays, and to an apparatus for use in such a method. More particularly, the present invention relates to a driving method that may enable the reduction of "afterimages" and edge effects in such displays, as well as the reduction of flashing. The present invention is particularly, but not exclusively, intended for use with particle-based electrophoretic displays, in which one or more types of electrically charged particles are present in a fluid and are moved through the fluid under the influence of an electric field, changing the appearance of the display.

[0028] The term "electro-optic," as applied to a material or display, is used herein in its conventional sense in the imaging arts to refer to a material having first and second display states that differ in at least one optical property, and that is changed from its first display state to its second display state by the application of an electric field to the material. The optical property is typically color perceptible to the human eye, but it may also be another optical property, such as optical transmittance, reflectance, luminescence, or, in the case of displays intended for machine reading, pseudocolor in the sense of a change in reflectance of electromagnetic wavelengths outside the visible range.

[0029] The term “gray state” is used herein in its conventional sense in the imaging arts to refer to a state intermediate between two extreme pixel optical states, and does not necessarily imply a black-to-white transition between these two extreme states. For example, several of the E Ink patents and published applications referenced below describe electrophoretic displays in which the extreme states are white and dark blue, such that the intermediate “gray state” is actually light blue. In fact, as already noted, a change in optical state may not be a change in color at all. The terms “black” and “white” may be used hereinafter to refer to the two extreme optical states of a display and should generally be understood to include extreme optical states that are not strictly black and white, such as the aforementioned white and dark blue states. The term “monochrome” may be used hereinafter to refer to a drive scheme that drives pixels to only their two extreme optical states, with no intervening gray states.

[0030] Some electro-optic materials are solid in the sense that the material has a solid exterior surface, but the material can, and often does, have an interior liquid- or gas-filled space. Such displays that use solid electro-optic materials may hereinafter be referred to for convenience as "solid electro-optic displays." Thus, the term "solid electro-optic display" includes rotating dichroic member displays, encapsulated electrophoretic displays, microcell electrophoretic displays, and encapsulated liquid crystal displays.

[0031] The terms "bistable" and "bistable" are used herein in their conventional sense in the art to refer to displays having display elements with first and second display states that differ in at least one optical property, such that after any given element is driven with a finite-duration addressing pulse to assume either its first or second display state, that state will persist after the addressing pulse is terminated for at least several times, e.g., at least four times, the minimum duration of the addressing pulse required to change the state of the display element. U.S. Pat. No. 7,170,670 shows that some grayscale-capable particle-based electrophoretic displays are stable not only in their extreme black and white states but also in their intermediate gray states, and the same is true for several other types of electro-optic displays. Displays of this type are properly referred to as "multistable" rather than bistable, but for convenience, the term "bistable" may be used herein to encompass both bistable and multistable displays.

[0032] The term "impulse" is used herein in its conventional sense of the integral of voltage with respect to time. However, some bistable electro-optic media act as charge transducers, and when using such media, an alternative definition of impulse may be used: the integral of current over time (equal to the total charge applied). The appropriate definition of impulse should be used depending on whether the medium acts as a voltage-time impulse transducer or a charge impulse transducer.

[0033] Much of the following discussion will focus on methods for driving one or more pixels of an electro-optic display through a transition from an initial gray level to a final gray level (which may or may not be different from the initial gray level). The term "waveform" will be used to refer to the overall voltage versus time curve used to effect a transition from a specific initial gray level to a specific final gray level. Typically, such a waveform will comprise multiple waveform elements. If these elements are approximately rectangular (i.e., if a given element comprises the application of a constant voltage over a period of time), the element may be referred to as a "pulse" or "drive pulse." The term "drive scheme" refers to a set of waveforms sufficient to effect all possible transitions between gray levels for a specific display. A display may utilize more than one drive scheme. For example, the aforementioned U.S. Patent No. 7,012,600 teaches that a drive scheme may need to be modified depending on parameters such as the temperature of the display or the time it has been in operation during its lifetime, and thus a display may be provided with multiple different drive schemes for use at different temperatures, etc. A set of drive schemes used in this manner may be referred to as a "set of related drive schemes." Also, as described in some of the aforementioned MEDEOD applications, it is possible to use more than one drive scheme simultaneously in different areas of the same display, and a set of drive schemes used in this manner may be referred to as a "set of simultaneous drive schemes."

[0034] Several types of electro-optic displays are known. One type of electro-optic display is the rotating dichroic member type, as described, for example, in U.S. Patent Nos. 5,808,783, 5,777,782, 5,760,761, 6,054,071, 6,055,091, 6,097,531, 6,128,124, 6,137,467, and 6,147,791. (Displays of this type are often referred to as "rotating dichroic ball" displays, but in some of the above-mentioned patents, the rotating member is not spherical, so the term "rotating dichroic member" is preferred as it is more accurate.) Such displays use a number of small bodies (typically spherical or cylindrical) having two or more segments with different optical properties and an internal dipole. These bodies are suspended within liquid-filled vacuoles within a matrix, and the vacuoles are filled with liquid so that the bodies are free to rotate. The appearance of the display is changed by applying an electric field to it, thus rotating the bodies to various positions and varying the position of segments of the bodies as seen through the viewing surface. This type of electro-optic medium is typically bistable.

[0035] Another type of electro-optic display uses an electrochromic medium, for example, in the form of a nanochromic film, consisting of electrodes formed at least in part from a semiconducting metal oxide and a plurality of dye molecules attached to the electrodes, capable of reversible color change. See, for example, O'Regan, B., et al., Nature 1991, 353, 737, and Wood, D., Information Display, 18(3), 24 (March 2002). See also Bach, U., et al., Adv. Mater., 2002, 14(11), 845. Nanochromic films of this type are also described, for example, in U.S. Patent Nos. 6,301,038, 6,870,657, and 6,950,220. Media of this type are also typically bistable.

[0036] Another type of electro-optic display is the electrowetting display developed by Philips and described in Hayes, R.A., et al., "Video-Speed ​​Electronic Paper Based on Electrowetting," Nature, 425, 383-385 (2003). U.S. Patent No. 7,420,549 shows that such electrowetting displays can be made bistable.

[0037] One type of electro-optic display that has been the subject of intense research and development for many years is the particle-based electrophoretic display, in which a plurality of charged particles move through a fluid under the influence of an electric field. Electrophoretic displays can have attributes of good brightness and contrast, wide viewing angles, state bistability, and low power consumption when compared to liquid crystal displays. Nevertheless, problems with the long-term image quality of these displays have prevented their widespread use. For example, the particles that make up electrophoretic displays tend to settle, resulting in an inadequate usable lifespan for these displays.

[0038] As noted above, electrophoretic media require the presence of a fluid. In most prior art electrophoretic media, this fluid is liquid, but electrophoretic media can also be produced using gaseous fluids. See, for example, Kitamura, T., et al., "Electrical toner movement for electronic paper-like display," IDW Japan, 2001, Paper HCS1-1, and Yamaguchi, Y., et al., "Toner display using insulative particles charged triboelectrically," IDW Japan, 2001, Paper AMD4-4. See also U.S. Patent Nos. 7,321,459 and 7,236,291. Such gas-based electrophoretic media are believed to be susceptible to the same types of problems as liquid-based electrophoretic media, resulting from particle settling, when the media is used in an orientation that allows such settling, such as in a sign positioned in a vertical plane. In fact, particle settling is believed to be a more serious problem in gas-based electrophoretic media than in liquid-based electrophoretic media due to the lower viscosity of the gaseous suspending fluid compared to the viscosity of a liquid, which allows for faster settling of the electrophoretic particles.

[0039] Numerous patents and applications assigned to or in the name of the Massachusetts Institute of Technology (MIT) and E Ink Corporation describe various techniques used in encapsulated electrophoretic and other electro-optic media. Such encapsulated media comprise a multitude of small capsules, each of which comprises an internal phase containing electrophoretically movable particles in a fluid medium and a capsule wall surrounding the internal phase. Typically, the capsules are themselves held within a polymer binder, forming a coherent layer positioned between two electrodes. Techniques described in these patents and applications include the following:

[0040] (a) Electrophoretic particles, fluids, and fluid additives (see, e.g., U.S. Pat. Nos. 7,002,728 and 7,679,814)

[0041] (b) Capsules, binders, and encapsulation processes (see, e.g., U.S. Patent Nos. 6,922,276 and 7,411,719)

[0042] (c) Microcell structures, wall materials, and methods of forming the microcells (see, e.g., U.S. Patent Nos. 7,072,095 and 9,279,906)

[0043] (d) Methods for filling and sealing microcells (see, e.g., U.S. Patent Nos. 7,144,942 and 7,715,088)

[0044] (e) Films and subassemblies containing electro-optical materials (see, e.g., U.S. Patent Nos. 6,982,178 and 7,839,564)

[0045] (f) Backplanes, adhesive layers, other auxiliary layers, and methods used in displays (see, e.g., U.S. Pat. Nos. 7,116,318 and 7,535,624)

[0046] (g) Color formation and color control (see, e.g., U.S. Patent Nos. 7,075,502 and 7,839,564)

[0047] (h) Display Applications (see, e.g., U.S. Patent Nos. 7,312,784 and 8,009,348)

[0048] (i) Non-electrophoretic displays, such as those described in U.S. Patent No. 6,241,921 and U.S. Patent Application Publication No. 2015 / 0277160, as well as non-display applications of encapsulation and microcell technology (see, e.g., U.S. Patent Application Publication Nos. 2015 / 0005720 and 2016 / 0012710).

[0049] (j) Methods for driving displays (e.g., U.S. Patent Nos. 5,930,026, 6,445,489, 6,504,524, 6,512,354, 6,531,997, 6,753,999, 6,825,970, 6,900,851, 6,995,550, 7,012,600, 7,023,420, 7,034,783, 7,061,166, 7,061,662, 7,116,466, 7,119,772, 7,177,066, 7,193,625, 7,222,224, 7,222,226, 7,222,228 ... No. 02,847, No. 7,242,514, No. 7,259,744, No. 7,304,787, No. 7,312,794, No. 7,327 ,511, No. 7,408,699, No. 7,453,445, No. 7,492,339, No. 7,528,822, No. 7,545,3 No. 58, No. 7,583,251, No. 7,602,374, No. 7,612,760, No. 7,679,599, No. 7,679,813 No. 7,683,606, No. 7,688,297, No. 7,729,039, No. 7,733,311, No. 7,733,335, No. No. 7,787,169, No. 7,859,742, No. 7,952,557, No. 7,956,841, No. 7,982,479, No. 7, No. 999,787, No. 8,077,141, No. 8,125,501, No. 8,139,050, No. 8,174,490, No. 8,24 No. 3,013, No. 8,274,472, No. 8,289,250, No. 8,300,006, No. 8,305,341, No. 8,314, No. 784, No. 8,373,649, No. 8,384,658, No. 8,456,414, No. 8,462,102, No. 8,537,105 No. 8,558,783, No. 8,558,785, No. 8,558,786, No. 8,558,855, No. 8,576,164, No. 8,576,259, No. 8,593,396, No. 8,605,032, No. 8,643,595, No. 8,665,206, No. 8 ,681,191, No.8,730,153, No.8,810,525, No.8,928,562, No.8,928,641, No.8,9 No. 76,444, No. 9,013,394, No. 9,019,197, No. 9,019,198, No. 9,019,318, No. 9,082,Nos. 352, 9,171,508, 9,218,773, 9,224,338, 9,224,342, 9,224,344, 9,230,492, 9,251,736, 9,262,973, 9,269,311, 9,299,294, 9,373,289, 9,390,066, 9,390,661, and 9,412,314, and U.S. Patent Application Publication Nos. 2003 / 0102858, 2004 / 0246562, 2005 / 0253777, 2007 / 0070032, 2007 / 0076289, 2007 / 0091418, 2007 / 0103427, 2007 / 0176912, 2007 / 0296452, 2008 / 0024429, 2008 / 0024482, 2008 / 0136774, 2008 / 0169821, 2008 / 0218471, No. 2008 / 0291129, No. 2008 / 0303780, No. 2009 / 0174651, No. 2009 / 0195568, No. 2009 / 0322721, No. 2010 / 0194733, No. 2010 / 0194789, No. 2010 / 02 20121, 2010 / 0265561, 2010 / 0283804, 2011 / 0063314, 2011 / 0175875, 2011 / 0193840, 2011 / 0193841, 2011 / 0199671, 2 No. 011 / 0221740, No. 2012 / 0001957, No. 2012 / 0098740, No. 2013 / 0063333, No. 2013 / 0194250, No. 2013 / 0249782, No. 2013 / 0321278, No. 2014 / 0009 No. 817, No. 2014 / 0085355, No. 2014 / 0204012, No. 2014 / 0218277, No. 2014 / 0240210, No. 2014 / 0240373, No. 2014 / 0253425, No. 2014 / 0292830, No. 201 (See Nos. 4 / 0293398, 2014 / 0333685, 2014 / 0340734, 2015 / 0070744, 2015 / 0097877, 2015 / 0109283, 2015 / 0213749, 2015 / 0213765, 2015 / 0221257, 2015 / 0262255, 2016 / 0071465, 2016 / 0078820, 2016 / 0093253, 2016 / 0140910, and 2016 / 0180777).

[0050] Many of the aforementioned patents and applications recognize that the walls surrounding discrete microcapsules in an encapsulated electrophoretic medium may be replaced by a continuous phase, thus producing so-called "polymer-dispersed electrophoretic displays," in which the electrophoretic medium consists of a plurality of discrete droplets of electrophoretic fluid and a continuous phase of polymeric material, and that the discrete droplets of electrophoretic fluid in such polymer-dispersed electrophoretic displays may be considered capsules or microcapsules, even though no discrete capsule membrane is associated with each individual droplet. See, e.g., the aforementioned 2002 / 0131147. Therefore, for purposes of this application, such polymer-dispersed electrophoretic media are considered a subspecies of encapsulated electrophoretic media.

[0051] A related type of electrophoretic display is the so-called "microcell electrophoretic display." In a microcell electrophoretic display, the charged particles and suspending fluid are not encapsulated in microcapsules, but instead are retained within a plurality of cavities formed in a carrier medium, e.g., a polymeric film. See, e.g., International Application Publication No. WO 02 / 01281 and Published U.S. Application No. 2002 / 0075556, both assigned to Sipix Imaging, Inc.

[0052] Many of the aforementioned E Ink and MIT patents and applications also discuss microcell electrophoretic displays and polymer-dispersed electrophoretic displays. The term "encapsulated electrophoretic displays" can refer to all such display types, which can also be collectively described as "microcavity electrophoretic displays" to generalize across wall morphologies.

[0053] Another type of electro-optic display is the electrowetting display developed by Philips and described in Hayes, R.A., et al., "Video-Speed ​​Electronic Paper Based on Electrowetting," Nature, 425, 383-385 (2003). Co-pending application Ser. No. 10 / 711,802, filed Oct. 6, 2004, shows that such electrowetting displays can be made bistable.

[0054] Other types of electro-optic materials may also be used, most notably bistable ferroelectric liquid crystal displays (FLCs), which are known in the art and exhibit remnant voltage behavior.

[0055] Although electrophoretic media are opaque (e.g., in many electrophoretic media, the particles substantially block the transmission of visible light through the display) and operate in a reflective mode, some electrophoretic displays can be adapted to operate in a so-called "shutter mode," in which one display state is substantially opaque and the other is light-transmitting. See, for example, U.S. Patent Nos. 6,130,774 and 6,172,798, as well as U.S. Patent Nos. 5,872,552, 6,144,361, 6,271,823, 6,225,971, and 6,184,856. Dielectrophoretic displays, which are similar to electrophoretic displays but rely on variations in electric field strength, can operate in a similar mode. See U.S. Patent No. 4,418,346. Other types of electro-optic displays may also be capable of operating in a shutter mode.

[0056] High-resolution displays may include individual pixels that are addressable without interference from neighboring pixels. One way to achieve such pixels is to provide an array of nonlinear elements, such as transistors or diodes, with at least one nonlinear element associated with each pixel, producing an "active matrix" display. The addressing or pixel electrode that addresses a pixel is connected to an appropriate voltage source through the associated nonlinear element. When the nonlinear element is a transistor, the pixel electrode may be connected to the drain of the transistor; although this arrangement will be assumed in the following description, it is essentially arbitrary; the pixel electrode may also be connected to the source of the transistor. In high-resolution arrays, pixels may be arranged in a two-dimensional array of rows and columns, such that any particular pixel is uniquely defined by the intersection of one defined row and one defined column. The sources of all transistors in each column may be connected to a single column electrode, while the gates of all transistors in each row may be connected to a single row electrode. Again, the assignment of sources to rows and gates to columns may be reversed, as desired.

[0057] The display may be written in a row-by-row manner. The row electrodes are connected to a row driver, which may apply a voltage to a selected row electrode to ensure that all transistors in the selected row are conductive, while applying a voltage to all other rows to ensure that all transistors in these unselected rows remain non-conductive. The column electrodes are connected to a column driver, which applies voltages to the various column electrodes selected to drive the pixels in a selected row to their desired optical states. (These voltages are relative to a common front electrode, which is provided opposite the nonlinear array of electro-optic medium and may extend across the entire display. As known in the art, voltages are relative and are a measure of the charge difference between two points. One voltage value is relative to another voltage value. For example, zero voltage (“0V”) refers to having no voltage difference relative to another voltage.) After a preselected interval known as the “line address time,” the selected row is deselected, another row is selected, and the voltages on the column drivers are changed so that the next line of the display is written.

[0058] However, in use, certain waveforms can produce a residual voltage across the pixels of an electro-optic display, and as is evident from the above discussion, this residual voltage produces several unwanted optical effects and is generally undesirable.

[0059] As presented herein, a "shift" in the optical state associated with an addressing pulse refers to the situation where the initial application of a particular addressing pulse to an electro-optic display results in a first optical state (e.g., a first gray tone), and a subsequent application of the same addressing pulse to the electro-optic display results in a second optical state (e.g., a second gray tone). A remnant voltage can cause a shift in the optical state because the voltage applied to a pixel of the electro-optic display during application of an addressing pulse comprises the sum of the remnant voltage and the voltage of the addressing pulse.

[0060] "Drift" in the optical state of a display over time refers to the situation where the optical state of an electro-optic display changes while the display is stationary (e.g., during periods when no addressing pulses are applied to the display). Remnant voltages can cause drift in the optical state because the optical state of a pixel can depend on the remnant voltage of a pixel, and the remnant voltage of a pixel can decay over time.

[0061] As discussed above, "persistence" refers to the situation in which a trace of a previous image is still visible after an electro-optic display has been rewritten. Residual voltage can cause "edge persistence," a type of persistence in which the contours (edges) of parts of the previous image remain visible. This type of artifact can be caused by inter-pixel effects, so-called "blooming." For example, in both monochrome and color systems, there is a tendency for the electric field generated by a pixel electrode to affect an area of ​​the electro-optic medium wider than that of the pixel electrode itself, thus, in effect, causing the optical state of one pixel to extend into part of the area of ​​an adjacent pixel.

[0062] Furthermore, in some cases, driving adjacent pixels induces a final optical state in the area between the pixels that is different from the optical state reached by either of the adjacent pixels themselves. This final optical state in the area between adjacent pixels is caused by the electric field experienced in the inter-pixel region that is the average of the electric fields applied to the adjacent pixels. It has been found that edge persistence can be reduced by driving electro-optic displays with a DC unbalanced waveform.

[0063] However, DC unbalanced waveforms can produce residual voltage. In addition, the use of DC unbalanced waveforms can result in polarization kickback, a change in the optical state of an electro-optic medium that occurs a short period after the medium ceases to be driven. This "kickback" or "self-erase" is a phenomenon observed in some electro-optic displays. See, for example, Ota, I., et al., "Developments in Electrophoretic Displays," SID Proceedings, 18, 243 (1977). In this case, self-erase has been reported in non-encapsulated electrophoretic displays, whereby the electro-optic medium can at least partially reverse its optical state shortly after a voltage applied across it is no longer applied. For example, a pixel driven to black can revert to dark gray within a short period after the pixel is deselected. In some cases, a reverse voltage, which can be greater than the actuation voltage, has been observed to occur across the electrodes, which can often lead to electrode damage.

[0064] Other events can undesirably affect the optical state of display pixels. For example, inter-pixel crosstalk, in which addressing one pixel affects the optical state of neighboring pixels, can lead to differences in the amplitude of the voltage potential generated between the data line and VCOM line applied to the electro-optic medium relative to the voltage potential across the electro-optic medium. Crosstalk can result from current leakage through elements of the display backplane or through the electro-optic medium in contact with the array of display pixels on the backplane. One source of leakage is the finite current flow through pixel transistors in the off-state. For example, a voltage driven on a data line intended for one display pixel can fully charge neighboring pixel transistors of pixels in an unselected row due to off-state current leakage. Furthermore, although each pixel typically includes a reservoir capacitor to maintain the pixel's voltage while other pixels are being addressed, there is some decay in the pixel voltage due to current leakage.

[0065] Exemplary EPD

[0066] 1 shows a schematic diagram of a pixel 100 of an electro-optic display in accordance with the subject matter presented herein. Pixel 100 may include an imaging film 110. In some embodiments, imaging film 110 may be bistable. In some embodiments, imaging film 110 may include, but is not limited to, an encapsulated electrophoretic imaging film, which may include, for example, charged pigment particles.

[0067] The imaging film 110 may be disposed between the front electrode 102 and the rear electrode 104. The front electrode 102 may be formed between the imaging film and the front surface of the display. In some embodiments, the front electrode 102 may be transparent. In some embodiments, the front electrode 102 may be formed from any suitable transparent material, including, but not limited to, indium tin oxide (ITO). The rear electrode 104 may be formed opposite the front electrode 102. In some embodiments, a parasitic capacitance (not shown) may be formed between the front electrode 102 and the rear electrode 104.

[0068] Pixel 100 may be one of a plurality of pixels. The plurality of pixels may be arranged in a two-dimensional array of rows and columns to form a matrix, such that any particular pixel is uniquely defined by the intersection of one defined row and one defined column. In some embodiments, the matrix of pixels may be an "active matrix," in which case each pixel is associated with at least one nonlinear circuit element 120. The nonlinear circuit element 120 may be coupled between the backplane electrode 104 and the addressing electrode 108. In some embodiments, the nonlinear element 120 may include a diode and / or a transistor, including, but not limited to, a MOSFET. The drain (or source) of the MOSFET may be coupled to the backplane electrode 104, the source (or drain) of the MOSFET may be coupled to the addressing electrode 108, and the gate of the MOSFET may be coupled to a driver electrode 106 configured to control the activation and deactivation of the MOSFET (for convenience, the terminal of the MOSFET that is coupled to the backplane electrode 104 will be referred to as the drain of the MOSFET, and the terminal of the MOSFET that is coupled to the addressing electrode 108 will be referred to as the source of the MOSFET. However, those skilled in the art will recognize that in some embodiments, the source and drain of the MOSFET may be interchanged).

[0069] In some active matrix embodiments, the addressing electrodes 108 of all pixels in each column may be connected to the same column electrode, and the driver electrodes 106 of all pixels in each row may be connected to the same row electrode. The row electrodes may be connected to a row driver, which may select one or more rows of pixels by applying a voltage to the selected row electrode sufficient to activate the nonlinear elements 120 of all pixels 100 in the selected row. The column electrodes may be connected to a column driver, which may apply a suitable voltage to the addressing electrodes 106 of the selected (activated) pixels to drive the pixels to a desired optical state. The voltage applied to the addressing electrodes 108 may be relative to the voltage applied to the pixel's front plane electrode 102 (e.g., a voltage of about zero volts). In some embodiments, the front plane electrodes 102 of all pixels in the active matrix may be coupled to a common electrode.

[0070] In some embodiments, the active matrix pixels 100 may be written in a row-by-row manner. For example, a row of pixels may be selected by a row driver, and voltages corresponding to the desired optical state for the row of pixels may be applied to the pixels by a column driver. After a preselected interval known as a "line address time," the selected row may be deselected, another row may be selected, and the voltages on the column drivers may be changed so that another line of the display is written.

[0071] FIG. 2 shows a circuit model of the electro-optic imaging layer 110 disposed between the front electrode 102 and the back electrode 104 in accordance with the subject matter disclosed herein. Resistor 202 and capacitor 204 represent the resistance and capacitance of the electro-optic imaging layer 110, the front electrode 102, and the back electrode 104, which may include any adhesive layers. Resistor 212 and capacitor 214 may represent the resistance and capacitance of the laminating adhesive layer. Capacitor 216 may represent capacitance that may form between the front electrode 102 and the back electrode 104, e.g., the interfacial contact area between layers, such as the interface between the imaging layer and the laminating adhesive layer and / or the laminating adhesive layer and the backplane electrode. The voltage Vi across the imaging film 110 of a pixel may include the residual voltage of the pixel.

[0072] FIG. 3A illustrates a schematic diagram and signal diagram 300 of an exemplary electro-optic display in accordance with the subject matter presented herein. Diagram 300 shows a plurality of display pixels (e.g., display pixels 350, 352, 354, 360, 362, and 364) positioned in rows and columns (e.g., an active matrix). Each row of pixels is electrically coupled to a row select line (e.g., row select lines 326 and 336). The row select line is electrically coupled to the gate electrode of each pixel transistor in a respective row and is configured to turn on or off the pixel transistor associated with each display pixel. Each column of display pixels is coupled to a source line (e.g., source lines 328, 338, and 348). The source lines are electrically coupled to the source electrodes of each pixel transistor in a respective column and are designed to provide drive voltages to the display pixels. Additionally, a VCOM line 302 is electrically coupled to the top plane or upper electrode of the display and may provide a bias voltage, typically at or about zero volts.

[0073] In operation, a row select line voltage is used to control the selection of a row of display pixels for updating. For example, when a row select line is driven to a low level gate line voltage ("VEE"), the n-channel pixel transistors in the corresponding row of display pixels are turned off or deactivated, thereby deselecting that row of display pixels. Conversely, when the row select line voltage is driven to a high level gate line voltage ("VDDH"), the n-channel pixel transistors in the corresponding row of display pixels are turned on or activated, thereby selecting that row of display pixels for updating.

[0074] 3B, when row select line 326 is high (i.e., driven to VDDH), a corresponding row of display pixels (e.g., display pixels 350, 352, and 354) is selected, or turned on, for updating. Once a row of display pixels is selected, or activated, a voltage applied to source line 328 is applied through its pixel transistor to the pixel electrode associated with display pixel 350.

[0075] 3B shows an illustrative frame 390 during which a positive voltage is applied to the source line 328, and an illustrative frame 392 during which a negative voltage is applied to the source line 328. The voltage applied to VCOM 302 is held at a constant level while the display pixel 350 is updated. The voltage Vi 370 is the voltage across the electro-optic material based on the potential difference between the voltage applied to the source line 328 and the voltage applied to VCOM 302.

[0076] After a display pixel is deselected, a storage capacitor maintains the voltage V i 370 until the pixel is selected again. However, as explained above, the amplitude of the voltage V i 370 can be affected by kickback 375 for a short period after the display pixel is deselected. Furthermore, due to current leakage, there is some decay in the voltage V i 370. The amount of kickback 375 and the decay experienced by each display pixel can vary among all display pixels in the array. Thus, the difference in the actual voltage V i 370 that remains applied across the electro-optic material relative to the voltage applied to each display pixel can be unpredictable and can cause undesirable inconsistencies in the optical state of the display from one region to the next.

[0077] 4 shows an example schematic diagram 400 of two adjacent rows of display pixels in accordance with the subject matter presented herein. As described above, for typical active matrix addressing, each row select line is driven high at a different time. For example, row select line 426 is driven high to activate pixel transistors in row 427, and source lines 428, 438, 448, 458, 468, and 478 provide drive voltages to their respective display pixels using VCOM 402 as a reference. Subsequently, row select line 426 is driven low to deactivate pixel transistors in row 427, and row select line 436 is driven high to activate pixel transistors in row 437, while source lines 428, 438, 448, 458, 468, and 478 provide drive voltages to their respective display pixels using VCOM 402 as a reference. Ellipsis 481 is included to indicate that the array of display pixels may include more than the five source lines shown in Figure 4. Similarly, ellipsis 483 is included to indicate that the array of display pixels may include more than the two rows of display pixels shown in Figure 4.

[0078] The VCOM 402 is typically electrically connected to the top plane or upper electrode of the display stack and also to one electrode of the storage capacitor of each display pixel, the other electrode of which is connected to a respective display pixel electrode, as shown in FIG.

[0079] For some applications, it is desirable to globally apply a large voltage to all display pixels in the ink stack at the same time. In some embodiments, a varying voltage is applied to VCOM 402, as this is typically a common reference for all pixels in the array. This method of switching modules may be referred to as global top-plane switching. To implement global top-plane switching and apply a high voltage across the entire ink stack, the subject matter presented herein provides a drive method whereby all pixel transistors are addressed nearly simultaneously. This can be useful for simultaneously setting the optical state of all display pixels to a known state.

[0080] 5A shows a schematic diagram of an exemplary electro-optic display including a plurality of display pixels arranged in rows and columns. Each row of pixels is selected by one of row select lines 526, 536, and 546, and source lines 528, 538, 548 and VCOM 502 apply voltages to the display pixels when selected.

[0081] 5B, in some embodiments, the row select lines (e.g., row select lines 526, 536, and 546) are all driven to a high level gate line voltage (e.g., VDDH) simultaneously or nearly simultaneously to turn on all of the pixel transistors. With all of the pixel transistors in an activated state, appropriate voltages are applied to the source lines (e.g., source lines 528, 538, 548) and VCOM 502 to generate the desired voltage potential across the electro-optic medium. In some embodiments, all of the pixel transistors are turned on within 2 microseconds to 100 microseconds of each other. In some embodiments, all of the pixel transistors are turned on within one frame time of each other. In some embodiments, all of the pixel transistors are turned on within 2 milliseconds to 100 milliseconds of each other.

[0082] In some embodiments, activating all of the pixel transistors simultaneously or nearly simultaneously can be implemented by accessing functionality within existing row and column drivers associated with the display's controller. For example, a driver device may include an XON pin or XON signal that can be used to cause the driver to globally set the state of all of its outputs to the same value. The XON pin can be configured to instruct the gate driver to simultaneously turn on (e.g., drive to VDDH) or switch off (e.g., drive to VEE) all of the row select lines (e.g., row select line 326, row select line 336). Those skilled in the art will appreciate that other methods exist for activating all of the pixel transistors nearly simultaneously. For example, U.S. Pat. No. 10,475,396 (incorporated herein in its entirety) provides examples of such methods in FIGS. 5A-8 and their corresponding descriptions.

[0083] In practice, supplying a voltage of +υ volts to VCOM 502 and −μ volts to source lines 528, 538, and 548 results in a voltage or potential difference of +(υ + μ) volts from the bottom electrode to the top plane or top electrode. Conversely, supplying a voltage of −v volts to VCOM 502 and +u volts to source lines 528, 538, and 548 results in a voltage or potential difference of −(v + u) volts from the bottom electrode to the top plane or top electrode. Thus, driving VCOM 502 and source lines 528, 538, and 548 in this manner enables a drive mode that produces voltage potentials between the bottom and top electrodes of the display (effectively across the display media layer or ink layer) that exceed the maximum voltage that can be applied by either VCOM 502 or source lines 528, 538, and 548 alone.

[0084] 5C, in some embodiments, VCOM 502 can be driven to voltages of +30V (e.g., +υ), 0V, −30V (e.g., −v), and source lines 528, 538, and 548 can be driven to voltages of +15V (e.g., +u), 0V, −15V (e.g., −μ). The following embodiments illustrate how source and VCOM 502 can be driven to achieve + / −30V and + / −45V differentials across the electro-optic medium in both polarity directions using top-plane switching in an active matrix display.

[0085] Method 1: From time t0 to time t1, a voltage potential of +45V from the bottom electrode to the top plane can be generated by driving VCOM 502 to +30V and source lines 528, 538, and 548 to −15V. Conversely, from time t1 to time t2, a voltage potential of −45V from the bottom electrode to the top plane can be generated by driving VCOM 502 to −30V and source lines 528, 538, and 548 to +15V.

[0086] Method 2: From time t2 to time t3, a voltage potential of +30 V from the bottom electrode to the top plane can be generated by driving VCOM 502 to +30 V and source lines 528, 538, and 548 to 0 V. Conversely, from time t3 to time t4, a voltage potential of −30 V from the bottom electrode to the top plane can be generated by driving VCOM 502 to −30 V and source lines 528, 538, and 548 to 0 V.

[0087] Using the configurations and techniques presented herein enables global top-plane switching for active matrix displays without the undesired charging or discharging of pixel storage capacitors experienced when using conventional techniques. For example, all of the display pixels can be selected and driven in parallel with the same voltage, eliminating polarization kickback and crosstalk from neighboring pixels and mitigating the decay of pixel voltages that otherwise occurs during conventional drive schemes when display pixels are deselected. Thus, using the inventive techniques described herein can minimize or eliminate any imbalance between the voltage potentials actually generated across the electro-optic material relative to the voltages applied to each display pixel. This can prevent undesirable mismatches in the optical state of the display from one region of the display pixels to the next.

[0088] Furthermore, the inventive techniques described herein allow voltages to be applied to display pixels that exceed the maximum voltage that either the VCOM or source lines can apply alone. This increases the electric field that can be applied to the electro-optic material, which in turn increases the speed at which charged ink particles move through the fluid, thereby reducing the time required to drive all of the display pixels to an extreme optical state. This can be useful for simultaneously setting the optical state of all display pixels to a known state. One useful application of this feature is as a global reset, which sets the optical state of all display pixels in a display module to a known state in a minimal amount of time. For example, the techniques described herein can be used to drive all pixels to an extreme optical state, such as black or white.

[0089] It will be apparent to those skilled in the art that numerous changes and modifications can be made to the specific embodiments of the invention described above without departing from the scope of the invention. Accordingly, the whole of the foregoing description should be interpreted in an illustrative sense, and not in a restrictive sense.

Claims

1. 1. A method of driving an electro-optic display comprising a layer of electro-optic material disposed between a common electrode and a backplane, the backplane including an array of pixel electrodes, each pixel electrode coupled to a pixel transistor including a source electrode, a gate electrode, and a drain electrode, the gate electrode coupled to a gate line, the source electrode coupled to a scan line, and the drain electrode coupled to the pixel electrode, a controller providing time-dependent voltages to the gate lines, the scan lines, and the common electrode, the method comprising: applying a first voltage to the common electrode, the first voltage having a first amplitude that is a maximum voltage that the controller is capable of applying to the common electrode; applying a second voltage to the scan lines of all pixels, the second voltage having a second amplitude that is a maximum voltage the controller is capable of applying to the scan lines of all pixels, the second voltage having an opposite polarity to the first voltage; applying a gate line voltage to the gate lines of all pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a third voltage across the electro-optic material, the third voltage being applied to each pixel electrode of the array of pixel electrodes, the third voltage having a third amplitude sufficient to drive the optical state of the display to a first extreme optical state, the third amplitude being equal to the sum of the first amplitude and the second amplitude; A method comprising:

2. The method of claim 1 , wherein the first voltage has a positive polarity and the second voltage has a negative polarity.

3. The method of claim 1 , wherein the first voltage has a negative polarity and the second voltage has a positive polarity.

4. The method of claim 1 , wherein the third voltage has a magnitude of substantially 30V.

5. The method of claim 1 , wherein the third voltage has a magnitude of substantially 45V.

6. The method of claim 1 , wherein the first extreme optical state is one of white and black.

7. applying a gate line voltage to the gate lines of all pixel transistors in parallel at a low level sufficient to deactivate the pixel transistors; applying a fourth voltage to the common electrode, the fourth voltage having a fourth amplitude that is a maximum voltage that the controller is capable of applying to the common electrode; applying a fifth voltage to the scan lines of all pixels, the fifth voltage having a fifth amplitude that is a maximum voltage that the controller is capable of applying to the scan lines of all pixels, the fifth voltage having an opposite polarity to the second voltage and the fourth voltage; applying a gate line voltage to the gate lines of all pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a sixth voltage across the electro-optic material, the sixth voltage having a sixth amplitude sufficient to drive the optical state of the display to a second extreme optical state; The method of claim 1 further comprising:

8. 8. The method of claim 7, wherein the second extreme optical state is one of white and black, and the second extreme optical state is opposite to the first extreme optical state.

9. The method of claim 7 , wherein the sixth voltage has a magnitude of substantially 30V.

10. The method of claim 7 , wherein the sixth voltage has a magnitude of substantially 45V.

11. 1. An electro-optic display, comprising: a light-transmitting common electrode; a backplane including an array of pixel electrodes; a layer of electro-optical material disposed between the common electrode and the array of pixel electrodes, each pixel electrode coupled to a pixel transistor including a source electrode, a gate electrode, and a drain electrode, the gate electrode coupled to a gate line, the source electrode coupled to a scan line, and the drain electrode coupled to the pixel electrode; a controller capable of applying time-dependent voltages to the gate lines, the scan lines, and the common electrode; Equipped with The controller applying a first voltage to the common electrode, the first voltage having a first amplitude that is a maximum voltage that the controller is capable of applying to the common electrode; applying a second voltage to the scan lines of all pixels, the second voltage having a second amplitude that is a maximum voltage the controller is capable of applying to the scan lines of all pixels, the second voltage having an opposite polarity to the first voltage; applying a gate line voltage to the gate lines of all pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a third voltage across the electro-optic material, the third voltage being applied to each pixel electrode of the array of pixel electrodes, the third voltage having a third amplitude sufficient to drive the optical state of the display to a first extreme optical state, the third amplitude being equal to the sum of the first amplitude and the second amplitude; An electro-optic display configured to:

12. 12. An electro-optic display according to claim 11, wherein the first voltage has a positive polarity and the second voltage has a negative polarity.

13. 12. An electro-optic display according to claim 11, wherein the first voltage has a negative polarity and the second voltage has a positive polarity.

14. 12. An electro-optic display as claimed in claim 11, wherein the third voltage has a magnitude of substantially 30V.

15. 12. An electro-optic display as claimed in claim 11, wherein the third voltage has a magnitude of substantially 45V.

16. 12. An electro-optic display according to claim 11, wherein the first extreme optical state is one of white and black.

17. The controller further comprises: applying a gate line voltage to the gate lines of all pixel transistors in parallel at a low level sufficient to deactivate the pixel transistors; applying a fourth voltage to the common electrode, the fourth voltage having a fourth amplitude that is a maximum voltage that the controller is capable of applying to the common electrode; applying a fifth voltage to the scan lines of all pixels, the fifth voltage having a fifth amplitude that is a maximum voltage that the controller is capable of applying to the scan lines of all pixels, the fifth voltage having an opposite polarity to the second voltage and the fourth voltage; applying a gate line voltage to the gate lines of all pixel transistors in parallel at a level high enough to activate the pixel transistors, thereby applying a sixth voltage across the electro-optic material, the sixth voltage having a sixth amplitude sufficient to drive the optical state of the display to a second extreme optical state; 12. An electro-optic display according to claim 11, configured to:

18. 18. An electro-optic display according to claim 17, wherein the second extreme optical state is one of white and black, the second extreme optical state being opposite to the first extreme optical state.

19. 18. An electro-optic display as claimed in claim 17, wherein the sixth voltage has a magnitude of substantially 30V.

20. 18. An electro-optic display as claimed in claim 17, wherein the sixth voltage has a magnitude of substantially 45V.

Images