Synchronizing wireless network nodes for efficient communication

Abstract

In some examples, an electronic device (200) includes a transceiver (206) and a processor (202) coupled to the transceiver, the processor configured to synchronize a clock (214) of the electronic device to a clock of the other electronic device using elapsed time indications in multiple packets received from the other electronic device via the transceiver, and the processor configured to transmit packets via the transceiver using the synchronized clock of the electronic device.

Description

[Technical Field]

[0001] Wireless networks often implement a channel hopping scheme, in which network nodes switch between different channels in a frequency band to transmit and receive data. Unicast communication between a pair of network nodes involves a receiver node hopping channels according to a specified (e.g., pseudo-random) pattern, and a transmitter node transmitting packets to the receiver node by first determining the channel on which the receiver node is operating at a given time.

[0002] In order for a transmitter node to determine the channel on which a receiver node is operating, the transmitter node assumes clock synchronization between the transmitter node and the receiver node. The transmitter node and receiver node can achieve clock synchronization using transmitter node timing information included in packets transmitted to the receiver node, thereby mitigating naturally occurring clock drift. The receiver node may store such transmitter node timing information for future reference, such as when the receiver node later transmits packets to the transmitter node.

[0003] Assuming clock synchronization, a transmitter node can determine the channel on which a receiver node is operating by determining the time elapsed since a previous reference point and dividing the elapsed time by the duration of each channel slot, also known as the dwell time. The quotient of this division operation indicates the number of channel hops that have occurred since the reference point and, in combination with the receiver node's hopping sequence, is useful for determining the particular channel on which the receiver node is operating. The transmitter node can then transmit a packet to the receiver node on that channel. Summary of the Invention

[0004] In some examples, an electronic device includes a transceiver and a processor coupled to the transceiver, the processor configured to synchronize a clock of the electronic device to a clock of the other electronic device using elapsed time indications in packets received from the other electronic device via the transceiver, and the processor configured to transmit packets via the transceiver using the synchronized clock of the electronic device. [Brief explanation of the drawings]

[0005] For a detailed description of various examples, reference will now be made to the accompanying drawings.

[0006] [Figure 1] 1 is a block diagram of a wireless network having sleepy and non-sleepy nodes, in accordance with various examples.

[0007] [Figure 2] 1 is a block diagram of a wireless network node, in accordance with various examples.

[0008] [Figure 3] FIG. 1 is a timing diagram illustrating clock synchronization between wireless network nodes, in accordance with various examples.

[0009] [Figure 4A] 1 is a flowchart of a method for synchronizing clocks between wireless network nodes, in accordance with various examples.

[0010] [Figure 4B] FIG. 1 is a timing diagram for synchronizing clocks between wireless network nodes, in accordance with various examples.

[0011] [Figure 5] FIG. 1 is a timing diagram illustrating channel hopping synchronization between wireless network nodes, in accordance with various examples.

[0012] [Figure 6] 1 is a flowchart of a method for clock synchronization and channel hopping scheme between wireless network nodes, in accordance with various examples.

[0013] [Figure 7] 1 is a diagram of a wireless network node data structure for storing synchronization information, in accordance with various examples.

[0014] [Figure 8] 1 is a block diagram of a wireless network having multiple nodes, in accordance with various examples. DETAILED DESCRIPTION OF THE INVENTION

[0015] As mentioned above, in the context of unicast communication, clock synchronization is required for channel-hopping wireless network nodes to communicate with each other. Without periodic clock synchronization, clock drift prevents network nodes from accurately determining the channels on which other network nodes are operating, thereby preventing the nodes from communicating with each other.

[0016] To mitigate clock drift, a transmitter node may repeatedly transmit heartbeat packets to a receiver node. The heartbeat packets contain timing information associated with the transmitter node, and the receiver node may capture, store, and use this timing information to subsequently communicate with the transmitter node. In some applications, the network node may be battery-powered, such as in a flow meter or mobile personal electronics. Repeatedly transmitting heartbeat packets is energy inefficient, and this inefficiency is particularly problematic for battery-powered network nodes. However, without the periodic transmission of heartbeat packets, the battery-powered network node may experience clock drift and become clock-synchronized with respect to other nodes in the network, thereby preventing the battery-powered network node from communicating with other nodes in the network. Additionally, due to the aforementioned inefficiencies associated with heartbeat packet transmission, it is useful to reduce the number of transmissions to reduce power consumption.

[0017] This disclosure describes various techniques by which a battery-powered network node can synchronize its clock with other network nodes without transmitting heartbeat packets. More specifically, a battery-powered network node (hereinafter, a child node) may receive a first packet from another network node (hereinafter, a parent node). The child node may then receive a second packet from the parent node. The child node may calculate the elapsed time between the first and second packets registered by the parent node based on timing information embedded in the first and second packets. The child node may adjust the elapsed time between the first and second packets to match that of the parent node, thereby achieving clock synchronicity between these two nodes without the child node transmitting energy-inefficient heartbeat packets. With these clocks synchronized, each node can accurately determine the channel on which the other node is operating at any given time, thereby facilitating communication between the nodes. In some examples, the child node synchronizes its clock to the parent node and adopts the parent node's channel hopping sequence. In this way, the child node is always on the same channel as the parent node, so neither of the two nodes needs to store the timing information of the other, nor does either node need to calculate the channel the other node is operating on when a transmission is made between them. These and other examples are described with reference to the drawings.

[0018] FIG. 1 is a block diagram of a wireless network 100 having sleepy and non-sleepy nodes in accordance with various embodiments. In some examples, wireless network 100 is a half-duplex, slot-free, channel-hopping network, although the scope of the present disclosure also includes other types of wireless networks in which battery-powered nodes may enjoy improved battery life due to the absence of heartbeat packet transmissions. The example wireless network 100 includes nodes 102, 104, 106, 108, 110, and 112. Node 102 is a sleepy node, meaning that it is battery-powered and repeatedly enters a sleep (e.g., low power consumption) state to conserve battery life and intermittently exits the sleep state to communicate with node 104. In some examples, node 102 communicates only with node 104, while node 104 may communicate with the remaining nodes in wireless network 100. Accordingly, node 102 is referred to herein as a child node, and node 104 is referred to herein as a parent node. As mentioned above, parent node 104, which is configured to communicate with nodes 106, 108, 110, and 112, is not a battery-powered node (e.g., coupled to a mains power source), and therefore parent node 104 is not a sleepy node. Similarly, in some examples, nodes 106, 108, 110, and 112 are not battery-powered nodes, and therefore these nodes are also not sleepy nodes. Because child node 102 is the only sleepy battery-powered node in wireless network 100, the power saving techniques described herein are generally intended for implementation on child node 102 to improve battery life. However, these techniques may be implemented on any suitable node in wireless network 100 to generally reduce power consumption and reduce traffic on wireless network 100.

[0019] In some examples, wireless network 100 is part of a metering system, e.g., in a residential or commercial context. In some examples, child node 102 is any suitable type of battery-powered meter configured to measure usage of any suitable resource. Parent node 104 may be, for example, a water or gas meter, and child node 102 may provide data (e.g., measurements) to parent node 104. Parent node 104 may then provide measurements from child node 102 and from parent node 104 to the remaining non-sleepy nodes in wireless network 100, each of which may be a meter (e.g., an electricity meter). One or more of the non-sleepy nodes in wireless network 100 may communicate with a central hub (not shown), e.g., to provide data from some or all of the other nodes in wireless network 100 to the central hub. The central hub may then process the data or provide the data to another appropriate entity for processing and use as needed.

[0020] 2 is a block diagram of a wireless network node 200 in accordance with various examples. The example node 200 represents each of the nodes in the wireless network 100 of FIG. 1. The node 200 includes a processor 202, storage 204 (e.g., random access memory (RAM)) coupled to the processor 202, a transceiver 206 coupled to the processor 202, and an antenna 208 coupled to the transceiver 206. All transmission and reception is performed by the transceiver 206. The storage 204 may store executable code 210 and data structures 212. The executable code 210, when executed by the processor 202, causes the processor 202 to perform some or all of the operations attributed to the node 200, in this example, which represents the various nodes shown in the wireless network 100 of FIG. 1, as described above. Data structure 212 stores information about wireless network 100, such as timing or clock information related to other nodes in wireless network 100, hopping sequences used by other nodes in wireless network 100, and other information that may be useful to node 200 to engage in wireless communications with other nodes in wireless network 100. Examples of data structure 212 are described below. Node 200 includes a clock 214 coupled to processor 202. Clock 214 is one example of a clock as described herein, and elapsed time and clock synchronization generally refer to example clock 214.

[0021] FIG. 3 is a timing diagram illustrating clock synchronization between wireless network nodes, in accordance with various examples. More specifically, the timing diagram of FIG. 3 illustrates a channel hopping scheme 300 for parent node 104 (FIG. 1) and a channel hopping scheme 302 for child node 102 (FIG. 1). The channel hopping scheme includes both a sequence element and a timing element, meaning that the scheme describes both the channel hopping sequence through which a node hops and the timing at which the node hops through that channel hopping sequence. The timing diagram of FIG. 3 assumes eight channels: CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8, each with its own frequency band. Parent node 104 has a default repeating hopping sequence of CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8, in that order. Child node 102 has a different channel hopping sequence; the only channels relevant to this discussion are CH4 and CH2, in that order.

[0022] A channel hopping sequence indicates the channels on which a node receives packets. So, for example, a channel hopping sequence of CH1, CH2, CH3, and CH4 means that the corresponding receiver node can receive packets on CH1 during a CH1 slot (e.g., during a CH1 dwell time), on CH2 during a CH2 slot, and so on. To transmit a packet to a receiver node, a transmitter node must identify and use the channel on which the receiver node is receiving at the time of transmission. So, the transmitter node's default channel hopping sequence may be interrupted to switch to the receiver node's current channel, and after the transmitter node has finished transmitting its packet to the receiver node, the transmitter node may resume its default channel hopping sequence. For example, as shown by channel hopping scheme 300, parent node 104 hops successively through a default channel hopping sequence of CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8, but parent node 104 interrupts this default sequence to enter CH4 as indicated by reference numeral 304 and enter CH2 as indicated by reference numeral 306. Parent node 104 enters CH4 (reference numeral 304) at time 308, and parent node 104 enters CH2 (reference numeral 306) at time 310. Parent node 104 transmits packet 318 to child node 102 at time 308, so parent node 104 enters CH4 at time 308, and at time 308, child node 102 is on CH4, as channel hopping scheme 302 indicates by reference numeral 312. Similarly, parent node 104 sends packet 320 to child node 102 at time 310, so that parent node 104 enters CH2 at time 310 and child node 102 is on CH2 at time 310, as indicated by reference numeral 314.

[0023] Because the child node 102 is a sleepy node, when the child node 102 is in a power-saving sleep state, each channel slot in the channel hopping scheme 302 of the child node 102 is separated by a sleep period 316. Because the parent node 104 is a non-sleepy node, the parent node 104 continuously hops through its channel hopping sequence without entering a sleep state.

[0024] In accordance with various examples described herein, the child node 102 advantageously captures information provided by the parent node 104 in packets 318, 320, stores this information, and uses it to avoid sending heartbeat packets to the parent node 104. Specifically, the child node 102 uses the information in packets 318, 320 to synchronize its own clock with the clock of the parent node 104. Heartbeat packets are used to synchronize clocks to mitigate the adverse effects of clock drift, and because the child node 102 uses the packets received from the parent node 104 to synchronize its own clock to the clock of the parent node 104, there is no longer any need for the child node 102 to send heartbeat packets to the parent node 104. Eliminating the transmission of heartbeat packets by the child node 102 significantly reduces power consumption and preserves battery life in the child node 102. 1, 2, 3, 4A, and 4B simultaneously, we will now describe how a child node 102 captures and uses the information in packets 318, 320 to synchronize its clock with the clock of the parent node 104 to mitigate clock drift.

[0025] FIG. 4A is a flowchart of a method 400 for synchronizing clocks between wireless network nodes, in accordance with various examples. Method 400 begins with child node 102 receiving (402) an example packet 318 from parent node 104. Child node 102 receives packet 318 at time 308. At time 308, the clock of child node 102 (e.g., clock 214 of FIG. 2) indicates that time t1B has passed since a previous point in time when child node 102 and parent node 104 were clock-synchronized. This time may be referred to herein as a reference time. At time 308, packet 318 indicates that the clock of parent node 104 (e.g., clock 214 of FIG. 2) indicates that time t1A has passed since the reference time. Method 400 includes child node 102 storing (404) times t1A and t1B in a data structure, such as data structure 212 (FIG. 2). The method 400 includes the child node 102 receiving (406) a packet 320 from the parent node 104. The child node 102 receives the packet 320 at time 310. At time 310, the child node 102's clock indicates that time t2B has elapsed since a reference time, and the packet 320 indicates that the parent node 104's clock indicates that time t2A has elapsed since the reference time. The method 400 includes the child node 102 storing (408) t2A and t2B in a data structure. The values ​​t1A, t2A, t1B, t2B, and similar indications of elapsed time may be referred to herein as elapsed time indications.

[0026] Child node 102 receives packet 318 (at time 308) and then packet 320 (at time 310). Due to clock drift, the clocks of child node 102 and parent node 104 may register the time interval between times 308 and 310 differently. At time 308, child node 102's clock was t1B, and at time 310, its clock was t2B. Therefore, child node 102 registers the time interval between times 308 and 310 as t2B-t1B. In contrast, parent node 104's clock at time 308 was t1A, and its clock at time 310 was t2A. Therefore, parent node 104 registers the time interval between times 308 and 310 as t2A-t1A. Due to clock drift, the quantity t2B-t1B is different from t2A-t1A. Because the child node 102 and the parent node 104 register time differently, and because clock drift only worsens as time progresses, the child node 102 should synchronize its own clock to the clock of the parent node 104. However, instead of using heartbeat packets to achieve this clock synchronicity, the child node 102 adjusts its own clock so that the time difference between times 308, 310 according to the child node 102 is the same as the time difference according to the parent node 104. Specifically, the child node 102 sets 410 its clock at t2B, which indicates the current elapsed time from the reference time, to be equal to the sum of t1B (which is the value of the child node 102's clock at time 308) and (t2A - t1A), which is the time elapsed between the times 308, 310 registered by the parent node 104, as follows: t2B=t1B+(t2A-t1A) (1)

[0027] The value of t1B is assumed to be synchronized to the clock of the parent node 104 using method 400. If t1B is not synchronized to the clock of the parent node 104, the result of the calculation in step 410 may include any clock drift inherent in the value of t1B. Method 400 includes the child node 102 sending a packet to the parent node 104 using the corrected value of t2B.

[0028] FIG. 4B is a timing diagram for synchronizing clocks among wireless network nodes, according to various examples. FIG. 4B illustrates the timing aspects discussed above in a visual format for ease of understanding. FIG. 4B illustrates the progression of time according to parent node 104 (labeled 450), the original progression of time according to child node 102 (labeled 452), and the progression of time according to child node 102 as adjusted according to method 400 (labeled 454). These times are shown in the context of the reference time, time 308, and time 310 ( FIG. 3 ) discussed above. As shown, parent node 104 registers the time interval from the reference time to time 308 as t1A. Parent node 104 registers the time interval from the reference time to time 310 as t2A. Thus, parent node 104 registers the time interval from time 308 to time 310 as t2A-t1A. Similarly, prior to the adjustments described in method 400, child node 102 registers the time interval from the reference time to time 308 as t1B. Child node 102 registers the time interval from the reference time to time 310 as t2B. Thus, child node 102 registers the time interval from time 308 to time 310 as t2B-t1B, where t2B-t1B differs from t2A-t1A due to clock drift. To synchronize child node 102's clock, and therefore the elapsed time, with that of parent node 104, child node 102 equates the time elapsed between times 308 and 310 to t2A-t1A. Child node 102 adds the result of this calculation to t1B, which is assumed to be already equivalent to t1A due to the previous application of method 400. Therefore, the clock of child node 102 indicating the elapsed time from the reference time to time 310 is t1B+(t2A-t1A).

[0029] FIG. 5 is a timing diagram illustrating clock and channel hopping synchronization between wireless network nodes, in accordance with various examples. The timing diagram of FIG. 5 includes a channel hopping scheme 500 for a parent node 104 and a channel hopping scheme 502 for a child node 102. The channel hopping scheme 500 is similar to the channel hopping scheme 300 of FIG. 3, in that the default channel hopping sequence is CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8, and the default sequence is interrupted at time 504 to hop to CH4, as shown, to allow the parent node 104 to transmit a packet 506 to the child node 102. The channel hopping scheme 502 for the child node 102 differs from the channel hopping scheme 302 of FIG. 3 in that the packet 506 includes the channel hopping sequence of the parent node 104 and the child node 102, and upon receiving the packet 506, begins to acquire, store, and follow the channel hopping sequence of the parent node 104. For example, after channel slot 508 on CH4, at time 510, whenever child node 102 is not asleep, the channel hopping sequence of child node 102 is identical to the channel hopping sequence of parent node 104. Child node 102 also synchronizes its clock to the clock of parent node 104, as described above with respect to method 400. In this manner, child node 102 and parent node 104 remain clock-synchronized with each other. Child node 102 is also consistently on the same channel as parent node 104 whenever child node 102 is awake (e.g., not asleep). For example, at time 512, both parent node 104 and child node 102 are on CH6. As a result, parent node 104 no longer needs to store timing and channel hopping sequence information for child node 102. The reason is that parent node 104 can transmit on whatever channel it is currently using, and child node 102 will receive it because child node 102 is on the same channel as parent node 104.This approach can be implemented on a child node 102 as long as the child node 102 communicates only with the parent node 104 .

[0030] FIG. 6 is a flowchart of a method 600 for synchronizing clocks and channel hopping schemes between wireless network nodes, in accordance with various examples. Method 600 is described with reference to FIG. 5. Method 600 begins with a child node 102 receiving (602) a packet 506 from a parent node 104. Packet 506 includes the channel hopping sequence of the parent node 104. Packet 506 also indicates that, from the perspective of the parent node 104, t1A has elapsed since a reference time. Upon receiving packet 506, the child node 102 registers that t1B has elapsed. Method 600 also includes the child node 102 storing (604) t1A, t1B, and the channel hopping sequence of the parent node 104 in a data structure (e.g., data structure 212 in FIG. 2). Method 600 includes the child node 102 adopting (606) the channel hopping sequence of the parent node 104, as described above. The method 600 includes the child node 102 receiving (608) a packet 514 ( FIG. 5 ) from the parent node 104 at time 512. The packet 514 indicates that, from the perspective of the parent node 104, t2A has elapsed since a reference time at time 512, and that, from the perspective of the child node 102, t2B has elapsed since the reference time. The method 600 includes the child node 102 storing (610) t2A and t2B in a data structure. The method 600 includes the child node 102 correcting (612) the elapsed time to equation (1) provided above. The method 600 includes the child node 102 continuing (614) channel hopping and transmitting and receiving data using the parent hopping sequence and synchronized clock.

[0031] FIG. 7 is a diagram of a wireless network node data structure 700 for storing synchronization information, in accordance with various examples. Data structure 700 is an example of data structure 212 (FIG. 2) and other data structures described above. The example data structure 700 includes columns 702, 704, 706, and 708. Because data structure 700 may store information related to multiple nodes, column 702 indicates different node IDs. Column 704 indicates the time elapsed since a reference time from the perspective of the node identified in column 702. Column 706 indicates the channel hopping sequence of the node identified in column 702. Column 708 indicates miscellaneous information that may be related to the node identified in column 702. Data structure 700 includes multiple rows, such as rows 710 and 712, each containing information about a different node in the wireless network.

[0032] 8 is a block diagram of a wireless network 800 having multiple nodes, according to various examples. In some examples, the wireless network 800 includes nodes 802, 804, 806, and 808. In some examples, node 802 is a sleepy node and the remaining nodes are non-sleepy nodes, although the scope of the present disclosure is not so limited. For example, in some examples, nodes 802, 804, 806, and 808 are non-sleepy nodes. Node 804 (e.g., a non-sleepy parent node) may receive clock information, channel hopping scheme information, and any other suitable information from node 802 (e.g., a sleepy child node). Node 804 may share the clock information, channel hopping scheme information, and any other suitable information associated with node 802 with other nodes in the wireless network 800. For example, node 804 may share such information with one or more of nodes 806, 808 via broadcast, unicast, or a combination thereof. If a node in wireless network 800 in addition to node 804 has such information about node 802, node 802 may communicate with that node if node 804 becomes too busy or otherwise unavailable. Node 804 may include such information in the header and / or payload of a packet transmitted to another non-sleepy node in wireless network 800. The timing information may include the time at node 804 that node 804 transmits the packet, the time at node 802 (or in some examples, at a non-sleepy node in wireless network 800), and the time at node 804 that determined the time at node 802. A non-sleepy node receiving a packet from node 804 may record node 804's time in a data structure and may calculate and record node 802's time. In particular, the time of node 802 may be calculated as the difference between the time of node 804 (stored in the packet) and the time of node 804, which is the time of node 802 (stored in the packet) plus the time at node 804 (stored in the packet) from which node 802's time was determined.In this way, another non-sleepy node other than node 804 may correctly communicate with node 802 when node 804 is no longer able to communicate with node 802 or is unavailable to communicate with node 802.

[0033] The term "couple" is used throughout this specification. This term may encompass any connection, communication, or signal path that enables a functional relationship consistent with this description. For example, in a first example, device A is coupled to device B if device A generates a signal to control device B to perform a certain action, or in a second example, device A is coupled to device B via an intervening component C such that device B is controlled by device A via a control signal generated by device A, where intervening component C does not substantially change the functional relationship between device A and device B.

[0034] A device that is "configured" to perform a task or function may be configured (e.g., programmed and / or hardwired) to perform that task or function by a manufacturer at the time of manufacture, or may be configurable (or reconfigurable) by a user after manufacture to perform that function and / or other additional or alternative functions. Such configuration may be via firmware and / or software programming of the device, via the configuration and / or layout of hardware components, via the device's interconnections, or via a combination thereof.

[0035] Unless otherwise specified, the use of "about," "approximately," or "substantially" preceding a value means + / - 10% of the stated value. Modifications may be made to the exemplary embodiments described, and other embodiments are possible, within the scope of the present claims.

Claims

1. 1. An electronic device comprising: A transmitter / receiver, a processor coupled to the transceiver, receiving an elapsed time indication in a plurality of packets from another electronic device via the transceiver, the elapsed time indication including a first time elapsed from a reference time included in a first packet of the plurality of packets and a second time elapsed from the reference time included in a second packet of the plurality of packets; determining a difference between the first time and the second time; synchronizing a clock of the electronic device based on the difference; transmitting a packet via the transceiver using a synchronized clock of the electronic device; adding the difference to a third time elapsed from the reference time, as measured by the electronic device; the processor configured to , an electronic device.

2. 10. The electronic device of claim 1, The electronic device, wherein the processor is further configured to enter and exit a sleep state between receiving the first packet and receiving the second packet.

3. 10. The electronic device of claim 1, The electronic device, wherein the processor is further configured to not send heartbeat packets to the other electronic device.

4. 10. The electronic device of claim 1, The electronic device is configured to communicate only with the other electronic device.

5. The electronic device of claim 1, The electronic device, wherein the processor is further configured to store within the electronic device a node identifier of the other electronic device, a hopping sequence of the other electronic device, and the elapsed time indication.

6. An electronic device according to claim 5, The electronic device, wherein the processor is further configured to store within the electronic device a further node identifier of the further electronic device, a hopping sequence of the further electronic device, and an elapsed time indication associated with the further electronic device.

7. The electronic device of claim 6, The electronic device, wherein the processor is further configured to receive a hopping sequence of the further electronic device and an elapsed time indication associated with the further electronic device in a further packet from the further electronic device.

8. 1. An electronic device comprising: A transmitter / receiver, a processor coupled to the transceiver, receiving a first packet from another electronic device via the transceiver indicating that a first time has elapsed since a reference time, and determining that a second time has elapsed since the reference time; receiving, following receipt of the first packet, a second packet from the other electronic device via the transceiver, the second packet indicating that a third time has elapsed since the reference time; synchronizing a clock of the electronic device to a clock of the other electronic device using the difference between the first time and the third time and the second time; transmitting a packet to the other electronic device via the transceiver using a synchronized clock of the electronic device; the processor configured to , an electronic device.

9. 9. The electronic device of claim 8, The electronic device, wherein the processor is further configured to enter and exit a sleep state after receiving the first packet and before receiving the second packet.

10. 9. The electronic device of claim 8, The electronic device, wherein the processor is further configured to calculate a difference between the third time and the first time to synchronize a clock of the electronic device with a clock of the other electronic device.

11. 11. The electronic device of claim 10, The electronic device, wherein the processor is further configured to sum the difference and the second time to synchronize a clock of the electronic device with a clock of the other electronic device.

12. 12. The electronic device of claim 11, The electronic device, wherein the processor is further configured to set the sum as a current elapsed time from the reference time to synchronize a clock of the electronic device with a clock of the other electronic device.

13. 9. The electronic device of claim 8, The electronic device is configured to communicate only with the other electronic device.

14. 9. The electronic device of claim 8, The electronic device, wherein the processor is further configured to transmit the packet while hopping across frequency band channels according to a channel hopping scheme of the other electronic device.

15. The electronic device of claim 14, The electronic device, wherein the first packet includes a channel hopping scheme of the other electronic device.

16. 9. The electronic device of claim 8, The electronic device, wherein the processor is further configured to not send heartbeat packets to the other electronic device.

17. The electronic device of claim 8, the processor is further configured to store within the electronic device a node identifier of the other electronic device, a hopping sequence of the other electronic device, an elapsed time indication of the other electronic device, a further node identifier of a further electronic device, the hopping sequence of the further electronic device, and an elapsed time indication associated with the further electronic device.

18. 1. An electronic device comprising: A transmitter / receiver, a processor coupled to the transceiver, receiving elapsed time indications in a plurality of packets from another electronic device via the transceiver, the elapsed time indications including a first time elapsed from a reference time included in a first packet of the plurality of packets and a second time elapsed from the reference time included in a second packet of the plurality of packets; determining a difference between the first time and the second time; synchronizing a clock of the electronic device based on the difference; transmitting a packet to another electronic device via the transceiver using a synchronized clock of the electronic device while hopping across frequency band channels in accordance with a channel hopping scheme of the other electronic device; adding to the difference a third time elapsed since the reference time, as measured by the electronic device; the processor configured to , an electronic device.

19. 20. The electronic device of claim 18, The electronic device, wherein the processor is further configured to enter and exit a sleep state after receiving the first packet and before receiving the second packet.

20. 20. The electronic device of claim 18, The electronic device is configured to communicate only with the other electronic device.

21. 20. The electronic device of claim 18, the other electronic device is configured to provide timing information and channel hopping scheme information of the electronic device to a third electronic device; The electronic device, wherein the third electronic device and the electronic device are configured to communicate with each other.

22. The electronic device of claim 18, The electronic device, wherein the first packet includes a channel hopping scheme of the other electronic device.

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