gaming machines

Abstract

To cause a game to be played using control means of a correct combination.SOLUTION: A frame control board has RAM for storing data and ROM for storing a frame-side collation code. A game control board has a CPU for executing control regarding the progress of a game and the ROM for storing a board-side collation code. When power supply is started, the game control board transmits startup information including the board-side collation code to the frame control board. When the frame control board receives the startup information, a collation unit of the frame control board collates whether the combination of the frame-side collation code and the board-side collation code is a predetermined combination, and transmits predetermined response information to the game control board if it is a predetermined combination. The notification mode of a notification display unit differs depending on whether the combination of the frame-side collation code and the board-side collation code is a predetermined combination or not.SELECTED DRAWING: Figure 12

Description

[Technical Field]

[0001] The present invention relates to a gaming machine. [Background technology]

[0002] Conventionally, gaming machines, such as pachinko machines, are capable of circulating gaming balls internally. In such gaming machines that circulate gaming balls internally, the number of gaming balls is managed by storing the number of gaming balls as data. In such gaming machines, a control means that controls the progress of the game and a control means that controls the number of gaming balls as data are connected, and are configured to perform two-way communication (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-78753 Summary of the Invention [Problem to be solved by the invention]

[0004] In a gaming machine that uses data to manage the number of game balls, a regular combination of connection between a control unit that controls the progress of a game and a control unit that controls the number of game balls using data is usually determined in advance. Therefore, it is desirable that a control unit that controls the progress of a game and a control unit that controls the number of game balls using data be connected in a predetermined combination. [Means for solving the problem]

[0005] A gaming machine that solves the above problem is a gaming machine that can store the number of gaming media as data and is configured to enable games to be played based on the data, and is equipped with a first control unit, a second control unit, and a notification means that can execute notifications, and the first control unit and the second control unit are connected so that they can communicate bidirectionally, and the first control unit has a data storage unit that stores the data and a first information storage unit that stores first identification information, and the second control unit has a game control unit that executes control regarding the progress of games and a second information storage unit that stores second identification information, and when power supply is started, the combination of the first identification information and the second identification information is normal. The gist of the invention is that the gaming machine is provided with a notification control unit that controls the notification means, and the notification control unit is connected to the gaming machine so as to be able to communicate with the second control unit and is capable of controlling the notification means based on instructions from the second control unit. The notification mode of the notification means differs depending on whether the combination of the first specific information and the second specific information is normal or abnormal. When communication between the first control unit and the second control unit is not possible, and when the combination of the first specific information and the second specific information is abnormal, the notification mode of the notification means can become a specific notification mode. The invention also provides a notification control unit that controls the notification means, and the notification control unit is connected to the second control unit so as to be able to communicate with the second control unit and is capable of controlling the notification means based on instructions from the second control unit.

[0006] A gaming machine that solves the above problem is a gaming machine that can store the number of gaming media as data and is configured to enable a game to be played based on the data, and is equipped with a first control unit, a second control unit, and an alarm means that can execute an alarm, and the first control unit and the second control unit are connected to be able to communicate bidirectionally, the first control unit has a data storage unit that stores the data and a first information storage unit that stores first identification information, and the second control unit has a game control unit that executes control related to the progress of the game and a second information storage unit that stores second identification information, and when power supply is started, a matching unit that is equipped in the gaming machine verifies whether a combination of the first identification information and the second identification information is normal, and the matching unit is equipped in the first control unit, and when power supply is started, the second control unit transmits special information including the second identification information to the first control unit, and the first control unit receives the special information and When this occurs, the comparison unit compares whether the combination of the first identification information and the second identification information included in the received special information is normal, and if the combination of the first identification information and the second identification information is normal, it transmits predetermined response information to the second control unit, the notification mode of the notification means differs between when the combination of the first identification information and the second identification information is normal and when the combination of the first identification information and the second identification information is abnormal, and the notification means is provided with a notification control unit, which is communicatively connected to the second control unit and is capable of controlling the notification means based on instructions from the second control unit, and after power supply has started, if the second control unit receives the predetermined response information, the notification means executes a specific notification, and if the second control unit does not receive the predetermined response information, the notification means does not execute the specific notification. [Effects of the Invention]

[0007] According to the present invention, a game can be played using the correct combination of control means. [Brief explanation of the drawings]

[0008] [Figure 1]FIG. 2 is a front view of the pachinko gaming machine and the management unit. [Figure 2] FIG. 1 is a diagram showing a game board provided in a pachinko game machine. [Figure 3] This is an enlarged view of the counting operation unit, counting notification unit, and second ball number display unit provided in the pachinko gaming machine. [Figure 4] 1 is a schematic diagram showing a distribution mechanism for game balls formed in a pachinko game machine. [Figure 5] FIG. 2 is a schematic diagram showing a supply unit provided in a pachinko gaming machine. [Figure 6] FIG. 2 is a schematic diagram showing a supply unit provided in a pachinko gaming machine. [Figure 7] 1 is a schematic diagram showing a launching section provided in a pachinko gaming machine. [Figure 8] 1 is a block diagram showing the electrical configuration of a pachinko gaming machine. [Figure 9] 1 is a block diagram showing the electrical configuration of a pachinko gaming machine. [Figure 10] 10 is a timing chart showing an example of communication between a game control board and a frame control board in a pachinko game machine. [Figure 11] FIG. 10 is a diagram showing a verification code in a pachinko gaming machine. [Figure 12] 10 is a flowchart showing a matching process. [Figure 13] FIG. 10 is a diagram showing an example of an error that can be detected in a pachinko gaming machine. [Figure 14] 10(a) to 10(d) are diagrams showing examples of various notification modes in a pachinko gaming machine. [Figure 15] 10(a) to 10(d) are diagrams showing examples of various notification modes in a pachinko gaming machine. DETAILED DESCRIPTION OF THE INVENTION

[0009] An embodiment of a pachinko gaming machine will be described below. As shown in Fig. 1, in an island facility (gaming island), pachinko gaming machines 10, which are an example of gaming machines, and management units 100, which are an example of management devices, are installed alternately. The management units 100 are installed next to the pachinko gaming machines 10. The management units 100 are connected to the pachinko gaming machines 10 so that they can communicate with each other.

[0010] The management unit 100 will now be described. As shown in FIG. 1, the management unit 100 includes a medium insertion section 101 into which a management medium can be inserted. As an example, the management medium is a data storage medium such as an IC card or an IC coin. The management medium can store the remaining amount of money deposited and the number of gaming balls owned by the player (hereinafter referred to as the first management ball number PA). The first management ball number PA is data managed by the management unit 100. The management medium may also be capable of storing the player's personal information or the remaining amount of payment (prepaid balance). The management unit 100 includes a cash insertion section 102 into which cash can be inserted. The amount inserted into the cash insertion section 102 is added to the remaining amount stored in the management medium. As an example, the cash may be either banknotes or coins.

[0011] The management unit 100 includes an operation panel 110. The operation panel 110 includes a ball lending operation unit 111, a payout operation unit 112, a return operation unit 113, a first ball number display unit 114, and a balance display unit 115. The ball lending operation unit 111 is operated when increasing the number of game balls owned by the player (hereinafter referred to as the second managed ball number PB) based on the balance stored in the management medium. The second managed ball number PB is data managed by the pachinko gaming machine 10. The payout operation unit 112 is operated when increasing the second managed ball number PB based on the first managed ball number PA.

[0012] The return operation unit 113 is operated when receiving the return of a management medium inserted into the management unit 100. The first ball number display unit 114 displays information (Arabic numerals, for example) that can identify the first management ball number PA. The balance display unit 115 displays information (Arabic numerals, for example) that can identify the remaining amount of payment.

[0013] The management unit 100 includes a management unit control board 120 (hereinafter referred to as a CU control board). The CU control board 120 includes a CPU 120a, a ROM 120b, and a RAM 120c. The CPU 120a performs predetermined control by executing a management unit control program. The ROM 120b stores the management unit control program. The RAM 120c stores various information that is rewritten during operation of the management unit 100. For example, information stored in the RAM 120c includes flags, counters, timers, etc. The management unit 100 includes a communication terminal 120d that is connected to the pachinko gaming machine 10 so as to be able to communicate bidirectionally.

[0014] The CU control board 120 is connected to the medium insertion unit 101. The CPU 120a is configured to be able to rewrite the memory contents of the management medium inserted into the medium insertion unit 101. The CU control board 120 is connected to the cash insertion unit 102. The CPU 120a is configured to be able to receive a deposit signal transmitted when cash is inserted into the cash insertion unit 102. The deposit signal is a signal that can identify the amount of money inserted into the cash insertion unit 102.

[0015] The CU control board 120 is connected to the operation panel 110. The CPU 120a is configured to be able to receive a ball lending signal transmitted when the ball lending operation unit 111 is operated. The CU control board 120 is configured to be able to receive a payout signal transmitted when the payout operation unit 112 is operated. The CPU 120a is configured to be able to receive a return signal transmitted when the return operation unit 113 is operated. The CPU 120a is configured to be able to control the display content of the first ball number display unit 114. The CPU 120a is configured to be able to control the display content of the remaining balance display unit 115.

[0016] The CU control board 120 is connected to the pachinko gaming machine 10 via the communication terminal 120d. The CPU 120a is configured to be able to receive various control signals (control information) transmitted by the pachinko gaming machine 10. The CPU 120a is configured to be able to transmit various control signals (control information) to the pachinko gaming machine 10. The management unit 100 transmits a connection signal from the communication terminal 120d to the pachinko gaming machine 10. The connection signal may be a command or a message generated by the CU control board 120 (CPU 120a), or may be a signal generated by a transmission circuit (for example, a power supply circuit) different from the CPU 120a.

[0017] The management unit 100 is equipped with an external communication terminal (not shown) for connecting to an external management device prepared separately from the pachinko gaming machine 10 and the management unit 100. As an example, the external management device is installed in the gaming facility. As an example, the external management device (not shown) is a hall computer installed in the gaming facility. As an example, the external management device is a management computer that can communicate with server equipment installed in a data center outside the gaming facility via a network. In this case, it is preferable that the management computer and the management unit 100 are connected so that they can communicate bidirectionally.

[0018] The processing performed by the management unit 100 will now be described. When a management medium is inserted into the medium insertion unit 101, the CPU 120a reads out the remaining amount and the first management ball count PA stored in the management medium and stores them in the RAM 120c. Then, when a management medium is inserted, the CPU 120a performs the process described below.

[0019] When the CPU 120a receives a deposit signal from the cash deposit unit 102, it adds the deposit amount that can be determined from the deposit signal to the remaining balance. When the remaining balance is not 0 and the CPU 120a receives a ball lending signal from the ball lending operation unit 111, it subtracts a specified amount from the remaining balance and stores lending information that can determine the lending of the number of game balls corresponding to the specified amount in the RAM 120c. Note that when the remaining balance is 0, the CPU 120a does not store the lending information in the RAM 120c even if it receives a ball lending signal.

[0020] When the first management ball number PA is 1 or more, upon receiving a payout signal from the payout operation unit 112, the CPU 120a subtracts a predetermined number from the first management ball number PA and stores in RAM 120c lending information that can identify the lending of the predetermined number of game balls. Note that when the first management ball number PA is 0, the CPU 120a does not store in RAM 120c even if it receives a payout signal. In this way, the lending information can identify the number of balls to be lent.

[0021] When the CPU 120a receives counting information from the pachinko gaming machine 10, it adds the number of gaming balls that can be identified from the counting information to the first managed number of balls PA. As will be described in detail later, the counting information is information that can identify the number of balls held that will be transferred for management from the pachinko gaming machine 10 to the management unit 100. The counting information is periodically transmitted from the pachinko gaming machine 10, and is set to 0 unless a counting operation unit 18, which will be described later, is operated in the pachinko gaming machine 10. In other words, even if the CPU 120a receives counting information from the pachinko gaming machine 10, there are cases in which the CPU 120a does not add the counting information to the first managed number of balls PA. When the CPU 120a transmits lending information to the pachinko gaming machine 10, it initializes the lending information stored in the RAM 120c to 0.

[0022] CPU 120a controls first ball count display unit 114 to display information that can identify the first managed ball count PA at any given time. The first managed ball count PA is displayed in real time on first ball count display unit 114. CPU 120a controls balance display unit 115 to display information that can identify the remaining balance at any given time. The remaining balance is displayed in real time on balance display unit 115. When CPU 120a receives a return signal from return operation unit 113, it stores the remaining balance and first managed ball count PA stored in RAM 120c in the management medium, and initializes the remaining balance and first managed ball count PA stored in RAM 120c. CPU 120a controls medium insertion unit 101 so that the management medium is ejected from medium insertion unit 101.

[0023] The pachinko gaming machine 10 will be described. As shown in Figures 1 and 2, the pachinko gaming machine 10 is an enclosed gaming machine in which a specified number P0 of gaming balls are enclosed inside the machine. The pachinko gaming machine 10 is configured so that the enclosed gaming balls circulate within the machine. The gaming balls may be either magnetic or non-magnetic. The pachinko gaming machine 10 does not have a storage section for storing gaming balls. In principle, the pachinko gaming machine 10 is designed so that players cannot touch the gaming balls.

[0024] The pachinko gaming machine 10 electromagnetically manages the second managed number of balls PB based on the number of loaned balls Pb, the number of acquired balls Pc, the number of shot balls Pd, and the number of returned balls Pe. The number of loaned balls Pb is the number of game balls loaned to a player. The number of acquired balls Pc is the number of game balls acquired by a player. The number of shot balls Pd is the number of game balls shot by a player. The number of shot balls Pd can also be said to be the number of game balls supplied from the supply unit 61 described below to the shot unit 65. The number of returned balls Pe is the number of game balls shot by a player that did not reach the game area 20a described below. The number of returned balls Pe can also be said to be the number of game balls shot from the shot unit 65 toward the game area 20a that did not reach the game area 20a. Returned balls are so-called "foul balls."

[0025] The pachinko gaming machine 10 includes a frame 11. The frame 11 includes an outer frame 11a for fixing the machine body to the island equipment, a mounting frame 11b for mounting various gaming components, and a protective frame 11c. The mounting frame 11b is supported by the outer frame 11a so as to be openable and closable. The protective frame 11c is supported by the mounting frame 11b so as to be openable and closable. The protective frame 11c has protective glass (not shown) that protects the gaming components mounted on the mounting frame 11b. The pachinko gaming machine 10 includes a locking device (not shown) that locks the frames 11b and 11c. The pachinko gaming machine 10 is configured so that the frames 11b and 11c cannot be opened from the outer frame 11a unless they are unlocked using a key that fits the locking device.

[0026] The pachinko gaming machine 10 includes an annunciation sound unit 12, an example of which is a speaker. The annunciation sound unit 12 is disposed on the front side of the mounting frame 11b. The annunciation sound unit 12 can execute a performance that outputs a predetermined sound (hereinafter referred to as an audio performance) and an announcement that outputs a predetermined sound (hereinafter referred to as an audio announcement). For example, the predetermined sound is music, sound effects, a human voice reading a predetermined character string, etc. The pachinko gaming machine 10 includes an annunciation sound unit 13, an example of which is a speaker. The annunciation sound unit 13 can execute an announcement by audio. As an example, the annunciation sound unit 12 and the annunciation sound unit 13 are disposed in the mounting frame 11b.

[0027] The pachinko gaming machine 10 is equipped with an alert light-emitting unit 14. The alert light-emitting unit 14 can perform effects (hereinafter referred to as light-emitting effects) by lighting, flashing, and extinguishing an illuminant (not shown), such as an LED. The alert light-emitting unit 14 can perform alerts (hereinafter referred to as light-emitting alerts) by lighting, flashing, and extinguishing an illuminant (not shown). As an example, the alert light-emitting unit 14 is disposed in the mounting frame 11b. The alert light-emitting unit 14 may also be disposed in the gaming board 20, which will be described later.

[0028] The pachinko gaming machine 10 is equipped with a firing operation unit 15 that can be operated to fire gaming balls. The firing operation unit 15 is disposed on the front side of the mounting frame 11b. The pachinko gaming machine 10 is configured to shoot gaming balls with a firing strength that corresponds to the operation of the firing operation unit 15. As an example, the firing operation unit 15 includes a handle lever 15a that can be rotated, a touch sensor D01, a firing stop switch D02, and a handle volume D03 (see FIG. 8).

[0029] The touch sensor D01 is connected to a conductive ring 15b that is disposed so as to surround the side of the firing operation unit 15. The touch sensor D01 transmits a touch signal when a player holds the firing operation unit 15 and the player's fingers touch the conductive ring 15b. The touch signal is in an ON state when the player's fingers are touching the conductive ring 15b, and is in an OFF state when the player's fingers are not touching it.

[0030] The firing stop switch D02 transmits a stop signal when the firing stop button 15c protruding from the side of the firing operation unit 15 is pressed. The stop signal is turned on when the firing stop button 15c is operated, and is turned off when it is not operated. When the handle lever 15a is rotated, the handle volume D03 transmits a volume signal with a voltage corresponding to the amount of rotation.

[0031] The pachinko gaming machine 10 includes a performance operation unit 16. The performance operation unit 16 may be a button type that can be pressed, a touch sensor type that also serves as a display device, or a lever type. As shown in Figures 1 and 3, the pachinko gaming machine 10 is equipped with a second ball number display unit 17 that displays information that can identify the second management ball number PB. As an example, the second ball number display unit 17 is configured with multiple (e.g., six) seven-segment displays arranged in a row, and can display multiple (e.g., six-digit) numbers. The second ball number display unit 17 can perform a predetermined notification by displaying predetermined letters and numbers.

[0032] The pachinko gaming machine 10 is equipped with a counting operation unit 18. The counting operation unit 18 is mainly operated when a player finishes playing on the pachinko gaming machine 10. The counting operation unit 18 allows counting operations using the counting operation unit 18 when the counting operation unit 18 is in a predetermined countable state. The counting operation unit 18 transmits a counting signal when a push operation is performed. The pachinko gaming machine 10 is equipped with a counting notification unit 18a. The counting notification unit 18a notifies whether or not the counting operation unit is in a countable state. As an example, the effect operation unit 16, the second ball number display unit 17, the counting operation unit 18, and the counting notification unit 18a are arranged on the front side of the mounting frame 11b.

[0033] As shown in FIG. 2, the pachinko gaming machine 10 includes a gaming board 20. The gaming board 20 is mounted on a mounting frame 11b. A gaming area 20a having a substantially circular shape in a front view is defined on the front of the gaming board 20. A display window 20b is formed in the approximate center of the gaming area 20a. A launch passage 20c is formed on the left side of the gaming area 20a, which guides gaming balls launched by operating the launch operation unit 15 into the gaming area 20a. The gaming area 20a and the launch passage 20c are covered by protective glass (not shown) of a protective frame 11c.

[0034] The gaming board 20 is equipped with an information display device 21 that displays various information. The information display device 21 includes a first special symbol display section 21a, a second special symbol display section 21b, a first hold display section 21c, a second hold display section 21d, a normal symbol display section 21e, and a normal hold display section 21f. As an example, the multiple display sections 21a to 21f are arranged together in a section that is visible to the player, but this is not limiting, and some or all of them may be arranged in different sections.

[0035] The first special symbol display unit 21a can execute a first special symbol variation game (hereinafter referred to as the first special game) that variably displays predetermined symbols and ultimately statically displays special symbols. The second special symbol display unit 21b can execute a second special symbol variation game (hereinafter referred to as the second special game) that variably displays predetermined symbols and ultimately statically displays special symbols. The special symbols are symbols used to notify the results of an internal lottery (a lottery for special symbol wins). Hereinafter, the first special game and the second special game will be collectively referred to as the "special game." Special symbols include jackpot symbols and losing symbols. Special symbols may also include small jackpot symbols. In the pachinko gaming machine 10, when a jackpot is won in the special symbol winning lottery, a jackpot symbol is statically displayed in the special game, and a jackpot game is awarded after the special game for that jackpot is completed. The jackpot game will be described later.

[0036] The first hold display unit 21c displays information that can identify the number of first special games whose execution has been put on hold because the hold condition has been met but the start condition has not yet been met (hereinafter referred to as the first hold number). The second hold display unit 21d displays information that can identify the number of second special games whose execution has been put on hold because the hold condition has been met but the start condition has not yet been met (hereinafter referred to as the second hold number).

[0037] The normal symbol display unit 21e can execute a normal game in which predetermined symbols are variably displayed and finally normal symbols are statically displayed. The normal symbols are symbols for announcing the result of an internal lottery (a normal symbol winning lottery). The normal symbols include a normal winning symbol and a normal losing symbol. In the pachinko gaming machine 10, when a normal winning symbol is won in the normal symbol winning lottery, the normal winning symbol is statically displayed in the normal game, and a normal winning game is awarded after the normal game ends.

[0038] The normal hold display unit 21f displays information that can identify the number of normal games whose execution has been put on hold because the hold condition has been met but the start condition has not yet been met. The information display device 21 may include a right hit display unit that displays information instructing a right hit, and a round display unit that notifies the upper limit number of rounds of play.

[0039] The pachinko gaming machine 10 is equipped with an alert display unit 19. The alert display unit 19 has an image display area 19a capable of displaying an image. The alert display unit 19 is attached to the game board 20 so that the image display area 19a can be viewed through a display window 20b. For example, the alert display unit 19 is a liquid crystal device. The alert display unit 19 can execute an effect (hereinafter referred to as a display effect) that displays a predetermined image. For example, the predetermined image is an image such as an effect pattern, a character, a landscape, a letter (character string), a number, or a symbol. In the following description, when the term "display" is used to refer to these characters, it means that these characters are displayed as an image. The alert display unit 19 can execute an alert (hereinafter referred to as a display alert) that displays a predetermined image.

[0040] Here, the alert sound unit 12, the alert light-emitting unit 14, and the alert display unit 19 are all alert means (first alert means) capable of issuing an alert, and constitute an alert device ES consisting of multiple alert means. The alert means included in the alert device ES are not limited to the alert sound unit 12, the alert light-emitting unit 14, and the alert display unit 19, and may be configured to omit some of these alert means. In addition to these alert means, or instead of one or more of these alert means that can be selected arbitrarily, the alert device ES may be provided with an alert movable unit that executes movable alerts, or an alert vibration unit that executes vibration alerts.

[0041] For example, the display effects in the notification display unit 19 include an effect symbol variable game (hereinafter referred to as an effect game) using multiple rows of effect symbols (decorative symbols). In the effect game, multiple rows of effect symbols are variably displayed, and finally a combination of effect symbols (hereinafter referred to as a symbol combination) is stopped and displayed. The effect symbols (decorative symbols) are symbols decorated with characters, patterns, etc., and are symbols for diversifying the display effects. As an example, the effect game is performed by variably displaying (scrolling) the effect symbols of the left symbol column, the center symbol column, and the right symbol column in a predetermined direction. The effect game may include a reach effect that is performed by forming a reach. The effect game is started and ended together with the special game. In the effect game, a symbol combination corresponding to the special symbols stopped and displayed in the special game is stopped and displayed. When a jackpot symbol is stopped and displayed in the special game, the jackpot symbol combination is stopped and displayed in the effect game. When a losing symbol is displayed in the special game, a losing symbol combination is displayed in the effect game. In the following description, the special game and the effect game executed together with the special game are collectively referred to as the "variable game."

[0042] The game board 20 is formed with a plurality of winning holes 23 through which game balls can enter. These winning holes 23 open to the game area 20a. The plurality of winning holes 23 include a first starting hole 23A, a second starting hole 23B, a big winning hole 23C, and a normal winning hole 23D. The plurality of winning holes may include a winning hole different from these winning holes 23.

[0043] The first start opening 23A is a winning opening through which a gaming ball is allowed to enter in order to fulfill the conditions for awarding a prize ball and the conditions for holding the first special game. As an example, the first start opening 23A is located below the notification display unit 19. The first start opening 23A is always open so that gaming balls can enter. The gaming board 20 is equipped with a first start sensor D11 that detects a gaming ball that has entered the first start opening 23A (see FIG. 9).

[0044] The second starting opening 23B is a winning opening through which game balls are allowed to enter in order to fulfill the conditions for awarding prize balls and the conditions for holding the second special game. For example, the second starting opening 23B is located to the right of the first starting opening 23A. The second starting opening 23B is provided with a normal opening / closing piece 23Ba, for example, in the form of a door. The second starting opening 23B is closed to prevent game balls from entering when a normal winning game has not been awarded. The second starting opening 23B is opened to allow game balls to enter when a normal winning game has been awarded. The second starting opening 23B may be closed to make it more difficult for game balls to enter when a normal winning game has not been awarded, compared to when a normal winning game has been awarded, or may be opened to make it easier for game balls to enter when a normal winning game has been awarded, compared to when a normal winning game has not been awarded. The game board 20 is provided with a normal solenoid SL1 as a means for opening the second start opening 23B (see FIG. 9). The game board 20 is also provided with a second start sensor D12 that detects a game ball that has entered the second start opening 23B (see FIG. 9). The normal opening / closing piece 23Ba is a so-called "normal electric device."

[0045] The large prize opening 23C is an opening through which game balls are allowed to enter in order to fulfill the conditions for awarding prize balls. As an example, the large prize opening 23C is located at the lower right of the notification display unit 19. The large prize opening 23C is provided with a special opening / closing piece 23Ca, for example, in the form of a door. The large prize opening 23C is closed to prevent game balls from entering when a large prize game has not been awarded. The large prize opening 23C is opened to allow game balls to enter when a large prize game has been awarded. The game board 20 is provided with a special solenoid SL2 as means for opening the large prize opening 23C (see FIG. 9). The game board 20 is also provided with a count sensor D13 that detects game balls that have entered the large prize opening 23C (see FIG. 9).

[0046] The normal winning opening 23D is a winning opening into which a gaming ball enters in order to fulfill the conditions for awarding a prize ball. As an example, the normal winning opening 23D is located at the lower left of the notification display unit 19 and at the lower right of the notification display unit 19. The normal winning opening 23D is always open so that gaming balls can enter. The gaming board 20 is equipped with a normal sensor D14 that detects a gaming ball that enters the normal winning opening 23D (see FIG. 9).

[0047] The game board 20 is provided with a gate 24. As an example, the gate 24 is located in the right area of ​​the game area 20a, above the second start opening 23B and the big prize opening 23C. The gate 24 is formed with a gate opening 24a. The gate opening 24a is always open so that game balls can enter. The gate 24 has a gate sensor D15 that detects game balls that have entered the gate opening 24a (see Figure 9). The gate 24 is an entrance opening through which game balls are allowed to enter in order to establish the conditions for starting a normal game. Even if a game ball enters the gate 24, the conditions for awarding prize balls are not established.

[0048] An outlet 25 is formed on the gaming board 20. As an example, the outlet 25 opens at the lowest part of the gaming area 20a. If a gaming ball does not enter any of the first starting opening 23A, the second starting opening 23B, the big winning opening 23C, and the normal winning opening 23D, it enters the outlet 25. The multiple winning openings 23 and the outlet 25 can be understood as outlets for discharging gaming balls from the gaming area 20a, or as recovery openings for recovering gaming balls from the gaming area 20a. When a gaming ball enters one of the multiple winning openings 23 or the outlet 25, it is discharged from the gaming board 20. Hereinafter, a gaming ball discharged from the gaming board 20 through the multiple winning openings 23 or the outlet 25 may be referred to as an out ball.

[0049] The gaming board 20 is equipped with a radio wave sensor D19 that detects radio waves exceeding a predetermined strength as abnormal radio waves (see FIG. 9). The gaming board 20 may be equipped with one or more radio wave sensors D19. As an example, abnormal radio waves may have a predetermined effect on detection by various sensors and switches, such as causing false detection by various sensors and switches. As an example, abnormal radio waves may have a predetermined effect on communication, such as causing interference with communication between two different devices. When the radio wave sensor D19 detects abnormal radio waves, it transmits a radio wave detection signal.

[0050] The radio wave sensor D19 can detect radio waves that may have a predetermined effect on detection by the first start sensor D11. The radio wave sensor D19 can detect radio waves that may have a predetermined effect on detection by the second start sensor D12. The radio wave sensor D19 can detect radio waves that may have a predetermined effect on detection by the count sensor D13. As an example, the radio wave sensor D19 is provided adjacent to or near the first start sensor D11, the second start sensor D12, or the count sensor D13. That is, the radio wave sensor D19 is provided near the first start sensor D11, the second start sensor D12, or the count sensor D13. The radio wave sensor D19 may be capable of detecting radio waves that may have a predetermined effect on detection by the normal sensor D14 and the gate sensor D15. In addition, the radio wave sensor D19 can detect radio waves that may have a predetermined effect on communication between different devices. For example, the radio wave sensor D19 can detect radio waves that may have a predetermined effect on communication between the game control board 80 and the frame control board 82 (described later). The pachinko gaming machine 10 does not have a magnetic sensor that detects magnetic fields exceeding a predetermined strength as abnormal magnetic fields. However, the pachinko gaming machine 10 may have a magnetic sensor on one or both of the mounting frame 11b and the game board 20, and may be configured to be able to detect the approach of a magnet.

[0051] The mounting frame 11b is equipped with a first door opening switch D17 that detects that the protective frame 11c has been opened relative to the mounting frame 11b (see FIG. 8). The first door opening switch D17 transmits a first door opening signal when it detects that the protective frame 11c has been opened. The mounting frame 11b is equipped with a second door opening switch D18 that detects that the mounting frame 11b has been opened relative to the outer frame 11a (see FIG. 8). The second door opening switch D18 transmits a second door opening signal when it detects that the mounting frame 11b has been opened.

[0052] The player can adjust the strength of the game ball's launch by operating the launch operation unit 15. In other words, the player can shoot the game ball into either the left area to the left of the display window 20b or the right area to the right of the display window 20b. When the game ball flows down the right area, it has the potential to enter the second start opening 23B, the big prize opening 23C, the regular prize opening 23D, or the gate 24. When the game ball flows down the left area, it has the potential to enter the first start opening 23A or the regular prize opening 23D.

[0053] The frame 11 (mounting frame 11b) is provided with a distribution mechanism 29 for game balls. As shown in FIG. 4, the distribution mechanism 29 includes a collection mechanism 30, a circulation mechanism 50, and a launch mechanism 60. The collection mechanism 30 is formed in the mounting frame 11b. The collection mechanism 30 guides game balls discharged from the game board 20 (game area 20a) to the circulation mechanism 50. The collection mechanism 30 is configured by combining passages that extend downward or passages that incline downward. When game balls are received by the collection mechanism 30 from the game board 20, they can reach the circulation mechanism 50 by flowing down the passages that make up the collection mechanism 30.

[0054] The circulation mechanism 50 is formed in the mounting frame 11b. The circulation mechanism 50 transports the game balls received from the recovery mechanism 30 in a predetermined direction. As an example, the circulation mechanism 50 lifts the game balls. The launching mechanism 60 is formed in the mounting frame 11b. When the game balls are transported by the circulation mechanism 50, they are received by the launching mechanism 60. The launching mechanism 60 can launch the game balls transported by the circulation mechanism 50 toward the game area 20a.

[0055] The flow of game balls in the distribution mechanism 29 will be explained. Assume that a game ball is launched by the launch mechanism 60. The game ball can reach the game area 20a. When the game ball reaches the game area 20a, it enters one of the multiple winning holes 23 or the outlet hole 25. The game ball is discharged to the collection mechanism 30 from an outlet (not shown) formed in the game board 20. The game ball passes through the collection mechanism 30 and reaches the circulation mechanism 50. The game ball is transported by the circulation mechanism 50. The game ball returns to the launch mechanism 60. Each mechanism will be explained in detail below.

[0056] The recovery mechanism 30 will now be described in detail. The mounting frame 11b is formed with one or more winning openings 30a, one or more non-winning openings 30b, and one or more foul openings 30c. The winning opening 30a is formed below one of the outlets (not shown) formed at the lower end of the game board 20 that discharges game balls that have entered the multiple winning openings 23. The winning opening 30a receives game balls that are discharged from the game board 20 through the multiple winning openings 23. The non-winning opening 30b is formed below one of the outlets (not shown) formed at the lower end of the game board 20 that discharges game balls that have entered the outlet 25. The non-winning opening 30b receives game balls that are discharged from the game board 20 through the outlet 25. The foul opening 30c is formed below the shot-out passage 20c. The foul receiving opening 30c receives a game ball (hereinafter referred to as a returned ball) that falls from the shot passage 20c. The returned ball is a game ball that has been shot by the shooting mechanism 60 but has not reached the game area 20a.

[0057] The mounting frame 11b is formed with a winning passage 31 connected to the winning receiving opening 30a, a non-winning passage 32 connected to the non-winning receiving opening 30b, and a foul passage 33 connected to the foul receiving opening 30c. The winning passage 31 and the non-winning passage 32 merge at a first junction 34. The mounting frame 11b is formed with a merging passage 35 connected to the first junction 34. The merging passage 35 and the foul passage 33 merge at a second junction 36. The mounting frame 11b is formed with a supply passage 37 connecting the second junction 36 and the circulation mechanism 50.

[0058] The mounting frame 11b is equipped with a foul sensor D21 that detects a game ball (return ball) passing through the foul passage 33. The foul sensor D21 is provided in the foul passage 33 or a portion adjacent to the foul passage 33. The foul sensor D21 transmits a foul signal when it detects a game ball. The foul signal is turned on when a game ball is detected, and is turned off when a game ball is not detected.

[0059] The mounting frame 11b is equipped with a winning passage count sensor D25 that detects gaming balls passing through the winning passage 31. The winning passage count sensor D25 is provided on the winning passage 31 or a portion adjacent to the winning passage 31. The winning passage count sensor D25 transmits a winning passage signal when it detects a gaming ball. The winning passage signal is turned on when a gaming ball is detected and turned off when a gaming ball is not detected.

[0060] The mounting frame 11b is equipped with a non-winning path count sensor D26 that detects gaming balls passing through the non-winning path 32. The non-winning path count sensor D26 is provided on the non-winning path 32 or a portion adjacent to the non-winning path 32. The non-winning path count sensor D26 transmits a non-winning path signal when it detects a gaming ball. The non-winning path signal is turned on when a gaming ball is detected and turned off when a gaming ball is not detected.

[0061] The mounting frame 11b is equipped with an out sensor D30 that detects game balls (valid balls) passing through the merging passage 35. A valid ball is a game ball that has been launched from the launching section 65 and has reached the game area 20a. The out sensor D30 is provided on the merging passage 35 or a portion adjacent to the merging passage 35. The out sensor D30 transmits an out signal when it detects a game ball. The out signal is turned on when a game ball is detected and turned off when a game ball is not detected. The out sensor D30 can also be said to detect out balls.

[0062] The mounting frame 11b is equipped with a ball jamming monitoring sensor D27 that detects game balls passing through the supply passage 37. The ball jamming monitoring sensor D27 is provided in the supply passage 37 or a portion adjacent to the supply passage 37. When the ball jamming monitoring sensor D27 detects a game ball, it transmits a ball jamming detection signal. The ball jamming detection signal is turned on when a game ball is detected, and is turned off when no game ball is detected.

[0063] The circulation mechanism 50 will now be described in detail. The circulation mechanism 50 includes a transport unit 52 that transports the game balls received from the collection mechanism 30. As an example, the transport unit 52 includes a transport passage extending along a predetermined direction, a screw housed in the transport passage, and a transport motor 52a that rotates the screw. The game balls are transported in the predetermined direction in the transport passage by the screw being rotated by the transport motor 52a. The transport motor 52a transports the game balls collected from the game area 20a. However, the transport unit 52 may be a belt extending along the predetermined direction, or a pressure-feed motor that pressure-feeds the game balls in the predetermined direction. The predetermined direction may be an upward direction, or a direction that slopes upward.

[0064] The circulation mechanism 50 is equipped with a transport entrance sensor D28 that detects gaming balls received from the supply passage 37 at the entrance of the transport section 52. The transport entrance sensor D28 is provided at the entrance of the transport section 52 or a portion adjacent to the entrance. The transport entrance sensor D28 transmits a transport entrance signal when it detects a gaming ball. The transport entrance signal is turned on when a gaming ball is detected and is turned off when no gaming ball is detected.

[0065] The circulation mechanism 50 is provided with a transport outlet sensor D29 at the outlet of the transport unit 52, which detects gaming balls transported by the transport unit 52. The transport outlet sensor D29 is provided at the outlet of the transport unit 52 or a portion adjacent to the outlet. The transport outlet sensor D29 transmits a transport outlet signal when it detects a gaming ball. The transport outlet signal is turned on when a gaming ball is detected, and is turned off when a gaming ball is not detected.

[0066] The firing mechanism 60 will now be described in detail. The launching mechanism 60 includes a supply unit 61 and a launching unit 65. The supply unit 61 supplies the gaming balls transported by the transport unit 52 to the launching unit 65 by cutting them out one by one. In other words, the supply unit 61 supplies the gaming balls collected by the collection unit from the playing area 20a to the launching unit 65. The launching unit 65 launches the supplied gaming balls toward the playing area 20a.

[0067] 5 and 6, the supply unit 61 is formed with an entrance-side passage 62a, a dispensing mechanism 63, and an exit-side passage 62b. The entrance-side passage 62a receives the game balls K transported by the transport unit 52. The entrance-side passage 62a aligns the received game balls K in a row. The entrance-side passage 62a is a passage that extends downward toward the portion where the dispensing mechanism 63 is located.

[0068] The dispensing mechanism 63 includes a movable piece 63a configured to be able to supply game balls K, and a supply solenoid 63b that drives the movable piece 63a. When the movable piece 63a is not performing a supply operation, the movable piece 63a blocks the game balls K so that they do not flow from the entrance-side passage 62a to the exit-side passage 62b. As shown in the flow from Figure 5 to Figure 6, when the movable piece 63a performs one supply operation, only the leading game ball K among the game balls K lined up in the entrance-side passage 62a is released into the exit-side passage 62b. The exit-side passage 62b is a passage that extends downward toward the launching unit 65.

[0069] The supply unit 61 is equipped with a supply inlet sensor D22 on the inlet side of the supply unit 61 that detects a game ball K received into the inlet-side passage 62a. The supply inlet sensor D22 is provided in the inlet-side passage 62a or a portion adjacent to the inlet-side passage 62a. The supply inlet sensor D22 transmits a supply inlet signal when it detects a game ball K. The supply inlet signal is turned on when a game ball K is detected, and is turned off when a game ball K is not detected.

[0070] The supply unit 61 is equipped with a supply outlet sensor D23 on the outlet side of the supply unit 61 that detects game balls K released into the outlet-side passage 62b. The supply outlet sensor D23 is provided in the outlet-side passage 62b or a portion adjacent to the outlet-side passage 62b. The supply outlet sensor D23 transmits a supply outlet signal when it detects a game ball K. The supply outlet signal is turned on when a game ball K is detected, and is turned off when a game ball K is not detected.

[0071] As shown in FIG. 7, the launching unit 65 includes a launching hammer 66 configured to launch the game ball and a launching solenoid 66a that drives the launching hammer 66. The launching solenoid 66a may be a motor. The game ball K that flows down the outlet-side passage 62b of the supply unit 61 reaches a striking position 67 of the launching unit 65. As an example, the launching operation of the launching hammer 66 is an operation of striking a game ball at the striking position 67 to launch the game ball toward the launching passage 20c. As indicated by the solid line and the two-dot chain line in the figure, when the launching hammer 66 executes one launching operation, one game ball at the striking position 67 is launched into the launching passage 20c. As indicated by the arrow Y1, if the launching strength is sufficient, the game ball may fly through the launching passage 20c and reach the game area 20a. As shown by arrows Y2 and Y3, if the shooting strength is insufficient, the gaming ball will lose speed in the shooting passage 20c and fall. In this case, the gaming ball will become a return ball and flow into the foul passage 33 from the foul receiving opening 30c.

[0072] As shown in FIG. 4, the distribution mechanism 29 includes a maintenance unit 55. As an example, the maintenance unit 55 is formed on the mounting frame 11b. As an example, the maintenance unit 55 is provided on the circulation mechanism 50. The maintenance unit 55 is configured to be able to polish gaming balls by bringing a polishing member into contact with the gaming balls, as an example of maintenance. The polishing member may be a circular belt or a retractable belt. After the gaming balls are detected by the transport inlet sensor D28, the maintenance unit 55 performs predetermined maintenance on them. After the maintenance is performed on the gaming balls, they are transported by the transport unit 52. As an example, the maintenance unit 55 may be configured as a unit in which the polishing member and a mechanism for driving the polishing member are integrated. In this case, the maintenance unit 55 may be assembled to the mounting frame 11b so that it is replaceable as a unit.

[0073] Next, the jackpot game will be explained. In a jackpot game, a predetermined effect is first performed for a predetermined time (hereinafter referred to as the opening time). For example, the predetermined effect is an opening effect that allows the player to recognize the start of the jackpot game. In a jackpot game, after the opening time has elapsed, a round game in which the large prize opening 23C is opened is performed up to a predetermined upper limit number of times. One round game ends when a number condition is met in which a predetermined upper limit number of game balls enter the opening, or when a time condition is met in which a predetermined upper limit time has elapsed. In a round game, the large prize opening 23C is opened in a predetermined opening manner (opening pattern). In each round game, a round effect is performed. In a jackpot game, when the final round game ends, a predetermined effect is performed for a predetermined time (hereinafter referred to as the ending time). For example, the predetermined effect is an ending effect that allows the player to recognize the end of the jackpot game. The jackpot game ends as the ending time elapses.

[0074] The pachinko gaming machine 10 is equipped with a probability variation function (hereinafter referred to as a probability variation function). The probability variation function is a function for varying the probability of winning a jackpot in a special symbol winning lottery (hereinafter referred to as the jackpot probability). In other words, the pachinko gaming machine 10 has two states in which the jackpot probability can differ: a low probability state in which the probability variation function does not operate, and a high probability state in which the probability variation function operates. The high probability state has a higher jackpot probability than the low probability state. In the high probability state, the jackpot probability is higher than in the low probability state, making it an extremely advantageous state for the player. The high probability state is what is known as a "probability variation state (probability variation state)."

[0075] The pachinko gaming machine 10 is equipped with a ball entry assist function. The ball entry assist function is a function for varying the ball entry rate into the second starting hole 23B. In other words, the pachinko gaming machine 10 has two states in which the ball entry rate into the second starting hole 23B can vary: a low ball entry rate state in which the ball entry assist function is not activated, and a high ball entry rate state in which the ball entry assist function is activated. In the high ball entry rate state, the probability that a gaming ball will enter the second starting hole 23B is higher than in the low ball entry rate state. In the high ball entry rate state, the probability that a gaming ball will enter the second starting hole 23B increases, making it easier for a gaming ball to enter the second starting hole 23B, making it an advantageous state for the player (easy ball entry state). The high ball entry rate state is what is known as an "electric support state," and the low ball entry rate state is what is known as a "non-electric support state."

[0076] For example, the high ball entry rate state can be achieved by performing one of the three controls described below, selected arbitrarily, or by combining multiple controls. The first control is normal symbol variation time reduction control, which shortens the variation time of the normal game compared to the low ball entry rate state. The second control is normal symbol probability variation control, which changes the probability of winning the normal win lottery (normal win probability) to a higher probability compared to the low ball entry rate state. The third control is opening time extension control, which lengthens the total opening time of the second start port 23B in one normal win game compared to the low ball entry rate state. The opening time extension control may be at least one of control that increases the number of times the second start port 23B is opened in one normal win game compared to the low ball entry rate state, and control that lengthens the opening time of the second start port 23B in one normal win game compared to the low ball entry rate state. The high ball entry rate state may also be achieved by combining the fourth control described below. The fourth control is a special symbol fluctuation time shortening control that shortens the fluctuation time of the special game (for example, the average fluctuation time) compared to when the ball is in a low winning rate state. When the special symbol fluctuation time shortening control is performed, a high winning rate state becomes a special symbol fluctuation time shortening state (time shortening state), and a low winning rate state becomes a special symbol non-fluctuation time shortening state (non-time shortening state).

[0077] The game state is determined by the combination of whether or not the probability variable function is activated and whether or not the ball-scoring assist function is activated. In the following explanation, a game state in which the probability state and the ball-scoring rate state are in a state of low probability is referred to as a "low-probability, low-ball-scoring rate state," and a game state in which the probability state and the ball-scoring rate state are in a state of high probability is referred to as a "high-probability, low-ball-scoring rate state." Also, a game state in which the probability state and the ball-scoring rate state are in a state of low probability is referred to as a "low-probability, high-ball-scoring rate state," and a game state in which the probability state and the ball-scoring rate state are in a state of high probability is referred to as a "high-probability, high-ball-scoring rate state."

[0078] The electrical configuration of the pachinko gaming machine 10 will be described. 8, the pachinko gaming machine 10 is equipped with a plurality of control boards. The plurality of control boards includes a game control board (main control board) 80, a performance control board (sub-control board) 81, a frame control board 82, and a launch control board 83. The plurality of control boards are provided in positions that cannot be accessed or seen unless a locking device (not shown) is unlocked to open the mounting frame 11b.

[0079] The game control board 80 and the presentation control board 81 are connected to enable one-way communication from the game control board 80 to the presentation control board 81. The game control board 80 executes predetermined control and transmits control information to the presentation control board 81. For example, the control information is a signal, a command, or a message. The presentation control board 81 executes predetermined control based on the control information received from the game control board 80. The game control board 80 and the frame control board 82 are connected to enable two-way communication. The game control board 80 executes predetermined control and transmits control information to the frame control board 82. The frame control board 82 executes predetermined control and transmits control information to the game control board 80. The frame control board 82 and the launch control board 83 are connected to enable two-way communication. The frame control board 82 executes predetermined control and transmits control information to the launch control board 83. The launch control board 83 transmits control information to the frame control board 82.

[0080] The frame control board 82 of the pachinko gaming machine 10 and the CU control board 120 of the management unit 100 are connected to each other so as to be able to communicate bidirectionally via a connection terminal board 98 provided in the pachinko gaming machine 10. The frame control board 82 executes predetermined control and transmits control information to the CU control board 120. The CU control board 120 executes predetermined control and transmits control information to the frame control board 82.

[0081] The pachinko gaming machine 10 is equipped with a power supply unit 99 on the back side of the machine. The power supply unit 99 receives power from outside the machine, converts the input voltage to a predetermined voltage, and supplies it to the performance control board 81 and the frame control board 82. The power supplied to the frame control board 82 is further supplied to the game control board 80 and the launch control board 83. The power supply unit 99 supplies power to the supply solenoid 63b, the launch solenoid 66a, various sensors, and switches. The power supply unit 99 is equipped with a main switch 99a. The pachinko gaming machine 10 is configured to be able to be powered on by starting power supply to the power supply unit 99 while the main switch 99a is on, or by turning on the main switch 99a while power is being supplied.

[0082] The game control board 80 will now be described in detail. As shown in FIG. 9, the game control board 80 includes a CPU 80a, a ROM 80b, a RAM 80c, a random number generation circuit 80d, a backup power supply 80e, and a backup circuit 80f. The CPU 80a executes a main control program on the game control board 80 to control the progress of the game. The game control board 80 is an example of a second control means, and the CPU 80a included in the game control board 80 is an example of a game control unit that executes control of the progress of the game. The ROM 80b stores the main control program, judgment values ​​used for various judgments and lotteries, tables, etc. The ROM 80b stores multiple types of fluctuation patterns. The fluctuation pattern is information that can identify the fluctuation time from the start to the end of a special game. The fluctuation pattern is information that can identify the fluctuation content (effect content) of an effect game performed during the execution of the special game. The fluctuation patterns include a jackpot fluctuation pattern and a loss fluctuation pattern. The effect game based on the jackpot fluctuation pattern undergoes a reach effect and finally stops and displays the jackpot symbol combination. The effect game based on the loss fluctuation pattern undergoes a reach effect and finally stops and displays the losing symbol combination, either with or without the reach effect. ROM80b stores startup information including a board-side matching code. The board-side matching code and startup information will be described later. ROM80b provided in the game control board 80 is an example of a second information storage unit, and the board-side matching code stored in ROM80b is an example of second specific information.

[0083] The RAM 80c stores various information that is rewritten depending on the processing results of the CPU 80a. For example, the information stored in the RAM 80c includes flags, counters, and timers. The random number generation circuit 80d generates hardware random numbers. The game control board 80 may be configured to be able to generate software random numbers through the random number generation process by the CPU 80a.

[0084] The backup power supply 80e supplies backup power to the RAM 80c even when the external power supply is cut off. In the following description, the cut off of the external power supply may be referred to as a power outage. By receiving backup power from the backup power supply 80e, the RAM 80c can retain the contents stored in the RAM 80c at the time of power outage even after the power outage. In other words, the pachinko gaming machine 10 is equipped with a backup function. However, the RAM 80c may be a non-volatile memory that can retain its stored contents even when the power supply is stopped, thereby allowing it to retain information even after the power outage.

[0085] As an example, the backup power supply 80e is a power storage device that stores power using an external power supply. Information stored in the RAM 80c includes information that is the target of backup. As an example, information that can be stored in the RAM 80c and is the target of backup includes main information. The main information is information related to the progress of a game. As an example, the main information includes information related to the jackpot status (including the number of rounds of play), information related to the game status, information related to the number of reserved balls, information related to normal symbols and special symbols, information related to errors, and a fixed number reaching flag, which will be described later. The RAM 80c is an example of a game storage unit that can store information related to the progress of a game and can retain some of the stored information even after the power supply to the pachinko gaming machine 10 is cut off.

[0086] The backup circuit 80f transmits a power interruption detection signal to the CPU 80a when the power supply voltage supplied from the power supply unit 99 via the frame control board 82 drops below a specified voltage. The game control board 80 is connected to the first start sensor D11, the second start sensor D12, the count sensor D13, the normal sensor D14, and the gate sensor D15 via communication lines. The CPU 80a can receive detection signals transmitted by each of the sensors D11 to D15 upon detecting a game ball. The game control board 80 is connected to the radio wave sensor D19 via a communication line. The CPU 80a can receive radio wave detection signals from the radio wave sensor D19. The game control board 80 is equipped with a connector (not shown) that connects the communication lines connected to each of these sensors to the game control board 80. Each sensor is energized by being connected to the game control board 80 via a communication line. Each sensor is not energized unless it is connected to the game control board 80 via a communication line. The CPU 80a can detect whether each sensor is energized. This allows the CPU 80a to determine whether the communication line connecting the game control board 80 and each sensor is disconnected. The game control board 80 is connected to each of the display units 21a to 21f. The CPU 80a can control the display content of each of the display units 21a to 21f. The game control board 80 is connected to each of the solenoids SL1 and SL2. The CPU 80a can control the opening state of the second start opening 23B and the special winning opening 23C by controlling the operation of each of the solenoids SL1 and SL2.

[0087] The performance control board 81 will now be described in detail. The effect control board 81 includes a CPU 81a, a ROM 81b, and a RAM 81c. The CPU 81a executes a sub-control program to perform processing related to the effect. The ROM 81b stores the sub-control program and a judgment value used for a predetermined lottery. The ROM 81b stores display effect data used for display effect, light-emitting effect data used for light-emitting effect, and audio effect data used for audio effect. The ROM 81b also stores display notification data used for display notification, light-emitting notification data used for light-emitting notification, and audio notification data used for audio notification. The RAM 81c stores various information that is rewritten during operation of the pachinko gaming machine 10. For example, the information stored in the RAM 81c includes a flag, a counter, and a timer. The effect control board 81 is configured to be able to generate software random numbers through random number generation processing by the CPU 81a. The effect control board 81 may also include a random number generation circuit 80d to be able to generate hardware random numbers.

[0088] The performance control board 81 is connected to the notification display unit 19. The CPU 81a is capable of controlling the display content of the notification display unit 19. The performance control board 81 is connected to the notification audio unit 12. The CPU 81a is capable of controlling the output content of the notification audio unit 12. The performance control board 81 is connected to the notification light-emitting unit 14. The CPU 81a is capable of controlling the light-emitting mode of the notification light-emitting unit 14. In this way, the notification display unit 19, the notification audio unit 12, and the notification light-emitting unit 14 are controlled by the performance control board 81 (CPU 81a).

[0089] The frame control board 82 will now be described in detail. As shown in FIG. 8, the frame control board 82 includes a CPU 82a, a ROM 82b, a RAM 82c, a performance display monitor 82d, a ball removal switch 82e, an error reset switch 82f, a game ball clear switch 82g, a RAM clear switch 82h, a backup power supply 82j, a backup circuit 82k, and a launch permission circuit 82m. The CPU 82a executes a frame control program on the frame control board 82 to perform processing related to the operation of the components mounted on the mounting frame 11b. The ROM 82b stores the frame control program and other information. The ROM 82b stores a frame-side verification code, which will be described later. The frame control board 82 is an example of first control means. The ROM 82b included in the frame control board 82 is an example of a first information storage unit, and the frame-side verification code stored in the ROM 82b is an example of first identification information. The RAM 82c stores various information that is rewritten during operation of the pachinko gaming machine 10. For example, the information stored in the RAM 82c includes flags, counters, and timers.

[0090] As an example, the performance display monitor 82d is configured with multiple (e.g., six) seven-segment displays arranged, and is capable of displaying multiple (e.g., six-digit) numbers. The performance display monitor 82d displays a base value. The base value is a value indicating the ratio (proportion) of the total number of winning balls during normal play to the total number of valid balls during normal play. Normal play is play when the game is in a low probability, low ball entry rate state and no jackpot game is being played. The base value is calculated using the formula "total number of winning balls during normal play ÷ total number of valid balls during normal play × 100".

[0091] The ball removal switch 82e is a switch that is operated to bring about a state in which game balls inside the pachinko gaming machine 10 can be discharged outside the machine (hereinafter referred to as the ball removal state). The ball removal state is a state in which game balls can be discharged from the distribution mechanism 29. The ball removal switch 82e transmits a ball removal signal when pressed. The ball removal signal is turned on when the ball removal switch 82e is pressed, and is turned off when the switch is not pressed. The ball removal signal is transmitted to the CPU 82a.

[0092] The error release switch 82f is a switch that is operated when a predetermined error (a supply mechanism error, as an example, described below) is set and the cause of the error is eliminated, and the error setting is released. The error setting is performed when the error is detected. The error release switch 82f transmits an error release signal when pressed. The error release signal is turned on when the error release switch 82f is pressed, and is turned off when the switch is not pressed. The error release signal is sent to the CPU 82a.

[0093] The game ball clear switch 82g is a switch that is operated when initializing the second management ball count PB (hereinafter referred to as second management ball count information) stored as data in RAM 82c to 0. The game ball clear switch 82g transmits a game ball clear signal when pressed. The game ball clear signal is turned on when the game ball clear switch 82g is pressed, and is turned off when no pressing operation is performed. The game ball clear signal is transmitted to the CPU 82a.

[0094] The RAM clear switch 82h is a switch that is operated when initializing the information stored in the RAM 80c and the information stored in the RAM 82c (hereinafter referred to as RAM clear). The RAM clear switch 82h transmits a RAM clear signal when pressed. The RAM clear signal is turned on when the RAM clear switch 82h is pressed, and is turned off when it is not pressed. The RAM clear signal is transmitted to the CPU 82a and also to the game control board 80 (CPU 80a).

[0095] The backup power supply 82j supplies backup power to the RAM 82c even when the external power supply is cut off. By receiving backup power from the backup power supply 82j, the RAM 82c can retain the contents stored in the RAM 82c at the time of power outage even after the power outage. However, the RAM 82c may be a non-volatile memory that can retain stored contents even when the power supply is stopped, so that the RAM 82c can retain information even after the power outage.

[0096] As an example, the backup power supply 82j is a power storage device that stores power from an external power supply. Even when the external power supply is cut off, the backup power supply 82j supplies backup power to the launch control board 83 (launch control circuit 83a) and the launch solenoid 66a at least until a predetermined time (hereinafter referred to as the supply time) required for the launch control board 83 and the launch solenoid 66a to complete their predetermined operations has elapsed. Note that the supply time is related to the power capacity stored to supply to the launch control board 83 and the launch solenoid 66a, and may be the time required to release the power, or may be a time determined by a predetermined circuit.

[0097] The launch control board 83 (launch control circuit 83a) and the launch solenoid 66a can perform predetermined operations even after the external power supply is cut off by receiving backup power from the backup power supply 82j. The launch unit 65 is configured to be able to perform n launch operations after the external power supply is cut off, even if the external power supply is cut off while the normal launch operation (launch sequence) is being performed. As an example, n=1, but is not limited to this, and n=2 or n≧3 may also be used.

[0098] The information stored in the RAM 82c includes information that is subject to backup. As an example, information that can be stored in the RAM 82c and that is subject to backup includes second managed ball count information, game information, and first performance information. The second managed ball count information is information that can identify the second managed ball count PB. The game information is information notified from the game control board 80 according to the progress of the game. As an example, the game information includes the occurrence of a start gate winning, the occurrence of a normal winning, the occurrence of a big prize gate winning in a jackpot game, passing through the gate, the confirmation of a special symbol (the end of a variable game), the occurrence of a jackpot, the current game status, and an error code. The error code is information that can identify whether an error has been detected in the pachinko gaming machine 10 and, if an error has been detected, the type of error. The error code is an example of special information. The first performance information is information related to a base value and the calculation of the base value. The information related to the calculation of the base value includes the total number of winning balls during normal play and the total number of valid balls during normal play.

[0099] The backup circuit 82k transmits a power interruption detection signal to the CPU 82a when the power supply voltage supplied from the power supply unit 99 drops below a specified voltage. The launch permission circuit 82m transmits a signal (hereinafter referred to as a launch permission signal) that can identify that the launch control board 83 is in a launch permission state that allows the launch of game balls. The conditions for transmitting the launch permission signal will be described later.

[0100] The frame control board 82 is connected to the counting operation unit 18. The CPU 82a is configured to be able to receive counting signals transmitted by the counting operation unit 18. The frame control board 82 is connected by communication lines to the first door opening switch D17, the second door opening switch D18, the foul sensor D21, the supply inlet sensor D22, the supply outlet sensor D23, the winning passage count sensor D25, the non-winning passage count sensor D26, and the ball jam monitoring sensor D27. The frame control board 82 is also connected by communication lines to the transport inlet sensor D28, the transport outlet sensor D29, and the out sensor D30. The CPU 82a is configured to be able to receive the first door opening signal, the second door opening signal, the foul signal, the supply inlet signal, the supply outlet signal, the winning passage signal, the non-winning passage signal, the ball jam detection signal, the transport inlet signal, the transport outlet signal, and the out signal transmitted by these sensors and switches. The frame control board 82 is equipped with connectors (not shown) that connect the communication lines leading to these sensors and switches to the frame control board 82. Each sensor and switch is energized by being connected to the frame control board 82 by a communication line. Each sensor and switch is not energized unless it is connected to the frame control board 82 by a communication line. The CPU 82a can detect whether each sensor and switch is energized. This allows the CPU 82a to determine whether the communication lines connecting the frame control board 82 to each sensor and each switch are broken. The frame control board 82 transmits a first door open signal and a second door open signal to the game control board 80.

[0101] The frame control board 82 is connected to the notification sound unit 13. The CPU 82a is capable of controlling the output content of the notification sound unit 13. The frame control board 82 is connected to the second ball number display unit 17. The CPU 82a is configured to be able to control the display content of the second ball number display unit 17. The frame control board 82 is connected to the maintenance unit 55. The CPU 82a is configured to be able to control the maintenance operation of the maintenance unit 55. The frame control board 82 is connected to the transport unit 52 (transport motor 52a). The CPU 82a is configured to be able to control the transport operation of the transport unit 52. The frame control board 82 is connected to the supply solenoid 63b. The CPU 82a can displace the movable piece 63a by controlling the supply of electricity to the supply solenoid 63b. In other words, the CPU 82a is configured to be able to control the supply operation of game balls by the supply unit 61.

[0102] The frame control board 82 is connected to the management unit 100. The CPU 82a is configured to be able to receive various messages transmitted by the CU control board 120. Note that the connection signal transmitted by the management unit 100 is received by the launch permission circuit 82m from the connection terminal board 98 without passing through the CPU 82a. The launch permission circuit 82m also receives the launch stop signal transmitted by the game control board 80 and the error signal transmitted by the CPU 82a.

[0103] The launch control board 83 includes a launch control circuit 83a for controlling the operation of the launch unit 65. The launch control circuit 83a transmits a drive signal to the launch solenoid 66a based on a control signal received from the frame control board 82 and signals received from sensors and switches.

[0104] The launch control board 83 is connected to the touch sensor D01, the launch stop switch D02, and the handle volume D03. The launch control circuit 83a is configured to be able to receive touch signals, stop signals, and volume signals transmitted by these switches and sensors. The launch control board 83 is connected to the launch solenoid 66a. When the launch control circuit 83a transmits a drive signal to the launch solenoid 66a, the launch solenoid 66a is driven and the launch hammer 66 strikes the gaming ball. In other words, the launch control board 83 is configured to be able to control the launching operation of the launching unit 65 to launch the gaming ball.

[0105] The firing control circuit 83a has an operation determination unit, a pulse clock generation unit, a timing pulse generation unit, a holding circuit, and a solenoid drive unit. The operation determination unit sends an operation signal to the timing pulse generation unit when the operation enable condition is met because the firing enable signal from the frame control board 82 is in the ON state, the stop signal from the firing stop switch D02 is in the OFF state, and the touch signal from the touch sensor D01 is in the ON state. The operation determination unit does not send an operation signal to the timing pulse generation unit when the operation enable condition is not met because some or all of the following conditions are not met: the firing enable signal from the frame control board 82 is in the ON state, the stop signal from the firing stop switch D02 is in the OFF state, and the touch signal from the touch sensor D01 is in the ON state.

[0106] When the timing pulse generating unit receives an operation signal, it combines the operation signal with the pulse signal received from the pulse clock generating unit and sends a firing timing pulse to the solenoid driving unit. Each time the solenoid driving unit receives a firing timing pulse, it supplies (outputs) to the firing solenoid 66a a driving current whose voltage corresponds to the volume signal (voltage) received from the handle volume D03. This drives the firing solenoid 66a with a strength corresponding to the amount of rotation of the handle lever 15a, and launches a gaming ball. The firing control circuit 83a sends a subtraction reference signal to the frame control board 82 at a predetermined timing. When a driving current is output when the operable condition is met, the holding circuit holds the voltage (voltage value) of the volume signal at that time.

[0107] The processing executed by the frame control board 82 (CPU 82a) will be described. The frame-side power-off process will be described. When the CPU 82a receives a power-off detection signal transmitted from the backup circuit 82k, it executes power-off processing. In the frame-side power-off processing, the CPU 82a calculates a checksum value of the RAM 82c and stores the calculated checksum value in the RAM 82c. The CPU 82a also stores information (hereinafter referred to as a backup flag) that can identify that the power-off processing has been executed successfully in the RAM 82c. Thereafter, the CPU 82a waits until the power is completely turned off. The various pieces of information stored in the RAM 82c when the power is turned off are retained even after the power is turned off by the backup function described above.

[0108] The frame side power-on process will now be described. The CPU 82a starts up when the voltage supplied to the frame control board 82 reaches the voltage required for the operation of the CPU 82a upon power-on. In this embodiment, the CPU 82a becomes capable of receiving a signal (for example, startup information, described below) transmitted from the game control board 80 when a predetermined time ta (for example, 500 ms) has elapsed since power supply was started. When the CPU 82a starts up upon power-on, it executes a communication check process. The communication check process is executed until the frame-side power-off process is executed.

[0109] As shown in FIG. 10, in the communication check process, the CPU 82a determines whether or not startup information has been received from the gaming control board 80. As an example, the startup information is information that can identify the type of gaming machine, the ID number of the CPU 80a, and the manufacturer of the CPU 80a (a board-side matching code, described later). The startup information includes a communication serial number. The communication serial number included in the startup information is a fixed value (for example, 0). The startup information is an example of special information.

[0110] The verification code is information used in the verification process described below to verify whether the combination of the game control board 80 and the frame control board 82 connected to the game control board 80 is a predetermined combination. The verification code includes a verification code stored in the ROM 80b of the game control board 80 (hereinafter referred to as the board-side verification code) and a verification code stored in the ROM 82b of the frame control board 82 (hereinafter referred to as the frame-side verification code). The board-side verification code is, for example, information that can identify the manufacturer of the CPU 80a, and the frame-side verification code is, for example, information that can identify the manufacturer of the CPU 82a.

[0111] 11, in this embodiment, the manufacturers of the CPUs 80a and 82a include, for example, the first to fifth manufacturers, and when the manufacturer of the CPU 80a and the manufacturer of the CPU 82a are the same manufacturer, the verification code is set so that the board-side verification code and the frame-side verification code match. For example, when the manufacturer of the CPU 80a and the manufacturer of the CPU 82a are both the first manufacturer, the board-side verification code and the frame-side verification code are both set to 101.

[0112] Here, the collation process executed by the CPU 82a when it is started will be described. The CPU 82a that executes the collation process is an example of a collation unit. 12, in the verification process, the CPU 82a determines whether or not startup information transmitted from the game control board 80 has been received (step S101). If startup information has not been received, the CPU 82a terminates the verification process. If startup information has been received, the CPU 82a identifies a board-side verification code from the received startup information (step S102).

[0113] Next, the CPU 82a reads out the frame-side verification code stored in the ROM 82b and compares it with the specified board-side verification code to determine whether the board-side verification code and the frame-side verification code match (step S103). If the board-side verification code and the frame-side verification code match (step S103: YES), the CPU 82a stores information (hereinafter referred to as a verification flag) that can identify that the board-side verification code and the frame-side verification code are a predetermined combination in the RAM 82c (step S104). Then, the CPU 82a ends the verification process. On the other hand, if the board-side verification code and the frame-side verification code do not match (step S103: NO), the CPU 82a ends the verification process.

[0114] As described above, in this embodiment, when power supply to the pachinko gaming machine 10 is started, the gaming control board 80 transmits startup information including a board-side verification code to the frame control board 82. When the frame control board 82 receives the startup information, the CPU 82a of the frame control board 82 verifies whether the combination of the frame-side verification code and the received board-side verification code is a predetermined combination. By performing this verification process, in this embodiment, if the board-side verification code and the frame-side verification code on the connected gaming control board 80 and frame control board 82 match, it is determined that the gaming control board 80 and the frame control board 82 are connected in a predetermined combination. On the other hand, in this embodiment, if the board-side verification code and the frame-side verification code on the connected gaming control board 80 and frame control board 82 do not match, it is determined that the gaming control board 80 and the frame control board 82 are not connected in a predetermined combination.

[0115] When the matching process is completed, the CPU 82a determines whether a matching flag is stored in the RAM 82c. If a matching flag is stored in the RAM 82c, the CPU 82a transmits response information to the received startup information to the gaming control board 80 within response time t2 (for example, 10 ms). That is, if the combination of the frame-side matching code and the board-side matching code is a predetermined combination, the CPU 82a transmits the response information to the startup information to the gaming control board 80. The response information to the startup information is an example of predetermined response information. This response information includes a communication serial number (for example, 0) corresponding to the received startup information. That is, the startup information and the response information to the startup information include a communication serial number as an example of common communication information.

[0116] Thereafter, the CPU 82a stores information that can identify that the startup information has been received (hereinafter referred to as a startup reception flag) in the RAM 82c. On the other hand, if the verification flag is not stored in the RAM 82c, the CPU 82a does not transmit response information to the received startup information to the game control board 80.

[0117] If the CPU 82a does not receive startup information within a predetermined time tx (for example, 3 minutes) after startup by power-on, the CPU 82a stores information (a flag) that can identify the occurrence of a managed gaming machine communication error in the RAM 82c. That is, the CPU 82a sets a managed gaming machine communication error. Thereafter, the CPU 82a waits until it receives startup information. If the CPU 82a receives startup information from the gaming control board 80 while the managed gaming machine communication error is set, it cancels the setting of the managed gaming machine communication error and stores a startup reception flag in the RAM 82c.

[0118] In the following description, when an error is referred to as being "set," it means that information capable of identifying the error (a flag, for example) is stored in the RAM 82c. When an error is referred to as being "released," it means that information capable of identifying the error (a flag, for example) is deleted from the RAM 82c.

[0119] After receiving the startup information, the CPU 82a can receive game information from the game control board 80 every time a periodic time t3 (for example, 108 ms) has elapsed. The game information includes a communication serial number. The communication serial number included in the game information is updated according to the number of times game information is transmitted from the game control board 80 to the frame control board 82. When the CPU 82a receives the game information, it transmits response information to the received game information to the game control board 80 within a response time t2 (for example, 10 ms). This response information includes the same communication serial number as the received game information.

[0120] If the CPU 82a does not receive the next information (for example, game information) within a predetermined time ty (for example, 1000 ms) after receiving startup information or game information from the game control board 80, the CPU 82a stores information capable of identifying the occurrence of a managed game machine communication error in the RAM 82c. In other words, the CPU 82a sets a managed game machine communication error. If the CPU 82a receives game information from the game control board 80 while the managed game machine communication error is set, the CPU 82a cancels the setting of the managed game machine communication error. In this way, the frame control board 82 can detect an abnormality in communication with the game control board 80 as a managed game machine communication error.

[0121] If a startup reception flag is stored in RAM 82c, the CPU 82a determines whether the backed-up information is normal. If a startup reception flag is not stored, the CPU 82a waits until the startup reception flag is stored. Specifically, the CPU 82a determines whether a backup flag is stored in RAM 82c. The CPU 82a also calculates a checksum value in RAM 82c and determines whether the calculated checksum value matches the checksum value calculated during the frame-side power-off process. If a backup flag is stored and the checksum values ​​match, the CPU 82a determines the information is normal. If not, the CPU 82a determines the information is abnormal. If the backed-up information is determined to be abnormal, the CPU 82a initializes the second ball count management information and game play information stored in RAM 82c. At this time, the CPU 82a does not initialize the first performance information. The CPU 82a then returns to normal operation based on the initialized or backed-up second ball count management information, game play information, and first performance information, and executes the frame-side normal process described below.

[0122] On the other hand, if the backed-up information is determined to be normal, the CPU 82a determines whether the game ball clear switch 82g has been operated based on whether the game ball clear signal is on. When the game ball clear switch 82g has been operated in a predetermined manner, the CPU 82a initializes the second ball control number information stored in the RAM 82c in the second ball control number information generation process described below. At this time, the CPU 82a does not initialize the game information or the first performance information. When the game ball clear switch 82g has not been operated, the CPU 82a does not initialize the second ball control number information.

[0123] The CPU 82a determines whether the RAM clear switch 82h has been operated based on whether the RAM clear signal is ON. When the RAM clear switch 82h is operated, the CPU 82a initializes the game information stored in the RAM 82c. At this time, the CPU 82a does not initialize the second ball count information and the first performance information. When the RAM clear switch 82h is not operated, the CPU 82a does not initialize the game information. In other words, the first performance information is not initialized regardless of whether the second ball count information is initialized in response to the operation of the game ball clear switch 82g or the game information is initialized in response to the operation of the RAM clear switch 82h. Thereafter, the CPU 82a returns to normal operation based on the initialized or backed-up second ball count information, game information, and first performance information, and executes the frame-side normal processing described below.

[0124] The frame-side normal processing of the frame control board 82 will now be described. The game information storage process in the frame-side normal process will be described. The game information storage process is a process of storing game information received from the game control board 80 in the RAM 82c. When the CPU 82a receives game information capable of identifying a game status, the CPU 82a stores the game information in the RAM 82c. The CPU 82a transmits the game information stored in the RAM 82c to the CU control board 120. By referring to the game information stored in the RAM 82c, the CPU 82a can identify whether a jackpot game is being played, whether a high probability state is being played, whether a high ball entry rate state is being played, whether an error has been detected in the pachinko game machine 10, and if an error has been detected, the type of error. In addition, when the CPU 82a receives various types of game information, it generates information capable of identifying the received game information and stores the information in the RAM 82c.

[0125] The first performance information generation process of the frame-side normal process will be described. The first performance information generation process is a process for calculating a base value as the first performance information. The CPU 82a refers to the game state flag and determines whether or not a jackpot game is being played and the current game state is a low probability, low ball winning rate state (i.e., whether or not normal game is being played). If normal game is being played, the CPU 82a adds up the total number of prize balls acquired during normal game play when it receives game information capable of identifying the occurrence of a start port winning (hereinafter referred to as start port winning information) or game information capable of identifying the occurrence of a normal winning (hereinafter referred to as normal winning information). The total number of prize balls acquired is stored in the RAM 82c as one piece of first performance information. When the CPU 82a receives a winning passage signal or a non-winning passage signal, it adds up the total number of valid balls acquired during normal game play. The total number of valid balls is stored in the RAM 82c as one piece of first performance information. The CPU 82a calculates the base value using the formula "total number of prize balls acquired during normal play ÷ total number of available balls during normal play × 100." The CPU 82a may count the total number of prize balls acquired and the total number of available balls every minute, and calculate the base value every minute. The CPU 82a may count the total number of prize balls acquired every time the total available balls reaches a predetermined number, and calculate the base value every time the total available balls reaches the predetermined number. As an example, the predetermined number may be 60,000 balls, or the maximum number of balls that can be fired by the firing unit 65 per minute (e.g., 100 balls). The CPU 82a controls the performance display monitor 82d to display information that can identify the calculated base value.

[0126] The CPU 82a may be configured to calculate a role ratio and a consecutive role ratio as the first performance information and display them on the performance display monitor 82d. The role ratio is the ratio of the total number of prize balls acquired through the operation of electric role devices to the total number of prize balls acquired throughout all game states. The total number of prize balls acquired through the operation of electric role devices is the sum of the total number of prize balls acquired as a result of winning in the second start slot 23B during normal hit play (normal electric role device activated) and the total number of prize balls acquired as a result of winning in the large prize slot 23C during jackpot play (special electric role device activated). The consecutive role ratio is the ratio of the total number of prize balls acquired through the operation of consecutive role devices to the total number of prize balls acquired throughout all game states. The total number of prize balls acquired through the operation of consecutive role devices is the total number of prize balls acquired as a result of winning in the large prize slot 23C during jackpot play.

[0127] The second performance information generation process of the frame-side normal process will be described. The second performance information generation process is a process for calculating the specific number of balls as the second performance information. The specific number of balls is a value that can identify the increase in the number of game balls from the reference point when the number of game balls owned by the player is the smallest throughout all game states since the pachinko gaming machine 10 was powered on. In this embodiment, the specific number of balls is stored in a predetermined area of ​​the RAM 82c, and after the power is turned off, it is cleared to the initial value (0) regardless of whether the RAM clear switch 82h was operated when the power was turned on. In other words, in this embodiment, the specific number of balls is configured not to be backed up.

[0128] After power-on, when the CPU 82a receives any of the start port winning information, normal winning information, and special winning port winning information in all game states, it updates the specific ball count by adding the number of prize balls (the number of prize balls awarded for winning) corresponding to each winning information to the specific ball count stored in the RAM 82c. Furthermore, after power-on, when the CPU 82a receives a winning passage signal or a non-winning passage signal in all game states, it references the specific ball count stored in the RAM 82c. If the specific ball count is 0, it does not update the specific ball count. On the other hand, if the specific ball count is greater than 0, it updates the specific ball count by subtracting 1 from the specific ball count.

[0129] Thus, in the pachinko gaming machine 10, after power-on, the CPU 82a updates the number of specific balls stored in the RAM 82c throughout all game states when it receives each winning information and a winning path signal or a non-winning path signal, thereby calculating the current number of specific balls. As shown in FIG. 4, in the pachinko gaming machine 10, game balls used in play (that have reached the game area 20a) are detected by the winning path count sensor D25 or the non-winning path count sensor D26. Therefore, when game balls are used, the CPU 82a receives a winning path signal or a non-winning path signal. That is, in this embodiment, the CPU 82a counts the number of specific balls based on the number of prize balls awarded since the start of power supply and the number of balls used in play since the start of power supply. Note that in this embodiment, when the number of specific balls reaches a predetermined upper limit (e.g., 95,000 balls), the machine enters a fixed-point reaching state, which is an example of a specific state. The fixed-point reaching state will be described in detail later.

[0130] The second control ball number information generation process, which is part of the normal frame-side process, will be described. The second management ball number information generation process is a process for generating (managing) the second management ball number PB. When the CPU 82a receives acquired prize ball number information from the game control board 80, it adds the acquired prize ball number that can be determined from the acquired prize ball number information to the second management ball number PB. The acquired prize ball number information is control information transmitted by the game control board 80 when the conditions for awarding prize balls are met following a win at a specified winning slot, and is configured to be able to determine the number of prize balls set for that winning slot. In this way, the CPU 82a increases the second management ball number PB according to the acquired prize ball number information. When the CPU 82a receives loan information from the CU control board 120, it adds the number of loaned balls indicated in the loan information to the second management ball number PB. In this way, the CPU 82a increases the second management ball number PB according to the loan information.

[0131] When the CPU 82a detects that one game ball has been collected as a returned ball based on the foul signal transmitted by the foul sensor D21, it increments the second control number of balls PB. As an example, the CPU 82a detects that one game ball has been collected as a returned ball when the foul signal transitions from the OFF state to the ON state to the OFF state. In this way, the CPU 82a increments the second control number of balls PB in response to the detection by the foul sensor D21.

[0132] When the CPU 82a detects that one gaming ball has been supplied to the launching section 65 based on the supply outlet signal transmitted by the supply outlet sensor D23, it subtracts the second management number of balls PB. In other words, when the CPU 82a detects that a gaming ball has been launched toward the gaming area 20a in response to detection by the supply outlet sensor D23, it subtracts the second management number of balls PB. As an example, the CPU 82a detects that one gaming ball has been supplied when the supply outlet signal transitions from OFF state → ON state → OFF state. This converts the electromagnetically managed gaming ball (second management number of balls PB) into an actual ball. In this way, the CPU 82a decreases the second management number of balls PB in response to detection by the supply outlet sensor D23.

[0133] Without being limited to this, the CPU 82a may be configured to subtract the second control number of balls PB when it detects that one gaming ball has been supplied to the launching unit 65 based on the supply inlet signal transmitted by the supply inlet sensor D22 instead of the supply outlet signal transmitted by the supply outlet sensor D23. The CPU 82a may be configured to subtract the second control number of balls PB when it detects that one gaming ball has been supplied to the launching unit 65 based on both the supply inlet signal transmitted by the supply inlet sensor D22 and the supply outlet signal transmitted by the supply outlet sensor D23. In other words, the CPU 82a may subtract the second control number of balls PB in response to detection by at least one of the supply inlet sensor D22 and the supply outlet sensor D23.

[0134] Furthermore, the CPU 82a may decrement the second control number of balls PB by driving the launch solenoid 66a, or may be configured to decrement the second control number of balls PB when a sensor is provided in the launch passage 20c and the sensor detects a game ball launched from the launch unit 65. In this way, the second control number of balls PB is decremented in connection with at least one of the launch operation by the launch unit 65 and the supply operation by the supply unit 61. In other words, the CPU 82a decrements the second control number of balls PB in response to the launch of a game ball.

[0135] When the CPU 82a is in a countable state and receives a count signal from the counting operation unit 18, it transmits the count information stored in RAM 82c to the management unit 100. The CPU 82a subtracts the number of count balls that can be determined from the count information from the second management ball number PB. The CPU 82a may subtract the second management ball number PB before transmitting the count information, or may transmit the count information and then subtract the second management ball number PB.

[0136] As an example, the countable state is a state in which the necessary power is supplied and the second management ball count PB is not 0. When the countable state is established, the CPU 82a controls the light emitter built into the counting notification unit 18a so that the counting notification unit 18a lights up. In one example of this embodiment, the management of the number of game balls is transferred to the management unit 100 by transmitting the counting information to the management unit 100.

[0137] Also, as described above, when power supply is started while the game ball clear switch 82g is operated in a predetermined manner, the CPU 82a initializes the second management ball number information (second management ball number PB).

[0138] The CPU 82a controls the second ball count display unit 17 to display information that can identify the updated second management ball count PB after adding or subtracting. As will be described in more detail later, the second ball count display unit 17 also serves as a device that can display information that can identify errors set (detected) by the frame control board 82.

[0139] In this way, the pachinko gaming machine 10 can electromagnetically store the number of game balls owned by the player (second management ball number PB) as data, and is configured to enable play based on the stored data. The RAM 82c that stores the data of the second management ball number PB is an example of a data storage unit.

[0140] The frame-side error setting process of the frame-side normal process will be described. As shown in Figure 13, the frame side error setting process is a process for setting errors detected by the frame control board 82. As an example, in the frame side error setting process, errors that can be set by the frame control board 82 (CPU 82a) include at least the above-mentioned managed gaming machine communication error, a supply mechanism error, a frame disconnection error, a game ball count clear error, an abnormal winning ball count error, and a door open error. Furthermore, the frame side error notification process is a process for notifying an error in a predetermined notification manner when an error is detected in the frame side error setting process. The processing contents of the frame side error setting process and the frame side error notification process will be explained in detail later.

[0141] Next, various processes performed by the game control board 80 (CPU 80a) will be described. The power-off process on the panel side will now be described. When the CPU 80a receives a power-off detection signal transmitted from the backup circuit 80f, it executes power-off processing. In the board-side power-off processing, the CPU 80a transmits a firing stop signal to the frame control board 82. The CPU 80a calculates a checksum value for the RAM 80c and stores the calculated checksum value in the RAM 80c. The CPU 80a also stores information (hereinafter referred to as a backup flag) that can identify that the power-off processing has been executed successfully in the RAM 80c. The CPU 80a then waits until the power is completely turned off. The various pieces of information stored in the RAM 80c when the power is turned off are retained even after the power is turned off by the backup function described above.

[0142] The power-on process on the panel side will now be described. When the voltage supplied to the game control board 80 reaches the voltage required for the operation of the CPU 80a upon power-on and the CPU 80a starts up, the CPU 80a inhibits timer interrupt processing. Subsequently, the CPU 80a executes communication confirmation processing.

[0143] As shown in FIG. 10 , in the communication confirmation process, the CPU 80a transmits startup information to the frame control board 82. As described above, the startup information includes a board-side verification code. In this embodiment, the time from when power supply is started until the gaming control board 80 (CPU 80a) is able to transmit the startup information to the frame control board 82 is tb (1500 ms, for example). As described above, the time from when power supply is started until the frame control board 82 (CPU 82a) is able to receive the startup information is ta (500 ms, for example). In other words, in this embodiment, the time from when power supply to the pachinko gaming machine 10 is started until the frame control board 82 is able to receive the startup information is shorter than the time from when power supply to the pachinko gaming machine 10 is started until the gaming control board 80 is able to transmit the startup information to the frame control board 82.

[0144] When a predetermined time tc (for example, 108 ms) has elapsed since the CPU 80a transmitted the startup information without receiving any response information, the CPU 80a transmits the startup information to the frame control board 82. Thereafter, if the CPU 80a does not receive any response information from the frame control board 82, the CPU 80a transmits the startup information to the frame control board 82 every time the predetermined time tc elapses. The startup information includes a communication serial number. When the CPU 80a receives response information from the frame control board 82, the CPU 80a stores information (hereinafter referred to as a response reception flag) in the RAM 80c that can identify that response information to the startup information has been received.

[0145] The CPU 80a detects a frame board communication error when the number of times the startup information is transmitted reaches a specified number (for example, 10 times) and stores information that can identify the occurrence of the frame board communication error in the RAM 80c. In other words, the CPU 80a sets a frame board communication error. The CPU 80a then waits until the power is turned off. In this embodiment, the time tx (for example, 3 minutes) required for the frame control board 82 to detect a communication error within the managed gaming machine is longer than the time (for example, 1080 ms) required for the gaming control board 80 to detect a frame board communication error. The startup information is transmitted every predetermined time tc (for example, 108 ms), and a frame board communication error is detected when the number of times the startup information is transmitted reaches a specified number (for example, 10 times). Therefore, the time required for the gaming control board 80 to detect a frame board communication error is 1080 ms. After setting the frame board communication error, the CPU 80a cancels the frame board communication error setting when the power is turned on after being turned off.

[0146] When the CPU 80a receives response information to the startup information, it transmits game information to the frame control board 82 when a periodic time t3 (for example, 108 ms) has elapsed since the startup information was transmitted. Thereafter, the CPU 80a transmits game information to the frame control board 82 every time the periodic time t3 elapses. If no error has occurred in the pachinko gaming machine 10, the game information includes an error code (for example, P00) as information that can identify that no error has occurred in the pachinko gaming machine 10. On the other hand, if any type of error other than a frame board communication error has occurred in the pachinko gaming machine 10, the game information includes an error code as information that can identify the type of error that has occurred. The game information also includes fixed amount reaching information. The fixed amount reaching information is information that can identify whether or not the fixed amount reaching state, which will be described later, is in effect. The CPU 80a generates the fixed amount reaching information by referring to a fixed amount reaching flag, which will be described later. The game information includes a communication serial number. This communication serial number is updated depending on the number of times the game information is transmitted. The CPU 80a can receive response information every time it transmits gaming information. This response information includes the same communication serial number as the transmitted gaming information.

[0147] If the CPU 80a does not receive any response information even once while transmitting game information a specified number of times (for example, 10 times), it stores information in the RAM 80c that can identify the occurrence of a frame board communication error. In other words, the CPU 80a sets a frame board communication error. When the power is turned on after being turned off, the CPU 80a cancels the frame board communication error setting. In this way, the game control board 80 can detect an abnormality in communication with the frame control board 82 as a frame board communication error.

[0148] If a response reception flag is stored in the RAM 80c, the CPU 80a determines whether the backed-up information is normal. The CPU 80a determines whether a backup flag is stored in the RAM 80c. The CPU 80a calculates a checksum value in the RAM 80c and determines whether the calculated checksum value matches the checksum value calculated during the power-off process. The CPU 80a determines the information as normal if the backup flag is stored and the checksum values ​​match, but determines an abnormality if they do not. If the backed-up information is determined to be abnormal, the CPU 80a initializes the main information stored in the RAM 80c. At this time, the CPU 80a initializes the main information stored in the RAM 80c, thereby setting the main information stored in the RAM 80c to initial information. The CPU 80a that initializes the information stored in the RAM 80c is an example of an initialization unit. The CPU 80a transmits a control command (hereinafter referred to as an initialization command) to the performance control board 81, which can identify that various information has been initialized. Thereafter, the CPU 80a ends the board-side power-on process.

[0149] If the backed-up information is determined to be normal, the CPU 80a determines whether or not a RAM clear signal has been received from the frame control board 82 (RAM clear switch 87). If a RAM clear signal has been received, the CPU 80a initializes the main information stored in the RAM 80c. In this case, the CPU 80a sends an initialization command to the performance control board 81. On the other hand, if a RAM clear signal has not been received, the CPU 80a sends a control command (hereinafter referred to as a power restoration command) to the performance control board 81 that can specify that a recovery will be performed based on the backed-up main information. The CPU 80a then terminates the board-side power-on process.

[0150] When the CPU 80a completes the power-on process, it permits timer interrupt processing. That is, the CPU 80a is able to execute processing for progressing the game (hereinafter referred to as the normal game process). The normal game process is executed based on the initialized main information if the main information has been initialized. That is, the CPU 80a executes various processes included in the normal game process based on a state in which the first special reserve number and the second special reserve number are both zero, neither the first special game nor the second special game is being executed, no jackpot game has been awarded, and the fixed-amount-achievement flag is not set. If the main information has not been initialized, the normal game process is executed based on the backed-up main information. That is, if the first special reserve number and the second special reserve number are the reserved numbers at the time of power-off, and either the first special game or the second special game is being executed, the CPU 80a returns to processing for executing the special game; if a jackpot game is being awarded, the jackpot game is awarded; and if the fixed-amount-achievement flag is set, the CPU 80a returns to processing for achieving the fixed-amount-achievement state, which will be described later.

[0151] The CPU 80a executes a special symbol input process, a special symbol start process, and the like as timer interrupt processes that are performed every predetermined control period (for example, every 4 ms). The special symbol input process among the normal processes on the board side will be explained.

[0152] The CPU 80a determines whether a gaming ball has entered the first start hole 23A based on whether a detection signal has been received from the first start sensor D11. When a gaming ball has entered the first start hole 23A, the CPU 80a determines whether the first reserved number stored in the RAM 80c is less than the upper limit number (four in this embodiment). When the first reserved number is less than the upper limit number, the CPU 80a updates the first reserved number by adding one. Next, the CPU 80a controls the first reserved display unit 21c to display information that can identify the updated first reserved number. The reserved condition for the first special game is met when a gaming ball is detected by the first start sensor D11 when the first reserved number is less than the upper limit number.

[0153] Next, the CPU 80a acquires a random number generated by the random number generation circuit 80d and stores random number information based on the acquired random number in the RAM 80c. For example, the random number may be a winning random number used in the lottery for a winning special symbol, a winning symbol random number used to determine a winning symbol, and a variation pattern random number used to determine a variation pattern. The CPU 80a stores the random number information so that it is possible to identify that it is random number information for the first special game and the storage order of the random number information. The random number information may be the acquired random number itself, or it may be information obtained by processing the random number using a predetermined method. Thereafter, the CPU 80a transmits a command capable of identifying the first reserved number (hereinafter referred to as the first reserved number command) to the performance control board 81 (CPU 81a).

[0154] When the CPU 80a transmits the first reserved number command to the performance control board 81, if the gaming ball has not entered the first start opening 23A, and if the first reserved number is not less than the upper limit number, the CPU 80a determines whether the gaming ball has entered the second start opening 23B based on whether a detection signal has been received from the second start sensor D12. If the gaming ball has entered the second start opening 23B, the CPU 80a determines whether the second reserved number stored in the RAM 80c is less than the upper limit number (4 in this embodiment). If the second reserved number is less than the upper limit number, the CPU 80a updates the second reserved number by adding 1. The CPU 80a controls the second reserved display unit 21d to display information that can identify the second reserved number after the addition. The reserved condition for the second special game is met when the gaming ball is detected by the second start sensor D12 when the second reserved number is less than the upper limit number.

[0155] Next, the CPU 80a acquires a random number generated within the game control board 80 and stores random number information based on the acquired random number in the RAM 80c. The CPU 80a stores the random number information so that it is possible to identify that the random number information is used for the second special game and the storage order of the random number information. By storing the random number information used for the special game in the RAM 80c, the pachinko gaming machine 10 can suspend its execution until the start condition of the special game is met. Thereafter, the CPU 80a transmits a command (hereinafter referred to as the second reserved number command) capable of identifying the second reserved number to the effect control board 81 (CPU 81a). After transmitting the second reserved number command to the effect control board 81, if a game ball has not entered the second start hole 23B and if the second reserved number is not less than the upper limit number, the CPU 80a terminates the special symbol input process. In this manner, the pachinko gaming machine 10 can suspend the execution of the variable game.

[0156] The special symbol start process, which is one of the normal processes on the board side, will be explained. First, the CPU 80a determines whether the conditions for starting a special game are met. The CPU 80a determines the answer as positive if neither a jackpot game nor a special game is being played, and determines the answer as negative if a jackpot game or a special game is being played. If the conditions for starting a special game are not met, the CPU 80a terminates the special symbol start process. If the conditions for starting a special game are met, the CPU 80a determines whether the second reserved number is greater than zero. If the second reserved number is zero, the CPU 80a determines whether the first reserved number is greater than zero. If the first reserved number is zero, the CPU 80a terminates the special symbol start process.

[0157] If the first reserved number is greater than zero, the CPU 80a performs processing to execute a first special game. Specifically, the CPU 80a updates the first reserved number by subtracting 1. The CPU 80a controls the first reserved display unit 21c to display information that can identify the first reserved number after subtraction. The CPU 80a acquires the random number information for the first special game that was stored first from the RAM 80c. The CPU 80a uses the winning random number identified from the acquired random number information to perform a jackpot lottery (jackpot determination) to determine whether or not a jackpot will be won as a special symbol winning lottery. The CPU 80a performs a jackpot lottery with a jackpot probability that corresponds to the current probability state (whether or not the special symbol winning function is activated).

[0158] When a jackpot is won, the CPU 80a performs jackpot variation processing. In the jackpot variation processing, the CPU 80a performs a lottery for a jackpot pattern using a winning pattern random number that can be identified from the random number information, and determines the jackpot pattern to be stopped and displayed in the first special game. The CPU 80a performs a lottery for determining a variation pattern using a variation pattern random number that can be identified from the random number information, and determines a variation pattern from among multiple jackpot variation patterns. After that, the CPU 80a ends the special pattern start processing.

[0159] If the jackpot is not won, the CPU 80a performs a loss variation process. In the loss variation process, the CPU 80a determines a loss symbol to be stopped and displayed in the first special game. The CPU 80a performs a variation pattern determination lottery using a variation pattern random number that can be identified from the random number information, and determines a variation pattern from among multiple loss variation patterns. After that, the CPU 80a ends the special symbol start process.

[0160] If the second reserved number is greater than zero, the CPU 80a performs processing to execute a second special game. The processing to execute the second special game is the processing to execute the first special game, with "first special game" replaced with "second special game" and "first reserved number" replaced with "second reserved number," so a detailed explanation will be omitted. In other words, the CPU 80a performs subtraction of the second reserved number, a jackpot lottery, and any variation processing based on the result of the jackpot lottery, and then ends the special symbol start processing.

[0161] The CPU 80a transmits a variation start command and a special symbol command to the performance control board 81 in the jackpot variation process and the loss variation process. The variation start command is a control command that can specify the variation pattern determined in each variation process and the start of the variation game. The special symbol command is a control command that can specify the special symbol determined in each variation process. The variation start command and the special symbol command are control commands that differ when the variation process of the first special game is executed and when the variation process of the second special game is executed.

[0162] When the special symbol start process is completed, the CPU 80a executes a first special game or a second special game through a process separate from the special symbol start process. As an example, when the CPU 80a executes the first special game, it controls the first special symbol display unit 21a to start varying display of predetermined symbols. The CPU 80a measures the variation time set in the variation pattern. When the variation time set in the variation pattern has elapsed, the CPU 80a controls the first special symbol display unit 21a to statically display the special symbol determined in the special symbol start process. Furthermore, when the variation time set in the variation pattern has elapsed, the CPU 80a transmits a control command (hereinafter referred to as a variation end command) capable of specifying the end of the variation game to the performance control board 81.

[0163] As an example, when the CPU 80a executes a second special game, it controls the second special symbol display unit 21b to start varying display of a predetermined symbol. The CPU 80a measures the variation time set in the variation pattern. When the variation time set in the variation pattern has elapsed, the CPU 80a controls the second special symbol display unit 21b to stop displaying the special symbol determined in the special symbol start process. Furthermore, when the variation time set in the variation pattern has elapsed, the CPU 80a transmits a variation end command to the performance control board 81. As described above, the pachinko gaming machine 10 is configured so that, by the CPU 80a executing the special symbol input process and the special symbol start process, a winning lottery is held when a gaming ball enters the start hole, and a symbol variation game can be executed based on the result of the winning lottery.

[0164] The jackpot game processing, which is one of the normal processing on the board side, will be explained. The jackpot game processing is a processing for awarding a jackpot game. When the CPU 80a stops and displays a jackpot symbol in a special game, the CPU 80a executes the jackpot game processing after the end of the jackpot special game. The CPU 80a specifies the type of jackpot game based on the jackpot symbol (type of jackpot) determined in the special symbol start processing. The CPU 80a is configured to award the specified type of jackpot game.

[0165] First, the CPU 80a transmits a control command (hereinafter referred to as an "opening command") capable of specifying the start of an opening time to the effect control board 81. After the opening time has elapsed, the CPU 80a performs processing to execute a round of play. As an example, the CPU 80a controls the special solenoid SL2 using the specified opening control data for a jackpot game to open the special prize opening 23C. When the number of game balls detected by the count sensor D13 reaches the upper limit or the upper limit time has elapsed, the CPU 80a controls the special solenoid SL2 to close the special prize opening 23C, thereby ending the round of play. The CPU 80a repeatedly performs this processing to execute a round of play until the upper limit number of rounds set for the jackpot game has been completed. Each time a round of play is started, the CPU 80a transmits a control command (hereinafter referred to as a "round command") capable of specifying the start of a round of play to the effect control board 81. When the final round of play ends, the CPU 80a transmits a control command capable of specifying the start of the ending time (hereinafter referred to as an ending start command) to the performance control board 81. When the ending time has elapsed, the CPU 80a ends the jackpot game. The CPU 80a may transmit a control command capable of specifying the elapse of the ending time (hereinafter referred to as an ending end command) to the performance control board 81.

[0166] The state transition process among the normal processes on the panel side will now be described. When the CPU 80a completes a jackpot game based on the first jackpot symbol among the jackpot symbols, it sets a high probability flag in the RAM 80c. In other words, the CPU 80a controls the game to a high probability state. After the jackpot game based on the first jackpot symbol ends, the CPU 80a does not clear the probability flag until the next jackpot game is awarded. On the other hand, when the CPU 80a completes a jackpot game based on a second jackpot symbol different from the first jackpot symbol, it does not set the high probability flag in the RAM 80c. In other words, the CPU 80a controls the game to a low probability state. When the CPU 80a starts a jackpot game and the high probability flag is set, it clears the high probability flag. In other words, the CPU 80a controls the game to a low probability state during a jackpot game.

[0167] The CPU 80a sets an activation flag in the RAM 80c when a jackpot game based on the first or second jackpot symbol ends. In other words, the CPU 80a controls the system to a high ball entry rate state. After a jackpot game based on the second jackpot symbol ends, the CPU 80a counts the number of special games executed after the jackpot game ends by updating the value of the execution counter stored in the RAM 80c each time a special game is started. When a special game ends in which the number of special games executed after the jackpot game reaches the activation count, the CPU 80a erases the activation flag stored in the RAM 80c. In other words, the CPU 80a controls the system to a low ball entry rate state when the activation number of special games ends after a jackpot game based on the second jackpot symbol ends. The CPU 80a does not erase the activation flag until the next jackpot game is awarded after a jackpot game based on the first jackpot symbol ends. When the CPU 80a starts a jackpot game and the activation flag is set, the CPU 80a clears the activation flag. That is, the CPU 80a controls the jackpot game to a low ball entry rate state.

[0168] The board-side error setting process, which is part of the board-side normal process, will now be described. As shown in Figure 13, the board-side error setting process is a process for setting an error. As an example, in the board-side error setting process, errors that the game control board 80 (CPU 80a) can set include at least an unauthorized radio wave detection error and a main line disconnection error, in addition to the frame board communication error described above. Furthermore, the board-side error notification process is a process for notifying an error in a predetermined notification mode when an error is detected in the board-side error setting process. The processing contents of the board-side error setting process and the board-side error notification process will be explained in detail later.

[0169] The various processes executed by the performance control board 81 (CPU 81a) will be explained. The power restoration process will now be described. Upon receiving the initialization command, the CPU 81a controls some or all of the notification means constituting the notification device ES to execute a RAM clear notification (initialization notification). For example, the RAM clear notification is executed by outputting a sound from the notification audio unit 12 that can identify the execution of a RAM clear, such as a human voice reading the string "RAM clear." For example, the RAM clear notification is executed by causing the notification light-emitting unit 14 to emit light in a light-emitting pattern dedicated to RAM clearing. For example, the RAM clear notification is executed by displaying an initialization image SG (shown in FIG. 14(c)) that can identify the execution of a RAM clear, such as the string "RAM clear," on the notification display unit 19. The CPU 81a controls the notification device ES to terminate the RAM clear notification after a predetermined time has elapsed since the start of the RAM clear notification. Furthermore, upon receiving the initialization command, the CPU 81a controls the notification display unit 19 to display a predetermined background image HK and a combination of predetermined effect symbols.

[0170] Upon receiving a power restoration command, the CPU 81a controls some or all of the notification means constituting the notification device ES to execute a power restoration notification. For example, the power restoration notification is executed by outputting a sound from the notification audio unit 12 that can identify the power restoration, such as a human voice reading the string "Power restoration in progress." For example, the power restoration notification is executed by causing the notification light-emitting unit 14 to emit light in a light-emitting pattern dedicated to power restoration. For example, the power restoration notification is executed by displaying a power restoration image FG (shown in FIG. 15(c)) that can identify the power restoration, such as the string "Power restoration in progress," on the notification display unit 19. The CPU 81a controls the notification device ES to terminate the power restoration notification after a predetermined time has elapsed since the start of the power restoration notification. Alternatively, the CPU 81a may be configured not to execute the power restoration notification. Furthermore, upon receiving a power restoration command, the CPU 81a controls the notification display unit 19 to display a predetermined background image HK and a combination of effect symbols different from the predetermined combination of effect symbols.

[0171] The big win effect processing will be explained. The jackpot effect processing is a process for executing an effect during a jackpot game (hereinafter referred to as a jackpot effect). When the CPU 81a receives an opening command, it controls the notification device ES to execute an opening effect. When the CPU 81a receives a round command, it controls the notification device ES to execute a round effect. When the CPU 81a receives an ending start command, it controls the notification device ES to execute an ending effect. When the CPU 81a receives an ending end command, it controls the notification device ES to end the ending effect.

[0172] The effect game processing will now be described. The effect game processing is a process for executing an effect game as one of the display effects related to a special game during execution of the special game. When the CPU 81a receives a first reserved number command, it controls the notification display unit 19 to display the reserved image HG based on the first reserved number command. When the CPU 81a receives a second reserved number command, it controls the notification display unit 19 to display the reserved image HG based on the second reserved number command. When the CPU 81a receives a variation start command and a special symbol command, it controls the notification device ES including the notification display unit 19 to execute an effect game. Specifically, when the CPU 81a receives a variation start command, it selects an effect pattern (effect content) for the effect game based on a variation pattern that can be identified from the command. Furthermore, when the CPU 81a receives a special symbol command, it determines a symbol combination to be stopped and displayed in the effect game based on the special symbol that can be identified from the command. When a jackpot symbol can be identified from the special symbol command, the CPU 81a determines a jackpot symbol combination. When a losing symbol can be specified from the special symbol command, the CPU 81a determines a losing symbol combination. When a reach effect is executed, the CPU 81a determines a losing symbol combination including reach.

[0173] The CPU 81a controls the notification display unit 19 to start the variable display of the effect symbols in each symbol row upon receiving the variation start command. That is, the CPU 81a starts the effect game. Furthermore, when the CPU 81a executes a predetermined effect in connection with the effect game, it controls the notification device ES including the notification display unit 19 to execute the effect. After starting the effect game, the CPU 81a temporarily displays the symbol combination when a predetermined timing arrives, and upon receiving the variation end command, it displays the symbol combination as fixed. Note that the CPU 81a may also display the fixed symbol combination as fixed upon the passage of a variation time set for the variation pattern, regardless of the variation end command. In this case, the variation end command may be omitted.

[0174] Next, various processes that the CPU 82a of the frame control board 82 performs by receiving signals from various sensors and switches will be described. The supplied ball count monitoring process, which is part of the normal frame side processing, will be explained.

[0175] The CPU 82a increments the number of supply inlet balls when it detects, based on the supply inlet signal transmitted by the supply inlet sensor D22, that one gaming ball has been received by the supply unit 61. As an example, when the supply inlet signal transitions from OFF state → ON state → OFF state, the CPU 82a detects that one gaming ball has been received by the supply unit 61. When the CPU 82a detects that one gaming ball has been received by the supply unit 61, it increments the number of supply inlet balls by 1 and stores the result in the RAM 82c.

[0176] The CPU 82a increments the number of supply outlet balls when it detects that one gaming ball has been discharged from the supply unit 61 based on the supply outlet signal transmitted by the supply outlet sensor D23. As an example, when the supply outlet signal transitions from OFF state → ON state → OFF state, the CPU 82a detects that one gaming ball has been discharged from the supply unit 61. When the CPU 82a detects that one gaming ball has been discharged from the supply unit 61, it increments the number of supply outlet balls by 1 and stores the result in the RAM 82c.

[0177] The winning ball count monitoring process, which is part of the normal frame-side processing, will be explained. The CPU 82a increments the number of shots Pf when it detects that one gaming ball has been supplied to the launch unit 65 based on the supply outlet signal transmitted by the supply outlet sensor D23. As an example, the CPU 82a detects that one gaming ball has been supplied when the supply outlet signal transitions from OFF state → ON state → OFF state. The CPU 82a stores information capable of identifying the updated number of shots Pf in the RAM 82c. This allows the CPU 82a to identify the number of gaming balls shot toward the gaming area 20a in response to detection by the supply outlet sensor D23.

[0178] Without being limited to this, the CPU 82a may be configured to increment the number of shots Pf when it detects that one gaming ball has been supplied to the launching unit 65 based on the supply inlet signal transmitted by the supply inlet sensor D22 instead of the supply outlet signal transmitted by the supply outlet sensor D23. The CPU 82a may be configured to increment the number of shots Pf when it detects that one gaming ball has been supplied to the launching unit 65 based on both the supply inlet signal transmitted by the supply inlet sensor D22 and the supply outlet signal transmitted by the supply outlet sensor D23. In other words, the CPU 82a may increment the number of shots Pf in response to detection by at least one of the supply inlet sensor D22 and the supply outlet sensor D23.

[0179] Furthermore, the CPU 82a may increment the number of shots Pf by driving the shot solenoid 66a, or may be configured to increment the number of shots Pf when a sensor is provided in the shooting passage 20c and the sensor detects a gaming ball shot from the shot unit 65. In this way, the number of shots Pf is incremented in relation to at least one of the shooting operation by the shot unit 65 and the supply operation by the supply unit 61. In other words, the CPU 82a increments the number of shots Pf in response to the shot of a gaming ball.

[0180] When the CPU 82a detects that one gaming ball has been collected from the gaming area 20a based on the out signal transmitted by the out sensor D30, the CPU 82a increments the number of collected balls Pg. As an example, the CPU 82a detects that one gaming ball has been collected from the gaming area 20a when the out signal transitions from the off state to the on state to the off state. In this way, the CPU 82a increments the number of collected balls Pg in response to the detection by the out sensor D30. The CPU 82a stores information capable of identifying the updated number of collected balls Pg in the RAM 82c.

[0181] Not limited to this, the configuration may be such that, instead of the out signal transmitted by the out sensor D30, the number of recovered balls Pg is incremented when it is detected that one game ball has been recovered from the game area 20a based on the winning passage signal transmitted by the winning passage count sensor D25 and the non-winning passage signal transmitted by the non-winning passage count sensor D26.

[0182] The CPU 82a increments the retrieved number Pg when it detects that one gaming ball has been retrieved as a returned ball based on the foul signal transmitted by the foul sensor D21. As an example, the CPU 82a detects that one gaming ball has been retrieved as a returned ball when the foul signal transitions from an OFF state to an ON state to an OFF state. In this way, the CPU 82a increments the retrieved number Pg in response to detection by the foul sensor D21. The CPU 82a stores information capable of identifying the updated retrieved number Pg in the RAM 82c. This allows the CPU 82a to identify the number of gaming balls launched toward the gaming area 20a in response to detection by the out sensor D30 and the foul sensor D21.

[0183] The following describes errors that can be detected by the frame control board 82 (CPU 82a). The frame control board 82 (CPU 82a) can detect and set various errors by executing a frame-side error setting process.

[0184] The detection condition for a managed gaming machine communication error is that communication between the frame control board 82 and the gaming control board 80 is not performed normally. The CPU 82a can detect a managed gaming machine communication error in the communication check process described above. If the CPU 82a does not receive startup information within the time tx (for example, 3 minutes) since the machine was started up by powering it on, it determines that communication with the gaming control board 80 is not performed normally. Specifically, after starting up by powering it on, the CPU 82a measures the time since startup until it receives the startup information. When the CPU 82a receives the startup information, it stops measuring the time since startup. When the time since startup reaches a predetermined time tx, the CPU 82a sets a managed gaming machine communication error.

[0185] Furthermore, if the CPU 82a does not receive the next information (for example, gaming information) within a predetermined time ty (for example, 1000 ms) after receiving the startup information or gaming information from the gaming control board 80, it determines that communication with the gaming control board 80 is not normal. Specifically, after receiving the startup information or gaming information, the CPU 82a measures the reception time from the reception of the startup information or gaming information until the reception of the next information. When the CPU 82a receives the next information, it stops measuring the reception time. When the reception time reaches the predetermined time ty, the CPU 82a sets a communication error within the managed gaming machine.

[0186] The release condition for the managed gaming machine communication error is normal communication. When the CPU 82a receives the startup information, it releases the managed gaming machine communication error setting. In other words, the managed gaming machine communication error setting is released when the cause of the managed gaming machine communication error setting is resolved. The managed gaming machine communication error is detected during the ball removal state, in which game balls sealed inside the pachinko gaming machine 10 can be discharged outside the machine by operating the ball removal switch 82e, and also during times other than the ball removal state, as confirmation intervals. As an example, the managed gaming machine communication error is constantly detected from the time the power is turned on until the power is turned off.

[0187] As described above, the CPU 82a sets a managed gaming machine communication error based on the failure to receive startup information or game information from the gaming control board 80. Here, a situation in which startup information or game information is not received from the gaming control board 80 may be, for example, a disconnection of the communication line connecting the frame control board 82 and the gaming control board 80. In this case, it is particularly likely that the communication line through which the frame control board 82 receives information from the gaming control board 80 is disconnected. Additionally, if the communication line through which the frame control board 82 transmits information to the gaming control board 80 is disconnected, the gaming control board 80 sets a frame board communication error and stops transmitting game information. As a result, the CPU 82a is unable to receive game information and sets a managed gaming machine communication error. In this way, a managed gaming machine communication error is set even if the communication line through which the frame control board 82 transmits information to the gaming control board 80 is disconnected.

[0188] The condition for detecting a supply mechanism error is that the difference between the number of game balls detected by the supply inlet sensor D22 and the number of game balls detected by the supply outlet sensor D23 exceeds a predetermined number (e.g., 50). The CPU 82a sets a supply mechanism error when the difference between the number of game balls detected by the supply inlet sensor D22 and the number of game balls detected by the supply outlet sensor D23 reaches the predetermined number. In other words, the CPU 82a sets a supply mechanism error when the difference between the number of game balls detected by the supply inlet sensor D22 and the number of game balls detected by the supply outlet sensor D23 exceeds the predetermined number. More specifically, the CPU 82a sets a supply mechanism error when the number of game balls detected by the supply inlet sensor D22 exceeds the number of game balls detected by the supply outlet sensor D23 by a predetermined constant or more. The CPU 82a also sets a supply mechanism error when the number of game balls detected by the supply inlet sensor D22 falls short of the number of game balls detected by the supply outlet by a predetermined number or more. After setting a supply mechanism error, the CPU 82a sends a supply mechanism error setting command, which is control information that can identify the occurrence of a supply mechanism error, to the game control board 80.

[0189] The supply mechanism error is released when the error release switch 82f is pressed for a predetermined time td (for example, two seconds). The CPU 82a releases the supply mechanism error setting when the predetermined time td has elapsed while the error release signal remains on. When releasing the supply mechanism error setting, the CPU 82a initializes the number of supply inlet balls and the number of supply outlet balls stored in the RAM 82c. In this way, the supply mechanism error setting can be released based on the operation of the error release switch 82f without cutting off the power supply. The supply mechanism error setting is then released when the predetermined time td has elapsed while the error release switch 82f remains operated. After releasing the supply mechanism error setting, the CPU 82a sends a supply mechanism error release command, which is control information that can identify the resolution of the supply mechanism error, to the game control board 80.

[0190] A supply mechanism error is detected as a confirmation interval after the CPU 82a receives startup information. The number of balls at the supply inlet and the number of balls at the supply outlet are not updated until the CPU 82a receives startup information. In other words, in the supply ball count monitoring process, the CPU 82a does not count the number of detections by the supply inlet sensor D22 and the number of detections by the supply outlet sensor D23 after power supply starts until it receives startup information. Therefore, a supply mechanism error is not detected until it receives startup information after power supply starts. The supply ball count monitoring process is a process for detecting supply mechanism errors, and is therefore one of the frame side error setting processes.

[0191] The detection condition for a frame open wire error is that an abnormality such as a broken wire has been detected in a switch or sensor connected to the frame control board 82. The CPU 82a sets a frame open wire error when it detects that no power is being applied to any of the sensors and switches. In other words, the CPU 82a sets a frame open wire error when there is an abnormality in communication with a switch or sensor connected to the frame control board 82. When the CPU 82a sets a frame open wire error, it sends a frame open wire error setting command, which is control information that can identify the occurrence of a frame open wire error, to the game control board 80. In this way, the CPU 82a can detect an abnormality in communication with a switch or sensor connected to the frame control board 82 as a frame open wire error.

[0192] The condition for canceling the frame open wire error is that an abnormality such as a broken wire in a switch or sensor connected to the frame control board 82 has been resolved. When the CPU 82a detects that each sensor and each switch is energized, it cancels the frame open wire error setting. When the CPU 82a cancels the frame open wire error setting, it sends a frame open wire error cancellation command, which is control information that can identify the elimination of the frame open wire error, to the game control board 80. The frame open wire error is detected in a confirmation period other than during the ball removal state.

[0193] The detection condition for the game ball count clear error is that power supply is started while the game ball clear switch 82g is operated in a predetermined manner. The CPU 82a sets a game ball count clear error if the game ball clear signal is in the ON state when power supply is started. In other words, the CPU 82a sets a game ball count clear error when the second managed ball count information (second managed ball count PB) is initialized. When the CPU 82a sets a game ball count clear error, it sends a game ball count clear error setting command to the game control board 80, which is control information that can identify the occurrence of a game ball count clear error.

[0194] The condition for canceling the game ball count clear error is that a specific time (e.g., 30 seconds) has elapsed since the supply outlet sensor D23, the foul sensor D21, or the out sensor D30 detected a game ball. When the CPU 82a receives a supply outlet signal from the supply outlet sensor D23, a foul signal from the foul sensor D21, or an out signal from the out sensor D30, it begins measuring the time to cancel the error. The CPU 82a cancels the setting of the game ball count clear error when the time to cancel the error exceeds the specific time. As described above, when a game ball is detected by the supply outlet sensor D23, the foul sensor D21, or the out sensor D30, it can be determined that the game ball has been launched toward the game area 20a. In this way, the CPU 82a cancels the setting of the game ball count clear error when a specific time has elapsed since determining that the game ball was launched. When the CPU 82a cancels the setting of the game ball count clear error, it transmits a game ball count clear error cancel command, which is control information that can identify the elimination of the game ball count clear error, to the game control board 80. The game ball count clear error is detected in a confirmation period other than the ball removal state.

[0195] The winning ball count abnormality error is detected when the difference between the number of game balls detected by the supply outlet sensor D23 and the number of game balls detected by the foul sensor D21 and the out sensor D30 exceeds a specific number (100, for example). The CPU 82a sets a winning ball count abnormality error when the difference between the number of shots Pf and the number of collected balls Pg reaches a specific number. In other words, the CPU 82a sets a winning ball count abnormality error when the difference between the number of game balls shot toward the game area 20a and the number of game balls collected by the winning receptacle 30a, non-winning receptacle 30b, and foul receptacle 30c exceeds a specific number. After setting the winning ball count abnormality error, the CPU 82a may or may not update the number of shots Pf and the number of collected balls Pg in the winning ball count monitoring process.

[0196] More specifically, the CPU 82a sets a winning ball count abnormality error when the number of shots Pf exceeds the number of collected balls Pg by a specific number or more. In other words, the CPU 82a sets a winning ball count abnormality error when the number of game balls shot toward the play area 20a exceeds the number of game balls collected by the winning opening 30a, the non-winning opening 30b, and the foul opening 30c by a specific number or more. The CPU 82a also sets a winning ball count abnormality error when the number of shots Pf falls below the number of collected balls Pg by a specific number or more. In other words, the CPU 82a sets a winning ball count abnormality error when the number of game balls shot toward the play area 20a falls below the number of game balls collected by the winning opening 30a, the non-winning opening 30b, and the foul opening 30c by a specific number or more. When the CPU 82a sets the winning ball count abnormal error, it transmits to the game control board 80 a winning ball count abnormal error setting command, which is control information that can identify the occurrence of the winning ball count abnormal error.

[0197] The winning ball count abnormality error is released when the power is restored. The winning ball count abnormality error setting is released when the power is turned off and then on again, and there is no way to release it other than restoring the power. For example, the winning ball count abnormality error setting is not released even if the error release switch 82f is pressed. For example, the winning ball count abnormality error setting is not released even if the difference between the number of balls fired Pf and the number of balls collected Pg falls below a specific number. More specifically, the winning ball count abnormality error setting is not released even if the difference between the number of game balls fired toward the game area 20a and the number of game balls collected by the winning ball receiving opening 30a, non-winning ball receiving opening 30b, and foul ball receiving opening 30c falls below a specific number. The winning ball count abnormality error is detected in confirmation periods other than the ball removal state.

[0198] When the power is turned on after being turned off, the CPU 82a cancels the setting of the winning ball count abnormal error. The CPU 82a may cancel the setting of the winning ball count abnormal error when the power is turned off, or may cancel the setting of the winning ball count abnormal error when the power is turned on. In other words, the CPU 82a cancels the setting of the winning ball count abnormal error when the power supply is stopped or started.

[0199] The detection condition for the door open error is the detection of either the first door open switch D17 or the second door open switch D18 being in an off state. The CPU 82a sets the door open error when the detection condition is met. When the CPU 82a sets the door open error, it sends a door open error setting command, which is control information that can identify the occurrence of a door open error, to the game control board 80. The release condition for the door open error is the detection of both the first door open switch D17 and the second door open switch D18 being in an on state. When the CPU 82a detects that both the first door open switch D17 and the second door open switch D18 are in an on state, it releases the door open error setting. When the CPU 82a releases the door open error setting, it sends a door open error release command, which is control information that can identify the resolution of the door open error, to the game control board 80. The door open error is detected in a confirmation zone other than during the ball removal state.

[0200] In addition, when a managed gaming machine communication error is set, communication between the frame control board 82 and the gaming control board 80 is not performed normally, and therefore a command serving as control information capable of identifying the occurrence of a managed gaming machine communication error is not sent to the gaming control board 80. When a managed gaming machine communication error is set, the CPU 82a may send a managed gaming machine communication error setting command, which is control information capable of identifying the occurrence of a managed gaming machine communication error, to the gaming control board 80. In this case, if the communication line through which the frame control board 82 transmits information to the gaming control board 80 is broken, the gaming control board 80 cannot receive the managed gaming machine communication error setting command.

[0201] In the following explanation, the commands that the frame control board 82 (CPU 82a) sends to the game control board 80 when it sets an error or when it cancels the error setting are collectively referred to as "frame error commands." Of the frame error commands, control commands that can identify that an error has been set are collectively referred to as "frame error setting commands." Of the frame error commands, control commands that can identify that the error setting has been resolved are collectively referred to as "frame error release commands." The frame error setting commands are also control commands that can identify the type of error that has been set. The frame error release commands are also control commands that can identify the type of error that has been cancelled. The CPU 82a sends the frame error setting commands and frame error release commands to the game control board 80 depending on the type of error.

[0202] When the game control board 80 (CPU 80a) receives the frame error setting command, it updates information that can identify the error being set on the frame control board 82 (hereinafter referred to as frame side error information) based on the received frame error setting command and stores it in RAM 80c. When the CPU 80a receives the frame error reset command, it updates the frame side error information based on the received frame error reset command and stores it in RAM 80c. This allows the CPU 80a to identify the error being set on the frame control board 82. The CPU 80a transmits the received frame error setting command and frame error reset command to the performance control board 81.

[0203] When the effect control board 81 (CPU 81a) receives the frame error setting command, it updates information (hereinafter referred to as error information) that can identify an error being set in the pachinko gaming machine 10 based on the received frame error setting command and stores it in the RAM 81c. When the CPU 81a receives the frame error reset command, it updates the error information based on the received frame error reset command and stores it in the RAM 81c. This allows the CPU 81a to identify an error being set in the pachinko gaming machine 10.

[0204] The following describes errors that can be detected by the game control board 80 (CPU 80a). The game control board 80 (CPU 80a) can detect and set various errors by executing a board-side error setting process.

[0205] The detection condition for an unauthorized radio wave detection error is that abnormal radio waves have been detected a predetermined number of times (for example, 10 times). The CPU 80a detects the occurrence of abnormal radio waves as an unauthorized radio wave detection error. When the CPU 80a receives a radio wave detection signal from the radio wave sensor D19, it increments the number of radio wave detections. Specifically, when the radio wave detection signal transitions from an off state to an on state, the CPU 80a increments the number of radio wave detections by 1. In other words, the CPU 80a counts the number of detections by the radio wave sensor D19 as the number of radio wave detections. The CPU 80a stores information capable of identifying the updated number of radio wave detections in the RAM 82c. The CPU 80a sets an unauthorized radio wave detection error when the number of radio wave detections reaches a predetermined number. This predetermined number is not limited to 10 times. It may be any number between 2 and 9 times, or may be 11 or more times. It is preferable that the predetermined number is multiple times rather than once. In other words, an unauthorized radio wave detection error is set when the number of detections by the radio wave sensor D19 reaches a predetermined number of times. In this way, the CPU 80a updates the number of radio wave detections based on the reception status of the radio wave detection signal transmitted by the radio wave sensor D19, and sets an unauthorized radio wave detection error based on the number of radio wave detections. When the CPU 80a sets an unauthorized radio wave detection error, it transmits an unauthorized radio wave detection error setting command, which is control information that can identify the occurrence of an unauthorized radio wave detection error, to the performance control board 81 and the frame control board 82.

[0206] An unauthorized radio wave detection error is a state in which there is a high possibility that fraud (cheating) using radio waves is taking place. The unauthorized radio wave detection error can be canceled when the power is restored. The unauthorized radio wave detection error setting is canceled when the power is turned off and then on again, and there is no way to cancel it other than by restoring the power. For example, the unauthorized radio wave detection error setting will not be canceled even if the radio wave sensor D19 no longer detects anything. In other words, the unauthorized radio wave detection error setting will not be canceled even if the cause that caused the unauthorized radio wave detection error to be set is resolved.

[0207] When the power is turned on after being turned off, the CPU 80a cancels the unauthorized radio wave detection error setting. The CPU 80a may cancel the unauthorized radio wave detection error setting when the power is turned off, or may cancel the unauthorized radio wave detection error setting when the power is turned on. In other words, the CPU 80a cancels the unauthorized radio wave detection error setting when the power supply is stopped or started. When canceling the unauthorized radio wave detection error setting, the CPU 80a initializes the number of radio wave detections stored in the RAM 80c. The CPU 80a may initialize the number of radio wave detections when the power is turned off, or may initialize the number of radio wave detections when the power is turned on. In this way, the CPU 80a does not cancel the unauthorized radio wave detection error setting until the power supply is stopped. Furthermore, the CPU 80a does not initialize the number of radio wave detections until the power supply is stopped. Note that if abnormal radio waves are detected again a predetermined number of times after the power is turned on, the unauthorized radio wave detection error is set even after the power is turned on. The unauthorized radio wave detection error is detected in a confirmation period other than during the bulb removal state.

[0208] The detection condition for a frame board communication error is that communication between the frame control board 82 and the game control board 80 is not performed normally. As described above, the CPU 80a determines that communication with the frame control board 82 is not performed normally when the number of times startup information is transmitted reaches a specified number (for example, 10 times). Specifically, after starting up by turning on the power, the CPU 80a transmits startup information until it receives response information from the frame control board 82. The CPU 80a counts the number of times startup information is transmitted. When the CPU 80a receives response information to the startup information, it initializes the number of transmissions. When the number of transmissions reaches the specified number, the CPU 80a sets a frame board communication error.

[0209] Furthermore, if the CPU 80a does not receive any response information while transmitting game information a specified number of times (for example, 10 times), it determines that communication with the frame control board 82 is not normal. Specifically, after receiving response information to the startup information, the CPU 80a transmits game information every time period t3 (for example, 108 ms) has elapsed. The CPU 80a counts the number of times game information is transmitted each time game information is transmitted. When the CPU 80a receives response information to game information, it initializes the number of transmissions. When the number of transmissions reaches the specified number, the CPU 80a sets a frame board communication error. When the CPU 80a sets a frame board communication error, it transmits a frame board communication error setting command, which is control information that can identify the occurrence of a frame board communication error, to the performance control board 81.

[0210] The condition for canceling a frame board communication error is power recovery. The frame board communication error setting is canceled when the power is turned off and then turned on again, and there is no way to cancel it other than by power recovery. For example, the frame board communication error setting is not canceled even if response information is received. In other words, the frame board communication error setting is not canceled even if the cause of the frame board communication error setting is resolved.

[0211] When the power is turned on after being turned off, the CPU 80a cancels the frame board communication error setting. The CPU 80a may cancel the frame board communication error setting when the power is turned off. When canceling the frame board communication error setting, the CPU 80a initializes the number of transmissions stored in the RAM 80c. The CPU 80a may initialize the number of transmissions when the power is turned off. The frame board communication error is detected as a confirmation interval both during the ball removal state and when not during the ball removal state. As an example, the frame board communication error is constantly detected from the time the power is turned on until the power is turned off.

[0212] As described above, the CPU 80a sets a frame board communication error based on not receiving response information from the frame control board 82. As a result, a frame board communication error is set when communication between the frame control board 82 and the game control board 80 is not performed normally. Here, a situation in which communication between the frame control board 82 and the game control board 80 is not performed normally may be, for example, when the communication line connecting the frame control board 82 and the game control board 80 is broken. In this case, it is particularly likely that the communication line through which the game control board 80 receives information from the frame control board 82 is broken. Additionally, if the communication line through which the game control board 80 transmits information to the frame control board 82 is broken, the frame control board 82 will not receive startup information and game information and will not transmit response information to the game control board 80. In other words, even if the combination of the frame side matching code and the board side matching code is a predetermined combination, if the communication line connecting the game control board 80 and the frame control board 82 is broken, the CPU 80a will not be able to receive the response information and will set a frame board communication error.

[0213] Furthermore, even if the communication line connecting the frame control board 82 and the game control board 80 is not broken, if the frame side verification code and the board side verification code do not match in the verification process performed by the frame control board 82 as described above, the frame control board 82 will not transmit response information to the received startup information to the game control board 80 after performing the verification process. In other words, if the combination of the frame side verification code and the board side verification code is not a predetermined combination, the frame control board 82 will not transmit response information to the startup information to the game control board 80. In this case as well, the CPU 80a will not be able to receive the response information and will set a frame board communication error.

[0214] Thus, in this embodiment, a frame board communication error occurs when communication between the frame control board 82 and the game control board 80 is not possible. Situations in which communication between the frame control board 82 and the game control board 80 is not possible include situations in which the combination of the frame side verification code and the board side verification code is not a predetermined combination.

[0215] The detection condition for a main disconnection error is that an abnormality such as a disconnection has been detected in a sensor connected to the game control board 80. The CPU 80a sets a main disconnection error when it detects that no power is being applied to any sensor. In other words, the CPU 80a sets a main disconnection error when there is an abnormality in communication with a sensor connected to the game control board 80. When the CPU 80a sets a main disconnection error, it sends a main disconnection error setting command, which is control information that can identify the occurrence of a main disconnection error, to the performance control board 81 and the frame control board 82. In this way, the CPU 80a can detect an abnormality in communication with a sensor connected to the game control board 80 as a main disconnection error.

[0216] The condition for canceling the main wire disconnection error is that an abnormality such as a disconnection in a sensor connected to the game control board 80 has been resolved. When the CPU 80a detects that each sensor is powered, it cancels the main wire disconnection error setting. When the CPU 80a cancels the main wire disconnection error setting, it sends a main wire disconnection error cancellation command, which is control information that can identify the elimination of the main wire disconnection error, to the performance control board 81 and the frame control board 82. The main wire disconnection error is detected in a confirmation period other than during the ball removal state.

[0217] In this way, the CPU 80a functions as a detection means for detecting the occurrence of an unauthorized radio wave detection error, a frame board communication error, and a main line disconnection error in the pachinko gaming machine 10. In the following description, the commands sent by the gaming control board 80 (CPU 80a) to the performance control board 81 and the gaming control board 80 when an error is set or when an error setting is canceled are collectively referred to as "board error commands." Among the board error commands, control commands that can identify that an error setting has been made are collectively referred to as "board error setting commands." Among the board error commands, control commands that can identify that the error setting has been canceled are collectively referred to as "board error cancellation commands." The board error setting commands are also control commands that can identify the type of error that has been set. The board error cancellation commands are also control commands that can identify the type of error that has been canceled. The CPU 80a sends the board error setting commands and board error cancellation commands to the frame control board 82 and the performance control board 81 depending on the type of error. Note that when a frame board communication error is set, communication between the game control board 80 and the frame control board 82 is not performed normally, so the board error command is not sent to the frame control board 82, but is sent to the performance control board 81. When a frame board communication error is set, the CPU 80a does not send a board error command to the frame control board 82. When a frame board communication error is set, the CPU 80a may send a board error command to the game control board 80. In this case, if the communication line through which the game control board 80 sends information to the frame control board 82 is broken, the frame control board 82 cannot receive the board error command.

[0218] When the frame control board 82 (CPU 82a) receives the board error setting command, it updates information (hereinafter referred to as board error information) that can identify the error being set on the game control board 80 based on the received board error setting command and stores it in the RAM 82c. When the CPU 82a receives the board error reset command, it updates the board error information based on the received board error reset command and stores it in the RAM 82c. This allows the CPU 82a to identify the error being set on the game control board 80.

[0219] When the effect control board 81 (CPU 81a) receives the board error setting command, it updates the error information based on the received board error setting command and stores it in the RAM 81c. When the CPU 81a receives the board error reset command, it updates the error information based on the received board error reset command and stores it in the RAM 81c. This allows the CPU 81a to identify the error being set in the pachinko gaming machine 10.

[0220] When a frame board communication error is not set and various errors other than a frame board communication error are set on the gaming control board 80 and the frame control board 82, the CPU 80a transmits an error code identifying the type of error being set as game information to be transmitted to the frame control board 82. For example, when a main disconnection error is set on the gaming control board 80, the CPU 80a transmits "P12" as the error code to the frame control board 82. When multiple types of errors are set, the CPU 80a transmits the error code of the error with the highest priority to the frame control board 82, as shown in the "Priority" column in FIG. 13. The priority corresponds to the order of priority for error notification. For example, when an unauthorized radio wave detection error and a main disconnection error are set, the CPU 80a transmits "P10" as the error code identifying the unauthorized radio wave detection error to the frame control board 82. When a frame board communication error is not set and no error is set in the game control board 80 or the frame control board 82, the CPU 80a transmits "P00" to the frame control board 82 as an error code that can identify that no error is set in the pachinko gaming machine 10. The frame control board 82 (CPU 82a) can identify various errors, excluding a frame board communication error, among the errors that are set in the pachinko gaming machine 10, by receiving the error code included in the game information. When a frame board communication error is set, communication between the game control board 80 and the frame control board 82 is not performed normally, and therefore game information is not transmitted to the frame control board 82. In other words, when a frame board communication error is set, an error code that can identify a frame board communication error is not transmitted from the game control board 80 to the frame control board 82. In other words, in this embodiment, when the combination of the frame side verification code and the board side verification code is a predetermined combination and various errors, excluding a frame board communication error, occur, an error code is transmitted from the CPU 80a to the frame control board 82. For example, when the combination of the frame side matching code and the panel side matching code is a predetermined combination, and an unauthorized radio wave detection error occurs, or when a main line disconnection error occurs, an error code corresponding to the error that has occurred is sent from the CPU 80a to the frame control board 82.

[0221] It should be noted that the CPU 80a does not transmit game information to the frame control board 82 when a frame board communication error is set, but the CPU 80a may transmit game information to the frame control board 82 when a frame board communication error is set. In this case, if the communication line through which the game control board 80 transmits information to the frame control board 82 is broken, the frame control board 82 cannot receive the game information.

[0222] Furthermore, the CPU 80a performs control to restrict the launch of game balls when, as examples, one of a plurality of errors is set, such as a frame board communication error, a supply mechanism error, or a door open error (errors marked with a circle in the "launch stop" column in Figure 13). When at least one of the frame board communication error, the supply mechanism error, and the door open error is set, the CPU 80a transmits a launch stop signal to the frame control board 82 (launch permission circuit 82m). In other words, the launch stop signal is turned on. When the launch permission circuit 82m receives the launch stop signal, the launch permission signal to the launch control board 83 is turned off, and its transmission is stopped. As described above, the condition for transmitting the launch permission signal is met when the launch permission state is in which the launch of game balls is permitted. In other words, the condition for transmitting the launch permission signal is not met when the launch prohibition state is in effect. In the pachinko gaming machine 10 of this embodiment, when an error other than a frame board communication error, a supply mechanism error, and a door open error is set, control to restrict the launch of gaming balls is not performed, and gaming balls can be launched.

[0223] The launch permitted state is a state in which the management unit 100 and the pachinko gaming machine 10 are normally connected, a predetermined error (for example, a frame board communication error) has not occurred in the gaming control board 80, a predetermined error (for example, a supply mechanism error or a door open error) has not occurred in the frame control board 82, and the fixed amount reached state described below has not occurred. The launch prohibited state is a state in which one or more of the following has occurred: the management unit 100 and the pachinko gaming machine 10 are not normally connected, a predetermined error has occurred in the gaming control board 80, a predetermined error has occurred in the frame control board 82, and the fixed amount reached state described below has occurred. Note that even in the same door open error state, if a second door open signal is received, it does not correspond to the above-mentioned predetermined error, and the launch prohibited state may not occur depending on the occurrence of that error.

[0224] Furthermore, the CPU 80a performs control to restrict the awarding of prize balls while a frame board communication error is set, as an example of one of the multiple types of errors. When a frame board communication error is set, the CPU 80a does not transmit information on the number of prize balls won to the frame control board 82, even if it receives a detection signal from each winning sensor D11-D15. In this case, even if a game ball is detected by each winning sensor D11-D15, the second management ball count PB is not added, and therefore no prize balls are awarded. Furthermore, the CPU 80a performs control to restrict the progress of the game while a frame board communication error is set. When a frame board communication error is set, the CPU 80a does not execute the normal board-side processing described above. As a result, a special game is not executed and a jackpot game is not awarded while a frame board communication error is set.

[0225] Thus, in this embodiment, the execution of a game in the pachinko gaming machine 10 is restricted while a frame board communication error is set. Note that in this embodiment, the restriction of the execution of a game refers to all of the above-mentioned states: a state in which a ball is prohibited from being fired, a state in which the awarding of prize balls is restricted, and a state in which the progress of a game is restricted; however, the execution of a game may also refer to any of these states. For example, the restriction of the execution of a game may refer to a state in which a ball is prohibited from being fired, and a state in which the awarding of prize balls is not restricted, and a state in which the progress of a game is not restricted. Also, for example, the restriction of the execution of a game may refer to a state in which a ball is prohibited from being fired, and a state in which the awarding of prize balls is not restricted, and a state in which the progress of a game is restricted.

[0226] Furthermore, when the CPU 80a sets a frame board communication error, for example, among the multiple types of errors, it initializes the main information stored in the RAM 80c. Therefore, after the frame board communication error is set, if the power is turned off and then turned on again, the frame board communication error is cleared, and the game cannot be restored based on the main information backed up before the frame board communication error was set. For example, if the power supply to the pachinko gaming machine 10 is cut off while there is a variable game on hold, and then the power supply to the pachinko gaming machine 10 is resumed, and the combination of the frame side verification code and the board side verification code is not a predetermined combination, the frame board communication error is set. Furthermore, even if the combination of the frame side verification code and the board side verification code is a predetermined combination, if information cannot be transmitted and received between the gaming control board 80 and the frame control board 82 due to a broken communication line, for example, the gaming control board 80 cannot receive response information to the startup information from the frame control board 82, and the frame board communication error is set. That is, in this embodiment, when there is a variable game on hold, if the power supply to the pachinko gaming machine 10 is cut off and then, after the power supply to the pachinko gaming machine 10 is resumed, the combination of the frame-side verification code and the board-side verification code does not match a predetermined combination, a frame-board communication error is set. At this time, information regarding the number of pending variable games included in the main information stored in the RAM 80c is initialized. As a result, for example, when there is a variable game on hold, if the power supply to the pachinko gaming machine 10 is cut off and then, after the power supply is resumed, the combination of the frame-side verification code and the board-side verification code does not match a predetermined combination, the variable game that was on hold before the power supply was cut off is not executed. On the other hand, when there is a variable game on hold, if the power supply to the pachinko gaming machine 10 is cut off and then, after the power supply is resumed, the combination of the frame-side verification code and the board-side verification code matches a predetermined combination, the variable game that was on hold before the power supply was cut off can be executed based on information regarding the number of pending variable games.

[0227] The frame-side error notification process of the frame-side normal process will be described. The CPU 82a controls the display content of the second ball count display unit 17 to display an error code, which is an example of information that can identify the currently set error, while setting various errors other than the frame board communication error. The CPU 82a can identify the error code of the currently set error from the game information transmitted from the game control board 80. The error code is information unique to each error. For example, as shown in the "Error Code" column in Figure 13, an error code is set for an unauthorized radio wave detection error, [P10] for a managed gaming machine communication error, [E10] for a supply mechanism error, [E11] for a frame break error, and [E12] for a frame break error. The CPU 82a alternates between displaying the error code and displaying the number of game balls every predetermined time. Furthermore, when multiple types of errors are set, the CPU 82a sequentially displays the error code and number of game balls for the error state with the highest priority among the multiple error states for a predetermined time, as shown in the "Priority" column in Figure 13. The priority corresponds to the order of priority for error notification. For example, if a door opening error occurs while an abnormal winning ball count error has occurred, the abnormal winning ball count error notification is executed according to the priority of the error notification. Note that if multiple error types are set, the CPU 82a may be configured to sequentially display multiple error codes and game ball counts for a predetermined period of time. Alternatively, the CPU 82a may be configured to display an error code but not the game ball count. When a currently set error is cleared, the CPU 82a controls the second ball count display unit 17 to stop displaying the error code corresponding to the cleared error. In one example of this embodiment, all errors that can be detected by the frame control board 82 are subject to error code display on the second ball count display unit 17. Furthermore, among the errors detected by the game control board 80, the unauthorized radio wave detection error and the main disconnection error are subject to error code display on the second ball count display unit 17. On the other hand, among the errors detected by the game control board 80, the frame board communication error is not subject to error code display on the second ball count display unit 17. Even when a frame board communication error is set, the second ball number display unit 17 does not display an error code for the frame board communication error.The second ball number display unit 17 also serves as a notification execution means for notifying an error. The second ball number display unit 17, which notifies the player of the number of game balls owned by the player and the error code, is an example of a second notification means.

[0228] The CPU 82a controls the display content of the performance display monitor 82d to display an error code that identifies the currently set error. That is, the error code is displayed on both the second ball count display unit 17 and the performance display monitor 82d. The CPU 82a alternates between displaying the error code and the base value (performance information) at predetermined intervals. Furthermore, when multiple types of errors are set, the CPU 82a sequentially displays the error code and base value of the highest priority error among the multiple types of errors for a predetermined period of time, as shown in the "Priority" column in FIG. 13 . Alternatively, when multiple types of errors are set, the CPU 82a may be configured to sequentially display multiple types of error codes and base values ​​for a predetermined period of time. Alternatively, the CPU 82a may be configured to display the error code but not the base value. Furthermore, the CPU 82a may be configured to display the number of game balls on the performance display monitor 82d in addition to the base value and error code. In this case, the CPU 82a may alternately display these three types of information at predetermined intervals. The CPU 82a controls the performance display monitor 82d to terminate the display of the error code when the currently set error is cleared. In one example of this embodiment, all errors that can be detected by the frame control board 82 are subject to error code display on the performance display monitor 82d. Furthermore, among errors detected by the gaming control board 80, unauthorized radio wave detection errors and main line disconnection errors are subject to error code display on the performance display monitor 82d. On the other hand, among errors detected by the gaming control board 80, frame board communication errors are not subject to error code display on the performance display monitor 82d. Therefore, even if a frame board communication error is set, the performance display monitor 82d does not display an error code for the frame board communication error. In this embodiment, the performance display monitor 82d also serves as a means for notifying errors. The CPU 82a starts the display of the error code on the performance display monitor 82d and the display of the error code on the second ball count display unit 17 at the same or approximately the same time. The performance display monitor 82d that notifies the base value and the error code is an example of a second notifying means.

[0229] In this way, when the CPU 82a receives an error code transmitted from the game control board 80, it controls the second ball number display unit 17 and the performance display monitor 82d so that, based on the error code, information that can identify the occurrence of various errors other than frame board communication errors (for example, an illegal radio wave detection error, a main line disconnection error, etc.) is notified.

[0230] The CPU 82a controls the notification audio unit 13 to output an audio notification with an audio pattern that identifies the currently set error. That is, the CPU 82a executes an audio notification (hereinafter referred to as an error audio notification) that notifies the currently set error. For example, in one example of this embodiment, the CPU 82a targets the following errors as notification targets: an unauthorized radio wave detection error, a managed gaming machine communication error, a supply mechanism error, a frame disconnection error, a main disconnection error, a game ball count clear error, an abnormal winning ball count error, and a door open error. The CPU 82a executes the error audio notification when these errors are being set. The CPU 82a does not target the frame board communication error as a notification target, and does not execute an error audio notification for notifying the frame board communication error. The audio pattern of the error audio notification varies depending on the type of error, and is capable of identifying the outline of the currently set error. For example, if an unauthorized radio wave is detected, the audio notification will read out the string "Error code P10 has occurred. Please call an attendant."

[0231] Furthermore, as described above, when the CPU 82a detects an error, it stores information in the RAM 82c that identifies the error that occurred (sets the error that occurred in the RAM 82c). In this embodiment, when multiple errors occur simultaneously and the CPU 82a detects these errors, it does not overwrite and store information that identifies the errors that occurred, but stores information that identifies all of the errors that occurred. In this manner, under circumstances where all of the errors that occurred can be identified, the CPU 82a executes error notification according to priority. Then, when an error release condition is met, the CPU 82a cancels the setting of the error that matches the error release condition of the error that has been met. In other words, when errors with the same error release condition are detected simultaneously, the setting of all of the errors that have occurred is canceled collectively. Specifically, when an unauthorized radio wave detection error, a frame board communication error, and an abnormal winning ball count error, which all have the error release condition of power restoration, are set simultaneously, these three errors are canceled collectively when the power is restored after being shut off.

[0232] Furthermore, when the error release condition is met, the CPU 82a terminates the error notification by the error notification device. In other words, by terminating the error notification, the error whose setting has been cancelled can be recognized. As described above, the CPU 82a transmits a frame error cancellation command, which is control information that can identify the type of error whose setting has been cancelled, to the gaming control board 80. This allows the error notification controlled by the CPU 80a of the gaming control board 80 to be terminated. Note that, in this embodiment, when the error cancellation switch 82f is operated to satisfy the error release condition, the predetermined state that is cancelled based on the operation of the ball removal switch 82e and the game ball clear switch 82g is not cancelled. Since the operation of the ball removal switch 82e is an operation that causes the ball removal state, the predetermined state that is not cancelled in the above case corresponds to a non-ball removal state in which ball removal cannot be performed. Furthermore, since operation of the game ball clear switch 82g is an operation that causes the second control ball count information to be initialized to 0, the predetermined state that is not released in the above case corresponds to a state in which the counting result is retained without initializing the second control ball count information to 0. In other words, while the error release switch 82f is being operated, the ball removal state and the state in which the second control ball count information is initialized to 0 do not occur.

[0233] Furthermore, in the pachinko gaming machine 10 of this embodiment, the error release conditions are met under the same conditions regardless of the gaming state created by the combination of whether or not the probability variable function is activated and whether or not the ball-scoring assist function is activated. For example, the error release conditions by operating the error release switch 82f are met under the same conditions in any gaming state: low-probability low-ball-scoring rate state, high-probability low-ball-scoring rate state, low-probability high-ball-scoring rate state, and high-probability high-ball-scoring rate state. In other words, the error is resolved by the fulfillment of the error release conditions, regardless of the gaming state.

[0234] The performance side error notification process executed by the performance control board 81 (CPU 81a) will be described. When the CPU 81a receives the unauthorized radio wave detection error setting command, it controls some or all of the notification means constituting the notification device ES to execute the unauthorized radio wave detection error notification. As an example, the unauthorized radio wave detection error notification is executed in a manner in which the notification audio unit 12 outputs a sound that can identify that an unauthorized radio wave detection error has occurred, such as a voice reading out the string of characters "Error code P10 has occurred, please call an attendant." As an example, the unauthorized radio wave detection error notification is executed in a manner in which the notification light-emitting unit 14 emits light in a light-emitting pattern dedicated to the unauthorized radio wave detection error.

[0235] As shown in FIG. 14(a), for example, the unauthorized radio wave detection error notification is executed by displaying an image EG2, which can identify that an unauthorized radio wave detection error has occurred, such as the text "Unauthorized Radio Wave Detection Error," in the image display area 19a of the notification display unit 19. The unauthorized radio wave detection error setting in the gaming control board 80 is not canceled until power is restored after a power outage. In other words, once the CPU 81a starts the notification of the unauthorized radio wave detection error, it controls the notification device ES to continue the notification of the unauthorized radio wave detection error until power is restored. Note that the CPU 81a may receive a board error reset command, which can identify that the unauthorized radio wave detection error setting has been canceled when power is restored after a power outage, and may control the notification device ES to end the unauthorized radio wave detection error notification upon receiving the board error reset command.

[0236] When the CPU 81a receives the frame board communication error setting command, it controls some or all of the notification means constituting the notification device ES to execute a frame board communication error notification. As an example, the frame board communication error notification is executed in a manner in which a sound that can identify that a frame board communication error has occurred is output from the notification sound unit 12, such as a voice reading out the string of characters "Error code P20 has occurred, please call an attendant." As an example, the frame board communication error notification is executed in a manner in which the notification light-emitting unit 14 emits light in a light-emitting pattern dedicated to frame board communication errors.

[0237] As shown in FIG. 14(b), for example, the frame board communication error notification is executed by displaying an image EG1, which can identify that a frame board communication error has occurred, such as the text "Frame Board Communication Error," in the image display area 19a of the notification display unit 19. The frame board communication error setting in the game control board 80 is not canceled until power is restored after a power outage. In other words, once the CPU 81a starts notifying the frame board communication error, it controls the notification device ES to continue the frame board communication error notification until power is restored. Note that the CPU 81a may receive a frame board error cancellation command, which can identify that the frame board communication error setting has been canceled when power is restored after a power outage, and may control the notification device ES to end the frame board communication error notification upon receiving the frame board error cancellation command.

[0238] As described above, a frame board communication error is set when communication between the frame control board 82 and the game control board 80 is not possible. That is, in this embodiment, when communication between the frame control board 82 and the game control board 80 is not possible, the notification mode of the notification device ES becomes a frame board communication error notification mode. The notification mode of the frame board communication error notification (the notification mode of each notification means constituting the notification device ES in the frame board communication error notification) is an example of a specific notification mode.

[0239] When the CPU 81a receives the main disconnection error setting command, it controls some or all of the notification means constituting the notification device ES to execute the main disconnection error notification. As an example, the main disconnection error notification is executed in a manner in which a sound that can identify the occurrence of a main disconnection error is output from the notification sound unit 12, such as a voice reading out the string of characters "Error code P12 has occurred, please call an attendant." As an example, the main disconnection error notification is executed in a manner in which the notification light-emitting unit 14 emits light in a light-emitting pattern dedicated to main disconnection errors.

[0240] As an example, the main disconnection error notification is executed in a manner in which an image that can identify that a main disconnection error has occurred, such as the character string "main disconnection error," is displayed in the image display area 19a of the notification display unit 19. When the CPU 81a receives an identifiable main disconnection error release command that can identify that an abnormality, such as a disconnection, in a sensor connected to the game control board 80 has been resolved, the CPU 81a controls the notification device ES to end the main disconnection error notification.

[0241] In addition, the CPU 81a controls the error notification for all or some of the error states illustrated in FIG. 13 , excluding the unauthorized radio wave detection error, frame panel communication error, and main line disconnection error. That is, the CPU 81a controls the notification device ES to issue an error notification in response to the received frame error command. For example, the abnormal winning ball count error notification is issued by outputting a sound from the notification audio unit 12 that identifies the occurrence of the abnormal winning ball count error, such as a voice reading the string "A prize count abnormality has occurred." For example, the abnormal winning ball count error notification is issued by illuminating the notification light-emitting unit 14 with a light-emitting pattern specifically for the abnormal winning ball count error. For example, the abnormal winning ball count error notification is issued by displaying an image on the notification display unit 19 that identifies the occurrence of the abnormal winning ball count error, such as the string "A prize count abnormality has occurred!" The notification pattern of the error notification issued by the notification means constituting the notification device ES is determined for each error type. In other words, the notification patterns are partially or completely different so that the type of error can be identified. A partially or completely different notification pattern can be created by using different notification means, or by using the same notification means but with different notification content. For example, different sounds, different light emission times or colors, different images, etc.

[0242] The error notification by the notification means constituting the notification device ES is terminated when the condition for canceling the error that is the subject of the error notification is met and the error is canceled. By terminating the error notification, the canceled error can be recognized.

[0243] Here, an example of a notification mode when the CPU 82a receives startup information after power-on and performs a matching process, and the board-side matching code and the frame-side matching code match, or when they do not match, will be described.

[0244] As described above, when the board-side matching code and the frame-side matching code match in the processing of step S103 in the matching processing shown in Fig. 12, the CPU 82a transmits response information to the received startup information to the game control board 80. As described above, when the CPU 80a receives response information to the startup information, it transmits an initialization command or a power recovery command to the performance control board 81 depending on whether the backed-up information is normal or not and whether a RAM clear signal has been received or not.

[0245] As shown in FIG. 14(c), when the effect control board 81 (CPU 81a) receives an initialization command or a power restoration command, it controls the notification device ES to execute a RAM clear notification or a power restoration notification in accordance with the received command. That is, in this embodiment, after power supply to the pachinko gaming machine 10 is started, if the gaming control board 80 (CPU 80a) receives response information to the startup information, the initialization command or the power restoration command is transmitted to the effect control board 81. At this time, the RAM clear notification or the power restoration notification is executed in the notification device ES. The RAM clear notification and the power restoration notification are examples of specific notifications. Then, the CPU 81a controls the notification display unit 19 to display an initialization image SG or a power restoration image FG in accordance with the received command. Furthermore, the CPU 81a controls the notification display unit 19 to display a predetermined background image HK and a predetermined effect pattern or a combination of effect patterns different from the predetermined effect pattern in accordance with the received command. That is, when the combination of the frame-side matching code and the board-side matching code is a predetermined combination, the notification display unit 19 issues a notification in a notification mode that displays a predetermined background image HK and a combination of a predetermined effect pattern or an effect pattern different from the predetermined effect pattern according to the received command. A notification in which a predetermined background image HK and an effect pattern (a predetermined effect pattern or an effect pattern different from the predetermined effect pattern) are displayed on the notification display unit 19 is an example of a predetermined notification. That is, the notification display unit 19 can execute a predetermined notification when power supply is started.

[0246] On the other hand, as mentioned above, if the board-side matching code and the frame-side matching code do not match in the processing of step S103 in the matching process shown in FIG. 12, the CPU 82a does not transmit response information to the received startup information to the game control board 80. In other words, if the combination of the frame-side matching code and the board-side matching code is not a predetermined combination, the CPU 80a cannot receive the response information to the startup information. As mentioned above, in this case, the CPU 80a sets a frame board communication error based on the fact that response information to the startup information has not been received.

[0247] As shown in FIG. 14(b), when a frame board communication error is set, the effect control board 81 (CPU 81a) controls the notification display unit 19 to display an image EG1 that identifies the occurrence of a frame board communication error. At this time, a RAM clear notification or a power restoration notification is not executed. That is, if the CPU 80a does not receive response information to the startup information after power supply to the pachinko gaming machine 10 is started, the notification device ES does not execute a RAM clear notification or a power restoration notification. Furthermore, if the combination of the frame side verification code and the board side verification code is not a predetermined combination, the notification is performed by the notification display unit 19 in a notification mode that displays an image EG1 that identifies the occurrence of a frame board communication error. Thus, in this embodiment, the notification mode of the notification display unit 19 differs depending on whether the combination of the frame side verification code and the board side verification code is a predetermined combination or not.

[0248] Furthermore, when a frame board communication error is set in the pachinko gaming machine 10, an image EG1 is displayed on the notification display unit 19, and the execution of a notification (predetermined notification) in which a predetermined background image HK and a performance symbol (a predetermined performance symbol or a performance symbol different from the predetermined performance symbol) are displayed on the notification display unit 19 is restricted. That is, in this embodiment, when power supply is started, if the combination of the frame side verification code and the board side verification code is not a predetermined combination, the execution of the predetermined notification is restricted, and at this time, the notification mode of the notification display unit 19 becomes a notification mode in which an image EG1 that can identify that a frame board communication error has occurred is displayed. In this embodiment, the restriction on the execution of the predetermined notification means, for example, that the predetermined notification is not executed (the predetermined background image HK and a performance symbol (a predetermined performance symbol or a performance symbol different from the predetermined performance symbol) are not displayed), but this is not limited thereto. The restriction on the execution of the predetermined notification may mean that the predetermined notification is executed and then partially restricted. For example, the restriction on the execution of a predetermined notification may be such that the predetermined background image HK or part of the effect pattern cannot be seen by displaying the image EG1 so as to be superimposed on a layer in front of the predetermined background image HK and effect pattern displayed on the notification display unit 19. Also, for example, the restriction on the execution of a predetermined notification may be such that the predetermined background image HK and the effect pattern cannot be seen in their entirety by displaying the image EG1 so as to be superimposed on a layer in front of the predetermined background image HK and effect pattern displayed on the notification display unit 19.

[0249] In this embodiment, as described above, when power supply is started, if the combination of the frame-side verification code and the board-side verification code is a predetermined combination, the execution of the predetermined notification is not restricted. In this case, the notification display unit 19 displays a predetermined background image HK and a combination of predetermined or different performance symbols in response to the received command. The notification display unit 19 displays a predetermined background image HK and a combination of predetermined or different performance symbols in response to the received command when the execution of the predetermined notification is not restricted, which is an example of a first notification mode. Meanwhile, the notification display unit 19 displays a second notification mode when the execution of the predetermined notification is restricted. Among the second modes, the notification mode in which an image EG1 is displayed, which indicates that a frame board communication error has occurred, is an example of a specific notification mode. In other words, in this embodiment, the specific notification mode is included in the second mode.

[0250] As described above, in addition to the frame board communication error, when an unauthorized radio wave detection error or a main disconnection error occurs, an image that identifies the occurrence of these errors is displayed on the notification display unit 19. In this embodiment, the execution of a predetermined notification is also restricted when an image that identifies the occurrence of an unauthorized radio wave detection error or a main disconnection error is displayed on the notification display unit 19. In this case, the notification mode of the notification display unit 19 becomes the second mode. That is, in this embodiment, even if the combination of the frame side verification code and the panel side verification code is a predetermined combination and no frame board communication error occurs, the execution of the predetermined notification is restricted when an unauthorized radio wave detection error or a main disconnection error occurs. The unauthorized radio wave detection error and the main disconnection error are examples of specific errors. That is, in this embodiment, when power supply is started, even if the combination of the frame side verification code and the panel side verification code is a predetermined combination, if a specific error occurs, the execution of the predetermined notification is restricted, and the notification mode of the notification display unit 19 becomes the second mode.

[0251] Next, we will explain an example of a notification mode in a situation where there is a pending variable game, the power is cut off while the variable game is being executed, and after power is restored, the CPU 82a receives startup information and performs a matching process, resulting in a match between the frame side matching code and the board side matching code, or in a case where they do not match.

[0252] As shown in FIG. 15(a), when a variable game is being played with a pending variable game, the notification display unit 19 displays a predetermined background image HK, a pending image HG, and the currently changing effect symbol. Then, as shown in FIG. 15(b), the power is turned off in this state. If the RAM clear switch 82h is not operated and the power is turned on again, startup information is sent from the CPU 80a to the CPU 82a, and the CPU 82a, upon receiving the startup information, performs a matching process. If the frame-side matching code and the board-side matching code match during the matching process, the CPU 82a sends a response to the received startup information to the gaming control board 80. When the CPU 80a receives the response to the startup information, it returns to normal operation based on the backed-up main information and sends a power restoration command to the effect control board 81.

[0253] As shown in FIG. 15(c), when the CPU 81a receives a power restoration command, it controls the notification device ES to execute a power restoration notification. At this time, the CPU 81a controls the notification display unit 19 to display a power restoration image FG, which resembles the text "Power restoration in progress," indicating that RAM clearing has not been performed. Furthermore, upon receiving the power restoration command, the CPU 81a controls the notification display unit 19 to display a predetermined background image HK and a combination of effect symbols different from the predetermined combination of effect symbols. Note that in this embodiment, the reserved image HG displayed before the power shutdown is no longer displayed. However, as described above, the CPU 80a has restored its state based on the backed-up main information (information regarding the number of reserved games). Therefore, in this embodiment, if the power supply is interrupted while there is a variable game on hold, and the frame-side verification code and the board-side verification code match after the power supply is resumed, the variable game on hold before the power shutdown can be executed based on the information regarding the number of reserved variable games included in the main information.

[0254] On the other hand, as described above, if the frame-side verification code and the board-side verification code do not match during the verification process, the CPU 82a does not transmit response information to the received startup information to the game control board 80. In this case, the CPU 80a sets a frame board communication error based on the fact that response information to the startup information is not received. Then, when a frame board communication error is set, the CPU 81a controls the notification display unit 19 to display an image EG1 that can identify that a frame board communication error has occurred, as shown in FIG. 15(d). That is, if the CPU 82a performs the verification process and the frame-side verification code do not match a predetermined combination, the notification display unit 19 issues a notification in a notification mode that displays an image EG1 that can identify that a frame board communication error has occurred.

[0255] For example, if a malfunction occurs in the frame control board 82 while a variable game is being executed, it is conceivable to turn off the power and then replace the frame control board 82 connected to the game control board 80 with another frame control board 82. In such a case, in this embodiment, when power is restored after a power outage, the notification mode of the notification display unit 19 after power restoration differs depending on whether or not the frame-side verification code and the board-side verification code are a predetermined combination. Furthermore, if the frame-side verification code and the board-side verification code are a predetermined combination when power is restored, the variable game that was put on hold before power was shut off can be executed even after power restoration.

[0256] Next, the fixed amount completion function of the pachinko gaming machine 10 of this embodiment will be described. The fixed-quantity end function is activated at a predetermined timing when the number of specific balls counted by the CPU 82a in the second performance information generation process described above reaches a predetermined upper limit (for example, 95,000 balls). The predetermined timing for the fixed-quantity end function is when the number of specific balls reaches the upper limit if the number of specific balls reaches the upper limit when not in a jackpot game, and when the jackpot game ends if the number of specific balls reaches the upper limit during a jackpot game. In other words, if the number of specific balls reaches the upper limit when not in a jackpot game, the fixed-quantity end function is activated when the number of specific balls reaches the upper limit. On the other hand, if the number of specific balls reaches the upper limit during a jackpot game, the fixed-quantity end function is activated when the jackpot game ends. In the pachinko gaming machine 10, activation of the fixed-quantity end function results in a fixed-quantity reached state.

[0257] The CPU 82a determines whether the specific number of balls stored in the RAM 82c is less than the upper limit. If the specific number of balls is not less than the upper limit, the CPU 82a refers to the game information stored in the RAM 82c and determines whether a jackpot game is being played. If a jackpot game is not being played, the CPU 82a sends a fixed-point reaching state setting command to the CPU 80a, which can identify that a fixed-point reaching state has occurred. If a jackpot game is being played, the CPU 82a repeatedly refers to the game information stored in the RAM 82c, and sends a fixed-point reaching state setting command to the CPU 80a when it determines that a jackpot game is not being played. Upon receiving the fixed-point reaching state setting command, the CPU 80a sets a fixed-point reaching flag in the RAM 80c as information that can identify that a fixed-point reaching state has occurred. The CPU 80a sends the received fixed-point reaching state setting command to the performance control board 81.

[0258] When the performance control board 81 (CPU 81a) receives the fixed amount reached state setting command, it stores information that can identify that the fixed amount reached state is reached in the RAM 81c based on the received fixed amount reached state setting command.

[0259] In this embodiment, the condition for canceling the fixed amount reached state is that the contents stored in the RAM 80c are initialized. As described above, since the fixed amount reached flag is included in the main information to be backed up, the setting of the fixed amount reached flag is canceled by initializing the contents stored in the RAM 80c when the power is turned on. This cancels the fixed amount reached state. As described above, when the contents stored in the RAM 80c are initialized, the CPU 80a sends an initialization command to the performance control board 81 (CPU 81a). When the CPU 81a receives the initialization command, it stores information in the RAM 81c that can identify that the fixed amount reached state has not been reached. This enables the CPU 81a to identify that the fixed amount reached state has been reached in the pachinko gaming machine 10.

[0260] As described above, in this embodiment, when the fixed amount reached state occurs, the firing is prohibited. The CPU 80a references the fixed amount reached flag stored in the RAM 80c, and if the fixed amount reached flag is set, it sends a firing stop signal to the frame control board 82 (firing permission circuit 82m). When the firing permission circuit 82m receives the firing stop signal, the firing permission signal to the firing control board 83 is turned off, and the transmission of the signal is stopped.

[0261] Furthermore, when the fixed number of balls is reached, the CPU 80a performs control to restrict the awarding of prize balls. When a fixed number of balls is reached flag is stored in the RAM 80c, the CPU 80a does not transmit the number of acquired prize balls information to the frame control board 82 even if it receives a detection signal from each winning sensor D11-D15. In this case, even if a game ball is detected by each winning sensor D11-D15, the second management number of balls PB is not added, and therefore, no prize balls are awarded. Furthermore, when the fixed number of balls is reached, the CPU 80a performs control to restrict the progress of the game. When a fixed number of balls is reached flag is stored in the RAM 80c, the CPU 80a does not execute the normal game-side processing described above. As a result, when the fixed number of balls is reached, the special game is not executed and no jackpot game is awarded.

[0262] In this embodiment, in addition to when a frame board communication error is set, execution of a game on the pachinko gaming machine 10 is also restricted when the fixed amount has been reached. In this embodiment, when the power supply to the pachinko gaming machine 10 is restarted after being cut off, execution of a game on the pachinko gaming machine 10 is restricted when the fixed amount has been reached, even if the combination of the frame side verification code and the board side verification code is a predetermined combination and a frame board communication error has not been set.

[0263] The fixed amount reaching state notification process executed by the performance control board 81 (CPU 81a) will be explained. When the CPU 81a receives the fixed-amount-reached state setting command, it controls some or all of the notification means constituting the notification device ES to notify the fixed-amount-reached state. As an example, the notification of the fixed-amount-reached state is executed in a manner in which a sound that can identify the occurrence of the fixed-amount-reached state is output from the notification sound unit 12, such as a voice reading out the string of characters "The maximum payout limit for one day has been reached. Play for today is over." As an example, the notification of the fixed-amount-reached state is executed in a manner in which the notification light-emitting unit 14 is illuminated in a light-emitting pattern dedicated to the fixed-amount-reached state.

[0264] As shown in FIG. 14(d), for example, the notification of the fixed-amount-reach state is executed by displaying an image EG3 in the image display area 19a of the notification display unit 19, which indicates the fixed-amount-reach state, such as the text "During the fixed-amount-reach state, the maximum payout limit per day has been reached. Play ends today." The setting of the fixed-amount-reach flag in the game control board 80 is not canceled until the contents of RAM 80c are initialized upon power-on after power-off. In other words, once the CPU 81a starts the notification of the fixed-amount-reach state, it controls the notification device ES to continue the notification until power-on. Note that the CPU 81a may receive a fixed-amount-reach state cancel command, which indicates that the setting of the fixed-amount-reach flag has been canceled when the contents of RAM 80c are initialized upon power-on after power-off. The notification device ES may then be controlled to terminate the notification of the fixed-amount-reach state upon receiving the fixed-amount-reach state cancel command.

[0265] In this embodiment, the notification of all errors detectable in the pachinko gaming machine 10 is given priority over the notification of the fixed amount reached state. In this embodiment, the error notification being given priority over the notification of the fixed amount reached state means either that the notification of the fixed amount reached state is not executed while the error notification is being executed, or that both the notification of the fixed amount reached state and the error notification are executed in a notification mode that makes the error notification easier to recognize than the notification of the fixed amount reached state.

[0266] Therefore, according to this embodiment, the following effects can be obtained. (1) When power supply is started, the matching unit matches the combination of the frame-side matching code stored in the ROM 82b of the frame control board 82 and the board-side matching code stored in the ROM 80b of the game control board 80 to determine whether it is a predetermined combination. This makes it possible to determine whether the frame control board 82 and the game control board 80 are connected in a predetermined combination. The notification mode of the notification device ES differs between when the combination of the frame-side matching code and the board-side matching code is a predetermined combination and when the combination of the frame-side matching code and the board-side matching code is not a predetermined combination. Therefore, by checking the notification mode of the notification device ES when power supply is started, it is possible to determine whether the combination of the frame-side matching code and the board-side matching code is a predetermined combination, and ultimately to determine whether the frame control board 82 and the game control board 80 are connected in a predetermined combination. This allows the control means to set the correct combination before a game can be played.

[0267] (2) The verification unit is provided in the frame control board 82, and when power supply is started, the game control board 80 transmits startup information including information different from the board verification code in addition to the board verification code to the frame control board 82, and the frame control board 82 verifies whether the frame verification code and the board verification code are a predetermined combination. Therefore, when transmitting the board verification code from the game control board 80 to the frame control board 82, in addition to the board verification code, information different from the board verification code can also be transmitted as startup information, so information can be transmitted from the game control board 80 to the frame control board 82 efficiently. Therefore, compared to transmitting the board verification code and the information different from the board verification code separately, the information to be transmitted from the game control board 80 to the frame control board 82 when the pachinko gaming machine 10 is started can be transmitted more quickly, and the time from when power supply is started to when the pachinko gaming machine 10 is started can be shortened.

[0268] (3) The frame control board 82 transmits response information to the startup information to the gaming control board 80 when the combination of the frame verification code and the board verification code is a predetermined combination. However, even when the combination of the frame verification code and the board verification code is a predetermined combination, for example, if the communication line between the frame control board 82 and the gaming control board 80 is disconnected, the gaming control board 80 cannot receive the response information to the startup information from the frame control board 82. In this embodiment, the frame control board 82 does not transmit response information to the startup information to the gaming control board 80 even when the combination of the frame verification code and the board verification code is not a predetermined combination. Therefore, the gaming control board 80 can be made to perform the same processing when the communication line between the frame control board 82 and the gaming control board 80 is disconnected and when the combination of the frame verification code and the board verification code is not a predetermined combination.

[0269] (4) When the combination of the frame-side verification code and the board-side verification code is a predetermined combination, the frame control board 82 transmits response information to the startup information to the gaming control board 80, and then a RAM clear notification or a power return notification is executed on the condition that the gaming control board 80 receives the response information to the startup information. Therefore, whether or not a RAM clear notification or a power return notification is executed can allow the gaming machine manufacturer, the gaming facility manager, etc. (hereinafter referred to as the person performing maintenance) to determine whether or not the frame control board 82 received the response information to the startup information. This also allows the person performing maintenance to determine whether or not the frame control board 82 and the gaming control board 80 are connected in a predetermined combination. If the person performing maintenance determines that the frame control board 82 and the gaming control board 80 are connected in a predetermined combination, the connection between the frame control board 82 and the gaming control board 80 can be maintained, allowing the game to be played using the control means of the correct combination. On the other hand, if the person performing maintenance realizes that the frame control board 82 and the game control board 80 are not connected in the predetermined combination, the combination of the frame control board 82 and the game control board 80 can be corrected and the game can be played.

[0270] (5) When power supply is started, if the combination of the frame-side verification code and the board-side verification code is a predetermined combination, the notification display unit 19 does not restrict the execution of a notification (predetermined notification) that displays a predetermined background image HK and a performance pattern, and the notification mode of the notification display unit 19 becomes the notification mode when the execution of the predetermined notification is not restricted. On the other hand, when power supply is started, if the combination of the frame-side verification code and the board-side verification code is not a predetermined combination, the notification display unit 19 restricts the execution of the predetermined notification, and the notification mode of the notification display unit 19 becomes the notification mode when the execution of the predetermined notification is restricted. Assuming this configuration, even if the combination of the frame-side verification code and the board-side verification code is a predetermined combination, if a specific error (unauthorized radio wave detection error and main line disconnection error) occurs, the execution of the predetermined notification is restricted, and the notification mode of the notification display unit 19 becomes the notification mode when the execution of the predetermined notification is restricted. As a result, when the execution of a predetermined notification is restricted and the notification mode of the notification display unit 19 becomes the notification mode when the execution of a predetermined notification is restricted, the maintenance person can be alerted both to whether the frame control board 82 and the game control board 80 are connected in a predetermined combination and whether a specific error has occurred. As a result, if the maintenance person realizes that a specific error has occurred, they can take measures to resolve the specific error and then allow the game to continue. On the other hand, if the maintenance person realizes that the frame control board 82 and the game control board 80 are not connected in the predetermined combination, they can correct the combination of the frame control board 82 and the game control board 80 and then allow the game to continue.

[0271] (6) When a specific error (unauthorized radio wave detection error or main line disconnection error) occurs when the combination of the frame-side verification code and the panel-side verification code is a predetermined combination, the CPU 80a transmits an error code to the frame control board 82. The frame control board 82, upon receiving the error code, controls the second ball count display unit 17 and the performance display monitor 82d to provide information that identifies the occurrence of the specific error. Therefore, when the execution of a predetermined notification is restricted, if the second ball count display unit 17 and the performance display monitor 82d provide a notification of a specific error, the maintenance worker can be made aware that a specific error has occurred and can also be made aware that the combination of the frame-side verification code and the panel-side verification code is a predetermined combination. Furthermore, when a specific error occurs, the second ball count display unit 17 and the performance display monitor 82d, in addition to the notification device ES, also provide a notification that identifies the occurrence of the specific error. This makes it easier for the maintenance worker to recognize that a specific error has occurred compared to when the error notification is provided only by the notification device ES.

[0272] (7) A common communication serial number is included in the startup information that the gaming control board 80 transmits to the frame control board 82 and in the response information to the startup information that the gaming control board 80 receives from the frame control board 82. As a result, for example, when the frame control board 82 transmits response information to the gaming control board 80, the gaming control board 80 can identify that it has transmitted the response information to the startup information by transmitting the same communication serial number as the received communication serial number to the gaming control board 80, without having to newly generate information that can identify that it has transmitted the response information to the startup information. Therefore, compared to when the startup information and the response information to the startup information do not contain a common communication serial number, the control program that causes communication between the gaming control board 80 and the frame control board 82 can be simplified.

[0273] (8) When power supply is started, the gaming control board 80 transmits startup information including a board-side verification code to the frame control board 82. Upon receiving the startup information, the frame control board 82 is configured to verify in its verification unit whether the combination of the frame-side verification code and the received board-side verification code is a predetermined combination. Assuming this configuration, the time from when power supply is started until the frame control board 82 is able to receive the startup information is shorter than the time from when power supply is started until the gaming control board 80 is able to transmit the startup information to the frame control board 82. This prevents the frame control board 82 from being unable to receive the startup information when the startup information is transmitted from the gaming control board 80 to the frame control board 82 after power supply is started. This ensures that the frame control board 82 can reliably receive the startup information. As a result, the frame control board 82 (CPU 82a) can reliably verify whether the combination of the frame-side verification code and the received board-side verification code is a predetermined combination.

[0274] (9) If the combination of the frame-side verification code and the board-side verification code is not a predetermined combination, i.e., if the frame control board 82 and the game control board 80 are not connected in the predetermined combination, a frame board communication error is notified. This provides an opportunity for the maintenance person to discover that the frame control board 82 and the game control board 80 are not connected in the predetermined combination. This makes the maintenance person aware that the frame control board 82 and the game control board 80 must be connected in the predetermined combination. If the maintenance person discovers that the frame control board 82 and the game control board 80 are not connected in the predetermined combination, the control means can be set to the correct combination and game play can be resumed.

[0275] (10) When communication between the frame control board 82 and the game control board 80 is not possible, the notification mode of the notification device ES becomes a frame board communication error notification mode. Situations in which communication between the frame control board 82 and the game control board 80 is not possible include situations in which the combination of the frame side verification code and the board side verification code is not a predetermined combination. Therefore, when the notification mode of the notification device ES becomes a frame board communication error notification mode, it can alert the maintenance personnel that communication between the frame control board 82 and the game control board 80 may not be possible due to a broken communication line, etc., and that the combination of the frame side verification code and the board side verification code may not be a predetermined combination. If the maintenance personnel discovers that the combination of the frame side verification code and the board side verification code is not a predetermined combination—that is, that the frame control board 82 and the game control board 80 are not connected in the predetermined combination—the control means can be set to the correct combination and game can be played.

[0276] (11) For example, if a game is played in a situation where communication between the frame control board 82 and the game control board 80 is not possible, including a situation where the frame control board 82 and the game control board 80 are not connected in a predetermined combination, the player's balls cannot be managed properly, which may result in a disadvantage to the player. In contrast, in this embodiment, a frame board communication error is set when communication between the frame control board 82 and the game control board 80 is not possible, and while the frame board communication error is set, execution of the game on the pachinko gaming machine 10 is restricted. At this time, a firing prohibition state, a state in which the awarding of prize balls is restricted, and a state in which the progress of the game is restricted are established. In other words, by preventing the game from being played in a situation where communication between the frame control board 82 and the game control board 80 is not possible, it is possible to prevent a disadvantage to the player.

[0277] (12) For example, if the game control board 80 and the frame control board 82 are not connected in a predetermined combination, and the game control board 80 transmits information about the number of prize balls won to the frame control board 82, the frame control board 82 may not be able to properly manage the second number of balls under management PB. In the present invention, if the combination of the frame-side verification code and the board-side verification code is not a predetermined combination, i.e., if the game control board 82 and the frame control board 80 are not connected in a predetermined combination, a frame board communication error is set. While the frame board communication error is set, the CPU 80a does not transmit information about the number of prize balls won to the frame control board 82, even if it receives a detection signal from each of the winning sensors D11-D15. This prevents the second number of balls under management PB from being updated, even if it receives a detection signal from each of the winning sensors D11-D15, when the game control board 82 and the game control board 80 are not connected in a predetermined combination. This allows the game control board 82 to properly manage the second number of balls under management PB.

[0278] (13) In addition to when a frame board communication error is set, execution of a game in the pachinko gaming machine 10 is also restricted when the fixed number has been reached. Therefore, it is possible to create a situation in which execution of a game in the pachinko gaming machine 10 is restricted or not restricted, depending on whether the number of specific balls has reached the upper limit. Furthermore, when power supply is restarted after being cut off, execution of a game in the pachinko gaming machine 10 is restricted when the fixed number has been reached, even if the combination of the frame side verification code and the board side verification code is a predetermined combination and a frame board communication error has not been set. Therefore, when power supply is restarted after being cut off, it is possible to create a situation in which execution of a game is restricted based on the number of prize balls awarded since power supply was started and the number of balls used in play since power supply was started, even if a frame board communication error has not been set.

[0279] (14) Whether the frame control board 82 and the gaming control board 80 are connected in a predetermined combination is determined based on information that can identify the manufacturer of the CPU of each control board. This allows the person performing maintenance to manage the frame control board 82 and the gaming control board 80 based on the manufacturer of the CPU. This makes it possible to make the person performing maintenance aware of connecting a frame control board 82 and a gaming control board 80 that have the same CPU manufacturer, thereby preventing the frame control board 82 and the gaming control board 80 that have different CPU manufacturers from being connected.

[0280] (15) In a situation where there is a variable game on hold, if the power supply to the gaming machine is cut off and then the power supply to the gaming machine is resumed, the variable game that was on hold before the power supply to the pachinko gaming machine 10 was cut off can be executed on the condition that the combination of the frame-side verification code and the board-side verification code is verified as a predetermined combination. Therefore, depending on whether the frame control board 82 and the gaming control board 80 are connected in a predetermined combination, it is possible to appropriately control the execution of the variable game that has been on hold.

[0281] (16) For example, if there is a variable game on hold, and the power supply is interrupted and then resumed, and the combination of the frame matching code and the board matching code is not a predetermined combination, it is possible that the combination of the frame control board 82 and the game control board 80 was changed after the power supply was interrupted. A situation in which the combination of the frame control board 82 and the game control board 80 is changed typically occurs when the game before the power supply was interrupted is not continued. According to the above embodiment, if there is a variable game on hold, and the power supply is interrupted and then resumed, and the combination of the frame matching code and the board matching code is not a predetermined combination, the information about the number of variable games on hold stored in RAM 80c is initialized to the initial information. Therefore, if there is a variable game on hold, and the combination of the frame matching code and the board matching code is not a predetermined combination after the power supply is interrupted and then resumed, the variable game on hold before the power supply was interrupted will not be executed, and the information about the number of variable games on hold can be properly processed.

[0282] (17) The pachinko gaming machine 10 can issue notifications according to the priority of the error that needs to be addressed. In other words, if a communication abnormality between control boards occurs due to the generation of abnormal radio waves, the communication abnormality will be difficult to resolve unless the generation of abnormal radio waves is resolved. Furthermore, the notification of an unauthorized radio wave detection error is given priority over the notification of a frame board communication error. This makes it easier for the user to understand that the generation of abnormal radio waves should be resolved first.

[0283] (18) An unauthorized radio wave detection error is set when the number of detections by the radio wave sensor D19 reaches a predetermined number (for example, 10 times). This prevents the setting of an unauthorized radio wave detection error due to a false detection by the radio wave sensor D19. Therefore, it is possible to prevent the taking of measures in response to an unauthorized radio wave detection error even when no radio waves that could have a predetermined effect on the detections by the first start sensor D11, the second start sensor D12, and the count sensor D13 are actually being generated. In other words, it is possible to prevent the measures from being wasted.

[0284] (19) When the frame control board 82 and the game control board 80 are not connected in a predetermined combination, the combination of the frame side verification code and the board side verification code is verified as not being a predetermined combination, and the game control board 80 does not receive response information to the startup information, so a frame board communication error is detected. The frame board communication error is not resolved until the power is restored. Therefore, when the frame control board 82 and the game control board 80 are not connected in a predetermined combination, game play can be prevented until the power supply is cut off, and it is possible to prompt the power supply to be cut off.

[0285] (20) After a frame board communication error is set, even if the frame board communication error is cleared by power recovery, if the frame control board 82 and the game control board 80 are not connected in a predetermined combination, a verification process is performed after power is turned on to verify whether the combination of the frame side verification code and the board side verification code is a predetermined combination. If the combination of the frame side verification code and the board side verification code is not a predetermined combination, the frame control board 82 does not send response information to the startup information to the game control board 80, and the game control board 80 sets the frame board communication error again. In other words, even if the frame board communication error is cleared by power recovery, if the frame control board 82 and the game control board 80 are not connected in a predetermined combination, it will be set again after power is turned on. If a frame board communication error is set, an error notification is executed by the alarm device ES. Therefore, if the frame control board 82 and the game control board 80 are not connected in a predetermined combination, even if the power is restored, the frame board communication error notification can be repeatedly executed until the frame control board 82 and the game control board 80 are connected in a predetermined combination. Therefore, even if the power is repeatedly restored, if the frame control board 82 and the game control board 80 are not connected in a predetermined combination, it is possible to make it easier for a person performing maintenance to understand that the frame control board 82 and the game control board 80 are not connected in a predetermined combination.

[0286] (21) The second ball count display unit 17 serves both as a means for displaying information that can identify the second control ball count PB and as a means for displaying an error code. The performance display monitor 82d also serves both as a means for displaying a base value and as a means for displaying an error code. By using a single display unit to display multiple pieces of information in this way, the configuration of the pachinko gaming machine 10 can be simplified.

[0287] (22) In order to cancel the supply mechanism error setting, the error cancel switch 82f must be operated for a predetermined time td (for example, 2 seconds). Therefore, the error can be canceled by someone who understands how to cancel the setting, such as a maintenance worker.

[0288] (23) The frame control board 82 does not count the number of detections by the supply inlet sensor D22 and the number of detections by the supply outlet sensor D23 until it receives startup information. In other words, the frame control board 82 does not execute control related to the setting of a supply mechanism error until it inputs startup information. When startup information is not received, the frame control board 82 is unable to identify the information required for startup, making it difficult to determine whether the information received by the frame control board 82 is correct. Because the frame control board 82 executes control related to the setting of a supply mechanism error after receiving startup information, it is possible to increase the reliability of the supply mechanism error being set.

[0289] (24) The player's ball count (second managed ball count PB) is decremented each time a ball is fired into the play area 20a. Normally, the number of game balls fired into the play area 20a (the number of shots Pf) and the number of game balls collected by the winning slot 30a, non-winning slot 30b, and foul slot 30c (the number of collected Pg) should not differ significantly, except for the number of game balls that flow down the play area 20a. If the difference between the number of shots Pf and the number of collected Pg exceeds a certain number (e.g., 100), it can be assumed that some kind of abnormality has occurred or that cheating is taking place. The winning ball count abnormality error setting is not canceled unless the power supply is stopped or restarted, preventing the winning ball count abnormality error from being canceled without the gaming machine administrator or other personnel being aware of its setting. This makes it easier to check for fraudulent activity.

[0290] (25) If the number of collected balls Pg is smaller than the number of shots Pf, it is assumed that game balls are stuck in the game area 20a. The pachinko game machine 10 does not cancel the winning ball count abnormality error even if the cause of the winning ball count abnormality error is resolved. This makes it easier to check, for example, whether a situation in which game balls are stuck in the game area 20a has occurred.

[0291] The above-described embodiment can be modified as follows: The above-described embodiments and the following modifications can be combined with each other to the extent that no technical contradiction occurs.

[0292] In this embodiment, the frame-side verification code does not have to be information that can identify the manufacturer of the CPU 82a. For example, the frame-side verification code may be information that can identify the manufacturer of the frame control board 82. Similarly, the board-side verification code does not have to be information that can identify the manufacturer of the CPU 80a. For example, the board-side verification code may be information that can identify the manufacturer of the game control board 80. In this case, for example, if the manufacturer of the frame control board 82 and the manufacturer of the game control board 80 are the same manufacturer, the frame-side verification code and the board-side verification code may be predetermined to match. Furthermore, for example, the frame-side verification code may be information that can identify the manufacturer of the frame 11 in the pachinko gaming machine 10. Similarly, the board-side verification code may be information that can identify the manufacturer of the game board 20 in the pachinko gaming machine 10. In this case, for example, if the manufacturer of the frame 11 and the game board 20 are the same manufacturer, the frame-side verification code and the board-side verification code may be predetermined to match. Then, the CPU 82a may determine whether the board-side verification code and the frame-side verification code match in the verification process.

[0293] In this embodiment, the matching process is performed by the CPU 82a, but the CPU 80a may also perform the matching process. In this case, when power supply to the pachinko gaming machine 10 is started, the frame control board 82 may transmit a frame matching code to the gaming control board 80. The CPU 80a may then determine whether the received frame matching code matches the board matching code stored in the ROM 80b. If the frame matching code matches the board matching code, the CPU 80a may transmit response information to the frame control board 82. On the other hand, if the frame matching code does not match the board matching code, the CPU 80a may not transmit response information to the frame control board 82. Alternatively, if the frame matching code does not match the board matching code, the CPU 80a may transmit information to the frame control board 82 that identifies that the frame matching code does not match the board matching code. Furthermore, if the frame-side verification code and the board-side verification code do not match, the CPU 80a may set a frame board communication error.

[0294] In this embodiment, the frame-side verification code does not have to be stored in the ROM 82b. For example, when power supply is started, an external management device connected to the management unit 100 may transmit the frame-side verification code to the frame control board 82 via the management unit 100, and the frame-side verification code may be stored in the RAM 82c. Then, in the verification process, the CPU 82a may determine whether the board-side verification code received from the game control board 80 matches the frame-side verification code stored in the RAM 82c.

[0295] In this embodiment, assuming that the frame control board 82 is equipped with a verification unit, the frame control board 82 may be capable of receiving startup information including a board verification code after a predetermined standby time has elapsed since power supply was started. In this case, the gaming control board 80 may transmit the startup information to the frame control board 82 after the predetermined standby time has elapsed since power supply was started. When the frame control board 82 receives the board verification code, the CPU 82a may verify whether the combination of the frame verification code and the received board verification code is a predetermined combination. In this manner, the frame control board 82 is capable of receiving startup information after a predetermined standby time has elapsed since power supply was started, and the gaming control board 80 transmits the startup information to the frame control board 82 after the predetermined standby time has elapsed since power supply was started. In this case, after power supply is started, when startup information including a board-side matching code is transmitted from the game control board 80 to the frame control board 82, the frame control board 82 is capable of receiving the startup information, making it easier for the frame control board 82 to reliably receive the startup information.

[0296] In this embodiment, in the processing of steps S103 and S104 of the matching process, even if the board-side matching code and the frame-side matching code do not match, the board-side matching code and the frame-side matching code may be identified as a predetermined combination. In this case, for example, the board-side matching code of the first manufacturer may be set to "101" and the frame-side matching code of the first manufacturer may be set to "201," and the combination of the board-side matching code of the first manufacturer and the frame-side matching code of the first manufacturer may be a predetermined combination. In such a case, even if the board-side matching code and the frame-side matching code do not match, a matching flag may be stored as long as they are a predetermined combination.

[0297] In the present embodiment, the CPU 82a can determine whether the frame control board 82 and the game control board 80 are connected in a predetermined combination by checking whether the frame-side verification code and the board-side verification code match, but this is not limited to this. For example, after power supply is started, the CPU 82a may determine whether the frame control board 82 and the game control board 80 are connected in a predetermined combination based on whether a predetermined message is received from the game control board 80 as startup information.

[0298] In this embodiment, the CPU 82a may transmit response information to the startup information to the gaming control board 80 even if the frame-side verification code and the board-side verification code do not match in the verification process and are determined to be not a predetermined combination. In this case, the response information to the startup information may include information that can identify that the frame-side verification code and the board-side verification code are not a predetermined combination. Furthermore, the CPU 82a may transmit the response information to the startup information to the gaming control board 80, and then transmit information that can identify that the frame-side verification code and the board-side verification code are not a predetermined combination to the gaming control board 80 separately from the response information to the startup information.

[0299] In this embodiment, if the CPU 82a determines in the matching process that the combination of the frame matching code and the board matching code is not a predetermined combination, the CPU 81a may issue a dedicated notification that identifies that the combination of the frame matching code and the board matching code is not a predetermined combination. In this case, the CPU 82a may transmit information that identifies that the combination of the frame matching code and the board matching code is not a predetermined combination to the performance control board 81. The CPU 81a may, for example, display a notification image on the notification display unit 19 that resembles a character string that identifies that the combination of the frame matching code and the board matching code is not a predetermined combination. The CPU 81a may also, for example, output a sound from the notification audio unit 12 that identifies that the combination of the frame matching code and the board matching code is not a predetermined combination. Furthermore, the CPU 81a may, for example, cause the notification light-emitting unit 14 to issue a notification using a dedicated light-emitting pattern for when the combination of the frame matching code and the board matching code is not a predetermined combination.

[0300] In this embodiment, when multiple types of errors are set, the CPU 81a may cause the notification display unit 19 to execute multiple error notifications. For example, when an unauthorized radio wave detection error and a frame board communication error are set, the notification display unit 19 may display both an image EG2, which indicates that an unauthorized radio wave detection error has occurred, and an image EG1, which indicates that a frame board communication error has occurred. In this case, the area in the image display area 19a of the notification display unit 19 where the image EG2 is displayed may be larger than the area where the image EG1 is displayed. In other words, when multiple error notifications are executed simultaneously, the display area for the error notification with the higher priority may be larger. Therefore, since errors with higher priority are more easily noticed, the notification of the error with the higher priority is executed first.

[0301] In this embodiment, when various error notifications are made by the notification device ES, the time for making the error notification may vary depending on the notification means constituting the notification device ES. For example, the error notification by the notification display unit 19 and the notification light-emitting unit 14 may be continued until the error is resolved, while the error notification by the notification audio unit 12 may end after a predetermined time has elapsed.

[0302] In this embodiment, when the alarm device ES issues various error alerts and displays error codes on the second ball count display unit 17 and performance display monitor 82d, the period during which the alarm device ES issues the error alert and the period during which the error codes are displayed on the second ball count display unit 17 and performance display monitor 82d may be different. For example, the display of the error code on the second ball count display unit 17 and performance display monitor 82d may start earlier than the alarm device ES starts the error alert. Alternatively, the display of the error code on the second ball count display unit 17 and performance display monitor 82d may start later than the alarm device ES starts the error alert. For example, the display of the error code on the second ball count display unit 17 and performance display monitor 82d may end earlier than the error alert ends. Alternatively, the display of the error code on the second ball count display unit 17 and performance display monitor 82d may end later than the error alert ends. For example, the timing at which the error notification by the notification device ES starts and the timing at which the second ball count display unit 17 and the performance display monitor 82d start displaying the error code may be the same. Also, the timing at which the error notification by the notification device ES ends and the timing at which the second ball count display unit 17 and the performance display monitor 82d end displaying the error code may be the same.

[0303] In this embodiment, the fixed amount reached state may be a type of error. In other words, the types of errors detected by the frame control board 82 may include errors that can be identified as the fixed amount reached state.

[0304] In this embodiment, the counting of the specific number of balls may be performed by the game control board 80, and the specific number of balls may be stored in the RAM 80c. In this embodiment, the specific number of balls stored in the RAM 82c may be backed up. When the contents stored in the RAM 82c are initialized, the specific number of balls may be set to an initial value (0).

[0305] In this embodiment, the notification of the fixed amount reached state may have a higher notification priority than all error notifications. Furthermore, the notification of the fixed amount reached state may have a higher notification priority than notifications of some errors. For example, the notification of the fixed amount reached state may have a higher notification priority than a supply mechanism error notification, and the notification of the fixed amount reached state may have a lower notification priority than a managed gaming machine communication error.

[0306] In this embodiment, the game ball may be set to be released when any or all of the following errors are set: a frame board communication error, a supply mechanism error, and a door open error.

[0307] In this embodiment, when any or all of the following errors are set: unauthorized radio wave detection error, communication error within the managed gaming machine, frame disconnection error, main disconnection error, number of gaming balls clear error, and abnormal number of winning balls error, the gaming balls may not be able to be released.

[0308] In this embodiment, the radio wave sensor D19 may be capable of detecting radio waves that may have a certain effect on the detection by the foul sensor D21 and the out sensor D30. In this embodiment, errors detected in the pachinko gaming machine 10 may include other errors in addition to the errors shown in FIG. 13. For example, when vibration exceeding a predetermined strength is applied to the pachinko gaming machine 10, a vibration error caused by the vibration may be detected. In this case, the alarm device ES may issue a vibration error alarm. Furthermore, a frame board communication error alarm may be given priority over a vibration error alarm, or a vibration error alarm may be given priority over a frame board communication error alarm.

[0309] In this embodiment, when a frame board communication error is set, the main information in RAM 80c may not be initialized. In this case, if a variable game is running when the frame board communication error is set, the variable game may be interrupted while the frame board communication error is set, and the interrupted variable game may be resumed when the frame board communication error is cleared. Furthermore, the variable game may be executed even while the frame board communication error is set. In this case, for example, the notification display unit 19 may be configured to prioritize the frame board communication error notification over the performance game.

[0310] In this embodiment, when the execution of a game is restricted, the normal game may not be executed and a normal winning game may not be awarded. In this embodiment, the communication number included in the startup information may not be a fixed value (for example, 0) but may be updated depending on the number of times the startup information is transmitted.

[0311] In this embodiment, the communication serial number included in the startup information may be information that can identify that the board-side verification code has been transmitted. The CPU 82a may then be able to identify that the board-side verification code has been received by receiving the communication serial number included in the startup information.

[0312] In this embodiment, the startup information may include information related to the CPU 80a in addition to the ID number, board-side verification code, and communication serial number of the CPU 80a. For example, it may include information that can identify the manufacturer of the game control board 80 that includes the CPU 80a, or it may include information that can identify the manufacturer of the game control board 80 that includes the CPU 80a. Furthermore, the startup information does not necessarily include either or both of the ID number and communication serial number of the CPU 80a.

[0313] In this embodiment, the error code may not be included in the game information, and may be transmitted from the game control board 80 to the frame control board 82 separately from the game information. In the present embodiment, information capable of identifying an error detected in the pachinko gaming machine 10 (for example, a board error command and a frame error command) may be transmitted to the management unit 100. In this case, the management unit 100 may transmit the information capable of identifying an error detected in the pachinko gaming machine 10 to an external management device connected to the management unit 100.

[0314] In this embodiment, in addition to matching the frame-side verification code with the board-side verification code, the first information stored in ROM 82b may be matched with the second information stored in ROM 80b to determine whether the combination of the frame control board 82 and the game control board 80 is a predetermined combination. In this case, for example, the first information may be information that can identify the manufacturer of the frame 11, and the second information may be information that can identify the manufacturer of the game board 20. Also, the first information may be information that can identify the manufacturer of the frame control board 82, and the second information may be information that can identify the manufacturer of the game control board 80.

[0315] In this embodiment, the condition for canceling the frame board communication error may be that the power supply to the pachinko gaming machine 10 is cut off and the RAM clear switch 82h is operated before the power is turned on. In other words, the condition for canceling the frame board communication error may be that the contents stored in the RAM 80c are initialized.

[0316] In this embodiment, the frame board communication error notification may end when a predetermined notification time has elapsed, even if the power is not turned off. In this embodiment, the error code may be transmitted when some of the errors detected in the pachinko gaming machine 10 occur. For example, an error code may be transmitted when an unauthorized radio wave detection error and a main line disconnection error occur.

[0317] In this embodiment, when a frame board communication error is detected in the game control board 80, an error code may be transmitted from the game control board 80 to the frame control board 82. In this case, the CPU 82a may control the second ball count display unit 17 and the performance display monitor 82d to notify information that can identify the occurrence of a frame board communication error based on the error code of the frame board communication error.

[0318] In this embodiment, different errors may be detected when the combination of the frame verification code and the board verification code is not a predetermined combination, and when communication between the gaming control board 80 and the frame control board 82 is not possible even if the combination of the frame verification code and the board verification code is a predetermined combination. In this case, a frame board communication error may be detected when the combination of the frame verification code and the board verification code is not a predetermined combination. On the other hand, when communication between the gaming control board 80 and the frame control board 82 is not possible even if the combination of the frame verification code and the board verification code is a predetermined combination, a dedicated error (e.g., a communication failure error) that can identify the inability to communicate between the gaming control board 80 and the frame control board 82 may be detected.

[0319] In this embodiment, if the combination of the frame-side verification code and the board-side verification code is not a predetermined combination, the CPU 82a may issue a notification indicating that the combination of the frame-side verification code and the board-side verification code is not a predetermined combination. In this case, for example, a dedicated error code may be displayed on either or both of the second ball count display unit 17 and the performance display monitor 82d as information indicating that the combination of the frame-side verification code and the board-side verification code is not a predetermined combination. In addition to or instead of this, the audio notification unit 13 may issue an audio notification indicating that the combination of the frame-side verification code and the board-side verification code is not a predetermined combination.

[0320] In this embodiment, the RAM 80c may be capable of storing information relating to the progress of a game, and may be capable of retaining all of the stored information even after the power supply to the pachinko gaming machine 10 is cut off. In other words, the RAM 80c may be capable of storing information relating to the progress of a game, and may be capable of retaining at least a portion of the stored information even after the power supply to the pachinko gaming machine 10 is cut off.

[0321] In this embodiment, even if a managed gaming machine internal communication error or a frame board communication error is set, the machine may be in a countable state as long as the necessary power is supplied and the second managed ball count PB is not 0. When a managed gaming machine internal communication error or a frame board communication error is set, there is a risk that the game cannot be played normally. In such a situation, if the player's ball count cannot be transferred to the management unit 100, problems may arise. In this modified example, even in such a case, the machine is in a countable state, so that counting operations can be performed using the counting operation unit 18, and the player's ball count can be transferred from the pachinko gaming machine 10 to the management unit 100.

[0322] In this embodiment, the error notification in the performance display monitor 82d may start at different times than the error notification in the second ball count display unit 17. For example, the second ball count display unit 17 may be configured to start an error notification earlier than the performance display monitor 82d, and the performance display monitor 82d may be configured to start an error notification earlier than the second ball count display unit 17.

[0323] In this embodiment, the timing at which the performance display monitor 82d starts displaying the error code may be the same as or approximately the same as the timing at which the notification device ES starts notifying the error. Also, the timing at which the performance display monitor 82d starts displaying the error code may be earlier than the timing at which the notification device ES starts notifying the error.

[0324] In this embodiment, the error notification mode executed by the notification sound unit 12 may be different depending on the error, and may be a dedicated sound for each error. In this embodiment, the error notification mode executed by the notification light-emitting unit 14 may be different depending on the error, and may be a dedicated light-emitting pattern for each error.

[0325] In this embodiment, the CPU 82a may set a supply mechanism error when it detects that the difference between the number of balls at the supply inlet and the number of balls at the supply outlet has reached a predetermined number and the difference remains equal to or greater than the predetermined number for a predetermined period of time. Note that counting the predetermined number also includes measuring time.

[0326] In this embodiment, the CPU 82a may set an abnormal winning ball count error when the difference between the number of shots Pf and the number of collected balls Pg remains equal to or greater than the specified number for a specified period of time after detecting that the difference between the number of shots Pf and the number of collected balls Pg has reached a specified number. Note that counting the specified number also includes measuring time.

[0327] In this embodiment, the CPU 82a increments the recovered number Pg in response to detection by the out sensor D30, but does not necessarily increment the recovered number Pg in response to detection by the foul sensor D21. That is, the recovered number Pg may be incremented based only on out balls, excluding returned balls. The possibility of a returned ball occurring when game balls are continuously shot is extremely small. In other words, it is unlikely that a large number of returned balls will occur consecutively in a short period of time. For this reason, returned balls do not need to be taken into consideration when detecting an abnormal winning ball count error. Alternatively, in the case of a pachinko game machine whose structure does not allow for the occurrence of returned balls (for example, a type in which game balls are shot from the upper left of the game board 20), an abnormal winning ball count error may be set based on the number of shots Pf and out balls.

[0328] In this embodiment, out balls may be detected by the winning path count sensor D25 and the non-winning path count sensor D26 instead of the out sensor D30. The number of out balls may be calculated by adding up the number detected by the winning path count sensor D25 and the number detected by the non-winning path count sensor D26. In this case, the out sensor D30 may or may not be provided.

[0329] In this embodiment, the winning passage count sensor D25 and the non-winning passage count sensor D26 may not be provided, and the discharged gaming balls may be detected only by the out sensor D30. In this embodiment, the out sensor D30 may be provided on the game board 20 or on the frame 11.

[0330] In this embodiment, the CPU 82a or the CPU 80a may detect an error even during the ball removal state. In this embodiment, the CPU 80a increments the number of radio wave detections when the radio wave detection signal of the radio wave sensor D19 transitions from an OFF state to an ON state, but this is not limited to this. The CPU 80a may increment the number of radio wave detections each time the radio wave detection signal of the radio wave sensor D19 transitions from an OFF state to an ON state and the ON state is maintained for a predetermined time (for example, one second). As an example, the CPU 80a may set an unauthorized radio wave detection error if the radio wave detection signal of the radio wave sensor D19 transitions from an OFF state to an ON state and the ON state remains for a predetermined number of times (for example, 10 times).

[0331] In this embodiment, when the counting operation unit 18 is operated, the CPU 82a may transmit control information (hereinafter referred to as a counting operation command) to the gaming control board 80, which indicates that the counting operation unit 18 has been operated and can identify the second managed ball count PB. The gaming control board 80 (CPU 80a) may transmit the counting operation command to the presentation control board 81. Upon receiving the counting operation command, the presentation control board 81 may control the notification audio unit 12 to output a sound effect. For example, when the presentation control board 81 receives a counting operation command that can identify that the second managed ball count PB is 1 or more, the presentation control board 81 may execute the operation in a manner that causes the notification audio unit 12 to output a sound that can identify that a predetermined number of balls or more have been transferred from the pachinko gaming machine 10 to the management unit 100, such as a human voice reading the string "Counting." As an example, when the performance control board 81 receives a counting operation command that can identify that the second managed ball count PB is 0, it may execute the command in a manner that outputs from the notification sound unit 12 a sound that can identify that the number of balls held will not be transferred from the pachinko game machine 10 to the management unit 100, such as a human voice reading out the string of characters ``You have no balls.''

[0332] In this embodiment, the pachinko gaming machine 10 can adopt a specification that provides a high probability state until the next jackpot game, a specification that provides a high probability state until a jackpot lottery is won (a so-called tumble machine), or a specification that provides a high probability state until a specified number of variable games have been completed (a so-called ST machine). The pachinko gaming machine 10 can adopt a specification that provides a high probability state on the condition that the gaming ball passes through a specific area (a so-called V-variable machine). The pachinko gaming machine 10 may also have a specification that combines the specifications of a tumble machine and a V-variable machine.

[0333] In this embodiment, in addition to the big win lottery, a small win lottery may be held as the winning lottery for the special symbol. If a small win is won in the winning lottery, a small win game (winning game) is awarded after the special game ends. In this embodiment, the system may be configured to be controllable to a state (so-called small win rush) in which the number of times (frequency) a small win is won per unit time or the number of times (frequency) a small win game is awarded per unit time is increased compared to a normal game state (for example, a low probability, low ball entry rate state).

[0334] In this embodiment, the pachinko gaming machine 10 may adopt a specification classified as the second type, also known as a "wing type" or "airplane type." In this type of pachinko gaming machine, when a gaming ball enters the starting hole, the opening and closing blades (opening and closing members) of the ball entry device (big prize entry hole) open, and the gaming ball that entered the ball entry device enters the special prize entry hole, thereby generating a big win game.

[0335] In this embodiment, the CPU 80a, ROM 80b, RAM 80c, and random number generation circuit 80d may be configured on a single chip, and the CPU 82a, ROM 82b, and RAM 82c may be configured on a single chip.

[0336] In this embodiment, the specific configuration of the game board 20 may be changed arbitrarily. In this embodiment, the performance control board 81 may be used as a sub-general control board, and a display control board that specializes in controlling the notification display unit 19, a light-emitting control board that specializes in controlling the notification light-emitting unit 14, and a sound control board that specializes in controlling the notification sound unit 12 may be provided separately from the performance control board 81. Such a sub-general control board and boards that control other performances may be combined together to form a sub-board. Also, in this embodiment, the CPU 80a and CPU 81a may be mounted on a single board. Also, the display control board, light-emitting control board, and sound control board may be arbitrarily combined to form a single or multiple boards.

[0337] In this embodiment, the performance display monitor 82d does not have to be provided on the frame control board 82. The performance display monitor 82d may be provided on a board separate from the frame control board 82. In this case, the frame control board 82 may be connected to the performance display monitor 82d. The CPU 82a may be configured to be able to control the display content of the performance display monitor 82d.

[0338] In this embodiment, the gaming machine is configured to circulate all of a predetermined amount of gaming media (for example, gaming balls), but this is not limited to this, and the gaming machine may be configured so that some or all of the gaming media can be exchanged for gaming media outside the gaming machine.

[0339] In this embodiment, the pachinko gaming machine 10 may be provided with a magnetic sensor in one or both of the mounting frame 11b and the gaming board 20. This configuration makes it possible to detect magnetic foreign objects that should not be present in the pachinko gaming machine 10. It is also possible to detect the possibility of the use of goto tools such as magnets and wires that do not fall under the category of gaming media normally used in the pachinko gaming machine 10. It can also contribute to the detection of acts such as intentionally creating a pile of gaming balls using magnetic gaming balls and magnets.

[0340] In this embodiment, the entire distribution mechanism 29 is formed on the mounting frame 11b, but a part of it may be formed on the game board 20. In other words, the game board 20 may constitute a part of the distribution mechanism 29.

[0341] Next, the technical ideas that can be understood from the above-described embodiment and modified examples will be additionally described below. (i) A gaming machine in which the first identification information is information that can identify the manufacturer of a CPU that executes a specified control program in the first control means, and the second identification information is information that can identify the manufacturer of a CPU that functions as the gaming control unit and executes a specified control program in the second control means.

[0342] (b) The matching unit is provided in the first control means, and when power supply is started, the second control means transmits special information including the second specific information to the first control means, and when the first control means receives the special information, the matching unit matches whether the combination of the first specific information and the second specific information included in the received special information is a predetermined combination.

[0343] (c) The matching unit is provided in the first control means, and when power supply is started, the second control means transmits special information including the second identification information to the first control means, and when the first control means receives the special information, the matching unit checks whether the combination of the first identification information and the second identification information included in the received special information is a predetermined combination, and if the combination of the first identification information and the second identification information is a predetermined combination, transmits predetermined response information to the second control means.

[0344] (d) A gaming machine in which, when power supply is started, the notification means is capable of executing a predetermined notification, and when the execution of the predetermined notification is not restricted, the notification mode of the notification means becomes a first mode, and when the execution of the predetermined notification is restricted, the notification mode of the notification means becomes a second mode, and when power supply is started, if the combination of the first specific information and the second specific information is a predetermined combination, the execution of the predetermined notification is not restricted and the notification mode of the notification means becomes the first mode, and when power supply is started, if the combination of the first specific information and the second specific information is not a predetermined combination, the execution of the predetermined notification is restricted and the notification mode of the notification means becomes the second mode, and when power supply is started, even if the combination of the first specific information and the second specific information is a predetermined combination, if a specific error occurs, the execution of the predetermined notification is restricted and the notification mode of the notification means becomes the second mode.

[0345] (e) The second control means includes a game memory unit capable of storing information regarding the progress of a game and capable of retaining at least some of the stored information even after the power supply to the gaming machine is cut off, a game control unit that executes control regarding the progress of a game, and a second information memory unit that stores second identification information, and the information stored in the game memory unit includes information regarding the number of reserved variable games, and in a situation where there are reserved variable games, the power supply to the gaming machine is cut off and after the power supply to the gaming machine is resumed, if the combination of the first identification information and the second identification information is matched to a predetermined combination, the variable games that were reserved before the power supply to the gaming machine was cut off can be executed based on the information regarding the number of reserved variable games, and if the combination of the first identification information and the second identification information is not matched to a predetermined combination, the variable games that were reserved before the power supply to the gaming machine was cut off will not be executed.

[0346] (F) A gaming machine capable of storing the number of game balls as data and configured to enable a game to be played based on the data, comprising first control means, second control means, and notification means capable of issuing a notification, the first control means and the second control means being connected to be able to communicate bidirectionally, the first control means having a data storage unit for storing the data and a first information storage unit for storing first identification information, the second control means having a game control unit for executing control regarding the progress of the game and a second information storage unit for storing second identification information, and when power supply is started, A gaming machine in which a combination of specific information and the second specific information is compared by a comparison unit provided in the gaming machine to see if it is a predetermined combination, and the notification mode of the notification means differs between when the combination of the first specific information and the second specific information is a predetermined combination and when the combination of the first specific information and the second specific information is not a predetermined combination, and when communication between the first control means and the second control means is not p...

Claims

1. A gaming machine that can store the number of game media as data and can play games based on the data, A first control unit; A second control unit; a notification means capable of issuing a notification, the first control unit and the second control unit are connected to each other so as to be able to communicate bidirectionally; the first control unit includes a data storage unit that stores the data and a first information storage unit that stores first identification information, The second control unit includes a game control unit that executes control regarding the progress of the game and a second information storage unit that stores second identification information, When power supply is started, a matching unit provided in the gaming machine checks whether the combination of the first identification information and the second identification information is normal, a notification mode of the notification means differs depending on whether the combination of the first identification information and the second identification information is normal or abnormal; When communication between the first control unit and the second control unit is not possible, and when a combination of the first identification information and the second identification information is abnormal, the notification mode of the notification means may be a specific notification mode, a notification control unit that controls the notification means, The notification control unit is communicably connected to the second control unit and is capable of controlling the notification means based on instructions from the second control unit.

2. A gaming machine that can store the number of game media as data and can play games based on the data, A first control unit; A second control unit; a notification means capable of issuing a notification, the first control unit and the second control unit are connected to each other so as to be able to communicate bidirectionally; the first control unit includes a data storage unit that stores the data and a first information storage unit that stores first identification information, The second control unit includes a game control unit that executes control regarding the progress of the game and a second information storage unit that stores second identification information, When power supply is started, a matching unit provided in the gaming machine checks whether the combination of the first identification information and the second identification information is normal, the collation unit is provided in the first control unit, When power supply is started, the second control unit transmits special information including the second identification information to the first control unit, When the first control unit receives the special information, the matching unit checks whether a combination of the first identification information and the second identification information included in the received special information is normal, and if the combination of the first identification information and the second identification information is normal, sends predetermined response information to the second control unit; a notification mode of the notification means differs depending on whether the combination of the first identification information and the second identification information is normal or abnormal; a notification control unit that controls the notification means, the notification control unit is communicably connected to the second control unit and is capable of controlling the notification means based on an instruction from the second control unit; A gaming machine in which, after power supply has started, if the second control unit receives the specified response information, a specific notification is executed by the notification means, and if the second control unit does not receive the specified response information, the specific notification is not executed by the notification means.

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