Receiver
The receiver design addresses power consumption challenges by using analog and digital orthogonal frequency conversions to minimize ADCs, maintaining SNR and reducing circuit size, with optional configurations for improved signal quality and power efficiency.
Patent Information
- Application Number
- JP2022547418
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-09-09
- Filing Date
- 2021-07-14
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2041-07-14
AI Technical Summary
Conventional receivers using the low-IF method face challenges in reducing power consumption while maintaining signal-to-noise ratio (SNR) due to the necessity of both ADCs for in-phase and quadrature components, which is undesirable.
A receiver design that performs analog orthogonal frequency conversion, utilizing an analog complex filter with one output terminal connected to an ADC, and a digital circuit for digital orthogonal frequency conversion, allowing only one of the in-phase or quadrature signals to be converted into a digital signal, thereby reducing power consumption and circuit size.
The proposed design achieves similar SNR to conventional methods while reducing power consumption and circuit size by minimizing the number of ADCs, with optional configurations to improve signal quality or switch between modes for power savings.
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Abstract
Description
[Technical Field]
[0001] The present technology relates to a receiver, and more particularly to a receiver that performs quadrature detection. [Background technology]
[0002] Orthogonal frequency conversion has been used in wireless receivers for improving SNR (Signal-Noise Ratio). For example, a receiver including a pair of mixers, an analog complex filter, a pair of ADCs (Analog-to-Digital Converters), and a digital frequency conversion circuit has been proposed (see, for example, Patent Document 1). In this receiver, the pair of mixers converts an RF (Radio Frequency) signal into an in-phase component and a quadrature component, and supplies the resulting complex signal to the analog complex filter as an IF (Intermediate Frequency) signal. The pair of ADCs converts each of the in-phase and quadrature components that have passed through the analog complex filter to analog-to-digital (AD) conversion, and the digital frequency conversion circuit downconverts the digital IF signal to a baseband signal. This method of converting an RF signal into an IF signal and then into a baseband signal is called a low-IF method or a superheterodyne method. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-199554 Summary of the Invention [Problem to be solved by the invention]
[0004] The above-mentioned conventional technology uses a low-IF method to suppress interference and improve stability and sensitivity. However, it is difficult to reduce power consumption in the above-mentioned receiver. If one of the pair of ADCs is removed to reduce power consumption, only one of the in-phase and quadrature components can be AD converted, which is undesirable because it reduces the SNR.
[0005] This technology was developed in light of these circumstances, and aims to reduce power consumption in receivers that convert RF signals into IF signals. [Means for solving the problem]
[0006] The present technology has been made to solve the above-mentioned problems, and a first aspect thereof is a receiver including: an analog frequency conversion circuit that performs analog orthogonal frequency conversion on an analog signal to generate an in-phase input signal and a quadrature input signal whose phases are orthogonal to each other; an analog complex filter that generates, from the in-phase input signal and the quadrature input signal, an in-phase output signal and a quadrature output signal that include frequency components in a predetermined band and whose phases are orthogonal to each other; an analog-to-digital conversion unit that converts either the in-phase output signal or the quadrature output signal into a digital signal; and a digital circuit that performs digital orthogonal frequency conversion on the digital signal to generate an in-phase digital signal and a quadrature digital signal whose phases are orthogonal to each other, thereby achieving the effect of reducing power consumption and circuit size.
[0007] In addition, in this first aspect, the analog complex filter may include a pair of output terminals, one of which is connected to the analog-to-digital converter and the other of which is open, thereby achieving an effect that only one of the in-phase output signal and the quadrature output signal is converted into a digital signal.
[0008] In addition, in this first aspect, the analog complex filter may include a pair of output terminals, one of which is connected to the analog-to-digital converter and the other of which is terminated, thereby providing an effect that only one of the in-phase output signal and the quadrature output signal is converted into a digital signal.
[0009] In addition, in this first aspect, a selector may be provided which selects either the in-phase output signal or the quadrature output signal and supplies the selected signal to the analog-to-digital converter, thereby producing an effect that the selected signal from the in-phase output signal and the quadrature output signal is converted into a digital signal.
[0010] In addition, in this first aspect, the digital circuit may include a digital complex filter that generates the in-phase digital signal and the quadrature digital signal from the digital signal, and a digital frequency conversion circuit that converts the frequencies of the in-phase digital signal and the quadrature digital signal, thereby achieving the effect of reducing local signals.
[0011] In addition, in this first aspect, the digital signal may include at least one of a first and a second digital signal, and the analog-to-digital conversion unit may include a first analog-to-digital converter that converts the in-phase output signal into the first digital signal in accordance with a first enable signal, and a second analog-to-digital converter that converts the quadrature output signal into the second digital signal in accordance with a second enable signal, thereby providing an effect of reducing power consumption.
[0012] In addition, in this first aspect, the digital circuit may include a switching circuit that selects at least one of the first and second digital signals, and a digital frequency conversion circuit that converts the frequency of the signal selected by the switching circuit, thereby producing an effect of converting the frequency of at least one of the first and second digital signals. [Brief explanation of the drawings]
[0013] [Figure 1] 1 is a block diagram showing an example of the configuration of a receiver according to a first embodiment of the present technology. [Figure 2] 1 is a block diagram showing an example of the configuration of an analog frequency conversion circuit according to a first embodiment of the present technology; [Figure 3] 1 is a circuit diagram showing an example of the configuration of an analog complex filter according to a first embodiment of the present technology. [Figure 4] 1 is a block diagram showing an example of the configuration of a digital circuit according to a first embodiment of the present technology. [Figure 5] FIG. 10 is a block diagram showing an example of the configuration of a receiver in a comparative example. [Figure 6] FIG. 2 is a diagram illustrating an example of the spectrum of an analog signal including noise according to the first embodiment of the present technology. [Figure 7] FIG. 2 is a diagram illustrating an example of the spectrum of a digital signal including noise according to the first embodiment of the present technology. [Figure 8] FIG. 10 is a diagram illustrating an example of the spectrum of a digital signal including noise in a comparative example. [Figure 9] 1 is a diagram illustrating an example of the spectrum of an analog signal including a disturbance signal according to a first embodiment of the present technology. [Figure 10] FIG. 2 is a diagram illustrating an example of a spectrum of a digital signal according to the first embodiment of the present technology. [Figure 11] FIG. 10 is a diagram illustrating an example of the spectrum of a digital signal in a comparative example. [Figure 12] FIG. 10 is a block diagram showing an example configuration of a receiver according to a second embodiment of the present technology. [Figure 13] FIG. 11 is a block diagram showing an example of the configuration of a receiver according to a third embodiment of the present technology. [Figure 14] FIG. 11 is a block diagram showing an example of the configuration of a digital circuit according to a third embodiment of the present technology. DETAILED DESCRIPTION OF THE INVENTION
[0014] Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described in the following order. 1. First embodiment (example of AD conversion of either the in-phase output signal or the quadrature output signal) 2. Second embodiment (example of AD conversion of a signal selected from an in-phase output signal and a quadrature output signal) 3. Third embodiment (example of AD conversion of either the in-phase output signal or the quadrature output signal in power saving mode)
[0015] <1. First embodiment> [Receiver configuration example] 1 is a block diagram showing an example configuration of a receiver 100 according to a first embodiment of the present technology. The receiver 100 receives an RF signal and includes an analog frequency conversion circuit 110, an analog complex filter 120, an analog-to-digital conversion unit 150, and a digital circuit 160. An antenna 101 is also attached to the receiver 100.
[0016] The antenna 101 converts radio waves into an analog RF signal RFin and supplies it to an analog frequency conversion circuit 110 .
[0017] The analog frequency conversion circuit 110 performs analog quadrature frequency conversion on the RF signal RFin to generate an in-phase input signal Vi and a quadrature input signal jVi, whose phases are orthogonal to each other. The analog frequency conversion circuit 110 inputs an analog complex signal including the generated in-phase input signal Vi and quadrature input signal jVi as an IF signal to the analog complex filter 120 via signal lines 118 and 119. The frequency of the IF signal is lower than that of the RF signal.
[0018] The analog complex filter 120 generates an in-phase output signal Vo and a quadrature output signal jVo, which are in quadrature phase with each other, from an in-phase input signal Vi and a quadrature input signal jVi. The analog complex filter 120 functions as a band-pass filter, and the in-phase output signal Vo and the quadrature output signal jVo each contain frequency components within a predetermined band that are passed. One of the pair of output terminals of the analog complex filter 120 is open, and only one of the in-phase output signal Vo and the quadrature output signal jVo is output. For example, only the in-phase output signal Vo is output to the analog-to-digital conversion unit 150 via a signal line 129.
[0019] The analog-to-digital conversion unit 150 converts either the in-phase output signal Vo or the quadrature output signal jVo into a digital signal. The analog-to-digital conversion unit 150 includes an ADC 151. The ADC 151 converts, for example, the in-phase output signal Vo into a digital signal DoutI and supplies it to the digital circuit 160 via a signal line 159.
[0020] The digital circuit 160 performs digital orthogonal frequency conversion on the digital signal DoutI to generate an in-phase digital signal and a quadrature digital signal whose phases are orthogonal to each other. The digital complex signal including the in-phase digital signal and the quadrature digital signal is processed as a baseband signal. The frequency of the baseband signal is lower than that of the IF signal.
[0021] The analog frequency conversion circuit 110 can be multi-staged or parallelized. The frequency of the local signal can be changed to generate an upper local signal. Circuits and elements such as amplifiers can be inserted between the analog frequency conversion circuit 110, the analog complex filter 120, and the analog-to-digital conversion unit 150.
[0022] [Analog frequency conversion circuit] 2 is a block diagram showing an example of a configuration of the analog frequency conversion circuit 110 according to the first embodiment of the present technology. The analog frequency conversion circuit 110 includes analog mixers 111 and 112, a phase shifter 113, and a local oscillator 114.
[0023] The local oscillator 114 generates a local signal LO of a predetermined local frequency. This local frequency is set to, for example, the difference between the frequencies of the RF signal and the IF signal. The local oscillator 114 supplies the local signal LO to the analog mixer 112 and the phase shifter 113.
[0024] Phase shifter 113 shifts the phase of local signal LO by 90 degrees. This phase shifter 113 supplies the local signal with a phase shift of 90 degrees as LO' to analog mixer 111. Since local signal LO and local signal LO' are orthogonal in phase to each other, if local signal LO is a sine wave (i.e., sin wave) component, local signal LO' is a cosine wave (i.e., cos wave) component.
[0025] The analog mixer 111 mixes the RF signal RFin with the local signal LO′ and inputs the result as an in-phase input signal Vi to the analog complex filter 120. The analog mixer 112 mixes the RF signal RFin with the local signal LO and inputs the result as a quadrature input signal jVi to the analog complex filter 120.
[0026] With the configuration illustrated in the figure, an analog RF signal is quadrature frequency converted into an IF signal including an in-phase input signal Vi and a quadrature input signal jVi.
[0027] [Example of analog complex filter configuration] 3 is a circuit diagram showing an example configuration of the analog complex filter 120 according to the first embodiment of the present technology. The analog complex filter 120 includes resistors 131 to 133, a capacitor 134, an operational amplifier 135, resistors 141 to 143, a capacitor 144, an operational amplifier 145, and an amplifier 146. The analog complex filter 120 also includes input terminals 121 and 122 and output terminals 123 and 124. The input terminal 121 receives an in-phase input signal Vi from the analog frequency conversion circuit 110. The input terminal 122 receives a quadrature input signal jVi from the analog frequency conversion circuit 110. The output terminal 123 is connected to the analog-to-digital conversion unit 150, and the output terminal 124 is open.
[0028] Resistor 131 is inserted between input terminal 121 and the inverting input terminal (-) of operational amplifier 135. Resistor 132 and capacitor 134 are connected in parallel between the inverting input terminal (-) and output terminal of operational amplifier 135. The non-inverting input terminal (+) of operational amplifier 135 is grounded, and the output terminal of operational amplifier 135 is connected to output terminal 123. Resistor 133 is inserted between the output terminal of operational amplifier 135 and the inverting input terminal (-) of operational amplifier 145.
[0029] Resistor 141 is inserted between input terminal 122 and the inverting input terminal (-) of operational amplifier 145. Resistor 142 and capacitor 144 are connected in parallel between the inverting input terminal (-) and output terminal of operational amplifier 145. The non-inverting input terminal (+) of operational amplifier 145 is grounded, and the output terminal of operational amplifier 145 is connected to output terminal 124 and the input terminal of amplifier 146. Resistor 143 is inserted between the output terminal of amplifier 146 and the inverting input terminal (-) of operational amplifier 135. The gain of amplifier 146 is set to a negative value (such as "-1").
[0030] With the configuration illustrated in the figure, an in-phase output signal Vo and a quadrature output signal jVo are generated from an in-phase input signal Vi and a quadrature input signal jVi. Since the output terminal 124 is open, only the in-phase output signal Vo is output from the output terminal 123. The following relational expression holds between the input signal and the output signal of this analog complex filter 120. Vo / Vi=-(R2 / R1) / {1+j(ω-ω0) / ω c )}...Formula 1 ω0=1 / CR3...Equation 2 In Equation 1, R1 is the resistance value of resistors 131 and 141. R2 is the resistance value of resistors 132 and 142. R3 is the resistance value of resistors 133 and 143. ω c represents the center frequency of the frequency band to be passed, and ω0 represents the difference between the boundary frequency of the frequency band to be passed and the center frequency.
[0031] Although the output terminal 124 of the analog complex filter 120 is open, it may be terminated by connecting a termination resistor or the like instead of being open. Also, although only the output terminal 124 is open or terminated, it is also possible to open or terminate only the output terminal 123 and output only the quadrature output signal jVo.
[0032] Furthermore, the circuitry within the analog complex filter 120 is not limited to the circuitry illustrated in the figure, as long as it can realize Equations 1 and 2.
[0033] [Digital circuit configuration example] 4 is a block diagram showing an example of a configuration of the digital circuit 160 according to the first embodiment of the present technology. The digital circuit 160 includes a digital frequency conversion circuit 161, digital filters 165 and 166, and a baseband signal processing unit 167.
[0034] The digital frequency conversion circuit 161 performs digital orthogonal frequency conversion on the digital signal DoutI to generate an in-phase digital signal Qch and a quadrature digital signal Ich, whose phases are orthogonal to each other. The digital frequency conversion circuit 161 supplies a digital complex signal including the generated in-phase digital signal Qch and quadrature digital signal Ich as a baseband signal to digital filters 165 and 166. The frequency of the baseband signal is lower than that of the IF signal.
[0035] The digital frequency conversion circuit 161 includes, for example, digital mixers 162 and 163 and a digital oscillator 164 .
[0036] The digital oscillator 164 generates local signals LO and LO' of a predetermined local frequency. This local frequency is set, for example, to the difference between the frequencies of the IF signal and the baseband signal. The phases of the local signals LO and LO' are orthogonal to each other. If the local signal LO is a sine wave (sin wave) component, the local signal LO' is a cosine wave (cos wave) component. The digital frequency conversion circuit 161 supplies the local signal LO' to the digital mixer 162, and supplies the local signal LO to the digital mixer 163. For example, a numerically controlled oscillator is used as the digital oscillator 164.
[0037] The digital mixer 162 mixes the digital signal DoutI with the local signal LO′ and supplies the result as an in-phase digital signal Qch to the digital filter 165. The digital mixer 163 mixes the digital signal DoutI with the local signal LO and supplies the result as a quadrature digital signal Ich to the digital filter 166.
[0038] Digital filters 165 and 166 pass frequency components in a predetermined band. For example, low-pass filters are used as digital filters 165 and 166. Digital filter 165 is an example of a first digital filter as defined in the claims. Digital filter 166 is an example of a second digital filter as defined in the claims.
[0039] The baseband signal processing unit 167 performs various processes such as demodulation on the baseband signals (in-phase digital signal Qch and quadrature digital signal Ich) that have passed through the digital filters 165 and 166 .
[0040] It is also possible to add circuits and elements such as amplifier circuits and filters to the digital circuit 160.
[0041] Here, a comparative example will be considered in which both the in-phase output signal Vo and the quadrature output signal jVo that have passed through the analog complex filter 120 are AD converted.
[0042] 5 is a block diagram showing an example of a configuration of a comparative example receiver 100. In the comparative example, an analog complex filter 120 outputs both an in-phase output signal Vo and a quadrature output signal jVo.
[0043] Also, an ADC 152 is added, and ADCs 151 and 152 convert the in-phase output signal Vo and the quadrature output signal jVo into digital signals DoutI and DoutQ.
[0044] Furthermore, digital mixers 162 and 163 mix local signal LO with digital signals DoutI and DoutQ to generate in-phase digital signal Qch and quadrature digital signal Ich.
[0045] As shown in the figure, the comparative example requires two ADCs. Also, in the digital circuit 160 of the comparative example, orthogonal transformation is not performed, and only frequency transformation is performed.
[0046] In contrast, as illustrated in Fig. 1, in a configuration in which the analog complex filter 120 outputs only one of the in-phase output signal Vo and the quadrature output signal jVo, the number of ADCs can be reduced compared to the comparative example. Reducing the number of ADCs allows the power consumption and circuit size of the receiver 100 to be reduced. Furthermore, the configuration in Fig. 1 can achieve an SNR similar to that of the comparative example, without significant performance degradation. The reason for this will be explained below with reference to Figs. 6 to 11.
[0047] 6 is a diagram showing an example of the spectrum of an analog signal including noise in the first embodiment of the present technology. In the diagram, "a" shows an example of the spectrum of an RF signal input to the analog frequency conversion circuit 110. In the diagram, "b" shows an example of the spectrum of an IF signal from the analog frequency conversion circuit 110. In the diagram, "c" shows an example of the spectrum of an IF signal that has passed through the analog complex filter 120.
[0048] As shown in the figure, the RF signal contains the desired signal to be extracted and noise such as thermal noise. The trapezoid in the figure represents the desired signal. Before orthogonal transformation, the spectrum of the desired signal is symmetrical with respect to the DC axis.
[0049] Then, as shown in b in the figure, the frequency is converted by the analog frequency conversion circuit 110. The dotted line in b in the figure indicates the frequency band that passes through the analog complex filter 120 in the subsequent stage.
[0050] Next, as shown in c in the figure, the signal passes through an analog complex filter 120 (in other words, a band-pass filter), whereby out-of-band noise is suppressed.
[0051] 7 is a diagram showing an example of the spectrum of a digital signal including noise in the first embodiment of the present technology. In the diagram, "a" shows an example of the spectrum of the digital signal DoutI from the ADC 151. In the diagram, "b" shows an example of the spectrum of the baseband signal from the digital frequency conversion circuit 161. In the diagram, "c" shows an example of the spectrum of the baseband signal that has passed through the digital filters 165 and 166.
[0052] As illustrated in FIG. 10A, when only the in-phase output signal Vo is converted into a digital signal DoutI, the desired signal and noise in the digital signal are symmetrical with respect to the DC axis.
[0053] Then, as shown in b in the figure, the frequency is converted by the digital frequency conversion circuit 161. The dotted line in b in the figure indicates the frequency band that passes through the digital filters 165 and 166 in the subsequent stage.
[0054] Next, as illustrated in c in the figure, the signal passes through digital filters 165 and 166 (in other words, low-pass filters), whereby the inverted out-of-band desired signal components and out-of-band noise are suppressed.
[0055] 8 is a diagram showing an example of the spectrum of a digital signal including noise in a comparative example. In the diagram, "a" shows an example of the spectrum of digital signals DoutI and DoutQ from ADCs 151 and 152. In the diagram, "b" shows an example of the spectrum of a baseband signal from digital frequency conversion circuit 161. In the diagram, "c" shows an example of the spectrum of a baseband signal that has passed through digital filters 165 and 166.
[0056] As illustrated in FIG. 1A, when both the in-phase output signal Vo and the quadrature output signal jVo are converted into digital signals, the desired signal and noise in the digital signals become asymmetric with respect to the DC axis.
[0057] Then, as shown in b in the figure, the frequency is converted by the digital frequency conversion circuit 161.
[0058] Next, as shown in c in the figure, the signal passes through digital filters 165 and 166 (in other words, low-pass filters), whereby out-of-band noise is suppressed.
[0059] As shown in Figures 7 and 8, even when only one of the in-phase output signal Vo and the quadrature output signal jVo is converted into a digital signal, the desired signal can be obtained by digital orthogonal frequency conversion while suppressing out-of-band noise, just like in the comparative example. Therefore, the SNR remains roughly the same. Furthermore, when only one of the in-phase output signal Vo and the quadrature output signal jVo is converted into a digital signal, the signal power of the digital signal is halved compared to the comparative example. However, by amplifying the signal in subsequent digital processing, it is possible to achieve signal power equivalent to that of the comparative example.
[0060] If a one-input, one-output band-pass filter were provided instead of the analog complex filter 120, and only one of the in-phase input signal Vi and the quadrature input signal jVi were passed through for AD conversion, the SNR would be lower than in the comparative example. This is because the negative frequency noise is folded back and superimposed on the positive frequency noise, doubling the noise component.
[0061] 9 is a diagram showing an example of the spectrum of an analog signal including an interference signal in the first embodiment of the present technology. In the diagram, "a" is a diagram showing an example of the spectrum of an RF signal input to the analog frequency conversion circuit 110. In the diagram, "b" is a diagram showing an example of the spectrum of an IF signal from the analog frequency conversion circuit 110. In the diagram, "c" is a diagram showing an example of the spectrum of an IF signal that has passed through the analog complex filter 120.
[0062] As shown in Fig. 1A, the RF signal includes a desired signal, noise such as thermal noise, and an interference signal. The thick solid line in Fig. 1A indicates the interference signal.
[0063] Then, as shown in b in the figure, the frequency is converted by the analog frequency conversion circuit 110.
[0064] Then, as shown in c in the figure, the signal passes through the analog complex filter 120 (band-pass filter), whereby out-of-band interference signals are suppressed.
[0065] 10 is a diagram showing an example of the spectrum of a digital signal in the first embodiment of the present technology. In the diagram, "a" is a diagram showing an example of the spectrum of the digital signal DoutI from the ADC 151. In the diagram, "b" is a diagram showing an example of the spectrum of the baseband signal from the digital frequency conversion circuit 161. In the diagram, "c" is a diagram showing an example of the spectrum of the baseband signal that has passed through the digital filters 165 and 166.
[0066] As illustrated in FIG. 10A, when only the in-phase output signal Vo is converted into a digital signal DoutI, the desired signal in the digital signal becomes symmetrical with respect to the DC axis.
[0067] Then, as shown in b in the figure, the frequency is converted by the digital frequency conversion circuit 161.
[0068] Next, as shown in c in the figure, the signal passes through digital filters 165 and 166 (low-pass filters), whereby the inverted out-of-band desired signal components are suppressed.
[0069] 11 is a diagram showing an example of the spectrum of a digital signal in a comparative example. In the diagram, "a" shows an example of the spectrum of digital signals DoutI and DoutQ from ADCs 151 and 152. In the diagram, "b" shows an example of the spectrum of a baseband signal from digital frequency conversion circuit 161. In the diagram, "c" shows an example of the spectrum of a baseband signal that has passed through digital filters 165 and 166.
[0070] As illustrated in FIG. 1A, when both the in-phase output signal Vo and the quadrature output signal jVo are converted into digital signals, the desired signal and noise in the digital signals become asymmetric with respect to the DC axis.
[0071] Then, as shown in b in the figure, the frequency is converted by the digital frequency conversion circuit 161.
[0072] Next, as shown in c in the figure, the signal passes through digital filters 165 and 166 (low-pass filters), whereby out-of-band components are suppressed.
[0073] As illustrated in FIGS. 10 and 11, even when the interference signal is taken into consideration, receiver 100 can extract only the desired signal, and the SNR is approximately the same as that of the comparative example.
[0074] As described above, in the first embodiment of the present technology, the analog-to-digital conversion unit 150 AD-converts one of the quadrature output signal jVo and the in-phase output signal Vo into a digital signal, and the digital circuit 160 performs orthogonal frequency conversion on the digital signal. This orthogonal frequency conversion makes it possible to achieve an SNR that is approximately the same as when both the quadrature output signal jVo and the in-phase output signal Vo are AD-converted. This makes it possible to reduce the number of ADCs used to AD-convert either the quadrature output signal jVo or the in-phase output signal Vo, thereby reducing the power consumption and circuit size of the receiver 100.
[0075] <2. Second embodiment> In the first embodiment described above, the analog complex filter 120 outputs only the in-phase output signal V. However, the signal quality of the in-phase output signal V may be lower than that of the quadrature output signal jV. The second receiver 100 differs from the first embodiment in that it adds a selector that selects either the in-phase output signal V or the quadrature output signal jV, thereby improving signal quality.
[0076] 12 is a block diagram showing a configuration example of a receiver 100 according to a second embodiment of the present technology. The receiver 100 according to the second embodiment differs from the first embodiment in that it further includes a register 171 and a selector 172. The analog complex filter 120 according to the second embodiment also differs from the first embodiment in that neither of the two output terminals is open (or terminated).
[0077] The register 171 holds the set value of a selection signal SEL for controlling the selector 172. The selector 172 selects either the in-phase output signal Vo or the quadrature output signal jVo in accordance with the selection signal SEL, and outputs the selected signal to the ADC 151.
[0078] The value of the register 171 is rewritten, for example, while the receiving operation of the receiver 100 is stopped (in other words, statically). Due to product variations of elements in the analog complex filter 120, the signal qualities of the in-phase output signal Vo and the quadrature output signal jVo may differ. Even in this case, there is no need to change the design, and the receiver 100 can perform AD conversion on the signal with higher signal quality simply by switching the output destination of the selector 172.
[0079] As described above, according to the second embodiment of the present technology, the selector 172 selects either the in-phase output signal Vo or the quadrature output signal jVo and outputs it to the ADC 151, so that the signal with higher signal quality can be AD converted.
[0080] <3. Third Embodiment> In the first embodiment described above, only the in-phase output signal Vo is AD converted, but in this configuration, the quadrature output signal jVo is not AD converted. The receiver 100 of this third embodiment differs from the first embodiment in that it AD converts both the in-phase output signal Vo and the quadrature output signal jVo as needed.
[0081] 13 is a block diagram showing a configuration example of a receiver 100 according to a third embodiment of the present technology. The receiver 100 according to the third embodiment differs from the first embodiment in that it further includes an ADC 152 and a register 171. Furthermore, the analog complex filter 120 according to the third embodiment differs from the first embodiment in that neither of the two output terminals is open (or terminated).
[0082] The ADC 152 is provided in the analog-to-digital conversion unit 150. The analog complex filter 120 supplies an in-phase output signal Vo to the ADC 151 and a quadrature output signal jVo to the ADC 152.
[0083] The register 171 holds the set values of an enable signal EN1 that indicates whether or not to enable the AD conversion operation of the ADC 151, and an enable signal EN2 that indicates whether or not to enable the AD conversion operation of the ADC 152. The value of the register 171 can be rewritten statically or dynamically.
[0084] When enabled by an enable signal EN1, the ADC 151 converts the in-phase output signal Vo into a digital signal DoutI and supplies it to the digital circuit 160. When enabled by an enable signal EN2, the ADC 152 converts the quadrature output signal jVo into a digital signal DoutQ and supplies it to the digital circuit 160. On the other hand, when disabled, the corresponding ADC stops its AD conversion operation. The ADC 151 is an example of a first analog-digital converter as defined in the claims. The ADC 152 is an example of a second analog-digital converter as defined in the claims.
[0085] The receiver 100 of the third embodiment is set to either a normal mode or a power-saving mode that consumes less power than the normal mode. In the normal mode, both enable signals EN1 and EN2 are enabled. On the other hand, in the power-saving mode, one of the enable signals EN1 and EN2 is enabled, and the other is disabled.
[0086] 14 is a block diagram showing an example of a configuration of a digital circuit 160 according to the third embodiment of the present technology. The digital circuit 160 according to the third embodiment differs from the first embodiment in that a switching circuit 190 is further provided.
[0087] The register 171 further holds a selection signal SEL and a mode signal MODE. The selection signal SEL is a signal for controlling the selection operation of the switching circuit 190. The mode signal MODE is a signal indicating either the normal mode or the power saving mode. The selection signal SEL is input to the switching circuit 190, and the mode signal MODE is input to the digital oscillator 164.
[0088] The switching circuit 190 selects at least one of the digital signals DoutI and DoutQ in accordance with a selection signal SEL. In normal mode, both the digital signals DoutI and DoutQ are selected by the selection signal SEL. The switching circuit 190 supplies the digital signal DoutI to the digital mixer 162 and the digital signal DoutQ to the digital mixer 163.
[0089] On the other hand, in the power saving mode, the selection signal SEL selects one of the digital signals DoutI and DoutQ. The switching circuit 190 supplies the selected signal to both the digital mixers 162 and 163.
[0090] In the normal mode, the digital oscillator 164 supplies the local signal LO to both the digital mixers 162 and 163. On the other hand, in the power saving mode, the digital oscillator 164 generates the local signals LO and LO′ whose phases are orthogonal to each other and supplies them to the digital mixers 162 and 163, respectively.
[0091] 13 and 14, by enabling only one of ADCs 151 and 152 in the power saving mode, it is possible to reduce the power consumption of the analog-to-digital conversion unit 150. Also, by enabling both ADCs 151 and 152 in the normal mode, it is possible to perform AD conversion on both the in-phase output signal Vo and the quadrature output signal jVo. This increases power consumption compared to the power saving mode, but it is possible to improve the SNR of the analog-to-digital conversion unit.
[0092] As described above, according to the third embodiment of the present technology, only one of the ADCs 151 and 152 performs AD conversion in the power saving mode, so that the power consumption of the analog-to-digital conversion unit 150 can be reduced.
[0093] Note that the above-described embodiment shows an example for realizing the present technology, and the matters in the embodiment and the matters specifying the invention in the claims correspond to each other. Similarly, the matters specifying the invention in the claims and the matters in the embodiment of the present technology having the same name correspond to each other. However, the present technology is not limited to the embodiment, and can be realized by applying various modifications to the embodiment within the scope of the gist thereof.
[0094] The effects described in this specification are merely examples and are not limiting, and other effects may also be obtained.
[0095] The present technology can also be configured as follows. (1) an analog frequency conversion circuit that performs analog quadrature frequency conversion on an analog signal to generate an in-phase input signal and a quadrature input signal whose phases are orthogonal to each other; an analog complex filter that generates, from the in-phase input signal and the quadrature input signal, an in-phase output signal and a quadrature output signal that include frequency components in a predetermined band and have mutually orthogonal phases; an analog-to-digital converter that converts either the in-phase output signal or the quadrature output signal into a digital signal; a digital circuit that performs digital orthogonal frequency conversion on the digital signal to generate an in-phase digital signal and a quadrature digital signal whose phases are orthogonal to each other; A receiver comprising: (2) the analog complex filter has a pair of output terminals; One of the pair of output terminals is connected to the analog-to-digital converter, and the other is open. The receiver according to (1) above. (3) the analog complex filter has a pair of output terminals; One of the pair of output terminals is connected to the analog-to-digital conversion unit, and the other is terminated. The receiver according to (1) above. (4) A selector is further provided for selecting either the in-phase output signal or the quadrature output signal and supplying it to the analog-to-digital conversion unit. A receiver according to any one of (1) to (3). (5) The digital circuit is a digital frequency conversion circuit that performs the digital orthogonal frequency conversion; a first digital filter that passes frequency components of the in-phase digital signal in a predetermined band; a second digital filter that passes frequency components of a predetermined band of the orthogonal digital signal; The receiver according to any one of (1) to (4), comprising: (6) the digital signal includes at least one of a first and a second digital signal; The analog-to-digital conversion unit a first analog-to-digital converter for converting the in-phase output signal into a first digital signal according to a first enable signal; a second analog-to-digital converter for converting the quadrature output signal into a second digital signal according to a second enable signal; The receiver according to (1) above, comprising: (7) The digital circuit is a switching circuit that selects at least one of the first and second digital signals; a digital frequency conversion circuit that converts the frequency of the signal selected by the switching circuit; The receiver according to (6) above, comprising: [Explanation of symbols]
[0096] 100 receivers 101 Antenna 110 Analog frequency conversion circuit 111, 112 Analog Mixer 113 Phase Shifter 114 Local Oscillator 120 Analog Complex Filter 131~133, 141~143 Resistance 134, 144 capacity 135, 145 Op-amps 146 Amplifier 150 Analog-to-digital conversion section 151, 152 ADC 160 Digital Circuits 161 Digital frequency conversion circuit 162, 163 Digital Mixer 164 Digital Oscillator 165, 166 Digital Filter 167 Baseband signal processing section 171 registers 172 Selector 180 Digital Complex Filters 190 Switching circuit
Claims
1. an analog frequency conversion circuit that performs analog quadrature frequency conversion on an analog signal to generate an in-phase input signal and a quadrature input signal whose phases are orthogonal to each other; an analog complex filter that generates, from the in-phase input signal and the quadrature input signal, an in-phase output signal and a quadrature output signal that include frequency components in a predetermined band and have mutually orthogonal phases; an analog-to-digital converter that converts either the in-phase output signal or the quadrature output signal into a digital signal; a digital circuit that performs digital orthogonal frequency conversion on the digital signal to generate an in-phase digital signal and a quadrature digital signal whose phases are orthogonal to each other; a selector that selects either the in-phase output signal or the quadrature output signal and supplies it to the analog-to-digital conversion unit; A receiver comprising:
2. The digital circuit a digital frequency conversion circuit that performs the digital orthogonal frequency conversion; a first digital filter that passes frequency components of the in-phase digital signal in a predetermined band; a second digital filter that passes frequency components of a predetermined band of the orthogonal digital signal; 2. The receiver of claim 1, comprising:
3. An analog frequency conversion circuit that performs analog quadrature frequency conversion on an analog signal to generate an in-phase input signal and a quadrature input signal whose phases are orthogonal to each other; an analog complex filter that generates, from the in-phase input signal and the quadrature input signal, an in-phase output signal and a quadrature output signal that include frequency components in a predetermined band and have mutually orthogonal phases; an analog-to-digital converter that converts either the in-phase output signal or the quadrature output signal into a digital signal; a digital circuit that performs digital orthogonal frequency conversion on the digital signal to generate an in-phase digital signal and a quadrature digital signal whose phases are orthogonal to each other; Equipped with the digital signal includes at least one of a first and a second digital signal; The analog-to-digital conversion unit a first analog-to-digital converter for converting the in-phase output signal into a first digital signal according to a first enable signal; a second analog-to-digital converter for converting the quadrature output signal into a second digital signal according to a second enable signal; A receiver comprising:
4. The digital circuit a switching circuit that selects at least one of the first and second digital signals; a digital frequency conversion circuit that converts the frequency of the signal selected by the switching circuit; 4. The receiver of claim 3, comprising:
Citation Information
Patent Citations
wireless receiver
JP2004515104A
Filter apparatus and receiving apparatus
JP2009147526A
Complex signal processing circuit, receiver circuit, and signal reproducing apparatus
JP2011199554A
Radar receiver and method for receiving a radar signal
US20200025872A1