Information processing device and packet processing method

Abstract

This information processing device has an integrated circuit that receives a packet. The integrated circuit includes: an allocation unit that is configured to assess, on the basis of the information included in the packet, whether or not to cause software to execute a process on the packet, and transfer the packet to the software when causing the software to execute the process; a processing unit that is configured to execute the process on the packet when it is assessed by the allocation unit that the software is not to be caused to execute the process; and a transfer unit that is configured to transfer the packet that is processed by the processing unit. The balance of efficiency and flexibility regarding packet-related processing is thereby improved.

Description

[Technical Field]

[0001] The present invention relates to an information processing device and a packet processing method. [Background technology]

[0002] There is a method (NFV: Network Function Virtualization) in which the functions of network devices are implemented as software (VM: Virtual machine) on a virtualization platform of a general-purpose server.

[0003] NFV technology is already being used in a variety of services because it can reduce capital costs by consolidating physical equipment.

[0004] For example, NFV allows a general-purpose server to function as a virtual gateway, which virtualizes the gateway that connects different networks.

[0005] In NFV, network packets are processed by a CPU, but because CPU processing performance is low, when traffic volume increases, a single server cannot accommodate it all, and multiple servers must be prepared, which increases equipment costs and power consumption.

[0006] Therefore, a technology has been proposed to improve transfer performance by offloading processing that is difficult for the CPU to a hardware (H / W) accelerator.

[0007] Examples of offloading methods using existing technology include: A method in which all processing is offloaded to a hardware accelerator (hereinafter referred to as "Method 1") (2) A method in which software and hardware accelerators are integrated inline on a general-purpose server (hereinafter referred to as "Method 2"). etc. [Prior art documents] [Non-patent literature]

[0008] [Non-Patent Document 1] KORONA, Mateusz, et al., "FPGA implementation of IPsec protocol suite for multigigabit networks", In: 2017 International Conference on Systems, Signals and Image Processing (IWSSIP). IEEE, 2017. p. 1-5 [Non-Patent Document 2] LI, Xiaoyao, et al., "DHL: Enabling flexible software network functions with FPGA acceleration", In: 2018 IEEE 38th International Conference on Distributed Computing Systems (ICDCS). IEEE, 2018. p. 1-11 [Non-Patent Document 3] "Advanced Networking and Security for the Most Demanding Cloud and Data Center Workloads", [online], [searched on June 22, 2022], Internet <URL:https: / / nvdam.widen.net / s / qpszhmhpzt / networking-overal-dpu-datasheet-connectx-6-dx-smartnic-<1991450> [Summary of the Invention] [Problems to be Solved by the Invention]

[0009] In Method 1, since all processing is performed by hardware, it has high performance (efficiency). However, because hardware has strict limitations on the amount of resources, it has the drawback that it cannot accommodate many functions (for example, it cannot have multiple functions such as ARP and redundancy).

[0010] Method 2 appears to be efficient because only high-load processing is handled by the hardware accelerator, but it has the disadvantage that the processing speed depends on the software because all packets pass through the software once.

[0011] The present invention has been made in view of the above points, and has as its object to improve the balance between efficiency and flexibility in packet processing. [Means for solving the problem]

[0012] In order to solve the above problem, an information processing device has an integrated circuit that receives a packet, and the integrated circuit includes a distribution unit that is configured to determine whether or not to have software execute processing on the packet based on a source and destination of the packet, and to transfer the packet to the software if the software is to execute the processing, a processing unit that is configured to execute processing on the packet if the distribution unit determines not to have the software execute the processing, and a forwarding unit that is configured to forward the packet processed by the processing unit. fruit , The integrated circuit and the software have different IP addresses and MAC addresses, and the distribution unit is configured to rewrite the destination MAC address of the packet to the MAC address of the software when causing the software to execute the process. . [Effects of the Invention]

[0013] It is possible to improve the balance between efficiency and flexibility in packet processing. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 is a diagram illustrating an example of a network configuration according to an embodiment of the present invention. [Figure 2] 1 is a diagram illustrating an example of a hardware configuration of a general-purpose server 10 according to an embodiment of the present invention. [Figure 3] FIG. 1 is a diagram for explaining an outline of the configuration of a general-purpose server 10 as a network device. [Figure 4]FIG. 10 is a diagram for explaining a modified example of the general configuration of a general-purpose server 10 as a network device. [Figure 5] FIG. 1 is a diagram for explaining a first embodiment (connection method 1). [Figure 6] FIG. 10 is a diagram showing an example of a header of a packet transferred by an opposing device 20-1 in the first embodiment. [Figure 7] FIG. 3 is a diagram illustrating an example of a configuration of a matching table according to the first embodiment. [Figure 8] FIG. 10 is a diagram illustrating an example of a received packet after the destination MAC address has been rewritten. [Figure 9] FIG. 10 is a diagram for explaining a second embodiment (connection method 2). [Figure 10] FIG. 10 is a diagram showing an example of a header of a packet transferred by an opposing device 20-1 in the second embodiment. [Figure 11] FIG. 10 is a diagram illustrating an example of the configuration of a matching table according to the second embodiment. [Figure 12] FIG. 13 is a sequence diagram illustrating an example of a processing procedure executed for ARP (ARP-2) when the H / W accelerator 12 is determined as a destination of a received packet in the fourth embodiment. [Figure 13] FIG. 13 is a sequence diagram illustrating an example of a processing procedure executed for ARP (ARP-2) when the virtual GW 11 is determined as a destination of a received packet in the fourth embodiment. [Figure 14] FIG. 13 is a diagram illustrating an example of a functional configuration of a virtual GW 11 according to the fifth embodiment. [Figure 15] FIG. 13 is a sequence diagram illustrating an example of a processing procedure executed for ARP (ARP-3) when the H / W accelerator 12 is determined as a destination of a received packet in the fifth embodiment. [Figure 16] FIG. 13 is a sequence diagram illustrating an example of a processing procedure executed for ARP (ARP-3) when the virtual GW 11 is determined as a destination of a received packet in the fifth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a diagram showing an example of a network configuration in an embodiment of the present invention. In Fig. 1, a general-purpose server 10 is one or more general-purpose computers that function as a network device (a virtual gateway that virtualizes a gateway) that connects different networks N1 and N2.

[0016] Terminal 30-1 and terminal 30-2 are devices that are the end points (starting point or ending point) of communication, and from the perspective of general-purpose server 10, one of them is the source of a packet and the other is the destination of the packet. However, the source and destination are interchanged as communication progresses. In this embodiment, a case will be described in which terminal 30-1 is the source and terminal 30-2 is the destination.

[0017] The opposite device 20-1 and the opposite device 20-2 are nodes in the network N1 or the network N2 adjacent to the general-purpose server 10. For example, the opposite device 20-1 and the opposite device 20-2 are L3 routers.

[0018] Fig. 2 is a diagram showing an example of the hardware configuration of a general-purpose server 10 according to an embodiment of the present invention. The general-purpose server 10 in Fig. 2 includes a drive device 100, an auxiliary storage device 102, a memory device 103, a CPU 104, an interface device 105, and a H / W accelerator 12, all of which are interconnected via a bus B.

[0019] A program that realizes processing in the general-purpose server 10 is provided by a recording medium 101 such as a CD-ROM. When the recording medium 101 storing the program is set in the drive device 100, the program is installed from the recording medium 101 to the auxiliary storage device 102 via the drive device 100. However, the program does not necessarily have to be installed from the recording medium 101, but may be downloaded from another computer via a network. The auxiliary storage device 102 stores the installed program as well as necessary files, data, etc.

[0020] When an instruction to start a program is received, the memory device 103 reads the program from the auxiliary storage device 102 and stores it. The CPU 104 executes functions related to the general-purpose server 10 in accordance with the program stored in the memory device 103. The interface device 105 is used as an interface for connecting to a network.

[0021] The H / W accelerator 12 is a hardware accelerator (integrated circuit) to which part of the processing executed by the CPU 104 is offloaded. For example, a field-programmable gate array (FPGA) or an application specific integrated circuit (ASIC) may be used as the H / W accelerator 12.

[0022] 3 is a diagram for explaining an outline of the configuration of a general-purpose server 10 as a network device. As shown in FIG. 3, a H / W accelerator 12 and one or more virtual GWs 11 cause the general-purpose device to function as a network device.

[0023] The H / W accelerator 12 is as described in FIG.

[0024] The virtual GW11 is a virtual gateway realized by software (program) using NFV (Network Functions Virtualization) technology, and is realized by processing of one or more programs installed in the general-purpose server 10 that the CPU 104 executes. In Fig. 3, two virtual GW11s, virtual GW11-1 and virtual GW11-2 (hereinafter referred to as "virtual GW11" when not distinguishing between them), are shown, but the number of virtual GW11s may be one, or three or more.

[0025] In FIG. 3, the H / W accelerator 12 and each virtual GW 11 are connected by a virtual L2 bridge and are capable of communicating with each other.

[0026] 3, the H / W accelerator 12 includes a distribution unit 121, a B processing unit 122, a routing unit 123, an ARP processing unit 124, an ARP table 125, and ports 126-1 and 126-2. These units are implemented by circuits that constitute the H / W accelerator 12. The port 126-1 is a port connected to the opposing device 20-1. The port 126-2 is a port connected to the opposing device 20-2.

[0027] The distribution unit 121 executes a process for distributing to the H / W accelerator 12 or the virtual GW 11 the processing of a packet (hereinafter referred to as a "received packet") from the opposing device 20-1 received by the port 126-1.

[0028] The B processing unit 122 executes the processing offloaded to the H / W accelerator 12 (hereinafter referred to as "B processing") on the received packets allocated to the H / W accelerator 12.

[0029] The routing unit 123 performs routing on the received packets allocated to the H / W accelerator 12 .

[0030] The ARP processor 124 performs ARP-based processing (processing to obtain a MAC address from an IP address) on the received packet distributed to the H / W accelerator 12. The ARP table 125 stores IP addresses and MAC addresses in association with each other.

[0031] On the other hand, the virtual GW 11 includes an A processing unit 111, a routing unit 112, an ARP processing unit 113, an ARP table 114, etc. Since each of these units is included in the virtual GW 11, they are realized by processing in which one or more programs installed in the general-purpose server 10 are executed by the CPU 104.

[0032] The A processing unit 111 executes a process (hereinafter referred to as "A processing") different from the B processing on the received packet distributed to the virtual GW 11.

[0033] The routing unit 112 performs the same processing (routing) as the routing unit 123 on received packets distributed to the virtual GW 11. The ARP processing unit 113 performs the same processing AR (processing to acquire a MAC address from an IP address) as the ARP processing unit 124 on received packets distributed to the virtual GW 11. The ARP table 114 stores IP addresses and MAC addresses in association with each other.

[0034] In this embodiment, a situation is assumed in which either process A or process B is executed for each received packet. Of these, process A is performed by the virtual GW 11, which is software, and process B is offloaded to the H / W accelerator 12, which is hardware. Since hardware can execute processes with higher performance than software, process B may be, for example, a process with a higher priority than process A or a complex (high-load) process. For example, an example of process A is a process (IKE (Internet Key Exchange)) performed when an IPsec session is established. An example of process B is encryption and decryption of a main signal packet communicated after an IPsec session is established, or encap and decap an encapsulation header.

[0035] In addition, both the virtual GW 11 and the H / W accelerator 12 have the function of performing the processing required as a gateway (routing, ARP-based processing) for both received packets on which processing A is performed and received packets on which processing B is performed.

[0036] As shown in FIG. 3, the H / W accelerator 12 is directly connected to the network. That is, a packet from the opposite device 20 is first received by the H / W accelerator 12. If the H / W accelerator 12 can process the packet (i.e., if processing B should be performed on the packet), the H / W accelerator 12 executes the process without transferring the packet to the virtual GW 11. Therefore, some packets may be transferred without passing through the virtual GW 11. As a result, the average processing speed (efficiency) can be improved compared to when packets are processed only by software. Furthermore, some packets are processed by the virtual GW 11. Since the virtual GW 11 is software, its functions can be expanded more flexibly than those of hardware. As described above, the configuration of this embodiment can improve the balance between efficiency and flexibility in packet processing.

[0037] Although FIG. 3 shows an example in which the virtual GW 11 and the H / W accelerator 12 are arranged on the same general-purpose server 10, the virtual GW 11 and the H / W accelerator 12 may be arranged on different general-purpose servers 10.

[0038] 4 is a diagram for explaining a modified example of the general configuration of the general-purpose server 10 as a network device. In FIG. 4, the same parts as those in FIG. 3 are given the same reference numerals, and their explanation will be omitted.

[0039] 4, the general-purpose server 10 is distributed between a general-purpose server 10-1 and a general-purpose server 10-2. The general-purpose server 10-1 has a H / W accelerator 12. The general-purpose server 10-2 has a virtual GW 11. In this case, the general-purpose server 10-1 and the general-purpose server 10-2 are connected via a physical L2 bridge, for example, rather than a virtual L2 bridge.

[0040] The following specific methods will be explained below. (1) Two connection methods (Connection Method 1, Connection Method 2) when both the virtual GW 11 and the H / W accelerator 12 have IP addresses (2) Three ARP table update methods (ARP-1, ARP-2, ARP-3) when both the virtual GW 11 and the H / W accelerator 12 have their own ARP tables. The two connection methods (connection method 1 and connection method 2) in (1) will be described as the first and second embodiments, and the three update methods (ARP-1, ARP-2, ARP-3) in (2) will be described as the third to fifth embodiments.

[0041] The configurations of FIGS. 3 and 4 are applicable to any of the embodiments.

[0042] Fig. 5 is a diagram for explaining the first embodiment (connection method 1). Note that in Fig. 5, some of the components explained in Fig. 3 are omitted for convenience.

[0043] 5, each virtual GW 11 and H / W accelerator 12 has a different IP address and MAC address. In FIG. 5, the IP address of the virtual GW 11-1 is "IP1" and the MAC address is "MAC1." The IP address of the virtual GW 11-2 is "IP2" and the MAC address is "MAC2." The IP address of the H / W accelerator 12 is "IP0" and the MAC address is "MAC0."

[0044] The IP address of the H / W accelerator 12, "IP0", is set as the default gateway of the opposite device 20-1 that forwards packets from the terminal 30-1 that is the packet forwarding source. Therefore, the opposite device 20-1 forwards all packets to the node (H / W accelerator 12) corresponding to IP0. Even if there are multiple virtual GWs 11, the NEXTHOP is always "IP0 / MAC0". The header of the packet forwarded by the opposite device 20-1 is as shown in FIG. 6.

[0045] 6 is a diagram showing an example of the header of a packet forwarded by the opposite device 20-1 in the first embodiment. In FIG. 6, the value of DstIP (destination IP address) "<forwarding destination>" indicates the IP address of terminal 30-2. The value of SrcIP (source IP address) "<forwarding source>" indicates the IP address of terminal 30-1. The value of SrcMAC (source MAC address) "<opposite device 1>" indicates the MAC address of the opposite device 20-1. The value of DstMAC (destination MAC address) "MAC0" is the MAC address of the H / W accelerator 12.

[0046] As such, in the first embodiment, even if the general-purpose server 10 has multiple virtual GWs 11, the opposing device 20-1 does not need to distinguish between them, and simply sends all packets to the IP / MAC on the H / W accelerator 12 side.

[0047] In FIG. 5, the allocating unit 121 of the H / W accelerator 12 includes a determining unit 121-1 and a rewriting unit 121-2.

[0048] The judgment unit 121-1 checks the received packet against a matching table held by the distribution unit 121 to determine whether the received packet should be distributed to the virtual GW 11 or the H / W accelerator 12 (whether to have the virtual GW 11 process the received packet).

[0049] Fig. 7 is a diagram showing an example of the configuration of a matching table in the first embodiment. As shown in Fig. 7, in the matching table, "forwarding destinations" are pre-registered according to the 5 tuples of a packet (protocol, SrcMAC (source MAC address), DstMAC (destination MAC address), SrcIP (source IP address), DstIP (destination IP address)).

[0050] If the 5-tuple of the received packet matches any record in the matching table, the determination unit 121-1 determines that the virtual GW11 corresponding to the MAC address set in the "forwarding destination" of the record is the destination of the received packet (the virtual GW11 is to process the received packet). On the other hand, if the 5-tuple of the received packet does not match any record in the matching table, the determination unit 121-1 determines that the destination of the received packet is the H / W accelerator 12 (the virtual GW11 is not to process the received packet). However, it is not necessary to compare all 5-tuple with the records in the matching table. For example, it may be determined whether there is a match only for the IP (SrcIP (source IP address) and DstIP (destination IP address)).

[0051] The determination unit 121-1 transfers the received packet, which has been determined to be assigned to the H / W accelerator 12, to the H / W accelerator 12. The received packet is processed by the B processing unit 122 and then routed (transferred) by the routing unit 123.

[0052] The determination unit 121-1 inputs to the rewrite unit 121-2 the received packet that has been determined to be assigned to one of the virtual GWs 11. The rewrite unit 121-2 rewrites the DstMAC (destination MAC address) of the received packet input from the determination unit 121-1 to the MAC address of the virtual GW 11 that the determination unit 121-1 has determined to be the assignment destination (the "transfer destination" of the record that the received packet matches in the matching table).

[0053] Fig. 8 is a diagram showing an example of a received packet after the destination MAC address has been rewritten. In Fig. 8, the value of DstMAC in Fig. 6 has been rewritten to "MAC1".

[0054] The rewriting unit 121-2 transfers the received packet to the virtual GW 11-1 corresponding to the rewritten DstMAC. The received packet undergoes processing A in the virtual GW 11-1 and is routed (transferred) by the routing unit of the virtual GW 11-1.

[0055] Next, a second embodiment will be described. In the second embodiment, differences from the first embodiment will be described. Points not specifically mentioned in the second embodiment may be the same as those in the first embodiment.

[0056] Fig. 9 is a diagram for explaining the second embodiment (connection method 2). In Fig. 9, parts that are the same as or correspond to those in Fig. 5 are given the same reference numerals.

[0057] 9, the H / W accelerator 12 has the same IP address and MAC address as each virtual GW 11. As shown in FIG. 9, when there are multiple virtual GWs 11, the H / W accelerator 12 also has multiple IP addresses and MAC addresses corresponding to each virtual GW 11. Specifically, in the example of FIG. 9, the IP address and MAC address of the virtual GW 11-1 are IP1 and MAC1, respectively. The P address and MAC address of the virtual GW 11-2 are IP2 and MAC2, respectively. The H / W accelerator 12 has IP address and MAC address pairs of IP1 and MAC1, and IP2 and MAC2.

[0058] The opposite device 20-1 transfers packets without distinguishing between the virtual GW 11 and the H / W accelerator 12. However, if there are multiple virtual GWs 11, the opposite device 20-1 distinguishes which IP address / MAC address to use as the next hop.

[0059] Fig. 10 is a diagram showing an example of the header of a packet forwarded by the opposite device 20-1 in the second embodiment. The packet in Fig. 10 is a packet forwarded by the opposite device 20-1 when the virtual GW 11-1 is set as the next hop.

[0060] The determining unit 121-1 checks the received packet against a matching table that the sorting unit 121 has, and determines whether the sorting destination of the received packet is the virtual GW 11 or the H / W accelerator 12.

[0061] Fig. 11 is a diagram showing an example of the configuration of a matching table in the second embodiment. The matching table shown in Fig. 11 does not have an item for "forwarding destination" as compared to the matching table in Fig. 7. This is because in the second embodiment, the virtual GW11 is distinguished in the header of the received packet, so there is no need to register the "forwarding destination".

[0062] If the 5-tuple of the received packet matches any record in the matching table, the determination unit 121-1 determines that the virtual GW 11 corresponding to the DstMAC and DstIP of the received packet is the destination of the received packet. On the other hand, if the 5-tuple of the received packet does not match any record in the matching table, the determination unit 121-1 determines that the destination of the received packet is the H / W accelerator 12. However, it is not necessary to compare all of the 5-tuple with the records in the matching table. For example, it may be determined whether or not there is a match only for the IP (SrcIP (source IP address) and DstIP (destination IP address)).

[0063] The determination unit 121-1 transfers the received packet, which has been determined to be assigned to the H / W accelerator 12, to the H / W accelerator 12. The received packet is processed by the B processing unit 122 and then routed (transferred) by the routing unit 123.

[0064] The determination unit 121-1 also forwards a received packet that has been determined to be assigned to one of the virtual GWs 11 to the virtual GW 11 corresponding to the DstMAC and DstIP of the received packet. That is, in the second embodiment, the header of the received packet is not rewritten. Therefore, in the second embodiment, the distribution unit 121 does not have the rewriting unit 121-2. The received packet shown in FIG. 10 is forwarded to the virtual GW 11-1. The virtual GW 11-1 performs process A on the received packet, and the packet is routed (forwarded) by the routing unit of the virtual GW 11-1.

[0065] Next, a third embodiment (ARP-1) will be described. The third embodiment is suitable for a case where the IP address and MAC address are different between the virtual GW 11 and the H / W accelerator 12 (i.e., when the first embodiment is adopted).

[0066] In the third embodiment, the ARP processing unit 113 of the virtual GW 11 and the ARP processing unit 124 of the H / W accelerator 12 execute ARP independently (separately). For example, the ARP processing unit 113 executes ARP when a MAC address corresponding to a DstIP of a received packet transferred to the virtual GW 11 is not registered in the ARP table 114, and registers the execution result in the ARP table 114. Furthermore, the ARP processing unit 124 executes ARP when a MAC address corresponding to a DstIP of a received packet to be sorted by the H / W accelerator 12 is not registered in the ARP table 125, and registers the execution result in the ARP table 125.

[0067] Next, a fourth embodiment will be described. The fourth embodiment is suitable for the case where the H / W accelerator 12 has the same IP address and MAC address as the virtual GW 11 (that is, when the second embodiment is adopted).

[0068] In the fourth embodiment, the virtual GW 11 independently executes ARP, and the H / W accelerator 12 SNOOPs the result of the ARP execution by the virtual GW 11 to update the ARP table 125 of the H / W accelerator 12. Below, the processing procedure executed in the fourth embodiment will be explained separately for a case where the H / W accelerator 12 is determined as the sorting destination of the received packet and a case where the virtual GW 11 is determined as the sorting destination of the received packet.

[0069] FIG. 12 is a sequence diagram illustrating an example of a processing procedure executed for ARP (ARP-2) when the H / W accelerator 12 is determined as the distribution destination of the received packet in the fourth embodiment.

[0070] When the routing unit 123 of the H / W accelerator 12 determines that a received packet allocated to the H / W accelerator 12 should be forwarded to the opposite device 20-2, the ARP processing unit 124 obtains the MAC address corresponding to the IP address of the opposite device 20-2 from the ARP table 125 (S101).

[0071] If an entry corresponding to the IP address is registered in the ARP table 125, the routing unit 123 transfers the received packet to the acquired MAC address (addressed to the opposite device 20-2) (S121).

[0072] On the other hand, if an entry corresponding to the IP address is not registered in the ARP table 125 (if the MAC address corresponding to the IP address cannot be identified based on the ARP table 125), steps S102 and S103 are executed.

[0073] In step S102, the ARP processing unit 124 of the H / W accelerator 12 requests the virtual GW 11 to execute ARP, including the received packet. Subsequently, when the routing unit 112 of the virtual GW 11 determines that the received packet should be forwarded to the opposing device 20-2, the ARP processing unit 113 obtains the MAC address corresponding to the IP address of the opposing device 20-2 from the ARP table 114 (S103).

[0074] If an entry corresponding to the IP address is not registered in the ARP table 114, steps S111 to S115 are executed.

[0075] In step S111, the ARP processing unit 113 transmits an ARP request including the IP address. Subsequently, when the remote device 20-2 corresponding to the IP address transmits an ARP reply including the MAC address of the remote device 20-2 to the general-purpose server 10, the H / W accelerator 12 receives the ARP reply (S112). The ARP processing unit 124 of the H / W accelerator 12 snoops the ARP reply (obtains the correspondence information between the IP address and the MAC address from the ARP reply) and registers an entry associating the IP address with the MAC address in the ARP table 125 (S113). As a result, the ARP processing unit 124 can identify the MAC address corresponding to the IP address and can synchronize the contents of the ARP table 125 with the ARP table 114.

[0076] The ARP processing unit 124 also transfers the ARP reply to the virtual GW 11 (S114). The routing unit 123 of the H / W accelerator 12 transfers the received packet to the MAC address (addressed to the opposing device 20-2) (S121). The ARP processing unit 113 of the virtual GW 11 registers an entry associating the IP address with the MAC address in the ARP table 114 based on the ARP reply (S115).

[0077] 13 is a sequence diagram for explaining an example of a processing procedure executed for ARP (ARP-2) when the virtual GW11 is determined as the distribution destination of the received packet in the fourth embodiment. In Fig. 13, the same step numbers are assigned to steps that are the same as or correspond to those in Fig. 12, and the description thereof will be omitted as appropriate.

[0078] When the routing unit 112 of the virtual GW11 determines that the received packet allocated to the virtual GW11 should be forwarded to the opposing device 20-2, the ARP processing unit 113 acquires the MAC address corresponding to the IP address of the opposing device 20-2 from the ARP table 114 (S103).

[0079] If an entry corresponding to the IP address is registered in the ARP table 114, the routing unit 112 transfers the received packet to the acquired MAC address (addressed to the opposing device 20-2) (S122).

[0080] On the other hand, if an entry corresponding to the IP address is not registered in the ARP table 114, steps S111 to S115 are executed, and then step S122 is executed.

[0081] Next, a fifth embodiment will be described. The fifth embodiment is suitable for the case where the H / W accelerator 12 has the same IP address and MAC address as the virtual GW 11 (that is, when the second embodiment is adopted).

[0082] In the fifth embodiment, the virtual GW 11 independently executes ARP to update the ARP table 114 and also updates the ARP table 125 of the H / W accelerator 12 .

[0083] Fig. 14 is a diagram showing an example of the functional configuration of the virtual GW 11 in the fifth embodiment. In Fig. 14, the same parts as those in Fig. 3 or 4 are given the same reference numerals, and the description thereof will be omitted.

[0084] 14, the virtual GW 11 further includes a setting unit 115. The setting unit 115 registers the result of the ARP of the virtual GW 11 in the ARP table 125 of the H / W accelerator 12.

[0085] Below, the processing procedure executed in the fifth embodiment will be explained separately for the case where the H / W accelerator 12 is determined as the destination of the received packet and the case where the virtual GW 11 is determined as the destination of the received packet.

[0086] 15 is a sequence diagram for explaining an example of a processing procedure executed for ARP (ARP-3) when the H / W accelerator 12 is determined as the destination of the received packet in the fifth embodiment. In FIG. 15, the same step numbers as in FIG. 12 are assigned to the same steps, and their explanations will be omitted.

[0087] In FIG. 15, step S113 (SNOOP of ARP reply) is not executed, and step S116 is executed.

[0088] In step S116, the setting unit 115 registers the entry registered in the ARP table 114 in step S115 in the ARP table 125 of the H / W accelerator 12. As a result, the contents of the ARP table 125 can be synchronized with the ARP table 114.

[0089] 16 is a sequence diagram for explaining an example of a processing procedure executed for ARP (ARP-3) when the virtual GW11 is determined as the distribution destination of the received packet in the fifth embodiment. In Fig. 16, the same step numbers as in Fig. 13 or Fig. 15 are assigned, and the description thereof will be omitted as appropriate.

[0090] 16, step S113 (SNOOP of ARP reply) is not executed, and step S116 is executed. The processing content of step S116 is as explained in Fig. 15. As a result, the content of the ARP table 125 can be synchronized with the ARP table 114.

[0091] In the fourth and fifth embodiments, the cache clear times of the ARP table 125 of the H / W accelerator 12 and the ARP table 114 of the virtual GW 11 are the same. This makes it possible to maintain consistency in the states of the ARP tables.

[0092] In each of the above embodiments, the general-purpose server 10 is an example of an information processing device, the B processing unit 122 is an example of a processing unit, and the routing unit 123 is an example of a transfer unit.

[0093] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention as described in the claims. [Explanation of symbols]

[0094] 10 General-purpose servers 11 Virtual Gateway 12 H / W accelerators 20 Opposite device 30 devices 100 Drive device 101 Recording media 102 Auxiliary storage 103 Memory Device 104 CPU 105 Interface Device 111 A Processing Section 112 Routing Section 113 ARP processing unit 114 ARP Table 115 Setting section 121 Sorting section 121-1 Judgment section 121-2 Rewriting section 122 B Processing Section 123 Routing Section 124 ARP processing section 125 ARP Table 126-1 port 126-2 port B Bus

Claims

1. an integrated circuit for receiving a packet; The integrated circuit comprises: a distribution unit configured to determine whether or not to cause software to execute processing on the packet based on the source and destination of the packet, and to transfer the packet to the software if the software is to execute the processing; a processing unit configured to execute a process on the packet when the allocating unit determines not to cause the software to execute the process; a forwarding unit configured to forward the packets processed by the processing unit; Including, The integrated circuit and the software have different IP addresses and MAC addresses; the distribution unit is configured to rewrite the destination MAC address of the packet to the MAC address of the software when causing the software to execute the process.

1. An information processing device comprising:

2. the integrated circuit and the software each have an ARP table; The integrated circuit comprises: When the MAC address of the destination of the packet cannot be identified using an ARP table included in the integrated circuit, the integrated circuit is configured to cause the software to execute processing based on ARP to identify the MAC address.

2. The information processing apparatus according to claim 1, wherein:

3. an integrated circuit receiving a packet, a distribution procedure of determining whether or not to cause software to execute processing on the packet based on the source and destination of the packet, and transferring the packet to the software if the processing is to be executed by the software; a processing procedure for executing a process on the packet when the sorting procedure determines that the software should not execute the process; a forwarding procedure for forwarding the packets processed by the processing procedure; Run The integrated circuit and the software have different IP addresses and MAC addresses; the sorting step rewrites a destination MAC address of the packet to a MAC address of the software when the software is to execute the process; A packet processing method comprising:

4. the integrated circuit and the software each have an ARP table; The integrated circuit comprises: If the MAC address of the destination of the packet cannot be identified using the ARP table of the integrated circuit, the software is caused to execute processing based on ARP to identify the MAC address.

4. The packet processing method according to claim 3.

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