Image forming device

Abstract

To provide an inexpensive circuit configuration comprising a developing blade.SOLUTION: An image forming apparatus comprises: a photoconductor drum 131; an electrifying roller 132a; a developing roller 132a; a developing blade 135a; an electrifying circuit 132b that generates an electrifying voltage Vpri and applies the electrifying voltage Vpri to the electrifying roller 132a; a blade circuit 135b that generates, from the electrifying voltage Vpri, a blade voltage Vbld lower than the electrifying voltage Vpri, and applies the blade voltage Vbld to the developing blade 135a; and a developing circuit 133b that applies, from the blade voltage Vbld, a developing voltage Vdev lower than the blade voltage Vbld to the developing roller 133a.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to an image forming apparatus, for example, an image forming apparatus that uses an electrophotographic method. [Background technology]

[0002] Conventionally, configurations have been proposed that generate multiple voltages from a single high-voltage circuit, thereby reducing costs. For example, in Patent Document 1, a charging voltage is generated by a transformer, and the charging voltage is divided by a resistor and a switching element to generate a developing voltage. Here, the charging voltage is applied to a charging roller, and the developing voltage is applied to a developing roller. Also, in Patent Document 2, for example, a blade voltage is generated by a transformer, and the blade voltage is divided by a Zener diode and a resistor to generate a developing voltage. Here, the blade voltage is applied to a developing blade. The developing blade is a blade that comes into sliding contact with the developing roller to uniformly distribute the toner on the surface of the developing roller. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-238490 [Patent Document 2] Japanese Patent Application Publication No. 2018-013720 Summary of the Invention [Problem to be solved by the invention]

[0004] Here, Patent Document 1 describes generating a development voltage from a charging voltage, but does not describe a development blade. Also, Patent Document 2 describes generating a development voltage from a blade voltage, but the charging voltage is generated by a separate power supply circuit.

[0005] According to the configurations of Patent Documents 1 and 2, the cost of the circuit can be reduced by sharing part of the circuit that generates the voltage to be applied to each process component. Conventional circuit configurations fully satisfied the cost requirements at the time, but in recent years, further cost reductions have been required.

[0006] The present invention has been made under these circumstances, and an object of the present invention is to provide an inexpensive circuit configuration in a configuration equipped with a developing blade. [Means for solving the problem]

[0007] In order to solve the above-mentioned problems, the present invention has the following configuration. (1) a photosensitive member, a charging member for charging the photosensitive member, a developing member for developing an electrostatic latent image formed on the photosensitive member with toner to form a toner image on the photosensitive member, and a developing member for contacting the developing member. a developing blade for leveling the toner carried on the surface of the developing member; a first power source that generates a first voltage and applies the first voltage to the charging member; and a second power source that generates a second voltage lower than the first voltage from the first voltage generated by the first power source and applies the second voltage to the charging member. Developing blade a second power source that applies a voltage to the developing member; a third power source that generates a third voltage lower than the second voltage from the second voltage generated by the second power source and applies the third voltage to the developing member; a control means for controlling the first power source, the second power source, and the third power source; Equipped with The developing member can be in a contact state in which it is in contact with the photosensitive member or in a separated state in which it is separated from the photosensitive member, and the developing blade is in contact with the developing member in the contact state and the separated state, and a state in which the potential difference between the second voltage and the third voltage is a first potential difference is defined as a first state, and a state in which the potential difference is a second potential difference larger than the first potential difference is defined as a second state, the control means controls the developing blade to be in the first state in the separated state and to be in the second state in the contact state. An image forming apparatus characterized by: [Effects of the Invention]

[0008] According to the present invention, it is possible to provide an inexpensive circuit configuration in a configuration including a development blade. [Brief explanation of the drawings]

[0009] [Figure 1] Schematic cross-sectional view of the image forming apparatus according to the first and second embodiments. [Figure 2] Circuit diagram of the imaging unit of the first embodiment [Figure 3]FIG. 1 is a diagram showing the relationship between the setting values ​​of each circuit and the output voltage in the first embodiment; and FIG. 2 is a diagram showing the relationship between the potential of the photosensitive drum surface and the charging voltage and charging current. [Figure 4] 1 is a flowchart showing control of a blade circuit according to a first embodiment. [Figure 5] Circuit diagram of the imaging unit of the second embodiment [Figure 6] FIG. 10 is a diagram showing the relationship between the setting value of each circuit and the output voltage in the second embodiment. [Figure 7] 10 is a flowchart showing the control of the blade circuit according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail by way of examples with reference to the accompanying drawings. [Example]

[0011] (Configuration of image forming device) FIG. 1 shows a schematic cross-sectional view of an image forming apparatus 101. The paper feed unit 102 has a paper feed tray 121 and a paper feed roller 122. The paper feed tray 121 stores paper P to be printed. The image forming unit 103 has a photosensitive drum 131, a charging roller 132a, a developing roller 133a, a toner supply roller 134a, a second contact member (supply roller), and a developing blade 135a, a first contact member (blade). The image forming unit 103 also has a toner container 136, a laser scanner 137, and the like. The charging circuit 132b, which is a first power source, applies a generated high voltage to the charging roller 132a. The developing circuit 133b, which is a third power source, applies a generated high voltage to the developing roller 133a. The toner supply R circuit 134b, which is a fourth power source, applies a generated high voltage to the toner supply roller 134a. The blade circuit 135b, which is the second power supply, applies the generated high voltage to the developing blade 135a.

[0012] The transfer unit 104 has a transfer roller 141a. A positive transfer circuit 141b and a negative transfer circuit 141c connected in series to the positive transfer circuit 141b apply the generated high voltage to the transfer roller 141a. The negative transfer circuit 141c may be connected in parallel to the positive transfer circuit 141b, and the connection to the transfer roller 141a may be switched by a switching means such as a switch, or the negative transfer circuit 141c itself may be eliminated. The transfer roller 141a is in opposing contact with the photosensitive drum 131. The fixing unit 105 has a fixing roller 151 and a pressure roller 152. The discharge unit 106 includes discharge rollers 161a and 161b and a discharge tray 162.

[0013] The control unit 200, which serves as a control means, has a CPU 200a, a ROM 200b, and a RAM 200c. The CPU 200a controls the image forming operation by the image forming unit 103, the fixing operation by the fixing unit 105, the conveying operation of the sheet P, and the like, in accordance with various programs stored in the ROM 200b and using the RAM 200c as a work area. The control unit 200 also controls the contact and separation operation of the developing roller 133a, which will be described later, and each circuit, which is a power source that applies each voltage, which will be described later. Note that a control unit that controls the image forming unit 103, the fixing unit 105, and each power source may be provided separately from the control unit 200, and the control unit 200 may control the separately provided control unit.

[0014] (Operation of image forming device) The operation of the image forming unit 103 to form a toner image on the surface of the photosensitive drum 131 will be described. The charging roller 132a, to which a negative high voltage is applied from the charging circuit 132b, charges the surface of the photosensitive drum 131. The charging process in the first embodiment employs, for example, a roller charging method. The charging roller 132a and the photosensitive drum 131 face each other with a small gap (GAP), and the charging roller 132a charges the surface of the photosensitive drum 131 by utilizing discharge in the gap. The laser scanner 137 irradiates the photosensitive drum 131 with laser light in accordance with image data, forming a latent image on the surface of the photosensitive drum 131. The toner contained (stored) in the toner container 136 is charged, for example, negatively by stirring.

[0015] The toner supply roller 134a supplies toner stored in a toner container 136 to the developing roller 133a. The toner supply roller 134a, to which a negative high voltage is applied from the toner supply R circuit 134b, moves the toner to the surface of the developing roller 133a and adheres to the surface. The developing blade 135a evens out the toner supplied to the developing roller 133a by the toner supply roller 134a. Because the toner adhering to the surface of the developing roller 133a varies in height depending on the location, the developing blade 135a, to which a negative high voltage is applied from the blade circuit 135b, evens out the toner. The developing roller 133a, with the toner adhering to its surface, uses the negative high voltage applied from the developing circuit 133b to move the toner to the surface of the photosensitive drum 131, thereby developing an electrostatic latent image. Here, the absolute value of the output voltage of the toner supply R circuit 134b is set to be greater than the output voltage of the developing circuit 133b, making it easier for the negatively charged toner to move to the developing roller 133a. Furthermore, the output voltage of the blade circuit 135b is set to be greater in absolute value than the output voltage of the development circuit 133b, thereby making it difficult for negatively charged toner to adhere to the development blade 135a. For example, the output voltage of the development circuit 133b is set to -300V, and the output voltages of the toner supply R circuit 134b and the blade circuit 135b are set to -500V.

[0016] Next, the operation of forming an image on paper P will be described. When image forming apparatus 101 receives a print job, each roller and laser scanner 137 start operating. Paper P stored in paper feed tray 121 is fed by paper feed roller 122, transported along transport path 111, and eventually reaches a position where photosensitive drum 131 and transfer roller 141a face each other. Paper P is nipped (hereinafter referred to as nip) between photosensitive drum 131 and transfer roller 141a to which a positive high voltage is applied from positive transfer circuit 141b, and at this time, the toner image formed on the surface of photosensitive drum 131 is transferred to paper P. Continuing transport, paper P then reaches fixing unit 105, where it is pressure-nipped by fixing roller 151 and pressure roller 152, and the unfixed toner image on paper P is fixed. Paper P is then discharged via discharge rollers 161a and 161b to discharge tray 162.

[0017] (Developer separation mechanism) Next, a configuration for separating the developing roller 133a from the photosensitive drum 131 will be described. The developing roller 133a rotates while sliding against the photosensitive drum 131, the toner supply roller 134a, and the developing blade 135a, and therefore its surface wears and deteriorates with use. Considering the product life of the image forming apparatus 101, the sliding time should be kept to a necessary minimum. The image forming apparatus 101 of the first embodiment is equipped with a developing separation mechanism (see FIG. 2) that is a contact / separation means that can separate the developing roller 133a from the photosensitive drum 131. The developing roller 133a can be in a contact state in which it is in contact with the photosensitive drum 131 or in a separated state in which it is separated from the photosensitive drum 131. In the contact state, the developing roller 133a develops an electrostatic latent image formed on the photosensitive drum 131 (on the photosensitive member) with toner to form a toner image.

[0018] The developer separation mechanism switches the developing roller 133a between a separated state in which it is separated from the photosensitive drum 131 and a contact state in which it is in contact with the photosensitive drum 131 by moving a portion including the developing roller 133a, the toner supply roller 134a, the developing blade 135a, and the toner container 136. That is, the developing blade 135a is in contact with the developing roller 133a in both the contact state and the separated state, and the toner supply roller 134a is also in contact with the developing roller 133a in both the contact state and the separated state. In FIG. 1, the separated state of the developing roller 133a is shown by a dashed line 133a' as a representative example.

[0019] The image forming apparatus 101 has a developer separation mechanism, which is a contact / separation unit that switches the developing roller 133a between a contact state and a separated state. In the first embodiment, the contact / separation mechanism includes a clutch drive circuit 250, a developer separation clutch 252, a developer separation gear 254, and a drive motor 256 (see FIG. 2). The control unit 200 controls the contact / separation mechanism. The developer separation clutch 252 is driven via the clutch drive circuit 250. The developer separation clutch 252 can switch between a state in which drive is transmitted from the drive motor 256 to the developer separation gear 254 (hereinafter referred to as a transmission state) and a state in which drive from the drive motor 256 to the developer separation gear 254 is interrupted (hereinafter referred to as a disconnection state). The control unit 200 controls the drive motor 256 using a drive circuit (not shown), a rotation detection unit (not shown) such as an encoder, and the like. The control unit 200 controls the developer separation clutch 252 via the clutch drive circuit 250. In the transmitted state, the developing roller 133a is separated from the photosensitive drum 131, and in the disconnected state, the developing roller 133a is brought into contact with the photosensitive drum 131. The control unit 200 can switch the developing roller 133a between the contact state and the separated state at a predetermined timing. An electromagnetic clutch can be used as the developing separation clutch 252. Alternatively, a partially toothed gear and a solenoid can be used as the developing separation clutch 252 to switch between the transmitted state (contact state) and the disconnected state. As described above, in the first embodiment, when the developing roller 133a is brought into contact with or separated from the photosensitive drum 131, the toner supply roller 134a, the developing blade 135a, and the toner container 136 also move in conjunction with the developing roller 133a.

[0020] The developer separation mechanism also has the function of disengaging (releasing) the rotation drive gear (not shown) of the developing roller 133a during separation, and the developing roller 133a and toner supply roller 134a stop rotating in the separated state. The image forming apparatus 101 controls the developer separation mechanism to the separated state when no image formation operation is being performed (hereinafter referred to as non-image formation time). This eliminates sliding between the developing roller 133a and the photosensitive drum 131, the toner supply roller 134a, and the developing blade 135a, thereby improving durability.

[0021] (Configuration and operation of high voltage generation circuit) The configurations and operations of the charging circuit 132b, the developing circuit 133b, the toner supply R circuit 134b, and the blade circuit 135b in the image forming unit 103 will be described with reference to FIG.

[0022] (Charging circuit) The transformer T11 has a primary winding T11-1 and a secondary winding T11-2. One terminal of the primary winding T11-1 is connected to a power supply voltage V1, and the other terminal is connected to a field effect transistor (hereinafter referred to as FET) T11. The black circles on the primary winding T11-1 and secondary winding T11-2 indicate the start of the coil winding (in other words, the polarity). A resistor R12 is connected between the gate terminal of the FET T11 and its source terminal, and a resistor R17 is connected between the gate terminal and the CLK terminal of the control unit 200. Between one terminal and the other terminal of the primary winding T11-1 (hereinafter referred to as between both terminals), a parallel circuit in which a capacitor C11 and a resistor R11 are connected in parallel, and a diode D11 are connected in series. The diode D11 has a cathode terminal connected to a parallel circuit of the capacitor C11 and the resistor R11, and an anode terminal connected to the other terminal of the primary winding T11-1 and the drain terminal of the FET11.

[0023] Meanwhile, a diode D12 and a capacitor C12 are connected between both terminals of the secondary winding T11-2. The cathode terminal of the diode D12 is connected to one terminal of the secondary winding T11-2 of the transformer T11, and the anode terminal is connected to one terminal of the capacitor C12. The other terminal of the capacitor C12 is connected to a charging current detection circuit PRI_ISNS, which serves as detection means. The power supply voltage V1 in the first embodiment is, for example, 24 V.

[0024] The control unit 200 outputs a high-level or low-level signal from the CLK terminal. When a high-level signal is output from the CLK terminal, the FET 11 turns on, and the drain voltage of the FET 11 drops to approximately the same potential as ground (hereinafter referred to as GND). As a result, a voltage is applied across the primary winding T11-1 of the transformer T11, causing an excitation current to flow. In this state, when the voltage output from the CLK terminal changes to a low-level state, the FET 11 turns off, and a flyback voltage is generated across the primary winding T11-1. At the same time, a flyback voltage is generated in the secondary winding T11-2 according to the turns ratio between the primary winding T11-1 and the secondary winding T11-2. The generated flyback voltage is rectified and smoothed by the diode D12 and the capacitor C12, generating a charging voltage Vpri, which is a negative first voltage. The capacitor C11, resistor R11, and diode D11 function as a snubber circuit that absorbs surge voltages due to the leakage inductance of the primary winding T11-1.

[0025] The voltage output from the CLK terminal of the control unit 200 is a square wave in which high-level and low-level states alternate. In the first embodiment, a fixed square wave with a frequency of 50 kHz and a duty of 10% is output. Here, the 10% duty refers to the proportion of high-level time in one signal period (the sum of high-level time and low-level time), but it may also refer to the proportion of low-level time. The frequency and duty of the square wave should be designed to optimal values ​​for each circuit and are not limited to the values ​​in the first embodiment. Furthermore, the frequency and duty of the square wave do not need to be fixed values ​​and may be variable depending on the voltage and load of the controlled object. When the FET 11 is turned on and off, the flyback voltage generated in the secondary winding T11-2 is rectified and smoothed by the diode D12 and capacitor C12, generating the charging voltage Vpri.

[0026] The charging circuit 132b performs feedback control of the charging voltage Vpri to stabilize and maintain the charging voltage Vpri at a predetermined voltage. The charging voltage Vpri is connected to a power supply voltage V2 via resistors R14 and R13. The connection point between the resistors R14 and R13 is connected to the positive input terminal (non-inverting input terminal, + terminal) of a comparator IC11. The negative input terminal (inverting input terminal, - terminal) of the comparator IC11 is connected to the power supply voltage V2 via resistors R16 and R15, and is further connected to GND via a capacitor C16. The connection point between the resistors R15 and R16 is connected to the PRI_CONT terminal of the control unit 200. The output terminal of the comparator IC11 is connected to the gate terminal of the FET11. A pulse signal that alternates between a high-impedance (hereinafter referred to as Hi-Z) state and a low-level state is output from the PRI_CONT terminal.

[0027] When the PRI_CONT terminal is in the Hi-Z state, a current flows from the power supply voltage V2 through resistors R15 and R16 to charge capacitor C16. On the other hand, when the PRI_CONT terminal is in the low-level state, a current flows to the PRI_CONT terminal through resistor R16 to discharge capacitor C16. When the PRI_CONT terminal alternates between the Hi-Z and low-level states, the balance between charging and discharging capacitor C16 stabilizes at a predetermined voltage. Therefore, the voltage at the negative input terminal of comparator IC11 is determined according to the duty cycle of the pulse signal output from the PRI_CONT terminal.

[0028] 3(a) is a graph showing the relationship between the pulse signal output from the PRI_CONT terminal and the charging voltage Vpri, with the horizontal axis representing the low duty of the pulse signal output from the PRI_CONT terminal and the vertical axis representing the charging voltage Vpri. Specifically, as shown in FIG. 3(a), the larger the low duty of the pulse signal output from the PRI_CONT terminal, the larger the absolute value of the charging voltage Vpri, which is a negative voltage.

[0029] Returning to the explanation of Figure 2, when the voltage at the negative input terminal of comparator IC11 is lower than that at the positive input terminal, the output terminal of comparator IC11 becomes Hi-Z. At this time, the signal output from the CLK terminal of control unit 200 is input directly to the gate terminal of FET11, driving FET11 on and off. On the other hand, when the voltage at the negative input terminal of comparator IC11 is higher than that at the positive input terminal, the output terminal of comparator IC11 becomes low. At this time, the current output from the CLK terminal is drawn by the output terminal of comparator IC11, forcing the gate voltage of FET11 to become low. This prevents FET11 from turning on at the correct timing, thereby accelerating a decrease in the absolute value of the charging voltage Vpri. This operation makes it possible to control the charging voltage Vpri to a predetermined voltage. The control unit 200 performs feedback control of the charging voltage Vpri by controlling the low duty of the signal output from the PRI_CONT terminal. Here, the power supply voltage V2 in Example 1 is 5V. Because power supply voltage V2 affects the voltages at the positive and negative input terminals of comparator IC11, it is important to note that a power supply with relatively high voltage accuracy should be used for power supply voltage V2. Comparator IC11 operates on power supply voltage V1.

[0030] Through the above operation, a stable charging voltage Vpri is generated by the charging circuit 132b and applied to the charging roller 132a. The resistor R132 is provided to limit the output current. The resistor R132 is also provided for the purpose of protecting the charging roller 132a, which is detachable from the image forming apparatus 101, from external ESD (Electro Static Discharge) when the charging roller 132a is removed from the image forming apparatus 101. The resistor R132 may be added as needed. The value of the charging voltage Vpri in the first embodiment is, for example, −1500 V.

[0031] (Charging current detection) The charging current detection circuit PRI_ISNS detects the current supplied to the charging roller 132a (hereinafter referred to as the charging current). One known method for accurately detecting the surface potential of the photosensitive drum 131 is to detect the voltage at which discharge from the charging roller 132a to the photosensitive drum 131 begins (hereinafter referred to as the discharge start voltage). The relationship between the charging voltage Vpri, the surface potential of the photosensitive drum 131, and the charging current is shown in FIG. 3(e). In FIG. 3(e), the horizontal axis represents negative voltage, and the vertical axis represents charging current. Using FIG. 3(e), we will explain the transition of the charging current and the surface potential of the photosensitive drum 131 as the absolute value of the charging voltage Vpri gradually increases from 0V. The charging voltage Vpri begins to increase from 0V, and a state in which no charging current flows (0A) continues for a while. When the charging voltage Vpri reaches the discharge start voltage, discharge from the charging roller 132a to the photosensitive drum 131 begins, and the charging current begins to flow. The surface potential of the photosensitive drum 131 is 0 V at this point, and then increases while maintaining the same potential difference with the charging voltage Vpri as the discharge start voltage (i.e., the graph lines remain parallel). Therefore, if the discharge start voltage is detected, the surface potential of the photosensitive drum 131 can be accurately detected based on the charging voltage Vpri and the discharge start voltage. However, since the charging current needs to be accurately detected as the discharge current from the charging roller 132a to the photosensitive drum 131, it needs to be detected while the developing roller 133a is separated from the photosensitive drum 131. That is, when the control unit 200 detects the current flowing through the charging roller 132a using the charging current detection circuit PRI_ISNS, it controls the developing separation mechanism so that the developing roller 133a is in the separated state. In the first embodiment, charging current detection is performed while the developing separation mechanism is controlled to the separated state during non-image formation.

[0032] (developing circuit) The developing circuit 133b generates a developing voltage Vdev, a negative third voltage, by reducing the charging voltage Vpri through voltage division. The charging voltage Vpri is connected to a power supply voltage V1 via resistor R50, Zener diode ZD51, and transistor Tr31. The developing circuit 133b outputs the voltage at the collector terminal of transistor Tr31 as the developing voltage Vdev. A resistor R39 is connected between the base terminal of transistor Tr31 and the emitter terminal, and a resistor R38 is connected to the output terminal of operational amplifier IC31.

[0033] The development circuit 133b also performs feedback control of the development voltage Vdev to maintain a stable and predetermined voltage. The development voltage Vdev is connected to the power supply voltage V2 via resistors R34 and R33. The junction of resistors R34 and R33 is connected to the positive input terminal of operational amplifier IC31. The negative input terminal of operational amplifier IC31 is connected to the power supply voltage V2 via resistors R36 and R35, and further to GND via capacitor C36. The junction of resistors R35 and R36 is connected to the DEV_CONT terminal of the control unit 200. Resistor R37 and capacitor C37 are connected in series between the negative input terminal and output terminal of operational amplifier IC31. Resistor R37 and capacitor C37 are provided for phase compensation of operational amplifier IC31 and contribute to stabilizing feedback control. The operational amplifier IC31 operates on the power supply voltage V1.

[0034] A first pulse signal (hereinafter simply referred to as a pulse signal) that alternates between a Hi-Z state and a low-level state is output from the DEV_CONT terminal of the control unit 200. When the pulse signal from the DEV_CONT terminal is in the Hi-Z state, a current flows from the power supply voltage V2 through resistors R35 and R36 to charge capacitor C36. On the other hand, when the pulse signal from the DEV_CONT terminal is in the low-level state, a current flows toward the DEV_CONT terminal through resistor R36 to discharge capacitor C36. When the DEV_CONT terminal alternates between the Hi-Z state and the low-level state, the balance between charging and discharging capacitor C36 stabilizes at a predetermined voltage. Therefore, the voltage at the negative input terminal of operational amplifier IC31 is determined according to the duty cycle of the pulse signal output from the DEV_CONT terminal.

[0035] When the voltage at the negative input terminal of the operational amplifier IC31 is lower than that at the positive input terminal, the output terminal of the operational amplifier IC31 goes high. This turns off the transistor Tr31, and the absolute value of the developing voltage Vdev increases. On the other hand, when the voltage at the negative input terminal of the operational amplifier IC31 is higher than that at the positive input terminal, the output terminal of the operational amplifier IC31 goes low. This turns on the transistor Tr31, and the absolute value of the developing voltage Vdev decreases. This operation makes it possible to control the developing voltage Vdev to a predetermined voltage. The control unit 200 controls the developing circuit 133b, which is the third power supply, by outputting a first pulse signal. The control unit 200 performs feedback control of the developing voltage Vdev by controlling the low duty of the pulse signal output from the DEV_CONT terminal.

[0036] 3(b) is a graph showing the relationship between the pulse signal output from the DEV_CONT terminal and the developing voltage Vdev, with the horizontal axis representing the low duty of the pulse signal output from the DEV_CONT terminal and the vertical axis representing the developing voltage Vdev. As shown in FIG. 3(b), the greater the low duty of the pulse signal output from the DEV_CONT terminal, the greater the absolute value of the developing voltage Vdev.

[0037] Returning to the explanation of Figure 2, the above operation generates a stable development voltage Vdev and applies it to the development roller 133a. Similar to the resistor R132, the resistor R133 may be inserted as needed to limit the output current and to provide ESD protection from the outside when the development roller 133a is removed from the image forming apparatus 101. The value of the development voltage Vdev in the first embodiment is, for example, -300V.

[0038] (Blade Circuit) The blade circuit 135b is a circuit that generates a blade voltage Vbld, which is a second voltage having a predetermined potential difference with respect to the development voltage Vdev. The blade voltage Vbld is connected to the development voltage Vdev via a Zener diode ZD51. The Zener diode ZD51 has an anode terminal connected to the charging voltage Vpri via a resistor R50, and the anode terminal side is the blade voltage Vbld. In other words, the blade voltage Vbld has an absolute value that is greater than the development voltage Vdev by the Zener voltage of the Zener diode ZD51. The Zener diode ZD51 has a cathode terminal connected to the development voltage Vdev output by the development circuit 133b, and an anode terminal connected to the blade voltage Vbld output by the blade circuit 135b.

[0039] The blade circuit 135b has a transistor Tr51 connected in parallel with a Zener diode ZD51. Specifically, the anode terminal of the Zener diode ZD51 is connected to the collector terminal of the transistor Tr51, and the cathode terminal is connected to the emitter terminal of the transistor Tr51. When the transistor Tr51 is turned on, both terminals of the Zener diode ZD51 are shorted, and the blade voltage Vbld becomes equal to the developing voltage Vdev. Therefore, the blade circuit 135b can be considered a circuit that selects whether the blade voltage Vbld has a predetermined potential difference with respect to the developing voltage Vdev or is the same potential as the developing voltage Vdev. When the transistor Tr51 is turned off, the blade voltage Vbld has an absolute value greater than that of the developing voltage Vdev (|Vbld|>|Vdev|). The transistor Tr51 functions as a switching means that switches between a first state in which the potential difference between the developing voltage Vdev and the blade voltage Vbld is a first potential difference and a second state in which the potential difference is a second potential difference greater than the first potential difference. In the first embodiment, the first potential difference is 0V (|Vbld|=|Vdev|) and the second potential difference is a Zener voltage, but the first potential difference is not limited to 0V as long as it is smaller than the second potential difference.

[0040] The base terminal of transistor Tr51 is connected to the emitter terminal via resistors R51 and R52. A capacitor C51 is connected in parallel to resistor R52. The junction of resistors R51 and R52 is connected to the anode terminal of diode D51, and the cathode terminal of diode D51 is connected to the anode terminal of diode D52. The cathode terminal of diode D52 is connected to the emitter terminal of transistor Tr51. The cathode terminal of diode D51 is connected to the BLD_SW terminal of the control unit 200 via capacitor C50. The anode terminal of diode D52 is connected to the BLD_SW terminal of the control unit 200 via capacitor C50.

[0041] The BLD_SW terminal outputs a pulse signal that alternates between high and low states. When the BLD_SW terminal is low, current flows from the power supply voltage V1 through transistor Tr31, the emitter and base terminals of transistor Tr51, resistor R51, diode D51, and capacitor C50, and finally into the BLD_SW terminal. When the BLD_SW terminal is high, current flows from the BLD_SW terminal to the power supply voltage V1 via capacitor C50, diode D52, and transistor Tr31. When the pulse signal from the BLD_SW terminal alternates between high and low states, capacitor C51 is charged, allowing a stable base current to flow from the base terminal of transistor Tr51. When a stable base current flows from the base terminal of transistor Tr51, transistor Tr51 turns on, shorting both terminals of Zener diode ZD51. On the other hand, when the BLD_SW terminal is fixed to a high level state or a low level state, the transistor Tr51 is turned off, and the two terminals of the Zener diode ZD51 are not short-circuited.

[0042] The first state described above is a state in which the transistor Tr51 is turned on, shorting the anode terminal and cathode terminal of the Zener diode ZD51. The second state described above is a state in which the transistor Tr51 is turned off, not shorting the anode terminal and cathode terminal of the Zener diode ZD51. The control unit 200 controls the transistor Tr51 to be in the first state in the separated state and to be in the second state in the abutted state. The control unit 200 controls the on / off state of the transistor Tr51 by outputting a signal that controls the blade circuit 135b from the BLD_SW terminal.

[0043] The relationship between the low duty cycle of the pulse signal output from the DEV_CONT terminal and the blade voltage Vbld is shown in Figure 3(c). In Figure 3(c), the horizontal axis represents the low duty cycle of the pulse signal output from the DEV_CONT terminal, and the vertical axis represents the blade voltage Vbld. When a pulse signal is output from the BLD_SW terminal (the graph in the figure shows when BLD_SW is ON), the blade voltage Vbld is the same as the developing voltage Vdev. In other words, when a pulse signal that alternates between high and low levels is output from the BLD_SW terminal, the blade voltage Vbld is the same as the developing voltage Vdev in Figure 3(b). On the other hand, when a pulse signal that alternates between high and low levels is not output from the BLD_SW terminal (the graph in the figure shows when BLD_SW is OFF), in other words, when the signal is fixed to a high or low level, the following occurs. That is, the absolute value of the blade voltage Vbld is greater than the developing voltage Vdev by the Zener voltage ΔVz of the Zener diode ZD51 (|Vbld|=|Vdev|+ΔVz).

[0044] By the above operation, a voltage equal to the developing voltage Vdev or a voltage whose absolute value is greater than the developing voltage Vdev by the Zener voltage (ΔVz) is applied to the developing blade 135a. Note that, like resistors R132 and R133, resistor R135 may be inserted as needed. In addition, the Zener voltage (ΔVz) in Example 1 is, for example, 100 V; that is, the value of the blade voltage Vbld when both terminals of the Zener diode ZD51 are not short-circuited is, for example, −400 V (= −300 − 100).

[0045] (Toner supply R circuit) The toner supply R circuit 134b generates a negative fourth voltage, the toner supply R voltage Vtsr, by reducing the charging voltage Vpri through voltage division. It has a configuration similar to that of the developing circuit 133b. The only difference is that there is no Zener diode in the voltage division line with the charging voltage Vpri. The toner supply R circuit 134b is connected to the power supply voltage V1 via resistor R40 and transistor Tr41 from the charging voltage Vpri. The voltage at the collector terminal of transistor Tr41 becomes the toner supply R voltage Vtsr. A resistor R49 is connected between the base terminal of transistor Tr41 and the emitter terminal, and a resistor R48 is connected to the output terminal of operational amplifier IC41.

[0046] The toner supply R circuit 134b also performs feedback control of the toner supply R voltage Vtsr to maintain a stable, predetermined voltage. The toner supply R voltage Vtsr is connected to the power supply voltage V2 via resistors R44 and R43. The junction of resistors R44 and R43 is connected to the positive input terminal of operational amplifier IC41. The negative input terminal of operational amplifier IC41 is connected to the power supply voltage V2 via resistors R46 and R45, and further to GND via capacitor C46. The junction of resistors R45 and R46 is connected to the TSR_CONT terminal of the control unit 200. Resistor R47 and capacitor C47 are connected in series between the negative input terminal and output terminal of operational amplifier IC41. Resistor R47 and capacitor C47 are provided for phase compensation of operational amplifier IC41 and contribute to stabilizing feedback control. Operational amplifier IC41 operates on power supply voltage V1.

[0047] The TSR_CONT terminal outputs a second pulse signal (hereinafter simply referred to as a pulse signal) that alternates between a Hi-Z state and a low-level state. When the TSR_CONT terminal is in the Hi-Z state, a current flows from the power supply voltage V2 through resistors R45 and R46 to charge capacitor C46. On the other hand, when the TSR_CONT terminal is in the low-level state, a current flows through resistor R46 to discharge capacitor C46 toward the TSR_CONT terminal. When the TSR_CONT terminal alternates between the Hi-Z state and the low-level state, the charge / discharge balance of capacitor C46 stabilizes at a predetermined voltage. Therefore, the voltage at the negative input terminal of operational amplifier IC41 is determined according to the duty cycle of the pulse signal output from the TSR_CONT terminal. When the voltage at the negative input terminal of operational amplifier IC41 is lower than the voltage at the positive input terminal, the output terminal of operational amplifier IC41 goes high. Transistor Tr41 is turned off, and the absolute value of the negative toner supply R voltage Vtsr increases. On the other hand, when the voltage at the negative input terminal of operational amplifier IC41 is greater than the voltage at the positive input terminal, the output terminal of operational amplifier IC41 goes low. Transistor Tr41 turns on, and the absolute value of the toner supply R voltage Vtsr decreases. This operation makes it possible to control the toner supply R voltage Vtsr to a predetermined voltage. The control unit 200 performs feedback control of the toner supply R voltage Vtsr by controlling the low duty of the pulse signal output from the TSR_CONT terminal.

[0048] Figure 3(d) is a graph showing the relationship between the pulse signal output from the TSR_CONT terminal and the toner supply R voltage Vtsr. In Figure 3(d), the horizontal axis represents the low duty of the pulse signal output from the TSR_CONT terminal, and the vertical axis represents the toner supply R voltage Vtsr. As shown in Figure 3(d), the greater the low duty of the pulse signal output from the TSR_CONT terminal, the greater the absolute value of the toner supply R voltage Vtsr.

[0049] Through the above operation, a stable toner supply R voltage Vtsr is generated and applied to the toner supply roller 134a. Note that resistor R134 may be inserted as needed, similar to resistors R132, R133, and R135. The value of the toner supply R voltage Vtsr in the first embodiment is, for example, −400 V.

[0050] (Control during development separation) As described above, the image forming apparatus 101 in the first embodiment detects the charging current while the developer separation mechanism is controlled to the separated state. Specifically, the charging current is detected while the developing roller 133a, the developing blade 135a, and the toner supply roller 134a are separated. Therefore, during the detection of the charging current, the developing voltage Vdev, the blade voltage Vbld, and the toner supply R voltage Vtsr can functionally take any values.

[0051] However, if a high voltage is applied between the contacting components while these components are stopped from rotating, the contact area will become different from the other contacting areas, changing the characteristics of that area. If the developing roller 133a is then rotated to form an image, the change in the characteristics of that area on the surface of the developing roller 133a may result in image defects such as streaks. Even when the developer separation mechanism is in the separated state, the developing roller 133a and the toner supply roller 134a are in contact with each other, and the developing roller 133a and the developing blade 135a are in contact with each other. Therefore, the potential difference between the contacting components, i.e., between the developing roller 133a and the toner supply roller 134a and between the developing roller 133a and the developing blade 135a, should be zero. By controlling the developing voltage Vdev and the toner supply R voltage Vtsr to the same predetermined voltage, the potential difference between the developing roller 133a and the toner supply roller 134a can be controlled to zero. On the other hand, the blade voltage Vbld can be controlled so that the potential difference between the developing roller 133a and the developing blade 135a is zero by outputting a pulse signal from the BLD_SW terminal to short-circuit both ends of the Zener diode ZD51.

[0052] In the first embodiment, the control performed by the image forming apparatus 101 to reduce the potential difference between the developing roller 133a and the developing blade 135 to zero will be described with reference to the flowchart in Fig. 4. For example, the control unit 200 executes the processes from step (hereinafter referred to as S) 501 onwards before detecting the charging current using the charging current detection circuit PRI_ISNS.

[0053] In S501, the control unit 200 determines whether a pulse signal is being output from the CLK terminal (output on). If the control unit 200 determines in S501 that a pulse signal is being output from the CLK terminal, the process proceeds to S502. In S502, the control unit 200 determines whether the developer separation mechanism is in the separation state. If the control unit 200 determines in S502 that the developer separation mechanism is in the separation state, the process proceeds to S503. In S503, the control unit 200 outputs a pulse signal from the BLD_SW terminal (pulse signal on) and ends the process. Here, pulse signal on means that the pulse signal output from the BLD_SW terminal alternates between high and low levels. This turns on the transistor Tr51 of the blade circuit 135b, shorting both terminals of the Zener diode ZD51, and the blade voltage Vbld becomes the same voltage as the development voltage Vdev.

[0054] If the control unit 200 determines in S502 that the developer separation mechanism is not in the separated state, i.e., that the developer separation mechanism is in the contact state, it proceeds to S504. In S504, the control unit 200 turns off the pulse signal from the BLD_SW terminal and ends the process. Here, "pulse signal off" means that the signal output from the BLD_SW terminal is fixed to a high or low level state rather than alternately switching between high and low levels. This turns off the transistor Tr51 of the blade circuit 135b, prevents a short circuit between the two terminals of the Zener diode ZD51, and causes the absolute value of the blade voltage Vbld to be greater than the development voltage Vdev by the Zener voltage (ΔVz) of the Zener diode ZD51.

[0055] If the control unit 200 determines in S501 that the CLK terminal is not outputting a pulse signal, the process proceeds to S504. By performing this type of control, even in an inexpensive configuration in which multiple voltages are generated by a common boost circuit, the charging voltage Vpri can be output without causing image defects at the contact point between the developing roller 133a and the developing blade 135a.

[0056] As described above, according to the embodiment, it is possible to provide an inexpensive circuit configuration in a configuration including a developing blade, and the inexpensive circuit configuration can reduce the occurrence of image defects at the contact portion between the developing roller and the developing blade. [Example]

[0057] The second embodiment differs from the first embodiment in that the BLD_SW terminal of the control unit 200 is replaced with a DEV_CONT terminal. In the second embodiment, only the differences from the first embodiment will be described, and the same reference numerals will be used for the same parts as in the first embodiment, and the description thereof will be omitted. In the second embodiment, the control unit 200 controls the on / off state of the transistor Tr51 by switching the frequency of the first pulse signal output to the development circuit 133b.

[0058] (Blade Circuit) FIG. 5 is a circuit diagram of the imaging unit 103 of the second embodiment. Unlike FIG. 2, one terminal of capacitor C50 is connected to the DEV_CONT terminal of the control unit 200, not the BLD_SW terminal. The DEV_CONT terminal outputs a pulse signal that alternates between high and low states. In the blade circuit 135b, when the DEV_CONT terminal is low, current flows from the power supply voltage V1 through transistor Tr31, capacitor C51, diode D51, and capacitor C50, and finally into the DEV_CONT terminal. When the DEV_CONT terminal is high, current flows from the DEV_CONT terminal to the power supply voltage V1 via capacitor C50, diode D52, and transistor Tr31. When the DEV_CONT terminal alternates between high and low states, the potential of capacitor C51 stabilizes. The potential of capacitor C51 varies depending on the frequency of the pulse signal output from the DEV_CONT terminal. When the frequency of the pulse signal is high, the amount of charge stored in capacitor C51 is greater than the amount of charge discharged, so the potential of capacitor C51 is high. On the other hand, when the frequency of the pulse signal is low, the amount of charge discharged from capacitor C51 is greater than the amount of charge stored in capacitor C51, so the potential of capacitor C51 is low. When the potential of capacitor C51 exceeds the base-emitter voltage Vf of transistor Tr51, transistor Tr51 turns on, and when the potential of capacitor C51 falls below the base-emitter voltage Vf of transistor Tr51, transistor Tr51 turns off.

[0059] In the second embodiment, the frequency of the pulse signal output from the DEV_CONT terminal is, for example, 20 kHz (low frequency) and 200 kHz (high frequency). At 200 kHz, the potential of capacitor C51 exceeds the base-emitter voltage Vf of transistor Tr51, turning on transistor Tr51 and shorting the terminals of Zener diode ZD51. On the other hand, at 20 kHz, transistor Tr51 is turned off and the terminals of Zener diode ZD51 are not shorted.

[0060] Here, the transistor Tr51 is turned on when the frequency of the first pulse signal is equal to or greater than a predetermined frequency, and is turned off when the frequency of the first pulse signal is less than the predetermined frequency. For this reason, in the second embodiment, 200 kHz is selected as the frequency equal to or greater than the predetermined frequency, and 20 kHz is selected as the frequency less than the predetermined frequency. The predetermined frequency may be determined depending on the characteristics of the transistor used (the voltage Vf described above), the circuit configuration to which the transistor Tr51 is connected, etc.

[0061] Figure 6(a) shows the relationship between the low duty cycle of the pulse signal output from the DEV_CONT terminal and the blade voltage Vbld. In Figure 6(a), the horizontal axis represents the low duty cycle of the pulse signal output from the DEV_CONT terminal, and the vertical axis represents the blade voltage Vbld. When the frequency of the pulse signal output from the DEV_CONT terminal is 200 kHz, the blade voltage Vbld is the same as the developing voltage Vdev (Vbld = Vdev). On the other hand, when the frequency of the pulse signal output from the DEV_CONT terminal is 20 kHz, the absolute value of the blade voltage Vbld is greater than the developing voltage Vdev by the Zener voltage ΔVz of the Zener diode ZD51 (|Vbld| = |Vdev| + ΔVz).

[0062] The developing voltage Vdev is a voltage that corresponds to the low duty of the signal output from the DEV_CONT terminal, regardless of the frequency of the pulse signal output from the DEV_CONT terminal. Figure 6(b) is a graph showing the relationship between the pulse signal output from the DEV_CONT terminal and the developing voltage Vdev, with the horizontal axis representing the low duty of the pulse signal output from the DEV_CONT terminal and the vertical axis representing the developing voltage Vdev. As shown in Figure 6(b), the greater the low duty of the pulse signal output from the DEV_CONT terminal, the greater the absolute value of the developing voltage Vdev. However, the developing voltage Vdev does not depend on the frequency of the pulse signal output from the DEV_CONT terminal.

[0063] (Control during development separation) In the second embodiment, the control of the image forming apparatus 101 to reduce the potential difference between the developing roller 133a and the developing blade 135a to zero will be described using the flowchart of FIG. 7. Note that the processes of S801 and S802 in FIG. 7 are similar to the processes of S501 and S502 in FIG. 4, and therefore will not be described again. If it is determined in S802 that the developing roller 133a and the developing blade 135a are in the separated state, the control unit 200 advances the process to S803. In S803, the control unit 200 outputs a pulse signal from the DEV_CONT terminal at a higher frequency, for example, 200 kHz. This turns on the transistor Tr51, shorting the two terminals of the Zener diode ZD51, and the blade voltage Vbld becomes the same voltage as the developing voltage Vdev.

[0064] On the other hand, if it is determined in S802 that the developer separation mechanism is not in the separated state, i.e., that the developer separation mechanism is in the contact state, the control unit 200 proceeds to S804. In S804, the control unit 200 outputs the pulse signal output from the DEV_CONT terminal at a lower frequency, for example, 20 kHz. This turns off the transistor Tr51, prevents a short circuit between the two terminals of the Zener diode ZD51, and the absolute value of the blade voltage Vbld becomes greater than the development voltage Vdev by the Zener voltage of the Zener diode ZD51. Note that even if the CLK terminal of the control unit 200 is not outputting a pulse signal in S801, the frequency of the pulse signal output from the DEV_CONT terminal is set to the lower frequency of 20 kHz.

[0065] As described above, in the second embodiment, the potential difference between the developing roller 133a and the developing blade 135a is switched by changing the frequency of the pulse signal output from the DEV_CONT terminal.

[0066] (Variation) Alternatively, one terminal of the capacitor C50 in the blade circuit 135b may be connected to the TSR_CONT terminal instead of the DEV_CONT terminal. In this case, the frequency of the pulse signal output from the TSR_CONT terminal is switched instead of the DEV_CONT terminal. This allows the potential difference between the developing roller 133a and the developing blade 135a to be switched.

[0067] The control unit 200 controls the on / off state of the transistor Tr51 by switching the frequency of the second pulse signal (the pulse signal output from the TSR_CONT terminal) output to the toner supply R circuit 134b. The transistor Tr51 is turned on when the frequency of the second pulse signal is equal to or greater than a predetermined frequency, and is turned off when the frequency of the second pulse signal is less than the predetermined frequency. That is, when the frequency of the second pulse signal is controlled to be equal to or greater than the predetermined frequency, the transistor Tr51 is turned on, the Zener diode ZD51 is short-circuited, and the blade voltage Vbld and the development voltage Vdev become equal. On the other hand, when the frequency of the second pulse signal is controlled to be less than the predetermined frequency, the transistor Tr51 is turned off, the Zener diode ZD51 is not short-circuited, and the blade voltage Vbld has an absolute value greater than the development voltage Vdev by the amount of the Zener voltage.

[0068] By performing the above-described control, in addition to the effect of Example 1, the signals of the control unit 200 can be reduced, and the charging voltage Vpri can be output at a lower cost without causing image defects at the contact point between the developing roller 133a and the developing blade 135a.

[0069] As described above, according to the second embodiment, it is possible to provide an inexpensive circuit configuration in a configuration including a developing blade, and the inexpensive circuit configuration can reduce the occurrence of image defects at the contact portion between the developing roller and the developing blade. [Explanation of symbols]

[0070] 131 Photosensitive drum 132a Charging roller 132b Charging circuit 133a Developing roller 133b Development circuit 135a Developing Blade 135b Blade Circuit

Claims

1. A photoreceptor; a charging member for charging the photoreceptor; a developing member that develops the electrostatic latent image formed on the photosensitive member with toner to form a toner image on the photosensitive member; a developing blade that contacts the developing member and levels the toner carried on the surface of the developing member; a first power source that generates a first voltage and applies the first voltage to the charging member; a second power source that generates a second voltage lower than the first voltage from the first voltage generated by the first power source and applies the second voltage to the developing blade; a third power source that generates a third voltage lower than the second voltage from the second voltage generated by the second power source and applies the third voltage to the developing member; a control means for controlling the first power source, the second power source, and the third power source; Equipped with the developing member can be in a contact state in which it is in contact with the photosensitive member or in a spaced state in which it is spaced from the photosensitive member; the developing blade contacts the developing member in the contact state and the separated state, When a state in which the potential difference between the second voltage and the third voltage becomes a first potential difference is defined as a first state, and a state in which the potential difference becomes a second potential difference that is larger than the first potential difference is defined as a second state, The image forming apparatus is characterized in that the control means controls the image forming apparatus to be in the first state when in the separated state, and controls the image forming apparatus to be in the second state when in the contact state.

2. the control means controls the third power supply by outputting a first pulse signal; 2. The image forming apparatus according to claim 1, wherein the third voltage has a negative polarity, and the absolute value of the third voltage increases as the low duty of the first pulse signal increases.

3. The second power source is a Zener diode having a cathode terminal connected to the third voltage output from the third power supply and an anode terminal connected to the second voltage output from the second power supply; a transistor having an emitter terminal connected to the cathode terminal of the Zener diode and a collector terminal connected to the anode terminal of the Zener diode; and the first state is a state in which the transistor is turned on to short-circuit the anode terminal and the cathode terminal of the Zener diode, 3. The image forming apparatus according to claim 2, wherein the second state is a state in which the transistor is turned off and the anode terminal and the cathode terminal of the Zener diode are not short-circuited.

4. 4. The image forming apparatus according to claim 3, wherein the control unit controls the on state or the off state of the transistor by outputting a signal for controlling the second power supply.

5. 4. The image forming apparatus according to claim 3, wherein the control unit controls the on state or the off state of the transistor by switching the frequency of the first pulse signal output to the third power supply.

6. 6. The image forming apparatus according to claim 5, wherein the transistor is in the on state when the frequency of the first pulse signal is equal to or greater than a predetermined frequency, and is in the off state when the frequency of the first pulse signal is less than the predetermined frequency.

7. a second contact member that contacts the developing member in the contact state and the separated state; a fourth power source that generates a fourth voltage and applies the fourth voltage to the second contact member; Equipped with The control means outputting a second pulse signal to control the fourth power supply; 4. The image forming apparatus according to claim 3, wherein the on state or the off state of the transistor is controlled by switching the frequency of the second pulse signal output to the fourth power supply.

8. 8. The image forming apparatus according to claim 7, wherein the transistor is in the on state when the frequency of the second pulse signal is equal to or greater than a predetermined frequency, and is in the off state when the frequency of the second pulse signal is less than the predetermined frequency.

9. 9. The image forming apparatus according to claim 7, wherein the fourth voltage has a negative polarity, and the absolute value of the fourth voltage increases as the low duty of the second pulse signal increases.

10. a toner container for storing toner; a supply roller that supplies the toner contained in the toner container to the developing member; Equipped with 10. The image forming apparatus according to claim 7, wherein the second contact member is the supply roller.

11. a detection means for detecting a current flowing through the charging member; 11. The image forming apparatus according to claim 1, wherein the control unit controls the charging member to be in the separated state when the detection unit detects the current flowing through the charging member.

12. 12. The image forming apparatus according to claim 1, further comprising a contact / separation unit that switches the developing member between the contact state and the separated state.

Images