Voltage abnormality detection device and power supply device

Abstract

The adder sets a voltage upper limit (VU) by adding a first voltage to a sinusoidal reference voltage (VREF) whose frequency and phase match those of the AC voltage (VI). The first integrator time-integrates a first deviation (VI-VU) of the instantaneous value of the AC voltage from the voltage upper limit (VU) when the instantaneous value of the AC voltage (VI) exceeds the voltage upper limit (VU). The voltage rise detection circuit detects a voltage rise of the AC voltage (VI) when the first integral value of the first integrator exceeds a first threshold. The subtractor sets a voltage lower limit (VL) by subtracting a second voltage from the reference voltage (VREF). The second integrator time-integrates a second deviation (VI-VL) of the instantaneous value of the AC voltage from the voltage lower limit (VL) when the instantaneous value of the AC voltage (VI) falls below the voltage lower limit (VL). The voltage drop detection circuit detects a voltage drop in the AC voltage (VI) when the second integral value obtained by the second integrator exceeds a second threshold value.

Description

[Technical Field]

[0001] The present disclosure relates to a voltage abnormality detection device that detects abnormalities in AC power supply voltage and a power supply device including the same. [Background technology]

[0002] For example, Japanese Patent Laid-Open Publication No. 2006-10435 (Patent Document 1) discloses a voltage abnormality detection device that detects abnormalities in AC voltage supplied from an AC power source. This voltage abnormality detection device generates a sinusoidal reference voltage from the phase of the AC voltage and the rated voltage, sets a value obtained by adding a predetermined value to the reference voltage as an upper voltage limit, and sets a value obtained by subtracting the predetermined value from the reference voltage as a lower voltage limit. The voltage abnormality detection device detects AC voltage abnormalities by comparing the instantaneous value of the AC voltage with the upper and lower voltage limits. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-10435 Summary of the Invention [Problem to be solved by the invention]

[0004] In order to prevent erroneous detection, the above-mentioned voltage abnormality detection device using the instantaneous value of AC voltage is configured to detect an abnormality in AC voltage when the instantaneous value of AC voltage exceeds the upper voltage limit value and continues to exceed a predetermined abnormality detection time, or when the instantaneous value of AC voltage is below the lower voltage limit value and continues to exceed the abnormality detection time.

[0005] However, the impact of voltage fluctuations on the load during the abnormality detection time varies depending on the magnitude of the AC voltage fluctuation. To prevent the load from stopping or malfunctioning when the voltage fluctuation is large, the abnormality detection time is usually set based on the limit value at which the load can operate stably even when the voltage fluctuation is large. This allows for fast detection of AC voltage abnormalities, but on the other hand, when the voltage fluctuation is small, unnecessary abnormality detection operations are performed even when the load is in a state where it can operate stably. The impact of voltage fluctuations on the load also varies depending on the type of load.

[0006] One possible solution to this problem is to set upper and lower voltage limits and anomaly detection times so that the greater the voltage fluctuation, the shorter the anomaly detection time. However, this requires setting multiple upper and lower voltage limits and multiple anomaly detection times in consideration of the load's tolerance for voltage fluctuations, which is not easy to implement.

[0007] Furthermore, the voltage abnormality detection device described above is unable to grasp the degree to which the instantaneous value of the AC voltage deviates from the upper and lower voltage limits, which raises concerns about the accuracy of abnormality detection.

[0008] The present disclosure has been made to solve such problems, and an object of the present disclosure is to provide a voltage abnormality detection device that can accurately and easily detect abnormalities in AC voltage. [Means for solving the problem]

[0009] According to one aspect of the present disclosure, a voltage abnormality detection device that detects abnormalities in AC voltage supplied from an AC power source includes a voltage detector that detects an instantaneous value of the AC voltage, a voltage rise detection circuit that detects a voltage rise in the AC voltage based on the detection value of the voltage detector, and a voltage drop detection circuit that detects a voltage drop in the AC voltage based on the detection value of the voltage detector.

[0010] The voltage rise detection circuit includes an adder and a first integrator. The adder sets a voltage upper limit by adding a first voltage to a sinusoidal reference voltage whose frequency and phase match those of the AC voltage. When the instantaneous value of the AC voltage exceeds the voltage upper limit, the first integrator time-integrates a first deviation of the instantaneous value of the AC voltage from the voltage upper limit. The voltage rise detection circuit detects a voltage rise in the AC voltage when the first integral value of the first integrator exceeds a first threshold.

[0011] The voltage drop detection circuit includes a subtractor and a second integrator. The subtractor sets a lower voltage limit value by subtracting a second voltage from a reference voltage. When the instantaneous value of the AC voltage falls below the lower voltage limit value, the second integrator time-integrates a second deviation of the instantaneous value of the AC voltage from the lower voltage limit value. When the second integral value of the second integrator exceeds a second threshold value, the voltage drop detection circuit detects a voltage drop of the AC voltage. [Effects of the Invention]

[0012] According to the present disclosure, it is possible to provide a voltage abnormality detection device that can accurately and easily detect abnormalities in AC voltage. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a schematic block diagram showing the configuration of a voltage abnormality detection device according to an embodiment of the present invention; [Figure 2] FIG. 2 is a diagram illustrating an example of a hardware configuration of a voltage abnormality detection device. [Figure 3] FIG. 2 is a diagram illustrating an allowable voltage range of an AC voltage. [Figure 4] 5A and 5B are diagrams illustrating the operation of the voltage abnormality detection device according to the present embodiment. [Figure 5] FIG. 2 is a block diagram showing an example of the configuration of a voltage rise detection circuit; [Figure 6] FIG. 2 is a block diagram showing a configuration example of a voltage drop detection circuit. [Figure 7] 1 is a circuit block diagram showing a configuration of a first application example of a voltage abnormality detection device according to an embodiment of the present invention. [Figure 8] 10 is a circuit block diagram showing the configuration of a second application example of the abnormal voltage detection device according to the present embodiment. FIG. [Figure 9] 10A and 10B are diagrams illustrating the operation of a voltage abnormality detection device according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals, and description thereof will not be repeated.

[0015] [Configuration of voltage abnormality detection device] Fig. 1 is a schematic block diagram showing the configuration of a voltage abnormality detection device according to an embodiment of the present disclosure. As shown in Fig. 1, a voltage abnormality detection device 4 according to this embodiment is a device for detecting an abnormality in an AC voltage VI supplied from an AC power supply 1. The AC power supply 1 may be a commercial AC power supply or a generator. The voltage abnormality detection device 4 is typically used to detect voltage abnormalities in power supply devices such as uninterruptible power sources and multiple power compensators.

[0016] Abnormalities in the AC voltage VI include a "voltage drop" caused by an instantaneous voltage drop or power outage in the AC power supply 1, and a "voltage rise" caused by an overvoltage in the AC power supply 1. The voltage abnormality detection device 4 detects voltage drops and rises in the AC voltage VI and outputs an abnormality detection signal DET indicating the detection result. If the AC voltage VI is abnormal, the abnormality detection signal DET is set to H (logical high) level, and if the AC voltage VI is normal, the abnormality detection signal DET is set to L (logical low) level.

[0017] The voltage abnormality detection device 4 is connected to an AC circuit 3 that connects an AC power supply 1 and a load 2. The voltage abnormality detection device 4 includes a voltage detector 5, a voltage rise detection circuit 6, a voltage drop detection circuit 8, and an OR (logical sum) circuit 10.

[0018] The voltage detector 5 detects the instantaneous value of the AC voltage VI on the AC electric circuit 3. The voltage detector 5 is, for example, a potential transformer (PT).

[0019] The voltage rise detection circuit 6 determines whether a voltage rise in the AC voltage VI has occurred based on the instantaneous value of the AC voltage VI detected by the voltage detector 5, and outputs a detection signal DEU indicating the determination result. If the voltage rise detection circuit 6 determines that a voltage rise in the AC voltage VI has occurred, it sets the detection signal DEU to an H level. If the voltage rise detection circuit 6 determines that a voltage rise in the AC voltage VI has not occurred, it sets the detection signal DEU to an L level. The voltage rise detection circuit 6 will be described in detail later.

[0020] The voltage drop detection circuit 8 determines whether or not a voltage drop has occurred in the AC voltage VI based on the instantaneous value of the AC voltage VI detected by the voltage detector 5, and outputs a detection signal DEL indicating the determination result. If it is determined that a voltage drop has occurred in the AC voltage VI, the voltage drop detection circuit 8 sets the detection signal DEL to an H level. If it is determined that a voltage drop has not occurred in the AC voltage VI, the voltage drop detection circuit 8 sets the detection signal DEL to an L level. The voltage drop detection circuit 8 will be described in detail later.

[0021] The OR circuit 10 generates an abnormality detection signal DET based on the output signal DEU of the voltage rise detection circuit 6 and the output signal DEL of the voltage drop detection circuit 8. When either the detection signal DEU or DEL is at H level, the OR circuit 10 outputs an H-level abnormality detection signal DET. In other words, when it is determined that either a voltage rise or a voltage drop has occurred in the AC voltage VI, the abnormality detection signal DET becomes H level.

[0022] On the other hand, when the detection signals DEU and DEL are both at L level, the OR circuit 10 outputs an L-level abnormality detection signal DET. That is, when it is determined that neither a voltage increase nor a voltage decrease has occurred in the AC voltage VI, the abnormality detection signal DET becomes L level.

[0023] 2 is a diagram showing an example of the hardware configuration of the voltage abnormality detection device 4. The voltage abnormality detection device 4 can be typically configured by a microcomputer in which a predetermined program is stored in advance.

[0024] For example, as shown in Fig. 2, the voltage abnormality detection device 4 includes a CPU (Central Processing Unit), a memory, and an input / output (I / O) circuit. The CPU, memory, and I / O device can exchange data with each other via a bus. A program is pre-stored in a portion of the memory, and the CPU executes the program to realize the functions of the voltage rise detection circuit 6, the voltage drop detection circuit 8, and the OR circuit 10.

[0025] The I / O circuit inputs and outputs signals and data to and from the outside of the voltage abnormality detection device 4. The signals that the I / O circuit receives from the outside of the voltage abnormality detection device 4 include switching commands for switching the judgment threshold values ​​used in the voltage rise detection circuit 6 and the voltage drop detection circuit 8.

[0026] 2, at least a part of the voltage abnormality detection device 4 can be configured using a circuit such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit). Also, at least a part of the voltage abnormality detection device 4 can be configured using an analog circuit.

[0027] As described above, the mechanisms of the blocks of the voltage rise detection circuit 6, the voltage drop detection circuit 8, and the OR circuit 10 shown in FIG. 1 can be realized by at least one of software processing and hardware processing by the voltage abnormality detection device 4.

[0028] [Operation of voltage abnormality detection device] Next, the operation of the voltage abnormality detection device 4 shown in FIG. 1 will be described.

[0029] In the voltage abnormality detection device 4, an allowable voltage range is set for the AC voltage VI. Fig. 3 is a diagram illustrating the allowable voltage range of the AC voltage VI. Fig. 3 shows the waveforms of the reference voltage VREF, the upper voltage limit VU, and the lower voltage limit VL.

[0030] The reference voltage VREF is generated using the instantaneous value of the AC voltage VI detected by the voltage detector 5. Specifically, the phase θ of the AC voltage VI is calculated from the instantaneous value of the AC voltage VI, and a sinusoidal reference voltage VREF is generated from the calculated phase θ and the rated voltage V of the AC power supply 1. The reference voltage VREF is expressed as √2Vsinθ. The frequency and phase of the reference voltage VREF match those of the AC voltage VI.

[0031] The voltage upper limit value VU is the voltage obtained by adding a first value dU to the reference voltage VREF. The voltage upper limit value VU is expressed as √2V sinθ+dU. The first value dU is the peak value √2V of the reference voltage VREF multiplied by α. α is the voltage rise rate. The voltage rise rate α is the deviation of the effective value of the AC voltage VI from the reference voltage VREF / reference voltage VREF, and is expressed as a percentage.

[0032] The lower voltage limit VL is the voltage obtained by subtracting a second value dL from the reference voltage VREF. The lower voltage limit VL is expressed as √2V sinθ-dL. The second value dL is the peak value √2V of the reference voltage VREF multiplied by β. β is the voltage drop rate. The voltage drop rate β is the deviation of the effective value of the AC voltage VI from the reference voltage VREF / reference voltage VREF, and is expressed as a percentage.

[0033] The allowable voltage range of the AC voltage VI is a voltage range defined by an upper voltage limit value VU and a lower voltage limit value VL. By comparing the instantaneous value of the AC voltage VI detected by the voltage detector 5 with the upper voltage limit value VU and the lower voltage limit value VL, it is possible to determine whether the AC voltage VI deviates from the allowable voltage range.

[0034] (Explanation of Comparative Example) First, the operation of the voltage abnormality detection device according to the comparative example will be described with reference to FIG.

[0035] 9 shows the waveform of the AC voltage VI detected by the voltage detector 5 and the allowable voltage range of the AC voltage VI. VI1 and VI2 are values ​​detected by the voltage detector 5.

[0036] As shown in FIG. 9, during the period from time t1 to t2, the period from t3 to t5, and the period from time t6 to t7, the AC voltage VI1 is below the lower limit voltage VL, and a voltage drop occurs.

[0037] The voltage abnormality detection device according to the comparative example compares the instantaneous value of the AC voltage VI detected by the voltage detector 5 with a lower voltage limit VL and an upper voltage limit VU, and determines whether the AC voltage VI deviates from the allowable voltage range. If the instantaneous value of the AC voltage VI remains below the lower voltage limit VL for more than a predetermined abnormality detection time T1, the voltage abnormality detection device detects a voltage drop in the AC voltage VI and outputs an H-level abnormality detection signal DET.

[0038] 9, the state in which the instantaneous value of the AC voltage VI1 is below the voltage lower limit VL continues beyond the abnormality detection time T1 from time t3. Therefore, at time t4, when the abnormality detection time T1 has elapsed since time t1, the voltage abnormality detection device outputs an H-level abnormality detection signal DET.

[0039] When the abnormality detection signal DET is at H level, the voltage abnormality detection device detects the restoration of the AC voltage VI based on the instantaneous value of the AC voltage VI. Specifically, the voltage abnormality detection device detects the restoration of the AC voltage VI when the state in which the instantaneous value of the AC voltage VI is equal to or greater than the lower voltage limit VL and equal to or less than the upper voltage limit VU continues for more than a predetermined power restoration detection time T2. In this case, the voltage abnormality detection device outputs an abnormality detection signal DET at L level.

[0040] 9, at time t5 after time t4, the instantaneous value of AC voltage VI1 becomes equal to or greater than voltage lower limit VL, but at time t6, the instantaneous value of AC voltage VI1 falls below voltage lower limit VL again. Because the period from time t5 to t6 is shorter than power recovery detection time T2, the abnormality detection signal DET remains at H level.

[0041] In this way, the voltage abnormality detection device according to the comparative example is configured to detect an abnormality in the AC voltage VI when the state in which the AC voltage VI deviates from the allowable voltage range continues beyond the abnormality detection time T1.

[0042] However, the impact of the voltage drop on the load during the abnormality detection time T1 varies depending on the voltage drop rate of the AC voltage VI. Comparing AC voltages VI1 and VI2 in FIG. 9, a voltage drop occurs between times t3 and t5 in both cases. However, the voltage drop rate during this time is greater for AC voltage VI2 than for AC voltage VI1. Therefore, while the load receiving AC voltage VI1 is not affected during the abnormality detection time T1, the load receiving AC voltage VI2 may experience problems such as shutdown or malfunction. Therefore, if the voltage drop rate of AC voltage VI is large, it is necessary to detect an abnormality in AC voltage VI earlier than time t4, which is the time when the abnormality detection time T1 elapses from time t3. To achieve this, the abnormality detection time T1 must be shortened.

[0043] On the other hand, if the voltage drop rate of the AC voltage VI is small, it is permissible to detect an abnormality in the AC voltage VI at a timing later than time t4. Therefore, it is permissible to lengthen the abnormality detection time T1. FIG. 9 shows the abnormality detection signal DET based on the abnormality detection time T3, which is longer than the abnormality detection time T1. At time t5, before the abnormality detection time T3 has elapsed from time t3, the instantaneous value of the AC voltage VI1 becomes equal to or greater than the lower voltage limit VL, so the abnormality detection signal DET remains at the L level. If the voltage drop rate of the AC voltage VI is small, the load can continue to operate stably from time t3 to t5. However, if the voltage drop rate of the AC voltage VI is large, the load may stop or malfunction.

[0044] Here, the effect of the voltage drop rate of the AC voltage VI and the length of the abnormality detection time T1 on the load varies depending on the type of load. The load's ability to withstand voltage drops is generally defined by the voltage drop rate and the duration of the voltage drop. The duration of the voltage drop is the time the load can continue to operate stably during a voltage drop.

[0045] For example, variable speed motors used in power electronics may stop if a voltage drop of 15% or more continues for 0.01 seconds. Electromagnetic switches may open if a voltage drop of 50% or more continues for 0.01 seconds. Meanwhile, general-purpose personal computers (PCs) and fluorescent lights may stop if a voltage drop of 70% or more continues for 0.1 seconds.

[0046] Therefore, if the voltage lower limit VL and the abnormality detection time T1 are set according to the voltage drop tolerance of the load, the effect of a voltage drop on the load can be reduced. Also, if the voltage lower limit VL and the abnormality detection time T1 are set according to the voltage drop tolerance of the load so that the abnormality detection time T1 becomes shorter as the voltage drop rate of the AC voltage VI increases, it becomes possible to quickly detect an abnormality in the AC voltage VI when the voltage drop rate of the AC voltage VI is large.

[0047] However, this is not easy to achieve because it requires multiple settings for the voltage lower limit VL and the abnormality detection time T1. Therefore, in the comparative example, the abnormality detection time T1 is set assuming a case where the voltage drop rate of the AC voltage VI reaches the limit of the load's voltage drop tolerance. For example, for a load that shuts down when a voltage drop of 15% or more continues for 0.01 seconds, the abnormality detection time T1 is set to 0.01 seconds assuming a case where the voltage drop rate becomes 15%. As a result, when the voltage drop rate of the AC voltage VI is less than 15%, unnecessary abnormality detection operation is performed even though the load is in a state where it can operate stably.

[0048] (Voltage Abnormality Detector According to the Present Embodiment) In this embodiment, in order to resolve the concerns described in the comparative example, the abnormality detection area is used as a judgment threshold for detecting an abnormality in the AC voltage VI, instead of the abnormality detection time T1. FIG. 4 is a diagram illustrating the operation of the voltage abnormality detection device 4 according to this embodiment. FIG. 4 shows the waveform of the AC voltage VI detected by the voltage detector 5 and the allowable voltage range of the AC voltage VI. VI1 and VI2 are detection values ​​of the voltage detector 5.

[0049] 4, between times t1 and t2, AC voltage VI1 is below voltage lower limit VL, causing a voltage drop. In voltage abnormality detection device 4, voltage drop detection circuit 8 compares the instantaneous value of AC voltage VI1 with voltage lower limit VL.

[0050] When the instantaneous value of AC voltage VI1 falls below voltage lower limit VL at time t1, voltage drop detection circuit 8 calculates a deviation VL-VI1 of the instantaneous value of AC voltage VI1 from voltage lower limit VL by subtracting the instantaneous value of AC voltage VI1 from voltage lower limit VL. The greater the voltage drop rate of AC voltage VI1, the greater the deviation VL-VI1.

[0051] The voltage drop detection circuit 8 calculates an integral value SL by integrating the calculated deviation VL-VI1 over time. The calculated integral value SL essentially corresponds to the area of ​​the portion surrounded by the voltage lower limit VL and the AC voltage VI1 (the shaded area R1 in FIG. 4).

[0052] The voltage drop detection circuit 8 compares the calculated integral value SL with a predetermined abnormality detection area SLth. If the integral value SL is greater than the abnormality detection area SLth, the voltage drop detection circuit 8 determines that a voltage drop has occurred in the AC voltage VI1, and outputs an H-level detection signal DEL.

[0053] 4, between times t1 and t2, AC voltage VI2 exceeds upper voltage limit VU, causing a voltage rise. In voltage abnormality detection device 4, voltage rise detection circuit 6 compares the instantaneous value of AC voltage VI2 with upper voltage limit VU.

[0054] In response to the instantaneous value of AC voltage VI2 exceeding upper voltage limit value VU at time t1, voltage rise detection circuit 6 calculates the deviation VI2-VU of the instantaneous value of AC voltage VI2 from upper voltage limit value VU by subtracting upper voltage limit value VU from the instantaneous value of AC voltage VI2. The greater the voltage rise rate, the greater the deviation VI2-VU.

[0055] The voltage rise detection circuit 6 calculates an integral value SU by integrating the calculated deviation VI2-VU over time. The calculated integral value SU essentially corresponds to the area of ​​the portion surrounded by the voltage upper limit value VU and the AC voltage VI2 (the shaded area R2 in FIG. 4).

[0056] The voltage rise detection circuit 6 compares the calculated integral value SU with a predetermined abnormality detection area SUth. If the integral value SU is greater than the abnormality detection area SUth, the voltage rise detection circuit 6 determines that a voltage rise has occurred in the AC voltage VI2, and outputs an H-level detection signal DEU.

[0057] As described above, in this embodiment, the voltage abnormality detection device 4 is configured to calculate areas SL and SU of regions (regions R1 and R2 in FIG. 4) surrounded by a portion where the waveform of the AC voltage VI detected by the voltage detector 5 deviates from the allowable voltage range of the AC voltage VI and the allowable voltage range. The voltage abnormality detection device 4 then detects an abnormality in the AC voltage VI by comparing the calculated areas SL and SU with predetermined abnormality detection areas SLth and SUth, respectively.

[0058] In the example of FIG. 4, after time t1, the integral value SL increases with time. The rate at which the integral value SL increases becomes faster as the deviation VL-VI1 increases. As a result, the larger the deviation VL-VI1, the earlier the timing at which the integral value SL exceeds the abnormality detection area SLth (i.e., the timing at which a voltage drop is detected). This means that the greater the voltage drop rate of the AC voltage VI, the shorter the abnormality detection time T1. In other words, according to this embodiment, when the voltage drop rate of the AC voltage VI is large, it is possible to quickly detect a voltage drop in the AC voltage VI.

[0059] In contrast, the smaller the deviation VL-VI1, the later the timing at which the integral value SL exceeds the abnormality detection area SLth (i.e., the timing at which a voltage drop is detected). This means that the smaller the voltage drop rate of the AC voltage VI, the longer the abnormality detection time T1. In other words, according to this embodiment, when the voltage drop rate of the AC voltage VI is small, it is possible to prevent unnecessary abnormality detection operations for the AC voltage VI from being performed.

[0060] The same can be said for detecting a voltage rise in the AC voltage VI. In the example of FIG. 4, after time t1, the rate at which the integral value SU increases becomes faster as the deviation VI2-VU becomes larger. As a result, the larger the deviation VI2-VU, the earlier the timing at which the integral value SU exceeds the abnormality detection area SUth (i.e., the timing at which a voltage rise is detected). This means that the greater the voltage rise rate of the AC voltage VI, the shorter the abnormality detection time T1. In other words, according to this embodiment, when the voltage rise rate of the AC voltage VI is large, it is possible to quickly detect a voltage rise in the AC voltage VI.

[0061] In contrast, the smaller the deviation VI2-VU, the later the timing at which the integral value SU exceeds the abnormality detection area SUth (i.e., the timing at which a voltage rise is detected). This means that the smaller the voltage rise rate of the AC voltage VI, the longer the abnormality detection time T1. In other words, according to this embodiment, when the voltage rise rate of the AC voltage VI is small, it is possible to prevent unnecessary abnormality detection operations for the AC voltage VI.

[0062] In this embodiment, the abnormality detection area SLth can be set based on an estimated value of the deviation VL-VI of the instantaneous value of the AC voltage VI relative to the voltage lower limit VL and a target value of the abnormality detection time T1 for that estimated value. For example, if a voltage drop is to be detected when the deviation VL-VI corresponds to a voltage drop rate of 1% and continues for 1 ms, the abnormality detection area SLth can be set based on the product of 1% and 1 ms (=1 [%·ms]). If a voltage drop is to be detected when the deviation VL-VI corresponds to a voltage drop rate of 1% and continues for 5 ms, the abnormality detection area SLth can be set based on the product of 1% and 5 ms (=5 [%·ms]). The estimated value of the deviation VL-VI and the target value of the abnormality detection time T1 can be set according to the load 2's tolerance for voltage drops, and the abnormality detection area SLth can be set based on these values.

[0063] Similarly, the abnormality detection area SUth can be set based on the product of an estimated value of the deviation VI-VU of the instantaneous value of the AC voltage VI from the upper voltage limit value VU and a target value of the abnormality detection time T1 for that estimated value. The estimated value of the deviation VI-VU and the target value of the abnormality detection time T1 can be set according to the tolerance of the load 2 for a voltage rise, and the abnormality detection area SLth can be set based on these values.

[0064] (Configuration example of voltage rise detection circuit 6) Fig. 5 is a block diagram showing a configuration example of the voltage rise detection circuit 6. As shown in Fig. 5, the voltage rise detection circuit 6 includes a PLL (Phase Locked Loop) 60, an adder 62, switching circuits 64 and 66, a subtractor 68, an integrator 70, comparators 72 and 74, and a timing circuit 73.

[0065] The PLL 60 calculates the phase θ of the AC voltage VI from the instantaneous value of the AC voltage VI detected by the voltage detector 5. The PLL 60 generates a sinusoidal reference voltage VREF from the calculated phase θ and the rated voltage V of the AC power supply 1. The reference voltage VREF is expressed as √2V sinθ. The reference voltage VREF matches the AC voltage VI in frequency and phase.

[0066] The switching circuit 64 has a plurality of values ​​dU1, dU2. The value dU1 is the peak value √2V of the reference voltage VREF multiplied by α1. The value dU2 is the peak value √2V of the reference voltage VREF multiplied by α2. α1 and α2 are voltage rise rates. The switching circuit 64 sets one of the plurality of values ​​dU1, dU2 to the first value dU in accordance with a switching command given from outside the voltage abnormality detection device 4. In the example of FIG. 5, the value dU1 is set to the first value dU in accordance with an H-level switching command, and the value dU2 is set to the first value dU in accordance with an L-level switching command.

[0067] The number of values ​​dU1, dU2 held by the switching circuit 64 is not limited to two, and may be one or three or more. For example, a plurality of voltage rise rates α1 to αn can be set in consideration of the voltage rise tolerance of various electrical devices that can serve as the load 2, where n is an integer equal to or greater than 2. A plurality of values ​​dU1 to dUn can then be generated in advance corresponding to these plurality of voltage rise rates α1 to αn, respectively.

[0068] The adder 62 adds the first value dU from the switching circuit 64 to the reference voltage VREF to set the upper voltage limit VU.

[0069] The subtractor 68 subtracts the upper voltage limit value VU from the instantaneous value of the AC voltage VI detected by the voltage detector 5 to calculate the deviation VI-VU of the instantaneous value of the AC voltage VI from the upper voltage limit value VU.

[0070] The integrator 70 integrates over time the deviation VI-VU provided by the subtractor 68. The integrator 70 inputs the obtained integral value SU to the positive input terminal of the comparator 74.

[0071] Comparator 72 receives deviation VI-VU from subtractor 68 at its negative input terminal and value 0 at its positive input terminal. Comparator 72 outputs an H-level signal when deviation VI-VU is smaller than value 0, and outputs an L-level signal when deviation VI-VU is larger than value 0.

[0072] The timing circuit 73 is realized by, for example, a counter, and counts the time during which the comparator 72 outputs an H-level signal. When the time during which the comparator 72 outputs an H-level signal exceeds a first time period, the timing circuit 73 outputs an H-level reset signal RST1.

[0073] The integrator 70 resets the integral value SU to the initial value (SU=0) when it receives an H-level reset signal RST1 from the timer circuit 73. Accordingly, if the state in which the instantaneous value of the AC voltage VI falls below the upper voltage limit value VU continues for more than the first time period, the integral value SU is reset to the initial value.

[0074] The first time period in the timing circuit 73 is preferably set to be longer than the time period during which the reference voltage VREF is near 0. This is because during the time period during which the reference voltage VREF is near 0, the voltage width of the allowable voltage range is narrow, and therefore, a slight phase shift in the AC voltage VI may cause the integral value SU to be reset to its initial value.

[0075] When the comparator 72 outputs an L-level signal, or when the time during which the comparator 72 outputs an H-level signal is less than the first time period, the timer circuit 73 outputs an L-level reset signal RST1. When the integrator 70 receives the L-level reset signal RST1 from the timer circuit 73, it does not reset the integrated value SU.

[0076] The switching circuit 66 has a plurality of abnormality detection areas SU1, SU2. Each of the abnormality detection areas SU1, SU2 is set based on an estimated value of the deviation VI-VU of the instantaneous value of the AC voltage VI from the upper voltage limit value VU, and a target value of the abnormality detection time T1 for that estimated value. The number of abnormality detection areas SU1, SU2 that the switching circuit 66 has is not limited to two. For example, a plurality of abnormality detection areas SU1 to SUm can be set in consideration of the tolerance to voltage rise of various electrical devices that can serve as the load 2, where m is an integer of 2 or greater.

[0077] The switching circuit 66 sets one of the plurality of abnormality detection areas SU1, SU2 as the abnormality detection area SUth in accordance with a switching command given from outside the voltage abnormality detection device 4. In the example of Fig. 5, SU1 is set as the abnormality detection area SUth in accordance with an H-level switching command, and SU2 is set as the abnormality detection area SUth in accordance with an L-level switching command. The abnormality detection area SUth is input to the negative input terminal of the comparator 74.

[0078] The comparator 74 receives the integral value SU from the integrator 70 at its positive input terminal and the abnormality detection area SUth from the switching circuit 66 at its negative input terminal. When the integral value SU is larger than the abnormality detection area SUth, the comparator 74 determines that a voltage rise has occurred in the AC voltage VI and outputs an H-level detection signal DEU. When the integral value SU is smaller than the abnormality detection area SUth, the comparator 74 determines that a voltage rise has not occurred in the AC voltage VI and outputs an L-level detection signal DEU. The detection signal DEU is input to a first input terminal of the OR circuit 10 (FIG. 1).

[0079] In the example of FIG. 5, the voltage rise detection circuit 6 is configured to have a switching circuit 64 for switching the first value dU and a switching circuit 66 for switching the abnormality detection area SUth, but the voltage rise detection circuit 6 may also be configured to have either the switching circuit 64 or 66.

[0080] (Configuration example of voltage drop detection circuit 8) 6 is a block diagram showing a configuration example of the voltage drop detection circuit 8. As shown in FIG. 6, the voltage drop detection circuit 8 includes a PLL 80, subtractors 82 and 88, switching circuits 84 and 86, an integrator 90, comparators 92 and 94, and a timing circuit 93.

[0081] The PLL 80 has the same configuration as the PLL 60 shown in Fig. 5. The PLL 80 calculates the phase θ of the AC voltage VI from the instantaneous value of the AC voltage VI detected by the voltage detector 5, and generates a sinusoidal reference voltage VREF from the calculated phase θ and the rated voltage V of the AC power supply 1.

[0082] The switching circuit 84 has a plurality of values ​​dL1, dL2. The value dL1 is the peak value √2V of the reference voltage VREF multiplied by β1. The value dL2 is the peak value √2V of the reference voltage VREF multiplied by β2. β1 and β2 are voltage drop rates. The switching circuit 84 sets one of the plurality of values ​​dL1, dL2 as the second value dL in accordance with a switching command given from outside the voltage abnormality detection device 4. In the example of FIG. 6, the value dL1 is set to the second value dL in accordance with an H-level switching command, and the value dL2 is set to the second value dL in accordance with an L-level switching command.

[0083] The number of values ​​dL1, dL2 held by the switching circuit 84 is not limited to two, and may be one or three or more. For example, a plurality of voltage drop rates β1 to βn can be set in consideration of the tolerance of various electrical devices that can serve as the load 2 to voltage drops, where n is an integer equal to or greater than 2. A plurality of values ​​dL1 to dLn can then be generated in advance corresponding to these plurality of voltage drop rates β1 to βn, respectively.

[0084] The subtractor 82 sets the lower limit voltage VL by adding the second value dL from the switching circuit 84 to the reference voltage VREF.

[0085] The subtractor 88 subtracts the instantaneous value of the AC voltage VI detected by the voltage detector 5 from the voltage lower limit VL to calculate the deviation VL-I of the instantaneous value of the AC voltage VI from the voltage lower limit VL.

[0086] The integrator 90 time-integrates the deviation VL-VI provided by the subtractor 88. The integrator 90 inputs the obtained integral value SL to the positive input terminal of the comparator 94.

[0087] Comparator 92 receives the deviation VL-VI from subtractor 88 at its negative input terminal and receives the value 0 at its positive input terminal. Comparator 92 outputs an H-level signal when the deviation VL-VI is smaller than the value 0, and outputs an L-level signal when the deviation VL-VI is greater than the value 0.

[0088] The timing circuit 93 is realized by, for example, a counter, and counts the time during which the comparator 92 outputs an H-level signal. When the time during which the comparator 92 outputs an H-level signal exceeds a second time, the timing circuit 93 outputs an H-level reset signal RST2.

[0089] The integrator 90 resets the integral value SL to the initial value (SL=0) when it receives an H-level reset signal RST2 from the timer circuit 93. Accordingly, if the state in which the instantaneous value of the AC voltage VI exceeds the lower limit voltage VL continues for more than the second time period, the integral value SL is reset to the initial value.

[0090] The second time period in the timing circuit 93 is preferably set to be longer than the time period during which the reference voltage VREF is near 0. This is because during the time period during which the reference voltage VREF is near 0, the voltage width of the allowable voltage range is narrow, and therefore, a slight phase shift in the AC voltage VI may cause the integral value SL to be reset to its initial value.

[0091] When the comparator 92 outputs an L-level signal, or when the time during which the comparator 92 outputs an H-level signal is less than the second time, the timer circuit 93 outputs an L-level reset signal RST2. When the integrator 90 receives the L-level reset signal RST2 from the timer circuit 93, it does not reset the integrated value SL.

[0092] The switching circuit 86 has a plurality of abnormality detection areas SL1, SL2. Each of the abnormality detection areas SL1, SL2 is set based on an estimated value of the deviation VL-VI of the instantaneous value of the AC voltage VI from the voltage lower limit VL and a target value of the abnormality detection time T1 for that estimated value. The number of abnormality detection areas SL1, SL2 that the switching circuit 86 has is not limited to two. For example, a plurality of abnormality detection areas SL1 to SLm can be set in consideration of the tolerance to voltage drops of various electrical devices that can serve as the load 2, where m is an integer of 2 or greater.

[0093] The switching circuit 86 sets one of the plurality of abnormality detection areas SL1, SL2 as the abnormality detection area SLth in accordance with a switching command given from outside the voltage abnormality detection device 4. In the example of Fig. 6, SL1 is set as the abnormality detection area SLth in accordance with an H-level switching command, and SL2 is set as the abnormality detection area SLth in accordance with an L-level switching command. The abnormality detection area SLth is input to the negative input terminal of the comparator 94.

[0094] The comparator 94 receives the integrated value SL from the integrator 90 at its positive input terminal and the abnormality detection area SLth from the switching circuit 86 at its negative input terminal. When the integrated value SL is greater than the abnormality detection area SLth, the comparator 94 determines that a voltage drop has occurred in the AC voltage VI and outputs an H-level detection signal DEL. When the integrated value SL is smaller than the abnormality detection area SLth, the comparator 94 determines that a voltage drop has not occurred in the AC voltage VI and outputs an L-level detection signal DEL. The detection signal DEL is input to a second input terminal of the OR circuit 10 (FIG. 1). The OR circuit 10 outputs an H-level abnormality detection signal DET when either the detection signals DEU, DEL is H, and outputs an L-level abnormality detection signal DET when both the detection signals DEU, DEL are L.

[0095] In the example of FIG. 6, the voltage drop detection circuit 8 is configured to have a switching circuit 84 for switching the second value dL and a switching circuit 86 for switching the abnormality detection area SLth, but the voltage drop detection circuit 8 may be configured to have either the switching circuit 84 or 86.

[0096] [effect] As described above, when the instantaneous value of AC voltage VI detected by voltage detector 5 exceeds upper voltage limit VU, voltage abnormality detection device 4 according to this embodiment calculates an integral value SU by time-integrating the deviation of instantaneous value VI-VU of AC voltage VI from upper voltage limit VU. Furthermore, when the instantaneous value of AC voltage VI is below lower voltage limit VL, voltage abnormality detection device 4 calculates an integral value SL by time-integrating the deviation VL-VI of the instantaneous value of AC voltage VI from lower voltage limit VL. Then, when integral value SU is larger than abnormality detection area SUth or when integral value SL is larger than abnormality detection area SLth, voltage abnormality detection device 4 detects an abnormality in AC voltage VI.

[0097] According to the voltage abnormality detection device 4 of this embodiment, when a sudden fluctuation in the AC voltage VI occurs, the abnormality in the AC voltage VI can be detected in a short time from the occurrence of the voltage fluctuation, thereby reducing the impact of the sudden voltage fluctuation on the load. Furthermore, when the fluctuation in the AC voltage VI is small, unnecessary abnormality detection operations can be prevented. In this way, the voltage abnormality detection device 4 of this embodiment can accurately grasp the degree of deviation from the allowable voltage range and detect an abnormality in the AC voltage VI.

[0098] The voltage abnormality detection device according to the comparative example (FIG. 9) is configured to detect an abnormality in the AC voltage VI when the deviation of the AC voltage VI from the allowable voltage range continues beyond the abnormality detection time T1. Therefore, it is not possible to grasp the degree of deviation from the allowable voltage range. In order to grasp the degree of deviation from the allowable voltage range, it is necessary to set multiple upper voltage limits VU and lower voltage limits VL and to set multiple abnormality detection times T1, which is not easy to implement.

[0099] In contrast, in the voltage abnormality detecting device 4 according to the present embodiment, by setting the abnormality detection areas SUth and SLth, it becomes possible to easily set multiple abnormality detection times T1 according to the degree of deviation from the allowable voltage range. Furthermore, by setting multiple abnormality detection areas SUth and SLth, it becomes possible to easily accommodate various loads with different tolerances to fluctuations in the AC voltage VI.

[0100] [Application example of voltage abnormality detection device] Next, an application example of the voltage abnormality detection device 4 according to this embodiment will be described.

[0101] Fig. 7 is a circuit block diagram showing the configuration of an uninterruptible power supply, which is a first application example of the voltage abnormality detection device 4 according to this embodiment. Note that the uninterruptible power supply 100 supplies three-phase AC power to the load 2, but for the sake of simplicity of the drawing and explanation, Fig. 7 shows only the parts related to one phase.

[0102] 7, the uninterruptible power supply 100 includes an input terminal 111, a DC terminal 112, an output terminal 113, switches S1 to S3, a converter 11, a DC line 12, a capacitor 13, a bidirectional chopper 14, an inverter 15, and a control device 16. The control device 16 includes the abnormal voltage detection device 4 according to this embodiment, a chopper control unit 160, a converter control unit 162, and an inverter control unit 164.

[0103] The input terminal 111 receives AC power of a predetermined frequency (e.g., commercial frequency) from the AC power supply 1. The DC terminal 112 is connected to a battery B1. The battery B1 stores DC power. The battery B1 is a secondary battery such as a lithium-ion battery or a lead-acid battery. The battery B1 corresponds to an example of a "DC power supply." The output terminal 113 is connected to a load 2. The load 2 is driven by AC power of a predetermined frequency supplied from the uninterruptible power supply 100.

[0104] The switch S1 is connected between the input terminal 111 and the AC node of the converter 11, and is controlled by the control device 16. When the AC voltage VI supplied from the AC power supply 1 is normal (when the AC power supply 1 is healthy), the switch S1 is turned on, and AC power is supplied from the AC power supply 1 to the converter 11 via the switch S1. When the AC voltage VI supplied from the AC power supply 1 is abnormal (when the AC power supply 1 is abnormal), the switch S1 is turned off, and the AC power supply 1 and the converter 11 are disconnected.

[0105] The instantaneous value of the AC voltage VI supplied from the AC power supply 1 is detected by a voltage abnormality detection device 4 inside the control device 16. The voltage abnormality detection device 4 determines whether an abnormality has occurred in the AC voltage VI based on the instantaneous value of the AC voltage VI, and outputs an abnormality detection signal DET indicating the determination result. The abnormality detection signal DET is provided to a converter control unit 162 that controls the converter 11 and a chopper control unit 160 that controls the bidirectional chopper 14.

[0106] The converter 11 is controlled by the converter control unit 162, and when the abnormality detection signal DET is at L level (when the AC power supply 1 is normal), it converts AC power from the AC power supply 1 into DC power and outputs it to the DC line 12. The converter 11 is a well-known device that includes multiple sets of IGBTs (Insulated Gate Bipolar Transistors) and diodes.

[0107] The capacitor 13 is connected to the DC line 12 and smooths and stabilizes the DC voltage VD of the DC line 12. The instantaneous value of the DC voltage VD of the DC line 12 is detected by the control device 16.

[0108] When the abnormality detection signal DET is at L level (when the AC power supply 1 is normal), the converter control unit 162 controls the converter 11 so that the DC voltage VD of the DC line 12 becomes the reference DC voltage VDR. When the abnormality detection signal DET is at H level (when the AC power supply 1 is abnormal), the converter control unit 162 stops the operation of the converter 11.

[0109] The DC line 12 is connected to the DC terminal 112 via the bidirectional chopper 14 and the switch S2. The switch S2 is controlled by the control device 16. When the uninterruptible power supply 100 is in use, the switch S2 is turned on. When maintenance is performed on the battery B1 or the bidirectional chopper 14, the switch S2 is turned off. The instantaneous value of the voltage VB across the terminals of the battery B1 is detected by the control device 16.

[0110] The bidirectional chopper 14 is controlled by a chopper control unit 160, and exchanges DC power between the DC line 12 and the battery B1. The bidirectional chopper 14 is a well-known device that includes a plurality of sets of IGBTs and diodes, and a reactor.

[0111] When the abnormality detection signal DET is at L level (when the AC power supply 1 is normal), the chopper control unit 160 controls the bidirectional chopper 14 so that the inter-terminal voltage VB of the battery B1 becomes the reference DC voltage VBR. When the abnormality detection signal DET is at H level (when the AC power supply 1 is abnormal), the chopper control unit 160 controls the bidirectional chopper 14 so that the DC voltage VD of the DC line 12 becomes the reference DC voltage VDR.

[0112] The DC line 12 is connected to a DC node of the inverter 15, and the AC node of the inverter 15 is connected to the output terminal 113 via a switch S3. The switch S3 is controlled by the control device 16. When the uninterruptible power supply 100 is in use, the switch S3 is turned on. During maintenance of the inverter 15, the switch S3 is turned off. The instantaneous value of the AC voltage VO applied to the load 2 is detected by the control device 16.

[0113] The inverter 15 is controlled by the inverter control unit 164, and converts the DC power supplied from the converter 11 and the bidirectional chopper 14 via the DC line 12 into AC power of a predetermined frequency and supplies it to the load 2. The inverter 15 is a well-known device that includes multiple sets of IGBTs and diodes. The inverter 15 converts the DC power supplied from the converter 11 or the bidirectional chopper 14 into AC power and supplies it to the load 2. At this time, the inverter control unit 164 controls the inverter 15 so that the AC voltage VO becomes a sinusoidal reference AC voltage VOR.

[0114] As described above, the voltage abnormality detection device 4 can accurately grasp the degree of deviation from the allowable voltage range and detect an abnormality in the AC voltage VI. This allows the uninterruptible power supply 100 to stably supply power to the load 2 even when an abnormality occurs in the AC voltage VI.

[0115] Fig. 8 is a circuit block diagram showing the configuration of a voltage sag compensator, which is a second application example of the abnormal voltage detection device according to this embodiment. Note that the voltage sag compensator 100A supplies three-phase AC power to a load 2, but for the sake of simplicity of the drawing and explanation, Fig. 8 shows only the parts related to one phase.

[0116] 8, the instantaneous sag compensator 100A includes an input terminal 111, a DC terminal 112, an output terminal 113, switches S4 to S7, a high-speed switch (HSS) 21, a transformer 22, a bidirectional converter 23, and a control device 24. The control device 24 includes the abnormal voltage detection device 4 according to this embodiment, a converter control unit 242, and a switch control unit 244.

[0117] The input terminal 111 receives AC power of a predetermined frequency (for example, commercial frequency) from the AC power supply 1. The DC terminal 112 is connected to a battery B1. The output terminal 113 is connected to a load 2. The load 2 is driven by AC power of a predetermined frequency supplied from the instantaneous sag compensator 100A.

[0118] The switch S6 is connected between the input terminal 111 and the output terminal 113. When the instantaneous voltage sag compensator 100A is in use, the switch S6 is turned off. When maintenance is performed on the instantaneous voltage sag compensator 100A, the switch S6 is turned on, and the AC voltage VI from the AC power supply 1 is supplied to the load 2 via the switch S6.

[0119] Switch S4 is connected between input terminal 111 and a first terminal of high-speed switch 21. Switch S5 is connected between a second terminal of high-speed switch 21 and output terminal 113. When using the voltage sag compensator 100A, switches S4 and S5 are turned on. During maintenance of the voltage sag compensator 100A, switches S4 and S5 are turned off.

[0120] The instantaneous value of the AC voltage VI supplied from the AC power supply 1 is detected by a voltage abnormality detection device 4 inside the control device 24. The voltage abnormality detection device 4 determines whether an abnormality has occurred in the AC voltage VI based on the instantaneous value of the AC voltage VI and outputs an abnormality detection signal DET indicating the determination result. The abnormality detection signal DET is provided to a converter control unit 242 that controls the bidirectional converter 23 and a switch control unit 244 that controls the high-speed switch 21.

[0121] The high-speed switch 21 is configured, for example, by a semiconductor switching element, and is controlled by the switch control unit 244. When the abnormality detection signal DET is at L level (when the AC power supply 1 is normal), the high-speed switch 21 is turned on, and the AC voltage VI from the AC power supply 1 is supplied to the load 2 via the switch S4, the high-speed switch 21, and the switch S5. When the abnormality detection signal DET is at L level (when the AC power supply 1 is abnormal), the high-speed switch 21 is turned off, and the AC power supply 1 and the load 2 are electrically disconnected. The instantaneous value of the AC voltage VO appearing at the second terminal of the high-speed switch 21 is detected by the control device 24.

[0122] The switch S7 is connected between the second terminal of the high-speed switch 21 and the primary winding 22a of the transformer 22. When the instantaneous sag compensator 100A is in use, the switch S7 is turned on. When maintenance of the instantaneous sag compensator 100A is performed, the switch S7 is turned off. The secondary winding 22b of the transformer 22 is connected to the AC terminal 23a of the bidirectional converter 23. The transformer 22 exchanges AC power between the second terminal of the high-speed switch 21 and the bidirectional converter 23.

[0123] The DC terminal 23b of the bidirectional converter 23 is connected to the DC terminal 112. The bidirectional converter 23 is controlled by the converter control unit 242. When the abnormality detection signal DET is at L level (when the AC power supply 1 is normal), the bidirectional converter 23 converts the AC power supplied from the AC power supply 1 via the switch S4, the high-speed switch 21, the switch S7, and the transformer 22 into DC power and stores it in the battery B1. When the abnormality detection signal DET is at H level (when the AC power supply 1 is abnormal), the bidirectional converter 23 converts the DC power of the battery B1 into AC power of a predetermined frequency (commercial frequency) and supplies it to the load 2 via the transformer 22 and the switches S7 and S5.

[0124] When the AC power supply 1 is healthy, the control device 24 turns on the high-speed switch 21 and controls the bidirectional converter 23 in synchronization with the AC voltage VI so that the inter-terminal voltage VB of the battery B1 becomes the reference DC voltage VBR.

[0125] Furthermore, when an abnormality occurs in the AC power supply 1, the control device 24 turns off the high-speed switch 21 and controls the bidirectional converter 23 so that the AC voltage VO becomes the reference AC voltage VOR. When the AC power supply 1 recovers from the abnormal state to a normal state, the control device 24 controls the bidirectional converter 23 to match the phase and frequency of the AC voltage VO with the phase and frequency of the AC voltage VI, and then turns on the high-speed switch 21.

[0126] As described above, the voltage abnormality detection device 4 can accurately grasp the degree of deviation from the allowable voltage range and detect an abnormality in the AC voltage VI. This allows the instantaneous voltage sag compensator 100A to stably supply power to the load 2 even when an abnormality occurs in the AC voltage VI.

[0127] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The present disclosure is defined by the scope of the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0128] 1 AC power supply, 2 load, 3 AC circuit, 4 voltage abnormality detection device, 5 voltage detector, 6 voltage rise detection circuit, 8 voltage drop detection circuit, 10 OR circuit, 11 converter, 12 DC line, 13 capacitor, 14 bidirectional chopper, 15 inverter, 16, 24 control device, 21 high-speed switch, 22 transformer, 23 bidirectional converter, 62 adder, 64, 66, 84, 86 switching circuit, 68, 82, 88 subtractor, 70, 90 integrator, 72, 74, 92, 94 comparator, 73, 93 timing circuit, 100 uninterruptible power supply, 100A instantaneous voltage drop compensation device, 111 input terminal, 112 DC terminal, 113 output terminal, 160 chopper control unit, 162, 242 converter control unit, 164 inverter control unit, 244 Switch control section, B1 battery.

Claims

1. A voltage abnormality detection device that detects abnormalities in AC voltage supplied from an AC power supply, a voltage detector that detects an instantaneous value of the AC voltage; a voltage rise detection circuit that detects a voltage rise in the AC voltage based on a detection value of the voltage detector; a voltage drop detection circuit that detects a voltage drop in the AC voltage based on a detection value of the voltage detector, The voltage rise detection circuit an adder that sets a voltage upper limit value by adding a first value to a sinusoidal reference voltage that has the same frequency and phase as the AC voltage; a first integrator that, when the instantaneous value of the AC voltage exceeds the voltage upper limit, time-integrates a first deviation of the instantaneous value of the AC voltage from the voltage upper limit; the voltage rise detection circuit detects the voltage rise of the AC voltage when a first integral value by the first integrator exceeds a first threshold value; The voltage drop detection circuit a subtractor that sets a lower voltage limit by subtracting a second value from the reference voltage; a second integrator that, when the instantaneous value of the AC voltage is lower than the lower voltage limit, time-integrates a second deviation of the instantaneous value of the AC voltage from the lower voltage limit; the voltage drop detection circuit detects the voltage drop of the AC voltage when a second integral value by the second integrator exceeds a second threshold value; the voltage rise detection circuit resets the first integral value to an initial value when a state in which the instantaneous value of the AC voltage is equal to or lower than the voltage upper limit value continues for a first time period; The voltage drop detection circuit resets the second integral value to the initial value when the instantaneous value of the AC voltage remains equal to or greater than the lower voltage limit for a second period of time.

2. 2. The voltage abnormality detection device according to claim 1, wherein the voltage rise detection circuit further includes a first switching circuit for switching the first value, the first switching circuit having a plurality of voltages, and setting any one of the plurality of voltages to the first value in accordance with a switching command.

3. 2. The voltage abnormality detection device according to claim 1, wherein the voltage rise detection circuit further includes a second switching circuit for switching the first threshold value, the second switching circuit having a plurality of threshold values, and setting any one of the plurality of threshold values ​​to the first threshold value in accordance with a switching command.

4. 2. The voltage abnormality detection device according to claim 1, wherein the voltage drop detection circuit further includes a third switching circuit for switching the second value, the third switching circuit having a plurality of voltages, and setting any one of the plurality of voltages to the second value in accordance with a switching command.

5. 2. The voltage abnormality detection device according to claim 1, wherein the voltage drop detection circuit further includes a fourth switching circuit for switching the second threshold value, the fourth switching circuit having a plurality of threshold values, and setting the second threshold value to any one of the plurality of threshold values ​​in accordance with a switching command.

6. a converter that converts the AC voltage supplied from the AC power supply into a DC voltage; an inverter that converts the DC voltage generated by the converter or the DC voltage supplied from a DC power source into an AC voltage and supplies the AC voltage to a load; a bidirectional chopper that exchanges DC power between the DC power source and the inverter; The voltage abnormality detection device according to any one of claims 1 to 5, a control device that controls the converter, the inverter, and the bidirectional chopper, When the voltage abnormality detection device does not detect an abnormality in the AC voltage, the control device supplies the AC voltage from the AC power supply to the load via the converter and the inverter; When the voltage abnormality detection device detects an abnormality in the AC voltage, the control device stops the converter and supplies AC voltage from the DC power supply to the load via the bidirectional chopper and the inverter.

7. a switch having a first terminal receiving the AC voltage supplied from the AC power source and a second terminal connected to a load; a power converter that converts a DC voltage supplied from a DC power source into an AC voltage and supplies the AC voltage to the load; The voltage abnormality detection device according to any one of claims 1 to 5, a control device that controls the switch and the power converter, When the voltage abnormality detection device does not detect an abnormality in the AC voltage, the control device turns on the switch to supply the AC voltage from the AC power source to the load via the switch; When the voltage abnormality detection device detects an abnormality in the AC voltage, the control device turns off the switch and causes the power converter to supply AC voltage to the load.

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