Communication methods, communication devices, and communication systems based on DRX settings.

Abstract

A communication method, a communication device, and a communication system based on a DRX configuration are provided. The method includes: determining a DRX active time, where a start time of the active time is related to a data cycle; and monitoring a PDCCH in the DRX active time. In this solution, the terminal determines the DRX active time of the terminal based on the data cycle, so that the DRX active time of the terminal can be well matched with the data cycle. This can help reduce a delay in receiving or transmitting data by the terminal and improve user experience.

Description

Technical Field

[0001] Cross - reference to Related Applications This application claims priority to Chinese Patent Application No. 202210453381.3, titled "DRX CONFIGURATION - BASED COMMUNICATION METHOD, COMMUNICATION APPARATUS, AND COMMUNICATION SYSTEM", filed with the China National Intellectual Property Administration on April 27, 2022, and Chinese Patent Application No. 202210951229.8, titled "DRX CONFIGURATION - BASED COMMUNICATION METHOD, COMMUNICATION APPARATUS, AND COMMUNICATION SYSTEM", filed with the China National Intellectual Property Administration on August 9, 2022. Both of these applications are hereby incorporated by reference in their entirety into this specification.

[0002] Embodiments of this application relate to the field of wireless communication technology, specifically, to a DRX - configuration - based communication method, communication apparatus, and communication system.

Background Art

[0003] In recent years, with the continuous development of the fifth - generation (5G) communication, data transmission delay has been continuously reduced and transmission capacity has become increasingly large. 5G communication is gradually penetrating into some multimedia services with high requirements for real - time performance and high requirements for data capacity, such as video transmission, cloud gaming (CG), and extended reality (XR). XR includes virtual reality (VR) and augmented reality (AR).

[0004] With the rapid increase in communication transmission speeds, real-time video transmission services are gradually becoming one of the core services of current networks. As augmented reality technology continues to advance and improve, related industries are experiencing a corresponding boom. Currently, VR technology, as a type of XR technology, is already being applied to various fields closely related to people's production and lives, such as education, entertainment, military, medical, environmental protection, transportation, and public health. Compared to conventional video services, VR services have advantages including multi-view and strong interactivity, and can provide users with new visual experiences.

[0005] With the emergence of the various services mentioned above, the demand for service data transmission delays is increasing. Therefore, how to reduce delays in data reception or transmission by terminals requires constant attention in order to improve the user experience. [Overview of the Initiative]

[0006] This application provides a communication method, communication device, and communication system for reducing delays in data reception or transmission by a terminal in order to improve the user experience. [Means for solving the problem]

[0007] According to a first aspect, one embodiment of the present application provides a communication method. The method may be performed by a terminal or a module used in a terminal, or by a logic module or software capable of implementing all or part of the terminal functions. An example in which a terminal performs the method is used. The method includes the steps of: determining a discontinuous reception (DRX) active time, wherein the start of the active time is related to a data cycle; and monitoring a physical downlink control channel (PDCCH) during the DRX active time.

[0008] In the aforementioned solution, the terminal determines its DRX active time based on the data cycle, and as a result, the terminal's DRX active time can closely match the data cycle. This can help reduce delays in data reception or transmission by the terminal and improve the user experience.

[0009] In possible implementations, configuration information is received from the wireless access network device, and the DRX active time is determined based on the configuration information and data cycle.

[0010] In the aforementioned solution, the wireless access network device is configured to determine the DRX active time based on the data cycle, so that the DRX active time can be accurately determined. This helps to implement a precise match between the DRX active time and the data cycle.

[0011] In possible implementations, the start time of the active period is: (a1*10+a2)modulo a3=f1(a4)modulo a3+a5, or (a1*10+a2)modulo a3=(f1(a4)+a5)modulo a3 is satisfied.

[0012] a1 represents the system frame number corresponding to the start time, a2 represents the subframe number corresponding to the start time, f1(a4) represents the function related to a4, a5 is composed of wireless access network devices, and modulo represents the modulo operation. a3 and a4 satisfy a3 = int(T) and a4 = T - int(T), where int represents the rounding operation and T is the data cycle.

[0013] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance and involves minor modifications to existing protocols.

[0014] In possible implementations, the start time of the active period is: (b1*10+b2)modulo b3=f2(b3,b4)modulo b3+b5, or (b1*10+b2)modulo b3=(f2(b3,b4)+b5)modulo b3 is satisfied.

[0015] b1 represents the system frame number corresponding to the start time, b2 represents the subframe number corresponding to the start time, f2(b3,b4) represents the function related to b3 and b4, b5 is composed of wireless access network devices, and modulo represents the modulo operation. The greatest common divisor of b3 and b4 is 1, and b3 / b4 = T, where both b3 and b4 are positive integers, and T is a data cycle.

[0016] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0017] In possible implementations, the start time of the active period is: (c1*10+c2)modulo c3=f3(T)modulo c3+c5, or (c1*10+c2)modulo c3=(f3(T)+c5)modulo c3 is satisfied.

[0018] c1 represents the system frame number corresponding to the start time, c2 represents the subframe number corresponding to the start time, f3(T) represents the function associated with T, c5 is composed of wireless access network devices, and modulo represents the modulo operation. The greatest common divisor of c3 and c4 is 1, satisfying c3 / c4=T, where both c3 and c4 are positive integers, and T is a data cycle.

[0019] In the above solution, the DRX active time can be accurately calculated, and the calculation method is simple. This is helpful for improving the terminal performance.

[0020] In a possible implementation form, the start point of the active time is int((d1*10 + d2) modulo d3) = int(d4 modulo d3), or int((d1*10 + d2) modulo d3) = int(d4) is satisfied.

[0021] d1 represents the system frame number corresponding to the start point, d2 represents the sub - frame number corresponding to the start point, d3 = T, d3 represents the duration of the DRX cycle, T is the data cycle, d4 represents the number of offset sub - frames within the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation.

[0022] In the above solution, the DRX active time can be accurately calculated, and the calculation method is simple. This is helpful for improving the terminal performance.

[0023] In a possible implementation form, the start point of the active time is further related to the number of offset slots within the DRX cycle, and the number of offset slots within the DRX cycle is equal to int(((d1*10 + d2 - d4) modulo d3)*d5).

[0024] d5 represents the number of slots within one sub - frame.

[0025] In a possible implementation form, the start point of the active time is int(((e1*10 + e2)*e3 + e4) modulo e5) = int((e6*e3 + e7) modulo e5) is satisfied.

[0026] e1 represents the system frame number corresponding to the starting point, e2 represents the subframe number corresponding to the starting point, e3 represents the number of slots contained in one subframe, e4 represents the e4th slot in one subframe, e5 = T * e3, where T is the data cycle, e6 represents the number of offset subframes in the DRX cycle, e7 represents the number of offset slots in one subframe, (e6 * e3 + e7) represents the total number of offset slots starting from the starting position of the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation.

[0027] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0028] In possible implementations, the start time of the active period is: The equation f1*f2+f3=int[(f4+i*f5)*f2 / 10]modulo(1024*f2) is satisfied.

[0029] f1 represents the system frame number corresponding to the starting point, f2 represents the number of slots contained in one system frame, f3 represents the slot number corresponding to the starting point, f4 represents the number of offset subframes in the DRX cycle, f5 represents the duration of the DRX cycle, f5 = T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0030] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0031] In possible implementations, the start time of the active period is: Satisfies (g1*g2*g3)+(g4*g3)+g5=int[(g6*g2*g3+g7*g3+g8)+i*g9]modulo(1024*g2*g3).

[0032] g1 represents the system frame number corresponding to the starting point, g2 represents the number of slots contained in one system frame, g3 represents the number of symbols contained in one slot, g4 represents the subframe number corresponding to the starting point, g5 represents the symbol number corresponding to the starting point, g6 represents the number of offset subframes in the DRX cycle, g7 represents the number of offset slots in the DRX cycle, g8 represents the number of offset symbols in the DRX cycle, g9 represents the duration of the DRX cycle, where g9 = T, and T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0033] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0034] In possible implementations, the start time of the active period is: The equation h1*10+h2=int[(h3+i*h4)]modulo(1024*10) is satisfied.

[0035] h1 represents the system frame number corresponding to the start time, h2 represents the slot number corresponding to the start time, h3 represents the number of offset subframes in the DRX cycle, h4 represents the duration of the DRX cycle, h4=T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0036] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0037] In possible implementations, the data cycle is comprised of wireless access network devices.

[0038] In the aforementioned solution, the wireless access network device configures the data cycle for the terminal, thereby ensuring consistency between the data cycle used by the terminal and the data cycle used by the wireless access network device, and the data cycle is precisely configured for the terminal. This helps in precisely configuring the DRX active time.

[0039] In possible implementations, data cycles are acquired by the terminal through measurement.

[0040] In the aforementioned solution, the terminal measures the data cycle, and as a result, the data cycle can be determined accurately. This helps in precisely configuring the DRX active time.

[0041] In possible implementations, the data cycle is managed by the application server.

[0042] In the aforementioned solution, the application server configures the data cycle for the terminal, and as a result, the data cycle can be precisely configured for the terminal. This helps in precisely configuring the DRX active time.

[0043] In possible implementations, the PDCCH carries information used to schedule data.

[0044] In possible implementations, the data cycle T is a non-integer.

[0045] According to a second aspect, one embodiment of the present application provides a communication method. The method may be performed by a radio access network device or a module used in a radio access network device, or by a logic module or software that can implement all or part of the radio access network device functionality. An example is used in which a radio access network device performs the method. The method includes the step of transmitting configuration information to a terminal, the configuration information being used to configure that the start time of the DRX active time is determined based on a data cycle.

[0046] In the aforementioned solution, the wireless access network device configures the terminal to determine its DRX active time based on the data cycle, and as a result, the terminal's DRX active time can closely match the data cycle. This can help reduce delays in data reception or transmission by the terminal and improve the user experience.

[0047] In possible implementations, control information is transmitted to the terminal via the PDCCH during the DRX active time.

[0048] In possible implementations, control information is used to schedule data.

[0049] In possible implementations, the start time of the active period is: (a1*10+a2)modulo a3=f1(a4)modulo a3+a5 is satisfied.

[0050] a1 represents the system frame number corresponding to the start time, a2 represents the subframe number corresponding to the start time, f1(a4) represents the function related to a4, a5 is composed of wireless access network devices, and modulo represents the modulo operation. A3 and A4 are a3 = int(T) and a4 = T - int(T) are satisfied, where int represents the rounding operation and T is the data cycle.

[0051] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0052] In possible implementations, the start time of the active period is: (b1*10+b2)modulo b3=f2(b3,b4)modulo b3+b5, or (b1*10+b2)modulo b3=(f2(b3,b4)+b5)modulo b3 is satisfied.

[0053] b1 represents the system frame number corresponding to the start time, b2 represents the subframe number corresponding to the start time, f2(b3,b4) represents the function related to b3 and b4, b5 is composed of wireless access network devices, and modulo represents the modulo operation. The greatest common divisor of b3 and b4 is 1, and b3 / b4 = T, where both b3 and b4 are positive integers, and T is a data cycle.

[0054] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0055] In possible implementations, the start time of the active period is: (c1*10+c2)modulo c3=f3(T)modulo c3+c5, or (c1*10+c2)modulo c3=(f3(T)+c5)modulo c3 is satisfied.

[0056] c1 represents the system frame number corresponding to the start time, c2 represents the subframe number corresponding to the start time, f3(T) represents the function associated with T, c5 is composed of wireless access network devices, and modulo represents the modulo operation. The greatest common divisor of c3 and c4 is 1, satisfying c3 / c4=T, where both c3 and c4 are positive integers, and T is a data cycle.

[0057] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0058] In possible implementations, the start time of the active period is: int((d1*10+d2)modulo d3)=int(d4 modulo d3), or The equation int((d1*10+d2)modulo d3)=int(d4) is satisfied.

[0059] d1 represents the system frame number corresponding to the start time, d2 represents the subframe number corresponding to the start time, d3=T, where d3 represents the duration of the DRX cycle, T is the data cycle, d4 represents the number of offset subframes within the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation.

[0060] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0061] In possible implementations, the start of the active time is further related to the number of offset slots in the DRX cycle, which is equal to int(((d1*10+d2-d4)modulo d3)*d5).

[0062] d5 represents the number of slots within a single subframe.

[0063] In possible implementations, the start time of the active period is: The equation satisfies int(((e1*10+e2)*e3+e4)modulo e5)=int((e6*e3+e7)modulo e5).

[0064] e1 represents the system frame number corresponding to the starting point, e2 represents the subframe number corresponding to the starting point, e3 represents the number of slots contained in one subframe, e4 represents the e4th slot in one subframe, e5 = T * e3, where T is the data cycle, e6 represents the number of offset subframes in the DRX cycle, e7 represents the number of offset slots in one subframe, (e6 * e3 + e7) represents the total number of offset slots starting from the starting position of the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation.

[0065] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0066] In possible implementations, the start time of the active period is: The equation f1*f2+f3=int[(f4+i*f5)*f2 / 10]modulo(1024*f2) is satisfied.

[0067] f1 represents the system frame number corresponding to the starting point, f2 represents the number of slots contained in one system frame, f3 represents the slot number corresponding to the starting point, f4 represents the number of offset subframes in the DRX cycle, f5 represents the duration of the DRX cycle, f5 = T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0068] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0069] In possible implementations, the start time of the active period is: Satisfies (g1*g2*g3)+(g4*g3)+g5=int[(g6*g2*g3+g7*g3+g8)+i*g9]modulo(1024*g2*g3).

[0070] g1 represents the system frame number corresponding to the starting point, g2 represents the number of slots contained in one system frame, g3 represents the number of symbols contained in one slot, g4 represents the subframe number corresponding to the starting point, g5 represents the symbol number corresponding to the starting point, g6 represents the number of offset subframes in the DRX cycle, g7 represents the number of offset slots in the DRX cycle, g8 represents the number of offset symbols in the DRX cycle, g9 represents the duration of the DRX cycle, where g9 = T, and T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0071] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0072] In possible implementations, the start time of the active period is: The equation h1*10+h2=int[(h3+i*h4)]modulo(1024*10) is satisfied.

[0073] h1 represents the system frame number corresponding to the start time, h2 represents the slot number corresponding to the start time, h3 represents the number of offset subframes in the DRX cycle, h4 represents the duration of the DRX cycle, h4=T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0074] The aforementioned solution allows for accurate calculation of DRX active time, and the calculation method is simple. This helps improve terminal performance.

[0075] In possible implementations, configuration information is further used to construct the data cycle.

[0076] Compared to the previous solution where two configuration pieces of information are used separately to configure the terminal to determine DRX active time based on the data cycle and to configure the data cycle, the aforementioned solution uses one configuration piece of information to configure the terminal to determine DRX active time based on the data cycle and to configure the data cycle further. Therefore, signaling overhead can be reduced, which helps improve terminal performance.

[0077] In possible implementations, information used to configure the data cycle is sent to the terminal.

[0078] In possible implementations, the data cycle T is a non-integer.

[0079] According to a third aspect, one embodiment of the present application provides a communication device. The device may be a terminal or a module used in a terminal, or it may be a logic module or software capable of implementing all or part of the terminal functions. The device has a function that implements any implementation of the first aspect. The function may be implemented by hardware, or by hardware running the corresponding software. The hardware or software includes one or more modules corresponding to the function.

[0080] According to a fourth aspect, one embodiment of the present application provides a communication device. The device may be a radio access network device or a module used in a radio access network device, or it may be a logic module or software capable of implementing all or part of the functions of a radio access network device. The device has a function that implements any implementation of the second aspect. The function may be implemented by hardware, or by hardware running the corresponding software. The hardware or software includes one or more modules corresponding to the function.

[0081] According to a fifth aspect, one embodiment of the present application provides a communication device including a processor and memory. The memory is configured to store computer instructions. When the device is operating, the processor executes the computer instructions stored in the memory, enabling the device to perform any implementation of the first and second aspects.

[0082] According to a sixth aspect, one embodiment of the present application provides a communication device comprising a unit or means configured to perform steps of any implementation of the first and second aspects.

[0083] According to the seventh aspect, one embodiment of the present application provides a communication device including a processor and an interface circuit. The processor is configured to communicate with another device via the interface circuit and to perform any implementation of the first and second aspects. One or more processors are present.

[0084] According to the eighth aspect, one embodiment of the present application provides a communication device including a processor coupled to memory. The processor is configured to call a program stored in memory and execute any implementation of the first and second aspects. The memory may be located inside or outside the device. In addition, there may be one or more processors.

[0085] According to the ninth aspect, one embodiment of the present application further provides a computer-readable storage medium that stores a computer program or instruction. When the computer program or instruction is executed on a communication device, any implementation of the first and second aspects is executed.

[0086] According to a tenth aspect, one embodiment of the present application further provides a computer program product, which includes a computer program or instructions. When the computer program or instructions are executed on a communication device, any implementation of the first and second aspects is executed.

[0087] According to the eleventh aspect, one embodiment of the present application further provides a chip system including a processor configured to perform any implementation of the first and second aspects.

[0088] According to a twelfth aspect, one embodiment of the present application further provides a communication system, the communication system including a communication device configured to perform any implementation of the first aspect and a communication device configured to perform any implementation of the second aspect. [Brief explanation of the drawing]

[0089] [Figure 1] This is a diagram showing the architecture of a communication system to which one embodiment of this application is applied. [Figure 2] This is an illustrative diagram of the cycle in which data from an XR service arrives at a base station. [Figure 3] This is an illustrative diagram of the DRX cycle. [Figure 4] This is an illustrative diagram of long and short DRX cycles. [Figure 5] This is an illustrative diagram of the DRX configuration for data in an XR service. [Figure 6] This is a schematic flowchart of a communication method according to one embodiment of this application. [Figure 7] This diagram illustrates the DRX active time. [Figure 8] Another illustrative diagram of DRX active time. [Figure 9] Another illustrative diagram of DRX active time. [Figure 10] Another illustrative diagram of DRX active time. [Figure 11] This is a diagram showing the structure of a communication device according to one embodiment of this application. [Figure 12] This is a diagram showing the structure of a communication device according to one embodiment of this application. [Modes for carrying out the invention]

[0090] Figure 1 is a diagram of the architecture of a communication system to which one embodiment of the present application is applied. The communication system 1000 includes a wireless access network 100 and a core network 200. Optionally, the communication system 1000 may further include the Internet 300. The wireless access network 100 may include at least one wireless access network device (e.g., 110a and 110b in Figure 1) and may further include at least one terminal (e.g., 120a-120j in Figure 1). The terminal is connected to the wireless access network device wirelessly, and the wireless access network device is connected to the core network wirelessly or wired. The core network device and the wireless access network device may be separate physical devices, or the functions of the core network device and the logical functions of the wireless access network device may be integrated into the same physical device, or some functions of the core network device and some functions of the wireless access network device may be integrated into one physical device. Wired or wireless methods may be used for connections between terminals and between wireless access network devices. Figure 1 is merely a diagram. The communication system in Figure 1 may further include other network devices, such as wireless relay devices and wireless backhaul devices not shown in Figure 1.

[0091] A radio access network device may be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5G mobile communication system, a next-generation base station in a 6th generation (6G) mobile communication system, a base station in a future mobile communication system, or an access node in a wireless fidelity (Wi-Fi) system, or it may be a module or unit that completes some of the functions of a base station, for example, a central unit (CU) or a distributed unit (DU). In this specification, a CU completes the functions of the base station's radio resource control protocol layer and packet data convergence protocol (PDCP) layer, and may further complete the functions of the service data adaptation protocol (SDAP). A DU completes the functions of the base station's radio link control layer and media access control (MAC) layer, and may further complete some or all of the functions of the physical layer. For a detailed explanation of the protocol layer mentioned above, please refer to the technical specifications related to the 3rd generation partnership project (3GPP). The radio access network device may be a macro base station (e.g., 110a in Figure 1), or a micro base station or indoor base station (e.g., 110b in Figure 1), or a relay node, donor node, etc. All or some of the functions of the radio access network device in this application may also be implemented by using software functions that run on hardware, or by using virtualization functions instantiated on a platform (e.g., a cloud platform).The specific technologies and device configurations used by the radio access network devices are not limited to the embodiments of this application. In the embodiments of this application, an example in which a base station is used as the radio access network device is used for illustrative purposes.

[0092] Terminals are sometimes also called terminal devices, user equipment (UE), mobile stations, or mobile terminals. Terminals can be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), the Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, and smart cities. Terminals may include mobile phones, tablet computers, computers with wireless receiver capabilities, wearable devices, vehicles, unmanned aerial vehicles, helicopters, airplanes, ships, robots, mechanical arms, smart home devices, etc. All or some of the functions of a terminal in this application may also be implemented by using software functions that run on hardware, or by using virtualization functions instantiated on a platform (e.g., a cloud platform). The specific technologies and device forms used by terminals are not limited to the embodiments of this application.

[0093] Base stations and terminals may be fixed or mobile. Base stations and terminals may be deployed on land, on water, or on aircraft, balloons, or satellites in the air, including indoor or outdoor scenarios and handheld or vehicle-mounted scenarios. Application scenarios for base stations and terminals are not limited to the embodiments of this application.

[0094] The roles of base stations and terminals can be relative. For example, the helicopter or unmanned aerial vehicle 120i in Figure 1 may be configured as a mobile base station, and with respect to terminal 120j, which accesses the radio access network 100 via 120i, terminal 120i is a base station. However, for base station 110a, 120i is a terminal. In other words, communication between 110a and 120i is performed based on the radio air interface protocol. Of course, communication between 110a and 120i may alternatively be performed based on the interface protocol between base stations. In this case, for 110a, 120i is also a base station. Therefore, both base stations and terminals may be collectively referred to as communication devices, or 110a and 110b in Figure 1 may be referred to as communication devices with base station functionality, or 120a to 120j in Figure 1 may be referred to as communication devices with terminal functionality.

[0095] Communication between base stations and terminals, between base stations, or between terminals may be carried out over licensed spectrum, over unlicensed spectrum, or over both licensed and unlicensed spectrum. Communication may be carried out over spectrum below 6 gigahertz (GHz), over spectrum above 6 GHz, or over both spectrum below 6 GHz and over 6 GHz. The spectrum resources used for wireless communication are not limited to the embodiments of this application.

[0096] In embodiments of this application, the functions of a base station may be performed by a module (e.g., a chip) within the base station, or by a control subsystem that includes the functions of the base station. The control subsystem that includes the functions of the base station as described herein may be a control center in the aforementioned application scenarios such as smart grids, industrial control, smart transportation, and smart cities. The functions of a terminal may be performed by a module (e.g., a chip or modem) within the terminal, or by a device that includes the functions of the terminal.

[0097] In this application, the base station transmits downlink signals or downlink information to the terminal, with the downlink information carried over the downlink channel, and the terminal transmits uplink signals or uplink information to the base station, with the uplink information carried over the uplink channel. In order to communicate with the base station, the terminal needs to establish a wireless connection to a cell controlled by the base station. The cell with which the wireless connection to the terminal is established is called the terminal's serving cell. When communicating with the serving cell, the terminal may be interfered with by signals from neighboring cells.

[0098] In the embodiments of this application, time-domain symbols may be orthogonal frequency division multiplexing (OFDM) symbols or discrete Fourier transform-spread-OFDM (DFT-s-OFDM) symbols. Unless otherwise specified, symbols in the embodiments of this application are time-domain symbols.

[0099] In the embodiments of this application, it will be understood that the terms physical downlink shared channel (PDSCH), physical downlink control channel (PDCCH), physical uplink shared channel (PUSCH), and physical broadcast channel (PBCH) are merely used as examples of the downlink data channel, downlink control channel, uplink data channel, and broadcast channel, respectively. In different systems and different scenarios, the data channel, control channel, and broadcast channel may have different names. This is not limited to the embodiments of this application.

[0100] In addition to smartphones, people are increasingly expecting to enhance their XR experiences by using devices such as head-mounted displays (HMDs) or smart glasses (VR glasses and AR glasses, etc.). Unlike smartphones, head-mounted displays and smart glasses focus on power consumption. Smart glasses, in particular, are small in size and are expected to be worn for extended periods. Therefore, it is clear that the power consumption of smart glasses is expected to be managed more strictly than that of smartphones. In cloud gaming, the device may be a smartphone or a tablet computer. For long-lasting cloud gaming experiences, the power consumption and battery life of the device are also important aspects that must be considered. Thus, as XR devices become increasingly lightweight, the power consumption of the device, while ensuring a good user experience, is the focus of current research.

[0101] Figure 2 is an illustrative diagram of the cycle in which XR service data arrives at the base station. In this example, the frame rate of the service data is 60 frames per second (FPS). Therefore, the cycle in which service data arrives at the base station is 1 / 60th of a second, which is approximately 16.67 ms. In other words, every 16.67 ms, the base station receives uplink service data from a terminal or downlink service data from an application server.

[0102] In the case of XR service transmission, data generation and arrival are not continuous. From the terminal side, in terms of latency, if the base station's downlink control information (DCI) is monitored at each slot, receiving uplink grant or downlink data is beneficial, but the terminal's power consumption increases accordingly. To reduce terminal power consumption, when there is no data transmission, PDCCH reception can be paused to reduce power consumption (in this case, PDCCH blind detection is paused), thereby increasing battery life. Therefore, discontinuous reception (DRX) technology is introduced for power saving.

[0103] In the DRX mechanism, the base station configures a DRX cycle for the terminal. Figure 3 is an illustrative diagram of a DRX cycle. One DRX cycle includes an active duration and an opportunity for DRX. The active duration is also called the active period, active period, continuous reception time period, continuous reception duration, or continuous reception period. During the active duration, the terminal typically monitors the PDCCH. During the opportunity for DRX, the terminal has the opportunity to enter a sleep state and does not monitor the PDCCH in order to reduce power consumption. Note that while the terminal does not monitor the PDCCH during the opportunity for DRX, it may receive data from another physical channel, such as the physical downlink shared channel (PDSCH) or an acknowledgment (ACK) signal.

[0104] The selection of DRX cycles must strike a balance between battery conservation and latency. Longer DRX cycles are beneficial for extending the battery life of the device, while shorter DRX cycles help provide a faster response time when transmitting new data. To meet the aforementioned requirements, multiple DRX cycles may be configured for the device. For example, two DRX cycles, a long DRX cycle and a short DRX cycle, may be configured.

[0105] Figure 4 shows illustrative diagrams of long and short DRX cycles. In this example, the active duration of the long DRX cycle is the same as that of the short DRX cycle, and the duration of the long DRX cycle is twice that of the short DRX cycle. Note that when long and short DRX cycles are configured for a terminal, the terminal will use either the long or short DRX cycle at any given time, but it cannot use both DRX cycles simultaneously.

[0106] The terminal's DRX cycles (including long and short DRX cycles) are configured by the base station. For example, the base station configures the DRX cycles for the terminal using the DRX-Config information element in the Radio Resource Control (RRC) signaling.

[0107] DRX-Config may include the following parameters: (1) drx-LongCycleStartOffset drx-LongCycleStartOffset is used to configure drx-LongCycle and drx-StartOffset, where drx-LongCycle represents the value of the long DRX cycle, and drx-StartOffset represents the number of offset subframes within the long DRX cycle. The two parameters jointly define the subframe from which the long DRX cycle begins. (2) drx-ShortCycle drx-ShortCycle indicates the value of the shortest DRX cycle. (3) drx-ShortCycleTimer drx-ShortCycleTimer is used to configure the number of short DRX cycles. (4) drx-onDurationTimer drx-onDurationTimer is used to set the duration of the on state. (5) drx-SlotOffset drx-SlotOffset is used to set a delay before drx-onDurationTimer starts. Specifically, in a DRX cycle, drx-onDurationTimer starts after the duration subframe has started and after drx-SlotOffset. drx-SlotOffset is an offset within a subframe, and drx-SlotOffset is less than 1 ms.

[0108] The following example is a pseudocode representation of DRX-Config. DRX-Config::=SEQUENCE { drx-onDurationTimerCHOICE { subMilliSecondsINTEGER(1..31), milliSecondsENUMERATED { ms1,ms2,ms3,ms4,ms5,ms6,ms8,ms10,ms20,ms30,ms40,ms50,ms60, ms80,ms100,ms200,ms300,ms400,ms500,ms600,ms800,ms1000,ms1200, ms1600,spare8,spare7,spare6,spare5,spare4,spare3,spare2,spare1} }, drx-LongCycleStartOffsetCHOICE { ms10 INTEGER(0..9), ms20 INTEGER(0..19), ms32 INTEGER(0..31), ms40 INTEGER(0..39), ms60 INTEGER(0..59), ms64 INTEGER(0..63), ms70 INTEGER(0..69), ms80 INTEGER(0..79), ms128 INTEGER(0..127), ms160 INTEGER(0..159), ms256 INTEGER(0..255), ms320 INTEGER(0..319), ms512 INTEGER(0..511), ms640 INTEGER(0..639), ms1024 INTEGER(0..1023), ms1280 INTEGER(0..1279), ms2048 INTEGER(0..2047), ms2560 INTEGER(0..2559), ms5120 INTEGER(0..5119), ms10240 INTEGER(0..10239) }, shortDRXSEQUENCE { drx-ShortCycleENUMERATED { ms2,ms3,ms4,ms5,ms6,ms7,ms8,ms10,ms14,ms16,ms20,ms30,ms32, ms35,ms40,ms64,ms80,ms128,ms160,ms256,ms320,ms512,ms640,spare9, spare8,spare7,spare6,spare5,spare4,spare3,spare2,spare1}, drx-ShortCycleTimerINTEGER(1..16) } OPTIONAL,--Need R drx-SlotOffsetINTEGER(0..31) }

[0109] In addition, the terminal can alternatively report the expected DRX cycle parameters to the base station. For example, the terminal sends assistance information to the base station's UEAssistanceInformation, which includes information indicating the expected DRX cycle. The base station can then refer to the expected DRX cycle and set the relevant parameters for the DRX cycle on the terminal.

[0110] In the case of the aforementioned DRX mechanism, the DRX active time may not coincide with the arrival time of the service data. As a result, the terminal may delay receiving or transmitting data, degrading the user experience.

[0111] Figure 5 is an illustrative diagram of the DRX configuration for XR service data. In this example, the service data frame rate is 60 FPS. Therefore, the length of the service data cycle is 16.67 ms, the length of the terminal's DRX cycle is 16 ms, and the start of the first DRX cycle coincides with the arrival of the service data. It can be seen that both the start and arrival times of the data in the first two cycles are within the terminal's DRX active time, while the start and arrival times of the service data are not within the terminal's DRX active time in subsequent cycles starting from the third cycle. For service uplink data, the base station schedules the terminal to transmit uplink data in the first two cycles. In subsequent cycles starting from the third cycle, the base station does not schedule the terminal to transmit uplink data, causing a delay in data transmission by the terminal. For service downlink data, the base station schedules the terminal to receive downlink data in the first two cycles. In subsequent cycles starting from the third cycle, the base station does not schedule the terminal to receive downlink data, causing a delay in data reception by the terminal.

[0112] Figure 6 is a schematic flowchart of a communication method according to one embodiment of this application. This method includes the following steps.

[0113] Step 601: The terminal determines the DRX active time, and the start time of the active time is related to the data cycle.

[0114] A data cycle is a cycle in which data is received or sent to a target service. The target service may be an XR service, a video service, etc. The data may be at least one data frame, at least one data slice, at least one data tile, or at least one set of protocol data units (PDUs) of the target service. A set of PDUs contains at least one data frame, at least one data slice, or at least one data tile.

[0115] Since data cycles and data frame rates are inversely related, please note that the start of active time is related to the data cycle. It can also be understood that the start of active time is related to the data frame rate.

[0116] In one implementation, the base station transmits configuration information to the terminal. This configuration information is used to configure the start time of the DRX active time to be determined based on the data cycle, and the terminal then determines the DRX active time based on the configuration information and the data cycle. It can be understood that the configuration information triggers the terminal to determine the DRX active time based on the data cycle. Optionally, the configuration information is carried via RRC signaling and transmitted to the terminal.

[0117] In one implementation, if the data cycle is the uplink data cycle, the terminal can obtain the data cycle. For example, the terminal obtains the data cycle from the terminal's application layer.

[0118] In other implementations, if the data cycle is a downlink data cycle, the terminal can obtain the data cycle by using, but not limited to, the following three methods:

[0119] Method 1: The application server corresponding to the data sends the data cycle to the terminal via the user plane.

[0120] In other words, the terminal receives the data cycle from the application server.

[0121] Method 2: The data cycle is configured by the base station for the terminal.

[0122] For example, the aforementioned configuration information is used to configure the start time of the terminal's DRX active time to be determined based on the data cycle, and further indicates the data cycle to the terminal. Thus, the terminal determines the data cycle based on the configuration information. In another example, the base station transmits information used to configure the data cycle to the terminal, and the terminal determines the data cycle based on the information used to configure the data cycle.

[0123] For example, if a base station configures a data cycle for a terminal, the base station can obtain the data cycle by using one of the following methods: The base station receives a QoS profile from the control plane network elements of the core network, and the QoS profile contains the data cycle; or the base station detects the time interval of data arrival in the QoS flow and determines the data cycle based on the time interval.

[0124] Method 3: The device autonomously acquires the data cycle.

[0125] For example, a terminal detects the time interval between data arrivals in a QoS flow and determines a data cycle based on that time interval.

[0126] In one implementation, the data cycle T is in milliseconds (ms), and T is a non-integer.

[0127] Step 602: The terminal monitors the PDCCH during the DRX active time.

[0128] Generally, base stations transmit scheduled data to terminals on the PDCCH during DRX active time. Terminals monitor the PDCCH during DRX active time. When a base station transmits information carrying scheduled data to a terminal on the PDCCH during DRX active time, the terminal can obtain information about the scheduled data by monitoring the PDCCH.

[0129] Information regarding scheduled data may be control information, such as control information used to schedule downlink data, or control information used to schedule uplink data (e.g., grant information).

[0130] In the aforementioned solution, the terminal determines its DRX active time based on the data cycle, and as a result, the terminal's DRX active time can closely match the data cycle. This can help reduce delays in data reception or transmission by the terminal and improve the user experience.

[0131] In the aforementioned solution, the terminal determines the DRX active time based on the data cycle. Since the data cycle and the data frame rate are inversely related, the terminal determining the DRX active time based on the data cycle can also be understood as the terminal determining the DRX active time based on the data frame rate. Correspondingly, in the aforementioned solution, the solution that configures the data cycle for the terminal can also be understood as configuring the data frame rate for the terminal. The solution that configures the data frame rate for the terminal is similar to the solution that configures the cycle for the terminal, and the details will not be explained again.

[0132] Alternatively, in another implementation, the terminal determines the data cycle / frame rate based on parameters related to the data cycle / frame rate, and then determines the DRX active time based on the data cycle / frame rate. The terminal may obtain the parameters related to the data cycle / frame rate based on one of the following methods: the terminal autonomously obtains the parameters related to the data cycle / frame rate; the terminal receives the parameters related to the data cycle / frame rate from a base station; the terminal receives the parameters related to the data cycle / frame rate from an application server, etc. This is not limited to the present application.

[0133] The following describes the conditions that must be met depending on the start time of the DRX active time, as determined by the device.

[0134] Method 1: The start time of the active period is, (a1*10+a2)modulo a3=f1(a4)modulo a3+a5 is satisfied (Equation (1)).

[0135] a1 represents the system frame number corresponding to the start of the active time, a2 represents the subframe number corresponding to the start of the active time, one system frame contains 10 subframes, and the duration of one subframe is 1 ms. f1(a4) represents a function related to a4, a5 is composed of base stations, and modulo represents the modulo operation. a3 and a4 satisfy a3=int(T) and a4=T-int(T), where int represents a rounding operation that can be rounded up or rounded down, and T is the data cycle.

[0136] In one implementation, a5 represents the drx-StartOffset configured by the base station for the terminal, and drx-StartOffset represents the number of offset subframes in the DRX cycle. For details, please refer to the explanation above.

[0137] For example, assume that the data cycle T of the XR service is equal to 16.67 ms, a5=0, f1(a4)=int(i*a4), where i represents the i-th DRX cycle, i starts calculating from 0, int(i*a4) represents truncating the result of i*a4, and int(T) represents truncating cycle T. In this case, in equation (1), a3=int(16.67)=16, and a4=T-int(T)=16.67-16=0.67.

[0138] Therefore, equation (1) can be simplified to (a1*10+a2)modulo 16=int(i*0.67)modulo 16.

[0139] According to this formula, if the start time of a subframe within a system frame satisfies the formula, then the start time of the subframe is determined to be the start time of the DRX active time. The DRX active time can then be determined based on the length of the active time configured by the base station. The subframe number of a subframe is represented by (a1*10+a2). For example, when a1=0 and a2=0, it indicates a subframe with subframe number 0; when a1=0 and a2=1, it indicates a subframe with subframe number 1; when a1=1 and a2=1, it indicates a subframe with subframe number 11; and the rest can be inferred by analogy.

[0140] For the example described above, an exemplary diagram of the DRX active time shown in Figure 7 can be obtained. The start times of the DRX active time are 0 ms, 16 ms, 33 ms, 50 ms, etc. If the length of the active time configured by the base station is 1 ms, the DRX active times are 0 ms to 1 ms, 16 ms to 17 ms, 33 ms to 34 ms, 50 ms to 51 ms, etc.

[0141] In the example above, if f1(a4)=int(i*a4) represents rounding up the result of i*a4, the determined start times for the DRX's active time are 0 ms, 17 ms, 34 ms, 50 ms, etc. If the length of the active time configured by the base station is 1 ms, the DRX's active times are 0 ms to 1 ms, 17 ms to 18 ms, 34 ms to 35 ms, 50 ms to 51 ms, etc.

[0142] In another implementation, when the data cycle T is measured in milliseconds (ms), the data cycle T can be replaced with a frame rate of 1000 / D, where D (in units of frames per second (FPS)) represents the frame rate of the data. In the example above, if the data cycle T = 16.67 ms, then D = 60 FPS, and a3 = int(T) should be replaced with a3 = int(1000 / D), and a4 = T - int(T) should be replaced with a4 = 1000 / D - int(1000 / D).

[0143] Equation (1) is applicable to both long and short DRX cycles. In another implementation, a short DRX cycle can be further implemented using the following equation, namely (a1*10+a2)modulo a3=(f1(a4)+a5)modulo a3. The meanings of a1, a2, a3, a4, a5 and f1(a4) are the same as those of a1, a2, a3, a4, a5 and f1(a4) in equation (1). For examples of specific parameter values ​​in the equation, see the examples of relevant values ​​in equation (1). Further details are not provided again.

[0144] Method 2: The start time of the active period is, (b1*10+b2)modulo b3=f2(b3,b4)modulo b3+b5 is satisfied (Equation (2)).

[0145] b1 represents the system frame number corresponding to the start time, b2 represents the subframe number corresponding to the start time, one system frame contains 10 subframes, and the duration of one subframe is 1 ms. f2(b3,b4) represents a function related to b3 and b4, b5 is composed by the base station, and modulo represents the modulo operation. The greatest common divisor of b3 and b4 is 1, and b3 / b4=T satisfies b3 / b4=T, where both b3 and b4 are positive integers, b3 may represent the duration of a DRX cycle, b4 may represent the number of actives in one DRX cycle, and T is a data cycle. In this embodiment of the present application, the duration of a DRX cycle may be expressed as the length of the DRX cycle or the time length of the DRX cycle. A unified description is provided herein, and details are not described below. A DRX cycle may be a long DRX cycle or a short DRX cycle.

[0146] In one implementation, b5 represents the drx-StartOffset configured by the base station for the terminal, and drx-StartOffset represents the number of offset subframes within the DRX cycle. For details, please refer to the explanation above.

[0147] For example, assume that the data cycle T of the XR service is 16.67 ms. In this case, in equation (2), b3 = 50 and b4 = 3. Assume that f2(b3, b4) = int(i * b3 / b4), where i represents the i-th active time in one DRX cycle, i is equal to 0, 1, ..., or (b4 - 1), and int(i * b3 / b4) represents truncating the result of i * b3 / b4. Also, assume b5 = 0.

[0148] Therefore, equation (2) can be simplified to (b1*10+b2)modulo 50=int(i*50 / 3)modulo 50.

[0149] According to this formula, if the start time of a subframe within a system frame satisfies the formula, then the start time of the subframe is determined to be the start time of the DRX active time. The DRX active time can then be determined based on the length of the active time configured by the base station. The subframe number of a subframe is represented by (b1*10+b2). ​​For example, when b1=0 and b2=0, it indicates a subframe with subframe number 0; when b1=0 and b2=1, it indicates a subframe with subframe number 1; when b1=1 and b2=1, it indicates a subframe with subframe number 11; and the rest can be inferred by analogy.

[0150] For the example described above, an illustrative diagram of the DRX active time shown in Figure 8 can be obtained. Since b3=50 and b4=3, the DRX cycle is 50 ms, and there are three active times within one DRX cycle. When i=0, b1=0, b2=0, the above equation is satisfied. Therefore, 0 ms is the start of the DRX active time. When i=1, b1=1, b2=6, the above equation is satisfied. Therefore, 16 ms is the start of the DRX active time. When i=2, b1=3, b2=3, the above equation is satisfied. Therefore, 33 ms is the start of the DRX active time. The rest can be inferred by analogy. Therefore, the start times of the DRX active time are 0 ms, 16 ms, 33 ms, 50 ms, etc. If the active time configured by the base station is 1 ms, the active times of the DRX will be 0 ms to 1 ms, 16 ms to 17 ms, 33 ms to 34 ms, 50 ms to 51 ms, and so on.

[0151] In the example above, if f2(b3,b4)=int(i*b3 / b4) represents rounding up the result of i*b3 / b4, the determined start times for the DRX's active time are 0 ms, 17 ms, 34 ms, 50 ms, etc. If the length of the active time configured by the base station is 1 ms, the DRX's active times are 0 ms to 1 ms, 17 ms to 18 ms, 34 ms to 35 ms, 50 ms to 51 ms, etc.

[0152] In another implementation, when the data cycle T is measured in milliseconds (ms), the data cycle T can be replaced with a frame rate of 1000 / D, where D (in units of frames per second (FPS)) represents the frame rate of the data. In the example above, if the data cycle T = 16.67 ms, then D = 60 FPS, and instead of b3 / b4 = T, we can use b3 / b4 = 1000 / D.

[0153] Equation (2) is applicable to whether the DRX cycle is a long DRX cycle or a short DRX cycle. In another implementation, a short DRX cycle can be further implemented by using the following equation, namely (b1*10+b2)modulo b3=(f2(b3,b4)+b5)modulo b3. The meanings of b1, b2, b3, b4, b5 and f2(b3,b4) are the same as the meanings of b1, b2, b3, b4, b5 and f2(b3,b4) in equation (2). For examples of specific parameter values ​​in the equation, see the examples of relevant values ​​in equation (2). Further details are not explained again.

[0154] Method 3: The start time of the active period is, (c1*10+c2)modulo c3=f3(T)modulo c3+c5 is satisfied (Equation (3)).

[0155] c1 represents the system frame number corresponding to the start time, c2 represents the subframe number corresponding to the start time, one system frame contains 10 subframes, and the duration of one subframe is 1 ms. f3(T) represents a function related to T, c5 is composed by the base station, and modulo represents the modulo operation. The greatest common divisor of c3 and c4 is 1, satisfying c3 / c4=T, both c3 and c4 are positive integers, c3 can represent the duration of a DRX cycle, c4 can represent the number of DRX cycles composed, and T is a data cycle.

[0156] In one implementation, c5 represents the drx-StartOffset configured by the base station for the terminal, and drx-StartOffset represents the number of offset subframes within the DRX cycle. For details, please refer to the explanation above.

[0157] For example, assume that the data cycle T of the XR service is 16.67 ms. In this case, in equation (3), c3 = 50 and c4 = 3. Assume that f3(T) = int(i*T), where i is the i-th set of DRX configurations, i is equal to 0, 1, ..., or (c4-1), and int(i*T) means truncating the result of i*T. Assume c5 = 0.

[0158] Therefore, equation (3) can be simplified to (c1*10+c2)modulo 50=int(i*16.67)modulo 50.

[0159] According to this formula, if the start time of a subframe within a system frame satisfies the formula, then the start time of the subframe is determined to be the start time of the DRX active time. The DRX active time can then be determined based on the length of the active time configured by the base station. The subframe number of a subframe is represented by (c1*10+c2). For example, when c1=0 and c2=0, it indicates a subframe with subframe number 0; when c1=0 and c2=1, it indicates a subframe with subframe number 1; when c1=1 and c2=1, it indicates a subframe with subframe number 11; and the rest can be inferred by analogy.

[0160] For the example described above, an exemplary diagram of the DRX active time shown in Figure 9 can be obtained. Since c3=50 and c4=3, three sets of DRX configurations are formed, and the DRX cycle is 50 ms. When i=0, c1=0, c2=0, the above equation is satisfied. Therefore, 0 ms is the start of the active time of the first set of DRX. When i=1, c1=1, c2=6, the above equation is satisfied. Therefore, 16 ms is the start of the active time of the second set of DRX. When i=2, c1=3, c2=3, the above equation is satisfied. Therefore, 33 ms is the start of the active time of the third set of DRX. The rest can be inferred by analogy. Therefore, the start times of the DRX active time are 0 ms, 16 ms, 33 ms, 50 ms, etc. If the active time configured by the base station is 1 ms, the active times of the DRX will be 0 ms to 1 ms, 16 ms to 17 ms, 33 ms to 34 ms, 50 ms to 51 ms, and so on.

[0161] In the example above, if f3(T)=int(i*T) represents rounding up the result of i*T, the determined start times for the DRX's active time are 0 ms, 17 ms, 34 ms, 50 ms, etc. If the length of the active time configured by the base station is 1 ms, the DRX's active times are 0 ms to 1 ms, 17 ms to 18 ms, 34 ms to 35 ms, 50 ms to 51 ms, etc.

[0162] In another implementation, when the data cycle T is measured in milliseconds (ms), the data cycle T can be replaced with a frame rate of 1000 / D, where D (in units of frames per second (FPS)) represents the frame rate of the data. In the example above, if the data cycle T = 16.67 ms, then D = 60 FPS. f3(T) = int(i*T) can also be replaced with f3(T) = int(i*1000 / D). c3 / c4 = T can also be replaced with c3 / c4 = 1000 / D.

[0163] Equation (3) is applicable to both long and short DRX cycles. In another implementation, a short DRX cycle can be further implemented using the following equation, namely (c1*10+c2)modulo c3=(f3(T)+c5)modulo c3. The meanings of c1, c2, c3, f3(T), and c5 are the same as those of c1, c2, c3, f3(T), and c5 in equation (3). For specific examples of parameter values ​​in the equation, see the examples of relevant values ​​in equation (3). Further details are not provided again.

[0164] Method 4: The start time of the active period is, The equation (4) satisfies int((d1*10+d2)modulo d3)=int(d4 modulo d3).

[0165] d1 represents the system frame number corresponding to the start of the active time, d2 represents the subframe number corresponding to the start of the active time, one system frame contains 10 subframes, one subframe has a duration of 1 ms, d3 = T, where T is the data cycle, and d4 represents the drx-StartOffset configured by the base station for the terminal, where drx-StartOffset represents the number of offset subframes in the DRX cycle. See the previous explanation for details. Modulo represents the modulo operation, and int represents the rounding operation, which can be rounding up or rounding down.

[0166] For example, assume that the data cycle T of the XR service is equal to 16.67 ms, d4=0, int((d1*10+d2)modulo d3) represents truncation of (d1*10+d2)modulo d3, and int(d4 modulo d3) represents truncation of d4 modulo d3.

[0167] Therefore, equation (4) can be simplified to int((d1*10+d2)modulo 16.67)=int(0 modulo 16.67).

[0168] According to this formula, if the start time of a subframe within a system frame satisfies the formula, then the start time of the subframe is determined to be the start time of the DRX active time. The DRX active time can then be determined based on the length of the active time configured by the base station. The subframe number of a subframe is represented by (a1*10+a2). For example, when a1=0 and a2=0, it indicates a subframe with subframe number 0; when a1=0 and a2=1, it indicates a subframe with subframe number 1; when a1=1 and a2=1, it indicates a subframe with subframe number 11; and the rest can be inferred by analogy.

[0169] For the example described above, an exemplary diagram of the DRX active time shown in Figure 10 can be obtained. The start times of the DRX active time are 0 ms, 17 ms, 34 ms, 50 ms, etc. If the length of the active time configured by the base station is 1 ms, the DRX active times are 0 ms to 1 ms, 17 ms to 18 ms, 34 ms to 35 ms, 50 ms to 51 ms, etc.

[0170] In the method described above, drx-StartOffset, i.e., d4, indicates the start of the active time in each DRX cycle. Specifically, the time obtained by offsetting the start of each DRX cycle by the offset indicated by drx-StartOffset is used as the start of the active time in the DRX cycle. drx-StartOffset is measured in subframes, and specifically, the time obtained by offsetting based on drx-StartOffset is the start of the subframe.

[0171] In another possible implementation, the start of the active time in each DRX cycle can alternatively be determined based on drx-StartOffset and drx-SlotOffset. Specifically, starting from the start of each DRX cycle, an offset is performed based on the offset indicated by drx-StartOffset to obtain the start of a subframe, and then, starting from the start of the subframe, an offset is performed based on the offset indicated by drx-SlotOffset to obtain the start of a slot within the subframe or the start of a subframe within the previous subframe. The start of a subframe is the start of the DRX active time cycle. drx-StartOffset is measured in subframe units, and drx-SlotOffset is measured in slot units. Therefore, the time obtained by offsetting based on drx-StartOffset and drx-SlotOffset is the start of a slot within the subframe.

[0172] In one implementation, drx-SlotOffset can be obtained through calculation using the following method. drx-SlotOffset=int(((d1*10+d2-d4)modulo d3)*d5)(Formula (5))

[0173] The meanings of d1, d2, d3, and d4 are the same as those of d1, d2, d3, and d4 in equation (4). d5 represents the number of slots within one subframe (i.e., 1 ms), and the value of d5 is related to the subcarrier interval.

[0174] In one implementation, the subcarrier interval is equal to 15 kHz * d5. When the subcarrier interval is 15 kHz, d5 = 1; when the subcarrier interval is 30 kHz, d5 = 2; when the subcarrier interval is 60 kHz, d5 = 4; the remaining values ​​can be inferred by analogy.

[0175] Let us use the example in Figure 10. Based on the example in Figure 10, drx-SlotOffset is further introduced, with d4=drx-StartOffset=0 and d3=T=16.67 ms. Assume the subcarrier spacing is 30 kHz, i.e., d5=2. In this case, equation (5) is simplified to drx-SlotOffset=int(((d1*10+d2)modulo 16.67)*d5), where int is assumed to represent truncation.

[0176] If (d1*10+d2)=17 ms, then drx-SlotOffset=int((17 modulo 16.67)*2)=0. Therefore, 0 slots are moved forward based on 17 ms (i.e., slot 34), meaning that the 34th slot is the start of the active time.

[0177] If (d1*10+d2)=34 ms, then drx-SlotOffset=int((34 modulo 16.67)*2)=1. Therefore, one slot is moved forward based on 34 ms (i.e., slot 68), meaning that the 67th slot is the start of the active time.

[0178] If (d1*10+d2)=50 ms, then drx-SlotOffset=int((50 modulo 16.67)*2)=0. Therefore, 0 slots are moved forward based on 50 ms (i.e., slot 100), meaning the 100th slot is at the start of the active time.

[0179] Therefore, in the example above, the start times of the DRX's active time are slot 0, slot 34, slot 67, slot 100, etc. If the length of the active time configured by the base station is 1 ms (i.e., two slots), the DRX's active times are slot 0 to slot 2, slot 34 to slot 36, slot 67 to slot 69, slot 100 to slot 102, etc.

[0180] In another implementation, when the data cycle T is measured in milliseconds (ms), the data cycle T can be replaced by a frame rate of 1000 / D, and d3 can also be replaced by 1000 / D, where D (unit: frames per second (FPS)) represents the frame rate of the data. In the example above, if the data cycle T = 16.67 ms, then D = 60 FPS. d3 = T can also be replaced by d3 = 1000 / D.

[0181] For example, if we replace d3 with 1000 / D, equation (4) can be expressed as int((d1*10+d2)modulo(1000 / D))=int(d4 modulo(1000 / D)).

[0182] For example, if we replace d3 with 1000 / D, equation (4) can be expressed as int((d1*10+d2)*D modulo 1000)=int(d4*D modulo(1000)).

[0183] Equation (4) is applicable to whether the DRX cycle is a long DRX cycle or a short DRX cycle. In another implementation, a long DRX cycle can be further implemented using the following equation, int((d1*10+d2)modulo d3)=int(d4). The meanings of d1, d2, d3, d4 and int(d4) are the same as those of d1, d2, d3, d4 and int(d4) in equation (4). For examples of specific parameter values ​​in the equation, see the examples of relevant values ​​in equation (4). Further details will not be explained again.

[0184] Method 5: The start time of the active period is, The equation (6) satisfies the condition int(((e1*10+e2)*e3+e4)modulo e5)=int((e6*e3+e7)modulo e5).

[0185] e1 represents the system frame number corresponding to the start of the active time, e2 represents the subframe number corresponding to the start of the active time, one system frame contains 10 subframes, one subframe has a duration of 1 ms, e3 represents the number of slots contained in one subframe, and e3 is d5 in method 4. For specific calculation methods, please refer to the explanation above. e4 represents the e4th slot in one subframe. e5 = T * e3, where T is the data cycle. e6 represents the drx-StartOffset configured by the base station for the terminal, and drx-StartOffset represents the number of offset subframes in the DRX cycle. e7 represents the drx-SlotOffset configured by the base station for the terminal, and drx-SlotOffset represents the number of offset slots in one subframe. (e6 * e3 + e7) represents the total number of offset slots starting from the start position of the DRX cycle. modulo represents the modulo operation. The integer type represents a rounding operation that can be rounded up or rounded down.

[0186] For example, suppose the data cycle T of the XR service is equal to 16.67 ms, e3=2, e5=16.67*2=33.34, e6=3, e7=1, and int represents truncation. Therefore, equation (6) is simplified to int(((e1*10+e2)*e3+e4)modulo 33.34)=int(7 modulo 33.34)=7.

[0187] According to this formula, if (e1*10+e2)*e3+e4) is equal to 7, 41, 74, 107, etc., then the left and right parts of the formula are equal. Therefore, the start times of the DRX's active time are slot 7, slot 41, slot 74, slot 107, etc. If the length of the active time configured by the base station is 2 slots, then the DRX's active times are from slot 7 to slot 9, from slot 41 to slot 43, from slot 74 to slot 76, from slot 107 to slot 109, etc.

[0188] In another implementation, when the data cycle T is measured in milliseconds (ms), the data cycle T may be replaced with a frame rate of 1000 / D, e5 may be replaced with 1000 / D*e3, and D (unit: frames per second (FPS)) represents the frame rate of the data. In the example above, if the data cycle T = 16.67 ms, then D = 60 FPS.

[0189] Method 6: The start time of the active period is, The equation f1*f2+f3=int[(f4+i*f5)*f2 / 10]modulo(1024*f2) is satisfied (Equation (7)).

[0190] f1 represents the system frame number corresponding to the start time, f2 represents the number of slots contained in each system frame, f3 represents the slot number corresponding to the start of the active time, i.e., a specific slot within the system frame, f4 represents the drx-StartOffset configured by the base station for the terminal, where drx-StartOffset represents the number of offset subframes in the DRX cycle (see above for details), f5 represents the duration of the DRX cycle, f5=T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation, which can be rounded up or rounded down.

[0191] For example, assume that the data cycle T of the XR service is equal to 16.67 ms, f4=0, and int represents truncation. Therefore, equation (6) can be simplified to f1*f2+f3=int[i*16.67*f2 / 10]modulo(1024*f2).

[0192] Assuming a subcarrier spacing of 30 kHz and f2=20, and assuming the service arrives in slot 0 of system frame number 0, the start of a slot in the system frame is determined to be the start of the DRX active time if the start of the slot satisfies the formula. The DRX active time can then be determined based on the length of the active time configured by the base station. In this example, the start of the DRX active time is slot 0, slot 34, slot 67, slot 100, etc. If the length of the active time configured by the base station is 1 ms (i.e., two slots), the DRX active times are slot 0 to slot 2, slot 34 to slot 36, slot 67 to slot 69, slot 100 to slot 102, etc.

[0193] In another implementation, when the data cycle T is measured in milliseconds (ms), the data cycle T can be replaced with a frame rate of 1000 / D, where D (in units of frames per second (FPS)) represents the frame rate of the data. In the example above, if the data cycle T = 16.67 ms, then D = 60 FPS. f5 = T can also be replaced with f5 = 1000 / D.

[0194] Method 7: The start time of the active period is, (g1*g2*g3)+(g4*g3)+g5=int[(g6*g2*g3+g7*g3+g8)+i*g9]modulo(1024*g2*g3) is satisfied (formula (8)).

[0195] g1 represents the system frame number corresponding to the start time, g2 represents the number of slots contained in each system frame, g3 represents the number of symbols contained in each slot, g4 represents the subframe number corresponding to the start time, g5 represents the symbol number corresponding to the start time, g6 represents the drx-StartOffset configured by the base station for the terminal, drx-StartOffset represents the number of offset subframes in the DRX cycle, g7 represents the drx-SlotOffset configured by the base station for the terminal, drx-SlotOffset represents the number of offset slots in the DRX cycle, g8 represents the drx-SymbolOffset configured by the base station for the terminal, drx-SymbolOffset represents the number of offset symbols in the DRX cycle. g9 represents the duration of the DRX cycle, g9=T, where T is the data cycle. i represents the i-th DRX cycle or DRX active time. modulo represents the modulo operation. The integer type represents a rounding operation that can be rounded up or rounded down.

[0196] In one implementation, when a data cycle T is measured in milliseconds (ms), the data cycle T can be replaced with a frame rate of 1000 / D, where D (unit: frames per second (FPS)) represents the frame rate of the data.

[0197] Method 8: The start time of the active period is, The equation h1*10+h2=int[(h3+i*h4)]modulo(1024*10) is satisfied.

[0198] h1 represents the system frame number corresponding to the start time, h2 represents the slot number corresponding to the start time, h3 represents the drx-StartOffset configured by the base station for the terminal, drx-StartOffset represents the number of offset subframes in the DRX cycle, h4 represents the duration of the DRX cycle, h4=T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation, which can be rounded up or rounded down.

[0199] In one implementation, when a data cycle T is measured in milliseconds (ms), the data cycle T can be replaced with a frame rate of 1000 / D, where D (unit: frames per second (FPS)) represents the frame rate of the data.

[0200] In this embodiment of the present application, the base station may be configured to determine the DRX active time in the manner shown in Figure 6 by using DRX-Config. The following provides five possible implementations of DRX-Config.

[0201] Implementation form A: Add the fields `tailored for XR` and `INTEGER(0..int(T)-1)` to `drx-LongCycleStartOffset of DRX-Config`.

[0202] The term "tailored for XR" as used herein is merely an example. In actual application, this term may be replaced with another term, and is not limited to this application.

[0203] Tailored for XR is a specific implementation of the configuration information described in step 601 and is used to configure the start time of the DRX active time to be determined based on the data cycle. Tailored for XR may have a specific value, for example, 0, 1, a Boolean, or an enumerated value. This is not limited to the present application.

[0204] INTEGER(0..int(T)-1) represents an integer in the range from 0 to int(T)-1. int(T) represents a rounding operation on a data cycle T. When Method 1 is used, INTEGER(0..int(T)-1) is used in equation (1) to construct a5, i.e., a5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. When Method 2 is used, INTEGER(0..int(T)-1) is used in equation (2) to construct b5, i.e., b5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. When Method 3 is used, INTEGER(0..int(T)-1) is used in equation (3) to construct c5, i.e., c5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. From the implementation, it can be seen that the value ranges of a5, b5, and c5 may be related to the data cycle T.

[0205] The following example shows the pseudocode representation of DRX-Config in implementation form A. DRX-Config::=SEQUENCE { drx-onDurationTimerCHOICE { subMilliSecondsINTEGER(1..31), milliSecondsENUMERATED { ms1,ms2,ms3,ms4,ms5,ms6,ms8,ms10,ms20,ms30,ms40,ms50,ms60, ms80,ms100,ms200,ms300,ms400,ms500,ms600,ms800,ms1000,ms1200, ms1600,spare8,spare7,spare6,spare5,spare4,spare3,spare2,spare1} }, drx -LongCycleStartOffsetCHOICE { ms10 INTEGER(0..9), ms20 INTEGER(0..19), ms32 INTEGER(0..31), ms40 INTEGER(0..39), ms60 INTEGER(0..59), ms64 INTEGER(0..63), ms70 INTEGER(0..69), ms80 INTEGER(0..79), ms128 INTEGER(0..127), ms160 INTEGER(0..159), ms256 INTEGER(0..255), ms320 INTEGER(0..319), ms512 INTEGER(0..511), ms640 INTEGER(0..639), ms1024 INTEGER(0..1023), ms1280 INTEGER(0..1279), ms2048 INTEGER(0..2047), ms2560 INTEGER(0..2559), ms5120 INTEGER(0..5119), ms10240 INTEGER(0..10239) tailored for XR INTEGER(0..int(T)-1) }, drx-SlotOffsetINTEGER(0..31) }

[0206] Implementation form B: Add multiple groups of fields to drx-LongCycleStartOffset of DRX-Config, where one group of fields includes tailored for XR and INTEGER(0..int(T)-1). tailored for XR is used to configure that the start time of DRX active time is determined based on the data cycle, and indicates the data cycle.

[0207] INTEGER(0..int(T)-1) represents an integer in the range from 0 to int(T)-1. int(T) represents a rounding operation on a data cycle T. When Method 1 is used, INTEGER(0..int(T)-1) is used in equation (1) to construct a5, i.e., a5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. When Method 2 is used, INTEGER(0..int(T)-1) is used in equation (2) to construct b5, i.e., b5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. When Method 3 is used, INTEGER(0..int(T)-1) is used in equation (3) to construct c5, i.e., c5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. From the implementation, it can be seen that the value ranges of a5, b5, and c5 may be related to the data cycle T.

[0208] The following example is a pseudocode representation of DRX-Config in implementation form B. DRX-Config::=SEQUENCE { drx-onDurationTimerCHOICE { subMilliSecondsINTEGER(1..31), milliSecondsENUMERATED { ms1,ms2,ms3,ms4,ms5,ms6,ms8,ms10,ms20,ms30,ms40,ms50,ms60, ms80,ms100,ms200,ms300,ms400,ms500,ms600,ms800,ms1000,ms1200, ms1600,spare8,spare7,spare6,spare5,spare4,spare3,spare2,spare1} }, drx-LongCycleStartOffsetCHOICE { ms10 INTEGER(0..9), ms20 INTEGER(0..19), ms32 INTEGER(0..31), ms40 INTEGER(0..39), ms60 INTEGER(0..59), ms64 INTEGER(0..63), ms70 INTEGER(0..69), ms80 INTEGER(0..79), ms128 INTEGER(0..127), ms160 INTEGER(0..159), ms256 INTEGER(0..255), ms320 INTEGER(0..319), ms512 INTEGER(0..511), ms640 INTEGER(0..639), ms1024 INTEGER(0..1023), ms1280 INTEGER(0..1279), ms2048 INTEGER(0..2047), ms2560 INTEGER(0..2559), ms5120 INTEGER(0..5119), ms10240 INTEGER(0..10239) tailored for XR(T1)INTEGER(0..int(T1)-1) tailored for XR(T2)INTEGER(0..int(T2)-1) tailored for XR(T3)INTEGER(0..int(T3)-1) }, drx-SlotOffsetINTEGER(0..31) }

[0209] In this example, fields from three groups are added to drx-LongCycleStartOffset.

[0210] The first group of fields includes tailored for XR(T1) and INTEGER(0..int(T1)-1). tailored for XR(T1) is used to configure that the start time of the terminal's DRX active time is determined based on the data cycle, and that the data cycle is T1. INTEGER(0..int(T1)-1) represents an integer in the range from 0 to int(T1)-1.

[0211] The second group of fields includes tailored for XR(T2) and INTEGER(0..int(T2)-1). tailored for XR(T2) is used to configure that the start time of the terminal's DRX active time is determined based on the data cycle, and that the data cycle is T2. INTEGER(0..int(T2)-1) represents an integer in the range from 0 to int(T2)-1.

[0212] The third group of fields includes tailored for XR(T3) and INTEGER(0..int(T3)-1). tailored for XR(T3) is used to configure that the start time of the terminal's DRX active time is determined based on the data cycle, and that the data cycle is T3. INTEGER(0..int(T3)-1) represents an integer in the range from 0 to int(T3)-1.

[0213] In a specific example, the value of tailored for XR(T1) is 0, the value of tailored for XR(T2) is 1, and the value of tailored for XR(T3) is 2.

[0214] Implementation form C: Add "tailored for XR" and "INTEGER(0..int(T)-1)" to drx-LongCycleStartOffset of DRX-Config, and add the cycle information field to DRX-Config.

[0215] Tailored for XR is used to configure the start time of DRX active time to be determined based on the data cycle.

[0216] INTEGER(0..int(T)-1) represents an integer in the range from 0 to int(T)-1. int(T) represents a rounding operation on a data cycle T. When Method 1 is used, INTEGER(0..int(T)-1) is used in equation (1) to construct a5, i.e., a5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. When Method 2 is used, INTEGER(0..int(T)-1) is used in equation (2) to construct b5, i.e., b5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. When Method 3 is used, INTEGER(0..int(T)-1) is used in equation (3) to construct c5, i.e., c5 is constructed as a value between 0, 1, 2, ..., and int(T)-1. From the implementation, it can be seen that the value ranges of a5, b5, and c5 may be related to the data cycle T.

[0217] The cycle information field indicates the data cycle.

[0218] The following example is a pseudocode representation of DRX-Config in implementation form C. DRX-Config::=SEQUENCE { drx-onDurationTimerCHOICE { subMilliSecondsINTEGER(1..31), milliSecondsENUMERATED { ms1,ms2,ms3,ms4,ms5,ms6,ms8,ms10,ms20,ms30,ms40,ms50,ms60, ms80,ms100,ms200,ms300,ms400,ms500,ms600,ms800,ms1000,ms1200, ms1600,spare8,spare7,spare6,spare5,spare4,spare3,spare2,spare1} }, drx-LongCycleStartOffsetCHOICE { ms10 INTEGER(0..9), ms20 INTEGER(0..19), ms32 INTEGER(0..31), ms40 INTEGER(0..39), ms60 INTEGER(0..59), ms64 INTEGER(0..63), ms70 INTEGER(0..69), ms80 INTEGER(0..79), ms128 INTEGER(0..127), ms160 INTEGER(0..159), ms256 INTEGER(0..255), ms320 INTEGER(0..319), ms512 INTEGER(0..511), ms640 INTEGER(0..639), ms1024 INTEGER(0..1023), ms1280 INTEGER(0..1279), ms2048 INTEGER(0..2047), ms2560 INTEGER(0..2559), ms5120 INTEGER(0..5119), ms10240 INTEGER(0..10239) tailored for XR INTEGER(0..int(T)-1) }, FPS-Information INTEGER(0..256) Or Cycle-InformationENUMERATED {onehundredthird,fiftythird,onehundredninth,twentyfivethird} drx-SlotOffsetINTEGER(0..31) }

[0219] In the aforementioned implementations A, B, and C, the existing DRX-Config is reused, and as a result, the start time of the terminal's DRX active time is determined based on the data cycle. This can help reduce signaling overhead and improve performance.

[0220] In the aforementioned implementation forms A, B, and C, the DRX parameters are configured using, for example, the data cycle T. When the DRX parameters are configured based on the data frame rate D, the data cycle T in the aforementioned implementation forms A, B, and C is replaced with 1000 / D, and the cycle information field is replaced with the FPS information field, which indicates the data frame rate. Specifically, we replace int(T) with int(1000 / D), int(T1) with int(1000 / D1), int(T2) with int(1000 / D2), int(T3) with int(1000 / D3), tailored for XR(T1) with tailored for XR(D1), tailored for XR(T2) with tailored for XR(D2), and tailored for XR(T3) with tailored for XR(D3), where T=1000 / D, T1=1000 / D1, T2=1000 / D2, and T3=1000 / D3.

[0221] Implementation form D: Add the drx-FPSStartOffset field to DRX-Config, which contains two parameter pieces of information: the data frame rate (represented by D) with a value range of 0 to 1023, and the amount of the offset subframe within the DRX cycle with a value range of 0 to int(1000 / D)-1. After the parameters of the drx-FPSStartOffset field are configured, the original drx-LongCycleStartOffset field is no longer used for calculating the DRX start position.

[0222] The name drx-FPSStartOffset as used herein is merely an example. In actual application, this name may be replaced with another name. The name is not limited in this application.

[0223] The drx-FPSStartOffset is a specific implementation form of the configuration information described in step 601 and is used to configure that the start point of the DRX active time is determined based on the cycle (or frame rate) of the data.

[0224] INTEGER(0..int(1000 / D)-1) represents an integer in the range from 0 to int(1000 / D)-1. int(1000 / D) represents a rounding operation for the frame rate D of the data. The implementation form D may be combined with method 4, and INTEGER(0..int(1000 / D)-1) is used to configure d3 and d4 in formula (4).

[0225] The following example is the pseudo-code representation form of DRX-Config in implementation form D. DRX-Config::=SEQUENCE { drx-onDurationTimerCHOICE { subMilliSecondsINTEGER(1..31), milliSecondsENUMERATED { ms1,ms2,ms3,ms4,ms5,ms6,ms8,ms10,ms20,ms30,ms40,ms50,ms60, ms80,ms100,ms200,ms300,ms400,ms500,ms600,ms800,ms1000,ms1200, ms1600,spare8,spare7,spare6,spare5,spare4,spare3,spare2,spare1} }, drx-LongCycleStartOffsetCHOICE { ms10 INTEGER(0..9), ms20 INTEGER(0..19), ms32 INTEGER(0..31), ms40 INTEGER(0..39), ms60 INTEGER(0..59), ms64 INTEGER(0..63), ms70 INTEGER(0..69), ms80 INTEGER(0..79), ms128 INTEGER(0..127), ms160 INTEGER(0..159), ms256 INTEGER(0..255), ms320 INTEGER(0..319), ms512 INTEGER(0..511), ms640 INTEGER(0..639), ms1024 INTEGER(0..1023), ms1280 INTEGER(0..1279), ms2048 INTEGER(0..2047), ms2560 INTEGER(0..2559), ms5120 INTEGER(0..5119), ms10240 INTEGER(0..10239) }, drx-FPSStartOffset INTEGER(0..1023)INTEGER(0..int(1000 / D)-1), }

[0226] In implementation form D, the drx-FPSStartOffset field can be divided into two fields: the drx-FPS field and the drx-StartOffset field. The drx-FPS field represents the frame rate of the data, and the drx-StartOffset field represents the number of offset subframes in the DRX cycle.

[0227] Implementation form E: The ms-Cycle field and the amount of the offset subframe within the corresponding DRX cycle are added to DRX-Config, and the value range for the amount of the offset subframe within the DRX cycle is from 0 to int(T)-1. After the ms-Cycle field and the amount of the offset subframe within the corresponding DRX cycle are configured, the original drx-LongCycleStartOffset field is no longer used in calculating the DRX start position.

[0228] The name ms-Cycle used herein is merely an example. In actual application, this name may be replaced with another. The name is not limited in this application.

[0229] ms-Cycle is a specific implementation of the configuration information described in step 601 and is used to configure the start of the DRX active time to be determined based on the data cycle (or frame rate).

[0230] INTEGER(0..int(T)-1) represents an integer in the range from 0 to int(T)-1. int(T) represents a rounding operation on the data cycle T. Implementation form E can be combined with method 4. The ms-Cycle field is used to construct d3 in equation (4), and INTEGER(0..int(T)-1) is used to construct d4 in equation (4).

[0231] The following example shows the pseudocode representation of DRX-Config in implementation form E. DRX-Config::=SEQUENCE { drx-onDurationTimerCHOICE { subMilliSecondsINTEGER(1..31), milliSecondsENUMERATED { ms1,ms2,ms3,ms4,ms5,ms6,ms8,ms10,ms20,ms30,ms40,ms50,ms60, ms80,ms100,ms200,ms300,ms400,ms500,ms600,ms800,ms1000,ms1200, ms1600,spare8,spare7,spare6,spare5,spare4,spare3,spare2,spare1} }, drx-LongCycleStartOffsetCHOICE { ms10 INTEGER(0..9), ms20 INTEGER(0..19), ms32 INTEGER(0..31), ms40 INTEGER(0..39), ms60 INTEGER(0..59), ms64 INTEGER(0..63), ms70 INTEGER(0..69), ms80 INTEGER(0..79), ms128 INTEGER(0..127), ms160 INTEGER(0..159), ms256 INTEGER(0..255), ms320 INTEGER(0..319), ms512 INTEGER(0..511), ms640 INTEGER(0..639), ms1024 INTEGER(0..1023), ms1280 INTEGER(0..1279), ms2048 INTEGER(0..2047), ms2560 INTEGER(0..2559), ms5120 INTEGER(0..5119), ms10240 INTEGER(0..10239) }, drx-LongCycleStartOffset-R18 { msonehundredthirdINTEGER(0..33), msfiftythird INTEGER(0..16), msonehundredninthINTEGER(0..9), mstwentyfivethirdINTEGER(0..8), }, }

[0232] msonehundredthird, msfiftythird, msonehundredninth, and mstwentyfivethird are specific examples of ms-Cycle.

[0233] For methods 5 through 7, please note that the configuration information described in step 601 may alternatively be presented in pseudocode format similar to that in implementation form D or implementation form E described above. Further details will not be provided again.

[0234] To implement the functions in the embodiments described above, it can be understood that base stations and terminals include corresponding hardware structures and / or software modules for performing various functions. Those skilled in the art will readily recognize that, in this application, the units and method steps in the examples described with reference to the embodiments disclosed herein may be implemented in hardware or in combination of hardware and computer software. Whether the functions are performed by hardware or by hardware driven by computer software depends on the specific application scenario and design constraints of the technical solution.

[0235] Figures 11 and 12 show possible structures of a communication device according to one embodiment of the present application. These communication devices may be configured to implement the functions of a terminal or base station in the embodiments of the method described above, and thus can achieve the beneficial effects of the embodiments of the method described above. In this embodiment of the present application, the communication device may be one of the terminals 120a to 120j shown in Figure 1, or a base station 110a or 110b shown in Figure 1, or a module (such as a chip) used in a terminal or base station.

[0236] As shown in Figure 11, the communication device 1100 includes a processing unit 1110 and an interface unit 1120. The communication device 1100 is configured to implement the functions of a terminal or base station in the embodiment of the method described above.

[0237] When the communication device 1100 is configured to implement the functions of the terminal in the embodiment of the method described above, the processing unit 1110 is configured to determine the DRX active time, the start of the active time being related to a data cycle, and the processing unit 1110 is further configured to control the communication device 1100 to monitor the PDCCH during the DRX active time.

[0238] In possible implementations, the interface unit 1120 is configured to receive configuration information from a wireless access network device, and the processing unit 1110 is specifically configured to determine the DRX active time based on the configuration information and data cycles.

[0239] In possible implementations, the start time of the active period is: (a1*10+a2)modulo a3=f1(a4)modulo a3+a5, or (a1*10+a2)modulo a3=(f1(a4)+a5)modulo a3 is satisfied.

[0240] a1 represents the system frame number corresponding to the start time, a2 represents the subframe number corresponding to the start time, f1(a4) represents the function related to a4, a5 is composed of wireless access network devices, and modulo represents the modulo operation. a3 and a4 satisfy a3 = int(T) and a4 = T - int(T), where int represents the rounding operation and T is the data cycle.

[0241] In possible implementations, the start time of the active period is: (b1*10+b2)modulo b3=f2(b3,b4)modulo b3+b5, or (b1*10+b2)modulo b3=(f2(b3,b4)+b5)modulo b3 is satisfied.

[0242] b1 represents the system frame number corresponding to the start time, b2 represents the subframe number corresponding to the start time, f2(b3,b4) represents the function related to b3 and b4, b5 is composed of wireless access network devices, and modulo represents the modulo operation. The greatest common divisor of b3 and b4 is 1, and b3 / b4 = T, where both b3 and b4 are positive integers, and T is a data cycle.

[0243] In possible implementations, the start time of the active period is: (c1*10+c2)modulo c3=f3(T)modulo c3+c5, or (c1*10+c2)modulo c3=(f3(T)+c5)modulo c3 is satisfied.

[0244] c1 represents the system frame number corresponding to the start time, c2 represents the subframe number corresponding to the start time, f3(T) represents the function associated with T, c5 is composed of wireless access network devices, and modulo represents the modulo operation. The greatest common divisor of c3 and c4 is 1, satisfying c3 / c4=T, where both c3 and c4 are positive integers, and T is a data cycle.

[0245] In possible implementations, the start time of the active period is: int((d1*10+d2)modulo d3)=int(d4 modulo d3), or The equation int((d1*10+d2)modulo d3)=int(d4) is satisfied.

[0246] d1 represents the system frame number corresponding to the start time, d2 represents the subframe number corresponding to the start time, d3=T, where d3 represents the duration of the DRX cycle, T is the data cycle, d4 represents the number of offset subframes within the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation.

[0247] In possible implementations, the start of the active time is further related to the number of offset slots in the DRX cycle, which is equal to int(((d1*10+d2-d4)modulo d3)*d5).

[0248] d5 represents the number of slots within a single subframe.

[0249] In possible implementations, the start time of the active period is: The equation satisfies int(((e1*10+e2)*e3+e4)modulo e5)=int((e6*e3+e7)modulo e5).

[0250] e1 represents the system frame number corresponding to the starting point, e2 represents the subframe number corresponding to the starting point, e3 represents the number of slots contained in one subframe, e4 represents the e4th slot in one subframe, e5 = T * e3, where T is the data cycle, e6 represents the number of offset subframes in the DRX cycle, e7 represents the number of offset slots in one subframe, (e6 * e3 + e7) represents the total number of offset slots starting from the starting position of the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation.

[0251] In possible implementations, the start time of the active period is: The equation f1*f2+f3=int[(f4+i*f5)*f2 / 10]modulo(1024*f2) is satisfied.

[0252] f1 represents the system frame number corresponding to the starting point, f2 represents the number of slots contained in one system frame, f3 represents the slot number corresponding to the starting point, f4 represents the number of offset subframes in the DRX cycle, f5 represents the duration of the DRX cycle, f5 = T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0253] In possible implementations, the start time of the active period is: Satisfies (g1*g2*g3)+(g4*g3)+g5=int[(g6*g2*g3+g7*g3+g8)+i*g9]modulo(1024*g2*g3).

[0254] g1 represents the system frame number corresponding to the starting point, g2 represents the number of slots contained in one system frame, g3 represents the number of symbols contained in one slot, g4 represents the subframe number corresponding to the starting point, g5 represents the symbol number corresponding to the starting point, g6 represents the number of offset subframes in the DRX cycle, g7 represents the number of offset slots in the DRX cycle, g8 represents the number of offset symbols in the DRX cycle, g9 represents the duration of the DRX cycle, where g9 = T, and T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0255] In possible implementations, the start time of the active period is: The equation h1*10+h2=int[(h3+i*h4)]modulo(1024*10) is satisfied.

[0256] h1 represents the system frame number corresponding to the start time, h2 represents the slot number corresponding to the start time, h3 represents the number of offset subframes in the DRX cycle, h4 represents the duration of the DRX cycle, h4=T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0257] In possible implementations, the data cycle is comprised of wireless access network devices.

[0258] In possible implementations, the PDCCH carries information used to schedule data.

[0259] In possible implementations, the data cycle T is a non-integer.

[0260] When the communication device 1100 is configured to implement the functions of a wireless access network device in the embodiment of the method described above, the processing unit 1110 is configured to control the interface unit 1120 to transmit configuration information to a terminal, and the configuration information is used to configure that the start time of the DRX active time is determined based on the data cycle.

[0261] In possible implementations, the interface unit 1120 is further configured to transmit control information to the terminal over the physical downlink control channel PDCCH during DRX active time.

[0262] In possible implementations, control information is used to schedule data.

[0263] In possible implementations, the start time of the active period is: (a1*10+a2)modulo a3=f1(a4)modulo a3+a5, or (a1*10+a2)modulo a3=(f1(a4)+a5)modulo a3 is satisfied.

[0264] a1 represents the system frame number corresponding to the start time, a2 represents the subframe number corresponding to the start time, f1(a4) represents the function related to a4, a5 is composed of wireless access network devices, and modulo represents the modulo operation. a3 and a4 satisfy a3 = int(T) and a4 = T - int(T), where int represents the rounding operation and T is the data cycle.

[0265] In possible implementations, the start time of the active period is: (b1*10+b2)modulo b3=f2(b3,b4)modulo b3+b5, or (b1*10+b2)modulo b3=(f2(b3,b4)+b5)modulo b3 is satisfied.

[0266] b1 represents the system frame number corresponding to the start time, b2 represents the subframe number corresponding to the start time, f2(b3,b4) represents the function related to b3 and b4, b5 is composed of wireless access network devices, and modulo represents the modulo operation. The greatest common divisor of b3 and b4 is 1, and b3 / b4 = T, where both b3 and b4 are positive integers, and T is a data cycle.

[0267] In possible implementations, the start time of the active period is: (c1*10+c2)modulo c3=f3(T)modulo c3+c5, or (c1*10+c2)modulo c3=(f3(T)+c5)modulo c3 is satisfied.

[0268] c1 represents the system frame number corresponding to the start time, c2 represents the subframe number corresponding to the start time, f3(T) represents the function associated with T, c5 is composed of wireless access network devices, and modulo represents the modulo operation. The greatest common divisor of c3 and c4 is 1, satisfying c3 / c4=T, where both c3 and c4 are positive integers, and T is a data cycle.

[0269] In possible implementations, the start time of the active period is: int((d1*10+d2)modulo d3)=int(d4 modulo d3), or The equation int((d1*10+d2)modulo d3)=int(d4) is satisfied.

[0270] d1 represents the system frame number corresponding to the start time, d2 represents the subframe number corresponding to the start time, d3=T, where d3 represents the duration of the DRX cycle, T is the data cycle, d4 represents the number of offset subframes within the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation.

[0271] In possible implementations, the start of the active time is further related to the number of offset slots in the DRX cycle, which is equal to int(((d1*10+d2-d4)modulo d3)*d5).

[0272] d5 represents the number of slots within a single subframe.

[0273] In possible implementations, the start time of the active period is: The equation satisfies int(((e1*10+e2)*e3+e4)modulo e5)=int((e6*e3+e7)modulo e5).

[0274] e1 represents the system frame number corresponding to the starting point, e2 represents the subframe number corresponding to the starting point, e3 represents the number of slots contained in one subframe, e4 represents the e4th slot in one subframe, e5 = T * e3, where T is the data cycle, e6 represents the number of offset subframes in the DRX cycle, e7 represents the number of offset slots in one subframe, (e6 * e3 + e7) represents the total number of offset slots starting from the starting position of the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation.

[0275] In possible implementations, the start time of the active period is: The equation f1*f2+f3=int[(f4+i*f5)*f2 / 10]modulo(1024*f2) is satisfied.

[0276] f1 represents the system frame number corresponding to the starting point, f2 represents the number of slots contained in one system frame, f3 represents the slot number corresponding to the starting point, f4 represents the number of offset subframes in the DRX cycle, f5 represents the duration of the DRX cycle, f5 = T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0277] In possible implementations, the start time of the active period is: Satisfies (g1*g2*g3)+(g4*g3)+g5=int[(g6*g2*g3+g7*g3+g8)+i*g9]modulo(1024*g2*g3).

[0278] g1 represents the system frame number corresponding to the starting point, g2 represents the number of slots contained in one system frame, g3 represents the number of symbols contained in one slot, g4 represents the subframe number corresponding to the starting point, g5 represents the symbol number corresponding to the starting point, g6 represents the number of offset subframes in the DRX cycle, g7 represents the number of offset slots in the DRX cycle, g8 represents the number of offset symbols in the DRX cycle, g9 represents the duration of the DRX cycle, where g9 = T, and T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0279] In possible implementations, the start time of the active period is: The equation h1*10+h2=int[(h3+i*h4)]modulo(1024*10) is satisfied.

[0280] h1 represents the system frame number corresponding to the start time, h2 represents the slot number corresponding to the start time, h3 represents the number of offset subframes in the DRX cycle, h4 represents the duration of the DRX cycle, h4=T, where T is the data cycle, i represents the i-th DRX cycle or DRX active time, modulo represents the modulo operation, and int represents the rounding operation.

[0281] In possible implementations, configuration information is further used to construct the data cycle.

[0282] In possible implementations, the interface unit 1120 is further configured to transmit information used to constitute a data cycle to the terminal.

[0283] In possible implementations, the data cycle T is a non-integer.

[0284] For a more detailed description of the processing unit 1110 and the interface unit 1120, please refer directly to the relevant descriptions in the embodiments of the method described above. Further details are not described herein.

[0285] As shown in Figure 12, the communication device 1200 includes a processor 1210 and an interface circuit 1220. The processor 1210 and the interface circuit 1220 are coupled to each other. It can be understood that the interface circuit 1220 may be a transceiver or an input / output interface. Optionally, the communication device 1200 may further include a memory 1230 configured to store instructions executed by the processor 1210, or input data required by the processor 1210 to execute an instruction, or data generated after the processor 1210 has executed an instruction.

[0286] When the communication device 1200 is configured to implement an embodiment of the method described above, the processor 1210 is configured to implement the functions of the processing unit 1110, and the interface circuit 1220 is configured to implement the functions of the interface unit 1120.

[0287] When the aforementioned communication device is a chip used in a terminal, the chip within the terminal implements the functions of the terminal in the implementation form of the method described above. The chip within the terminal receives information from another module within the terminal (e.g., a radio frequency module or antenna), and the information is transmitted to the terminal by the base station, or the chip within the terminal transmits information to another module within the terminal (e.g., a radio frequency module or antenna), and the information is transmitted to the base station by the terminal.

[0288] If the aforementioned communication device is a module used in a base station, the module within the base station implements the functions of the base station in the embodiment of the method described above. The module within the base station receives information from another module within the base station (e.g., a radio frequency module or antenna), and the information is transmitted to the base station by a terminal, or the module within the base station transmits information to another module within the base station (e.g., a radio frequency module or antenna), and the information is transmitted to the terminal by the base station. The module within the base station as used herein may be a baseband chip within the base station, or it may be a DU or another module. The DU as used herein may be a DU in an open radio access network (O-RAN) architecture.

[0289] It can be understood that the processor in the embodiments of this application may be a Central Processing Unit (CPU), or may be another general-purpose processor, a Digital Signal Processor (DSP), an Application-Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), or another programmable logic device, a transistor logic device, a hardware component, or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0290] The method steps in the embodiments of this application may be implemented in hardware or by executing software instructions by a processor. The software instructions may consist of corresponding software modules. The software modules may be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disks, removable hard disks, and compact disc read-only memory (CD-ROM), or any other form of storage medium well known in the art. For example, the storage medium is coupled to the processor so that the processor can read information from and write information to the storage medium. Of course, the storage medium may be a component of the processor. The processor and storage medium may be located in an ASIC. Furthermore, the ASIC may be located in a base station or terminal. Indeed, the processor and storage medium may exist as discrete components in the base station or terminal.

[0291] All or part of the embodiments described above may be implemented using software, hardware, firmware, or any combination thereof. When software is used to implement an embodiment, all or part of the embodiment may be implemented in the form of a computer program product. A computer program product includes one or more computer programs or instructions. When a computer program or instruction is loaded into a computer and executed, all or part of the procedures or functions in the embodiments of this application are performed. The computer may be a general-purpose computer, a dedicated computer, a computer network, a base station, user equipment, or another programmable device. The computer program or instruction may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer program or instruction may be transmitted by wire or wirelessly from one website, computer, server, or data center to another website, computer, server, or data center. The computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device, such as a server or data center integrating one or more available media. The usable media may be magnetic media, such as floppy disks, hard disks, or magnetic tapes; optical media, such as digital video discs; or semiconductor media, such as solid-state drives. The computer-readable storage medium may be volatile or non-volatile storage medium, or may include both types of storage media, such as volatile and non-volatile storage media.

[0292] In the various embodiments of this application, unless otherwise specified or unless there is a logical inconsistency, the terminology and / or descriptions in different embodiments are consistent and can be referenced to one another, and the technical features in different embodiments can be combined based on their internal logical relationships to form new embodiments.

[0293] In this application, "at least one" means one or more, and "plural" means two or more. "and / or" describes an association relationship between related objects and indicates that three relationships may exist. For example, A and / or B may represent the cases where A exists alone, where both A and B exist, and where B exists alone, and A and B may be singular or plural. In the textual descriptions of this application, the letter " / " indicates an "or" relationship between related objects. In the formulas of this application, the letter " / " indicates a "split" relationship between related objects.

[0294] It should be understood that the various numbers in the embodiments of this application are used merely for the purpose of distinction to facilitate explanation and are not used to limit the scope of the embodiments of this application. The sequence numbers of the processes described above do not imply an execution order, and the execution order of the processes should be determined based on the function and internal logic of the processes. [Explanation of Symbols]

[0295] 1000 Communication Systems 100 Wireless Access Networks 110a and 110b Wireless Access Network Devices Terminals 120a~120j 120i helicopter or unmanned aerial vehicle 200 Core Network 300 Internet 1100 Communication equipment 1110 Processing Unit 1120 Interface Unit 1200 Communication equipment 1210 Processor 1220 Interface Circuit 1230 memory

Claims

1. A communication method performed by a terminal, a module within the terminal, or one or more processors within the terminal, A step of determining discontinuous reception (DRX) active time, wherein the start time of the DRX active time is related to a data cycle, and the data cycle is a non-integer in milliseconds. The DRX cycle is defined by an offset slot, or the start time is represented using a system frame number and a slot number. The DRX active time corresponds to the data cycle, in steps. The steps include monitoring the physical downlink control channel (PDCCH) during the DRX active time, A communication method that includes this.

2. The process further includes the step of receiving configuration information from a wireless access network device, The step of determining the DRX active time is: The method according to claim 1, comprising the step of determining the DRX active time based on the configuration information and the data cycle.

3. The start time of the DRX active time is, int((d1 * 10 + d2) modulo d3) = int(d4 modulo d3), or int((d1 * 10 + d2) modulo d3) = int(d4) satisfies, where, d1 represents the system frame number corresponding to the start time, d2 represents the subframe number corresponding to the start time, d3 = T, where d3 represents the duration of the DRX cycle, T is the data cycle, d4 represents the number of offset subframes in the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation. The method according to claim 1.

4. The start time of the DRX active time is further related to the amount of offset slots in the DRX cycle, and the amount of offset slots in the DRX cycle is equal to int(((d1 * 10 + d2 - d4) modulo d3) * d5), d5 represents the number of slots within a single subframe. The method according to claim 3.

5. The start time of the DRX active time is, int(((e1*10+e2)*e3+e4)modulo e5) = int((e6*e3+e7)modulo e5) satisfies, e1 represents the system frame number corresponding to the start time, e2 represents the subframe number corresponding to the start time, e3 represents the number of slots contained in one subframe, e4 represents the e4th slot in one subframe, e5 = T * e3, where T is the data cycle, e6 represents the number of offset subframes in the DRX cycle, e7 represents the number of offset slots in one subframe, modulo represents the modulo operation, and int represents the rounding operation. The method according to claim 1.

6. The start time of the DRX active time is, f1 * f2 + f3 = int[(f4 + i * f5) * f2 / 10] modulo(1024 * f2), f1 represents the system frame number corresponding to the start time, f2 represents the number of slots contained in one system frame, f3 represents the slot number corresponding to the start time, f4 represents the number of offset subframes in the DRX cycle, f5 represents the duration of the DRX cycle, f5 = T, where T is the data cycle, i represents the i-th DRX cycle or the DRX active time, modulo represents the modulo operation, and int represents the rounding operation. The method according to claim 1.

7. The start time of the DRX active time is, The equation h1 * 10 + h2 = int[(h3 + i * h4)] modulo(1024 * 10) is satisfied, h1 represents the system frame number corresponding to the start time, h2 represents the slot number corresponding to the start time, h3 represents the number of offset subframes in the DRX cycle, h4 represents the duration of the DRX cycle, h4 = T, where T is the data cycle, i represents the i-th DRX cycle or the DRX active time, modulo represents the modulo operation, and int represents the rounding operation. The method according to claim 1.

8. The method according to claim 1, wherein the data cycle is comprised of a wireless access network device.

9. A communication method performed by a wireless access network device, a module within the wireless access network device, or one or more processors within the wireless access network device, A step of transmitting configuration information to a terminal, wherein the configuration information is used to configure that the start time of the discontinuous receive (DRX) active time is determined based on a data cycle, and the data cycle is a non-integer in milliseconds. The DRX cycle is defined by an offset slot, or the start time is represented using a system frame number and a slot number. The DRX active time is in a step that coincides with the data cycle. A communication method that includes this.

10. The step of transmitting control information to the terminal on the physical downlink control channel (PDCCH) during the DRX active time. The method according to claim 9, further comprising:

11. The start time of the DRX active time is, int((d1 * 10 + d2) modulo d3) = int(d4 modulo d3), or int((d1 * 10 + d2) modulo d3) = int(d4) satisfies, where, d1 represents the system frame number corresponding to the start time, d2 represents the subframe number corresponding to the start time, d3 = T, where d3 represents the duration of the DRX cycle, T is the data cycle, d4 represents the number of offset subframes in the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation. The method according to claim 9.

12. The start time of the DRX active time is further related to the amount of offset slots in the DRX cycle, and the amount of offset slots in the DRX cycle is equal to int(((d1 * 10 + d2 - d4) modulo d3) * d5), d5 represents the number of slots within a single subframe. The method according to claim 11.

13. The start time of the DRX active time is, int(((e1*10+e2)*e3+e4)modulo e5) = int((e6*e3+e7)modulo e5) satisfies, e1 represents the system frame number corresponding to the start time, e2 represents the subframe number corresponding to the start time, e3 represents the number of slots contained in one subframe, e4 represents the e4th slot in one subframe, e5 = T * e3, where T is the data cycle, e6 represents the number of offset subframes in the DRX cycle, e7 represents the number of offset slots in one subframe, (e6 * e3 + e7) represents the total number of offset slots starting from the start position of the DRX cycle, modulo represents the modulo operation, and int represents the rounding operation. The method according to claim 9.

14. The start time of the DRX active time is, f1 * f2 + f3 = int[(f4 + i * f5) * f2 / 10] modulo(1024 * f2), f1 represents the system frame number corresponding to the start time, f2 represents the number of slots contained in one system frame, f3 represents the slot number corresponding to the start time, f4 represents the number of offset subframes in the DRX cycle, f5 represents the duration of the DRX cycle, f5 = T, where T is the data cycle, i represents the i-th DRX cycle or the DRX active time, modulo represents the modulo operation, and int represents the rounding operation. The method according to claim 9.

15. The start time of the DRX active time is, The equation h1 * 10 + h2 = int[(h3 + i * h4)] modulo(1024 * 10) is satisfied, h1 represents the system frame number corresponding to the start time, h2 represents the slot number corresponding to the start time, h3 represents the number of offset subframes in the DRX cycle, h4 represents the duration of the DRX cycle, h4 = T, where T is the data cycle, i represents the i-th DRX cycle or the DRX active time, modulo represents the modulo operation, and int represents the rounding operation. The method according to claim 9.

16. The method according to claim 9, wherein the configuration information is further used to configure the data cycle.

17. Steps to transmit information used to constitute the data cycle to the terminal. The method according to claim 9, further comprising:

18. A communication device comprising a processor, wherein the processor is coupled to a memory, the memory is configured to store a program or instruction, and when the program or instruction is executed by the processor, the communication device is enabled to perform the method according to any one of claims 1 to 8.

19. A communication device comprising a processor, wherein the processor is coupled to a memory, the memory is configured to store a program or instruction, and when the program or instruction is executed by the processor, the communication device is enabled to perform the method according to any one of claims 9 to 17.

20. A computer-readable storage medium, wherein the computer-readable storage medium stores a computer program or instruction, and when the computer program or instruction is executed by a communication device, the method according to any one of claims 1 to 8 is executed.

21. A computer-readable storage medium, wherein the computer-readable storage medium stores a computer program or instruction, and when the computer program or instruction is executed by a communication device, the method according to any one of claims 9 to 17 is performed.

22. A communication system comprising a communication device configured to perform the method described in any one of claims 1 to 8, and a communication device configured to perform the method described in any one of claims 9 to 17.

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