Manufacturing method for semiconductor devices

By bonding semiconductor elements on substrates with varying elastic moduli and removing the harder first substrate, the method addresses distortion issues in semiconductor manufacturing, improving accuracy and reducing costs.

JP7868939B2Active Publication Date: 2026-06-02TOKYO ELECTRON LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
TOKYO ELECTRON LTD
Filing Date
2022-10-04
Publication Date
2026-06-02

AI Technical Summary

Technical Problem

Existing semiconductor device manufacturing methods face challenges in suppressing distortion of multilayer films in memory cell arrays, leading to reduced patterning accuracy and increased manufacturing costs due to substrate warping and the need for additional thinning processes.

Method used

A method involving bonding a first semiconductor element to a second semiconductor element on substrates with differing elastic moduli, where the first substrate is harder than the second, and then removing the first substrate to form a laminate, using a separation layer to minimize distortion and simplify the process.

Benefits of technology

This approach effectively suppresses distortion of multilayer films, maintains patterning accuracy, enhances productivity, and reduces manufacturing costs by eliminating the need for substrate thinning steps.

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Abstract

Provided is a manufacturing method for a semiconductor device including a first semiconductor element and a second semiconductor element, the method including the steps of: forming an insulation layer on a first substrate that has a first modulus of elasticity that is higher than a second modulus of elasticity; forming, on the insulation layer, the first semiconductor element that has a first joining surface; forming, on a second substrate having the second modulus of elasticity, the second semiconductor element that has a second joining surface; forming a laminate in which the first joining surface and the second joining surface are adhered to each other to laminate the first semiconductor element and the second semiconductor element; and removing the first substrate from the laminate.
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