Back contact batteries and solar modules

Abstract

The present invention provides a back-contact battery and a solar module that include a dielectric passivation layer to improve the operating efficiency of the back-contact battery. [Solution] The semiconductor comprises a first dielectric passivation layer and a second dielectric passivation layer, each of which includes a first sub-passivation layer having field passivation functionality. The conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first sub-passivation layer. The thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. Each of the first dielectric passivation layer and the second dielectric passivation layer further includes a second sub-passivation layer having chemical passivation functionality.

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic power, and particularly to back-contact batteries and solar modules.

[0002] (Cross-reference to related applications) This application claims the priority of Chinese patents with application numbers 202411278194.1 and 202411534982.2, titled "Back-Contact Battery and Solar Module", filed with the Chinese Patent Office on September 12, 2024, and all of its contents are incorporated herein by reference.

Background Art

[0003] A solar cell is a device that can convert solar light energy into electrical energy. Specifically, when the solar cell is in an operating state, sunlight irradiates the p-n junction of the semiconductor of the solar cell to form new hole-electron pairs. Under the action of the built-in electric field of the p-n junction, the optically generated holes flow to the P-type doped region, and the optically generated electrons flow to the N-type doped region. When the circuit is conductive, current can be generated. Among them, a solar cell with both the positive and negative electrodes on the back surface of the battery is a back-contact battery. Compared with a double-sided contact solar cell, the surface of the back-contact battery is not shielded by a metal electrode, and the light utilization rate on the light-receiving surface side of the back-contact battery is higher. Therefore, the back-contact battery has a higher short-circuit current and photoelectric conversion efficiency, and currently, it has become one of the technical trends to achieve high-efficiency crystalline silicon batteries. In addition, the above back-contact battery may include a surface passivation layer with both a field passivation function and a chemical passivation function, thereby improving the passivation effect on the side of the back-contact battery equipped with the surface passivation layer.

[0004] However, in conventional back-contact batteries that include a surface passivation layer combining the above-mentioned field passivation function and chemical passivation function, the surface passivation layer cannot simultaneously satisfy the passivation requirements of the P-type doped region and the N-type doped region, resulting in undesirable battery performance. [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] The object of the present invention is to provide a back-contact battery and a solar module that improve the operating efficiency of a back-contact battery by increasing the field passivation effect and chemical passivation effect of the first dielectric passivation layer on the first doped semiconductor portion, in accordance with the different conductivity types of the first doped semiconductor portion and the second doped semiconductor portion, while reducing the field passivation effect that the second dielectric passivation layer has on the second doped semiconductor portion. [Means for solving the problem]

[0006] To achieve the above objective, in a first embodiment, the present invention provides a back-contact battery comprising a semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion, a first dielectric passivation layer, and a second dielectric passivation layer. The first doped semiconductor portion and the second doped semiconductor portion have opposite conductivity types. Each of the first dielectric passivation layer and the second dielectric passivation layer includes a first sub-passivation layer having a field passivation function. The conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first sub-passivation layer. The semiconductor substrate has opposing first and second surfaces. In a direction parallel to the first surface, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the first surface. The first dielectric passivation layer covers the side of the first doped semiconductor portion opposite to the semiconductor substrate, and the second dielectric passivation layer covers the side of the second doped semiconductor portion opposite to the semiconductor substrate. The thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. Each of the first dielectric passivation layer and the second dielectric passivation layer further includes a second sub-passivation layer having a chemical passivation function. The second sub-passivation layer is provided on the side of the first sub-passivation layer opposite to the semiconductor substrate. The material of the second sub-passivation layer included in the first dielectric passivation layer is different from the material of the first sub-passivation layer included in the first dielectric passivation layer. The material of the second sub-passivation layer included in the second dielectric passivation layer is different from the material of the first sub-passivation layer included in the second dielectric passivation layer.

[0007] When the above technical means are employed, the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are opposite, and the conductivity type of the first doped semiconductor is opposite to the conductivity type of the fixed charge of the first sub-passivation layer covering the side of the first doped semiconductor portion opposite to the semiconductor substrate, and the first sub-passivation layer covering the side of the second doped semiconductor portion opposite to the semiconductor substrate. Furthermore, the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer not only possesses chemical passivation functionality but also field passivation functionality. Furthermore, the first sub-passivation layer contained in the first dielectric passivation layer induces charges of the opposite conductivity type to the first doped semiconductor on the side adjacent to the first doped semiconductor, and charges of the same conductivity type as the first doped semiconductor are present on the side of the first sub-passivation layer contained in the first dielectric passivation layer that is opposite to the first doped semiconductor. As a result, an electric field is formed in the first sub-passivation layer contained in the first dielectric passivation layer, and since the conductivity type of the fixed charges in the first sub-passivation layer contained in the first dielectric passivation layer is opposite to the conductivity type of the dopant in the first doped semiconductor, this electric field can shield minority carriers and enhance the carrier collection capability and carrier separation capability of the first doped semiconductor. Conversely, the electric field formed in the first sub-passivation layer contained within the second dielectric passivation layer forms a reverse electric field in the second doped semiconductor portion, which has the same conductivity type as its own fixed charge. At this time, the field passivation function of the second dielectric passivation layer weakens the electric field in the second doped semiconductor portion, affecting the carrier collection capability of the second doped semiconductor portion. Next, the field passivation effect of the first sub-passivation layer is directly proportional to its thickness.According to this, when the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer, the thickness of the first sub-passivation layer provided on the side opposite to the semiconductor substrate of the second doped semiconductor is smaller. In this case, the first sub-passivation layer with a smaller thickness included in the second dielectric passivation layer can weaken its effect on the second doped semiconductor with respect to the reverse electric field, contributing to high carrier collection efficiency in the second doped semiconductor. At the same time, the first and second sub-passivation layers included in the second dielectric passivation layer can chemically passivate the surface of the second doped semiconductor, reducing surface defects in the second doped semiconductor. Furthermore, the thickness of the first subpassivation layer, which is provided on the opposite side of the semiconductor substrate of the first doped semiconductor portion, is large. In this case, the first subpassivation layer with a large thickness has a field passivation effect of a higher codirectional electric field relative to the first doped semiconductor portion, thereby enhancing the carrier collection capability of the first doped semiconductor portion and reducing surface defects in the first doped semiconductor portion. As can be seen from the above, in the back-contact battery provided by the present invention, the field passivation effect and chemical passivation effect of the first dielectric passivation layer on the first doped semiconductor portion are increased in accordance with the fact that the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are different, while the field passivation effect of the second dielectric passivation layer on the second doped semiconductor portion is reduced, thereby simultaneously realizing the passivation needs of the two doped semiconductor portions with different conductivity types. As a result, the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back-contact battery are given a low carrier recombination rate and a high carrier isolation capability, respectively, which contributes to improving the operating performance of the back-contact battery.

[0008] One possible implementation is that, under the same measurement conditions, the corresponding PL luminance value of the portion corresponding to the second doped semiconductor on the non-light-receiving side of the back contact battery is greater than the corresponding PL luminance value of the portion corresponding to the first doped semiconductor.

[0009] When the above technical means are employed, the PL luminance value refers to the light luminance emitted by the battery under light irradiation conditions. Since the magnitude of the PL luminance value is related to the passivation performance of the measurement portion, it represents the integrated passivation effect of all film layers in the area corresponding to the first doped semiconductor portion or the area corresponding to the second doped semiconductor portion, for example, the integrated passivation effect including the tunnel passivation layer, doped semiconductor portion, and dielectric passivation layer. Specifically, under the same measurement conditions, a larger PL luminance value means that the passivation performance of this portion is higher, and a smaller PL luminance value means that the passivation performance of this portion is lower. According to this, when the corresponding PL luminance value of the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back-contact battery is greater than the corresponding PL luminance value of the portion corresponding to the first doped semiconductor portion, it indicates that the passivation performance of the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back-contact battery provided in the present invention is higher than the passivation performance of the portion corresponding to the first doped semiconductor portion. At the same time, the PL brightness values ​​of the two regions can also indirectly reflect the chemical passivation effect. Specifically, the chemical passivation effect of the second dielectric passivation layer is greater than that of the first dielectric passivation layer. Chemical passivation enhances the integrated passivation effect corresponding to the second doped semiconductor portion, reducing the differentiation in the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back-contact battery. This simultaneously fulfills the passivation needs of two doped semiconductor portions with different conductivity types, thereby providing the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the non-light-receiving side of the back-contact battery with low carrier recombination rates and high carrier isolation capabilities, respectively, contributing to improved operating performance of the back-contact battery.

[0010] One possible implementation is that the thickness of the first subpassivation layer is between 2 nm and 15 nm. In this case, since the thickness of the first subpassivation layer is within the above range, it is possible to prevent the passivation effect from being reduced due to the thickness of the first subpassivation layer being too small, and to ensure that the semiconductor substrates on the opposite side of the first doped semiconductor portion and the second doped semiconductor portion have a low carrier recombination rate. Furthermore, it is possible to prevent the influence of the first subpassivation layer on the carrier collection efficiency of the second doped semiconductor portion from becoming too large due to the thickness of the first subpassivation layer being too large, and to ensure that the back contact battery has a high conversion efficiency.

[0011] One possible implementation is that the thickness of the first sub-passivation layer included in the first dielectric passivation layer is 4 nm or more and 15 nm or less. In this case, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is relatively large, which further enhances the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer with respect to the first doped semiconductor portion. This further reduces the degree of differentiation in the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back-contact battery, contributing to further improvement in the operating performance of the back-contact battery.

[0012] One possible implementation is that the thickness of the first sub-passivation layer included in the second dielectric passivation layer is between 2 nm and 8 nm.

[0013] When the above technical means are adopted, the thickness of the first sub-passivation layer included in the second dielectric passivation layer is within the above range, which prevents the integrated passivation effect on the second doped semiconductor from being reduced due to the small thickness of the first sub-passivation layer included in the second dielectric passivation layer, and contributes to ensuring that the second doped semiconductor has fewer surface defects on the side opposite to the semiconductor substrate. Furthermore, it prevents the degree to which the electric field of the second doped semiconductor is weakened by the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer is increased due to the large thickness of the first sub-passivation layer included in the second dielectric passivation layer, and contributes to ensuring that the second doped semiconductor has high carrier collection efficiency.

[0014] One possible implementation is that the thickness of the second sub-passivation layer included in the first dielectric passivation layer is smaller than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.

[0015] By employing the above technical means, a second sub-passivation layer included in the second dielectric passivation layer, which is thicker (compared to the second sub-passivation layer included in the first dielectric passivation layer), is provided in the first sub-passivation layer included in the second dielectric passivation layer, which is thinner (compared to the first sub-passivation layer included in the first dielectric passivation layer). This compensates for the weakening of the field passivation effect on the side of the second doped semiconductor portion opposite to the semiconductor substrate caused by the first sub-passivation layer included in the second dielectric passivation layer. This further reduces the number of surface defects on the side of the second doped semiconductor portion opposite to the semiconductor substrate, thereby reducing the differentiation of the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back contact battery, and contributing to improved operating performance of the back contact battery.

[0016] One possible implementation is that the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is 0.5 nm or more and 5 nm or less.

[0017] When the above technical means are adopted, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is within the above range. Therefore, it is possible to prevent the chemical passivation effect of the second sub-passivation layer included in the second dielectric passivation layer and the second sub-passivation layer included in the first dielectric passivation layer from becoming almost the same due to a small difference, and ensure that the second sub-passivation layer included in the second dielectric passivation layer can compensate for the difference in chemical passivation effect between the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the non-light-receiving surface side. This large difference can prevent the thickness of the second sub-passivation layer contained in the first dielectric passivation layer from being too small, resulting in insufficient passivation effect of the second sub-passivation layer, or conversely, prevent the thickness of the second sub-passivation layer contained in the second dielectric passivation layer from being too large, thus contributing to reducing the manufacturing cost of the battery.

[0018] One possible implementation is a second subpassivation layer with a thickness of 50 nm to 160 nm. In this case, since the thickness of the second subpassivation layer is within the above range, it prevents the passivation effect from being weakened due to a small thickness of the second subpassivation layer, ensuring a low carrier recombination rate on the non-photosensitive side of the back contact battery, and contributing to improved operating performance of the back contact battery. Furthermore, it prevents the amount of material consumed from being increased due to a large thickness of the second subpassivation layer, contributing to reduced manufacturing costs for the back contact battery.

[0019] One possible implementation is that the thickness of the first dielectric passivation layer is smaller than the thickness of the second dielectric passivation layer. In this case, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Therefore, when the thickness of the first dielectric passivation layer is smaller than the thickness of the second dielectric passivation layer, this contributes to making the thickness of the second sub-passivation layer included in the first dielectric passivation layer smaller than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Accordingly, the principle of application of the beneficial effect when the thickness of the first dielectric passivation layer is smaller than the thickness of the second dielectric passivation layer can be explained by referring to the principle of application of the beneficial effect when the thickness of the second sub-passivation layer included in the first dielectric passivation layer is smaller than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, as described above, and a detailed explanation is omitted here.

[0020] One possible implementation is a ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer, which is between 0.9 and 1.1.

[0021] When the above technical means are adopted, if the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is 0.9 or more and 1.1 or less, the thickness of the first dielectric passivation layer provided on the side opposite to the semiconductor substrate of the first doped semiconductor portion and the thickness of the second dielectric passivation layer provided on the side opposite to the semiconductor substrate of the second doped semiconductor portion are almost the same. This contributes to giving the first dielectric passivation layer and the second dielectric passivation layer almost the same integrated passivation effect, thereby further reducing the differentiation in the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving surface side of the back contact battery.

[0022] One possible implementation is that the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is between 52 nm and 175 nm.

[0023] When the above technical means are adopted, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, and since the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is appropriate, it is possible to prevent the passivation effect of the first dielectric passivation layer and / or the second dielectric passivation layer from being weakened due to a small thickness, and furthermore, it is possible to prevent the distribution density of microstructures within the first dielectric passivation layer and / or the second dielectric passivation layer from becoming large or the amount of materials consumed from becoming large due to a large thickness, thereby ensuring that the back contact battery has high operating efficiency and contributing to reducing the manufacturing cost of the battery.

[0024] One possible implementation is that the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is 0.9 or more and 1.1 or less, and / or the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer is 2.0 or more and 2.2 or less.

[0025] When the above technical means are adopted, when the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is 0.9 or more and 1.1 or less, the refractive indices of the first dielectric passivation layer and the second dielectric passivation layer are almost the same, which contributes to providing almost the same light ray refraction effect to the part corresponding to the first dielectric passivation layer and the part corresponding to the second dielectric passivation layer on the non-light-receiving surface side of the back contact battery, contributes to the realization of uniform light absorption, and contributes to ensuring the balance of electrons and holes. Also, when the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer shows a high refraction effect on light rays, causing more light rays to reach into the semiconductor substrate by the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer, and contributing to improving the bifaciality of the battery.

[0026] As a possible implementation form, the first sub-passivation layer included in the first dielectric passivation layer is an aluminum oxide layer, and under the measurement conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the corresponding PL luminance value on the opposite side of the semiconductor substrate of the first sub-passivation layer included in the first dielectric passivation layer is 5000 or more, and / or the corresponding PL luminance value on the opposite side of the semiconductor substrate of the first sub-passivation layer included in the second dielectric passivation layer is 16500 or more.

[0027] When the above technical means are adopted, the aluminum oxide layer contains a large amount of oxygen negative ions, forms a fixed negative charge with a high density at the interface between itself and the first doped semiconductor part, and can form a built-in electric field that has a shielding effect on minority carriers, improving the carrier collection efficiency of the first doped semiconductor part and enhancing the carrier separation ability of the first doped semiconductor part. Next, under the measurement conditions of an exposure time of 0.2 s and a light intensity of 1 sun, when the PL luminance value corresponding to the side opposite to the semiconductor substrate of the first sub-passivation layer included in the first dielectric passivation layer is 5000 or more, the field passivation effect on the first doped semiconductor part is improved due to the presence of the first sub-passivation layer with a large thickness included in the first dielectric passivation layer, contributing to further reducing the difference in the passivation effect surface between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the non-light-receiving surface side of the back contact battery. Also, when the PL luminance value corresponding to the side opposite to the semiconductor substrate of the first sub-passivation layer included in the second dielectric passivation layer is within the above range, the first sub-passivation layer included in the second dielectric passivation layer can perform chemical passivation and / or field passivation on the second doped semiconductor part, reducing as much as possible the influence of its own field passivation function on the carrier collection efficiency of the second doped semiconductor part, ensuring that the second doped semiconductor part has a high carrier separation ability, and contributing to further reducing the difference in the passivation effect surface between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the non-light-receiving surface side of the back contact battery.

[0028] As one possible implementation, when both the first dielectric passivation layer and the first sub-passivation layer contained within the second dielectric passivation layer are aluminum oxide layers, the ratio of the PL luminance value corresponding to the side of the first sub-passivation layer contained within the second dielectric passivation layer that is opposite to the semiconductor substrate, to the PL luminance value corresponding to the side of the first sub-passivation layer contained within the first dielectric passivation layer that is opposite to the semiconductor substrate, is 2.5 or more and 3.4 or less. In this case, compared to the ratio (generally 3 or more and 4 or less) of the PL luminance value of the second doped semiconductor portion corresponding to the side opposite the semiconductor substrate of the first doped semiconductor portion, when the ratio of the PL luminance value of the first sub-passivation layer included in the second dielectric passivation layer corresponding to the side opposite the semiconductor substrate of the first sub-passivation layer included in the first dielectric passivation layer is 2.5 or more and 3.4 or less, the ratio between the above PL luminance values ​​is small. That is, the presence of the first sub-passivation layer included in the first dielectric passivation layer and the first dielectric passivation layer reduces the differentiation in the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back contact battery, and contributes to simultaneously realizing the passivation needs of two doped semiconductor portions of different conductivity types.

[0029] One possible implementation is that the surface reflectance of the first doped semiconductor portion on the side opposite to the semiconductor substrate is greater than the surface reflectance of the second doped semiconductor portion on the side opposite to the semiconductor substrate.

[0030] When the above technical means are employed, it can be understood that surface reflectance and specific surface area are inversely proportional, and the larger the specific surface area, the higher the surface light confinement effect and the lower the surface reflectance. Next, specific surface area and surface roughness are directly proportional, and the larger the specific surface area, the higher the surface roughness. According to this, when the surface reflectance of the first doped semiconductor portion on the side opposite the semiconductor substrate is greater than the surface reflectance of the second doped semiconductor portion on the side opposite the semiconductor substrate, the surface roughness of the first doped semiconductor portion on the side opposite the semiconductor substrate is small, and the surface roughness of the second doped semiconductor portion on the side opposite the semiconductor substrate is large. Under the same conditions, the film layer deposition thickness of the first sub-passivation layer contained in the first dielectric passivation layer and the second dielectric passivation layer is inversely proportional to the roughness of the surface on which it is deposited. Therefore, when the surface roughness on the side opposite to the semiconductor substrate of the first doped semiconductor portion is small, when manufacturing the first sub-passivation layer contained in the first dielectric passivation layer and the second dielectric passivation layer under the same process conditions, the first sub-passivation layer contained in the first dielectric passivation layer, which is relatively thicker, is formed on the side opposite to the semiconductor substrate of the first doped semiconductor portion, and the first dielectric passivation layer This improves the field passivation effect of the first sub-passivation layer contained in the doping layer, and forms a relatively thin first sub-passivation layer contained in the second dielectric passivation layer on the side opposite to the semiconductor substrate of the second doped semiconductor portion, thereby reducing the field passivation effect of the first sub-passivation layer contained in the second dielectric passivation layer, and reducing the ratio of PL brightness values ​​between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving surface side of the battery, thereby contributing to reducing the degree of differentiation of the passivation surfaces. Furthermore, when the surface roughness on the side opposite to the semiconductor substrate of the second doped semiconductor portion is large, forming a relatively thin first sub-passivation layer contained in the second dielectric passivation layer on the side opposite to the semiconductor substrate of the second doped semiconductor portion contributes to reducing the influence of the field passivation effect of the first sub-passivation layer contained in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion.

[0031] In one possible implementation, when the surface reflectance of the first doped semiconductor portion opposite the semiconductor substrate is greater than the surface reflectance of the second doped semiconductor portion opposite the semiconductor substrate, the surface of the first doped semiconductor portion opposite the semiconductor substrate has a first texture structure, and the surface of the second doped semiconductor portion opposite the semiconductor substrate has a second texture structure. The first and second texture structures differ in one-dimensional dimensions.

[0032] By employing the above technical means, the reflectivity of the surface of the first doped semiconductor portion opposite to the semiconductor substrate, on which the first texture structure is formed, can be increased and its surface roughness reduced by adjusting the one-dimensional dimensions of the first texture structure and the second texture structure. A relatively thick first sub-passivation layer included in the first dielectric passivation layer is formed on the side of the first doped semiconductor portion opposite to the semiconductor substrate, improving the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer. A relatively thin first sub-passivation layer included in the second dielectric passivation layer is formed on the side of the second doped semiconductor portion opposite to the semiconductor substrate, reducing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer. This reduces the ratio of PL luminance values ​​between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the battery, contributing to a reduction in the degree of differentiation of the passivation surfaces. Furthermore, the reflectivity of the surface of the second doped semiconductor portion opposite to the semiconductor substrate on which the second texture structure is formed can be reduced, and its surface roughness can be increased. This allows for the formation of a relatively thin first sub-passivation layer contained within the second dielectric passivation layer on the side of the second doped semiconductor portion opposite to the semiconductor substrate, thereby contributing to reducing the influence of the field passivation effect of the first sub-passivation layer contained within the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion.

[0033] One possible realization is that when the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, the doping concentration of the dopant in the first doped semiconductor portion is less than the doping concentration of the dopant in the second doped semiconductor portion, and / or the thickness of the first doped semiconductor portion is greater than the thickness of the second doped semiconductor portion.

[0034] When the above technical means are employed, as described above, the first sub-passivation layer included in the first dielectric passivation layer forms a superimposed electric field in the first doped semiconductor portion, thereby improving the carrier collection efficiency of the first doped semiconductor portion. The first sub-passivation layer included in the second dielectric passivation layer forms a reverse electric field in the second doped semiconductor portion, affecting the carrier collection efficiency of the second doped semiconductor portion. As a result, when the doping concentration of the dopant in the second doped semiconductor portion is high, the electric field strength formed by the second doped semiconductor portion itself is greater. Therefore, the reverse electric field suppression effect of the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer can compensate for the difference in carrier collection capabilities between the second doped semiconductor portion and the first doped semiconductor portion, contributing to the realization of uniform collection of carriers of different conductivity types.

[0035] One possible implementation is when the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, in which case the thickness of the first doped semiconductor portion is greater than the thickness of the second doped semiconductor portion. In this case, it contributes to increasing the field passivation effect of the first doped semiconductor portion on the corresponding area surface of the semiconductor substrate, further reducing the ratio of PL luminance values ​​between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the battery, thereby reducing the degree of differentiation of the passivation surface.

[0036] As one possible implementation, the first sub-passivation layer included in the first dielectric passivation layer includes a hydrogen-containing passivation layer having a microstructure in a local region.

[0037] When the above technical means are employed, the presence of the above microstructure indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, thereby increasing its hydrogen passivation effect on the corresponding doped semiconductor layer and further reducing surface defects in the doped semiconductor layer. Specifically, at least one microstructure may be a structure that bulges away from the semiconductor substrate, in which case there is a bulging containment space between the hydrogen-containing passivation layer with the microstructure and the corresponding doped semiconductor portion, and hydrogen gas that generated the bulging structure is present in this containment space, further reducing surface defects in the doped semiconductor layer. Next, the hydrogen gas in the bulging structure can continuously supply hydrogen ions in subsequent manufacturing or battery operation processes, enabling continuous hydrogen passivation to the corresponding doped semiconductor layer, contributing to improved battery yield and extended battery life.

[0038] Furthermore, at least one microstructure may be a microstructure with a concave or bulging central portion and cyclone-shaped edges (in this case, the microstructure is formed, for example, by the rotation of a fluid around a straight or curved axis in a certain direction). In this case, it means that the hydrogen content in the hydrogen-containing passivation layer is higher, and as a result, there is a sufficient content of hydrogen ions not used in hydrogen passivation, and after they are released from the hydrogen-containing passivation layer, film breakdown occurs in the microstructure. According to this, when the hydrogen-containing passivation layer contains such a microstructure, the hydrogen-containing passivation layer has a higher hydrogen passivation effect on the corresponding doped semiconductor layer. In addition, after film breakdown occurs, a microstructure with irregularities can be formed on the side of the hydrogen-containing passivation layer opposite to the semiconductor substrate, which reduces the reflectivity on the side of the hydrogen-containing passivation layer opposite to the semiconductor substrate and contributes to improving its own light confinement effect.

[0039] One possible realization is that when both the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer contain a hydrogen-containing passivation layer, the distribution density of the microstructure provided in the first sub-passivation layer contained in the first dielectric passivation layer is greater than the distribution density of the microstructure provided in the first sub-passivation layer contained in the second dielectric passivation layer.

[0040] When the above technical means are adopted, it can be understood that the greater the thickness and / or density of the hydrogen-containing passivation layer, the higher its hydrogen content becomes, and the easier it becomes to form the above-mentioned microstructure by releasing hydrogen after being heated. Accordingly, when the distribution density of the microstructure provided in the first sub-passivation layer contained in the first dielectric passivation layer is greater than the distribution density of the microstructure provided in the first sub-passivation layer contained in the second dielectric passivation layer, the first sub-passivation layer contained in the first dielectric passivation layer is given greater thickness and / or higher film layer density (compared to the first sub-passivation layer contained in the second dielectric passivation layer), which contributes to ensuring that the first sub-passivation layer contained in the first dielectric passivation layer has a high field passivation effect with respect to the first doped semiconductor layer. At the same time, by providing the first sub-passivation layer contained in the second dielectric passivation layer with a small thickness and / or low film density, the influence of the field passivation function of the first sub-passivation layer contained in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor layer is reduced, contributing to ensuring that the back contact battery has high operating efficiency.

[0041] One possible implementation is that at least one microstructure has dimensions of 10 μm or more and 20 μm or less.

[0042] When the above technical means are employed, as described above, if the hydrogen-containing passivation layer has the above microstructure, it indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient and that it has a high chemical passivation effect on the corresponding doped semiconductor layer. However, due to the presence of the above microstructure, at least a portion of the microstructure area of ​​the hydrogen-containing passivation layer may not be able to contact the corresponding doped semiconductor layer, that is, at least a portion of the microstructure area of ​​the hydrogen-containing passivation layer may not be able to passivate the corresponding doped semiconductor layer. In this case, if the dimensions of the microstructure are within the above range, it is possible to prevent the hydrogen content of the hydrogen-containing passivation layer from decreasing due to the small dimensions, and also to prevent the effective contact area between the hydrogen-containing passivation layer and the corresponding doped semiconductor layer from decreasing due to the large dimensions, thereby ensuring that the hydrogen-containing passivation layer has a high passivation effect on the corresponding doped semiconductor layer. Furthermore, because the first sub-passivation layer included in the second dielectric passivation layer includes a hydrogen-containing passivation layer, and the dimensions of the microstructure within the first sub-passivation layer included in the second dielectric passivation layer are large, the thickness of the first sub-passivation layer included in the second dielectric passivation layer also increases, thus preventing it from affecting the carrier collection efficiency of the second doped semiconductor.

[0043] One possible implementation is that at least one microstructure has a height of 0.1 μm or more and 0.5 μm or less. The principle of application of the beneficial effect in this case is similar to the principle of application of the beneficial effect when the dimensions of the microstructure are 10 μm or more and 20 μm or less, as described above, and a detailed explanation is omitted here.

[0044] As one possible implementation, an anti-reflective structure with irregularities is formed in the first doped semiconductor portion and / or the second doped semiconductor portion at locations corresponding to the microstructure. In this case, by reducing the reflectivity of the first doped semiconductor portion and / or the second doped semiconductor portion on the side opposite to the semiconductor substrate, more light rays are refracted through the first doped semiconductor portion and / or the second doped semiconductor portion into the semiconductor substrate, contributing to improving the double-sided ratio of the battery.

[0045] As one possible implementation, the back-contact battery further includes a third passivation layer provided on the second surface, wherein the thickness of the third passivation layer is greater than the thickness of a portion of the first sub-passivation layer included in the first dielectric passivation layer. In this case, the thicker third passivation layer effectively chemically passesivates the second surface of the semiconductor substrate, reducing the number of surface defects and the carrier recombination rate on the second surface.

[0046] In one possible implementation, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are made of the same material. In this case, the number of materials required to manufacture different back-contact battery structures is reduced, the compatibility between different structures is improved, and the yield of back-contact batteries is improved.

[0047] In one possible implementation, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are continuous as a single unit. In this case, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be formed simultaneously using the same material and in the same step, improving the manufacturing efficiency of back-contact batteries and contributing to a reduction in the manufacturing cost of back-contact batteries.

[0048] As one possible implementation, under the same measurement conditions, the ratio of the PL luminance value on the side of the first sub-passivation layer contained in the second dielectric passivation layer opposite the semiconductor substrate to the PL luminance value on the side of the first sub-passivation layer contained in the first dielectric passivation layer opposite the semiconductor substrate is defined as PL1. Also, under the same measurement conditions, the ratio of the PL luminance value on the side of the second sub-passivation layer contained in the second dielectric passivation layer opposite the semiconductor substrate to the PL luminance value on the side of the second sub-passivation layer contained in the first dielectric passivation layer opposite the semiconductor substrate is defined as PL2, where PL2 is smaller than PL1. In this case, by providing the second sub-passivation layer contained in the first dielectric passivation layer and the second sub-passivation layer contained in the second dielectric passivation layer with different thicknesses, the differentiation of the passivation effect surface between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving surface side of the back contact battery is further reduced.

[0049] One possible implementation is when the second subpassivation layer described above is a silicon nitride layer, and PL2 is between 1.62 and 1.9. In this case, when the second subpassivation layer is formed, the ratio of the PL luminance values ​​of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving surface side of the battery can be further reduced, thereby decreasing the degree of differentiation of the passivation surface.

[0050] One possible implementation is that the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer is 0.01 or more and 0.1 or less.

[0051] In one possible implementation, the second sub-passivation layer contained in the first dielectric passivation layer and the second sub-passivation layer contained in the second dielectric passivation layer are made of the same material. In this case, the number of materials required to manufacture different structures of back contact batteries is reduced, the compatibility between different structures is improved, and the yield of back contact batteries is improved.

[0052] In one possible implementation, the second sub-passivation layer contained in the first dielectric passivation layer and the second sub-passivation layer contained in the second dielectric passivation layer are continuous as a single unit. In this case, the second sub-passivation layer contained in the first dielectric passivation layer and the second sub-passivation layer contained in the second dielectric passivation layer can be formed simultaneously in the same step using the same material, thereby improving the manufacturing efficiency of back contact batteries and contributing to a reduction in the manufacturing cost of back contact batteries.

[0053] In a second embodiment, the present invention provides a solar module equipped with a back-contact battery provided in the first embodiment and various implementations thereof.

[0054] The beneficial effects of the second aspect of the present invention and its various embodiments can be found by referring to the analysis of the beneficial effects of the first aspect and its various embodiments, and are therefore omitted here. [Brief explanation of the drawing]

[0055] The drawings described herein are for further understanding of the present invention and constitute part of the present invention. The exemplary embodiments and descriptions of the present invention are for interpretation purposes only and do not unduly limit the present invention.

[0056] [Figure 1] This is a schematic longitudinal cross-sectional view (part 1) of the structure of a back-contact battery provided in an embodiment of the present invention. [Figure 2]This is a schematic longitudinal cross-sectional view, part 2, of the structure of a back-contact battery provided in an embodiment of the present invention. [Figure 3] This is a schematic longitudinal cross-sectional view, part 3, of the structure of a back-contact battery provided in an embodiment of the present invention. [Figure 4] This is the fourth schematic longitudinal cross-sectional view of the structure of the back contact battery provided in an embodiment of the present invention. [Figure 5] This is the fifth schematic longitudinal cross-sectional view of the structure of the back contact battery provided in an embodiment of the present invention. [Figure 6] This is the first 3D view of the local region on the non-light-receiving surface side of the back contact battery provided in an embodiment of the present invention. [Figure 7] This is a 3D view, part 2, of the local region on the non-light-receiving surface side of the back contact battery provided in an embodiment of the present invention. [Figure 8] This is the first SEM image of the local region on the non-photoreceiving surface side of the back contact battery provided in an embodiment of the present invention. [Figure 9] This is the second SEM image of the local region on the non-photoreceiving surface side of the back contact battery provided in an embodiment of the present invention. [Figure 10] This is a 3D scan view of a local region on the non-light-receiving surface side of a back-contact battery provided in an embodiment of the present invention. [Figure 11] This is an SEM view of the local region of the first doped semiconductor portion on the side opposite to the semiconductor substrate in the back contact battery provided in an embodiment of the present invention. [Figure 12] This is the sixth schematic longitudinal cross-sectional view of the structure of a back-contact battery provided in an embodiment of the present invention. [Figure 13] This is a diagram showing the PL brightness value measurement on the back side of the finished structure of the back contact battery provided in an embodiment of the present invention. [Figure 14] This is a schematic diagram of the connection relationships of a solar module provided in an embodiment of the present invention. [Modes for carrying out the invention]

[0057] Embodiments of the present invention will be described below with reference to the drawings. However, it should be understood that these descriptions are merely illustrative and do not limit the scope of the present invention. In addition, in the following description, explanations of known structures and techniques will be omitted to avoid unnecessary confusion with the concept of the present invention.

[0058] The drawings show various schematic diagrams of structures according to embodiments of the present invention. These diagrams are not drawn proportionally, and some details may be enlarged and some omitted for clarity. The shapes of the various regions and layers shown in the diagrams, and their relative sizes and positional relationships, are illustrative only and may vary in reality due to manufacturing tolerances and technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0059] In the context of this invention, when one layer / element is described as being located "above" another layer / element, this layer / element may be located directly above this other layer / element, or an intermediate layer / element may exist between them. Also, if one layer / element is located "above" another layer / element in a certain orientation, by changing the orientation, that layer / element can be located "below" the other layer / element. To further clarify the technical problems, technical solutions, and beneficial effects that this invention aims to solve, the invention will be described in more detail below in combination with drawings and embodiments. It should be understood that the specific embodiments described herein are for interpretation purposes only and are not intended to limit the invention.

[0060] Furthermore, the terms “first” and “second” are used solely for descriptive purposes and should not be understood as indicating or implying relative importance or the quantity of the indicated technical feature. Accordingly, features designated as “first” or “second” may be explicitly or implicitly defined as including one or more such features. In the description of this invention, unless explicitly and specifically limited, “multiple” means two or more. Unless explicitly and specifically limited, “several” means one or more.

[0061] In describing this invention, unless otherwise explicitly defined or limited, the terms "attach," "connect," and "join" should be understood in a broad sense. For example, a connection may be fixed, detachable, integral, mechanical, electrical, direct, indirectly via an intermediate medium, or it may refer to internal communication between two elements or an interaction between two elements. Those skilled in the art will understand the specific meaning of these terms in this invention depending on the specific circumstances.

[0062] A solar cell is a device that can convert the light energy of the sun into electrical energy. Specifically, when a solar cell is in operation, sunlight irradiates the pn junction of the solar cell's semiconductor, forming new hole-electron pairs. Due to the action of the electric field built into the pn junction, the photogenerated holes flow to the P-type doped region, and the photogenerated electrons flow to the N-type doped region. When the circuit conducts, an electric current can be generated. Among these, a solar cell in which both the positive and negative electrodes are on the back of the battery is called a back-contact battery. Compared to a double-sided contact solar cell, the surface of the back-contact battery is not shielded by metal electrodes, and the light utilization rate on the light-receiving side of the back-contact battery is higher. Therefore, back-contact batteries have higher short-circuit current and photoelectric conversion efficiency, and are currently one of the technological trends for realizing high-efficiency crystalline silicon batteries. Furthermore, the above-mentioned back-contact battery may include a surface passivation layer that combines field passivation and chemical passivation functions, thereby improving the passivation effect on the side of the back-contact battery that has the surface passivation layer.

[0063] However, in conventional back-contact batteries that include a surface passivation layer that combines the above-mentioned field passivation function and chemical passivation function, the surface passivation layer cannot simultaneously satisfy the passivation requirements of the P-type doped region and the N-type doped region, resulting in undesirable battery performance. Specifically, the above-mentioned back-contact battery generally includes a semiconductor substrate, a first-doped semiconductor portion, a second-doped semiconductor portion, and a surface passivation layer. Here, the first-doped semiconductor portion and the second-doped semiconductor portion are alternately distributed on the same plane of the semiconductor substrate and have opposite conductivity types. The surface passivation layer covers the side of the first-doped semiconductor portion and the second-doped semiconductor portion that is not connected to the semiconductor substrate. Furthermore, the surface passivation layer (e.g., an aluminum oxide layer and / or a silicon nitride layer) not only possesses a chemical passivation function and can chemically passivate the semiconductor substrate opposite to the first doped semiconductor portion and the second doped semiconductor portion, but also, because the conductivity type of the fixed charge of the surface passivation layer is opposite to that of the first doped semiconductor portion, the surface passivation layer further possesses a field passivation function and can field passivate the first doped semiconductor portion, that is, it has an enhancing effect on the electric field of the first doped semiconductor portion, shielding minority carriers with the electric field formed by the surface passivation layer and accelerating the collection of majority carriers.

[0064] However, the field passivation function of the surface passivation layer weakens the electric field of the second doped semiconductor, affecting carrier collection by the second doped semiconductor. In the above case, conventional back-contact batteries including the surface passivation layer do not have a different passivation function design to match the different conductivity types of the first doped semiconductor and the second doped semiconductor. As a result, the carrier collection capability of the second doped semiconductor is low because the thickness of the surface passivation layer is large in both the first and second doped semiconductor parts, or the passivation effect of the surface passivation layer on the first doped semiconductor is undesirable because the thickness of the surface passivation layer is small in both the first and second doped semiconductor parts, which is detrimental to improving the operating efficiency of the back-contact battery.

[0065] To solve the above technical problems, in a first embodiment, an embodiment of the present invention provides a back-contact battery. As shown in Figure 1, the back-contact battery includes a semiconductor substrate 11, a first doped semiconductor portion 12, a second doped semiconductor portion 13, a first dielectric passivation layer 14, and a second dielectric passivation layer 15. The first doped semiconductor portion 12 and the second doped semiconductor portion 13 have opposite conductivity types. The first dielectric passivation layer 14 and the second dielectric passivation layer 15 each include a first sub-passivation layer 21 having field passivation and chemical passivation functions. The conductivity type of the first doped semiconductor portion 12 is opposite to the conductivity type of the fixed charge of the first sub-passivation layer 21. Here, the semiconductor substrate 11 has opposing first and second surfaces. In a direction parallel to the first surface, the first doped semiconductor portion 12 and the second doped semiconductor portion 13 are alternately distributed on the first surface. The first dielectric passivation layer 14 covers the side of the first doped semiconductor portion 12 opposite to the semiconductor substrate 11, and the second dielectric passivation layer 15 covers the side of the second doped semiconductor portion 13 opposite to the semiconductor substrate 11. The thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15. As shown in Figure 1, the first dielectric passivation layer 14 and the second dielectric passivation layer may further include a second sub-passivation layer 22 having a chemical passivation function. The second sub-passivation layer 22 is provided on the side of the first sub-passivation layer 21 opposite to the semiconductor substrate 11. The material of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is different from the material of the first sub-passivation layer 21 included in the first dielectric passivation layer 14. The material of the second sub-passivation layer 22 included in the second dielectric passivation layer 15 is different from the material of the first sub-passivation layer 21 included in the second dielectric passivation layer 15.

[0066] When the above technical means are employed, the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are opposite, and the conductivity type of the first doped semiconductor is opposite to the conductivity type of the fixed charge of the first sub-passivation layer contained in the first dielectric passivation layer covering the side of the first doped semiconductor portion opposite to the semiconductor substrate, and the conductivity type of the first sub-passivation layer contained in the second dielectric passivation layer covering the side of the second doped semiconductor portion opposite to the semiconductor substrate. Furthermore, the first sub-passivation layer contained in the first dielectric passivation layer induces charges of the opposite conductivity type to the first doped semiconductor on the side adjacent to the first doped semiconductor, and charges of the same conductivity type as the first doped semiconductor are present on the side of the first sub-passivation layer contained in the first dielectric passivation layer that is opposite to the first doped semiconductor. As a result, an electric field is formed in the first sub-passivation layer contained in the first dielectric passivation layer, and since the conductivity type of the fixed charges in the first sub-passivation layer contained in the first dielectric passivation layer is opposite to the conductivity type of the dopant in the first doped semiconductor, this electric field can shield minority carriers and enhance the carrier collection capability and carrier separation capability of the first doped semiconductor. Conversely, the electric field formed in the first sub-passivation layer contained within the second dielectric passivation layer forms a reverse electric field in the second doped semiconductor portion, which has the same conductivity type as its own fixed charge. At this time, the field passivation function of the first sub-passivation layer contained within the second dielectric passivation layer weakens the electric field in the second doped semiconductor portion, affecting the carrier collection capability of the second doped semiconductor portion. Next, within a certain range, the field passivation effect of the first sub-passivation layer contained within the first dielectric passivation layer and the second dielectric passivation layer is directly proportional to its own thickness.According to this, as shown in Figure 1, when the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15, the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15, which is provided on the side of the second doped semiconductor portion 13 opposite to the semiconductor substrate 11, is small. At this time, the small thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can weaken its effect on the second doped semiconductor portion 13 in the reverse direction of the electric field, contributing to giving the second doped semiconductor portion 13 high carrier collection efficiency. At the same time, the first sub-passivation layer 21 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can chemically passivate the surface of the second doped semiconductor portion 13, reducing surface defects in the second doped semiconductor portion 13. Furthermore, the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14, which is provided on the side of the first doped semiconductor portion 12 opposite to the semiconductor substrate 11, is large. In this case, the first sub-passivation layer 21 with a large thickness included in the first dielectric passivation layer 14 has a field passivation effect of a higher codirectional electric field relative to the first doped semiconductor portion 12. This enhances the carrier collection capability of the first doped semiconductor portion 12 and reduces surface defects in the first doped semiconductor portion 12. As can be seen from the above, in the back-contact battery provided in the embodiment of the present invention, in accordance with the different conductivity types of the first doped semiconductor portion 12 and the second doped semiconductor portion 13, the field passivation effect and chemical passivation effect of the first dielectric passivation layer 14 on the first doped semiconductor portion 12 are increased, and the effect of the second dielectric passivation layer 15 on weakening the field passivation of the second doped semiconductor portion 13 is reduced, thereby simultaneously realizing the passivation needs of the two doped semiconductor portions with different conductivity types. As a result, the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the non-light-receiving side of the back-contact battery are given a low carrier recombination rate and a high carrier separation capability, respectively, which contributes to improving the operating performance of the back-contact battery.

[0067] In actual application processes, the embodiments of the present invention do not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate may be a silicon substrate. Alternatively, the semiconductor substrate may be a substrate of any semiconductor material such as a germanium silicon substrate, a germanium substrate, or a gallium arsenide substrate. Furthermore, the semiconductor substrate may be an N-type semiconductor substrate or a P-type semiconductor substrate.

[0068] Next, the semiconductor substrate includes opposing first and second surfaces, with the first surface of the semiconductor substrate corresponding to the non-light-receiving surface of the back contact battery, and the second surface of the semiconductor substrate corresponding to the light-receiving surface of the back contact battery. Here, as shown in Figures 1 and 2, the second surface of the semiconductor substrate 11 may be a flat surface or a textured surface. If the second surface of the semiconductor substrate 11 is a textured surface, it improves the light confinement effect of the second surface and contributes to improving the light utilization rate of the back contact battery.

[0069] Regarding the surface morphology of the first surface of the semiconductor substrate, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the first surface of the semiconductor substrate. Furthermore, the surface morphology of the first doped semiconductor portion and the second doped semiconductor portion on the side opposite to the semiconductor substrate is influenced by the surface morphology of the corresponding region on the semiconductor substrate where the two doped semiconductor layers are formed. The surface morphology of the first doped semiconductor portion and the second doped semiconductor portion on the side opposite to the semiconductor substrate affects their own surface roughness and further affects the thickness of the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer, respectively, which are formed on the side opposite to the semiconductor substrate of the first doped semiconductor portion and the second doped semiconductor portion. According to this, the surface morphology of different regions on the semiconductor substrate can be determined according to the requirements for the thickness of the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer in actual usage scenarios.

[0070] For example, the first surface of the semiconductor substrate may be a polished surface, or a textured structure may be further formed on the polished surface. Also, on the first surface, the side length of the uneven textured structure formed on the surface of the region corresponding to the first doped semiconductor portion may be greater than the side length of the uneven textured structure formed on the surface of the region corresponding to the second doped semiconductor portion, and / or, on the first surface, the height of the uneven textured structure formed on the surface of the region corresponding to the first doped semiconductor portion may be less than the height of the uneven textured structure formed on the surface of the region corresponding to the second doped semiconductor portion.

[0071] Furthermore, for example, the entire first surface of the semiconductor substrate may be a textured surface. Also, on the first surface, the length of the sides (or diagonal length) of the base portion of the pyramidal texture structure formed on the surface of the region corresponding to the first doped semiconductor portion may be smaller than the length of the sides (or diagonal length) of the base portion of the pyramidal texture structure formed on the surface of the region corresponding to the second doped semiconductor portion, and / or, on the first surface, the height of the pyramidal texture structure formed on the surface of the region corresponding to the first doped semiconductor portion may be smaller than the height of the pyramidal texture structure formed on the surface of the region corresponding to the second doped semiconductor portion.

[0072] Furthermore, for example, in the first surface, the region surface corresponding to the first doped semiconductor portion may be a polished surface, or a textured structure may be formed on the polished surface, and the region surface corresponding to the second doped semiconductor portion may be a textured surface.

[0073] It should be explained that the surface morphology of each region on the first surface of the semiconductor substrate may be the same. In this case, by adjusting the formation parameters for manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, it is possible to obtain a first sub-passivation layer included in the first dielectric passivation layer and a first sub-passivation layer included in the second dielectric passivation layer that have different thicknesses.

[0074] Regarding the first doped semiconductor portion and the second doped semiconductor portion described above, in terms of conductivity type, the embodiments of the present invention do not specifically limit the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion. It is sufficient that the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are opposite, and that the conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first subpassivation layer. Specifically, the conductivity type of the first doped semiconductor portion may be N-type, in which case the conductivity type of the second doped semiconductor portion is P-type, and both the first subpassivation layer included in the first dielectric passivation layer and the first subpassivation layer included in the second dielectric passivation layer have fixed negative charges. Alternatively, the conductivity type of the first doped semiconductor portion may be P-type, in which case the conductivity type of the second doped semiconductor portion is N-type, and there are fixed positive charges in both the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer.

[0075] In terms of distribution, as shown in Figure 1, the first doped semiconductor portion 12 may be provided within a local region of the first surface of the semiconductor substrate 11. Alternatively, as shown in Figure 3, the first doped semiconductor portion 12 may be provided on a local region of the first surface of the semiconductor substrate 11.

[0076] As shown in Figure 2, the second doped semiconductor portion 13 may be provided within a local region of the first surface of the semiconductor substrate 11. Alternatively, as shown in Figure 3, the second doped semiconductor portion 13 may be provided at least on a local region of the first surface of the semiconductor substrate 11.

[0077] Here, if both the first doped semiconductor portion and the second doped semiconductor portion are doped semiconductor layers provided on the first surface, as shown in Figures 1 and 2, the first doped semiconductor portion 12 and the second doped semiconductor portion 13 may be alternately distributed with a gap between them on the first surface side of the semiconductor substrate 11. Alternatively, as shown in Figure 3, the second doped semiconductor portion 13 may cover a portion of the first doped semiconductor portion 12, and the second doped semiconductor portion 13 and the first doped semiconductor portion 12 are provided with a gap at least in the thickness direction of the semiconductor substrate 11 to prevent short circuits from occurring.

[0078] From a material standpoint, if at least one of the first doped semiconductor portion and the second doped semiconductor portion is a doped semiconductor layer provided on the first surface, the material of the doped semiconductor layer may include any semiconductor material such as silicon, germanium silicon, germanium, or gallium arsenide. From a material arrangement standpoint, the crystalline phase of the doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline. Here, if both the first doped semiconductor portion and the second doped semiconductor portion are doped semiconductor layers provided on the first surface, the materials of the first doped semiconductor portion and the second doped semiconductor portion may be the same or different. For example, the materials of both the first doped semiconductor portion and the second doped semiconductor portion may be doped polycrystalline silicon. Alternatively, for example, the materials of both the first doped semiconductor portion and the second doped semiconductor portion may both include at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. Furthermore, for example, the material of the first doped semiconductor portion may be doped polycrystalline silicon, and the material of the second doped semiconductor portion may include at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon.

[0079] Next, as shown in Figures 1 and 2, if at least one of the first doped semiconductor portion 12 and the second doped semiconductor portion 13 is a doped semiconductor layer provided on the first surface, the doped semiconductor layer may be provided directly on the semiconductor substrate 11. Alternatively, as shown in Figures 3 and 5, the back-contact battery may further include an interface passivation layer 23 provided between at least the doped semiconductor layer and the semiconductor substrate 11. In this case, the passivation contact structure consisting of the interface passivation layer 23 and the doped semiconductor layer has an excellent interface passivation effect, and in addition, it can achieve selective carrier collection, reduce the carrier recombination rate on the corresponding region surface on the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back-contact battery. The material and thickness of the interface passivation layer 23 can be determined according to the material of the doped semiconductor layer and the actual demand, and are not specifically limited therein. For example, if the material of the doped semiconductor layer is doped polycrystalline silicon, the interface passivation layer is a tunnel passivation layer. Furthermore, for example, if the material of the doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixed layer of the above three.

[0080] Here, if the first doped semiconductor portion and the second doped semiconductor portion are each doped semiconductor layers provided on the first surface, the interface passivation layer may be provided only between the first doped semiconductor portion and the semiconductor substrate. Alternatively, as shown in Figure 3, the interface passivation layer 23 may be provided only between the second doped semiconductor portion 13 and the semiconductor substrate 11. Alternatively, as shown in Figure 5, the interface passivation layer 23 may be provided between the first doped semiconductor portion 12 and the semiconductor substrate 11, and between the second doped semiconductor portion 13 and the semiconductor substrate 11. In this case, the type of first selective contact structure composed of the first doped semiconductor portion 12 and the interface passivation layer 23 may be the same as or different from the type of second selective contact structure composed of the second doped semiconductor portion 13 and the interface passivation layer 23.

[0081] The first selective contact structure and the second selective contact structure may each be tunnel passivation contact structures, respectively.

[0082] From the perspective of surface morphology, the surface morphology of the first doped semiconductor portion opposite the semiconductor substrate and the surface morphology of the second doped semiconductor portion opposite the semiconductor substrate affect the surface reflectance on the side opposite their own semiconductor substrate. Surface reflectance and specific surface area are inversely proportional; the larger the specific surface area, the higher the surface light confinement effect and the lower the surface reflectance. Next, specific surface area and surface roughness are directly proportional; the larger the specific surface area, the higher the surface roughness. Also, under the same conditions, the deposited film thickness of the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer are inversely proportional to the roughness of their own deposited surfaces. According to this, the surface morphology and surface reflectivity of the first doped semiconductor portion on the side opposite the semiconductor substrate, and the surface morphology and surface reflectivity of the second doped semiconductor portion on the side opposite the semiconductor substrate, can be determined according to the requirements for the thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer in actual usage scenarios, and according to the actual manufacturing process of the back contact battery.

[0083] Specifically, the surface reflectance of the first doped semiconductor portion on the side opposite to the semiconductor substrate may be equal to the surface reflectance of the second doped semiconductor portion on the side opposite to the semiconductor substrate. In this case, different film thicknesses can be obtained by adjusting the condition parameters when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.

[0084] Alternatively, the surface reflectance of the first doped semiconductor portion on the side opposite to the semiconductor substrate may be greater than the surface reflectance of the second doped semiconductor portion on the side opposite to the semiconductor substrate. In this case, the surface roughness of the first doped semiconductor portion on the side opposite to the semiconductor substrate is small, and the surface roughness of the second doped semiconductor portion on the side opposite to the semiconductor substrate is large. As described above, under the same conditions, the film layer deposition thickness of the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer is inversely proportional to the roughness of the surface on which it is deposited. Therefore, when the surface roughness of the first doped semiconductor portion on the side opposite to the semiconductor substrate is small, when manufacturing the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer under the same process conditions, the second sub-passivation layer contained in the first dielectric passivation layer, which has a relatively large thickness, is located on the side opposite to the semiconductor substrate of the first doped semiconductor portion. By forming a sub-passivation layer, the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer is improved. By forming a relatively thin first sub-passivation layer included in the second dielectric passivation layer on the side opposite to the semiconductor substrate of the second doped semiconductor portion, the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer is reduced, contributing to reducing the degree of differentiation in the integrated passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the battery. Furthermore, when the surface roughness on the side opposite to the semiconductor substrate of the second doped semiconductor portion is large, by forming a relatively thin first sub-passivation layer included in the second dielectric passivation layer on the side opposite to the semiconductor substrate of the second doped semiconductor portion, it contributes to reducing the influence of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion.The difference in surface reflectance between the first doped semiconductor portion and the second doped semiconductor portion on the side opposite to the semiconductor substrate can be determined according to the difference in thickness between the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, and is not specifically limited thereto.

[0085] Next, the surface morphology of the first doped semiconductor portion on the side opposite to the semiconductor substrate may be the same as the surface morphology of the second doped semiconductor portion on the side opposite to the semiconductor substrate. In this case, different film thicknesses can be obtained by adjusting the conditional parameters when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.

[0086] Alternatively, the surface morphology of the first doped semiconductor portion opposite to the semiconductor substrate may differ from the surface morphology of the second doped semiconductor portion opposite to the semiconductor substrate. In this case, as shown in Figures 6 and 7, the surface of the first doped semiconductor portion 12 opposite to the semiconductor substrate may have a first texture structure 16, and the surface of the second doped semiconductor portion 13 opposite to the semiconductor substrate may have a second texture structure 17. The first texture structure 16 and the second texture structure 17 differ in one-dimensional dimensions and / or are of different types. Here, the types of the first texture structure 16 and the second texture structure 17 can be set according to actual needs. For example, the first texture structure and the second texture structure may be approximate uneven texture structures. The bottom surface of the approximate uneven texture structure may have a regular or irregular polygon, an arc-shaped contour, etc. The specific definition of the above one-dimensional dimensions can be determined according to the types of the first and second texture structures. For example, if the first and / or second texture structures are approximate uneven texture structures, the one-dimensional dimensions may be the height, side length, diagonal length, or perimeter of the approximate uneven texture structure.

[0087] Three examples of surface morphologies on the opposite side of the semiconductor substrate from the first doped semiconductor portion and the second doped semiconductor portion are given below, but these three examples are merely for interpretation of the present invention and do not limit the present invention.

[0088] For example, as shown in Figures 6 and 7, the surface of the first doped semiconductor portion 12 opposite to the semiconductor substrate may have a first uneven textured structure, and the surface of the second doped semiconductor portion 13 opposite to the semiconductor substrate may have a second uneven textured structure. Here, the side length of the first uneven textured structure may be greater than the side length of the second uneven textured structure, and / or the height of the first uneven textured structure may be less than the height of the second uneven textured structure. In this case, if the side length of the first uneven texture structure is greater than the side length of the second uneven texture structure, and if the height of the first uneven texture structure is less than the height of the second uneven texture structure, the reflectivity of the surface of the first doped semiconductor portion 12 on the side opposite to the semiconductor substrate 11 is greater and its surface roughness is lower. Therefore, a first sub-passivation layer 21 with a relatively large thickness included in the first dielectric passivation layer is formed on the side of the first doped semiconductor portion 12 on the side opposite to the semiconductor substrate, and the first dielectric passivation layer This improves the field passivation effect of the first sub-passivation layer 21 contained within the dielectric passivation layer 15, and by forming a relatively thin first sub-passivation layer 21 contained within the second dielectric passivation layer 15 on the side of the second doped semiconductor portion 13 that is opposite to the semiconductor substrate, the field passivation effect of the first sub-passivation layer 21 contained within the second dielectric passivation layer 15 is reduced, thereby contributing to reducing the degree of differentiation in the integrated passivation effect between the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the non-light-receiving surface side of the battery. Furthermore, the reflectivity of the surface of the second doped semiconductor portion 13 opposite to the semiconductor substrate, where a second uneven texture structure with smaller side lengths and / or greater heights is formed, is lower and its surface roughness is higher. This allows for the formation of a relatively thin first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the side of the second doped semiconductor portion 13 opposite to the semiconductor substrate, thereby reducing the influence of the field passivation effect of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the carrier collection efficiency of the second doped semiconductor portion 13.The length and height of the sides of the first uneven texture structure and the length and height of the sides of the second uneven texture structure can be determined according to the difference between the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer and the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15, and are not specifically limited thereto.

[0089] For example, the surface of the first doped semiconductor portion opposite to the semiconductor substrate may have an uneven texture structure, and the surface of the second doped semiconductor portion opposite to the semiconductor substrate may have a pyramidal texture structure.

[0090] For example, the surface of the first doped semiconductor portion opposite to the semiconductor substrate may have a first pyramidal texture structure, and the surface of the second doped semiconductor portion opposite to the semiconductor substrate may have a second pyramidal texture structure. Here, the side length of the first pyramidal texture structure may be smaller than the side length of the second pyramidal texture structure, and / or the height of the first pyramidal texture structure may be smaller than the height of the second uneven texture structure.

[0091] The doping concentration and thickness of the dopants in the first and second doped semiconductor sections can be set according to actual demand. As described above, the first sub-passivation layer included in the first dielectric passivation layer forms a superimposed electric field in the first doped semiconductor section, thereby improving the carrier collection efficiency of the first doped semiconductor section. The first sub-passivation layer included in the second dielectric passivation layer forms a reverse electric field in the second doped semiconductor section, affecting the carrier collection efficiency of the second doped semiconductor section. Furthermore, since the level of field passivation in the first and second doped semiconductor sections is affected by the doping concentration and thickness of the dopants within them, the doping concentration and thickness of the dopants in the first and second doped semiconductor sections can be determined according to the requirements for the level of field passivation in the first and second doped semiconductor sections in actual usage scenarios.

[0092] For example, the doping concentration of the dopant in the first doped semiconductor portion may be less than or equal to the doping concentration of the dopant in the second doped semiconductor portion. Here, when the doping concentration of the dopant in the second doped semiconductor portion is high, the electric field strength formed by the second doped semiconductor portion is greater. Therefore, the reverse electric field suppression effect of the field passivation function of the first sub-passivation layer contained in the second dielectric passivation layer can compensate for the difference in carrier collection capabilities between the second doped semiconductor portion and the first doped semiconductor portion, contributing to the realization of uniform collection of carriers of different conductivity types.

[0093] For example, the doping concentration of the dopant in the first doped semiconductor region is 6E19cm². -3 ~7E19cm -3 It may be the case that the doping concentration of the dopant in the second doped semiconductor region is 5E20cm². -3 ~6E20cm -3 Even if that's the case.

[0094] For example, as shown in Figure 4, the thickness of the first doped semiconductor portion 12 may be greater than or equal to the thickness of the second doped semiconductor portion 13. Here, if the thickness of the first doped semiconductor portion 12 is greater than the thickness of the second doped semiconductor portion 13, it contributes to an increase in the field passivation effect of the first doped semiconductor portion 12 on the corresponding area surface of the semiconductor substrate 11, further reducing the ratio of the PL brightness values ​​of the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the non-light-receiving surface side of the battery, thereby reducing the degree of differentiation of the passivation surface.

[0095] For example, the thickness of the first doped semiconductor portion may be 200 nm to 400 nm, and / or the thickness of the second doped semiconductor portion may be 100 nm to 300 nm.

[0096] Regarding the first dielectric passivation layer and the second dielectric passivation layer, from a material standpoint, the material of the first sub-passivation layer included in the first dielectric passivation layer and the material of the first sub-passivation layer included in the second dielectric passivation layer can be determined according to the conductivity type of their own fixed charge, and the conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, respectively, and the first sub-pa It is sufficient that the passivation layer has at least a field passivation function, where the material of the first sub-passivation layer included in the first dielectric passivation layer and the material of the first sub-passivation layer included in the second dielectric passivation layer may include a single-layer material or a multilayer material, and it is sufficient that at least one layer has the same type of fixed charge, and that the type of fixed charge of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same.

[0097] For example, the material of the first subpassivation layer or the second subpassivation layer may include at least one of the following materials: aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride.

[0098] For example, the first sub-passivation layer included in the first dielectric passivation layer or the second dielectric passivation layer may include a negatively charged dielectric passivation layer such as aluminum oxide, and the second sub-passivation layer may include a combination of one or more materials such as silicon nitride, silicon oxide, and silicon oxynitride, provided that the first dielectric passivation layer and the second dielectric passivation layer simultaneously possess chemical passivation and field passivation functions. Specifically, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second passivation layer may be a laminated structure composed of multiple passivation layers, and one passivation layer in the laminated structure may simultaneously possess chemical passivation and field passivation functions, or some passivation layers in the laminated structure may possess only chemical passivation functions or only field passivation functions. Taking the first sub-passivation layer included in the first dielectric passivation layer as an example, if the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer may include a silicon nitride layer provided on the side of the aluminum oxide layer opposite to the semiconductor substrate. To give a further example, if the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer may include a silicon oxynitride layer provided on the side of the aluminum oxide layer opposite to the semiconductor substrate. To give a further example, if the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer may include a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer that are sequentially stacked in the thickness direction of the battery.To give a further example, if the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include a silicon oxide layer and an aluminum oxide layer that are sequentially stacked in the thickness direction of the battery, and the second sub-passivation layer may include a silicon nitride layer that is sequentially stacked in the thickness direction of the battery.

[0099] Furthermore, the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer may be the same or different, and can be selected depending on the conductivity type of the first doped semiconductor portion. Specifically, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same, for example, the materials of these two first sub-passivation layers may each include a material having a negative fixed charge, such as aluminum oxide, or at least one of a material having a positive fixed charge, such as silicon oxide, silicon nitride, and silicon oxynitride. Next, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are different, if the conductivity type of the first doped semiconductor portion is P-type, these two first sub-passivation layers may be of different material types and each may be a material having a negative fixed charge. In this case, the second subpassivation layer may be at least one material selected from materials having a positive fixed charge, such as silicon oxide, silicon nitride, or silicon oxynitride. The second subpassivation layer can compensate for the weakening effect of the negatively fixed-charge material on the field passivation effect of the second doped semiconductor portion, and can provide a more suitable chemical passivation effect between the first doped semiconductor portion and the second doped semiconductor portion. If the conductivity type of the first doped semiconductor is N-type, these two first sub-passivation layers may be of different material types and each may be a material having a positive fixed charge. In addition to performing a field passivation effect, the first doped semiconductor and the second doped semiconductor can be provided with a more suitable chemical passivation effect. In this case, the material of the second sub-passivation layer may be selected from materials having a negative fixed charge, such as aluminum oxide. In this case, the second sub-passivation layer can compensate for the weakening effect of the positively fixed-charge material on the field passivation effect of the second doped semiconductor.

[0100] Here, when the material of the first sub-passivation layer contained in the first dielectric passivation layer and the material of the first sub-passivation layer contained in the second dielectric passivation layer are the same, it reduces the number of material types required to manufacture different structures of back contact batteries, improves compatibility between different structures, and contributes to improving the yield of back contact batteries.

[0101] Next, as shown in Figure 5, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 may be continuous as a single unit. In this case, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can be formed simultaneously in the same step using the same material, improving the manufacturing efficiency of back contact batteries and contributing to a reduction in the manufacturing cost of back contact batteries. Of course, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 may be manufactured using different operating steps, provided that the conductivity type of the first doped semiconductor portion 12 is opposite to the conductivity type of the fixed charge of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15, and that the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15.

[0102] For example, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second dielectric passivation layer include a hydrogen-containing passivation layer, thereby achieving chemical passivation of the corresponding doped semiconductor portion by hydrogen passivation, and reducing the number of defects on the side of the corresponding doped semiconductor portion opposite to the semiconductor substrate. For example, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second dielectric passivation layer may include at least one of film layers such as an aluminum oxide layer, a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer.

[0103] Specifically, of the first dielectric passivation layer and the second dielectric passivation layer, only the first sub-passivation layer included in the first dielectric passivation layer may be made into a hydrogen passivation layer, or only the first sub-passivation layer included in the second dielectric passivation layer may be made into a hydrogen passivation layer, or all of the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer may be made into hydrogen passivation layers.

[0104] For example, the local region of the hydrogen-containing passivation layer may have a microstructure. Here, as shown in Figures 8 and 9, at least one microstructure 18 may be a structure that bulges away from the semiconductor substrate 11, and / or, as shown in Figure 10, at least one microstructure 18 may be a microstructure 18 with a concave or bulging central part and cyclone-shaped edges. In this case, when at least one microstructure 18 is a structure that bulges away from the semiconductor substrate 11, there is a bulging containment space between the hydrogen-containing passivation layer with the microstructure 18 and the corresponding doped semiconductor portion, and hydrogen gas that generated the bulging structure is present in this containment space, indicating that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, thereby increasing its hydrogen passivation effect on the corresponding doped semiconductor layer and further reducing surface defects in the doped semiconductor layer. Next, the hydrogen gas within the expanded structure continuously supplies hydrogen ions in subsequent manufacturing or battery operation processes, enabling sustained hydrogen passivation to the corresponding doped semiconductor layer, thereby improving battery yield and extending battery life. Furthermore, when at least one microstructure 18 is concave or bulging in the center and has cyclone-shaped edges, it means that the hydrogen content in the hydrogen-containing passivation layer is higher. This ensures that there is a sufficient amount of hydrogen ions not used in hydrogen passivation, and after they are released from the hydrogen-containing passivation layer, film breakdown occurs in the microstructure 18. Thus, when the hydrogen-containing passivation layer includes such a microstructure 18, the hydrogen-containing passivation layer has a higher hydrogen passivation effect on the corresponding doped semiconductor layer. Furthermore, after film breakdown occurs, a microstructure 18 with irregularities can be formed on the side opposite to the semiconductor substrate 11 of the hydrogen-containing passivation layer, which reduces the reflectivity on the side opposite to the semiconductor substrate 11 of the hydrogen-containing passivation layer and contributes to improving its own light confinement effect.

[0105] Specifically, when only the first sub-passivation layer included in the first dielectric passivation layer contains a hydrogen-containing passivation layer, the local region of the first sub-passivation layer included in the first dielectric passivation layer may or may not have the above-mentioned microstructure. When only the first sub-passivation layer included in the second dielectric passivation layer contains a hydrogen-containing passivation layer, the local region of the first sub-passivation layer included in the second dielectric passivation layer may or may not have the above-mentioned microstructure. When the first sub-passivation layer included in both the first dielectric passivation layer and the second dielectric passivation layer each includes a hydrogen-containing passivation layer, the above-mentioned microstructure may be provided only in the first sub-passivation layer included in the first dielectric passivation layer, or only in the first sub-passivation layer included in the second dielectric passivation layer, or in each of the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer, or in neither of the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer.

[0106] For example, when both the first dielectric passivation layer and the second dielectric passivation layer contain a first sub-passivation layer which each contains a hydrogen-containing passivation layer, in order to satisfy the passivation demands of the two doped regions, the thickness of the first sub-passivation layer contained in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer contained in the second dielectric passivation layer. In this case, the local region of the first sub-passivation layer contained in the first dielectric passivation layer has the above-mentioned microstructure, and the first sub-passivation layer contained in the second dielectric passivation layer may or may not have the above-mentioned microstructure.

[0107] What can be understood here is that the greater the thickness and / or density of the hydrogen-containing passivation layer, the higher its own hydrogen content becomes, and the easier it is for it to form the above-mentioned microstructure by releasing hydrogen after being heated. Therefore, the distribution density of its own microstructure can be determined according to whether or not the first sub-passivation layer contained in the first dielectric passivation layer and the second dielectric passivation layer contains a hydrogen-containing passivation layer, and according to the thickness and density of both, and is not specifically limited here.

[0108] For example, as shown in Figures 6 and 7, when a microstructure 18 is provided in a local region of the first sub-passivation layer 21 included in at least the first dielectric passivation layer 14, the distribution density of the microstructure 18 provided in the first sub-passivation layer 21 included in the first dielectric passivation layer 14 may be greater than the distribution density of the microstructure 18 provided in the first sub-passivation layer 21 included in the second dielectric passivation layer 15. In this case, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is given greater thickness and / or higher film layer density (compared to the first sub-passivation layer 21 included in the second dielectric passivation layer 15), which contributes to ensuring that the first sub-passivation layer 21 included in the first dielectric passivation layer 14 has a high field passivation effect with respect to the first doped semiconductor layer. At the same time, the first sub-passivation layer 21 included in the second dielectric passivation layer 15 is given a small thickness and / or low film density, which reduces the influence of the field passivation function of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the carrier collection efficiency of the second doped semiconductor layer, thereby contributing to ensuring that the back contact battery has high operating efficiency.

[0109] Regarding the dimensions and height of the microstructure, if the hydrogen-containing passivation layer has the above microstructure, it indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, and therefore has a high chemical passivation effect on the corresponding doped semiconductor layer. Furthermore, due to the presence of the above microstructure, at least a portion of the microstructure area of ​​the hydrogen-containing passivation layer may not be able to contact the corresponding doped semiconductor layer, that is, at least a portion of the microstructure area of ​​the hydrogen-containing passivation layer may not be able to passivate the corresponding doped semiconductor layer. Therefore, the dimensions and height can be determined according to the requirements for the passivation effect of the hydrogen-containing passivation layer, the thickness and density of the hydrogen-containing passivation layer in the actual usage scenario, and are not specifically limited thereto.

[0110] For example, the dimensions of at least one microstructure may be 10 μm or more and 20 μm or less. For example, the dimensions of the microstructure may be 10 μm, 11 μm, 12 μm, 14 μm, 16 μm, 18 μm, or 20 μm, etc. In this case, as described above, if the dimensions of the microstructure are within the above range, it is possible to prevent the hydrogen content of the hydrogen-containing passivation layer from decreasing due to its small dimensions, and also to prevent the effective contact area between the hydrogen-containing passivation layer and the corresponding doped semiconductor layer from decreasing due to its large dimensions, thereby ensuring that the hydrogen-containing passivation layer has a high passivation effect on the corresponding doped semiconductor layer. Furthermore, because the first sub-passivation layer included in the second dielectric passivation layer includes a hydrogen-containing passivation layer, and the dimensions of the microstructure within the first sub-passivation layer included in the second dielectric passivation layer are large, the thickness of the first sub-passivation layer included in the second dielectric passivation layer also increases, thus preventing it from affecting the carrier collection efficiency of the second doped semiconductor.

[0111] For example, the height of at least one microstructure may be between 0.1 μm and 0.5 μm. For instance, the height of at least one microstructure may be 0.1 μm, 0.15 μm, 0.2 μm, 0.25 μm, 0.3 μm, 0.4 μm, or 0.5 μm, etc. The principle of applying the beneficial effect in this case is similar to the principle of applying the beneficial effect when the dimensions of the microstructure are between 10 μm and 20 μm, as described above, and a detailed explanation is omitted here.

[0112] For example, as shown in Figure 11, an anti-reflective structure 19 with irregularities (a region with slightly higher brightness in the figure) is formed in the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13 in the area corresponding to the microstructure 18. Specifically, if the microstructure 18 is provided in a local area of ​​the first doped semiconductor portion 12, the anti-reflective structure 19 may be formed in the area of ​​the first doped semiconductor portion 12 corresponding to the microstructure 18. And / or, if the microstructure 18 is provided in a local area of ​​the second doped semiconductor portion 13, the anti-reflective structure 19 may be formed in the area of ​​the second doped semiconductor portion 13 corresponding to the microstructure 18. The anti-reflective structure 19 may be formed when hydrogen is released from the corresponding passivation layer equipped with the microstructure 18, and the surface morphology of the portion of the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13 is affected by being pressed against hydrogen gas. In this case, the reflectivity of the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13 on the side opposite to the semiconductor substrate 11 decreases, refracting more light rays through the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13 into the semiconductor substrate 11, thereby contributing to improving the double-sided aspect ratio of the battery. The specific form of the anti-reflective structure 19 can be determined according to the actual manufacturing process and is not specifically limited herein. For example, the anti-reflective structure 19 may be a recessed structure in which the surface is recessed into the corresponding doped semiconductor portion.

[0113] The specific thicknesses of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be determined according to the material types, the requirements for field passivation and chemical passivation of the first dielectric passivation layer in the actual usage scenario, and the requirements for chemical passivation of the second dielectric passivation layer, and are not specifically limited thereto. Selectively, the thicknesses of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be selected within the range of 2 nm to 15 nm. Next, the first subpassivation layer may be an aluminum oxide layer. In this case, although the aluminum oxide layer formed by atomic layer deposition generally has a uniform thickness, winding coating of aluminum oxide material may occur at the edges of the battery. Therefore, one or two points corresponding to the first doped semiconductor portion and the second doped semiconductor portion in the central region of the battery can be selected and measured to compare the thicknesses of the two aluminum oxide layers formed in the first doped semiconductor portion and the second doped semiconductor portion.

[0114] For example, the thickness of the first sub-passivation layer included in the first dielectric passivation layer may be 4 nm or more and 15 nm or less. For example, the thickness of the first sub-passivation layer included in the first dielectric passivation layer may be 4 nm, 5 nm, 6 nm, 6.2 nm, 6.5 nm, 6.8 nm, 7 nm, 7.2 nm, 7.5 nm, 7.8 nm, 8 nm, 10 nm, 12 nm, or 15 nm, etc. In this case, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is relatively large, which can further enhance the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer with respect to the first doped semiconductor portion, further reducing the degree of differentiation in the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving surface side of the back-contact battery, and contributing to further improving the operating performance of the back-contact battery.

[0115] For example, the thickness of the first sub-passivation layer included in the second dielectric passivation layer may be 2 nm or more and 8 nm or less. For instance, the thickness of the first sub-passivation layer included in the second dielectric passivation layer may be 2 nm, 4 nm, 4.2 nm, 4.5 nm, 4.8 nm, 5 nm, 5.2 nm, 5.5 nm, 5.8 nm, 6 nm, 7 nm, or 8 nm. In this case, since the thickness of the first sub-passivation layer included in the second dielectric passivation layer is within the above range, it prevents the integrated passivation effect on the second doped semiconductor portion from being reduced due to the small thickness of the first sub-passivation layer included in the second dielectric passivation layer, and contributes to ensuring that the second doped semiconductor portion has fewer surface defects on the side opposite to the semiconductor substrate. Furthermore, the large thickness of the first sub-passivation layer contained in the second dielectric passivation layer prevents the degree to which the electric field of the second doped semiconductor is weakened by the field passivation effect of the first sub-passivation layer contained in the second dielectric passivation layer, thereby contributing to ensuring that the second doped semiconductor has high carrier collection efficiency.

[0116] As for the second sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer, in terms of materials, the material of the second sub-passivation layer included in the first dielectric passivation layer may be any passivation material different from the first sub-passivation layer included in the first dielectric passivation layer, and the second sub-passivation layer included in the first dielectric passivation layer may be a passivation layer that has only a chemical passivation function, or a passivation layer that has both a chemical passivation function and a field passivation function. Next, the material of the second sub-passivation layer included in the second dielectric passivation layer may be any passivation material different from the first sub-passivation layer included in the second dielectric passivation layer, and the second sub-passivation layer included in the second dielectric passivation layer may be a passivation layer that has only chemical passivation function, or a passivation layer that has both chemical passivation and field passivation function simultaneously.

[0117] Furthermore, the material of the second sub-passivation layer included in the first dielectric passivation layer and the material of the second sub-passivation layer included in the second dielectric passivation layer may be the same or different. Here, if the material of the second sub-passivation layer included in the first dielectric passivation layer and the material of the second sub-passivation layer included in the second dielectric passivation layer are the same, it reduces the number of material types required to manufacture different back-contact battery structures, improves compatibility between different structures, and contributes to improving the yield of back-contact batteries. Alternatively, the material of the second sub-passivation layer included in the first dielectric passivation layer may be different from the material of the second sub-passivation layer included in the second dielectric passivation layer.

[0118] Next, as shown in Figure 5, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 may be continuous as a single unit. In this case, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can be formed simultaneously in the same step using the same material, improving the manufacturing efficiency of back contact batteries and contributing to a reduction in the manufacturing cost of back contact batteries.

[0119] In terms of thickness, the thickness of the second sub-passivation layer included in the first dielectric passivation layer and the thickness of the second sub-passivation layer included in the second dielectric passivation layer can be determined according to the type of material and the requirements for the passivation effect of the different second sub-passivation layers in the actual usage scenario, and are not specifically limited thereto.

[0120] For example, the thickness of the second sub-passivation layer included in the first dielectric passivation layer may be equal to the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Alternatively, as shown in Figure 4, the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 may be less than the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15. In this case, by providing the second sub-passivation layer 22 included in the second dielectric passivation layer 15, which is thicker (compared to the second sub-passivation layer 22 included in the first dielectric passivation layer 14), on the first sub-passivation layer 21 included in the second dielectric passivation layer 15, which is thinner (compared to the first sub-passivation layer 21 included in the first dielectric passivation layer 14), the second dielectric is protected by the second sub-passivation layer 22 with greater thickness included in the second dielectric passivation layer 15. The first sub-passivation layer 21 included in the passivation layer 15 compensates for the weakening of the field passivation effect on the side of the second doped semiconductor portion 13 opposite to the semiconductor substrate 11, further reducing the number of surface defects on the side of the second doped semiconductor portion 13 opposite to the semiconductor substrate 11, thereby reducing the differentiation of the passivation effect between the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the non-light-receiving side of the back contact battery, and contributing to improving the operating performance of the back contact battery.

[0121] In the actual manufacturing process, as shown in Figure 5, if the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is smaller than the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15, and the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are continuous as a single unit, then different doping concentrations of the dopants in the first doped semiconductor portion 12 and the second doped semiconductor portion 13 can be used to achieve different deposition thicknesses of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15. For example, if we consider the case where both the second sub-passivation layer 22 contained in the first dielectric passivation layer 14 and the second sub-passivation layer 22 contained in the second dielectric passivation layer 15 are silicon nitride layers, then when the doping concentration of the dopant in the first doped semiconductor portion 12 is smaller than the doping concentration of the dopant in the second doped semiconductor portion 13, and the second sub-passivation layer 22 contained in the first dielectric passivation layer 14 and the second sub-passivation layer 22 contained in the second dielectric passivation layer 15 are formed simultaneously using the same material in the same step by a process such as plasma chemical vapor deposition, the corresponding electric field strengths of the first doped semiconductor portion 12 and the second doped semiconductor portion 13 are different, resulting in a smaller thickness for the second sub-passivation layer 22 contained in the first dielectric passivation layer 14 and a larger thickness for the second sub-passivation layer 22 contained in the second dielectric passivation layer 15.

[0122] Of course, the second sub-passivation layer contained in the first dielectric passivation layer and the second sub-passivation layer contained in the second dielectric passivation layer may be manufactured by adjusting different manufacturing parameters in different operating steps, provided that the thickness of the second sub-passivation layer contained in the first dielectric passivation layer is smaller than the thickness of the second sub-passivation layer contained in the second dielectric passivation layer.

[0123] The specific thickness and thickness difference between the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can be determined according to the requirements for the PL brightness value of the portion corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the non-light-receiving side of the back contact battery in actual usage scenarios, and are not specifically limited thereto.

[0124] For example, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer may be 0.5 nm or more and 5 nm or less. For example, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer may be 0.5 nm, 0.7 nm, 0.9 nm, 1 nm, 2 nm, 3 nm, 4 nm, or 5 nm, etc. In this case, since the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is within the above range, it is possible to prevent the chemical passivation effect of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer from becoming almost the same due to the small difference, and the second sub-passivation layer included in the second dielectric passivation layer ensures that the difference in field passivation effect between the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the non-light-receiving surface side can be compensated for. This large difference can prevent the thickness of the second sub-passivation layer contained in the first dielectric passivation layer from being too small, resulting in insufficient passivation effect of the second sub-passivation layer, or conversely, prevent the thickness of the second sub-passivation layer contained in the second dielectric passivation layer from being too large, thus contributing to reducing the manufacturing cost of the battery.

[0125] For example, the thickness of the second subpassivation layer may be between 50 nm and 160 nm. For instance, the thickness of the second subpassivation layer may be 50 nm, 55 nm, 60 nm, 65 nm, 67 nm, 70 nm, 71 nm, 73 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 135 nm, 136 nm, 142 nm, 145 nm, 146 nm, 148 nm, 150 nm, 152 nm, 156 nm, 158 nm, or 160 nm. In this case, since the thickness of the second subpassivation layer is within the above range, it prevents the passivation effect from being weakened due to a small thickness of the second subpassivation layer, ensures that the non-photosensitive side of the back contact battery has a low carrier recombination rate, and contributes to improving the operating performance of the back contact battery. Furthermore, it is possible to prevent the amount of materials consumed from increasing due to the large thickness of the second sub-passivation layer, thereby contributing to reducing the manufacturing cost of back-contact batteries. Here, when the thickness of the second sub-passivation layer included in the first dielectric passivation layer is smaller than the thickness of the second sub-passivation layer of the second dielectric passivation layer, the specific value of the thickness of the second sub-passivation layer corresponding to the two doped semiconductor portions can be set according to the actual demand and the above description.

[0126] For example, the thickness of the first subpassivation layer may be 2 nm or more and 15 nm or less, and at the same time, the thickness of the second subpassivation layer may be 50 nm or more and 160 nm or less. In this case, since the first subpassivation layer and the second subpassivation layer are matched and used within the above thickness range, the second subpassivation layer can more effectively balance the difference in field passivation effect caused by the first subpassivation layer between the two doped semiconductor portions, thereby reducing the difference in passivation effect between the two doped semiconductor portions.

[0127] For example, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer may be 0.9 or more and 1.1 or less, and / or the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer may be 52 nm or more and 175 nm or less.

[0128] For example, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer may be 0.9, 0.92, 0.95, 0.96, 1, 1.02, 1.05, 1.08, or 1.1, etc.

[0129] For example, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer may be 52nm, 55nm, 60nm, 70nm, 75nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 165nm, 170nm, or 175nm, etc.

[0130] When the above technical means are adopted, if the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is 0.9 or more and 1.1 or less, the thickness of the first dielectric passivation layer provided on the side opposite to the semiconductor substrate of the first doped semiconductor portion and the thickness of the second dielectric passivation layer provided on the side opposite to the semiconductor substrate of the second doped semiconductor portion are almost the same. This contributes to giving the first dielectric passivation layer and the second dielectric passivation layer almost the same integrated passivation effect, thereby further reducing the differentiation in the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving surface side of the back contact battery. Furthermore, since the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is appropriate. This prevents the passivation effect of the first dielectric passivation layer and / or the second dielectric passivation layer from weakening due to a small thickness, and also prevents the distribution density of microstructures within the first dielectric passivation layer and / or the second dielectric passivation layer from increasing or the amount of materials consumed from increasing due to a large thickness. This ensures high operating efficiency for the back contact battery and contributes to reducing the manufacturing cost of the battery.

[0131] Regarding the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer, the thickness of the first dielectric passivation layer may be equal to the thickness of the second dielectric passivation layer. Alternatively, the thickness of the first dielectric passivation layer may be less than the thickness of the second dielectric passivation layer. Here, since the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, when the thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer, this contributes to making the thickness of the second sub-passivation layer included in the first dielectric passivation layer less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. According to this, the principle of applying the beneficial effect when the thickness of the first dielectric passivation layer is smaller than the thickness of the second dielectric passivation layer can be explained by referring to the principle of applying the beneficial effect when the thickness of the second sub-passivation layer included in the first dielectric passivation layer is smaller than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, as described above, and a detailed explanation is omitted here. Furthermore, the difference in thickness between the first dielectric passivation layer and the second dielectric passivation layer can be determined according to the difference in thickness between the first sub-passivation layer and the second sub-passivation layer included in them, and is not specifically limited here.

[0132] Furthermore, when the thickness of the second sub-passivation layer included in the second dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the first dielectric passivation layer, this contributes to making the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer almost the same. In addition, it contributes to making the refractive indices of the portion corresponding to the first doped semiconductor and the portion corresponding to the second doped semiconductor on the non-light-receiving surface of the back-contact battery almost the same, thereby contributing to achieving uniform light absorption. According to this, the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer can be determined according to the requirements for the refractive indices of different regions on the non-light-receiving surface in actual usage scenarios. The magnitude of the refractive indices of the portion corresponding to the first doped semiconductor and the portion corresponding to the second doped semiconductor on the non-light-receiving surface of the back-contact battery can be determined according to actual demand and the material types of the first dielectric passivation layer and the second dielectric passivation layer.

[0133] For example, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer may be 0.9 or more and 1.1 or less, and / or the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer may be 2.0 or more and 2.2 or less.

[0134] For example, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer may be 0.9, 0.92, 0.95, 0.96, 1, 1.02, 1.05, 1.08, or 1.1, etc.

[0135] For example, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer may be 2.0, 2.01, 2.02, 2.03, 2.05, 2.08, 2.1, 2.12, 2.15, 2.18, or 2.2, etc.

[0136] When the above technical means are employed, if the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is between 0.9 and 1.1, the refractive indices of the first dielectric passivation layer and the second dielectric passivation layer are almost the same, which contributes to giving almost the same light refraction effect to the portion corresponding to the first dielectric passivation layer and the portion corresponding to the second dielectric passivation layer on the non-light-receiving side of the back contact battery, thereby contributing to the realization of uniform light absorption and ensuring the equilibrium of electrons and holes. Next, when the refractive indices of the first dielectric passivation layer and / or the second dielectric passivation layer are within the above range, the refractive indices of the first dielectric passivation layer and / or the second dielectric passivation layer exhibit a high refraction effect with respect to light rays, allowing more light rays to reach the semiconductor substrate due to the refractive indices of the first dielectric passivation layer and / or the second dielectric passivation layer, thereby contributing to improving the double-sided ratio of the battery.

[0137] For example, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer may be 0.01 or more and 0.1 or less. For example, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer may be 0.01, 0.02, 0.03, 0.05, 0.06, 0.08, or 0.1, etc. The principle of application of the beneficial effect in this case can be explained by referring to the principle of application of the beneficial effect when the refractive indices of the first dielectric passivation layer and the second dielectric passivation layer are almost the same, as described above, and a detailed explanation is omitted here.

[0138] In actual application, the PL luminance value refers to the light luminance emitted by the battery under light irradiation conditions. Since the magnitude of the PL luminance value is related to the passivation performance of the measurement area, it represents the integrated passivation effect of all film layers in the area corresponding to the first doped semiconductor portion or the area corresponding to the second doped semiconductor portion, for example, the integrated passivation effect including the tunnel passivation layer, doped semiconductor portion, and dielectric passivation layer. Specifically, under the same measurement conditions, a larger PL luminance value means that the passivation performance of this area is higher, and a smaller PL luminance value means that the passivation performance of this area is lower. According to this, the PL luminance value can be determined according to the requirements for the passivation effect of the first dielectric passivation layer and the second dielectric passivation layer in actual usage scenarios. Under the same measurement conditions, the corresponding PL luminance values ​​for the area corresponding to the second doped semiconductor portion and the area corresponding to the first doped semiconductor portion on the non-light-receiving side of the back contact battery are not specifically limited here.

[0139] For example, under the same measurement conditions, the corresponding PL luminance value of the portion corresponding to the second doped semiconductor portion 13 on the non-light-receiving surface side of the back contact battery may be greater than the corresponding PL luminance value of the portion corresponding to the first doped semiconductor portion 12.

[0140] It should be noted that the embodiments of the present invention do not specifically limit the conditions for measuring PL luminance values. The PL luminance value can be measured at the battery of the finished product. Specifically, the PL luminance is measured around the corresponding connection points (e.g., main grid or pad points) located above the first doped semiconductor portion and the second doped semiconductor portion in the finished battery, and on the outermost corresponding film layers. (For example, in a back-contact battery, if the first dielectric passivation layer and the second dielectric passivation layer are the outermost film layers on the first surface, it is necessary to measure the partial region adjacent to the corresponding connection points on the opposite side of the semiconductor substrate from the first and second dielectric passivation layers. Alternatively, the PL luminance may be measured at the outermost corresponding film layer after removing the conductive electrodes from the finished battery. Alternatively, the PL luminance can also be measured by manufacturing a special sample using a battery double-sided symmetrical sample manufacturing method. For example, the first doped semiconductor portion and the first dielectric passivation layer are provided symmetrically across the entire surface of two sides of the battery, or the second doped semiconductor portion and the second dielectric passivation layer are provided across the entire surface, and then the PL measurement is performed.)

[0141] When the above technical means are employed, if the corresponding PL luminance value of the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back contact battery is greater than the corresponding PL luminance value of the portion corresponding to the first doped semiconductor portion, the passivation performance of the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back contact battery provided in the embodiment of the present invention is higher than the passivation performance of the portion corresponding to the first doped semiconductor portion. In the above case, the PL luminance values ​​of the two regions simultaneously reflect not only the integrated effects of field passivation and chemical passivation, but also indirectly reflect the passivation effects of other film layers other than the first sub-passivation layer. Specifically, the passivation effects of the second dielectric passivation layer are greater than those of the first dielectric passivation layer, and the passivation of other film layers enhances the integrated passivation effect corresponding to the second doped semiconductor portion. This reduces the differentiation in the passivation effects between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-photosensitive side of the back-contact battery, simultaneously meeting the passivation needs of two doped semiconductor portions with different conductivity types. This results in low carrier recombination rates and high carrier isolation capabilities in both the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-photosensitive side of the back-contact battery, contributing to improved operating performance of the back-contact battery. Referring to Figure 13, the PL luminance measurement diagram of the finished structure of the back-contact battery provided in an embodiment of the present invention is shown in the figure. Here, the thick solid and dashed lines indicate the regions corresponding to a portion of the first doped semiconductor and the regions corresponding to the second doped semiconductor, respectively, enclosed in frames. As can be seen from the drawing, the PL luminance values ​​corresponding to these two regions on the back side of the finished battery are almost the same, and in this case, the passivation effects corresponding to these two regions on the back side of the finished battery are almost the same.

[0142] Furthermore, it is understandable that when the structure and material of the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer are different, the passivation effects of the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer may also be different. Therefore, under the same measurement conditions, the corresponding PL luminance values ​​for the portion corresponding to the second doped semiconductor portion and the corresponding PL luminance values ​​for the portion corresponding to the first doped semiconductor portion on the non-light-receiving surface side of the back contact battery may also be different. Accordingly, the PL luminance values ​​corresponding to the above two portions on the non-light-receiving surface can be determined according to the material of the first sub-passivation layer contained in the first dielectric passivation layer and the first sub-passivation layer contained in the second dielectric passivation layer, and the structure of the back contact battery, and are not specifically limited thereto.

[0143] For example, the first sub-passivation layer included in the first dielectric passivation layer is an aluminum oxide layer, and under measurement conditions of exposure time 0.2 s and light intensity 1 sun, the PL luminance value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer that is opposite to the semiconductor substrate may be 5000 or more. For example, when the first sub-passivation layer included in the first dielectric passivation layer is an aluminum oxide layer, and under measurement conditions of exposure time 0.2 s and light intensity 1 sun, the PL luminance value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer that is opposite to the semiconductor substrate may be 5000, 5500, 5800, 6000, 6500, 7000, 7500, 8000, or 9000, etc. In this case, the aluminum oxide layer contains a large amount of oxygen negative ions, forming a dense fixed negative charge at the interface between itself and the first doped semiconductor portion, and creating an internal electric field that shields minority carriers, thereby improving the carrier collection efficiency of the first doped semiconductor portion and strengthening the carrier isolation capability of the first doped semiconductor portion. Next, under measurement conditions of exposure time 0.2 s and light intensity 1 sun, when the PL brightness value corresponding to the side of the first sub-passivation layer contained in the first dielectric passivation layer that is opposite to the semiconductor substrate is 5000 or more, the presence of the first sub-passivation layer with a large thickness contained in the first dielectric passivation layer improves the field passivation effect on the first doped semiconductor portion, contributing to further reducing the differentiation of the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back contact battery.

[0144] For example, the first sub-passivation layer included in the second dielectric passivation layer may be an aluminum oxide layer, and under measurement conditions of exposure time 0.2 s and light intensity 1 sun, the PL luminance value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer that is opposite to the semiconductor substrate may be 16500 or more. For example, the first sub-passivation layer included in the second dielectric passivation layer may be an aluminum oxide layer, and under measurement conditions of exposure time 0.2 s and light intensity 1 sun, the PL luminance value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer that is opposite to the semiconductor substrate may be 16500, 16800, 17000, 18000, 20000, 22000, 24000, 28000, or 30000, etc. In this case, by performing chemical passivation using the first sub-passivation layer contained in the second dielectric passivation layer, the influence of its own field passivation function on the carrier collection efficiency of the second doped semiconductor portion can be reduced as much as possible, ensuring that the second doped semiconductor portion has high carrier isolation capability. This contributes to further reducing the differentiation in passivation effects between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-photosensitive side of the back contact battery.

[0145] For example, if both the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are aluminum oxide layers (under the same measurement conditions), the ratio of the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer that is not facing the semiconductor substrate, to the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer that is not facing the semiconductor substrate, may be 2.5 or more and 3.4 or less. For example, the above ratio may be 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, or 3.4. In this case, compared to the ratio (generally 3 or more and 4 or less) of the PL luminance value of the second doped semiconductor portion corresponding to the side opposite the semiconductor substrate of the first doped semiconductor portion, when the ratio of the PL luminance value of the first sub-passivation layer included in the second dielectric passivation layer corresponding to the side opposite the semiconductor substrate of the first sub-passivation layer included in the first dielectric passivation layer is 2.5 or more and 3.4 or less, the ratio between the above PL luminance values ​​is small. That is, the presence of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer contributes to reducing the differentiation of the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving side of the back contact battery, and contributes to achieving uniform passivation.

[0146] Furthermore, under the same measurement conditions, PL1 is defined as the ratio of the PL brightness value corresponding to the side of the second dielectric passivation layer opposite the semiconductor substrate to the PL brightness value corresponding to the side of the first dielectric passivation layer opposite the semiconductor substrate. Also, under the same measurement conditions, PL2 is defined as the ratio of the PL brightness value on the side of the fifth passivation layer opposite the semiconductor substrate to the PL brightness value on the side of the fourth passivation layer opposite the semiconductor substrate, with PL2 being smaller than PL1. In this case, by providing the fourth and fifth passivation layers with different thicknesses, the differentiation of the passivation effect between the portion corresponding to the first doped semiconductor and the portion corresponding to the second doped semiconductor on the non-light-receiving side of the back contact battery is further reduced.

[0147] It is understood that when the structure and material of the second sub-passivation layer contained in the first dielectric passivation layer and the second sub-passivation layer contained in the second dielectric passivation layer are different, the passivation effect of the second sub-passivation layer contained in the first dielectric passivation layer and the second sub-passivation layer contained in the second dielectric passivation layer may be different. Therefore, under the same measurement conditions, the corresponding PL luminance value of the portion corresponding to the second doped semiconductor portion and the corresponding PL luminance value of the portion corresponding to the first doped semiconductor portion on the non-light-receiving surface side of the back contact battery may also be different. Accordingly, the PL luminance values ​​corresponding to the above two portions on the non-light-receiving surface can be determined according to the material of the second sub-passivation layer contained in the first dielectric passivation layer and the second sub-passivation layer contained in the second dielectric passivation layer, and the structure of the back contact battery, and are not specifically limited thereto.

[0148] For example, when both the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are silicon nitride layers, PL2 may be between 1.62 and 1.9. For example, PL2 may be 1.62, 1.65, 1.7, 1.75, 1.8, 1.85, or 1.9. In this case, when the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are formed, the ratio of the PL brightness values ​​of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the non-light-receiving surface side of the battery can be further reduced, thereby decreasing the degree of differentiation in terms of passivation.

[0149] Selectively, under measurement conditions of exposure time 0.2 s and light intensity 1 sun, the corresponding PL luminance value of the portion corresponding to the first doped semiconductor on the non-light-receiving side of the back contact battery may be between 8000 and 25000.

[0150] Selectively, under measurement conditions of exposure time 0.2 s and light intensity 1 sun, the corresponding PL luminance value of the portion corresponding to the first doped semiconductor on the non-light-receiving side of the back contact battery may be between 20,000 and 45,000.

[0151] As one possible implementation, as shown in Figure 12, the back contact battery may further include a third passivation layer 20 provided on the second surface, wherein the thickness of the third passivation layer 20 is greater than the thickness of a portion of the first sub-passivation layer 21 included in the first dielectric passivation layer 14. In this case, the thicker third passivation layer 20 effectively chemically passivates the second surface side of the semiconductor substrate 11, reducing the number of surface defects and the carrier recombination rate on the second surface side.

[0152] Here, the material and thickness of the third passivation layer are not specifically limited in the embodiments of the present invention, and it is sufficient that the thickness of the third passivation layer is greater than the thickness of the first dielectric passivation layer. For example, the material of the third passivation layer may include at least one of aluminum oxide, silicon oxide, silicon nitride, and aluminum nitride.

[0153] In a second embodiment, as shown in Figure 14, an embodiment of the present invention provides a solar module equipped with a back-contact battery provided in the first embodiment and various implementations thereof.

[0154] Specifically, since the type of battery included in the solar module provided in the embodiment of the present invention is a back-contact battery, positive and negative connecting members for connecting different batteries in the solar module are provided on the back side of the battery, respectively. The solar module may also include a transparent cover plate, a first sealing film, a back-contact battery layer, a circuit connection layer, a second sealing film, and a back sheet, which are arranged in sequence.

[0155] Here, the material of the transparent cover plate may include at least one of tempered glass, highly transparent plastic, and silicone rubber. The materials of the first and second sealing films may be POE, EVA, PVB, or other materials. The back contact battery layer may include a plurality of back contact batteries distributed in an array, and the plurality of back contact batteries are connected via a circuit connection layer. The circuit connection layer may achieve electrical connection of different back contact batteries by connecting members in a string such as a ribbon, or the circuit connection layer may be a conductive backsheet, which includes a conductive circuit layer and an insulating material layer located between the conductive circuit layer and the back contact battery layer. Conductive windows are provided in the insulating material layer, and the connection structure of the back contact batteries is connected to the patterned conductive circuit layer via the conductive windows. To prevent the circuit connection layer from reacting with the external environment and to extend the service life of the solar module, the backsheet may be made of TPC, PET, TPT, CPC, or other materials.

[0156] The beneficial effects of the second aspect of the present invention and its various implementations can be found by referring to the analysis of the beneficial effects of the first aspect and its various embodiments, and are therefore omitted here.

[0157] The above description does not go into detail about the structure of each layer, etching, or other technical details. However, those skilled in the art should understand that layers, regions, etc., of a desired shape can be formed by various technical means. Furthermore, those skilled in the art can design methods that are not exactly the same as those described above to form the same structure. Also, although each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.

[0158] The above describes embodiments of the present invention. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present invention. The scope of the present invention is limited by the appended claims and equivalents. Those skilled in the art can make various substitutions and modifications without departing from the scope of the present invention, and all such substitutions and modifications will remain within the scope of the present invention. [Explanation of Symbols]

[0159] 11 Semiconductor substrates 12. First Doped Semiconductor Section 13. Second Doped Semiconductor Section 14. First Dielectric Passivation Layer 15. Second dielectric passivation layer 16. First Texture Structure 17. Second Texture Structure 18 Microstructure 19 Anti-reflection structure 20. Third Passivation Layer 21. First Subpassivation Layer 22 Second Subpassivation Layer 23. Interface Passivation Layer

Claims

1. The semiconductor substrate comprises a first doped semiconductor portion, a second doped semiconductor portion, a first dielectric passivation layer, and a second dielectric passivation layer, wherein the first doped semiconductor portion and the second doped semiconductor portion have opposite conductivity types, and each of the first dielectric passivation layer and the second dielectric passivation layer includes a first sub-passivation layer having a field passivation function, and the conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first sub-passivation layer. The semiconductor substrate has a first surface and a second surface facing each other, and in a direction parallel to the first surface, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the first surface. The first dielectric passivation layer covers the side of the first doped semiconductor portion opposite to the semiconductor substrate, the second dielectric passivation layer covers the side of the second doped semiconductor portion opposite to the semiconductor substrate, and the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. Each of the first dielectric passivation layer and the second dielectric passivation layer further includes a second subpassivation layer having a chemical passivation function, the second subpassivation layer is provided on the side of the first subpassivation layer opposite to the semiconductor substrate, the material of the second subpassivation layer included in the first dielectric passivation layer is different from the material of the first subpassivation layer included in the first dielectric passivation layer, and the material of the second subpassivation layer included in the second dielectric passivation layer is different from the material of the first subpassivation layer included in the second dielectric passivation layer. A back contact battery characterized in that, when the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, the doping concentration of the dopant in the first doped semiconductor portion is smaller than the doping concentration of the dopant in the second doped semiconductor portion.

2. The back contact battery according to claim 1, characterized in that, under the same measurement conditions, the corresponding PL brightness value of the portion corresponding to the second doped semiconductor portion on the non-light-receiving surface side of the back contact battery is greater than the corresponding PL brightness value of the portion corresponding to the first doped semiconductor portion, wherein the measurement conditions are an exposure time of 0.2 s and a light intensity of 1 sun.

3. The back contact battery according to claim 1, characterized in that the thickness of the first subpassivation layer is 2 nm or more and 15 nm or less.

4. The thickness of the second sub-passivation layer included in the first dielectric passivation layer is smaller than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, and / or The back contact battery according to claim 1, characterized in that the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is 0.5 nm or more and 5 nm or less.

5. The thickness of the second subpassivation layer is 50 nm or more and / or 160 nm or less, The back contact battery according to claim 1, characterized in that the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is 52 nm or more and 175 nm or less.

6. The thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer, and / or The back contact battery according to claim 1, characterized in that the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is 0.9 or more and 1.1 or less.

7. The surface reflectance of the first doped semiconductor portion on the side opposite to the semiconductor substrate is greater than the surface reflectance of the second doped semiconductor portion on the side opposite to the semiconductor substrate. The back contact battery according to claim 1, characterized in that the surface of the first doped semiconductor portion opposite to the semiconductor substrate has a first texture structure, the surface of the second doped semiconductor portion opposite to the semiconductor substrate has a second texture structure, and the one-dimensional dimensions of the first texture structure and the one-dimensional dimensions of the second texture structure are different.

8. When the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, The back contact battery according to claim 1, characterized in that the thickness of the first doped semiconductor portion is greater than the thickness of the second doped semiconductor portion.

9. The first sub-passivation layer included in the first dielectric passivation layer includes a hydrogen-containing passivation layer having a microstructure in a local region, When each of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer includes the hydrogen-containing passivation layer, The back contact battery according to claim 1, characterized in that the distribution density of the microstructure provided in the first sub-passivation layer included in the first dielectric passivation layer is greater than the distribution density of the microstructure provided in the first sub-passivation layer included in the second dielectric passivation layer.

10. The dimensions of at least one of the microstructures are 10 μm or more and 20 μm or less. The back contact battery according to claim 9, characterized in that and / or the height of at least one of the microstructures is 0.1 μm or more and 0.5 μm or less.

11. The first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are made of the same material. The back contact battery according to any one of claims 1 to 10, characterized in that and / or the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are continuous as a single unit.

12. The second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are made of the same material. The back contact battery according to claim 1, characterized in that and / or the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are continuous as a single unit.

13. A solar module characterized by comprising a back contact battery according to any one of claims 1 to 10 and 12.

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