Display devices and electronic equipment

Abstract

Provided is a display device having a high display quality. Provided is a highly reliable display device. Provided is a display device which has low power consumption and with which high definition can be achieved easily. Provided is a display device that combines a high display quality with high definition. Provided is a display device that has high contrast. This display device has: a display part that includes first to third pixels; and first to fourth wires. The second pixel is located, in a plan view, between the first pixel and the third pixel. The pixels each have a first subpixel and a second subpixel. The first wire imparts a first electric potential to the second subpixel included in the first pixel. The second wire imparts the first electric potential to the first subpixel included in the second pixel. The third wire imparts the first electric potential to the second subpixel included in the second pixel. The fourth wire imparts the first electric potential to the first subpixel included in the third pixel. The first wire and the second wire are located adjacent to each other. The third wire and the fourth wire are located adjacent to each other. The distance between the first wire and the second wire is shorter than the distance between the third wire and the fourth wire.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device. Another aspect of the present invention relates to a method for manufacturing a display device.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention disclosed herein include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, methods for driving them, or methods for manufacturing them. A semiconductor device refers to any device that can function by utilizing semiconductor properties. [Background technology]

[0003] In recent years, there has been a growing demand for higher resolution display panels. Examples of devices requiring high-resolution display panels include smartphones, tablet devices, and notebook computers. Furthermore, stationary display devices such as television sets and monitors also require higher resolution and greater detail. Among the devices demanding the highest resolution are those used for virtual reality (VR) and augmented reality (AR).

[0004] Furthermore, typical examples of display devices applicable to display panels include liquid crystal displays, light-emitting devices equipped with light-emitting elements such as organic EL (Electro Luminescence) elements and light-emitting diodes (LEDs), and electronic paper that displays information using electrophoretic methods.

[0005] For example, the basic structure of an organic EL element consists of a layer containing a light-emitting organic compound sandwiched between a pair of electrodes. By applying a voltage to this element, light can be obtained from the light-emitting organic compound. Because a display device using such an organic EL element does not require a backlight, which is necessary for liquid crystal displays and the like, it is possible to realize a thin, lightweight, high-contrast, and low-power display device. For example, an example of a display device using an organic EL element is described in Patent Document 1.

[0006] Patent document 2 discloses a display device for VR using an organic EL device. [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2002-324673 [Patent Document 2] International Publication No. 2018 / 087625 [Overview of the Initiative] [Problems that the invention aims to solve]

[0008] One aspect of the present invention aims to provide a display device with high display quality. One aspect of the present invention aims to provide a highly reliable display device. One aspect of the present invention aims to provide a display device with low power consumption. One aspect of the present invention aims to provide a display device that is easily made high-resolution. One aspect of the present invention aims to provide a display device that combines high display quality and high resolution. One aspect of the present invention aims to provide a display device with high contrast.

[0009] One aspect of the present invention aims to provide a display device having a novel configuration or a method for manufacturing a display device. One aspect of the present invention aims to provide a method for manufacturing the above-described display device with high yield. One aspect of the present invention aims to at least reduce at least one of the problems of the prior art.

[0010] Note that the description of these problems does not prevent the existence of other problems. One aspect of the present invention does not necessarily need to solve all of these problems. Other problems can be extracted from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problems

[0011] One aspect of the present invention includes a display unit, a first wiring, a second wiring, a third wiring, and a fourth wiring. The display unit includes a first pixel, a second pixel, and a third pixel. The second pixel is located between the first pixel and the third pixel in a plan view. The first pixel, the second pixel, and the third pixel each have a first sub-pixel and a second sub-pixel. The first wiring has a function of applying a first potential to the second sub-pixel of the first pixel. The second wiring has a function of applying a first potential to the first sub-pixel of the second pixel. The third wiring has a function of applying a first potential to the second sub-pixel of the second pixel. The fourth wiring has a function of applying a first potential to the first sub-pixel of the third pixel. The first wiring and the second wiring are adjacent to each other, the third wiring and the fourth wiring are adjacent to each other, and the distance between the first wiring and the second wiring is shorter than the distance between the third wiring and the fourth wiring.

[0012] In the above configuration, it is preferable that the first sub-pixel has a function of controlling light corresponding to a first color selected from red, green, and blue, and the second sub-pixel has a function of controlling light corresponding to a second color different from the first color among red, green, and blue.

[0013] Furthermore, in the above configuration, it is preferable to have a fifth wiring, a sixth wiring, a seventh wiring, and an eighth wiring, wherein the fifth wiring has the function of supplying a signal to the second sub-pixel of the first pixel, the sixth wiring has the function of supplying a signal to the first sub-pixel of the second pixel, the seventh wiring has the function of supplying a signal to the second sub-pixel of the second pixel, and the eighth wiring has the function of supplying a signal to the first sub-pixel of the third pixel, and preferably the first and second wirings are arranged between the fifth and sixth wirings in a plan view, and the third and fourth wirings are arranged between the seventh and eighth wirings in a plan view.

[0014] Furthermore, in the above configuration, it is preferable that the first pixel, the second pixel, and the third pixel are arranged in order along the direction of the first axis, the first to the eighth wiring each have a region extending along the direction of the second axis, and the first axis and the second axis are orthogonal.

[0015] Furthermore, in the above configuration, it is preferable that the display unit drive circuit, a ninth wire electrically connected to the display unit drive circuit, and a tenth wire electrically connected to the display unit drive circuit are provided, with the ninth wire and the tenth wire each functioning as scanning lines, the ninth wire having a first region that overlaps with the first pixel, and the tenth wire having a second region that overlaps with the second pixel and a third region that overlaps with the third pixel.

[0016] Furthermore, in the above configuration, the second sub-pixel of the first pixel has a first transistor, the first sub-pixel of the second pixel has a second transistor, the second sub-pixel of the second pixel has a third transistor, the first sub-pixel of the third pixel has a fourth transistor, one of the source and drain of the first transistor is electrically connected to the first wiring, one of the source and drain of the second transistor is electrically connected to the second wiring, one of the source and drain of the third transistor is electrically connected to the third wiring, one of the source and drain of the fourth transistor is electrically connected to the fourth wiring, the first wiring and the second wiring are arranged between the channel formation region of the first transistor and the channel formation region of the second transistor, and the third wiring and the fourth wiring are preferably arranged between the channel formation region of the second transistor and the channel formation region of the third transistor in a plan view.

[0017] Furthermore, in the above configuration, it is preferable that the display unit has a first light-emitting element, a second light-emitting element, a third light-emitting element, and a fourth light-emitting element, wherein the source and the other drain of the first transistor are electrically connected to the first light-emitting element, the source and the other drain of the second transistor are electrically connected to the second light-emitting element, the source and the other drain of the third transistor are electrically connected to the third light-emitting element, and the source and the other drain of the fourth transistor are electrically connected to the fourth light-emitting element.

[0018] Furthermore, in the above configuration, it is preferable that the display unit drive circuit, a ninth wire electrically connected to the display unit drive circuit, and a tenth wire electrically connected to the display unit drive circuit are provided, with the ninth wire and the tenth wire each functioning as scan lines, the ninth wire being electrically connected to the gate of the first transistor, and the tenth wire being electrically connected to the gates of the second transistor, the third transistor, and the fourth transistor, the first scan line having a first region superimposed on the first pixel, and the second scan line having a second region superimposed on the second pixel and a third region superimposed on the third pixel.

[0019] Furthermore, in the above configuration, it is preferable that the ninth wiring does not overlap with the second and third pixels, the tenth wiring does not overlap with the first pixel, and the ninth wiring and the tenth wiring do not come into contact with each other in the display section.

[0020] Furthermore, in the above configuration, the display unit drive circuit includes a first scan line drive circuit electrically connected to the ninth wiring and a second scan line drive circuit electrically connected to the tenth wiring, and it is preferable that the first scan line drive circuit and the second scan line drive circuit are provided on either side of the display unit.

[0021] Alternatively, one aspect of the present invention comprises a first pixel, a second pixel, a third pixel, a first wiring, a second wiring, and a third wiring, wherein the second pixel is located between the first and third pixels in a plan view, and the first, second, and third pixels each have a first sub-pixel, a second sub-pixel, and a third sub-pixel, respectively, the first sub-pixel having the function of controlling light corresponding to a first color selected from red, green, and blue, the second sub-pixel having the function of controlling light corresponding to a second color different from the first color among red, green, and blue, and the third sub-pixel The element has the function of controlling light corresponding to a third color different from the first and second colors among red, green, and blue; the first wiring has the function of applying a first potential to the third subpixel of the first pixel and the first subpixel of the second pixel; the second wiring has the function of applying a first potential to the third subpixel of the second pixel; the third wiring has the function of applying a first potential to the first subpixel of the third pixel; the second wiring and the third wiring are adjacent to each other, and the first wiring is wider than one or more of the second and third wirings in this display device.

[0022] Furthermore, in the above configuration, it is preferable that there be a fourth wire, a fifth wire, a sixth wire, and a seventh wire, wherein the fourth wire has the function of supplying a signal to the second sub-pixel of the first pixel, the fifth wire has the function of supplying a signal to the first sub-pixel of the second pixel, the sixth wire has the function of supplying a signal to the second sub-pixel of the second pixel, and the seventh wire has the function of supplying a signal to the first sub-pixel of the third pixel, the first wire is preferably positioned between the fourth wire and the fifth wire in a plan view, and the second and third wires are preferably positioned between the sixth wire and the seventh wire in a plan view.

[0023] Furthermore, in the above configuration, the second sub-pixel of the first pixel has a first transistor, the first sub-pixel of the second pixel has a second transistor, the second sub-pixel of the second pixel has a third transistor, the third pixel has a fourth transistor, one of the source and drain of the first transistor and one of the source and drain of the second transistor are electrically connected to the first wiring, one of the source and drain of the third transistor is electrically connected to the second wiring, one of the source and drain of the fourth transistor is electrically connected to the third wiring, the first wiring is arranged between the channel formation region of the first transistor and the channel formation region of the second transistor, and the second wiring and the third wiring are preferably arranged between the channel formation region of the second transistor and the channel formation region of the third transistor.

[0024] Alternatively, one aspect of the present invention is a method for manufacturing a display device having a display unit on a first substrate, comprising: a first step of forming n transistors (n is an integer of 2 or more) arranged in a matrix in a region that will become the display unit on the first substrate; a second step of forming a first conductive film on the n transistors; a third step of forming a photoresist on the first conductive film; a fourth step of transferring a desired pattern by exposing the photoresist on the region that will become the display unit; a fifth step of forming a desired pattern on the photoresist by developing the photoresist; a sixth step of removing a part of the first conductive film using the desired pattern to form n wirings; and arranging in a matrix on the n transistors. The method for manufacturing a display device comprises a seventh step of forming n light-emitting elements, n wires being electrically connected one-to-one with the n transistors, a fourth step of exposing the area to be the display unit by dividing it into multiple exposure areas, the first wire being formed by exposure in the first exposure area and the second wire being formed by exposure in the second exposure area, the first wire and the second wire being adjacent to each other, the first transistor being electrically connected to the first wire and the second transistor being electrically connected to the second wire, and the first wire and the second wire being positioned between the channel formation area of ​​the first transistor and the channel formation area of ​​the second transistor in a plan view.

[0025] Furthermore, in the above configuration, it is preferable that the n wires are electrically connected one-to-one to one of the sources and drains of the n transistors, and that the other of the sources and drains of the n transistors are electrically connected one-to-one to the n light-emitting elements, and that they are superimposed on each other in one-to-one relationships.

[0026] Furthermore, in the above configuration, it is preferable that each of the n light-emitting elements has an EL layer.

[0027] Furthermore, in the above configuration, it is preferable that the exposure process is performed such that an exposure region is formed at the connecting portion of a plurality of exposure regions that are adjacent to each other, where a portion of the adjacent exposure regions overlaps with each other. [Effects of the Invention]

[0028] According to one aspect of the present invention, a display device with high display quality can be provided. Furthermore, a highly reliable display device can be provided. Furthermore, a display device with low power consumption can be provided. Furthermore, a display device that is easily made high-resolution can be provided. Furthermore, a display device that combines high display quality and high resolution can be provided. Furthermore, a display device with high contrast can be provided.

[0029] Furthermore, according to one aspect of the present invention, a display device having a novel configuration or a method for manufacturing a display device can be provided. Also, a method for manufacturing the above-mentioned display device with a high yield can be provided. According to one aspect of the present invention, at least one of the problems of the prior art can be mitigated.

[0030] Furthermore, the description of these effects does not preclude the existence of other effects. Moreover, one aspect of the present invention does not necessarily have to possess all of these effects. Other effects can be extracted from the description in the specification, drawings, claims, etc. [Brief explanation of the drawing]

[0031] Figures 1A and 1B are perspective views illustrating an example of a display device configuration. Figures 2A and 2B are perspective views illustrating an example of a display device configuration. Figures 3A and 3B are block diagrams illustrating the display unit. Figures 4A and 4B are block diagrams illustrating the display unit. Figures 5A to 5K show examples of pixel configurations. Figures 6A and 6B are circuit diagrams showing examples of pixel configurations. Figures 7A and 7B are circuit diagrams showing examples of pixel configurations. Figures 8A and 8B show examples of the display unit configuration. Figures 9A to 9C show examples of the display unit configuration. Figures 10A and 10B show examples of the display unit configuration. Figures 11A and 11B show examples of pixel configurations. Figure 12 shows an example of a pixel configuration. Figure 13 is a circuit diagram showing an example of a display device configuration. Figures 14A and 14B show examples of the display unit configuration. Figure 15 shows an example of the display unit configuration. Figures 16A and 16B show examples of the display unit configuration. Figure 17 shows an example of the display unit configuration. Figures 18A and 18B show examples of the display unit configuration. Figures 19A and 19B show examples of the display unit configuration. Figure 20 shows an example of the display unit configuration. Figures 21A and 21B show examples of the display unit configuration. Figure 22 is a cross-sectional view illustrating an example of a display device configuration. Figure 23 is a cross-sectional view illustrating an example of the configuration of a display device. Figure 24 is a cross-sectional view illustrating an example of a display device configuration. Figures 25A and 25B are cross-sectional views illustrating an example of the configuration of a display element. Figures 26A to 26F show examples of the configuration of a light-emitting element. Figures 27A and 27B show examples of electronic devices. Figures 28A to 28D show examples of electronic devices. Figures 29A to 29F show examples of electronic devices. Figures 30A to 30F show examples of electronic devices. [Modes for carrying out the invention]

[0032] The embodiments will be described below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope thereof. Accordingly, the present invention shall not be construed as being limited to the contents of the following embodiments.

[0033] In the configuration of the invention described below, the same reference numerals are used in common across different drawings for identical parts or parts having similar functions, and repeated explanations are omitted. Furthermore, when referring to similar functions, the hatch patterns are the same, and reference numerals may not be assigned.

[0034] In the figures described herein, the size of each component, the thickness of the layers, or the area may be exaggerated for clarity. Therefore, the scale is not necessarily limited to those figures.

[0035] Furthermore, ordinal numbers such as "the first," "the second," etc., used in this specification are added to avoid confusion of constituent elements and do not imply any numerical limitation.

[0036] Furthermore, in this specification, the terms "film" and "layer" are interchangeable. For example, the terms "conductive layer" or "insulating layer" may be interchangeable with the terms "conductive film" or "insulating film."

[0037] In this specification, the term "EL layer" refers to a layer (also called a light-emitting layer) provided between a pair of electrodes of a light-emitting element and containing at least a light-emitting substance, or a laminate including a light-emitting layer.

[0038] In this specification, a display panel, which is one form of a display device, has the function of displaying (outputting) images or the like on its display surface. Therefore, a display panel is one form of an output device.

[0039] Furthermore, in this specification, a display panel on which a connector such as an FPC (Flexible Printed Circuit) or TCP (Tape Carrier Package) is attached, or on which an IC is mounted on the board using a COG (Chip On Glass) method, may be referred to as a display panel module, display module, or simply a display panel.

[0040] A light-emitting element according to one aspect of the present invention may have a layer containing a material with high hole injection properties, a material with high hole transport properties, a material with high electron transport properties, and a material with high electron injection properties, a bipolar material, and the like.

[0041] Furthermore, the light-emitting layer, as well as the layers containing materials with high hole injection, high hole transport, high electron transport, and high electron injection, bipolar materials, etc., may each contain inorganic compounds such as quantum dots or polymer compounds (oligomers, dendrimers, polymers, etc.). For example, quantum dots can be used in the light-emitting layer to function as a light-emitting material.

[0042] Furthermore, as quantum dot materials, colloidal quantum dot materials, alloy-type quantum dot materials, core-shell type quantum dot materials, and core-type quantum dot materials can be used. Materials containing element groups 12 and 16, 13 and 15, or 14 and 16 may also be used. Alternatively, quantum dot materials containing elements such as cadmium, selenium, zinc, sulfur, phosphorus, indium, tellurium, lead, gallium, arsenic, and aluminum may be used.

[0043] In this specification, devices fabricated using a metal mask or an FMM (Fine Metal Mask, a high-resolution metal mask) may be referred to as MM (Metal Mask) structured devices. Furthermore, in this specification, devices fabricated without using a metal mask or an FMM may be referred to as MML (Metal Maskless) structured devices.

[0044] In this specification, a structure in which different light-emitting layers are created or painted for each color of light-emitting device (here, blue (B), green (G), and red (R)) may be referred to as an SBS (Side By Side) structure. Also, in this specification, a light-emitting device capable of emitting white light may be referred to as a white light-emitting device. A white light-emitting device can be combined with a colored layer (for example, a color filter) to realize a full-color display device.

[0045] Furthermore, light-emitting devices can be broadly classified into single structures and tandem structures. A single-structure device has one light-emitting unit between a pair of electrodes, and it is preferable that the light-emitting unit includes one or more light-emitting layers. When obtaining white light emission using two light-emitting layers, the light-emitting layers should be selected such that the light-emitting colors of each of the two layers are complementary colors. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary colors, a configuration that emits white light as a whole can be obtained. Also, when obtaining white light emission using three or more light-emitting layers, the light-emitting device should be configured so that the light-emitting colors of the three or more layers combine to emit white light as a whole.

[0046] A tandem device preferably has multiple light-emitting units between a pair of electrodes, and each light-emitting unit preferably includes one or more light-emitting layers. To obtain white light emission, the light from the light-emitting layers of the multiple light-emitting units should be combined to produce white light emission. The configuration for obtaining white light emission is the same as for a single-structure device. In a tandem device, it is preferable to provide an intermediate layer, such as a charge-generating layer, between the multiple light-emitting units.

[0047] Furthermore, when comparing the aforementioned white light-emitting devices (single or tandem structure) with SBS structure light-emitting devices, SBS structure light-emitting devices can consume less power than white light-emitting devices. If you want to keep power consumption low, it is preferable to use SBS structure light-emitting devices. On the other hand, white light-emitting devices are preferable because their manufacturing process is simpler than that of SBS structure light-emitting devices, which can lead to lower manufacturing costs or higher manufacturing yields.

[0048] (Embodiment 1) This embodiment describes an example of the configuration of a display device according to one aspect of the present invention, and an example of a method for manufacturing the display device.

[0049] One aspect of the present invention is a display device having light-emitting elements (also called light-emitting devices). The display device has two light-emitting elements that emit light of at least different colors. Each light-emitting element has a pair of electrodes and an EL layer between them. As the light-emitting elements, electroluminescent elements such as organic EL elements and inorganic EL elements can be used. In addition, light-emitting diodes (LEDs) can be used. In one aspect of the present invention, the light-emitting element is preferably an organic EL element (organic electroluminescent element). The two or more light-emitting elements that emit different colors each have an EL layer containing a different material. For example, a full-color display device can be realized by having three types of light-emitting elements that emit red (R), green (G), or blue (B) light, respectively.

[0050] When differentiating EL layers between light-emitting elements of different colors, it is known that they are formed by a vapor deposition method using a shadow mask such as a metal mask. However, with this method, deviations from the design occur in the shape and position of the island-like organic film due to various factors such as the precision of the metal mask, the misalignment between the metal mask and the substrate, the deflection of the metal mask, and the spreading of the contour of the deposited film due to vapor scattering, making it difficult to achieve high resolution and high aperture ratio. In addition, dust may be generated during vapor deposition due to material adhering to the metal mask. Such dust may cause pattern defects in the light-emitting elements. There is also a possibility of short circuits caused by the dust. Furthermore, a cleaning process for the material adhering to the metal mask is required. For this reason, measures have been taken to artificially increase resolution (also called pixel density) by applying special pixel arrangement methods such as PenTile arrangement.

[0051] One aspect of the present invention involves processing the EL layer into a fine pattern without using a shadow mask such as a metal mask. This makes it possible to realize a display device with high resolution and a high aperture ratio, which has been difficult to achieve until now. Furthermore, because the EL layer can be differentiated, it is possible to realize a display device with extremely vivid colors, high contrast, and high display quality.

[0052] Here, for ease of understanding, we will explain the case where the EL layers of two-color light-emitting elements are fabricated separately. First, the first EL film and the first sacrificial film are stacked and formed, covering the pixel electrodes. Next, a resist mask is formed on the first sacrificial film. Then, using the resist mask, a portion of the first sacrificial film and a portion of the first EL film are etched to form the first EL layer and the first sacrificial layer on the first EL layer.

[0053] Next, a second EL film and a second sacrificial film are laminated together. Then, using a resist mask, a portion of the second sacrificial film and a portion of the second EL film are etched to form a second EL layer and a second sacrificial layer on the second EL layer. Next, using the first and second sacrificial layers as masks, the pixel electrodes are processed to form a first pixel electrode superimposed on the first EL layer and a second pixel electrode superimposed on the second EL layer. In this way, the first and second EL layers can be created separately. Finally, by removing the first and second sacrificial layers and forming a common electrode, two-color light-emitting elements can be created separately.

[0054] Furthermore, by repeating the above process, it is possible to create EL layers with three or more light-emitting elements, thereby realizing a display device with three or four or more light-emitting elements.

[0055] At the edges of the EL layer, a step difference occurs due to the presence of pixel electrodes and the EL layer in one area and the absence of pixel electrodes and the EL layer in another. When forming a common electrode on the EL layer, the step difference at the edge of the EL layer may result in poor coverage of the common electrode, raising concerns about the common electrode being chipped. Furthermore, there is a concern that the common electrode will become thinner, leading to an increase in electrical resistance.

[0056] Furthermore, when the edges of the pixel electrodes are roughly aligned with the edges of the EL layer, and when the edges of the pixel electrodes are located outside the edges of the EL layer, a short circuit may occur between the common electrode and the pixel electrode when forming a common electrode on the EL layer.

[0057] One aspect of the present invention involves providing an insulating layer between the first EL layer and the second EL layer, thereby reducing the surface irregularities on which the common electrode is provided. This improves the coverage of the common electrode at the edges of the first EL layer and the second EL layer, enabling good conductivity of the common electrode. Furthermore, it suppresses short circuits between the common electrode and the pixel electrode.

[0058] When EL layers of different colors are adjacent, it is difficult to reduce the spacing between adjacent EL layers to less than 10 μm using, for example, a formation method using a metal mask. However, with the method described above, the spacing can be narrowed to 3 μm or less, 2 μm or less, or even 1 μm or less. For example, by using an exposure apparatus for LSIs, the spacing can be narrowed to 500 nm or less, 200 nm or less, 100 nm or less, and even 50 nm or less. This significantly reduces the area of ​​the non-emitting region that may exist between two light-emitting elements, making it possible to approach an aperture ratio of 100%. For example, an aperture ratio of 50% or more, 60% or more, 70% or more, 80% or more, and even 90% or more, can be achieved, and even less than 100%.

[0059] Furthermore, the pattern of the EL layer itself can be made extremely small compared to when a metal mask is used. Also, for example, when a metal mask is used to create different EL layers, variations in thickness occur between the center and edges of the pattern, so the effective area that can be used as an emitting region is small relative to the total area of ​​the pattern. On the other hand, with the above manufacturing method, the pattern is formed by processing a film deposited to a uniform thickness, so the thickness can be made uniform within the pattern, and even if the pattern is fine, almost the entire area can be used as an emitting region. Therefore, with the above manufacturing method, it is possible to achieve both high resolution and a high aperture ratio.

[0060] Thus, the above manufacturing method makes it possible to realize a display device that integrates fine light-emitting elements. Therefore, there is no need to apply special pixel arrangement methods such as the pentile method to artificially increase the resolution. Thus, it is possible to realize a display device with a resolution of 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or even 5000 ppi or more, using a so-called stripe arrangement in which R, G, and B are each arranged in one direction.

[0061] [Example of a display device configuration] The following describes an example of the configuration of a display device according to one aspect of the present invention.

[0062] Figure 1A is a schematic perspective view of a semiconductor device 100A according to one aspect of the present invention. The semiconductor device 100A comprises a layer 30 and a sealing substrate 40 on the layer 30. The semiconductor device 100A has a display unit 31, which is composed of a region 31a provided on the layer 30 and a layer 60. Region 31a has a plurality of pixel circuits arranged in a matrix. The layer 30 comprises region 31a, and layer 60 is provided between the sealing substrate 40 and region 31a. In Figure 1B, the layers 30, layer 60, and sealing substrate 40 are shown separated to make the configuration of the semiconductor device 100A shown in Figure 1A easier to understand.

[0063] The semiconductor device 100A has a display drive circuit 23. In the configuration shown in Figure 1A, the display drive circuit 23 has a circuit section 23a and a circuit section 23b.

[0064] In Figure 1A, layer 30 has a circuit section 23a and a terminal section 29. An FPC (Flexible Printed Circuit) 29a is electrically connected to the terminal section 29, and the circuit section 23b is arranged on the FPC 29a.

[0065] Layer 60 is provided superimposed on the region 31a of layer 30. Layer 60 is equipped with a plurality of light-emitting elements 61, and the luminescence of each of the plurality of light-emitting elements 61 is controlled by each of the plurality of pixel circuits 51 provided in region 31a. The pixel circuits 51 and the light-emitting elements 61 will be described later.

[0066] Circuit section 23a functions, for example, as a scan line driving circuit. Circuit section 23b functions, for example, as a signal line driving circuit.

[0067] Figure 2A shows a configuration in which the semiconductor device 100A has a layer 20.

[0068] The semiconductor device 100A shown in Figure 2A comprises a layer 20, a layer 30, and a sealing substrate 40 on layer 30. The semiconductor device 100A has a display unit 31, which is composed of a region 31a provided on layer 30 and a layer 60. Region 31a has a plurality of pixel circuits arranged in a matrix. Layer 30 comprises region 31a, and layer 60 is provided between the sealing substrate 40 and region 31a. In Figure 2B, layers 20, 30, 60, and the sealing substrate 40 are shown separated to make the configuration of the semiconductor device 100A shown in Figure 2A easier to understand.

[0069] Layer 20 includes a display drive circuit 23 and a terminal section 29.

[0070] The display unit drive circuit 23 is electrically connected to the display unit 31 and has the function of supplying image data to the pixel circuit of the display unit 31. Various circuits such as shift registers, level shifters, inverters, latches, analog switches, or logic circuits can be used in the display unit drive circuit 23.

[0071] The layer 20 preferably has a transistor made of a single-crystal semiconductor substrate such as a single-crystal silicon substrate.

[0072] By stacking the display drive circuit 23 with the display unit 31, the semiconductor device 100A can be miniaturized. Furthermore, by stacking the display drive circuit 23 with the display unit 31, the width of the bezel around the display unit 31 can be made extremely narrow, thereby increasing the area of ​​the display unit 31. As a result, the resolution of the display unit 31 can be increased. Consequently, the display quality of the semiconductor device 100A can be improved.

[0073] Furthermore, if the resolution of the display unit 31 is constant, the area occupied per pixel can be increased. Therefore, the luminescence brightness of the display unit 31 can be increased. Also, the aperture ratio of the pixels can be increased. For example, the aperture ratio of the pixels can be set to 40% or more and less than 100%, preferably 50% or more and 95%, and more preferably 60% or more and 95%. In addition, by increasing the area occupied per pixel, the current density supplied to the pixels can be reduced. Therefore, the load on the pixels is reduced, and the reliability of the semiconductor device 100A can be increased.

[0074] Furthermore, by stacking the display drive circuit 23 with the pixel circuit of the display unit 31, the wiring connecting them electrically can be shortened. As a result, wiring resistance and parasitic capacitance are reduced, and the operating speed of the semiconductor device 100A can be increased. In addition, the power consumption of the semiconductor device 100A is reduced.

[0075] Figure 3A is a block diagram illustrating the display drive circuit 23 and the display unit 31.

[0076] The display unit drive circuit 23 includes a first drive circuit 232 and a second drive circuit 233. The circuits included in the first drive circuit 232 function, for example, as a scan line drive circuit. The circuits included in the first drive circuit 232 function, for example, as a signal line drive circuit. Note that some circuit may be provided at a position facing the first drive circuit 232 across the display unit 31. Similarly, some circuit may be provided at a position facing the second drive circuit 233 across the display unit 31.

[0077] The display unit drive circuit 23 is sometimes referred to as the "peripheral drive circuit." Various circuits such as shift registers, level shifters, inverters, latches, analog switches, and logic circuits can be used in the peripheral drive circuit. Transistors and capacitive elements can also be used in the peripheral drive circuit.

[0078] The display unit 31 also includes m wires 236, each arranged substantially parallel to the other and whose potential is controlled by a circuit included in the first drive circuit 232; n wires 237, each arranged substantially parallel to the other and whose potential is controlled by a circuit included in the second drive circuit 233; and a plurality of pixels Px arranged in a matrix. The wires 236 are electrically connected to the first drive circuit 232. The wires 237 are electrically connected to the second drive circuit 233. Each of the plurality of pixels Px is electrically connected, for example, to one of the m wires 236. Also, each of the plurality of pixels Px is electrically connected, for example, to one of the n wires 237.

[0079] As shown in Figure 3B, the display unit drive circuit 23 may also have a protection circuit 55. In the configuration shown in Figure 3B, an example is shown in which the protection circuit 55 is provided between the second drive circuit 233 and the display unit 31. Although not shown, a protection circuit may also be provided between the first drive circuit 232 and the display unit 31.

[0080] Furthermore, as shown in Figure 4A, a configuration may be used in which the pixels Px arranged in a matrix have pixels Px in which the position of the wiring 237 is reversed left to right.

[0081] Furthermore, Figures 4A and 4B show an example in which the first drive circuit 232 is arranged on both sides of the display unit 31. The first drive circuit 232 arranged on the left side may be called the first drive circuit 232a, and the first drive circuit 232 arranged on the right side may be called the first drive circuit 232b. When the first drive circuits 232 are arranged on both sides of the display unit 31, as shown in Figure 4B, the wiring 236 electrically connected to the first drive circuit 232a and the wiring 236 electrically connected to the first drive circuit 232b may be separated. In such a case, for example, exposure should be performed so that the area of ​​pixels Px electrically connected to the first drive circuit 232a and the area of ​​pixels Px electrically connected to the first drive circuit 232b become the boundary of the area of ​​segmented exposure described later.

[0082] In the display unit 31, for example, a pixel Px having a light-emitting element that emits red light, a pixel Px having a light-emitting element that emits green light, and a pixel Px having a light-emitting element that emits blue light can be combined and function as a single pixel 11, and full-color display can be achieved by controlling the amount of light emitted (luminescence) of each pixel Px. Therefore, each of these three pixels Px functions as a sub-pixel. That is, each of the three sub-pixels controls the amount of light emitted, etc., of red light, green light, or blue light (see Figure 5A). Note that the color of light controlled by each of the three sub-pixels is not limited to a combination of red (R), green (G), and blue (B), but may also be cyan (C), magenta (M), and yellow (Y) (see Figure 5B). Also, the areas of each of the three sub-pixels do not have to be the same. If the luminous efficiency and reliability differ depending on the emitted color, the area of ​​the sub-pixel may be changed for each emitted color (see Figure 5C). Pixel 11, shown in Figure 5(C), has subpixel B spanning the top row (1st row) and bottom row (2nd row) of the first column, subpixel R in the top row (1st row) of the second column, and subpixel G in the bottom row (2nd row) of the second column. The arrangement of subpixels shown in Figure 5C may also be referred to as an "S-stripe arrangement."

[0083] Figure 5D shows an example of a pixel 11 having sub-pixel G with a roughly trapezoidal top surface shape with rounded corners, sub-pixel R with a roughly triangular top surface shape with rounded corners, and sub-pixel B with a roughly quadrilateral or hexagonal top surface shape with rounded corners. Furthermore, sub-pixel G has a larger light-emitting area than sub-pixel R. Thus, the shape and size of each sub-pixel can be determined independently. For example, sub-pixels with more reliable light-emitting devices can be made smaller. For example, sub-pixel R may be a red sub-pixel, sub-pixel G a green sub-pixel, and sub-pixel B a blue sub-pixel.

[0084] A delta array is applied to pixels 11_1 and 11_2 shown in Figure 5E. Pixel 11_1 has two subpixels (subpixels R and G) in the top row (row 1) and one subpixel (subpixel B) in the bottom row (row 2). Pixel 11_2 has one subpixel (subpixel B) in the top row (row 1) and two subpixels (subpixels R and G) in the bottom row (row 2). Figure 5F shows an example where each subpixel has a roughly quadrilateral top shape with rounded corners, but each subpixel may have, for example, a circular top shape.

[0085] Alternatively, the Pentile arrangement shown in Figure 5F may be used.

[0086] Furthermore, the arrangement of each subpixel, for example, subpixels R, G, and B, may be swapped with each other.

[0087] Alternatively, the four subpixels may be combined and function as a single pixel. For example, a subpixel controlling white light may be added to the three subpixels that control red, green, and blue light respectively (see Figure 5G). By adding a subpixel that controls white light, the brightness of the display area can be increased.

[0088] Figure 5G shows an example in which four subpixels, R, G, B, and W, each having a roughly square shape, are arranged in a matrix, with two subpixels (subpixels R and G) in the top row (row 1) and two subpixels (subpixels B and W) in the bottom row (row 2).

[0089] Furthermore, as shown in Figure 5H, the four subpixels R, G, B, and W may be arranged in a stripe pattern. Alternatively, as shown in Figure 5I, the upper row (first row) may have subpixels R, G, and B arranged in a stripe pattern, and the lower row (second row) may have one subpixel W in each column.

[0090] Furthermore, a subpixel to control yellow light may be added to the three subpixels that control red, green, and blue light respectively (see Figure 5J). Alternatively, a subpixel to control white light may be added to the three subpixels that control cyan, magenta, and yellow light respectively (see Figure 5K).

[0091] By increasing the number of subpixels that function as a single pixel, and by appropriately combining subpixels that control light such as red, green, blue, cyan, magenta, and yellow, the reproduction of midtones can be improved. Therefore, color reproduction can be enhanced.

[0092] Furthermore, a display device according to one aspect of the present invention can reproduce a variety of color gamuts. For example, it can reproduce color gamuts such as the PAL (Phase Alternating Line) and NTSC (National Television System Committee) standards used in television broadcasting, the sRGB (standard RGB) and Adobe RGB standards widely used in display devices for electronic devices such as personal computers, digital cameras, and printers, the ITU-R BT.709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) standard used in HDTV (High Definition Television), the DCI-P3 (Digital Cinema Initiatives P3) standard used in digital cinema projection, and the ITU-R BT.2020 (REC.2020 (Recommendation 2020)) standard used in UHDTV (Ultra High Definition Television).

[0093] Furthermore, by arranging the pixels 11 in a 1920 x 1080 matrix, a display unit 31 capable of full-color display at a resolution known as Full HD (also called "2K resolution," "2K1K," or "2K"). Also, for example, by arranging the pixels 11 in a 3840 x 2160 matrix, a display unit 31 capable of full-color display at a resolution known as Ultra HD (also called "4K resolution," "4K2K," or "4K"). Also, for example, by arranging the pixels 11 in a 7680 x 4320 matrix, a display unit 31 capable of full-color display at a resolution known as Super Hi-Vision (also called "8K resolution," "8K4K," or "8K"). By increasing the number of pixels 11, it is also possible to realize a display unit 31 capable of full-color display at 16K and 32K resolutions.

[0094] Furthermore, the pixel density (resolution) of the display unit 31 is preferably 1000 ppi or more and 10000 ppi or less. For example, it may be 2000 ppi or more and 6000 ppi or less, or 3000 ppi or more and 5000 ppi or less.

[0095] There are no particular limitations on the aspect ratio of the display unit 31. The display unit 31 of the semiconductor device 100A can support various aspect ratios, such as 1:1 (square), 4:3, 16:9, and 16:10.

[0096] When the semiconductor device 100A is used as a display device for xR, the diagonal size of the display unit 31 can be 0.1 inches or more and 5.0 inches or less, preferably 0.5 inches or more and 2.0 inches or less, and more preferably 1 inch or more and 1.7 inches or less. For example, the diagonal size of the display unit 31 may be 1.5 inches or close to 1.5 inches.

[0097] Figure 6A shows an example of the circuit configuration of a pixel Px. The pixel Px comprises a pixel circuit 51 and a light-emitting element 61.

[0098] The pixel circuit 51 shown as an example in Figure 6A comprises transistors 52A, 52B, 52C, and capacitor 53. Transistors 52A, 52B, and 52C can be composed of transistors having an oxide semiconductor in the channel formation region (hereinafter also referred to as "OS transistors"). Each of the OS transistors 52A, 52B, and 52C preferably has a back gate electrode. In this case, the back gate electrode can be configured to receive the same signal as the gate electrode, or to receive a different signal from the gate electrode.

[0099] Transistor 52B comprises a gate electrode electrically connected to transistor 52A, a first terminal electrically connected to the light-emitting element 61, and a second terminal electrically connected to wiring ANO. Wiring ANO is a wire that provides a potential for supplying current to the light-emitting element 61.

[0100] Transistor 52A includes a first terminal electrically connected to the gate electrode of transistor 52B, a second terminal electrically connected to wiring SL which functions as a source line, and a gate electrode that has the function of controlling a conduction state or a non-conduction state based on the potential of wiring GL1 which functions as a gate line.

[0101] Transistor 52C includes a first terminal electrically connected to wiring V0, a ​​second terminal electrically connected to the light-emitting element 61, and a gate electrode that controls the conduction or non-conduction state based on the potential of wiring GL2, which functions as a gate wire. Wiring V0 is a wire for supplying a reference potential and a wire for outputting the current flowing through the pixel circuit 51 to the display unit drive circuit 23.

[0102] Capacitor 53 comprises a conductive film electrically connected to the gate electrode of transistor 52B and a conductive film electrically connected to the second electrode of transistor 52C.

[0103] The light-emitting element 61 comprises a first electrode electrically connected to the first electrode of the transistor 52B, and a second electrode electrically connected to the wiring VCOM. The wiring VCOM is a wire that provides a potential for supplying current to the light-emitting element 61.

[0104] This allows the intensity of light emitted by the light-emitting element 61 to be controlled according to the image signal applied to the gate electrode of transistor 52B. In addition, variations in the gate-source potential of transistor 52B can be suppressed by the reference potential of the wiring V0 provided via transistor 52C.

[0105] Furthermore, the wiring V0 can output a current value that can be used to set pixel parameters. More specifically, wiring V0 can function as a monitor line to output the current flowing through transistor 52B or the current flowing through light-emitting element 61 to the outside. The current output to wiring V0 may be converted to a voltage by a source follower circuit or the like.

[0106] In one aspect of the present invention, the light-emitting element described refers to a self-emissive display element such as an organic light-emitting diode (OLED). The light-emitting element electrically connected to the pixel circuit can be a self-emissive light-emitting element such as an LED (light-emitting diode), micro-LED, QLED (quantum-dot light-emitting diode), or semiconductor laser.

[0107] The pixel Px shown in Figure 6B has, in addition to the components shown in Figure 6A, a transistor 52D and wiring GL3. Transistor 52D can be an OS transistor. When transistor 52D is an OS transistor, it is preferable that it has a back gate electrode, in which case the back gate electrode can be configured to receive the same signal as the gate electrode, or a different signal from the gate electrode.

[0108] Transistor 52D includes a gate electrode electrically connected to wiring GL3, a first terminal electrically connected to the first terminal of transistor 52A, and a second terminal electrically connected to wiring V0.

[0109] The pixel Px shown in Figure 7A has transistors 52A, 52B, 52C, 52D, capacitors 53A, and capacitor 53B.

[0110] The pixel Px shown in Figure 7A differs from that in Figure 6B in the arrangement of transistor 52D. Transistor 52D is positioned between transistor 52B and wiring ANO. The gate electrode of transistor 52D is electrically connected to wiring GL3, the first terminal of transistor 52D is electrically connected to the second terminal of transistor 52B, and the second terminal of transistor 52D is electrically connected to wiring ANO.

[0111] Furthermore, the pixel Px shown in Figure 7A differs from that in Figure 6B in that it has capacitors 53A and 53B instead of capacitor 53. Capacitor 53A has a conductive film electrically connected to the gate electrode of transistor 52B and a conductive film electrically connected to the second terminal of transistor 52B. Capacitor 53B has a conductive film electrically connected to the second terminal of transistor 52B and a conductive film electrically connected to wiring ANO.

[0112] The pixel Px shown in Figure 7B has transistors 52A, 52B, 52C, 52D, 52E, 52F, capacitors 53A, and capacitors 53B. The pixel Px shown in Figure 7B is also electrically connected to five wires, wires GL1 to GL5, wire SL, wire V0, wire ANO, and wire S1. A signal is supplied to wire S1, for example.

[0113] In Figure 7B, transistor 52B has a gate electrode electrically connected to transistor 52A, a first terminal electrically connected to transistor 52F, and a second terminal electrically connected to wiring ANO.

[0114] Transistor 52A has a gate electrode electrically connected to wiring GL1, a first terminal electrically connected to the gate electrode of transistor 52B, and a second terminal electrically connected to wiring S1.

[0115] Transistor 52C has a gate electrode electrically connected to wiring GL2, a first terminal electrically connected to wiring V0, and a second terminal electrically connected to light-emitting element 61.

[0116] Transistor 52D has a gate electrode electrically connected to wiring GL3, a first terminal electrically connected to wiring S1, and a second terminal electrically connected to transistor 52F.

[0117] Transistor 52E has a gate electrode electrically connected to wiring GL4, a first terminal electrically connected to wiring S1, and a second terminal electrically connected to wiring SL.

[0118] Transistor 52F has a gate electrode electrically connected to wiring GL5, a first terminal electrically connected to light-emitting element 61, and a second terminal electrically connected to transistors 52B and 52D.

[0119] Capacitor 53A has a conductive film electrically connected to wiring ANO and a conductive film electrically connected to the gate electrode of transistor 52B.

[0120] Capacity 53B has a conductive film electrically connected to wiring SL and a conductive film electrically connected to wiring S1.

[0121] [Example of display unit configuration 1] Multiple pixels Px arranged in a matrix in the display unit 31 are called the pixel matrix 230. Figure 8A shows an example of a plan view of the pixel matrix 230 of the display unit 31. The pixel matrix 230 has multiple pixels Px arranged in a matrix.

[0122] The formation of patterns in each layer, such as the semiconductor layer and conductive layer, of the multiple pixels Px constituting the pixel matrix 230 can be performed using an exposure apparatus. The area of ​​a single exposure in the exposure apparatus may be smaller than the area of ​​the pixel matrix 230. In such cases, the formation of patterns in each layer constituting the pixel matrix 230 can be performed by exposing it in multiple exposure regions and then joining these exposure regions together to perform overall exposure. Such exposure is sometimes called segmented exposure. In the region where the exposure regions are joined together, it is preferable that parts of two adjacent exposure regions overlap each other.

[0123] By using segmented exposure and joining together the respective exposure areas, exposure can be performed with high resolution and over a wide area. Therefore, for example, even when using an exposure device for LSIs, typically a scanner device, and increasing the resolution by setting the thickness of each pattern or the spacing between patterns to 500 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, or even 30 nm or less, it is easy to increase the diagonal size of the display unit 31. More specifically, for example, it is easy to make the diagonal size of the display unit 31 1 inch or more.

[0124] Furthermore, for example, in a display device according to one aspect of the present invention, even when the pixel density (resolution) is increased, specifically to 300 ppi or more, preferably 500 ppi or more, more preferably 1000 ppi or more, even more preferably 2000 ppi or more, even more preferably 3000 ppi or more, even more preferably 5000 ppi or more, and even more preferably 7000 ppi or more, it is easy to increase the diagonal size of the display unit 31. More specifically, it is easy to make the diagonal size of the display unit 31, for example, 1 inch or more.

[0125] Figure 8B shows an example of dividing the pixel matrix into multiple regions. The pixel matrix of the display unit 31 can be divided into regions represented by pixel submatrices 230[k,m]. Here, k and m are both positive integers, where k is the coordinate in the x direction and m is the coordinate in the y direction. Each of the divided pixel submatrices 230[k,m] can represent a single exposure area.

[0126] An example of two pixels where the first and second wirings are located adjacent to each other will be described. Note that in this specification, when two wirings are adjacent, the expression "two wirings are in close proximity" may be used.

[0127] In a plan view, two adjacent pixels in the x-direction can have their respective wirings arranged symmetrically with respect to the axis pointing in the y-axis direction, thereby allowing the wirings of each pixel to be placed adjacent to one another. A specific example will be explained using Figure 9B. Figure 9B is an enlarged view of the area enclosed by the dashed line shown in Figure 9A.

[0128] Figure 9A shows an example in the configuration shown in Figure 8B in which the pixel matrix 230 has two types of pixels Px (hereinafter sometimes referred to as pixel Px1 and pixel Px2). In Figure 9A, the pixel matrix 230 is composed of multiple pixels Px1 and multiple pixels Px2. Pixels Px1 and Px2 differ from each other in the arrangement of one or more wirings.

[0129] The pixel matrix 230 has multiple pixel submatrices, and in adjacent pixels Px1 and Px2 separated by the boundary of adjacent pixel submatrices, the wirings they each possess are arranged adjacent to each other.

[0130] In the multiple pixel submatrices 230[k,m] of the display unit 31 shown in Figure 9A, each pixel submatrix 230[k,m] is composed of multiple pixels Px1 and multiple pixels Px2, with pixels Px1 and Px2 arranged alternately along the x-direction and the same pixels arranged along the y-direction.

[0131] Note that "arranged along the x-direction" is not limited to being arranged along the positive x-direction; it may also be arranged along the negative x-direction. Similarly, "arranged along the y-direction" is not limited to being arranged along the positive y-direction; it may also be arranged along the negative y-direction. Furthermore, while Figure 8A and others show examples where the x-axis and y-axis are orthogonal, the x-axis and y-axis may also be oblique.

[0132] For example, the sub-pixels R, G, B, W, C, M, Y, etc. shown above can be applied to pixel Px1 and pixel Px2, respectively. If one of the sub-pixels R, G, B, W, C, M, Y, etc. is selected as pixel Px1, then pixel Px2 may be selected from the sub-pixels R, G, B, W, C, M, Y, etc. other than the sub-pixel selected for pixel Px1, or the same sub-pixel as pixel Px1 may be selected.

[0133] Figure 9B is an enlarged view of the region enclosed by the dashed rectangle in Figure 9A, showing six pixels arranged in relation to two adjacent pixel submatrices 230[k,m] in the x-direction (here, pixel submatrices 230[1,1] and 230[2,1]). The pixels Px1, Px2, Px1, Px2, Px1, and Px2 arranged sequentially along the x-direction are referred to here as pixels Px1a, Px2a, Px1b, Px2b, Px1c, and Px2c.

[0134] Pixels Px1a and Px2a are included in pixel submatrix 230[1,1], while pixels Px1b, Px2b, Px1c, and Px2c are included in pixel submatrix 230[2,1]. Pixel submatrix 230[1,1] and pixel submatrix 230[2,1] are exposed separately. Pixels Px2a and Px1b are adjacent across the boundary of the exposure area. Furthermore, pixels Px2b and Px1c are adjacent within pixel submatrix 230[2,1].

[0135] Furthermore, in the configuration example shown in Figure 9B, each pixel Px has a wiring 12. The wiring 12 is a wiring that extends in the y direction. The wiring 12 is provided across multiple pixels Px arranged in the y direction and is shared by these multiple pixels Px.

[0136] The arrangement of wiring 12 in pixel Px1 and the arrangement of wiring 12 in pixel Px2 are symmetrical in a plan view, with respect to the axis pointing in the y-axis direction. Furthermore, the wiring 12 of pixel Px2a (hereinafter sometimes referred to as wiring 12a) and the wiring 12 of pixel Px1b (hereinafter sometimes referred to as wiring 12b) are arranged adjacent to each other. Also, the wiring 12 of pixel Px2b (hereinafter sometimes referred to as wiring 12c) and the wiring 12 of pixel Px1c (hereinafter sometimes referred to as wiring 12d) are arranged adjacent to each other.

[0137] Here, each wiring that is arranged symmetrically does not need to be symmetrical across the entire set of pixels containing that wiring; it is sufficient if only a portion of the wiring is arranged symmetrically.

[0138] Specifically, for example, in one embodiment of the present invention, a display unit has a first pixel and a second pixel adjacent to each other, separated by the boundary of an adjacent pixel submatrix, the first pixel has a first wiring, the second pixel has a second wiring, and the first and second wirings are arranged adjacent to each other, and in an area of ​​30% or more of the first wiring contained in the first pixel, the second wiring is arranged symmetrically with respect to the axis oriented in the y-axis direction.

[0139] Furthermore, the first and second wirings do not need to be arranged symmetrically to each other, as long as they are adjacent to each other.

[0140] The signal supplied to the wiring 12 is preferably the same for two adjacent pixels where the wiring 12 is located. Alternatively, the signal supplied to the wiring 12 may be the same for all pixels of the display unit 31.

[0141] In adjacent exposure areas, misalignment of exposure may occur. This misalignment can shorten the distance between two pixels Px adjacent in the x-direction across the boundary of the exposure area, potentially causing the wiring, conductive layers, semiconductor layers, etc., of each pixel to overlap and short-circuit.

[0142] In one embodiment of the present invention, even when exposure misalignment occurs, the same signal is applied to wiring, conductive layers, semiconductor layers, etc., which are prone to short circuits, thereby suppressing malfunctions of the display device.

[0143] Figure 9C shows an example where, due to misalignment, the distance between two adjacent pixels Px in the x-direction across the boundary of the exposure area becomes smaller than the distance between two adjacent pixels Px within the same pixel submatrix 230[k,m], resulting in the overlapping of wiring 12 of pixel Px2a and wiring 12 of pixel Px1b. Although this overlap may cause a short circuit between wiring 12 of pixel Px2a and wiring 12 of pixel Px1b, both pixels Px2a and Px1b can be made to operate normally by applying the same signal to wiring 12.

[0144] Furthermore, the wiring 12 of pixel Px2a and the wiring 12 of pixel Px1b may overlap to form a single wide wiring (hereinafter sometimes referred to as wiring 12'). In such cases, wiring 12' is provided between pixel Px2a and pixel Px1b, and the width of wiring 12' may be wider than the width of at least one of wiring 12c and wiring 12d.

[0145] Furthermore, even when the wiring 12 of pixel Px2a and the wiring 12 of pixel Px1b do not overlap, the distance between the wirings 12 of each pixel may be shorter than the distance between the wirings 12 of adjacent pixels Px within the same pixel submatrix. When the distance between wirings is short, there is a concern that leakage current will occur between the wirings. Also, when the distance between wirings is short, if there is a potential difference between the wirings, the capacitance between the wirings will increase, which may put a load on the circuit operation. Even in such cases, each pixel Px can be made to operate normally by applying the same signal to each wiring 12 of each pixel.

[0146] In one embodiment of the present invention, a display unit has two adjacent pixels separated by the boundary of adjacent pixel submatrices, and one wiring from each pixel is arranged adjacent to each other. Furthermore, the same signal is applied to each adjacent wiring. In this specification, for example, when wiring A and wiring B are adjacent, it means that wiring C is not arranged between wiring A and wiring B. In this specification, when a display unit has multiple wirings, and wiring A and wiring B are adjacent among the multiple wirings, it means that no other wirings of the display unit, other than wiring A and wiring B, are arranged between wiring A and wiring B.

[0147] Alternatively, a display unit in one aspect of the present invention has a first pixel and a second pixel adjacent to each other, separated by the boundary of two adjacent pixel submatrices, the first pixel having a first wiring, and the second pixel having a second wiring, the first wiring and the second wiring being arranged adjacent to each other, and the same signal being supplied to the first wiring and the second wiring. Here, the first wiring and the second wiring are, for example, wiring for supplying a reference potential.

[0148] Alternatively, in one embodiment of the present invention, the display unit has, in a plan view, a first pixel and a second pixel adjacent to the first pixel in the x-direction, the y-axis is orthogonal to the x-axis, and the layout of the first pixel and the layout of the second pixel have a line-symmetric configuration with respect to the axis pointing in the y-axis direction. The axis pointing in the y-axis direction is, for example, an axis having the same vector as the y-axis. The y-axis is also included in the axis pointing in the y-axis direction. Here, the pixel layout refers to, for example, the arrangement of wiring, electrodes, semiconductor layers, transistors, and capacitive elements of the pixel. The first pixel and the second pixel each have one wiring, and the same signal is applied to the one wiring of each pixel. When the layouts of the first pixel and the second pixel have a line-symmetric configuration, for example, not all components of the pixel have a line-symmetric relationship, but it is preferable that the one wiring of the pixel, the one transistor electrically connected to the one wiring, and the wiring that functions as a source line have a line-symmetric relationship.

[0149] Here, if the layout of the first and second pixels has a line-symmetric relationship with respect to the axis pointing in the y-axis direction in a plan view, it can be said that the constituent elements of the first and second pixels are inverted relative to each other with respect to the axis pointing in the y-axis direction.

[0150] Specifically, wiring V0 shown in Figure 6A or Figure 6B can be used as wiring 12. Figures 10A and 10B show examples of using wiring V0 as wiring 12 in Figures 9B and 9C, respectively. The wiring V0 possessed by pixels Px2a, Px1b, Px2b, and Px1c are referred to here as wiring V0a, wiring V0b, wiring V0c, and wiring V0d, respectively.

[0151] Alternatively, as shown in Figure 12, wiring ANO shown in Figure 6A, etc., may be used as wiring 12.

[0152] Furthermore, Figures 10A and 10B show the semiconductor layer C1 of the pixel Px. The semiconductor layer C1 includes the channel formation region of the transistor of the pixel Px. For example, the semiconductor layer C1 can be used as a layer including the channel formation region of transistor 52A, transistor 52B, transistor 52C, or transistor 52D shown in Figure 6A or Figure 6B, etc.

[0153] The semiconductor layers C1 present in pixels Px2a, Px1b, Px2b, and Px1c are referred to here as semiconductor layer C1a, semiconductor layer C1b, semiconductor layer C1c, and semiconductor layer C1d, respectively.

[0154] Furthermore, Figures 10A and 10B show examples in which pixel Px has wiring SL in addition to wiring V0, as shown in Figure 6A or Figure 6B. The wiring SL of pixels Px2a, Px1b, Px2b, and Px1c are referred to here as wiring SLa, wiring SLb, wiring SLc, and wiring SLd, respectively.

[0155] The distance between wiring V0a and wiring V0b is preferably shorter than the distance between wiring V0a and wiring SLb. Furthermore, the distance between wiring V0a and wiring V0b is preferably shorter than the distance between wiring V0b and wiring SLa.

[0156] The distance between wiring V0a and wiring V0b is preferably shorter than the distance between wiring V0a and semiconductor layer C1b. Furthermore, the distance between wiring V0a and wiring V0b is preferably shorter than the distance between wiring V0b and semiconductor layer C1a.

[0157] Furthermore, it is preferable that wiring V0a and wiring V0b are placed between semiconductor layer C1a and semiconductor layer C1b. Also, it is preferable that wiring V0a and wiring V0b are placed between wiring SLa and wiring SLb.

[0158] The distance between wiring V0a and wiring V0b may differ from the distance between wiring V0c and wiring V0d. Figure 10B shows an example where the distance between wiring V0a and wiring V0b is shorter than the distance between wiring V0c and wiring V0d, and wiring V0a and wiring V0b partially overlap.

[0159] The distance between wiring V0a and wiring SLb may differ from the distance between wiring V0c and wiring SLd. Also, the distance between wiring V0a and semiconductor layer C1b may differ from the distance between wiring V0c and semiconductor layer C1d.

[0160] The distance between wiring V0b and wiring SLa may differ from the distance between wiring V0d and wiring SLc. Furthermore, the distance between wiring V0b and semiconductor layer C1a may differ from the distance between wiring V0d and semiconductor layer C1c.

[0161] The distance between wiring V0c and wiring V0d is preferably shorter than the distance between wiring V0c and wiring SLd. Furthermore, the distance between wiring V0c and wiring V0d is preferably shorter than the distance between wiring V0d and wiring SLc.

[0162] The distance between wiring V0c and wiring V0d is preferably shorter than the distance between wiring V0c and semiconductor layer C1d. Furthermore, the distance between wiring V0c and wiring V0d is preferably shorter than the distance between wiring V0d and semiconductor layer C1c.

[0163] Furthermore, it is preferable that wiring V0c and wiring V0d are placed between semiconductor layer C1c and semiconductor layer C1d. Also, it is preferable that wiring V0c and wiring V0d are placed between wiring SLc and wiring SLd.

[0164] If semiconductor layer C1 is a layer containing the channel formation region of transistor 52C as shown in Figure 6A or Figure 6B, then one of the source and drain of transistor 52C is electrically connected to wiring V0a, and the channel formation region is included in semiconductor layer C1a. Also, one of the source and drain of transistor 52C in pixel Px2b is electrically connected to wiring V0b, and the channel formation region is included in semiconductor layer C1b.

[0165] Furthermore, if a pixel Px has multiple transistors, it is preferable that the channel formation regions of the multiple transistors in pixel Px2a are not located between wiring 12a and wiring 12b in a plan view. Similarly, it is preferable that the channel formation regions of the multiple transistors in pixel Px1b are not located between wiring 12a and wiring 12b in a plan view.

[0166] Furthermore, it is preferable that the channel formation regions of the multiple transistors in pixel Px2b are not located between wiring 12c and wiring 12d in a plan view. Similarly, it is preferable that the channel formation regions of the multiple transistors in pixel Px1c are not located between wiring 12c and wiring 12d in a plan view.

[0167] Figure 11A shows an example of the distance d1 between the first wiring (wiring V0 in Figure 11A) of a second pixel (pixel Px2 in Figure 11A) and the first wiring of an adjacent first pixel (pixel Px1 in Figure 11A). In Figure 11A, distance d1 is the distance in a direction approximately perpendicular to the direction in which the first wiring extends. Figure 11A also shows an example of measuring the distance between the centers of the first wirings of each pixel.

[0168] Figure 11A also shows an example of the distance d2 between the semiconductor layer C1 of the second pixel and the first wiring of the first pixel. Figure 11A shows an example of measuring the distance to the center of the semiconductor layer C1.

[0169] Figure 11B also shows an example where distance d1 is measured as the distance between the end of the first wiring of the second pixel and the end of the first wiring of the first pixel. For measurement, the end closest to the other object whose distance is being measured is used. The distance d1 shown in Figure 11B is sometimes called the space between the two wirings.

[0170] Figure 11B also shows an example where the distance d2 is measured using the edge of the semiconductor layer C1.

[0171] Figure 13 shows an example of a circuit diagram including multiple pixels Px, multiple wirings GL1, multiple wirings GL2, multiple wirings SL, multiple wirings V0, multiple wirings VCOM, and a protection circuit 55. Figure 13 shows an example in which multiple pixels Px electrically connected to the same wirings V0 and SL are electrically connected to one of the multiple semiconductor elements 56 of the protection circuit 55. Note that in Figure 13, some components of the pixel circuit 51 have been omitted for simplification.

[0172] In the protection circuit 55, wiring V0 and wiring SL are electrically connected to the semiconductor element 56. Figure 13 shows an example in which a diode-connected transistor is used as the semiconductor element 56, but one or more of various elements such as diodes, transistors, and resistors can be used as the semiconductor element 56.

[0173] In the example circuit diagram shown in Figure 13, the semiconductor element 56 is a diode-connected transistor, with the gate of the transistor and one of its sources and drains electrically connected to the wiring SL, and the other of its sources and drains electrically connected to the wiring V0.

[0174] As shown in Figure 13, two semiconductor elements 56, each electrically connected to two adjacent rows of pixels, may be arranged symmetrically. Furthermore, it is preferable to place two wirings V0 between the two symmetrically arranged semiconductor elements 56.

[0175] Although Figure 9A shows an example where pixels Px1 and Px2 are arranged alternately one by one in the x-direction, the display unit 31 may also have multiple pixels Px1 and multiple pixels Px2 arranged alternately in the x-direction.

[0176] Figure 14A shows an example where two pixels Px1 and two pixels Px2 are arranged alternately in the x-direction. Figure 14B is a magnified view of the region enclosed by the dashed rectangle in Figure 14A.

[0177] Figure 15 shows an example in which f pixels Px1 (where f is an integer greater than or equal to 2) arranged continuously in the x-direction and g pixels Px2 (where k is an integer greater than or equal to 2) arranged continuously in the x-direction alternately from pixel submatrix 230[1,1] to pixel submatrix 230[2,1].

[0178] In Figure 15, pixel 11f consists of f pixels Px1 arranged continuously in the x-direction, and pixel 11g consists of g pixels Px2 arranged continuously in the x-direction. In Figure 15, pixel 11g (hereinafter referred to as pixel 11g(a)) and pixel 11f (hereinafter referred to as pixel 11f(b)) are adjacent to each other across the boundary between pixel submatrix 230[1,1] and pixel submatrix 230[2,1].

[0179] In Figure 15, pixel Px2a is the pixel Px2 that is closest to the wiring 12 of pixel Px1b in a plan view, out of the g pixels Px2 that pixel 11g(a) possesses. Similarly, pixel Px1b is the pixel Px1 that is closest to the wiring 12 of pixel Px2a in a plan view, out of the f pixels Px1 that pixel 11f(b) possesses.

[0180] For pixels Px2a and Px1b shown in Figure 15, you can refer to the pixels Px2a and Px1b described in Figure 9B as appropriate.

[0181] Figures 9A to 9C, 10A, 10B, 11A, 11B, 14A, 14B, and 15 show examples of a pixel matrix having two types of pixels Px, but a pixel matrix may have three or more types of pixels Px.

[0182] One embodiment of the present invention describes a display unit having a first pixel, a second pixel adjacent to the first pixel in the positive x direction as viewed from the first pixel, and a third pixel adjacent to the first pixel in the negative x direction as viewed from the first pixel, wherein the first pixel has a first wiring, the second pixel has a second wiring, and the third pixel has a third wiring, and the same signal is applied to the first, second, and third wirings. In such a case, for example, the first and second wirings are arranged adjacent to each other, while the first and third wirings are not adjacent, and other wirings of the first pixel and semiconductor elements are arranged between the first and third wirings. Furthermore, the distance between the first and second wirings is shorter than the distance between the first and third wirings.

[0183] Furthermore, it is preferable that the position of the first wiring in the first pixel and the position of the second wiring in the second pixel are arranged symmetrically with respect to the axis oriented in the y-axis direction. Also, the position of the first wiring in the first pixel and the position of the third wiring in the third pixel may be arranged symmetrically with respect to the axis oriented in the y-axis direction, or they may have the same arrangement rather than being inverted with respect to the y-axis.

[0184] Figure 16A shows an example in which the pixel matrix 230 has a third type of pixel Px (hereinafter sometimes referred to as pixel Px3) in addition to pixels Px1 and Px2. Here, for example, the sub-pixels R, G, B, W, C, M, Y, etc. shown above can be applied as the three types of pixels Px. Furthermore, for pixel Px3, one may be selected from the sub-pixels R, G, B, W, C, M, Y, etc., other than the sub-pixels selected for pixels Px1 and Px2, or the same sub-pixel as pixel Px1 or pixel Px2 may be selected.

[0185] In Figure 16A, pixels Px1, Px3, and Px2 are adjacent to each other in the x-direction. Also, identical pixels are arranged in the y-direction. Figure 16A can be described, for example, as a configuration in which pixel Px3 is placed between pixel Px1 and pixel Px2 in the configuration shown in Figure 9A. Alternatively, Figure 16A can be described, for example, as a configuration in which multiple pixels Px3 are placed between multiple pixels Px1 arranged in a single row along the y-direction and multiple pixels Px2 arranged in a single row along the y-direction.

[0186] Furthermore, a fourth type of pixel Px may be placed between pixel Px1 and pixel Px2, in addition to pixel Px3, so that the pixel matrix has four types of pixel Px. Also, the pixel matrix may have five or more types of pixel Px.

[0187] Figure 16B is an enlarged view of the region enclosed by the dashed rectangle in Figure 16A, showing nine pixels arranged in relation to two adjacent pixel submatrices 230[k,m] in the x-direction (here, pixel submatrices 230[1,1] and 230[2,1]). The pixels Px1, Px3, Px2, Px1, Px3, Px2, Px1, Px3, and Px2, which are arranged sequentially along the x-direction, are here referred to as pixels Px1a, Px3a, Px2a, Px1b, Px3b, Px2b, Px1c, Px3c, and Px2c. Pixels Px1a, Px2a, and Px3a are contained in pixel submatrix 230[1,1], while pixels Px1b, Px2b, Px3b, Px1c, Px3c, and Px2c are contained in pixel submatrix 230[2,1]. Pixel submatrix 230[1,1] and pixel submatrix 230[2,1] are exposed separately. Pixels Px2a and Px1b are adjacent to each other, separated by the boundary of the exposure area.

[0188] Each of the pixels Px1, Px2, and Px3 has a wiring 12.

[0189] Figure 16B shows an example where pixel Px3 is arranged symmetrically with respect to the axis pointing to the y-axis relative to pixel Px2, but pixel Px3 may also be arranged symmetrically with respect to the axis pointing to the y-axis relative to pixel Px1.

[0190] For pixels Px2a and Px1b adjacent to each other across the boundary of the exposure area, as shown in Figure 16B, the pixels Px2a and Px1b described in Figure 9B, etc., can be appropriately referenced. Similarly, for pixels Px2b and Px1c, the pixels Px2b and Px1c described in Figure 9B, etc., can be appropriately referenced.

[0191] [Example of display unit configuration 2] The display unit 31 shown in Figure 17 has a plurality of pixels 11 arranged in a matrix. Each pixel 11 is composed of a plurality of subpixels. Pixels Px that control red light, pixels Px that control green light, and pixels Px that control blue light can be used as subpixels of each pixel 11.

[0192] Figure 17 shows an example of a configuration using two types of pixels 11 (hereinafter referred to as pixel 11_1 and pixel 11_2). Pixel 11_1 and pixel 11_2 have different wiring arrangements.

[0193] The display unit 31 shown in Figure 17 is composed of multiple pixel submatrices 230[k,m]. Each of the divided pixel submatrices 230[k,m] represents a single exposure area.

[0194] In the pixel submatrix 230[k,m] shown in Figure 17, multiple pixels 11_1 and multiple pixels 11_2 are composed of these. Furthermore, in the pixel submatrix 230[k,m], pixels 11_1 and pixels 11_2 are arranged alternately along the x-direction, and the same pixels are arranged along the y-direction.

[0195] Figure 18A shows an example in which the configuration shown in Figure 17 is applied to pixels 11_1 and 11_2, respectively, using the configurations shown in Figure 5A.

[0196] In pixel 11_1, the pixel Px that controls red light is denoted as sub-pixel 1R, the pixel Px that controls green light is denoted as sub-pixel 1G, and the pixel Px that controls blue light is denoted as sub-pixel 1B. In pixel 11_2, the pixel Px that controls red light is denoted as sub-pixel 2R, the pixel Px that controls green light is denoted as sub-pixel 2G, and the pixel Px that controls blue light is denoted as sub-pixel 2B.

[0197] Furthermore, by setting g=3 and f=3 in Figure 15, applying pixel 11f as pixel 11_1 and pixel 11g as pixel 11_2, and designating the three pixels Px1 of pixel 11f as sub-pixels 1R, 1G, and 1B, respectively, and the three pixels Px2 of pixel 11g as sub-pixels 2R, 2G, and 2B, respectively, the configuration shown in Figure 18A can be achieved.

[0198] Note that adjacent pixels across the boundary of the exposure area are not limited to pixels B and R. For example, it is sufficient if one pixel selected from pixels R, G, and B is adjacent to another pixel selected from pixels R, G, and B.

[0199] Figure 18B shows an example where the configurations shown in Figure 5F are applied to pixels 11_1 and 11_2, respectively, in the configuration shown in Figure 17. In Figure 18B, the sub-pixel R of pixel 11_2 and the sub-pixel G of pixel 11_1 are adjacent, separated by the boundary of different pixel submatrices. Also, the sub-pixel B of pixel 11_2 and the sub-pixel G of pixel 11_1 are adjacent, separated by the boundary of different pixel submatrices. In Figure 15, g=4 and f=4, and by using a configuration in which two pixels 11f are arranged along the y-direction as pixels 11_1 and 11_2, and by using a configuration in which two pixels 11g are arranged along the y-direction as pixels 11_1 and 11_2, the configuration shown in Figure 18B can be obtained.

[0200] Furthermore, as shown in Figure 19A, the type of pixel may be changed for each exposure area of ​​the segmented exposure. Figure 19A shows an example in which pixel Px2 is applied to pixel submatrix 230[1,1] and pixel submatrix 230[1,2], and pixel Px1 is applied to pixel submatrix 230[2,1] and pixel submatrix 230[2,2]. Figure 19B is an enlarged view of the area enclosed by the dashed rectangle in Figure 19A.

[0201] [Example of display unit configuration 3] Figure 17 shows an example in which the display unit 31 is composed of two types of pixels 11, while Figure 20 shows an example in which the display unit 31 is composed of one type of pixel 11. In Figure 20, each pixel submatrix 230[k,m] is composed of multiple pixels 11.

[0202] Figure 21A shows an example where Figure 5A is applied as pixel 11 in the configuration shown in Figure 20. Note that the configuration shown in Figure 21A can also be achieved by applying sub-pixel R as pixel Px1, sub-pixel B as pixel Px2, and sub-pixel G as pixel Px3 in Figure 16B.

[0203] Note that adjacent pixels across the boundary of the exposure area are not limited to pixels B and R. For example, it is sufficient if one pixel selected from pixels R, G, and B is adjacent to another pixel selected from pixels R, G, and B.

[0204] Figure 21B shows an example where Figure 5C is applied as pixel 11 in the configuration shown in Figure 20. In Figure 21B, the sub-pixel R of pixel 11 in pixel submatrix 230[k-1,m] and the sub-pixel B of pixel 11 in pixel submatrix 230[k,m] are adjacent across the boundary of the two pixel submatrices. Also, the sub-pixel G of pixel 11 in pixel submatrix 230[k-1,m] and the sub-pixel B of pixel 11 in pixel submatrix 230[k,m] are adjacent across the boundary of the two pixel submatrices.

[0205] The configuration in Figure 21B can be described as a configuration in which the first and second rows are arranged alternately in the y-direction. It can also be described as sub-pixel B being included in both the first and second rows.

[0206] In Figure 21B, the configuration for the first row can be, for example, the configuration shown in Figure 9B, where pixel Px1 is sub-pixel B and pixel Px2 is sub-pixel R. Similarly, the configuration for the second row can be, for example, the configuration shown in Figure 9B, where pixel Px1 is sub-pixel B and pixel Px2 is sub-pixel G.

[0207] Alternatively, in Figure 21B, it may be expressed that subpixel B is included in only one of the first or second rows.

[0208] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

[0209] (Embodiment 2) This embodiment describes a display device according to one aspect of the present invention.

[0210] [Display device 400A] The display device 400A shown in Figure 22 has a substrate 331, transistors 320 (transistors 320a, 320b1, 320b2, and 320c), light-emitting elements 430a, 430b, and 430c, and a capacitor 240. Hereinafter, light-emitting elements 430a, 430b, and 430c may be collectively referred to as light-emitting element 430. Note that Figure 22 shows two light-emitting elements 430b. The two light-emitting elements 430b will be referred to as light-emitting element 430b1 and light-emitting element 430b2, respectively. The configuration having a substrate 331, transistors 320 on the substrate 331, and a capacitor 240 on the transistors can be applied to layer 30 in Figures 1A and 1B. Also, the configuration having light-emitting elements 430a, 430b1, 430b2, and 430c can be applied to layer 60 in Figures 1A and 1B.

[0211] Figure 22 shows an example in which four adjacent light-emitting elements, light-emitting elements 430b1, 430c, 430a, and 430b2, are arranged in that order.

[0212] Transistor 320 is a transistor in which a metal oxide (also called an oxide semiconductor) is applied to the semiconductor layer where the channel is formed. Figure 22 shows the transistors 320 of the display device 400A, arranged in order as light-emitting elements 430b1, 430c, 430a, and transistors 320b1, 320c, 320a, and 320b2, which are electrically connected to light-emitting element 430b1, respectively. For example, a light-emitting element that emits red light can be used as light-emitting element 430a, light-emitting elements that emit green light can be used as light-emitting elements 430b1 and 430b2, and a light-emitting element that emits blue light can be used as light-emitting element 430c.

[0213] The transistor 320 has a semiconductor layer 321, an insulating layer 323, a conductive layer 324, a pair of conductive layers 325 (hereinafter sometimes referred to as conductive layer 325a and conductive layer 325b), an insulating layer 326, and a conductive layer 327.

[0214] As the substrate 331, an insulating substrate or a semiconductor substrate can be used.

[0215] An insulating layer 332 is provided on the substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320, and prevents oxygen from detaching from the semiconductor layer 321 to the insulating layer 332. As the insulating layer 332, for example, a film that is less susceptible to hydrogen or oxygen diffusion than a silicon oxide film can be used, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.

[0216] A conductive layer 327 is provided on an insulating layer 332, and an insulating layer 326 is provided covering the conductive layer 327. The conductive layer 327 functions as the first gate electrode of the transistor 320, and a portion of the insulating layer 326 functions as the first gate insulating layer. It is preferable to use an oxide insulating film, such as a silicon oxide film, for at least the portion of the insulating layer 326 that is in contact with the semiconductor layer 321. It is preferable that the upper surface of the insulating layer 326 is flattened.

[0217] The semiconductor layer 321 is provided on the insulating layer 326. Preferably, the semiconductor layer 321 has a metal oxide (also called an oxide semiconductor) film having semiconductor properties. Details of materials suitable for use in the semiconductor layer 321 will be described later.

[0218] A pair of conductive layers 325 are provided in contact with the semiconductor layer 321 and function as source and drain electrodes.

[0219] Furthermore, an insulating layer 328 is provided covering the top and side surfaces of the pair of conductive layers 325, as well as the side surfaces of the semiconductor layer 321, and an insulating layer 264 is provided on the insulating layer 328. The insulating layer 328 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing into the semiconductor layer 321 from the insulating layer 264, etc., and to prevent oxygen from detaching from the semiconductor layer 321. As the insulating layer 328, an insulating film similar to that of the insulating layer 332 can be used.

[0220] The insulating layer 328 and the insulating layer 264 are provided with openings that reach the semiconductor layer 321. Inside these openings, the insulating layer 323 and the conductive layer 324 are embedded, in contact with the insulating layer 264, the insulating layer 328, the sides of the conductive layer 325, and the upper surface of the semiconductor layer 321. The conductive layer 324 functions as a second gate electrode, and the insulating layer 323 functions as a second gate insulating layer.

[0221] The upper surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are flattened so that their heights are approximately the same, and the insulating layer 329 and insulating layer 265 are provided covering them.

[0222] Insulating layers 264 and 265 function as interlayer insulating layers. Insulating layer 329 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing into the transistor 320 from insulating layer 265, etc. As insulating layer 329, an insulating film similar to that used for insulating layers 328 and 332 can be used.

[0223] A plug 274 that electrically connects to one of the pair of conductive layers 325 (hereinafter sometimes referred to as conductive layer 325a), and a plug 275 that electrically connects to the other of the pair of conductive layers 325 (hereinafter sometimes referred to as conductive layer 325b), are provided so as to be embedded in the insulating layer 265, insulating layer 329, and insulating layer 264, respectively. Here, it is preferable that the plug 274 has a conductive layer 274a that covers the sides of the openings of the insulating layers 265, insulating layer 329, insulating layer 264, and insulating layer 328, and a part of the upper surface of the conductive layer 325, and a conductive layer 274b that is in contact with the upper surface of the conductive layer 274a. It is also preferable that the plug 275 has a conductive layer 275a that covers the sides of the openings of the insulating layers 265, insulating layer 329, insulating layer 264, and insulating layer 328, and a part of the upper surface of the conductive layer 325, and a conductive layer 275b that is in contact with the upper surface of the conductive layer 275a. In this case, it is preferable to use conductive materials that do not easily diffuse hydrogen and oxygen as conductive layers 274a and 275a.

[0224] Furthermore, a capacitance 240 is provided on the insulating layer 265.

[0225] Capacitor 240 has a conductive layer 241, a conductive layer 245, and an insulating layer 243 located between them. The conductive layer 241 functions as one electrode of the capacitor 240, the conductive layer 245 functions as the other electrode of the capacitor 240, and the insulating layer 243 functions as the dielectric of the capacitor 240.

[0226] The conductive layer 241 is provided on the insulating layer 261 and embedded in the insulating layer 254. The insulating layer 243 is provided covering the conductive layer 241. The conductive layer 245 is provided in the region that overlaps with the conductive layer 241 via the insulating layer 243.

[0227] An insulating layer 255 is provided covering the capacitance 240, and plugs such as plugs 256a and plug 256b are embedded within the insulating layer 255. An insulating layer 258 is provided on the insulating layer 255, an insulating layer 259 is provided on the insulating layer 258, an insulating layer 260 is provided on the insulating layer 259, an insulating layer 261 is provided on the insulating layer 260, and light-emitting elements such as light-emitting elements 430a, 430b, and 430c are provided on the insulating layer 261. Multiple conductive layers are embedded in the insulating layer 258 and insulating layer 260. In addition, multiple plugs are embedded in the insulating layer 259 and insulating layer 261.

[0228] The display device 400A may have a configuration that does not include one or more of the following: an insulating layer 259, a plug embedded in the insulating layer 259, an insulating layer 260, a conductive layer embedded in the insulating layer 260, an insulating layer 261, and a plug embedded in the insulating layer 261.

[0229] The conductive layer 245 is electrically connected to one of the source and drain of transistor 320 via plug 256a, a conductive layer embedded in insulating layer 258, plug 256b, a conductive layer embedded in insulating layer 254, and plug 274. The other of the source and drain of transistor 320 is electrically connected to a conductive layer embedded in insulating layer 258 via plug 275, a conductive layer embedded in insulating layer 254, and plugs embedded in insulating layer 243 and insulating layer 255.

[0230] Figure 22 shows the conductive layers 271c and 271a embedded within the insulating layer 258. The conductive layer 325b of transistor 320c is electrically connected to the conductive layer 271c. The conductive layer 325b of transistor 320a is electrically connected to the conductive layer 271a.

[0231] A protective layer 416 is provided on the light-emitting elements 430a, 430b, and 430c, and a substrate 420 is bonded to the upper surface of the protective layer 416 by a resin layer 419. The substrate 420 corresponds to the sealing substrate 40 shown in Figures 1A, 1B, etc.

[0232] Figure 25A shows an example of the configuration of light-emitting elements 430a, 430b, and 430c. In the cross-sectional view shown in Figure 25A, light-emitting elements 430b1, 430c, 430a, and 430b2 are provided on layer 30. Light-emitting element 430a has a pixel electrode 111R, an EL layer 112R, and a common electrode 113. Light-emitting elements 430b1 and 430b2 have a pixel electrode 111G, an EL layer 112G, and a common electrode 113. Light-emitting element 430c has a pixel electrode 111B, an EL layer 112B, and a common electrode 113.

[0233] Details of the light-emitting elements 430a, 430b, and 430c will be described later.

[0234] The pixel electrodes (pixel electrode 111R, pixel electrode 111G, pixel electrode 111B) of the light-emitting elements 430a, 430b, and 430c are electrically connected to one of the source and drains of transistor 320 by plug 274, a conductive layer embedded in insulating layer 254, plug 256b, a conductive layer embedded in insulating layer 258, a plug embedded in insulating layer 259, a conductive layer embedded in insulating layer 260, and a plug embedded in insulating layer 261.

[0235] Here, when transistor 320 is applied as transistor 52C as shown in Figures 6A and 6B, for example, conductive layer 271c functions as wiring V0 electrically connected to the pixel circuit 51 that drives the light-emitting element 430c, and conductive layer 271a functions as wiring V0 electrically connected to the pixel circuit 51 that drives the light-emitting element 430a. Conductive layer 271a and conductive layer 271c are formed, for example, by processing the same conductive film.

[0236] In Figure 22, transistors 320c and 320b2 have a structure that is a left-right inversion of transistor 320b1. The pixel circuit having transistor 320c and the pixel circuit having transistor 320a have a generally left-right symmetrical configuration in Figure 22. Therefore, in Figure 22, conductive layers 271c and 271a are provided adjacent to each other. Furthermore, the wiring V0 is a wiring for providing a reference potential, and for example, the same potential is applied to conductive layers 271c and 271a.

[0237] <Formation of conductive layer 271c and conductive layer 271a> When exposure including the pattern for forming the conductive layer 271c and exposure including the pattern for forming the conductive layer 271a are performed separately, there is a concern that the conductive layer 271c and conductive layer 271a may be adjacent to or overlapping due to a misalignment of exposure positions, potentially causing a short circuit between them. In particular, when the resolution of the display unit of one embodiment of the present invention is extremely high, the distance between the wiring etc. of each pixel may become extremely short.

[0238] By using conductive layer 271c and conductive layer 271a as wiring to which the same potential is applied, malfunctions of the pixel circuits connected to each conductive layer can be suppressed even if a short circuit occurs between the two conductive layers.

[0239] A method for manufacturing a display device according to one aspect of the present invention comprises the steps of: manufacturing a plurality of transistors including transistor 320b1, transistor 320c, transistor 320a, and transistor 320b2; manufacturing a conductive layer including a conductive layer 271c, a conductive layer 271a, etc. on the plurality of manufactured transistors; and forming a plurality of light-emitting elements arranged in a matrix on the conductive layer, including 430b1, light-emitting element 430c, light-emitting element 430a, and light-emitting element 430b1.

[0240] An example of the process for forming a conductive layer, including conductive layer 271c and conductive layer 271a, will be described.

[0241] First, conductive films that will become conductive layers 271c and 271a are formed on transistors 20b1, 320c, 320a, and 320b2.

[0242] Next, a photoresist is deposited on the conductive film. As the photoresist, a positive-type resist material, a negative-type resist material, a resist material containing a photosensitive resin, etc., can be used.

[0243] Next, the photoresist is exposed to light on the first region which includes the conductive layer 271c, thereby transferring a pattern corresponding to multiple conductive layers, including the conductive layer 271c, onto the photoresist.

[0244] Next, the photoresist is exposed to light on a second region that includes the conductive layer 271a, thereby transferring a pattern corresponding to multiple conductive layers, including the conductive layer 271a, onto the photoresist.

[0245] Note that the first and second regions are adjacent regions in a plan view. Furthermore, parts of the first and second regions may overlap.

[0246] Next, the photoresist is subjected to a development process to form a pattern on the photoresist that includes a conductive layer 271c and a conductive layer 271a, corresponding to a plurality of conductive layers.

[0247] Here, conductive layer 271a and conductive layer 271c are adjacent. Therefore, it is preferable that no conductive layer is placed between conductive layer 271a and conductive layer 271c. In other words, it is preferable that no pattern is formed in the region between conductive layer 271a and conductive layer 271c in the photoresist.

[0248] Next, a portion of the conductive film is removed using the pattern. Through these steps, a plurality of conductive layers, including conductive layer 271c and conductive layer 271a, can be formed.

[0249] [Display device 400B] The display device 400B shown in Figure 23 includes a layer 20 having transistors 310, etc., that form channels on a substrate 301; a layer 30 located on layer 20 and having transistors 320, etc., that contain a metal oxide in the semiconductor layer where channels are formed; and a layer 60 located on layer 30 and having light-emitting elements 430a, 430b, 430c, etc. Note that explanations of parts similar to those of the display device 400A may be omitted. It is preferable that layer 20 has transistors made from a single-crystal semiconductor substrate such as a single-crystal silicon substrate.

[0250] An insulating layer 261 is provided covering the transistor 310, and a conductive layer 251 is provided on the insulating layer 261. A conductive layer 273 is provided so as to be embedded in the opening of the insulating layer 261. The conductive layer 273 is electrically connected to the source region or drain region of the transistor 310 and to the conductor 251. An insulating layer 262 is provided covering the conductive layer 251, and a conductive layer 252 is provided on the insulating layer 262. The conductive layer 251 and the conductive layer 252 each function as wiring. An insulating layer 263 and an insulating layer 332 are provided covering the conductive layer 252, and transistors 320b1, 320c, 320a, and 320b2 are provided on the insulating layer 332. An insulating layer 265 is provided covering transistors 320b1, 320c, 320a, and 320b2, and a capacitor 240 is provided on the insulating layer 265.

[0251] Transistors 320b1, 320c, 320a, and 320b2 can each be used as transistors constituting a pixel circuit. Transistor 310 can also be used as a transistor constituting a pixel circuit, or as a transistor constituting a drive circuit (gate line drive circuit, source line drive circuit) for driving the pixel circuit. Furthermore, transistors 310, as well as transistors 320b1, 320c, 320a, and 320b, can be used as transistors constituting various circuits such as arithmetic circuits or memory circuits.

[0252] Furthermore, the capacitance 240 and the capacitance with the insulating layer 243 as a dielectric can be used as capacitances that constitute a pixel circuit.

[0253] For layers 30 and 60, refer to the display device 400A shown in Figure 22.

[0254] This configuration allows for the formation of not only pixel circuits but also drive circuits and other components directly beneath the light-emitting element, making it possible to miniaturize the display device compared to cases where the drive circuits are located around the display area.

[0255] [Display device 400C] The display device 400C shown in Figure 24 differs from the display device 400B shown in Figure 23 in that, in layer 20, there is a capacitance 240c between the insulating layer 261 and the conductive layer 252, and in layer 30, there is a capacitance 240b between the insulating layer 258 and the insulating layer 260. Note that explanations of parts similar to those of display device 400A or 400B may be omitted.

[0256] The display device 400C shown in Figure 24 has, in layer 20, a conductive layer 251 on an insulating layer 261, an insulating layer 270 on the conductive layer 251, an insulating layer 262 on the insulating layer 270, and a conductive layer 252 on the insulating layer 262. In addition, a capacitance, for example capacitance 240c, is provided on the insulating layer 261 with the insulating layer 270 as the dielectric.

[0257] The display device 400C shown in Figure 24 has, in layer 30, transistors 320b1, 320c, 320a, and 320b2, capacitors 240 and 240b, and conductive layers 271a and 271c.

[0258] In Figure 24, the conductive layers 325a of transistors 320b1, 320c, 320a, and 320b2 are each provided on the insulating layer 265 and are electrically connected to a capacitive element, such as capacitor 240, which has the insulating layer 243 as the dielectric. The display device 400C has an insulating layer 255 on the capacitive element, which has the insulating layer 243 as the dielectric, an insulating layer 258 on the insulating layer 255, an insulating layer 266 on the insulating layer 258, an insulating layer 267 on the insulating layer 266, an insulating layer 268 on the insulating layer 267, an insulating layer 269 on the insulating layer 268, and an insulating layer 260 on the insulating layer 269. A capacitor, such as capacitor 240b, which has the insulating layer 268 as the dielectric, is provided on the insulating layer 266. Conductive layers 271a and 271c are also provided on the insulating layer 266. In Figure 24, an example is shown in which the conductive layers 271a and 271c are formed to be embedded in the insulating layer 267, but the conductive layers 271a and 271c may also be placed within other insulating layers.

[0259] Furthermore, the display device 400C may have capacitance with an insulating layer that functions as a gate insulator for a transistor with a channel formed on the substrate 301, and the insulating layer is a dielectric.

[0260] Furthermore, capacitors with an insulating layer 268 as the dielectric, such as capacitor 240b, capacitors with an insulating layer 270 as the dielectric, such as capacitor 240c, and capacitors with an insulating layer that functions as a gate insulator for a transistor with a channel formed on the substrate 301 as the dielectric can be used as capacitors constituting a pixel circuit.

[0261] The configuration examples illustrated in this embodiment, and the corresponding drawings, etc., can be appropriately combined with other configuration examples or drawings, etc., at least in part.

[0262] (Embodiment 3) This embodiment describes a light-emitting element according to one aspect of the present invention.

[0263] [Example of a light-emitting element configuration] Figure 25A shows an example of a light-emitting element in a display device according to one aspect of the present invention.

[0264] FIG. 25A shows a cross-sectional view of a plurality of light-emitting elements provided on layer 30. In the cross-sectional view shown in FIG. 25A, a light-emitting element 430b1, a light-emitting element 430c, a light-emitting element 430a, and a light-emitting element 430b2 are provided on layer 30. The light-emitting element 430a has a pixel electrode 111R, an EL layer 112R, and a common electrode 113. The light-emitting elements 430b1 and 430b2 have a pixel electrode 111G, an EL layer 112G, and a common electrode 113. The light-emitting element 430c has a pixel electrode 111B, an EL layer 112B, and a common electrode 113. Hereinafter, the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B may be collectively referred to as the pixel electrode 111.

[0265] The pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B are each electrically connected to a semiconductor element included in layer 30. In FIGS. 22 and 23, the pixel electrode 111G included in the light-emitting element 430b1 is electrically connected to one of the source and drain of the transistor 320b1. Also, the pixel electrode 111B included in the light-emitting element 430c is electrically connected to one of the source and drain of the transistor 320c. Also, the pixel electrode 111R included in the light-emitting element 430a is electrically connected to one of the source and drain of the transistor 320a. Also, the pixel electrode 111G included in the light-emitting element 430b2 is electrically connected to one of the source and drain of the transistor 320b2.

[0266] An EL layer 112R, an EL layer 112G, and an EL layer 112B are provided on the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B, respectively. A common electrode 113 is provided on the EL layer 112R, the EL layer 112G, and the EL layer 112B (hereinafter collectively referred to as the EL layer 112).

[0267] The EL layer 112R has a light-emitting organic compound that emits light having intensity in at least the red wavelength range. The EL layer 112G has a light-emitting organic compound that emits light having intensity in at least the green wavelength range. The EL layer 112B has a light-emitting organic compound that emits light having intensity in at least the blue wavelength range.

[0268] EL layer 112R, EL layer 112G, and EL layer 112B each have a layer (luminescent layer) containing a luminescent organic compound. The luminescent layer may contain one or more types of compounds (host material, assist material) in addition to the luminescent substance (guest material). As the host material and assist material, one or more types of materials having an energy gap larger than the energy gap of the luminescent substance (guest material) can be selected and used. It is preferable to use a combination of compounds that form an excited complex as the host material and assist material. In order to efficiently form an excited complex, it is particularly preferable to combine a compound that readily accepts holes (hole transport material) and a compound that readily accepts electrons (electron transport material).

[0269] The light-emitting element can be made from either low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds (such as quantum dot materials).

[0270] Each of the EL layers 112R, 112G, and 112B may have, in addition to the light-emitting layer, one or more of the following: an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.

[0271] Furthermore, a common layer 114 may be provided between the EL layer 112 and the common electrode 113. The common layer 114, like the common electrode 113, is provided across multiple light-emitting elements. The common layer 114 covers the EL layer 112R, EL layer 112G, and EL layer 112B. By having a configuration with a common layer 114, the manufacturing process can be simplified, thereby reducing manufacturing costs. The common layer 114 and the common electrode 113 can be formed continuously without intervening processes such as etching. Therefore, the interface between the common layer 114 and the common electrode can be made a clean surface, and good characteristics can be obtained in the light-emitting element.

[0272] The common layer 114 is preferably in contact with one or more of the upper surfaces of the EL layer 112R, EL layer 112G, and EL layer 112B.

[0273] Preferably, the EL layer 112R, EL layer 112G, and EL layer 112B each have an emissive layer containing an emissive material that emits at least one color. Furthermore, it is preferable that the common layer 114 is a layer containing one or more of the following: an electron injection layer, an electron transport layer, a hole injection layer, or a hole transport layer. In a light-emitting element where the pixel electrode is the anode and the common electrode is the cathode, the common layer 114 can be configured to include, for example, an electron injection layer, or a configuration that includes both an electron injection layer and an electron transport layer.

[0274] Pixel electrodes 111R, 111G, and 111B are provided for each light-emitting element. A common electrode 113 is provided as a continuous layer common to each light-emitting element. A conductive film that is transparent to visible light is used on either each pixel electrode or the common electrode 113, and a conductive film that is reflective is used on the other. By making each pixel electrode transparent and the common electrode 113 reflective, a bottom-emission type display device can be made. Conversely, by making each pixel electrode reflective and the common electrode 113 transparent, a top-emission type display device can be made. Furthermore, by making both each pixel electrode and the common electrode 113 transparent, a dual-emission type display device can be made.

[0275] When a conductive film reflective to visible light is used as the pixel electrode 111, for example, silver, aluminum, titanium, tantalum, molybdenum, platinum, gold, titanium nitride, tantalum nitride, etc. can be used. Alternatively, an alloy can be used as the pixel electrode 111. For example, an alloy containing silver can be used. As an example of a silver-containing alloy, an alloy containing silver, palladium, and copper can be used. Alternatively, an alloy containing aluminum can be used. Furthermore, these materials may be used in stacks of two or more layers.

[0276] Furthermore, as the pixel electrode 111, a conductive film that is transparent to visible light can be used on a conductive film that is reflective to visible light. Conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, zinc oxide containing gallium, indium tin oxide containing silicon, and indium zinc oxide containing silicon can be used as the conductive material that is transparent to visible light. Alternatively, an oxide of a conductive material that is reflective to visible light may be used, and this oxide may be formed by oxidizing the surface of a conductive material that is reflective to visible light. Specifically, for example, titanium oxide may be used. Titanium oxide may be formed, for example, by oxidizing the surface of titanium.

[0277] By providing an oxide on the surface of the pixel electrode 111, oxidation reactions with the pixel electrode 111 during the formation of the EL layer 112 can be suppressed.

[0278] Furthermore, by laminating a conductive film that is transparent to visible light on a conductive film that is reflective to visible light as the pixel electrode 111, the conductive film that is transparent to visible light can function as an optical adjustment layer.

[0279] The optical path length can be adjusted by having an optical adjustment layer in the pixel electrode 111. The optical path length in each light-emitting element corresponds, for example, to the sum of the thickness of the optical adjustment layer and the thickness of the layer provided below the film containing the luminescent compound in the EL layer 112.

[0280] In light-emitting elements, a microcavity structure (micro-resonator structure) can be used to vary the optical path length, thereby intensifying light of a specific wavelength. This makes it possible to realize a display device with improved color purity.

[0281] For example, a microcavity structure can be realized by varying the thickness of the EL layer 112 in each light-emitting element. For instance, the EL layer 112R of the light-emitting element 430a, which emits the longest wavelength light, can be made the thickest, while the EL layer 112B of the light-emitting element 430c, which emits the shortest wavelength light, can be made the thinnest. However, this is not limited to this configuration, and the thickness of each EL layer can be adjusted by considering the wavelength of light emitted by each light-emitting element, the optical properties of the layers constituting the light-emitting element, and the electrical properties of the light-emitting element.

[0282] In Figure 25A and other diagrams, for the sake of simplification, the thickness of the EL layer 112 in each light-emitting element is not clearly shown to be different. However, as described above, it is preferable to adjust the thickness of each light-emitting element appropriately to adjust the optical path length and to intensify the light of the wavelength corresponding to each light-emitting element.

[0283] It is preferable that an insulating layer be provided between adjacent light-emitting elements 430.

[0284] Figure 25A shows an example in which an insulating layer 131 is provided between each pixel electrode 111 and between each EL layer 112 of the light-emitting element 430. A common electrode 113 is also provided on the insulating layer 131.

[0285] The insulating layer 131 comprises insulating layer 131a and insulating layer 131b. Insulating layer 131b is provided so as to be in contact with the side surfaces of each pixel electrode 111 of the light-emitting element 430 and the side surfaces of the EL layer 112. In cross-sectional view, insulating layer 131a is provided in contact with insulating layer 131b so as to fill the recesses of insulating layer 131b.

[0286] By providing an insulating layer 131 between light-emitting elements of different colors, contact between the EL layer 112R, EL layer 112G, and EL layer 112G can be suppressed. This effectively prevents current from flowing through two adjacent EL layers and causing unintended light emission. As a result, contrast can be enhanced, and a display device with high display quality can be realized.

[0287] The insulating layer 131b can be an insulating layer made of an inorganic material. As the insulating layer 131b, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon oxide, silicon oxynitride, silicon nitride, or silicon nitride oxide can be used alone or in a stacked manner. In particular, aluminum oxide is preferable because it has a high selectivity ratio with the EL layer 112 in etching and has a function of protecting the EL layer 112 in the formation of the insulating layer 131b described later. In particular, by using an inorganic insulating material such as aluminum oxide, hafnium oxide, or silicon oxide formed by the ALD method as the insulating layer 131b, a film with few pinholes can be obtained, and the insulating layer 131b excellent in the function of protecting the EL layer 112 can be obtained.

[0288] In this specification, oxynitride refers to a material having a higher oxygen content than nitrogen in its composition, and oxynitride refers to a material having a higher nitrogen content than oxygen in its composition. For example, when silicon oxynitride is described, it refers to a material having a higher oxygen content than nitrogen in its composition, and when silicon nitride oxide is described, it indicates a material having a higher nitrogen content than oxygen in its composition.

[0289] For the formation of the insulating layer 131b, a sputtering method, a chemical vapor deposition (CVD) method, a molecular beam epitaxy (MBE) method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like can be used. For the formation of the insulating layer 131b, the ALD method with good coating properties can be preferably used.

[0290] The insulating layer 131a provided on the insulating layer 131b has the function of flattening the recess in the insulating layer 131b formed between adjacent light-emitting elements. In other words, the presence of the insulating layer 131a improves the flatness of the surface on which the common electrode 113 is formed. As the insulating layer 131a, an insulating layer having an organic material can be suitably used. For example, acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimidoamide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins can be applied as the insulating layer 131a. In addition, a photosensitive resin can be used as the insulating layer 131a. The photosensitive resin can be a positive-type material or a negative-type material.

[0291] By forming the insulating layer 131a using a photosensitive resin, the insulating layer 131a can be manufactured using only exposure and development processes, thereby reducing the impact on the surface of the EL layer 112 due to dry etching or wet etching during the formation of the insulating layer 131a.

[0292] Alternatively, as shown in Figure 25B, the insulating layer provided between adjacent light-emitting elements 430 may be provided on the pixel electrode 111.

[0293] Figure 25B shows an example in which an insulating layer 132 is provided between each pixel electrode 111 of the light-emitting element 430, and on a portion of the pixel electrode 111.

[0294] For example, the insulating layer 132 can be made of a material that can be used for the insulating layer 131a.

[0295] As shown in Figure 25B, the upper surface of the insulating layer 132 may have a region in contact with the lower surface of the EL layer 112. Also, a portion of the upper surface of the insulating layer 132 may have a region in contact with the common layer 114 between the EL layers 112 of each light-emitting element. Alternatively, if the light-emitting element 430 does not have a common layer 114, a portion of the upper surface of the insulating layer 132 may have a region in contact with the common electrode 113 between the EL layers 112 of each light-emitting element.

[0296] The configuration examples illustrated in this embodiment, and the corresponding drawings, etc., can be appropriately combined with other configuration examples or drawings, etc., at least in part.

[0297] (Embodiment 4) In this embodiment, a light-emitting element (also called a light-emitting device) that can be used in a display device according to one aspect of the present invention will be described.

[0298] <Example of light-emitting device configuration> As shown in Figure 26A, the light-emitting device has an EL layer 786 between a pair of electrodes (lower electrode 772, upper electrode 788). The EL layer 786 can be composed of multiple layers, such as layer 4420, light-emitting layer 4411, and layer 4430. Layer 4420 may include, for example, a layer containing a material with high electron injection properties (electron injection layer) and a layer containing a material with high electron transport properties (electron transport layer). Light-emitting layer 4411 may include, for example, a light-emitting compound. Layer 4430 may include, for example, a layer containing a material with high hole injection properties (hole injection layer) and a layer containing a material with high hole transport properties (hole transport layer).

[0299] A configuration having a layer 4420, an emissive layer 4411, and a layer 4430 provided between a pair of electrodes can function as a single emissive unit, and in this specification, the configuration shown in Figure 26A is referred to as a single structure.

[0300] Furthermore, Figure 26B shows a modified example of the EL layer 786 of the light-emitting device shown in Figure 26A. Specifically, the light-emitting device shown in Figure 26B has a layer 4430-1 on the lower electrode 772, a layer 4430-2 on layer 4430-1, a light-emitting layer 4411 on layer 4430-2, a layer 4420-1 on the light-emitting layer 4411, a layer 4420-2 on layer 4420-1, and an upper electrode 788 on layer 4420-2. For example, when the lower electrode 772 is the anode and the upper electrode 788 is the cathode, layer 4430-1 functions as a hole injection layer, layer 4430-2 functions as a hole transport layer, layer 4420-1 functions as an electron transport layer, and layer 4420-2 functions as an electron injection layer. Alternatively, when the lower electrode 772 is used as the cathode and the upper electrode 788 is used as the anode, layer 4430-1 functions as an electron injection layer, layer 4430-2 functions as an electron transport layer, layer 4420-1 functions as a hole transport layer, and layer 4420-2 functions as a hole injection layer. By using such a layer structure, it is possible to efficiently inject carriers into the light-emitting layer 4411 and increase the efficiency of carrier recombination within the light-emitting layer 4411.

[0301] Furthermore, as shown in Figures 26C and 26D, a configuration in which multiple light-emitting layers (light-emitting layers 4411, 4412, and 4413) are provided between layer 4420 and layer 4430 is also a variation of the single structure.

[0302] Furthermore, as shown in Figures 26E and 26F, a configuration in which multiple light-emitting units (EL layer 786a, EL layer 786b) are connected in series via an intermediate layer (charge generation layer) 4440 is referred to as a tandem structure in this specification. In this specification, the configuration shown in Figures 26E and 26F is referred to as a tandem structure, but it is not limited to this, and for example, a tandem structure may also be called a stack structure. By using a tandem structure, a light-emitting device capable of high-brightness light emission can be made.

[0303] In Figure 26C, the light-emitting layers 4411, 4412, and 4413 may be made of the same light-emitting material.

[0304] Furthermore, different light-emitting materials may be used for the light-emitting layers 4411, 4412, and 4413. When the light emitted by the light-emitting layers 4411, 4412, and 4413 are complementary in color, white light emission is obtained. Figure 26D shows an example in which a colored layer 785, which functions as a color filter, is provided. By passing white light through the color filter, light of the desired color can be obtained.

[0305] Furthermore, in Figure 26E, the same light-emitting material may be used for both the light-emitting layer 4411 and the light-emitting layer 4412. Alternatively, light-emitting materials that emit different types of light may be used for both the light-emitting layer 4411 and the light-emitting layer 4412. When the light emitted by the light-emitting layer 4411 and the light emitted by the light-emitting layer 4412 are complementary colors, white light emission is obtained. Figure 26F shows an example in which a colored layer 785 is further provided.

[0306] Furthermore, in Figures 26C, 26D, 26E, and 26F, as shown in Figure 26B, layer 4420 and layer 4430 may be a laminated structure consisting of two or more layers.

[0307] A structure that generates different light-emitting colors (in this case, blue (B), green (G), and red (R)) for each light-emitting device is sometimes called an SBS (Side By Side) structure.

[0308] The light-emitting color of the light-emitting device can be red, green, blue, cyan, magenta, yellow, or white, depending on the material that makes up the EL layer 786. Furthermore, the color purity can be further enhanced by adding a microcavity structure to the light-emitting device.

[0309] A light-emitting device that emits white light preferably has a configuration that includes two or more types of light-emitting materials in its light-emitting layer. To obtain white light emission, it is sufficient to select light-emitting materials such that the light emitted by each of the two or more materials is complementary in color. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary, a light-emitting device that emits white light as a whole can be obtained. The same applies to light-emitting devices that have three or more light-emitting layers.

[0310] The light-emitting layer preferably contains two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), and O (orange). Alternatively, it is preferable to have two or more light-emitting materials, and for each light-emitting material to emit light that contains spectral components of two or more colors from R, G, and B.

[0311] Here, we will describe a specific example of the configuration of a light-emitting device.

[0312] The light-emitting device has at least a light-emitting layer. The light-emitting device may also have layers other than the light-emitting layer that include a material with high hole injection properties, a material with high hole transport properties, a hole-blocking material, a material with high electron transport properties, an electron-blocking material, a material with high electron injection properties, or a bipolar material (a material with high electron transport and hole transport properties).

[0313] The light-emitting device may use either low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds. The layers constituting the light-emitting device can be formed by methods such as vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating.

[0314] For example, a light-emitting device can have a configuration that includes one or more layers from among a hole injection layer, a hole transport layer, a hole blocking layer, an electron blocking layer, an electron transport layer, and an electron injection layer.

[0315] The hole injection layer is a layer that injects holes from the anode into the hole transport layer, and is a layer containing a material with high hole injection capabilities. Examples of materials with high hole injection capabilities include aromatic amine compounds and composite materials containing hole transport materials and acceptor materials (electron-accepting materials).

[0316] The hole transport layer is a layer that transports holes injected from the anode by the hole injection layer to the light-emitting layer. The hole transport layer is a layer containing a hole-transporting material. As for the hole-transporting material, 10 -6 cm 2Materials having a hole mobility of / Vs or higher are preferred. However, other materials can also be used as long as they have higher hole transport capabilities than electron transport. Preferred hole transport materials include π-electron-rich heteroaromatic compounds (e.g., carbazole derivatives, thiophene derivatives, furan derivatives, etc.) and aromatic amines (compounds having an aromatic amine skeleton), which are materials with high hole transport capabilities.

[0317] The electron transport layer is a layer that transports electrons injected from the cathode by the electron injection layer to the light-emitting layer. The electron transport layer is a layer containing an electron-transporting material. The electron-transporting material is 1 × 10⁻¹⁶ -6 cm 2 Materials having an electron mobility of / Vs or higher are preferred. However, other materials can also be used as long as they have higher electron transport capabilities than holes. Examples of electron-transporting materials include metal complexes having a quinoline skeleton, metal complexes having a benzoquinoline skeleton, metal complexes having an oxazole skeleton, metal complexes having a thiazole skeleton, as well as oxadiazole derivatives, triazole derivatives, imidazole derivatives, oxazole derivatives, thiazole derivatives, phenanthroline derivatives, quinoline derivatives having a quinoline ligand, benzoquinoline derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, pyridine derivatives, bipyridine derivatives, pyrimidine derivatives, and other π-electron-deficient heteroaromatic compounds containing nitrogen-containing heteroaromatic compounds.

[0318] The electron injection layer is a layer that injects electrons from the cathode to the electron transport layer, and is a layer containing a material with high electron injection capabilities. Alkali metals, alkaline earth metals, or compounds thereof can be used as materials with high electron injection capabilities. Composite materials containing both electron transport materials and donor materials (electron-donating materials) can also be used as materials with high electron injection capabilities.

[0319] Examples of electron injection layers include lithium, cesium, lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF2), 8-(quinolinolato)lithium (abbreviated as Liq), 2-(2-pyridyl)phenolate (abbreviated as LiPP), 2-(2-pyridyl)-3-pyridinolatritium (abbreviated as LiPPy), 4-phenyl-2-(2-pyridyl)phenolate (abbreviated as LiPPP), and lithium oxide (LiO2). x ), alkali metals such as cesium carbonate, alkaline earth metals, or compounds thereof can be used.

[0320] Alternatively, an electron-transporting material may be used as the electron injection layer described above. For example, a compound having a lone pair of electrons and an electron-deficient heteroaromatic ring can be used as the electron-transporting material. Specifically, a compound having at least one of a pyridine ring, a diazine ring (pyrimidine ring, pyrazine ring, pyridazine ring), or a triazine ring can be used.

[0321] Furthermore, it is preferable that the lowest unoccupied molecular orbital (LUMO) of an organic compound containing a lone pair of electrons is between -3.6 eV and -2.3 eV. In general, the highest occupied molecular orbital (HOMO) level and LUMO level of an organic compound can be estimated by methods such as cyclic voltammetry (CV), photoelectron spectroscopy, optical absorption spectroscopy, and inverse photoelectron spectroscopy.

[0322] For example, 4,7-diphenyl-1,10-phenanthroline (abbreviated as BPhen), 2,9-di(naphthalene-2-yl)-4,7-diphenyl-1,10-phenanthroline (abbreviated as NBPhen), diquinoxalino[2,3-a:2',3'-c]phenazine (abbreviated as HATNA), and 2,4,6-tris[3'-(pyridine-3-yl)biphenyl-3-yl]-1,3,5-triazine (abbreviated as TmPPPyTz) can be used in organic compounds containing lone pairs of electrons. NBPhen has a higher glass transition temperature (Tg) and superior heat resistance compared to BPhen.

[0323] The luminescent layer is a layer containing a luminescent material. The luminescent layer may contain one or more types of luminescent materials. Suitable luminescent materials include those exhibiting colors such as blue, purple, blue-violet, green, yellow-green, yellow, orange, and red. Furthermore, materials emitting near-infrared light may also be used as luminescent materials.

[0324] Examples of luminescent materials include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0325] Examples of fluorescent materials include pyrene derivatives, anthracene derivatives, triphenylene derivatives, fluorene derivatives, carbazole derivatives, dibenzothiophene derivatives, dibenzofuran derivatives, dibenzoquinoxaline derivatives, quinoxaline derivatives, pyridine derivatives, pyrimidine derivatives, phenanthrene derivatives, and naphthalene derivatives.

[0326] Examples of phosphorescent materials include organometallic complexes (especially iridium complexes) having a 4H-triazole skeleton, 1H-triazole skeleton, imidazole skeleton, pyrimidine skeleton, pyrazine skeleton, or pyridine skeleton; organometallic complexes (especially iridium complexes) using phenylpyridine derivatives having electron-withdrawing groups as ligands; platinum complexes; and rare earth metal complexes.

[0327] The light-emitting layer may contain one or more types of organic compounds (host material, assist material, etc.) in addition to the light-emitting substance (guest material). One or more of these organic compounds may be hole-transporting materials and / or electron-transporting materials. Alternatively, one or more of these organic compounds may be bipolar materials or TADF materials.

[0328] The light-emitting layer preferably comprises, for example, a phosphorescent material and a combination of a hole-transporting material and an electron-transporting material that readily forms an excitation complex. This configuration allows for efficient emission using ExTET (Exciplex-Triplet Energy Transfer), which is energy transfer from the excitation complex to the light-emitting substance (phosphorescent material). By selecting a combination that forms an excitation complex that exhibits emission overlapping with the wavelength of the lowest-energy absorption band of the light-emitting substance, energy transfer becomes smoother, and light emission can be obtained efficiently. This configuration simultaneously achieves high efficiency, low-voltage operation, and a long lifespan for the light-emitting device.

[0329] This embodiment can be combined with other embodiments as appropriate.

[0330] (Embodiment 5) This embodiment describes metal oxides (also called oxide semiconductors) that can be used in the OS transistor described in the above embodiment.

[0331] The metal oxide preferably contains at least indium or zinc. It is particularly preferable that it contains indium and zinc. In addition, it is preferable that it contains aluminum, gallium, yttrium, tin, etc. It may also contain one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc.

[0332] Furthermore, metal oxides can be formed by methods such as sputtering, chemical vapor deposition (CVD) methods including metal-organic chemical vapor deposition (MOCVD), or atomic layer deposition (ALD).

[0333] <Classification of crystal structures> Examples of crystalline structures for oxide semiconductors include amorphous (including completely amorphous), CAAC (c-axis-aligned crystalline), nc (nanocrystalline), CAC (cloud-aligned composite), single crystal, and polycrystal.

[0334] The crystal structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. For example, it can be evaluated using the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement. The GIXD method is also known as the thin-film method or the Seemann-Bohlin method.

[0335] For example, in a quartz glass substrate, the peak shape of the XRD spectrum is nearly symmetrical. On the other hand, in an IGZO film with a crystalline structure, the peak shape of the XRD spectrum is asymmetrical. The asymmetrical shape of the XRD spectrum peak clearly indicates the presence of crystals in the film or substrate. In other words, if the peak shape of the XRD spectrum is not symmetrical, the film or substrate cannot be said to be in an amorphous state.

[0336] Furthermore, the crystalline structure of a film or substrate can be evaluated by the diffraction pattern (also called the nano-beam electron diffraction pattern) observed using nano-beam electron diffraction (NBED). For example, a halo is observed in the diffraction pattern of a quartz glass substrate, confirming that the quartz glass is in an amorphous state. However, in the diffraction pattern of an IGZO film deposited at room temperature, a spot-like pattern is observed instead of a halo. Therefore, it is presumed that an IGZO film deposited at room temperature is in an intermediate state, neither crystalline nor amorphous, and cannot be concluded to be in an amorphous state.

[0337] <<Oxide semiconductor structure>> It should be noted that oxide semiconductors may be classified differently from those described above when considering their structure. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors also include polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0338] Here, we will explain the details of the CAAC-OS, nc-OS, and a-like OS mentioned above.

[0339] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, the c-axis of which is oriented in a specific direction. This specific direction is the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If we consider the atomic arrangement as a lattice arrangement, then a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC-OS has regions where multiple crystalline regions are connected in the ab-plane direction, and these regions may exhibit distortion. Distortion refers to a point in the connected region where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement. In short, CAAC-OS is an oxide semiconductor that is c-axis oriented and does not exhibit clear orientation in the ab-plane direction.

[0340] Each of the multiple crystalline regions described above is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of a single minute crystal, the maximum diameter of that crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of that crystalline region may be around several tens of nanometers.

[0341] Furthermore, in In-M-Zn oxides (where element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystalline structure (also called a layered structure) consisting of layers containing indium (In) and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer). Note that indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain element M. Also, the In layer may contain Zn. This layered structure can be observed, for example, as a lattice image in high-resolution TEM (Transmission Electron Microscope) images.

[0342] When structural analysis of a CAAC-OS film is performed using an XRD instrument, for example, out-of-plane XRD measurements using θ / 2θ scanning show a peak indicating c-axis orientation at 2θ = 31° or nearby. Note that the position of the c-axis orientation peak (value of 2θ) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0343] Furthermore, for example, multiple bright spots are observed in the electron diffraction pattern of a CAAC-OS film. These spots are observed at point-symmetric positions with respect to the incident electron beam spot (also called the direct spot) that passed through the sample.

[0344] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, the strain may have lattice arrangements such as pentagons or heptagons. Moreover, in CAAC-OS, clear grain boundaries cannot be observed even near the strain. In other words, it can be seen that the formation of grain boundaries is suppressed by the strain in the lattice arrangement. This is thought to be because CAAC-OS can tolerate strain due to the sparse arrangement of oxygen atoms in the ab-plane direction, or because the bond distance between atoms changes due to the substitution of metal atoms.

[0345] A crystal structure in which clear grain boundaries are observed is called a polycrystal. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in transistor on-current and field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not observed, is one of the crystalline oxides with a suitable crystal structure for the semiconductor layer of a transistor. In addition, a structure containing Zn is preferred for the composition of CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they suppress the generation of grain boundaries more than In oxide.

[0346] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. Furthermore, since the crystallinity of oxide semiconductors can decrease due to the inclusion of impurities or the generation of defects, CAAC-OS can be said to be an oxide semiconductor with few impurities or defects (such as oxygen vacancies). Consequently, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors allows for greater flexibility in the manufacturing process.

[0347] [nc-OS] nc-OS exhibits periodicity in atomic arrangement in minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). In other words, nc-OS contains minute crystals. These minute crystals are also called nanocrystals because their size is, for example, between 1 nm and 10 nm, particularly between 1 nm and 3 nm. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS or amorphous oxide semiconductors. For example, when structural analysis of an nc-OS film is performed using an XRD instrument, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Also, when electron diffraction (also called limited-field electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter larger than that of the nanocrystals (e.g., 50 nm or larger), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern may be obtained in which multiple spots are observed within a ring-shaped region centered on a direct spot.

[0348] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0349] <<Oxide Semiconductor Composition>> Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS refers to the material composition.

[0350] [CAC-OS] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing these metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0351] Furthermore, CAC-OS is a composite metal oxide having a mosaic-like structure formed by the separation of the material into a first region and a second region, with the first region distributed within the film (hereinafter also referred to as a cloud-like structure). In other words, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0352] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is the region where [In] is greater than the [In] in the second region, and [Ga] is smaller than the [Ga] in the second region. The second region is the region where [Ga] is greater than the [Ga] in the first region, and [In] is smaller than the [In] in the first region.

[0353] Specifically, the first region described above is a region whose main components are indium oxide, indium zinc oxide, etc. The second region described above is a region whose main components are gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region whose main component is In. Similarly, the second region can be rephrased as a region whose main component is Ga.

[0354] Furthermore, a clear boundary may not be observed between the first region and the second region described above.

[0355] Furthermore, CAC-OS in In-Ga-Zn oxide refers to a material composition containing In, Ga, Zn, and O, in which regions with Ga as the main component and regions with In as the main component are arranged in a mosaic-like manner, with these regions existing randomly. Therefore, it is presumed that CAC-OS has a structure in which metal elements are unevenly distributed.

[0356] CAC-OS can be formed, for example, by sputtering under conditions where the substrate is not heated. When forming CAC-OS by sputtering, one or more gases selected from inert gases (typically argon), oxygen gas, and nitrogen gas may be used as the film-forming gas. Furthermore, it is preferable that the ratio of the oxygen gas flow rate to the total flow rate of the film-forming gas during film formation be as low as possible. For example, it is preferable that the ratio of the oxygen gas flow rate to the total flow rate of the film-forming gas during film formation be 0% or more and less than 30%, preferably 0% or more and 10% or less.

[0357] Furthermore, for example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) confirms that it has a structure in which regions mainly composed of In (first region) and regions mainly composed of Ga (second region) are unevenly distributed and mixed.

[0358] Here, the first region is a region with higher conductivity compared to the second region. In other words, the conductivity of the metal oxide is exhibited when carriers flow through the first region. Therefore, a high field-effect mobility (μ) can be achieved when the first region is distributed in a cloud-like manner within the metal oxide.

[0359] On the other hand, the second region is a region with higher insulating properties compared to the first region. In other words, the distribution of the second region within the metal oxide can suppress leakage current.

[0360] Therefore, when using CAC-OS in a transistor, the conductivity caused by the first region and the insulating property caused by the second region act complementarily, enabling the function of switching (on / off function) to be imparted to the CAC-OS. That is, CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be enhanced to the maximum extent. Therefore, by using CAC-OS in a transistor, a high on-current (I on )、high field-effect mobility (μ), and good switching operation can be realized.

[0361] In addition, a transistor using CAC-OS has high reliability. Therefore, CAC-OS is optimal for various semiconductor devices including display devices.

[0362] Oxide semiconductors have various structures and each has different characteristics. The oxide semiconductor according to one aspect of the present invention may have two or more of amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0363] <Transistor having an oxide semiconductor> Subsequently, the case of using the above oxide semiconductor in a transistor will be described.

[0364] By using the above oxide semiconductor in a transistor, a transistor with high field-effect mobility can be realized. In addition, a highly reliable transistor can be realized.

[0365] It is preferable to use an oxide semiconductor with a low carrier concentration in the transistor. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 or less, preferably 1×10 15 cm -3 or less, and more preferably 1×10 13 cm -3More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm -3 This concludes the explanation. Furthermore, when lowering the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film should be lowered to reduce the defect level density. In this specification, a low impurity concentration and low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that oxide semiconductors with low carrier concentrations are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0366] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic may have a low trap level density due to their low defect level density.

[0367] Furthermore, charges trapped in the trap levels of oxide semiconductors can take a long time to disappear, sometimes behaving like fixed charges. Therefore, transistors in which channel formation regions are formed in oxide semiconductors with a high trap level density may exhibit unstable electrical properties.

[0368] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0369] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0370] In oxide semiconductors, the presence of silicon or carbon, which are Group 14 elements, leads to the formation of defect levels in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are compared by 2 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0371] Furthermore, if an oxide semiconductor contains alkali metals or alkaline earth metals, it may form defect levels and generate carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to exhibit normally-on characteristics. For this reason, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor obtained by SIMS should be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0372] Furthermore, in oxide semiconductors, the presence of nitrogen generates electrons, which act as carriers, increasing the carrier concentration and making it easier for the semiconductor to become n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to exhibit normally-on characteristics. Alternatively, the presence of nitrogen in oxide semiconductors can lead to the formation of trap levels. As a result, the electrical properties of the transistor may become unstable. For this reason, the nitrogen concentration in oxide semiconductors obtained by SIMS should be set to 5 × 10⁻⁶. 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:

[0373] Furthermore, hydrogen contained in oxide semiconductors can react with oxygen bonded to metal atoms to form water, potentially creating oxygen vacancies. Hydrogen can then fill these vacancies, generating electrons, which act as carriers. Additionally, some of the hydrogen can combine with oxygen bonded to metal atoms to generate electrons. Therefore, transistors using oxide semiconductors containing hydrogen tend to exhibit normally-on characteristics. For this reason, it is preferable to reduce the hydrogen content in oxide semiconductors as much as possible. Specifically, in oxide semiconductors, the hydrogen concentration obtained by SIMS should be 1 × 10⁻⁶. 20 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0374] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be provided.

[0375] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0376] (Embodiment 6) In this embodiment, an electronic device according to one aspect of the present invention will be described with reference to Figures 27 to 30.

[0377] The electronic device of this embodiment has a display device according to one aspect of the present invention. The display device according to one aspect of the present invention is easily made high-definition, high-resolution, and large-scale. Therefore, the display device according to one aspect of the present invention can be used in the display units of various electronic devices.

[0378] Furthermore, since the display device according to one aspect of the present invention can be manufactured at a low cost, the manufacturing cost of electronic devices can be reduced.

[0379] Examples of electronic devices include television sets, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as other electronic devices with relatively large screens, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, and audio playback devices.

[0380] In particular, a display device according to one aspect of the present invention can be used suitably in electronic devices having a relatively small display area because it can increase resolution. Examples of such electronic devices include information terminals (wearable devices) such as wristwatches and bracelets, as well as wearable devices that can be worn on the head, such as VR devices such as head-mounted displays and AR devices such as glasses. Wearable devices also include devices for SR and MR.

[0381] Furthermore, in one embodiment of the present invention, the display device can increase the area of ​​the display unit by connecting multiple exposure areas, thereby achieving both high resolution and a large display area. Therefore, it is suitable for information terminals (wearable devices) such as wristwatches and bracelets, as it can increase the amount of information such as images and characters displayed on the display unit. It is also suitable for increasing the size of characters displayed on the display unit. In addition, it is suitable for wearable devices that can be worn on the head, such as VR devices, AR devices, MR devices, and SR devices, as it can further enhance immersion, presence, and depth perception.

[0382] A display device according to one aspect of the present invention preferably has an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K2K (3840 x 2160 pixels), or 8K4K (7680 x 4320 pixels). In particular, a resolution of 4K2K, 8K4K, or higher is preferred. Furthermore, the pixel density (resolution) of the display device according to one aspect of the present invention is preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more. By using display devices with such high resolution or high detail, it becomes possible to enhance the sense of presence and depth in personal electronic devices such as portable or home-use devices.

[0383] The electronic device of this embodiment can be incorporated along the curved surfaces of the interior or exterior walls of a house or building, or the interior or exterior of an automobile.

[0384] The electronic device in this embodiment may have an antenna. By receiving signals with the antenna, the display unit can display images and information. Furthermore, if the electronic device has an antenna and a secondary battery, the antenna may be used for contactless power transmission.

[0385] The electronic device of this embodiment may have sensors (including those with the function of measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation).

[0386] The electronic device of this embodiment can have a variety of functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, a function to execute various software (programs), a wireless communication function, a function to read programs or data recorded on a recording medium, and so on.

[0387] The electronic device 6500 shown in Figure 27A is a portable information terminal that can be used as a smartphone.

[0388] The electronic device 6500 includes a housing 6501, a display unit 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508, etc. The display unit 6502 has a touch panel function.

[0389] A display device according to one embodiment of the present invention can be applied to the display unit 6502.

[0390] Figure 27B is a schematic cross-sectional view of the housing 6501, including the end on the microphone 6506 side.

[0391] A light-transmitting protective member 6510 is provided on the display side of the housing 6501, and the display panel 6511, optical member 6512, touch sensor panel 6513, printed circuit board 6517, battery 6518, etc. are arranged in the space enclosed by the housing 6501 and the protective member 6510.

[0392] The protective member 6510 is fixed to the display panel 6511, the optical member 6512, and the touch sensor panel 6513 by an adhesive layer (not shown).

[0393] In the area outside the display unit 6502, a portion of the display panel 6511 is folded back, and the FPC 6515 is connected to this folded portion. IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to terminals provided on the printed circuit board 6517.

[0394] A flexible display (a display device with flexibility) according to one embodiment of the present invention can be applied to the display panel 6511. As a result, an extremely lightweight electronic device can be realized. Furthermore, because the display panel 6511 is extremely thin, a large-capacity battery 6518 can be installed while keeping the thickness of the electronic device low. In addition, by folding back a part of the display panel 6511 and placing the connection part with the FPC 6515 on the back of the pixel area, an electronic device with a narrow bezel can be realized.

[0395] Figure 28A shows an example of a television system. The television system 7100 has a display unit 7000 incorporated into a housing 7101. Here, the housing 7101 is shown supported by a stand 7103.

[0396] A display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0397] The television device 7100 shown in Figure 28A can be operated using the operation switches on the housing 7101 and a separate remote control unit 7111. Alternatively, the display unit 7000 may be equipped with a touch sensor, and the television device 7100 can be operated by touching the display unit 7000 with a finger or the like. The remote control unit 7111 may have a display unit that displays information output from the remote control unit 7111. Channels and volume can be controlled and the image displayed on the display unit 7000 can be controlled using the operation keys or touch panel on the remote control unit 7111.

[0398] The television system 7100 is configured to include a receiver and a modem. The receiver can receive general television broadcasts. Furthermore, by connecting to a wired or wireless communication network via the modem, it is possible to perform one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.

[0399] Figure 28B shows an example of a notebook personal computer. The notebook personal computer 7200 has a casing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, etc. A display unit 7000 is incorporated into the casing 7211.

[0400] A display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0401] Figures 28C and 28D show examples of digital signage.

[0402] The digital signage 7300 shown in Figure 28C comprises a housing 7301, a display unit 7000, and a speaker 7303, etc. Furthermore, it may include LED lamps, operation keys (including a power switch or operation switch), connection terminals, various sensors, a microphone, etc.

[0403] Figure 28D shows a digital signage 7400 mounted on a cylindrical column 7401. The digital signage 7400 has a display unit 7000 that is provided along the curved surface of the column 7401.

[0404] In Figures 28C and 28D, a display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0405] The larger the display area 7000, the more information can be provided at once. Furthermore, a larger display area 7000 is more eye-catching, which can, for example, enhance the effectiveness of advertising.

[0406] Applying a touch panel to the display unit 7000 is preferable because it not only allows images or videos to be displayed on the display unit 7000, but also enables intuitive operation by the user. Furthermore, when used for purposes such as providing route information or traffic information, intuitive operation can enhance usability.

[0407] Furthermore, as shown in Figures 28C and 28D, it is preferable that the digital signage 7300 or digital signage 7400 can be linked wirelessly with an information terminal 7311 or information terminal 7411 such as a smartphone owned by the user. For example, the advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or information terminal 7411. Also, the display on the display unit 7000 can be switched by operating the information terminal 7311 or information terminal 7411.

[0408] Furthermore, the digital signage 7300 or digital signage 7400 can be used to run games using the screen of the information terminal 7311 or information terminal 7411 as the control device (controller). This allows a large number of users to participate in and enjoy the game simultaneously.

[0409] Figure 29A shows the external appearance of the camera 8000 with the viewfinder 8100 attached.

[0410] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, a shutter button 8004, etc. A detachable lens 8006 is also attached to the camera 8000. The lens 8006 and the housing of the camera 8000 may be integrated into a single unit.

[0411] Camera 8000 can take an image by pressing the shutter button 8004 or by touching the display unit 8002, which functions as a touch panel.

[0412] The housing 8001 has a mount with electrodes, and in addition to the viewfinder 8100, a strobe device and the like can be connected to it.

[0413] The viewfinder 8100 includes a housing 8101, a display unit 8102, buttons 8103, etc.

[0414] The housing 8101 is attached to the camera 8000 by a mount that engages with the camera 8000's mount. The viewfinder 8100 can display images and other data received from the camera 8000 on the display unit 8102.

[0415] Button 8103 functions as a power button, etc.

[0416] A display device according to one embodiment of the present invention can be applied to the display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100. The camera 8000 may also have a built-in viewfinder.

[0417] Figure 29B shows the external appearance of the head-mounted display 8200.

[0418] The head-mounted display 8200 includes a mounting section 8201, lenses 8202, a main unit 8203, a display unit 8204, a cable 8205, etc. The mounting section 8201 also has a built-in battery 8206.

[0419] Cable 8205 supplies power from battery 8206 to main unit 8203. Main unit 8203 is equipped with a wireless receiver and can display received video information on display unit 8204. In addition, main unit 8203 is equipped with a camera and can use information about the user's eyeball or eyelid movements as an input means.

[0420] Furthermore, the attachment unit 8201 may be provided with multiple electrodes at a position that touches the user, capable of detecting the current flowing in accordance with the user's eye movements, and may have a function to recognize the user's gaze. It may also have a function to monitor the user's pulse rate based on the current flowing through the electrodes. In addition, the attachment unit 8201 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function to display the user's biometric information on the display unit 8204, or a function to change the image displayed on the display unit 8204 in accordance with the user's head movements.

[0421] A display device according to one aspect of the present invention can be applied to the display unit 8204.

[0422] Figures 29C to 29E show the external appearance of the head-mounted display 8300. The head-mounted display 8300 includes a housing 8301, a display unit 8302, a band-shaped fixing device 8304, and a pair of lenses 8305.

[0423] The user can view the display on the display unit 8302 through the lens 8305. It is preferable to position the display unit 8302 in a curved shape, as this allows the user to experience a greater sense of presence. Furthermore, by viewing different images displayed in different areas of the display unit 8302 through the lens 8305, three-dimensional display using parallax can be performed. Note that the configuration is not limited to a single display unit 8302; two display units 8302 may be provided, with one display unit for each of the user's eyes.

[0424] A display device according to one embodiment of the present invention can be applied to the display unit 8302. This display device according to one embodiment of the present invention can achieve extremely high resolution. For example, even when the display is magnified and viewed using the lens 8305 as shown in Figure 29E, the pixels are difficult for the user to see. In other words, the display unit 8302 can be used to allow the user to view highly realistic images.

[0425] Figure 29F shows the external appearance of a goggle-type head-mounted display 8400. The head-mounted display 8400 has a pair of housings 8401, a mounting part 8402, and a cushioning member 8403. A display unit 8404 and a lens 8405 are provided inside each of the pair of housings 8401. By displaying different images on the pair of display units 8404, a three-dimensional display using parallax can be achieved.

[0426] The user can view the display unit 8404 through the lens 8405. The lens 8405 has a focus adjustment mechanism and its position can be adjusted according to the user's eyesight. The display unit 8404 is preferably a square or a horizontally elongated rectangle. This can enhance the sense of realism.

[0427] The mounting portion 8402 is preferably adjustable to the size of the user's face and has plasticity and elasticity to prevent it from slipping off. Furthermore, it is preferable that a part of the mounting portion 8402 has a vibration mechanism that functions as a bone conduction earphone. This eliminates the need for separate audio equipment such as earphones or speakers, allowing users to enjoy video and audio simply by wearing the device. The housing 8401 may also have a function to output audio data via wireless communication.

[0428] The mounting portion 8402 and the cushioning member 8403 are parts that come into contact with the user's face (forehead, cheeks, etc.). By ensuring that the cushioning member 8403 is in close contact with the user's face, light leakage can be prevented, thereby enhancing the sense of immersion. It is preferable to use a soft material for the cushioning member 8403 so that it adheres closely to the user's face when the user wears the head-mounted display 8400. For example, materials such as rubber, silicone rubber, urethane, and sponge can be used. Furthermore, if the surface of a sponge or similar material is covered with cloth, leather (genuine leather or synthetic leather), gaps are less likely to form between the user's face and the cushioning member 8403, effectively preventing light leakage. In addition, using such materials is preferable because it feels good against the skin and does not make the user feel cold when worn in cold seasons. It is preferable that the components that come into contact with the user's skin, such as the cushioning member 8403 or the mounting portion 8402, are removable, as this makes cleaning or replacement easier.

[0429] The electronic equipment shown in Figures 30A to 30F includes a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or operation switch), connection terminals 9006, sensors 9007 (including functions for measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation), a microphone 9008, etc.

[0430] The electronic devices shown in Figures 30A to 30F have various functions. For example, they may have functions to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date or time, a function to control processing by various software (programs), a wireless communication function, a function to read and process programs or data recorded on a recording medium, etc. However, the functions of electronic devices are not limited to these and can have various functions. Electronic devices may have multiple display units. Furthermore, electronic devices may be equipped with a camera, etc., and have functions to capture still images or videos and save them to a recording medium (external or built into the camera), a function to display the captured images on a display unit, etc.

[0431] A display device according to one embodiment of the present invention can be applied to the display unit 9001.

[0432] Details of the electronic equipment shown in Figures 30A to 30F will be explained below.

[0433] Figure 30A is a perspective view showing a personal digital assistant (PDA) 9101. The PDA 9101 can be used, for example, as a smartphone. The PDA 9101 may also be equipped with a speaker 9003, connection terminals 9006, sensors 9007, etc. The PDA 9101 can also display text and image information on multiple surfaces. Figure 30A shows an example where three icons 9050 are displayed. Information 9051, indicated by a dashed rectangle, can also be displayed on other surfaces of the display unit 9001. Examples of information 9051 include notifications of incoming emails, SNS messages, and phone calls, the subject of emails and SNS messages, the sender's name, date and time, battery level, and antenna signal strength. Alternatively, icons 9050 or the like may be displayed in the location where the information 9051 is displayed.

[0434] Figure 30B is a perspective view showing the personal digital assistant (PDA) 9102. The PDA 9102 has the function of displaying information on three or more sides of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different sides. For example, a user can check information 9053, which is displayed in a position that can be observed from above the PDA 9102, while the PDA 9102 is stored in the breast pocket of their clothing. The user can check the display without taking the PDA 9102 out of their pocket and decide, for example, whether or not to answer a call.

[0435] Figure 30C is a perspective view showing a wristwatch-type personal information terminal 9200. The personal information terminal 9200 can be used, for example, as a smartwatch (registered trademark). The display unit 9001 has a curved display surface, allowing it to display information along the curved surface. The personal information terminal 9200 can also be used for hands-free calls by communicating with, for example, a wireless communication headset. Furthermore, the personal information terminal 9200 can transmit data to other information terminals and be charged via a connection terminal 9006. Charging may be performed by wireless power supply.

[0436] Figures 30D to 30F are perspective views showing a foldable personal information terminal 9201. Figure 30D shows the personal information terminal 9201 in an unfolded state, Figure 30F shows it in a folded state, and Figure 30E shows a perspective view of the state in between, transitioning from one of Figures 30D or 30F to the other. The personal information terminal 9201 offers excellent portability in its folded state and excellent readability of the display due to its seamless, wide display area in its unfolded state. The display unit 9001 of the personal information terminal 9201 is supported by three housings 9000 connected by a hinge 9055. For example, the display unit 9001 can be bent with a radius of curvature of 0.1 mm to 150 mm.

[0437] The configuration examples illustrated in this embodiment, and the corresponding drawings, etc., can be appropriately combined with other configuration examples or drawings, etc., at least in part. [Explanation of Symbols]

[0438] C1: Semiconductor layer, C1a: Semiconductor layer, C1b: Semiconductor layer, C1c: Semiconductor layer, C1d: Semiconductor layer, d1: Distance, d2: Distance, GL1: Wiring, GL2: Wiring, GL3: Wiring, Px: Pixel, Px1: Pixel, Px1a: Pixel, Px1b: Pixel, Px1c: Pixel, Px2: Pixel, Px2a: Pixel, Px2b: Pixel, Px2c: Pixel, Px3: Pixel, Px3a: Pixel, Px3b: Pixel, Px3c: Pixel, V0: Wiring, V0a: Wiring, V0b: Wiring, V0c: Wiring, V0d: Wiring, 1B: Sub-pixel, 1G: Sub-pixel, 1R: Sub-pixel, 2B: Sub-pixel, 2G: Sub-pixel, 2R: Sub-pixel Element, 11: Pixel, 11_1: Pixel, 11_2: Pixel, 11f: Pixel, 11g: Pixel, 12: Wiring, 12a: Wiring, 12b: Wiring, 12c: Wiring, 12d: Wiring, 20: Layer, 20b1: Transistor, 23: Display unit driving circuit, 23a: Circuit section, 23b: Circuit section, 29: Terminal section, 29a: FPC, 30: Layer, 31: Display unit, 31a: Region, 40: Encapacitating substrate, 51: Pixel circuit, 52A: Transistor, 52B: Transistor, 52C: Transistor, 52D: Transistor, 52E: Transistor, 52F: Transistor, 53: Capacitance, 53A: Capacitance, 53B: Capacity Quantity, 55: Protection circuit, 56: Semiconductor element, 60: Layer, 61: Light-emitting element, 100A: Semiconductor device, 111: Pixel electrode, 111B: Pixel electrode, 111G: Pixel electrode, 111R: Pixel electrode, 112: EL layer, 112B: EL layer, 112G: EL layer, 112R: EL layer, 113: Common electrode, 114: Common layer, 131: Insulating layer, 131a: Insulating layer, 131b: Insulating layer, 132: Insulating layer, 230: Pixel matrix, 232: First drive circuit, 232a: First drive circuit, 232b: First drive circuit, 233: Second drive circuit, 236: Wiring, 237: Wiring, 240: Capacitance, 240 b: Capacity, 240c: Capacity, 241: Conductive layer, 243: Insulating layer, 245: Conductive layer, 251: Conductive layer, 252: Conductive layer, 254: Insulating layer, 255: Insulating layer, 256: Plug, 256a: Plug, 256b: Plug, 258: Insulating layer, 259: Insulating layer, 260: Insulating layer, 261: Insulating layer, 262: Insulating layer, 263: Insulating layer, 264: Insulating layer, 265: Insulating layer, 266: Insulating layer, 267: Insulating layer, 268: Insulating layer, 269: Insulating layer, 270: Insulating layer, 271a: Conductive layer, 271c: Conductive layer, 274: Plug, 274a: Conductive layer, 274b: Conductive layer, 275: Plug,275a: conductive layer, 275b: conductive layer, 301: substrate, 310: transistor, 320: transistor, 320a: transistor, 320b1: transistor, 320b2: transistor, 320c: transistor, 321: semiconductor layer, 323: insulating layer, 324: conductive layer, 325: conductive layer, 325a: conductive layer, 325b: conductive layer, 326: insulating layer, 327: conductive layer, 328: insulating layer, 329: insulating layer, 331: substrate, 332: insulating layer, 400A: display device, 400B: display device, 400C: display device, 416: protective layer, 419: resin layer, 420: substrate, 4 30: Light-emitting element, 430a: Light-emitting element, 430b: Light-emitting element, 430b1: Light-emitting element, 430b2: Light-emitting element, 430c: Light-emitting element, 772: Lower electrode, 785: Colored layer, 786: EL layer, 786a: EL layer, 786b: EL layer, 788: Upper electrode, 4411: Light-emitting layer, 4412: Light-emitting layer, 4413: Light-emitting layer, 4420: Layer, 4420-1: Layer, 4420-2: Layer, 4430: Layer, 4430-1: Layer, 4430-2: Layer, 6500: Electronic device, 6501: Housing, 6502: Display unit, 6503: Power button, 6504: Button, 6505: Speaker, 6506 : Microphone, 6507: Camera, 6508: Light source, 6510: Protective component, 6511: Display panel, 6512: Optical component, 6513: Touch sensor panel, 6515: FPC, 6516: IC, 6517: Printed circuit board, 6518: Battery, 7000: Display unit, 7100: Television equipment, 7101: Enclosure, 7103: Stand, 7111: Remote control unit, 7200: Notebook personal computer, 7211: Enclosure, 7212: Keyboard, 7213: Pointing device, 7214: External connection port, 7300: Digital signage, 730 1: Housing, 7303: Speaker, 7311: Information terminal, 7400: Digital signage, 7401: Pillar, 7411: Information terminal, 8000: Camera, 8001: Housing, 8002: Display unit, 8003: Operation buttons, 8004: Shutter button, 8006: Lens, 8100: Viewfinder, 8101: Housing, 8102: Display unit, 8103: Buttons, 8200: Head-mounted display, 8201: Mounting unit, 8202: Lens, 8203: Main unit, 8204: Display unit, 8205: Cable, 8206: Battery, 8300: Head-mounted display,8301: Housing, 8302: Display unit, 8304: Fixing device, 8305: Lens, 8400: Head-mounted display, 8401: Housing, 8402: Mounting part, 8403: Cushioning material, 8404: Display unit, 8405: Lens, 9000: Housing, 9001: Display unit, 9003: Speaker, 9005: Operation keys, 9006: Connection terminal, 9007: Sensor, 9008: Microphone, 9050: Icon, 9051: Information, 9052: Information, 9053: Information, 9054: Information, 9055: Hinge, 9101: Personal Information Terminal, 9102: Personal Information Terminal, 9200: Personal Information Terminal, 9201: Personal Information Terminal,

Claims

1. It has a display unit, a first wiring, a second wiring, a third wiring, and a fourth wiring. The display unit has a first pixel, a second pixel, and a third pixel. The second pixel is located between the first pixel and the third pixel in a plan view. The first pixel, the second pixel, and the third pixel each have a first sub-pixel and a second sub-pixel, The first wiring has the function of supplying a first potential to the second sub-pixel of the first pixel, The second wiring has the function of supplying the first potential to the first sub-pixel of the second pixel, The third wiring has the function of supplying the first potential to the second sub-pixel of the second pixel, The fourth wiring has the function of supplying the first potential to the first sub-pixel of the third pixel, The first wiring and the second wiring are adjacent to each other. The third and fourth wirings are adjacent to each other. A display device in which the distance between the first wiring and the second wiring is shorter than the distance between the third wiring and the fourth wiring.

2. In claim 1, The first sub-pixel has the function of controlling light corresponding to a first color selected from red, green, and blue. The second sub-pixel is a display device having the function of controlling light corresponding to a second color different from the first color, among red, green, and blue.

3. In claim 1, It has a fifth wiring, a sixth wiring, a seventh wiring, and an eighth wiring, The fifth wiring has the function of supplying a first signal to the second sub-pixel of the first pixel, The sixth wiring has the function of supplying a second signal to the first sub-pixel of the second pixel, The seventh wiring has the function of supplying a third signal to the second sub-pixel of the second pixel, The eighth wiring has the function of supplying a fourth signal to the first sub-pixel of the third pixel, The first and second wirings are arranged between the fifth and sixth wirings in a plan view. The third and fourth wirings are a display device positioned between the seventh and eighth wirings in a plan view.

4. In any one of claims 1 to 3, The second sub-pixel of the first pixel has a first transistor, The first sub-pixel of the second pixel has a second transistor, and the second sub-pixel of the second pixel has a third transistor. The first sub-pixel of the third pixel has a fourth transistor, One of the source and drain of the first transistor is electrically connected to the first wiring, One of the source and drain of the second transistor is electrically connected to the second wiring, One of the source and drain of the third transistor is electrically connected to the third wiring, One of the source and drain of the fourth transistor is electrically connected to the fourth wiring, The first and second wirings are arranged in a plan view between the channel formation region of the first transistor and the channel formation region of the second transistor. The third and fourth wirings are arranged in a plan view between the channel formation region of the third transistor and the channel formation region of the fourth transistor in the display device.

5. In claim 4, The display unit has a first light-emitting element, a second light-emitting element, a third light-emitting element, and a fourth light-emitting element. The source and the other drain of the first transistor are electrically connected to the first light-emitting element. The source and the other drain of the second transistor are electrically connected to the second light-emitting element. The source and the other drain of the third transistor are electrically connected to the third light-emitting element. The source and the other drain of the fourth transistor are electrically connected to a display device with respect to the fourth light-emitting element.

6. It has a first pixel, a second pixel, a third pixel, a first wiring, a second wiring, and a third wiring, The second pixel is located between the first pixel and the third pixel in a plan view. The first pixel, the second pixel, and the third pixel each have a first sub-pixel and a second sub-pixel, The first sub-pixel has the function of controlling light corresponding to a first color selected from red, green, and blue. The second sub-pixel has the function of controlling light corresponding to a second color different from the first color, among red, green, and blue. The first wiring has the function of supplying a first potential to the second sub-pixel of the first pixel and the first sub-pixel of the second pixel. The second wiring has the function of supplying the first potential to the second sub-pixel of the second pixel, The third wiring has the function of supplying the first potential to the first sub-pixel of the third pixel, The second wiring and the third wiring are adjacent to each other. A display device in which the first wiring is wider than one or more of the second and third wirings.

7. In claim 6, It has a fourth wire, a fifth wire, a sixth wire, and a seventh wire, The fourth wiring has the function of supplying a signal to the second sub-pixel of the first pixel, The fifth wiring has the function of supplying a signal to the first sub-pixel of the second pixel, The sixth wiring has the function of supplying a signal to the second sub-pixel of the second pixel, The seventh wiring has the function of supplying a signal to the first sub-pixel of the third pixel, The first wiring is positioned between the fourth wiring and the fifth wiring in a plan view. The second and third wirings are arranged in a plan view between the sixth and seventh wirings in the display device.

8. In claim 6 or claim 7, The second sub-pixel of the first pixel has a first transistor, The first sub-pixel of the second pixel has a second transistor, and the second sub-pixel of the second pixel has a third transistor. The third pixel has a fourth transistor, One of the source and drain of the first transistor and one of the source and drain of the second transistor are electrically connected to the first wiring. One of the source and drain of the third transistor is electrically connected to the second wiring, One of the source and drain of the fourth transistor is electrically connected to the third wiring, The first wiring is positioned between the channel formation region of the first transistor and the channel formation region of the second transistor. The second and third wirings are arranged between the channel formation region of the third transistor and the channel formation region of the fourth transistor in the display device.

9. An electronic device comprising a display device according to any one of claims 1 to 8, an antenna, and a sensor.

Images