Current-mode signal path of an integrated radio frequency pulse generator

Abstract

One or more systems, devices, or methods of use or combinations thereof provided herein relate to a device that can facilitate signal generation. The current-mode end-to-end signal path can include a digital-to-analog converter (DAC) operating in a current mode and an up-converting mixer operating in a current mode and operably coupled to the DAC. The analog inputs and analog outputs of the DAC and the up-converting mixer can be represented as currents, and the DAC can generate a baseband signal. In one or more embodiments, a current source and a diode-connected transistor can be placed in parallel in the current-mode signal path between a baseband filter and an output stage that includes the up-converting mixer. The device and / or system can be a radio frequency DAC. The diode-connected transistor can be programmable to change the gain or can be directly connected to the output stage without a turnaround current mirror connected therebetween, or both.

Description

[Technical Field]

[0001] This disclosure generally relates to an integrated radio frequency pulse generator system utilizing a current-mode end-to-end signal path. [Background technology]

[0002] Quantum computing generally refers to performing computing and information processing functions using quantum mechanical phenomena. Quantum computing can be seen as a contrast to classical computing, which generally uses transistors to perform operations on binary values. That is, while classical computers can perform operations on bit values ​​that are either 0 or 1, quantum computers perform operations on qubits, which include superpositions of both 0 and 1. Quantum computing has the potential to solve problems that classical computers cannot solve due to computational complexity, or that can only solve over a long period of time. [Overview of the Initiative]

[0003] The following outline provides a basic understanding of one or more embodiments of the present invention. This outline is not intended to identify any important or essential elements, nor to delineate any scope of any particular embodiment or claim. Its sole purpose is to present the concepts in a simplified form as a prelude to the more detailed descriptions presented later. In one or more embodiments described herein, a system, computer implementation, apparatus, or computer program product or combination thereof facilitates the reduction of power consumption and the enhancement of linearity between a digital-to-analog converter (DAC) and subsequent stages of the signal chain by utilizing an integrated radio frequency pulse generator system, more specifically, a current-mode end-to-end signal path. This facilitates the realization of a favorable set of trade-offs with respect to power consumption and distortion.

[0004] According to one embodiment, the device may include a baseband filter and output stage that define a current-mode signal path, as well as a current source and a diode-connected transistor arranged in parallel within the current-mode signal path, the diode-connected transistor being selectively tuned to vary its gain.

[0005] According to another embodiment, the method may include outputting a radio frequency output signal by a radio frequency (RF) pulse generator operably coupled to a quantum processor, the RF pulse generator device comprising a baseband filter and an output stage defining a current-mode signal path, as well as a current source and a diode-connected transistor arranged in parallel within the current-mode signal path, the diode-connected transistor being programmable to vary its gain.

[0006] In yet another embodiment, the system may comprise a quantum controller and a radio frequency (RF) pulse generator controlled by the quantum controller, the RF pulse generator comprising a baseband filter and an output stage defining a current-mode signal path, as well as a current source and a diode-connected transistor arranged in parallel within the current-mode signal path, the diode-connected transistor being directly connected to the output stage without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0007] An advantage of the aforementioned devices, systems, methods, or combinations thereof may be that a lower ratio of static bias to signal current can be employed in the output stage compared to that employed in baseband filters. Another advantage of the aforementioned devices, systems, methods, or combinations thereof is that the gain of the current-mode signal path can be adjusted by programming the active width of the diode-connected transistor so that the gain can be varied over a wide range, with high resolution, or both. Consequently, compared to one or more embodiments of RF pulse generator devices that do not employ a parallel arrangement of a current source and a diode-connected transistor coupled to the current-mode signal path between the baseband filter and the output stage, current can be reused, power efficiency can be improved, and distortion components can be reduced. Further improvements in power efficiency and reductions in distortion components can be achieved by directly connecting the diode-connected transistor to the output stage without an intermediate stage such as a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0008] As a result of the aforementioned advantages, less power may be required for the operation of one or more qubits in a quantum system. This reduction in power consumption can improve the scaling of qubits in the quantum system. Furthermore, components of the device or system, or both, can be employed in or against a cryogenic chamber, such as a dilution refrigerator, or both.

[0009] In one or more embodiments of the aforementioned devices, systems, or methods or combinations thereof, the current source can deliver static current, and the diode-connected transistor can deliver both static and dynamic current. A related advantage may be that, depending on one or more parameters or specifications of the current source and diode-connected transistor employed, or both, the ratio of static bias to signal current between the input and output of each device or system or both can be changed. This advantage can be achieved without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0010] In yet another embodiment, the device may include a baseband filter and an output stage that define a current-mode signal path, as well as a current source and a programmable diode-connected transistor arranged in parallel within the current-mode signal path, wherein the output stage comprises a pair of output stage portions connected in parallel, and the programmable diode-connected transistor is directly connected to one of the output stage portions.

[0011] An advantage of the aforementioned device may be that it allows for a lower ratio of static bias to signal current in the output stage compared to that employed in baseband filters. Consequently, compared to one or more embodiments of RF pulse generator devices that do not employ a parallel arrangement of a current source coupled to the current-mode signal path between the baseband filter and the output stage and a diode-connected transistor, current can be reused, power efficiency can be improved, and distortion components can be reduced. Further improvements in power efficiency and reductions in distortion components can be achieved by directly connecting the diode-connected transistor to the output stage without an intermediate stage such as a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0012] As a result of the aforementioned advantages, less power may be required for the operation of one or more qubits in a quantum system. This reduction in power consumption can improve the scaling of qubits in the quantum system. Furthermore, components of the device or system, or both, can be employed in or against a cryogenic chamber, such as a dilution refrigerator, or both.

[0013] Another advantage of the aforementioned device may be that the gain in the device can be changed dynamically, selectively, or both, so that the gain of the current-mode signal path can be adjusted. The gain of the current-mode signal path can be adjusted over a wide range, with high resolution, or both by programming the active width of the diode-connected transistor to vary the mirroring gain between the diode-connected transistor and the subsequent stage. This advantage can be achieved without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0014] According to another embodiment, the device may include a baseband filter and an output stage that define a current-mode signal path, as well as a programmable current source and a programmable diode-connected transistor arranged in parallel within the current-mode signal path, the programmable diode-connected transistor being directly connected to the output stage without a turnaround current mirror connected between the programmable diode-connected transistor and the output stage.

[0015] An advantage of the aforementioned devices may be that a lower ratio of static bias to signal current can be employed in the output stage compared to that employed in baseband filters. Another advantage of the aforementioned devices, systems, or methods or combinations thereof is that the gain of the current-mode signal path can be adjusted by programming the active width of the diode-connected transistor so that the gain can be varied over a wide range, with high resolution, or both. Consequently, compared to one or more embodiments of RF pulse generator devices that do not employ a parallel arrangement of a current source and a diode-connected transistor coupled to the current-mode signal path between the baseband filter and the output stage, current can be reused, power efficiency can be improved, and distortion components can be reduced. Further improvements in power efficiency and reductions in distortion components can be achieved by directly connecting the diode-connected transistor to the output stage without an intermediate stage such as a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0016] As a result of the aforementioned advantages, less power may be required for the operation of one or more qubits in a quantum system. This reduction in power consumption can improve the scaling of qubits in the quantum system. Furthermore, components of the device or system, or both, can be employed in or against a cryogenic chamber, such as a dilution refrigerator, or both.

[0017] Another advantage of the aforementioned device may be that the gain in the device can be changed dynamically, selectively, or both, so that the gain of the current-mode signal path can be adjusted. The gain of the current-mode signal path can be adjusted over a wide range, with high resolution, or both by programming the active width of the diode-connected transistor to vary the mirroring gain between the diode-connected transistor and the subsequent stage. This advantage can be achieved without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0018] In one or more embodiments of the foregoing device, the programmable current source can pass a static current, and the diode-connected transistor can pass both a static current and a dynamic current. The associated advantage can be that the ratio of the static bias to the signal current between the input and output of each device or system or both can be changed according to one or more parameters or specifications or both of the current source and diode-connected transistor employed. This advantage can be realized without a turnaround current mirror connected between the diode-connected transistor and the output stage.

Brief Description of the Drawings

[0019] [Figure 1] FIG. 1 is a block diagram of an exemplary and non-limiting system that can facilitate the operation of one or more qubits according to one or more embodiments described herein. [Figure 2] FIG. 2 is a block diagram of an exemplary system implementation implementing an integrated radio frequency (RF) pulse generator utilizing a current-mode signal path. [Figure 3] FIG. 3 is a diagram showing an exemplary framework of a methodology for integrating a radio frequency (RF) pulse generator utilizing a current-mode end-to-end signal path. [Figure 4] FIG. 4 is a diagram showing an exemplary architecture of a radio frequency (RF) pulse generator signal chain. [Figure 5] FIG. 5 is an exemplary schematic diagram of a current-mode implementation of an end-to-end signal path from the output of a digital-to-analog converter (DAC) to the output of an RF pulse generator. [Figure 6] FIG. 6 is a diagram showing exemplary simulation results of an entire radio frequency (RF) pulse generator signal chain. [Figure 7] FIG. 7 is a flowchart of an exemplary and non-limiting method that can facilitate the use of a device according to one or more embodiments described herein. [Figure 8]This is a block diagram of an exemplary and non-limiting operating environment in which one or more embodiments described herein can be facilitated. [Figure 9] This is a block diagram of an exemplary, non-limiting cloud computing environment according to one or more embodiments described herein. [Figure 10] This is a block diagram of an exemplary and non-limiting abstraction model layer according to one or more embodiments described herein. [Modes for carrying out the invention]

[0020] Embodiments of the subject matter described herein generally relate to integrated radio frequency (RF) pulse generators, and more particularly to utilizing current-mode end-to-end signal paths to reduce power consumption, reduce distortion, and enhance linearity between digital-to-analog converters (DACs) and adjacent stages in the signal chain.

[0021] The following detailed description is illustrative only and is not intended to limit the embodiments, or the applications or uses of the embodiments, or both. Furthermore, it is not intended to be bound by the explicit or implicit information presented in the preceding sections on the summary of the invention or the forms for carrying out the invention. One or more embodiments will now be described with reference to the drawings, with similar reference numerals used throughout to refer to similar elements. The following description includes numerous specific details for illustrative purposes to provide a more complete understanding of one or more embodiments. However, it is clear that in various cases one or more embodiments may be practiced without these specific details.

[0022] In general, on a large scale, a quantum computing cloud service provider can run millions of quantum jobs per year for its users. Each quantum job can include the execution of one or more quantum programs. If a qubit state can only exist for a limited time (or can only be coherent), the purpose of operation in a quantum logic circuit (e.g., one or more qubits) may be to reduce the time of operation, increase the speed of operation, or both. The time spent operating a quantum logic circuit can undesirably reduce the available operation time for one or more qubits. This can be due to the available coherence time of one or more qubits before decoherence of one or more qubits. For example, in some cases, a qubit state can be lost in less than 100-200 microseconds. Furthermore, operation on qubits generally introduces some errors, such as some level of decoherence or some level of quantum noise, or both, further affecting the availability of the qubits. Quantum noise may refer to noise resulting from the discrete or stochastic nature of quantum interactions, or both. Device designs that extend the lifespan of quantum states and increase coherence time may be desirable.

[0023] Furthermore, in large-scale scenarios, a large number of quantum jobs can put pressure on each quantum program to execute quickly. That is, improvements in execution speed can correlate directly, indirectly, or both to maximizing system usage, minimizing the number of users who have to wait for measurement results, or minimizing undesirable consumption of classical computing resources, or a combination thereof. It can also put pressure on these quantum jobs to execute properly so that the quality of measurements associated with one or more qubits in each quantum system can be improved, or the compilation to physical-level pulses can be improved (e.g., in relation to accuracy, precision, or measurement efficiency, or a combination thereof), or a combination thereof, so that maximum performance can be extracted from systems that are prone to errors in the short term.

[0024] A quantum logic circuit in the physical real world, controlled by a quantum system, can contain multiple qubits. A type of qubit, the superconducting qubit, can include Josephson junctions and generally operates only within cryogenic chambers, such as dilution refrigerators. One or more such superconducting qubits may be multiplexed for each measurement circuit contained within the cryogenic chamber.

[0025] In various situations, including qubit control, arbitrary waveform generation capabilities with variable amplitude and low distortion may be desirable. The main circuit within an arbitrary waveform generator (AWG) can be a digital-to-analog converter (DAC), which can be beneficial in various applications, including the implementation of wireless transmitters and qubit control pulses. In such designs, minimizing power consumption and reducing distortion can be beneficial, particularly in the context of cryogenic signal generation for qubit control. Design challenges utilizing voltage-mode representations of signal paths may include high dynamic range requirements at block interfaces, which can lead to nonlinear behavior and the generation of undesirable distortion components. Undesirable distortion components can be considered sources of noise or disturbances in the system and may therefore contribute to a reduction in the coherence time of one or more qubits in a cryogenic chamber, for example.

[0026] Another challenge could be a significant increase in power consumption per block, due to the lack of opportunities to gain power efficiency derived from current reuse. When scaling a quantum system to include more qubits, power efficiency can not only be desirable but also a factor that enables scaling to include more qubits.

[0027] More specifically, quantum computing utilizes qubits as its key unit instead of classical computation bits. A qubit (e.g., a quantum binary number) is the quantum mechanical analog of a classical bit. While a classical bit can only adopt one of two ground states (e.g., 0 or 1), a qubit can adopt a superposition of these ground states (e.g., α|0〉+β|1〉), where α and β are (|α| 2 +|β| 2A qubit is a complex scalar (like =1), and theoretically, several qubits can hold exponentially more information than the same number of classical bits. Therefore, a quantum computer (e.g., a computer that employs qubits instead of only classical bits) can theoretically solve problems that would be extremely difficult for a classical computer very quickly. A bit in a classical computer is a simple binary number with values ​​of either 0 or 1. Almost any device with two distinct states can serve as a representation of a classical bit, such as a switch, valve, magnet, coin, or a similar binary type of state measure. With the mystique of quantum mechanics, a qubit can occupy a superposition of the states of 0 and 1. Not that a qubit can have an intermediate value such as 0.63, but rather that when the state of a qubit is measured, the result is either 0 or 1. However, in the course of computation, a qubit can act as if it were a mixture of states, e.g., 63 percent 0 and 37 percent 1.

[0028] In fact, a typical quantum program requires coordination of the quantum and classical parts of the computation. One way to consider a typical quantum program is to identify the processes and abstractions involved in specifying the quantum algorithm, converting the algorithm into an executable form, performing experiments or simulations, and analyzing the results. The concept throughout these processes is the use of intermediate representations. An intermediate representation (IR) of a computation is neither a source language description nor a target machine instruction, but something in between. A compiler can utilize several IRs during the process of converting and optimizing the program. The input is the source code describing the quantum algorithm and compile-time parameters. The output is a combination of the quantum / classical program expressed using high-level IRs. The difference between a quantum computer and a classical computer is that a quantum computer is probabilistic, and therefore, by measuring the algorithm output, a suitable solution can be obtained within the algorithm's inherent confidence interval. The computation is repeated until a sufficiently probable and certain solution can be achieved.

[0029] Quantum computers offer novel methods for performing computational tasks, such as molecular calculations, photons, optimizations, and many others, by processing information using the laws of quantum mechanics. Many algorithms and system components have been introduced to efficiently perform such computational tasks. For example, radio frequency (RF) pulse generators (often incorporating one or more digital-to-analog converters) can be beneficial in a variety of applications, including the implementation of control pulses for radio transmitters and qubits. Designs utilizing voltage-mode representations of signal paths present one or more challenges, including high dynamic range requirements at block interfaces, which can lead to nonlinear behavior and the generation of higher amplitude distortion components. Another challenge is that power consumption per block can increase significantly due to the lack of opportunity to gain power efficiency derived from current reuse. Therefore, one or more embodiments herein propose current-mode end-to-end signal paths that facilitate the realization of a favorable set of trade-offs regarding power consumption and distortion. These advantages can be best achieved by implementing the entire chain in current mode.

[0030] One or more embodiments described herein relate to RF pulse generator systems and methods that implement a current-mode end-to-end path from a digital-to-analog converter (DAC) to an output stage, enabling a preferred set of trade-offs with respect to power consumption and distortion. This can be achieved by a device (e.g., a radio frequency (RF) pulse generator) or part or both of such a device, which can change the ratio of static (bias) current to dynamic (signal) current at different circuit stages. That is, the input stage of the device can have a high ratio of static (bias) current to dynamic (signal) current to obtain good linearity, while the output stage of the device can have a reduced ratio of static (bias) current to dynamic (signal) current. The elements of the signal path of the device can be a DAC, a baseband filter, a mixer, an attenuator, and output chain components. The advantages can be achieved by implementing the entire chain in current mode. One or more embodiments may optionally utilize a radio frequency digital-to-analog converter (RFDAC).

[0031] Current-mode signal processing is ideal for low-distortion applications because it can reduce voltage amplitude at various nodes targeted by the device, circuit, or signal path or combination thereof in which it is employed. Another advantage of current-mode circuits is that they allow for current reuse, in which case the bias and signal currents of one stage are shared with another (typically by stacking circuit stages). Reuse can reduce the total current drawn from the power supply, thereby improving the power efficiency of the circuit. Conventional current-mode input filters using operational amplifiers can consume a lot of power and may be limited for high-frequency applications. While circuit power efficiency can be improved by introducing current-mode signal path designs into the implementation of integrated RF pulse generators, one or more embodiments described herein provide improved current-mode signal path designs that can further improve circuit power efficiency.

[0032] In other words, implementing an efficient current-mode filter stage can be a crucial part of realizing the proposed end-to-end current-mode signal path, which was developed to achieve low power consumption through current reuse and to enhance end-to-end linearity by minimizing voltage-to-current and current-to-voltage conversions. Low output signals can be an advantageous design structure for the system when efficiently implementing the signal chain. Furthermore, the integrated RF pulse generator solution can enable cascaded solutions using the current-mode method. Since both the input and output signals of a current-mode filter stage are currents, filter stages can be cascaded by connecting the output of one filter stage to the input of another. This cascading of current-mode filter stages can be used to construct higher-order filters (e.g., with steeper roll-off characteristics).

[0033] To achieve a reduction in the ratio of static (bias) current to dynamic (signal) current, one or more embodiments described herein may employ circuit devices in the signal path between the baseband filter and the output stage of the device, the output stage may include mixers, attenuators, and output chain components. In particular, one or more embodiments described herein may integrate a pair of components arranged in parallel in the current-mode signal path. Generally, the pair of components can enable the current from the baseband filter to be split between the pair of components. As a result, one component of the pair, such as a current source, can provide static current, while the other component of the pair, such as a diode-connected transistor, can provide both static and dynamic current.

[0034] By placing a parallel combination of a current source and a diode-connected transistor within the current-mode signal path, it is possible to reduce the ratio of static (bias) current to dynamic (signal) current in the output stage (e.g., mixer and attenuator) compared to the ratio in the baseband filter. In contrast, a simple current mirror magnifies or reduces both the static (bias) current and the dynamic (signal) current by the same coefficient, so such a mirror cannot change the ratio of static (bias) current to dynamic (signal) current. By thus decoupling the static current of the baseband filter from the static current of the output stage, one or more advantages can be provided in realizing a high-performance yet power-efficient RF pulse generator. For example, operating the baseband filter with a large ratio of static (bias) current to dynamic (signal) current may improve distortion performance, but operating the output stage with such a large ratio will reduce power efficiency, which is important because the output stage often accounts for the majority of the system's power consumption. By separating the static current of the baseband filter from the static current of the output stage, the former can operate with high linearity and low distortion, while the latter can operate with good power efficiency, resulting in a good trade-off between the system's distortion performance and power consumption. Making the diode-connected transistor programmable (i.e., having a switchable active width) provides a gain control mechanism to the current-mode signal path, which is another advantage of the topology.

[0035] Next, one or more embodiments will be described with reference to the drawings, where similar reference numerals are used throughout to refer to similar elements. As used herein, the terms “entity,” “request entity,” and “user entity” may refer to a machine, device, component, hardware, software, smart device, or human being or a combination thereof. The following description includes numerous specific details for illustrative purposes to provide a more complete understanding of one or more embodiments. However, it is clear that in various cases one or more embodiments may be practiced without these specific details.

[0036] The embodiments shown in one or more figures described herein are for illustrative purposes only, and therefore the architecture of the embodiments is not limited to the systems, devices, or components or combinations thereof shown in the figures, nor is it limited to any particular order, connection, or combination of the systems, devices, or components or combinations thereof shown in the figures. For example, in one or more embodiments, an unlimiting system described herein, such as the unlimiting system 100 shown in Figure 1, or both of such systems, may further comprise, be associated with, or be coupled with, or be combined with, one or more computer or computing-based elements or both described herein with reference to an operating environment, such as the operating environment 800 shown in Figure 8. In one or more described embodiments, a computer or computing-based element or both may be used in relation to one or more implementations of systems, devices, components, or computer operations or combinations thereof that are illustrated or described in reference to or both of Figure 1 or other figures described herein.

[0037] Referring first to Figure 1 as an overview, one or more embodiments described herein may include one or more devices, systems, or apparatus, or combinations thereof, that can facilitate the execution of one or more quantum operations and facilitate the output of one or more quantum results. For example, Figure 1 shows a block diagram of an exemplary and non-limiting system 100 that can improve the execution of a quantum job, such as by increasing power consumption for arbitrary waveform generation for the quantum job.

[0038] A quantum system 101 (e.g., a quantum computer system, a superconducting quantum computer system, or similar, or a combination thereof) can employ quantum algorithms or quantum circuits, or both, including computing components or devices, to perform quantum operations or quantum functions, or both, on input data and produce results that can be output to an entity. A quantum circuit may include quantum bits (qubits) such as multi-bit qubits, physical circuit-level components, high-level components, or functions, or combinations thereof. A quantum circuit may include physical pulses that can be structured (e.g., can be arranged, or designed, or both) to perform a desired quantum function or quantum computation, or both, on data (e.g., input data, or intermediate data derived from input data, or both) and produce one or more quantum results as an output. A quantum result, e.g., a quantum measurement 120, can respond to a quantum job request 104 and associated input data and can be at least partially based on the input data, quantum function, or quantum computation, or a combination thereof.

[0039] In one or more embodiments, the quantum system 101 may include one or more quantum components, such as a quantum computing component 103, a quantum controller 106, a waveform generator 110, and a quantum logic circuit 108 (also referred to herein as a quantum processor) which includes one or more qubits, for example, qubits 107A, 107B, or 107C or a combination thereof (also referred herein as qubit devices 107A, 107B, and 107C).

[0040] The quantum controller 106 may be equipped with any suitable processor. The quantum controller 106 may generate one or more instructions for controlling one or more processes of the quantum computation component 103, and / or for controlling the quantum logic circuit 108 and / or the waveform generator 110.

[0041] The quantum computing component 103 can acquire a quantum job request 104 that requests the execution of one or more quantum programs (for example, it can download, receive, retrieve, or do the same, or a combination thereof). The quantum computing component 103 can determine one or more quantum logic circuits, such as a quantum logic circuit 108, to execute the quantum programs. The request 104 may be provided in any preferred format, such as text format, binary format, or another preferred format or a combination thereof. In one or more embodiments, the request 104 may be received by a component other than a component of the quantum system 101, such as a component of a classical system that is coupled to the quantum system 101, or communicates with the quantum system 101, or both.

[0042] The waveform generator 110 can perform one or more quantum processes, calculations, or measurements, or combinations thereof, to operate one or more quantum circuits on one or more qubits 107A, 107B, or 107C or a combination thereof. For example, the waveform generator 110 can operate one or more qubit effectors, such as qubit oscillators, harmonic oscillators, pulse generators, or combinations thereof, to stimulate or manipulate the state of one or more qubits 107A, 107B, or 107C or a combination thereof included in the quantum system 101, or both, with one or more pulses. That is, the waveform generator 110 can, for example, be used in combination with a quantum controller 106 to perform the operation of a quantum logic circuit on one or more qubits of a circuit (e.g., qubits 107A, 107B, or 107C or a combination thereof). Accordingly, the quantum computation component 103 can output one or more quantum job results, such as one or more quantum measurement values ​​120, in response to a quantum job request 104.

[0043] As will be described in more detail below, the waveform generator 110 may include a current-mode device that reduces the ratio of static bias to signal current along the signal path of the current-mode device. This reduction in the ratio between the baseband filter and the output stage of the device can reduce distortion, increase power efficiency, or both, compared to one or more waveform generators or signal generators of the quantum system 101 or both.

[0044] Some or all of the quantum logic circuit 108 and the waveform generator 110 may be housed in a cryogenic environment where a cryogenic chamber 116, such as a dilution refrigerator, may be provided. In fact, the waveform generator 110 in the cryogenic chamber 116 can generate signals to operate or control one or more qubits 107A-C, or both. If qubits 107A, 107B, and 107C are superconducting qubits, cryogenic temperatures such as below about 4K may be employed to facilitate the functioning of these physical qubits. Therefore, elements of the waveform generator 110 should also be constructed to operate at such cryogenic temperatures.

[0045] The following / above description refers to the operation of a single quantum program from a single quantum job request. However, one or more of the processes described herein may be scalable, such as executing one or more quantum programs or quantum job requests, or both, in parallel with one another.

[0046] In one or more embodiments, the non-limiting system 100 can be a hybrid system and thus include both one or more classical systems, such as a quantum program implementation system, and one or more quantum systems, such as a quantum system 101. In one or more other embodiments, the quantum system 101 can be isolated from the classical system but can function in combination with the classical system.

[0047] In such cases, one or more communications between one or more components of the non-limiting system 100 and the classical system may be facilitated by wired means, wireless means, or both, including, but not limited to, employing a cellular network, a wide area network (WAN) (e.g., the Internet), or a local area network (LAN), or a combination thereof. Suitable wired or wireless technologies for facilitating communication may include, but are not limited to, Wireless Fidelity (Wi-Fi), Global System for Mobile Communications (GSM), Universal Mobile Communications System (UMTS), Microwave Access Global Interoperability (WiMAX), Enhanced General-Purpose Packet Radio Services (Enhanced GPRS), Long-Term Evolution (LTE) of the 3rd Generation Partnership Project (3GPP2), Ultra Mobile Broadband (UMB) of the 3rd Generation Partnership Project 2 (3GPP2), High-Speed ​​Packet Access (HSPA), Zigbee and other 802.XX wireless technologies and / or legacy communication technologies, BLUETOOTH®, Session Initiation Protocol (SIP), ZIGBEE®, RF4CE protocol, WirelessHART protocol, 6LoWPAN (IPv6 over Low power Wireless Area Networks), Z-Wave, ANT, Ultra Wideband (UWB) standard protocols, and / or other proprietary and / or non-proprietary communication protocols.

[0048] Figure 2 shows a block diagram of an exemplary, non-limiting system 200 (also referred to herein as a device) which may be comprised of the waveform generator 110 of the quantum system 101 of the non-limiting system 100 of Figure 1. The non-limiting system 200 can access and process data using variable computing components shown according to one or more embodiments described herein. Parts of systems (e.g., non-limiting system 200), apparatus, or processes described herein can constitute machine-executable components that are embodied in a machine, for example, in one or more computer-readable media associated with one or more machines. When such components are executed by one or more machines, such as computers, computing devices, virtual machines, etc., they can cause the machines to perform the operations described herein. For brevity, repeated descriptions of similar elements used in one or more embodiments described herein are omitted.

[0049] In general, the computer processing systems, methods, apparatus, or computer program products or combinations thereof described in this subject may be employed to solve new problems that may arise from advances in technology, computer networks, the internet, etc.

[0050] In today's digital world, one of the biggest growth areas in electronics is wireless communication applications. Modern radio frequency systems, such as 3G / 4G / 5G base stations, are based on broadband multi-channel architectures. To increase flexibility in signal generation, modulation, and processing, modern RF transmitters typically employ one or more high-speed digital-to-analog converters (DACs). Such high-speed DACs provide the ability to generate arbitrary waveforms of RF signals, which can be useful in both quantum-related and non-quantum-related applications, as described above.

[0051] One such quantum-related application is qubit control in the field of quantum computing, which requires the generation of RF control pulses with variable amplitude and low distortion (high spectral purity). Minimizing the power consumption of such RF pulse generators is beneficial, particularly in the context of cryogenic signal generation for qubit control. Design challenges utilizing voltage-mode representations in signal paths include high dynamic range requirements at block interfaces, which can lead to nonlinear behavior and the generation of higher amplitude distortion components. Therefore, these embodiments propose a promising solution to this problem by introducing current-mode signal path design into implementations of integrated RF pulse generator systems, such as systems or devices, or both, that can achieve improved power efficiency and / or reduced associated distortion compared to existing techniques, e.g., current reuse.

[0052] A non-limiting system 200 can facilitate an integrated radio frequency (RF) pulse generator utilizing a current-mode signal path. Embodiments described herein relate to maintaining the elements of a signal path, a digital-to-analog converter (DAC) 202, a baseband filter 204, a current ratio reduction device 205, an upconverter mixer 206, a radio frequency (RF) attenuator 208, an output component 212 (e.g., a current-mode amplifier), and an offset component 214. The radio frequency (RF) attenuator 208 and the output component 212 together may be considered at least part of the output stage 214 of the non-limiting system 200. In one or more embodiments, the upconverter mixer 206 may be considered at least part of the output stage 214. Advantages can be achieved by implementing the entire chain in current mode. Figure 2 shows the use of both the upconverter mixer 206 and the RF attenuator 208, but in other embodiments, one or more of these components may be omitted, and each component may be cascaded in any preferred manner.

[0053] The non-restrictive system 200 may optionally include a server device, one or more networks, and one or more devices (not shown), or such elements may more generally be comprised of a quantum system 101, or both, and the non-restrictive system 200 may be comprised of such a quantum system 101.

[0054] The non-limiting system 200 may also include, or otherwise associate with, a digital-to-analog converter 202 operating in current mode, where the analog inputs and outputs of the system block are expressed as currents. The digital signal input to the DAC 202 can be baseband digital in-phase and quadrature-phase data (I and Q data) representing any suitable signal, such as, but not limited to, signals for a radio transmitter or signals for implementing control pulses for a qubit. The analog output of the DAC 202 in current form may be directed to a baseband filter 204. The baseband current output of the baseband filter 204 can be frequency-converted to an RF frequency by an up-converter mixer 206, which can be driven by a local oscillator (LO) signal. Optionally, the LO signal waveform can be a complementary metal-oxide-semiconductor (CMOS) rail-to-rail level, such as one generated by a CMOS inverter.

[0055] The radio frequency (RF) attenuator 208 can operate in conjunction with the DAC 202, the baseband filter 204, and the upconvert mixer 206. The output component 212 receives the output current of the RF attenuator 208. In one or more embodiments, the output component 212 may include an impedance conversion component (e.g., a transformer or current-mode amplifier). The corresponding signal chain can generate an output current signal using the DAC 202, the baseband filter 204, the upconvert mixer 206, and the RF attenuator 208. A DC offset in the baseband signal (e.g., a DC offset in the output current of the baseband filter 204) can be converted by the upconvert mixer into an unwanted LO tone (LO "leakage") at the output of the RF pulse generator system 200. To suppress such LO leakage, the offset component 214 can apply DC offset cancellation, which adds a compensatory DC offset to the baseband signal. The DAC202, baseband filter204, current ratio reduction device205, upconverter mixer206, RF attenuator208, output component212, or offset component214, or any combination thereof, may be cryogenic electronic components (e.g., electronic components capable of operating at cryogenic temperatures).

[0056] In one implementation configuration, a current-mode end-to-end path from the digital-to-analog converter (DAC) 202 to the output component 212 can facilitate the realization of a favorable set of trade-offs regarding power consumption and distortion. In this signal path, the DAC 202, operating in current mode, can implement an integrated DAC solution, and the baseband filter 204, integrated with the upconverter mixer 206 and RF attenuator 208, can operate in current mode, where analog input and output signals between system blocks can be expressed as current. The upconverter mixer 206 can be driven by an LO signal and, optionally, may use complementary metal-oxide-semiconductor (CMOS) rail-to-rail levels. The radio frequency (RF) attenuator 208 can operate together with the DAC 202, baseband filter 204, current ratio reduction device 205, and upconverter mixer 206. This methodology, particularly considering the current ratio reduction device 205 described in detail below, can facilitate low-output signal requirements for efficient implementation of the signal chain. Therefore, the current-mode signal path in an integrated RF pulse generator solution can leverage current reuse to facilitate power consumption reduction, enhance linearity by minimizing voltage-to-current and current-to-voltage conversions, and enable cascaded solutions using current-mode techniques.

[0057] Figure 3 shows an exemplary framework 300 of a methodology for integrating a radio frequency (RF) pulse generator using a current-mode end-to-end signal path. In aspects of the framework, in 302, a digital-to-analog converter (DAC) is operated in current mode; in 303, a current ratio reduction device including a current source and a diode-connected transistor is employed, the diode-connected transistor being programmable to vary its gain; in 304, the aspect includes directly connecting the diode-connected transistor and the output stage without a turnaround current mirror connected between them; in 306, the aspect includes operating an up-converter mixer operably coupled to the DAC in current mode; in 308, the aspect includes representing the analog inputs and analog outputs of the DAC and up-converter mixer as current, the DAC generating a baseband signal; and in 310, the methodology utilizes a radio frequency (RF) attenuator operating in current mode together with the DAC and up-converter mixer. Steps 304, 306, and / or 308, and / or one or more subsets thereof, may be optional. Thus, the framework can provide an overall chain operating in current mode by integrating a DAC interface to an upconverter mixer and an RF attenuator to generate an output (or, optionally, implementing sub-elements of the chain in current mode). Functionality may be implemented in current mode, and any two blocks may also be interfaced in current mode. Stages may utilize current-mode signals, and the signals may be attenuated and multiplied. Starting with the baseband filter, current-mode signals may be scaled up / scaled down in circuit stages, such as by employing a current ratio reduction device 205 in the interstage interface, and optionally in an impedance matching network, where the impedance matching network is part of the output component stage.These methods leverage current reuse to reduce end-to-end power consumption and enhance end-to-end linearity (reduce distortion) by minimizing voltage-to-current and current-to-voltage conversions. Low power signal requirements help in efficiently implementing signal chains, and these methods enable cascaded solutions using current-mode techniques.

[0058] Figure 4 includes an exemplary architecture of an RF pulse generator signal chain, comprising two or more quadrature-phase DACs (403, 405), two or more quadrature-phase baseband filters 406, 408, two or more quadrature-phase upconvert mixers (410, 412), and an adder 411 that produces the sum of the output signals of the upconvert mixers. In this embodiment, unlike conventional systems, each subblock can be implemented in current mode, and all analog signals transferred between subblocks are represented as current. The inputs to the DACs (403, 405) (e.g., digital words) are digital.

[0059] One method for generating complex signals may be to modulate the carrier signal frequency by a local oscillator using a vector modulator. In RF applications, baseband digital I and Q signals are generated using an arbitrary waveform generator (AWG) that includes two or more synchronized digital-to-analog converters (DACs). The RF pulse generator signal chain architecture 400 can receive baseband digital common-mode signals (BBI signals) 402 and baseband digital quadrature-to-phase signals (BBQ signals) 404. Multibit baseband digital-to-analog converters (DACs) 403 and 405 employ digital bits and can convert digital bits to analog signals depending on the signal bandwidth and sampling clock frequency. This can enable the output of current, which is then provided to the filtered and amplified current in the upconverter mixers 410 and 412.

[0060] To remove out-of-band noise components from the DACs (403, 405), the signals can be processed through low-pass filters 406 and 408. The filtered signals can be mixed and thus upconverted by upconvert mixers 410 and 412 using two carriers (LO-Q and LO-I) with orthogonal phases of 0 and 90 degrees relative to I and Q. The resulting signals can be combined using a signal coupler 411 to create a single-sideband signal representation. For example, if the (x*y) function needs to be performed in single-sideband representation, the variable x can be represented as a combination of 0 and 90 degrees, and the variable y can be represented as a combination of 0 and 90 degrees. These two variables can be multiplied and added, similar to the scalar product of two vectors. The output of this function can be processed through a driver (DRV) 414.

[0061] The matched network (MN) 416 is typically a component consisting of passive elements that do not introduce distortion. The matched network 416 can convert a resistor 418 (e.g., 50 ohms) to the impedance required by the driver in order to maximize power transfer.

[0062] In the RF pulse generator system 400, the outputs of the DACs (403, 405) may be filtered and upconverted using an I-channel and Q-channel mixer, and the resulting signals are coupled and supplied to the nominal load (e.g., 50 ohms) of the output 420 through a driver and matching network.

[0063] In such designs, the implementation of the filter and the interface between the filter and other elements of the signal chain can be useful. Continuous-time filters may be ideal for implementing high dynamic range, low-power active filters. Conventional current-mode input filters using operational amplifiers can consume a lot of power and may be limited in high-frequency applications. Continuous-time transconductance (G m )-Capacitance (C) filter (G m-C filters typically offer high input impedance, which can result in higher distortion components. m - While C-type filters may be ideal for high-frequency applications, their input is typically voltage, which can limit the dynamic range they support.

[0064] Current-mode signal processing can be ideal for low-distortion applications because it reduces voltage amplitude across the various nodes being processed. Another advantage of current-mode circuits is current reuse, in which case the bias and signal currents of one stage can be shared with another (for example, typically by stacking circuit stages). This reuse can reduce the total current drawn from the power supply, thus improving the power efficiency of the circuit. However, conventional current-mode input filters using operational amplifiers, for example, can consume a lot of power and may have limitations for high-frequency applications. For example, baseband filters can operate at relatively high bias currents due to their linearity and therefore low distortion. However, if the output stages in each signal path operate with the same or similarly high ratio of quiescent (bias) current to dynamic (signal) current, they can waste current and therefore power. To improve the power efficiency of the entire device / system, it would be desirable to operate the baseband filter at a relatively high bias current while operating the output stages in the signal path at a low ratio of quiescent (bias) current to dynamic (signal) current. An efficient current-mode filter stage can facilitate the realization of end-to-end current-mode signal paths for low power consumption by leveraging current reuse, and can enhance end-to-end linearity by minimizing voltage-to-current and current-to-voltage conversions. Low output signal requirements can be an advantage for efficient implementation of the signal chain.

[0065] Figure 5 shows an exemplary schematic diagram of a transistor-level implementation of device 500, such as an RF pulse generator system for generating I-phase and Q-phase RF output signals. Generally, as described below, device 500 can provide a full-current-mode signal chain that can be tuned to one or more requirements for cryogenic waveform generation, such as those related to quantum computing systems. Again, one or more embodiments described herein can also be practiced outside of quantum environments, such as those related to wireless transceivers used in the Internet of Things, sensors, or memory arrays or combinations thereof, where very low power consumption may be critical to the application.

[0066] Device 500 can define a current-mode signal path including one or more input stages and one or more output stages. As shown in the figure, parallel copies of input stage 504 can be employed to generate in-phase (I) and quadrature-phase (Q) RF signal components (for example, providing P current polarity and N current polarity for the I signal component and Q signal component, respectively). That is, four parallel input stages 504 can be employed together with a pair of output stages 506 (one for the I signal component and the other for the Q signal component) to provide an RF pulse generator device 500. A pair of input stages 504 can be coupled to each output stage 506. For example, input stages 504 for the P current polarity and N current polarity of the I signal component can be coupled to a common output stage 506. As shown in the figure, the current consumption of each input stage 504 is 1.25X, where X is the bias current of the current source device M3. Because there are four parallel input stages 504, the total baseband filter current is 5X, where X can be equal to approximately 200 μA.

[0067] Each input stage 504 can include a baseband filter 512 and a ratio reduction device 514, and the ratio reduction device 514 can be used to reduce the ratio of the static (bias) current to the dynamic (signal) current supplied to the output stage 506 compared to the ratio of the static (bias) current to the dynamic (signal) current employed by the baseband filter 512 itself. Each output stage 506 can include a transistor pair 516 that receives a voltage (VBB ,ip / m ) from the ratio reduction device 514, an up-convert mixer 518, and an RF attenuator 520. The output stage 506 can be coupled to a common transformer (xmfr) 524 that functions as an output component to the current mode signal path.

[0068] Moving first to the baseband filter 512, the baseband filter 512 shown in FIG. 5 can be similar to a conventional Gm-C filter in that its frequency response can depend on the values of the transconductance (G m ) and capacitance (C). In the case of the baseband filter 512 shown in FIG. 5, two capacitors (C1 and C2) are provided for two poles so that a second-order transfer function is realized. The output current is obtained from the baseband filter 512 by mirroring the current passing through transistor M 1A to another transistor M 1AX operating at an equal current density. If the width of transistor M 1AX is one-fourth the width of transistor M 1A , the output current of the baseband filter 512 can be one-fourth less than the current flowing through transistor M 1A . Both the static (bias) current and the dynamic (signal) current are reduced by one-fourth, and thus it should be noted that a standard current mirror, such as the current mirror formed by M 1A and M 1AX , does not change the ratio of the static (bias) current to the dynamic (signal) current.

[0069] Next, moving to the ratio reduction device 514, this device includes components M3X and M4. In one or more embodiments, component M 3X And M4 may be located in the same subcomponent, chip portion, or similar or a combination thereof. That is, in one or more embodiments, component M 3x One or more of these may be located in each baseband filter 512, but should not be considered components of each baseband filter 512. In one or more other embodiments, component M 3x One or more of these may be located outside of the respective baseband filter 512, such as being the same sub-component, chip portion, or similar or a combination thereof as component M4.

[0070] Furthermore, referring to the ratio reduction device 514, a current source device (also called a current source) 532(M) is arranged in parallel within the current mode signal path. 3x ) and diode-connected transistor 534 (M4) may be included. The current source device 532 is (M in Figure 5) 3xThe current source device 532 can be a simple PMOS transistor biased in a saturated state (as shown), a transistor current source with resistive degeneration in the source leg, or a cascaded current source. In the implementation of the baseband filter 512 or the output stage 506 or both, it is also possible to swap the positive (PMOS) pair with negative (NMOS) device types, in which case the current source device 532 may be implemented as an NMOS device. The diode-connected transistor 534 may be equipped with a self-biasing diode. A switch can be employed to selectively activate the fingers of the diode-connected transistor 534 so that the active width of the fingers of the diode-connected transistor 534 can be adjusted by digital control. Changing the active width of the diode-connected transistor 534 changes the current mirror gain between the diode-connected transistor 534 and the transistor pair 516, thereby providing a gain control mechanism for the current-mode signal path. Further gain control adjustment can be achieved by selectively activating the fingers of the transistor pair 516 and thereby changing their active width. Providing multiple mechanisms for adjusting the gain control is useful for increasing the range or resolution of the gain control.

[0071] The current to the ratio reduction device 514 can be divided at 536, etc. The current source 532 can carry static current, and the diode-connected transistor 534 can carry both static and dynamic (signal) current. That is, the current source 532 can carry most of the static current from each baseband filter 512, while the diode-connected transistor 534 can carry almost all of the dynamic current from each baseband filter 512. In other words, the dynamic and static currents can be distributed between the current source device 532 and the diode-connected transistor 534 so that the current supplied to the output stage 506 can include a reduced portion of the static current component from the filter stage (e.g., the baseband filter 512). That is, considering the use of the ratio reduction device 514, the ratio of static bias to dynamic (signal) current can be lower at the output stage 506.

[0072] Each transistor subdevice 516 can receive voltage from a pair of ratio reduction devices 514, as shown above. Each transistor subdevice 516 may comprise a pair of transistors 540 and 542. These transistors 540 and 542 can be of the same NMOS or PMOS type as the diode-connected transistor 534 of the ratio reduction device 514 (PMOS or NMOS). If transistors 540 and 542 have the same device type as the diode-connected transistor 534, the diode-connected transistor 534 can be directly connected to the output stage 506 without an intermediate stage such as a turnaround current mirror connected between the diode-connected transistor 534 and the output stage 506. Since each circuit stage introduces at least a small degree of nonlinearity, eliminating the turnaround current mirror reduces signal distortion and eliminates power losses in the turnaround stage.

[0073] Each pair of output stages 506 may include an upconverter mixer 518 and an attenuator 520. Both the upconverter mixer 518 and the attenuator 520 operate in current mode, with current supplied from each transistor of the transistor subdevice 516.

[0074] By employing the ratio reduction device 514, the current of the current source device 532 can be set to approximately 0.1X, and as a result, for example, the static current flowing through the diode-connected transistor 534 is equal to 0.25X - 0.1X = 0.15X. In the exemplary embodiment shown in Figure 5, the sizes of the diode-connected transistors 534, 540, and 542 are selected such that a current gain 10 exists between the diode-connected transistor 534 and each transistor 540 or 542. Thus, the static current flowing through transistors 540 and 542 can be approximately 1.5X (10 times 0.15X).

[0075] If a ratio reduction device 514 is not employed between the baseband filter 512 and the output stage 506 (including, for example, a transistor subdevice 516, a mixer 518, and an attenuator 520), the current flowing through the transistor subdevice 516 will be much higher. For example, consider setting the current of the current source device 532 to zero. In this case, all of the static current (0.25X) from the output of the baseband filter 512 flows through the diode-connected transistor 534, and due to the mirroring gain 10, the static current flowing through transistors 540 and 542 becomes approximately 2.5X. The power efficiency of the output stage 506 is significantly reduced because the static current consumption increases by approximately 66.7%. Furthermore, higher static currents can lead to headroom problems in the output stage 506, which may cause an undesirable increase in signal distortion. As this numerical example shows, by separating the static current from the baseband filter 512 from the static current of the output stage 506, the output stage can operate with a lower ratio of static (bias) current to dynamic (signal) current than the ratio used in the baseband filter 512.

[0076] In one or more embodiments, one or both of the current source 532 and the diode-connected transistor 534 can be programmable, such as being adjustable. This may allow for more precise control of the circuit's power efficiency and performance (e.g., distortion-related) by dynamically adjusting the ratio of static current to dynamic current, on the fly, or both. If only the current source 532 is programmable, only the static current passed by the current source 532 will be selectively controlled. In this case, the ratio of static current to dynamic current can be adjusted to achieve an optimal balance between power efficiency and signal distortion, but there is no mechanism to adjust the gain of the current-mode signal path. If only the diode-connected transistor 534 is programmable, the gain of the current-mode signal path can be selectively controlled, but there is no mechanism to adjust the ratio of static current to dynamic current in the output stage 506. By making both the current source 532 and the diode-connected transistor 534 programmable, both a mechanism for gain control and a mechanism for adjusting the ratio of static current to dynamic current in the output stage 506 are provided. As shown in Figure 5, programmability may be provided by a suitable configuration electronic device 550. All such configuration electronic devices are assumed. An advantage of programmability may be, for example, the ability to adjust the ratio of static bias to signal current before generating the cryogenic waveform.

[0077] Figure 6 shows exemplary simulation results of the distortion performance at radio frequency output for a device according to one or more embodiments described herein. Devices such as device 500 can employ ratio reduction components / devices to reduce the ratio of static bias to signal current at the output stage of the device. The spectrum shown in the figure is obtained by performing a Fast Fourier Transform (FFT) of the output signal. In the circuit simulation, a 10-bit DAC operating at a sampling rate of 1 GHz generates a 184 MHz sine wave, which is applied as the input to a current-mode end-to-end signal path. An upconverter mixer is driven by a 5 GHz LO signal. The I and Q signals are selected to produce an upper sideband tone at a frequency of 5.0 + 0.184 = 5.184 GHz. As shown in simulation result 600, over a 1 GHz bandwidth (4.5 GHz to 5.5 GHz), the maximum distortion component 604 is 48 dB lower than the desired tone 602, and therefore the simulated spurious-free dynamic range (SFDR) is approximately 48 dB. The simulated SFDR value demonstrates excellent performance, especially in such power-efficient implementations. Conventional techniques include voltage-mode single-sideband (SSB) upconverters, voltage-gate RF attenuators, operational transconductance amplifier (OTA)-based baseband filters, and standard high-input impedance G m -C filter implementations have achieved similar functionality. Voltage-mode SSB upconverters introduce nonlinearity. OTA-based baseband filter implementations use greater power and area. Finally, standard high input impedance G m-C filter implementations exhibit higher nonlinearity compared to filter topologies using OTA with negative feedback. However, embodiments disclosed herein facilitate cascaded solutions using current-mode techniques and enable input current-mode interfaces. Furthermore, embodiments proposed herein enhance end-to-end linearity and reduce distortion by minimizing voltage-to-current and current-to-voltage conversions. These techniques can reduce end-to-end power consumption through current reuse.

[0078] In other words, the current-mode embodiments provided herein can provide a path to current reuse and low distortion, which can be appropriately tuned to meet the requirements of cryogenic waveform generation. In one or more embodiments, in contrast to existing techniques, the ratio of static bias to signal current can be reduced between the baseband filter and the output stage of the current-mode signal path. In one or more embodiments, the ratio of static bias to signal current can be selectively and dynamically changed. Furthermore, in one or more embodiments, the gain of the current-mode signal path can be adjusted using the same circuitry used to change the ratio of static bias to signal current. One or more embodiments described herein may be suitable for quantum-based applications such as waveform generation for controlling one or more qubits, such as superconducting qubits. The techniques described herein are equally applicable to other high-bandwidth communication systems and can be implemented with commercial CMOS technology. The techniques of one or more exemplary embodiments described herein can provide innovative strategies for implementing CMOS-controlled pulse generation analog circuits that enable improved scalability of future quantum computing systems and can therefore serve as building blocks for cryo-CMOS implementations.

[0079] Next, Figure 7 shows a flowchart of an exemplary and non-limiting method 700 that can facilitate the process of using a current-mode signal path device, such as the device 500 in Figure 5, according to one or more embodiments described herein. Although the non-limiting method 700 is described in relation to the device 500 in Figure 5, the non-limiting method 700 may also be applicable to other systems or devices, or both, described herein, such as the waveform generator 110 in Figure 1, the system 200 in Figure 2, or the architecture 400 in Figure 4, or a combination thereof. For brevity, repeated descriptions of similar elements or processes, or both, employed in each embodiment are omitted.

[0080] In 704, a non-limiting method 700 may include outputting a radio frequency output signal by a radio frequency pulse generator (e.g., device 500) operably coupled to a quantum processor, the radio frequency pulse generator comprising a baseband filter and an output stage defining a current-mode signal path, as well as a current source and a diode-connected transistor arranged in parallel within the current-mode signal path.

[0081] In 706, a non-limiting method 700 may include, by a device (e.g., device 500), splitting the current from a baseband filter between a current source and a diode-connected transistor, wherein the splitting may include passing a static current in the current source and passing both a static current and a dynamic current in the diode-connected transistor.

[0082] In 708, non-limiting methods 700 may include changing the static-to-dynamic current ratio in a diode-connected transistor by a device (e.g., device 500) or a parent system (e.g., quantum system 101) or both, wherein the diode-connected transistor is programmable.

[0083] In 710, a non-limiting method 700 may include outputting a radio frequency output signal without connecting a turnaround current mirror between the diode-connected transistor and the output stage.

[0084] In 712, non-limiting methods 700 may include a device (e.g., device 500) generating a radio frequency output in the output stage upconverter mixer.

[0085] In 714, non-limiting methods 700 may include facilitating a lower static-to-dynamic current ratio in the output stage than that of the baseband filter by a device (e.g., device 500).

[0086] In 716, a non-limiting method 700 may include a device (e.g., device 500) creating an output signal referenced to ground from the output stage.

[0087] For the sake of simplicity, the computer-aided and non-computer-aided methodologies provided herein are illustrated or described as a series of actions, or both. The present invention is not limited by the illustrated actions or the order of actions, or both. For example, actions may be performed one or more times in a sequence, simultaneously, or both, or in conjunction with other actions not presented or described herein. Furthermore, not all illustrated actions are utilized to implement the computer-aided and non-computer-aided methodologies described herein. Additionally, computer-aided and non-computer-aided methodologies may, alternatively, be represented as a series of interrelated states via state diagrams or events. Furthermore, the computer-aided methodologies described below and throughout this specification may be stored on a product to facilitate the transfer and transmission of the computer-aided methodologies to a computer. The term "product," as used herein, is intended to encompass computer programs accessible from any computer-readable device or storage medium.

[0088] In summary, one or more systems, devices, or methods of use or combinations thereof provided herein relate to devices that can facilitate signal generation. A current-mode end-to-end signal path may include a digital-to-analog converter (DAC) operating in current mode and an upconverter mixer operating in current mode and operably coupled to the DAC. The analog inputs and analog outputs of the DAC and upconverter mixer may be expressed as current, and the DAC may generate a baseband signal. In one or more embodiments, a current source and a diode-connected transistor may be arranged in parallel within the current-mode signal path between an output stage comprising a baseband filter and an upconverter mixer. The device or system or both may be a radio frequency DAC. The diode-connected transistor may be programmable to change its gain, or may be directly connected to the output stage without an intermediate turnaround current mirror, or both.

[0089] An advantage of the aforementioned device may be that it allows for a lower ratio of static bias to signal current in the output stage compared to that employed in the baseband filter. Consequently, compared to one or more embodiments of DAC devices that do not employ a parallel arrangement of a current source and diode-connected transistor coupled to the current-mode signal path between the baseband filter and the output stage, current can be reused, power efficiency can be reduced, and distortion components can be reduced.

[0090] As a result of the aforementioned advantages, less power may be required for the operation of one or more qubits in a quantum system. This reduction in power consumption can improve the scaling of qubits in the quantum system. Furthermore, components of the device or system, or both, can be employed in or against a cryogenic chamber, such as a dilution refrigerator, or both.

[0091] Another advantage of the aforementioned device may be that the gain in the device can be changed dynamically, selectively, or both, so that the gain of the current-mode signal path can be adjusted. The gain of the current-mode signal path can be adjusted over a wide range, with high resolution, or both by programming the active width of the diode-connected transistor to vary the mirroring gain between the diode-connected transistor and the subsequent stage. This advantage can be achieved without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0092] Indeed, considering one or more embodiments described herein, practical applications of the devices described herein can reduce power consumption and signal distortion compared to waveforms created to control one or more qubits in a quantum system. In one or more cases, reduced signal distortion may lead to reduced qubit disturbances, increased qubit coherence, or both. This is a useful and practical application of computers, especially considering other effects, or both, on reducing distortion or reducing the decoherence of the qubits being employed, and thus facilitating enhancements (e.g., improvements or optimizations, or both) of the behavior of the qubits being employed. These enhancements may include improved accuracy of quantum results or improved availability of the qubits being employed, or both. Overall, such computerized tools can constitute concrete and tangible technological advancements in the field of quantum computing.

[0093] Furthermore, one or more embodiments described herein may be employed in real-world systems based on the disclosed teachings. For example, one or more embodiments described herein may function within a quantum system, which may receive quantum job requests as input and measure the real-world qubit states of one or more qubits, such as superconducting qubits, in the quantum system. For example, with respect to a DAC device described herein, the DAC device may facilitate waveform generation related to the control of one or more states of one or more qubits.

[0094] Furthermore, the devices and / or methods described herein can be implemented in one or more domains, such as a quantum domain, to enable the execution of scaled quantum programs. In fact, the use of the devices described herein may be scalable, for example, by employing the devices described herein to generate waveforms for one or more qubits in a multi-qubit system. An advantage of the devices and / or methods described herein may be a reduction in the power consumption required to operate one or more qubits in a quantum system. This reduction in power consumption may enable improved scaling of qubits provided in a cryogenic chamber.

[0095] A system or device, or both, has been described (or will be described further, or both) in relation to the interaction between one or more components. Such a system or component, or both, may include a specified component or subcomponent, one or more of the specified components and / or subcomponents, and / or additional components. A subcomponent may be implemented as a component that is communicatively coupled to another component, rather than being contained within a parent component. One or more components or subcomponents, or both, may be combined into a single component to provide aggregated functionality. A component may interact with one or more other components that are not specifically described herein for the sake of brevity but are known to those skilled in the art.

[0096] One or more embodiments described herein can, in one or more embodiments, be essentially, closely, or both tied to computer technology and cannot be implemented outside of a computing environment. For example, one or more processes performed by one or more embodiments described herein can provide more efficient and feasible execution of programs or program instructions or both, such as those relating to RF signal generation or waveform generation or both, compared to existing systems or techniques or both. Systems, computer implementations, or computer program products or combinations thereof that enhance the performance of these processes are extremely useful in the fields of quantum computing and superconducting quantum systems, but cannot be implemented in a clever and practical manner outside of a computing environment.

[0097] One or more embodiments described herein can employ hardware, software, or both to solve highly technical, non-abstract, and non-manifest problems that cannot be performed as a series of mental actions by a human being. For example, neither a human being, nor even thousands of humans, can efficiently, accurately, and / or effectively change the ratio of static bias to signal current, and / or generate RF signals and / or waveforms, as one or more embodiments described herein can facilitate this process. Nor can the human mind, nor a human being using pen and paper, electronically perform such RF signals and / or generation and / or changes to static bias to signal current, as performed by one or more embodiments described herein.

[0098] In one or more embodiments, one or more of the processes described herein can be performed by one or more specialized computers (e.g., specialized processing units, specialized classical computers, specialized quantum computers, specialized hybrid classical / quantum systems, or other types of specialized computers, or a combination thereof) to perform defined tasks related to one or more of the above-described technologies. One or more embodiments described herein, or components thereof, or both, may be employed to solve new problems arising through the adoption of the above-described technological advancements, quantum computing systems, cloud computing systems, computer architectures, or other technologies or combinations thereof.

[0099] One or more embodiments described herein can be fully operated for the purpose of performing one or more operations described herein while also performing one or more other functions (e.g., being fully powered on, fully executed, or another function or a combination thereof).

[0100] Next, moving to Figures 8 to 10, a detailed description of additional context for one or more embodiments described in Figures 1 to 7 in this specification is provided.

[0101] Figure 8 and the following description are intended to provide a brief general description of a preferred operating environment 800 in which one or more embodiments described in Figures 1 to 7 herein may be implemented. For example, one or more components of the embodiments described herein, or both, may be implemented within the operating environment 800 or associated with the operating environment 800 through an accessible means. Furthermore, although one or more embodiments are described in the general context of computer executable instructions that can be run on one or more computers, those skilled in the art will recognize that one or more embodiments may be implemented in combination with other program modules or as a combination of hardware and software.

[0102] Generally, a program module includes routines, programs, components, data structures, or similar items, or combinations thereof, that perform a specific task, implement a specific abstract data type, or both. Furthermore, the methods of the present invention may be practiced using other computer system configurations, including single-processor or multi-processor computer systems, minicomputers, mainframe computers, Internet of Things (IoT) devices, distributed computing systems, and personal computers, handheld computing devices, microprocessor-based or programmable consumer electronic devices, or similar items, or combinations thereof, each of which may be operably coupled to one or more associated devices.

[0103] Computing devices typically include a variety of media, which may include computer-readable storage media, machine-readable storage media, or communication media or a combination thereof, and the two terms are used herein in a manner distinct from each other as follows: Computer-readable storage media or machine-readable storage media can be any available storage media that can be accessed by a computer, and include both volatile and non-volatile media, removable and non-removable media. By example, but not by limitation, computer-readable storage media or machine-readable storage media or both may be implemented in connection with any method or technique for storing information such as computer-readable instructions or machine-readable instructions or both, program modules, structured data or unstructured data or both.

[0104] Computer-readable storage media include, but are not limited to, random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD), Blu-ray disc (BD), and / or other optical disc storage, magnetic cassettes, magnetic tapes, magnetic disk storage and / or other magnetic storage devices, solid-state drives or other solid-state storage devices, and / or other tangible and / or non-transient media that may be used to store specified information. In this regard, the terms “tangible” or “non-transient” as used herein to apply to storage, memory, or computer-readable media or combinations thereof may, as modifiers, exclude only the propagating transient signal itself, and not waive any rights to all standard storage, memory, or computer-readable media or combinations thereof that are not merely propagating transient signals themselves.

[0105] Computer-readable storage media can be accessed by one or more local or remote computing devices for various operations relating to the information stored in the media, for example, via access requests, queries, or other data retrieval protocols or combinations thereof.

[0106] Communication media typically include any information distribution or transmission medium that embodies computer-readable instructions, data structures, program modules, or modulated data signals, such as carrier waves or other transmission mechanisms, or other structured or unstructured data within a data signal. The term “modulated data signal” refers to a signal having one or more characteristics that are set, modified, or both set in a manner that encodes information within one or more signals. By example, but not limited to, communication media may include wired media such as wired networks and direct wired connections, and / or wireless media such as acoustic, RF, infrared, and / or other wireless media.

[0107] Referring again to Figure 8, an exemplary operating environment 800 for implementing one or more embodiments of the elements described herein may include a computer 802, which includes a processing unit 806, system memory 804, or system bus 808, or a combination thereof. One or more elements, factors, or functions of the processing unit 806, or a combination thereof, may be applied to a processor such as 106 of a non-limiting system 100. The processing unit 806 may be implemented in combination with a processor such as 106, as a substitute for a processor, or both.

[0108] Memory 804 can store one or more computer and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by processing unit 806 (e.g., a classical processor, a quantum controller, or a similar processor, or a combination thereof), facilitate the execution of operations defined by executable components or instructions, or both. For example, memory 804 can store computer and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by processing unit 806, facilitate the execution of one or more functions described herein relating to a non-limiting system 100 as described herein, with or without reference to one or more figures of one or more embodiments.

[0109] The memory 804 may employ one or more memory architectures and may include volatile memory (e.g., random access memory (RAM), static RAM (SRAM), dynamic RAM (DRAM), and / or similar) and / or non-volatile memory (e.g., read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), and / or similar).

[0110] The processing unit 806 may comprise one or more types of processors or electronic circuits, or both (e.g., classical processors, quantum controllers, or similar processors or combinations thereof), capable of implementing one or more components and / or instructions that are readable, writable, and / or executable by a computer and / or machine and can be stored in memory 804. For example, the processing unit 806 may perform one or more operations that can be specified by computer and / or machine-readable, writable, and / or instructions, including but not limited to logic, control, input / output (I / O), arithmetic, or similar or combinations thereof. In one or more embodiments, the processing unit 806 may be one or more commercial processors. In one or more embodiments, the processing unit 806 may include one or more central processing units, multicore processors, microprocessors, dual microprocessors, microcontrollers, system-on-a-chip (SOCs), array processors, vector processors, quantum controllers, or other types of processors or combinations thereof. Examples of the processing unit 806 may be employed to implement one or more embodiments described herein.

[0111] The system bus 808 can connect system components, including but not limited to the system memory 804, to the processing unit 806. The system bus 808 may have one or more types of bus structures that can further interconnect to a memory bus (with or without a memory controller), peripheral bus, or local bus, or a combination thereof, using one or more of various commercial bus architectures. The system memory 804 may include ROM 810 or RAM 812, or both. The basic input / output system (BIOS) may be stored in non-volatile memory such as ROM, erasable programmable read-only memory (EPROM), or EEPROM, or a combination thereof, and the BIOS includes basic routines that help transfer information between elements within the computer 802, such as during startup. RAM 812 may include high-speed RAM, such as static RAM, for caching data.

[0112] Computer 802 may include an internal hard disk drive (HDD) 814 (e.g., EIDE, SATA), one or more external storage devices 816 (e.g., magnetic floppy disk drives (FDDs), memory sticks or flash drive readers, memory card readers, and / or similar), and / or a drive 820, such as a solid-state drive or optical disk drive that can read from or write to disk 822, such as a CD-ROM, DVD, BD, and / or similar. If a solid-state drive is involved as an addition, replacement, or both, disk 822 may not be included unless otherwise specified. Although the internal HDD 814 is shown as being located within computer 802, the internal HDD 814 may also be configured for external use in a suitable chassis (not shown). Furthermore, although not shown in operating environment 800, a solid-state drive (SSD) may be used in addition to or instead of the HDD 814. The HDD 814, external storage device 816, and drive 820 may be connected to the system bus 808 by HDD interface 824, external storage interface 826, and drive interface 828, respectively. The HDD interface 824 for external drive implementation may include at least one or both of the Universal Serial Bus (USB) and the Institute of Electrical and Electronics Engineers (IEEE) 1394 interface technologies. Other external drive connection technologies are also assumed in the embodiments described herein.

[0113] Drives and associated computer-readable storage media provide non-volatile storage such as data, data structures, and computer-executable instructions. In the case of computer 802, drives and storage media correspond to the storage of any data in a suitable digital format. While the above description of computer-readable storage media refers to each type of storage device, other types of computer-readable storage media, whether currently existing or to be developed in the future, can also be used in the exemplary operating environment, or any such storage media may contain computer-executable instructions for performing the methods described herein, or both.

[0114] Several program modules, including an operating system 830, one or more applications 832, other program modules 834, or program data 836 or a combination thereof, may be stored in the drive and RAM 812. All or part of the operating system, applications, modules, or data or a combination thereof may also be cached in RAM 812. The systems and / or methods described herein may be implemented using one or more commercial operating systems or combinations of operating systems or both.

[0115] Computer 802 may optionally include emulation technology. For example, a hypervisor (not shown) or other intermediary may emulate the hardware environment of operating system 830, and the emulated hardware may optionally differ from the hardware shown in Figure 8. In relevant embodiments, operating system 830 may include one VM from a plurality of virtual machines (VMs) hosted on computer 802. Furthermore, operating system 830 may provide application 832 with a runtime environment such as the JAVA(R) runtime environment or the .NET framework. The runtime environment is a consistent execution environment that allows application 832 to run on any operating system that includes the runtime environment. Similarly, operating system 830 may support containers, and application 832 may take the form of a container, which is a lightweight, standalone executable software package containing, for example, code, runtime, system tools, system libraries, or application configuration or a combination thereof.

[0116] Furthermore, the computer 802 can be enabled using security modules such as a Trusted Processing Module (TPM). For example, with a TPM, the boot component hashs the next boot component, waits until the result matches a protected value, and then loads the next boot component. This process can be performed at any layer in the computer 802's code execution stack, for example, at the application execution level, the operating system (OS) kernel level, or both, thereby enabling security at any level of code execution.

[0117] An entity may input or transmit commands and / or information to or from computer 802 via one or more wired / wireless input devices, such as a keyboard 838, a touchscreen 840, or a pointing device such as a mouse 842, or a combination thereof. Other input devices (not shown) may include microphones, infrared (IR) remote controls, radio frequency (RF) remote controls, and / or other remote controls, joysticks, virtual reality controllers and / or virtual reality headsets, gamepads, stylus pens, image input devices such as cameras, gesture sensor input devices, visual-motion sensor input devices, emotion or face detection devices, biometric input devices such as fingerprint and / or iris scanners, and / or similar. These and other input devices may be connected to the processing unit 806 via an input device interface 844 which can be coupled to the system bus 808, but may also be connected by other interfaces such as a parallel port, an IEEE 1394 serial port, a game port, a USB port, an IR interface, a Bluetooth(R) interface, or similar or a combination thereof.

[0118] As an alternative, or additional, or both, a monitor 846 or other type of display device may be connected to the system bus 808 via an interface such as a video adapter 848. In addition to the monitor 846, the computer typically includes other peripheral output devices (not shown), such as speakers, printers, or similar devices or combinations thereof.

[0119] Computer 802 can operate in a networked environment using a logical connection via wired communication, wireless communication, or both to one or more remote computers, such as remote computer 850. Remote computer 850 can be a workstation, server computer, router, personal computer, portable computer, microprocessor-based entertainment appliance, peer device, or other common network node or combination thereof, and typically includes many or all of the elements described with respect to computer 802, but for brevity, only the memory / storage device 852 is shown. Additionally, or alternatively, or both, computer 802 may be coupled (e.g., communicatively, electrically, operationally, optically, or similarly, or a combination thereof) to one or more external systems, sources, or devices (e.g., classical and / or quantum computing devices, communication devices, and / or similar devices) via data cables (e.g., High Definition Multimedia Interface (HDMI(R)), Standard (RS) 232, Ethernet(R) cable, or similar, or combination thereof) (e.g., communicatively, electrically, operationally, optically, or similarly, or a combination thereof).

[0120] In one or more embodiments, the network may include one or more wired networks or wireless networks, or both, including but not limited to cellular networks, wide area networks (WANs) (e.g., the Internet), or local area networks (LANs). For example, one or more embodiments described herein may communicate with one or more external systems, sources, or devices, such as computing devices, or combinations thereof, using substantially any designated wired or wireless technology (and vice versa), where the wired or wireless technology includes Wireless Fidelity (Wi-Fi), Global System for Mobile Communications (GSM), Universal Mobile Communications System (UMTS), Microwave Access Global Interoperability (WiMAX), Enhanced General-Purpose Packet Radio Services (Enhanced GPRS), 3GPP Long-Term Evolution (LTE), 3GPP2 Ultra Mobile Broadband (UMB), High-Speed ​​Packet Access (HSPA), Zigbee and other 802.XX wireless technologies and / or legacy communication technologies, BLUETOOTH(R), Session Initiation Protocol (SIP), ZIGBEE(R), RF4CE protocol, WirelessHART protocol, 6LoWPAN (IPv6 over Low Power Wireless This includes, but is not limited to, Area Networks, Z-Wave, ANT, ultra-wideband (UWB) standard protocols, and / or other proprietary and / or non-proprietary communication protocols.In related examples, one or more embodiments described herein may include hardware (e.g., a central processing unit (CPU), transceivers, decoders, quantum hardware, quantum controllers, and / or similar), software (e.g., a set of threads, a set of processes, running software, quantum pulse schedules, quantum circuits, quantum gates, and / or similar), and / or combinations of hardware and / or software that facilitate communication of information between one or more embodiments described herein and external systems, sources, and / or devices (e.g., computing devices, communication devices, and / or similar).

[0121] The illustrated logical connections include wired / wireless connections to a local area network (LAN) 854 or a larger network, such as a wide area network (WAN) 856, or both. LAN and WAN networking environments are common in offices and companies and can facilitate enterprise-wide computer networks such as intranets, all of which can connect to global communication networks, such as the Internet.

[0122] When used in a LAN networking environment, computer 802 may be connected to the local network 854 via a wired, wireless, or both communication network interface or adapter 858. Adapter 858 can facilitate wired, wireless, or both communication to LAN 854, and LAN 854 may also include a wireless access point (AP) positioned to communicate with adapter 858 in wireless mode.

[0123] When used in a WAN networking environment, computer 802 may include a modem 860, or it may be connected to a communication server on WAN 856 via the Internet, for example, by other means for establishing communication via WAN 856, or both. The modem 860 may be internal or external or both, and may be a wired or wireless device or both, and may be connected to system bus 808 via input device interface 844. In a networked environment, program modules shown with respect to computer 802 or a part thereof may be stored in remote memory / storage device 852. The network connections shown are merely illustrative, and one or more other means may be used to establish communication links between computers.

[0124] When used in either a LAN networking environment or a WAN networking environment, computer 802 can access, in addition to, or instead of, the external storage device 816 described above, or both, a cloud storage system or other network-based storage system, such as a network virtual machine, which provides one or more elements of information storage and / or processing, for example, but not limited to these. Generally, the connection between computer 802 and the cloud storage system can be established via LAN 854 or WAN 856, for example, by adapter 858 or modem 860, respectively. When computer 802 is connected to the relevant cloud storage system, the external storage interface 826 can use adapter 858 or modem 860 or both to manage the storage provided by the cloud storage system, similar to other types of external storage. For example, the external storage interface 826 may be configured to provide access to the cloud storage source as if the cloud storage source were physically connected to computer 802.

[0125] Computer 802 is capable of communicating with any wireless device, or an entity positioned to operate within a wireless network, or both, such as a printer, scanner, desktop and / or portable computer, portable data assistant, communications satellite, telephone, and / or any device or location associated with a wirelessly discoverable tag (kiosk, newsstand, store shelf, and / or similar). This may include Wireless Fidelity (Wi-Fi) and Bluetooth® wireless technologies. Thus, communication can be a predefined structure, similar to conventional networks, or simple ad-hoc communication between at least two devices.

[0126] The exemplary embodiments described herein may be applied to a distributed computing environment (e.g., a cloud computing environment) such as the one described below with reference to Figure 9, in which specific tasks are performed by remote processing devices linked via a communication network. In a distributed computing environment, program modules may reside in local, remote, or both memory storage devices.

[0127] For example, one or more embodiments or components of the embodiments described herein, or both, may employ one or more computing resources of the cloud computing environment 950 described below with reference to Figure 9, or one or more functional abstraction layers (e.g., quantum software, or both, or both, or both, or both, or quantum software, or the same, or both, or one or more, or both, or the same, or one or more, or both, or the same, or one or more, or both, or the same, or one or more, or both, or quantum software, or the same, or both, or quantum software, or the same, or both, or quantum computing devices, or quantum software, or both, or the same, or both, or quantum computing devices, quantum computers, quantum controllers, quantum circuit simulation software, superconducting circuits, or the same, or both, or both, which may be employed by one or more embodiments or components of the embodiments described herein, or both, to perform one or more operations of the embodiments described herein. For example, one or more embodiments or components thereof described herein can employ one or more classical computing resources or quantum computing resources or both to perform one or more classical and / or quantum mathematical functions, computations and / or equations, script calculations and / or processing, algorithms, models (e.g., artificial intelligence (AI) models, machine learning (ML) models and / or similar models), and / or other operations by one or more embodiments described herein.

[0128] While one or more embodiments described herein include a detailed description of cloud computing, implementations of the teachings described herein are not limited to cloud computing environments. Rather, one or more embodiments described herein can be implemented in combination with any other type of computing environment currently known or to be developed in the future.

[0129] Cloud computing is a service delivery model that enables convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, or services, or a combination thereof), allowing these resources to be provisioned and released quickly with minimal administrative effort or interaction with service providers. This cloud model may include at least five features, at least three service models, and at least four deployment models.

[0130] The features are as follows:

[0131] On-demand self-service: Cloud users can unilaterally and automatically provision server time and computing power such as network storage as needed, without requiring human interaction with the service provider.

[0132] Broad network access: This capability is available over a network and can be accessed using standard mechanisms, thus facilitating use by heterogeneous thin-client or thick-client platforms (e.g., mobile phones, laptops, and PDAs).

[0133] Resource Pool: A provider's computing resources are pooled and delivered to multiple users using a multi-tenant model, with various physical and virtual resources dynamically allocated and reallocated as needed. Users typically have a sense of location independence in that they have neither control nor know the exact location of the resources provided, although at a higher level of abstraction they can specify a location (e.g., country, state, or data center, or a combination thereof).

[0134] Rapid Adaptability: Capabilities can be provisioned quickly and flexibly, automatically in one or more cases, scale out quickly, and be released quickly to scale in quickly. Capabilities available for provisioning appear to users as if they can purchase any amount at any time without limit.

[0135] Service Measurement: Cloud systems leverage measurement capabilities to automatically control and optimize resource usage at one or more levels of abstraction appropriate to the type of service (e.g., storage, processing, bandwidth, or active user accounts, or a combination thereof). Monitoring, control, and reporting of resource usage, or a combination thereof, are possible, providing transparency to both service providers and users.

[0136] The service model is as follows:

[0137] SaaS (Software as a Service): The capability provided to the user is the use of the provider's applications running on a cloud infrastructure. These applications can be accessed from various client devices via thin-client interfaces such as web browsers (e.g., web-based email). The user does not manage or control the underlying cloud infrastructure, including the network, servers, operating system, storage, or individual application functions or combinations thereof, except for the possibility of making limited user-specific application configuration settings.

[0138] PaaS (Platform as a Service): The ability provided to the user is to deploy applications created or acquired by the user, using programming languages ​​and tools supported by the provider, onto the cloud infrastructure. The user does not manage or control the underlying cloud infrastructure, including the network, servers, operating system, or storage or a combination thereof, but can control the configuration of the deployed applications and, in some cases, the application hosting environment.

[0139] IaaS (Infrastructure as a Service): The capabilities provided to the user are the provisioning of processing, storage, networking, or other basic computing resources, or a combination thereof, and the user can deploy and run any software, which may include operating systems and applications. The user does not manage or control the underlying cloud infrastructure, but can control the operating system, storage, deployed applications, or, in some cases, have limited control over selected network components (e.g., host firewalls), or both.

[0140] The deployment model is as follows:

[0141] Private Cloud: This cloud infrastructure is operated solely for the organization. This cloud infrastructure can be managed by the organization or a third party and can reside on-premises or off-premises.

[0142] Community Cloud: This cloud infrastructure is shared by multiple organizations and supports specific communities that share common interests (e.g., missions, security requirements, policies, or compliance considerations, or a combination thereof). This cloud infrastructure can be managed by an organization or a third party and can reside on-premises or off-premises.

[0143] Public Cloud: This cloud infrastructure is available for use by general users or large industry groups and is owned by the organization that sells the cloud service.

[0144] Hybrid Cloud: This cloud infrastructure is a combination of two or more clouds (private, community, or public) that are joined together while retaining their unique entities, through standardized or proprietary technologies that enable the portability of data and applications (e.g., cloud bursting to adjust load balancing between clouds).

[0145] Cloud computing environments are service-oriented environments that emphasize statelessness, low coupling, modularity, semantic interoperability, or a combination thereof. At the heart of cloud computing is the infrastructure, which includes a network of interconnected nodes.

[0146] Furthermore, an unspecified system 100 or exemplary operating environment 800, or both, may be associated with, contained within, or both of the following: data analysis systems, data processing systems, graph analysis systems, graph processing systems, big data systems, social network systems, speech recognition systems, image recognition systems, graphical modeling systems, bioinformatics systems, data compression systems, artificial intelligence systems, authentication systems, syntactic pattern recognition systems, medical systems, health monitoring systems, network systems, computer network systems, communication systems, router systems, server systems, high-availability server systems (e.g., telecom server systems), web server systems, file server systems, data server systems, disk array systems, powered insertion board systems, cloud-based systems, or similar systems or combinations thereof. Accordingly, an unrestricted system 100 or an exemplary operating environment 800, or both, may be employed using hardware or software or both to solve problems that are inherently highly technical, non-abstract, or cannot be performed as a series of mental acts by humans, or a combination thereof.

[0147] Next, referring to the details of one or more elements shown in Figure 9, an exemplary cloud computing environment 950 is shown. As shown in the figure, the cloud computing environment 950 includes one or more cloud computing nodes 910 that can communicate with local computing devices used by cloud users, such as a personal digital assistant (PDA) or mobile phone 954A, a desktop computer 954B, a laptop computer 954C, or an automotive computer system 954N, or a combination thereof. Although not shown in Figure 9, the cloud computing nodes 910 may further include quantum platforms (e.g., quantum computers, quantum hardware, quantum software, or similar, or a combination thereof) that can communicate with local computing devices used by cloud users. The cloud computing nodes 910 can communicate with each other. These nodes may be grouped physically or virtually within one or more networks, such as a private cloud, community cloud, public cloud, or hybrid cloud, or a combination thereof, as described herein (not shown). This enables the cloud computing environment 950 to provide infrastructure, platforms, or software, or a combination thereof, as a service that does not require cloud users to maintain resources on their local computing devices. The types of computing devices 954A to 954N shown in Figure 9 are for illustrative purposes only, and the computing nodes 910 and the cloud computing environment 950 can communicate with any type of computerized device via any type of network or network-addressable connection or both (for example, using a web browser).

[0148] Referring next to the details of one or more elements shown in Figure 10, a set of functional abstraction layers 1000, such as those provided by the cloud computing environment 950 (Figure 9), is shown. One or more embodiments described herein may be associated with one or more functional abstraction layers (e.g., hardware and software layer 1060, virtualization layer 1070, management layer 1080, or workload layer 1090 or a combination thereof) described below with reference to Figure 10, by means of accessible, etc. The components, layers, or functions or combinations thereof shown in Figure 10 are for illustrative purposes only, and the embodiments described herein are not limited thereto. As illustrated, the following layers or corresponding functions or both are provided:

[0149] The hardware and software layer 1060 may include hardware and software components. Examples of hardware components include a mainframe 1061, a RISC (Reduced Instruction Set Computer) architecture-based server 1062, a server 1063, a blade server 1064, a storage device 1065, and / or a network and / or networking component 1066. In one or more embodiments, the software components may include network application server software 1067, quantum platform routing software 1068, or quantum software (not shown in Figure 10), or a combination thereof.

[0150] The virtualization layer 1070 can provide an abstraction layer from which the following examples of virtual entities may be provided: a virtual server 1071, virtual storage 1072, a virtual network 1073 including a virtual private network, a virtual application and / or operating system 1074, and / or a virtual client 1075.

[0151] For example, the management layer 1080 may provide the following functions: Resource provisioning 1081 may provide dynamic procurement of computing and other resources that may be used to perform tasks within the cloud computing environment. Metering and pricing 1082 may provide cost tracking as resources are used within the cloud computing environment, and / or billing and / or charges for the consumption of these resources. For example, these resources may include one or more application software licenses. Security may provide verification of identities for cloud users or tasks or both, and protection for data or other resources or both. User (or entity) portal 1083 may provide users and system administrators with access to the cloud computing environment. Service level management 1084 may provide allocation and / or management of cloud computing resources so that the required service levels are met. Service level agreement (SLA) planning and execution 1085 may provide pre-positioning and procurement of cloud computing resources that are expected to be required in the future, in accordance with the SLA.

[0152] The workload layer 1090 can provide examples of functions that can be utilized in a cloud computing environment. Non-limiting examples of workloads and functions that can be provided from this layer include mapping and navigation 1091, software development and lifecycle management 1092, virtual classroom education delivery 1093, data analysis processing 1094, transaction processing 1095, or application transformation software 1096 or a combination thereof.

[0153] The embodiments described herein may cover one or more systems, methods, apparatus, or computer program products or combinations thereof, integrated at any possible level of technical detail. A computer program product may include a computer-readable storage medium (or more computer-readable storage mediums) having computer-readable program instructions for causing a processor to implement one or more elements / parts of one or more embodiments described herein. The computer-readable storage medium may be a tangible device capable of holding and storing instructions used by an instruction execution device. The computer-readable storage medium may be, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, or a superconducting storage device, or any preferred combination thereof. A non-exclusive list of more specific examples of computer-readable storage media includes, but is not limited to, portable computer diskettes, hard disks, random-access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random-access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disks (DVDs), memory sticks, floppy disks, or mechanically encoded devices such as punch cards or grooved raised structures on which instructions are recorded, or any preferred combination of the above. The computer-readable storage media used herein should not be construed as transient signals themselves, such as radio waves and / or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides and / or other transmission media (e.g., optical pulses through optical fiber cables), and / or electrical signals transmitted through wires.

[0154] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to each computing / processing device, and / or to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical transmission fibers, wireless transmissions, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface in each computing / processing device receives computer-readable program instructions from the network and transfers those computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing device. Computer-readable program instructions for performing the operation of one or more embodiments described herein may be assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, and / or source code and / or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk(R) and C++ and / or procedural programming languages ​​such as the C programming language and / or similar programming languages. Computer-readable program instructions may be executed as a standalone software package on a computer as a whole, partially on a computer, partially on a computer and / or partially on a remote computer, or entirely on a remote computer and / or on a server.In the latter scenario, the remote computer may be connected to the computer via any type of network, including a local area network (LAN) and / or a wide area network (WAN), and / or may be connected to an external computer (for example, via the Internet using an Internet service provider). In one or more embodiments, to perform one or more parts of one or more embodiments described herein, an electronic circuit including, for example, a programmable logic circuit, a field-programmable gate array (FPGA), or a programmable logic array (PLA) or a combination thereof may execute computer-readable program instructions by personalizing the electronic circuit using state information of the computer-readable program instructions.

[0155] One or more parts of one or more embodiments described herein are described with reference to flowcharts or block diagrams, or both, of methods, apparatus (systems), and computer program products according to one or more embodiments described herein. Each block in a flowchart or block diagram, or both, and combinations of blocks in a flowchart or block diagram, or both, can be implemented by computer-readable program instructions. These computer-readable program instructions can be provided to the processor of a general-purpose computer, a dedicated computer, or other programmable data processing device or combination thereof, so that instructions executed via the processor of a computer or other programmable data processing device can create means for performing functions / actions specified in one or more blocks in a flowchart or block diagram, or both, thereby creating a machine. These computer-readable program instructions can also be stored on a computer-readable storage medium on which the instructions are stored so that the storage medium can contain a product containing instructions that can perform one or more parts of functions / actions specified in one or more blocks in a flowchart or block diagram, or both, and can be directed to a computer, a programmable data processing device, or other device or combination thereof to function in a particular manner. Computer-readable program instructions can also be loaded into a computer, other programmable data processing device, or other device or combination thereof to create a computer execution process that performs a function / action specified in one or more blocks of a flowchart or block diagram, or both, thereby causing a series of operational actions to be performed on the computer, other programmable device, or other device or combination thereof.

[0156] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, or operation, or combination thereof, of possible implementations of a system, computer implementation, or computer program product or combination thereof according to one or more embodiments described herein. In this regard, each block in a flowchart or block diagram may represent a module, segment, or part or combination thereof of instructions, containing one or more executable instructions for performing a specified logical function. In one or more alternative implementations, the functions described in a block may be performed in an order different from the order shown in the figure. For example, depending on the functionality involved, two consecutively shown blocks may be executed substantially simultaneously, or they may be executed in reverse order, or both. It should also be noted that each block in a block diagram and / or flowchart, and / or combinations of blocks in a block diagram and / or flowchart, may be implemented by a dedicated hardware-based system capable of performing a specified function and / or action and / or one or more combinations of dedicated hardware and / or computer instructions.

[0157] While the subject matter is described above in the general context of computer executable instructions for computer program products running on one or more computers, those skilled in the art will understand that one or more embodiments of this specification can be implemented in combination with one or more other program modules. Generally, a program module includes routines, programs, components, data structures, or the like, or combinations thereof, that perform a specific task, implement a specific abstract data type, or both. Furthermore, computer implementations of the present invention can be practiced using single-processor and / or multi-processor computer systems, minicomputing devices, mainframe computers, and other computer system configurations, including computers, handheld computing devices (e.g., PDAs, telephones), microprocessor-based or programmable consumer and / or industrial electronic devices, and / or the like. The exemplified elements can also be practiced in a distributed computing environment where tasks are performed by remote processing devices linked over a communication network. However, one or more elements, if not all, of the one or more embodiments described herein can be practiced on a standalone computer. In a distributed computing environment, program modules can be located on both local and remote memory storage devices.

[0158] As used in this application, the terms “component,” “system,” “platform,” “interface,” or similar terms or combinations thereof may refer to, include, or both, one or more computer-related entities having a specific functionality, or entities related to a computing machine. Entities described herein may be hardware, a combination of hardware and software, software, or running software. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, or a computer or a combination thereof. Exemplarily, both an application running on a server and that server may be components. One or more components may reside in a process or an execution thread or both, and components may be localized on one computer, distributed across two or more computers, or both. In another example, each component may be executed from various computer-readable media storing various data structures. Components can communicate via local, remote, or both processes, according to signals containing one or more data packets (for example, data from one component interacting via signals with another component in a local or distributed system, or with another system via a network such as the Internet, or both). As another example, a component may be a device having a specific function provided by mechanical parts operated by electrical or electronic circuits, and the electrical or electronic circuits are operated by software or firmware applications, or both, executed by a processor. In such cases, the processor may be located inside or outside the device, or both, and may execute at least a portion of the software or firmware application, or both.As yet another example, a component can be a device that provides a specific function via electronic components without mechanical parts, and the electronic components may include a processor or other means, or both, that execute software or firmware, or both, that provides at least partially the functionality of the electronic components. A component can be emulated, for example, via a virtual machine in a cloud computing system.

[0159] Furthermore, the term “or” is intended to mean an inclusive “or,” not an exclusive “or.” That is, unless otherwise specified or it is clear from the context, “X adopts A or B” is intended to mean any of the natural inclusive substitutions. That is, if X adopts A, X adopts B, or X adopts both A and B, then “X adopts A or B” is satisfied in any of the above cases. Furthermore, the articles “a” and “an” used herein and in the accompanying drawings should generally be interpreted as meaning “one or plural,” unless otherwise specified or it is clear from the context that they refer to a singular form. Where used herein, the terms “example” or “exemplary” or both are used to mean example, case, or illustration. To avoid misunderstanding, the subject matter described herein is not limited to such examples. Furthermore, no element or design described herein as “example” or “exemplary” or both should be construed as necessarily preferable or advantageous compared to one or more other elements or designs, nor should it be meant to exclude equivalent exemplary structures and techniques known to those skilled in the art.

[0160] The term “processor,” as used herein, can refer to substantially any computing unit or computing device, or both, including but not limited to single-core processors, single processors with software multithreading capability, multi-core processors, multi-core processors with software multithreading capability, multi-core processors with hardware multithreading technology, parallel platforms, or parallel platforms with distributed shared memory, or any combination thereof. Furthermore, a processor can refer to an integrated circuit, application-specific integrated circuit (ASIC), digital signal processor (DSP), field-programmable gate array (FPGA), programmable logic controller (PLC), composite programmable logic device (CPLD), or discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. Also, a processor may utilize nanoscale architectures, such as but not limited to molecular and quantum dot-based transistors, switches, or gates, or combinations thereof, to optimize space use, enhance the performance of associated equipment, or both. A processor can be implemented as a combination of computing units.

[0161] In this specification, terms such as “store,” “storage,” “data store,” “data storage,” and “database,” as well as substantially any other information storage components relating to the operation and function of the components, are used to refer to entities embodied in “memory components,” “memory,” or components containing memory. The memory or memory components described herein, or both, may be either volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory may include, but not exclusively, read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random-access memory (RAM) (e.g., ferroelectric RAM (FeRAM)) or a combination thereof. Volatile memory may include, for example, RAM that can act as external cache memory. As an example, and not an limitation, RAM may be available in many forms, such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data-rate SDRAM (DDR SDRAM), extended SDRAM (ESDRAM), sync-link DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), or Rambus dynamic RAM (RDRAM), or a combination thereof. Furthermore, the memory components described herein for systems or computer implementations, or both, are intended to include, but are not limited to, these, any other suitable types of memory, or both.

[0162] The above descriptions include only examples of systems and computer implementations. Naturally, it is impossible to describe all possible combinations of components or computer implementations, or both, in order to describe one or more embodiments; however, those skilled in the art will understand that many further combinations or substitutions, or both, of one or more embodiments are possible. Furthermore, to the extent that terms such as “includes,” “have,” and “possess” are used in the detailed description, claims, appendices, or drawings, or any combination thereof, such terms are intended to be inclusive, as is the case when the term “equips” is used as a transitional term in the claims.

[0163] The descriptions of one or more embodiments are presented for illustrative purposes only and are not intended to be exhaustive or to limit the embodiments described herein. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and ideas of the embodiments described. The terminology used herein has been chosen to best describe the principles of the embodiments, practical applications, and / or technical improvements beyond the technology available on the market, and / or to enable those skilled in the art to understand the embodiments described herein.

Claims

1. It is a device, A baseband filter and output stage that define the current-mode signal path, and The current mode signal path includes a current source and a diode-connected transistor arranged in parallel, A device in which the diode-connected transistor is selectively adjustable to change its gain.

2. The device according to claim 1, wherein the current source provides a static current and the diode-connected transistor provides both a static current and a dynamic current.

3. The device according to claim 2, wherein the current source is programmable to adjust the static-to-dynamic current ratio in the diode-connected transistor and the output stage.

4. The device according to claim 1, wherein the output stage comprises two or more transistors of the same negative or positive type as the diode-connected transistor.

5. The device according to claim 1, wherein the diode-connected transistor is directly connected to the output stage without a turnaround current mirror connected between the diode-connected transistor and the output stage.

6. The aforementioned output stage, The device according to claim 1, comprising an upconverter mixer that generates a radio frequency output signal.

7. The device according to claim 2, wherein the current-mode signal path facilitates lowering the static-to-dynamic current ratio in the output stage compared to the baseband filter.

8. It is a method, The process includes outputting a radio frequency output signal by a radio frequency (RF) pulse generator operably coupled to a quantum processor, wherein the RF pulse generator A baseband filter and output stage that define the current-mode signal path, and The current mode signal path includes a current source and a diode-connected transistor arranged in parallel, A method wherein the diode-connected transistor is programmable to change its gain.

9. The RF pulse generator divides the current from the baseband filter between the current source and the diode-connected transistor. The RF pulse generator provides a static current to the current source, The RF pulse generator provides both static and dynamic current to the diode-connected transistor. The method according to claim 8, further comprising:

10. The method according to claim 9, further comprising changing the static-to-dynamic current ratio in the diode-connected transistor using the RF pulse generator.

11. The method according to claim 8, further comprising outputting the radio frequency output signal by the RF pulse generator without connecting a turnaround current mirror between the diode-connected transistor and the output stage.

12. The method according to claim 8, further comprising generating the radio frequency output in the upconverter mixer of the output stage using the RF pulse generator.

13. The method according to claim 9, further comprising facilitating a lower static-to-dynamic current ratio in the output stage than that in the baseband filter by using the RF pulse generator.

14. The method according to claim 8, further comprising generating the output signal referenced to ground from the output stage using the RF pulse generator.

15. It is a system, Quantum controller and The system comprises a radio frequency (RF) pulse generator controlled by the quantum controller, wherein the RF pulse generator A baseband filter and output stage that define the current-mode signal path, and The current mode signal path includes a current source and a diode-connected transistor arranged in parallel, A system in which the diode-connected transistor is directly connected to the output stage without a turnaround current mirror connected between the diode-connected transistor and the output stage.

16. The system according to claim 15, wherein the current source provides a static current and the diode-connected transistor provides both a static current and a dynamic current.

17. The system according to claim 15, wherein the diode-connected transistor is programmable to change its gain.

18. The system according to claim 15, wherein the output stage comprises two or more transistors of the same negative or positive type as the diode-connected transistor.

19. The system according to claim 15, wherein the output stage comprises an upconverter mixer that generates a radio frequency output signal.

20. The system according to claim 16, wherein the current-mode signal path generates a static-to-dynamic current ratio lower than that of the baseband filter in the output stage.

21. The system according to claim 16, wherein the current source is programmable to adjust the static-to-dynamic current ratio in the diode-connected transistor and the output stage.

22. It is a device, A baseband filter and output stage that define the current-mode signal path, and The current mode signal path comprises a current source and a programmable diode-connected transistor, A device in which the output stage comprises a pair of output stage portions connected in parallel, and the programmable diode-connected transistor is directly connected to one of the output stage portions.

23. The device according to claim 22, wherein the current source delivers a selectable static current, and the programmable diode-connected transistor delivers both static and dynamic currents, resulting in a selectable gain.

24. It is a device, A baseband filter and output stage that define the current-mode signal path, and The current mode signal path comprises a programmable current source and a programmable diode-connected transistor arranged in parallel, A device in which the programmable diode-connected transistor is directly connected to the output stage without a turnaround current mirror connected between the programmable diode-connected transistor and the output stage.

25. The device according to claim 24, wherein the programmable current source delivers a selectable static current, and the programmable diode-connected transistor delivers both static and dynamic currents, resulting in a selectable gain.

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