Semiconductor equipment
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2025-05-27
- Publication Date
- 2026-06-09
AI Technical Summary
【0021】 本発明により、電気特性が良好であり、信頼性の高い薄膜トランジスタを有する発光装 置を量産高く作製することができる。
Smart Images

Figure 0007872409000001 
Figure 0007872409000002 
Figure 0007872409000003
Abstract
Claims
1. It has transistors 1 through 8, The source electrode or drain electrode of the first transistor is always in electrical contact with the output signal wiring. The source electrode or the other drain electrode of the first transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the second transistor is always in electrical contact with the output signal wiring. The source electrode or the other drain electrode of the second transistor is always in electrical contact with the power line. Either the source electrode or the drain electrode of the third transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is always in electrical contact with the first wiring. The gate electrode of the third transistor is always in electrical contact with the first wiring. Either the source electrode or the drain electrode of the fourth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is always in electrical contact with the power line. The gate electrode of the fourth transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or drain electrode of the fifth transistor is always in electrical contact with the gate electrode of the first transistor. The gate electrode of the fifth transistor is always in conductivity with the second signal line. The source electrode or drain electrode of the sixth transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other of the drain electrode of the sixth transistor is always in electrical contact with the power line. The gate electrode of the sixth transistor is always in conductivity with the gate electrode of the second transistor. The source electrode or drain electrode of the seventh transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other drain electrode of the seventh transistor is always in electrical contact with the power line. The gate electrode of the seventh transistor is always in conductivity with the third signal line. The source electrode or drain electrode of the eighth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the eighth transistor is always in electrical contact with the power line. The gate electrode of the eighth transistor is always in conductivity with the second signal line. When the first wiring is in a conductive state with the gate electrode of the second transistor and the gate electrode of the sixth transistor, at least through the channel formation region of the third transistor, the potential that turns on the second transistor and the potential that turns on the sixth transistor are input to the gate electrode of the second transistor and the gate electrode of the sixth transistor, at least through the channel formation region of the third transistor. When the source electrode or drain electrode of the fifth transistor is in a conductive state with the gate electrode of the first transistor and the gate electrode of the fourth transistor, at least through the channel forming region of the fifth transistor, the potential that turns on the first transistor and the potential that turns on the fourth transistor are input to the gate electrode of the first transistor and the gate electrode of the fourth transistor, at least through the channel forming region of the fifth transistor. The first conductive layer having a region that functions as either the source electrode or the drain electrode of the fifth transistor has a region that functions as either the source electrode or the drain electrode of the seventh transistor. The second conductive layer having a region that functions as the gate electrode of the second transistor has a region that functions as the gate electrode of the sixth transistor, A semiconductor device having a third conductive layer having a region that functions as the other source electrode or drain electrode of the second transistor, the third conductive layer having a region that functions as the other source electrode or drain electrode of the fourth transistor, a region that functions as the other source electrode or drain electrode of the sixth transistor, a region that functions as the other source electrode or drain electrode of the seventh transistor, and a region that functions as the other source electrode or drain electrode of the eighth transistor.
2. It has transistors 1 through 8, The source electrode or drain electrode of the first transistor is always in electrical contact with the output signal wiring. The source electrode or the other drain electrode of the first transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the second transistor is always in electrical contact with the output signal wiring. The source electrode or the other drain electrode of the second transistor is always in electrical contact with the power line. Either the source electrode or the drain electrode of the third transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is always in electrical contact with the first wiring. The gate electrode of the third transistor is always in electrical contact with the first wiring. Either the source electrode or the drain electrode of the fourth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is always in electrical contact with the power line. The gate electrode of the fourth transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or drain electrode of the fifth transistor is always in electrical contact with the gate electrode of the first transistor. The gate electrode of the fifth transistor is always in conductivity with the second signal line. The source electrode or drain electrode of the sixth transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other of the drain electrode of the sixth transistor is always in electrical contact with the power line. The gate electrode of the sixth transistor is always in conductivity with the gate electrode of the second transistor. The source electrode or drain electrode of the seventh transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other drain electrode of the seventh transistor is always in electrical contact with the power line. The gate electrode of the seventh transistor is always in conductivity with the third signal line. The source electrode or drain electrode of the eighth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the eighth transistor is always in electrical contact with the power line. The gate electrode of the eighth transistor is always in conductivity with the second signal line. When the first wiring is in a conductive state with the gate electrode of the second transistor and the gate electrode of the sixth transistor, at least through the channel formation region of the third transistor, the potential that turns on the second transistor and the potential that turns on the sixth transistor are input to the gate electrode of the second transistor and the gate electrode of the sixth transistor, at least through the channel formation region of the third transistor. When the source electrode or drain electrode of the fifth transistor is in a conductive state with the gate electrode of the first transistor and the gate electrode of the fourth transistor, at least through the channel forming region of the fifth transistor, the potential that turns on the first transistor and the potential that turns on the fourth transistor are input to the gate electrode of the first transistor and the gate electrode of the fourth transistor, at least through the channel forming region of the fifth transistor. The first conductive layer having a region that functions as either the source electrode or the drain electrode of the fifth transistor has a region that functions as either the source electrode or the drain electrode of the seventh transistor. The second conductive layer having a region that functions as the gate electrode of the second transistor has a region that functions as the gate electrode of the sixth transistor, The third conductive layer having a region that functions as the other source electrode or drain electrode of the second transistor has a region that functions as the other source electrode or drain electrode of the fourth transistor, a region that functions as the other source electrode or drain electrode of the sixth transistor, a region that functions as the other source electrode or drain electrode of the seventh transistor, and a region that functions as the other source electrode or drain electrode of the eighth transistor. A semiconductor device in which, in a plan view, the channel length direction of the second transistor is aligned with the channel length direction of the sixth transistor.