Phase inversion amplifier
The phase inversion amplifier design addresses the issue of large circuit size and high power consumption by integrating an amplifying transistor, electronic switches, and a transformer, resulting in a compact and efficient solution with adjustable parameters.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- FUJIKURA LTD
- Filing Date
- 2023-10-31
- Publication Date
- 2026-06-23
AI Technical Summary
Conventional RF amplifiers with phase inversion functions have larger circuit sizes and higher power consumption due to separate amplifier and phase inversion circuit configurations, which can increase IC size and power consumption.
A phase inversion amplifier design incorporating an amplifying transistor, electronic switches, and a transformer with magnetically coupled windings to reduce circuit size and power consumption, utilizing a cascode-connected switching transistor and transformer configuration.
The proposed design achieves reduced circuit size and power consumption compared to conventional amplifiers, with adjustable frequency characteristics, gain, and output impedance.
Smart Images
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Abstract
Description
Technical Field
[0001] The present invention relates to a phase inversion amplifier. This application claims priority based on Japanese Patent Application No. 2023-004431 filed on January 16, 2023, and incorporates its content herein.
Background Art
[0002] Non-Patent Document 1 below discloses an RF amplifier with a phase inversion function used in a wireless communication system. This RF amplifier is configured such that an amplifier (LNA) and a phase inversion circuit (PI) are independent circuit blocks, and a balun for converting a single-ended signal into a differential signal is arranged in front of the phase inversion circuit because it is necessary to input a differential signal to the phase inversion circuit.
Prior Art Documents
Non-Patent Documents
[0003]
Non-Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] Incidentally, the above-mentioned RF amplifier with phase inversion function is a form of phase inversion amplifier, but it employs a configuration in which the amplifier (LNA) and the phase inversion circuit (PI) are provided independently, and a balun is required before the differential converter circuit, which can result in a larger circuit size and higher power consumption. For example, if such an RF amplifier with phase inversion function were to be constructed as an integrated circuit (IC), the IC size may increase, and power consumption may also increase.
[0005] This disclosure is made in view of the circumstances described above, and aims to provide a phase inversion amplifier that can reduce the circuit size and power consumption compared to conventional amplifiers. [Means for solving the problem]
[0006] To achieve the above objective, a first aspect of the phase inversion amplifier of the present disclosure comprises an amplifying transistor for amplifying an input signal, two electronic switches, one end of which is connected to the output terminal of the amplifying transistor and whose ON / OFF state is controlled by two control signals, and a transformer, the primary winding of which is connected between the two other ends of the two electronic switches and which outputs an amplified signal from one end of the secondary winding.
[0007] A second embodiment of the phase inversion amplifier of the present disclosure, in the first embodiment, comprises a primary winding comprising a first winding and a second winding, one end of the first winding connected to the other end of one of the electronic switches, one end of the second winding connected to the other end of the other electronic switch, and the other ends of the first and second windings connected to a power terminal. The secondary winding comprises a third winding and a fourth winding connected in series, with the other end of the fourth winding connected to a ground terminal. The first winding and the third winding are magnetically coupled, and the second winding and the fourth winding are magnetically coupled, and an amplified signal is output from one end of the third winding.
[0008] A third aspect of the phase inversion amplifier of the present disclosure is, in the first or second aspect described above, a switching transistor cascode-connected to the amplification transistor.
[0009] A fourth aspect of the phase inversion amplifier of the present disclosure further comprises a circuit element that adjusts at least one of the frequency characteristics, gain, and output impedance, in any one of the first to third aspects described above.
[0010] A fifth aspect of the phase inversion amplifier of the present disclosure is one in which any one of the first to fourth aspects further comprises a gain adjustment circuit for adjusting the amplification of the amplification transistor. [Effects of the Invention]
[0011] According to this disclosure, it is possible to provide a phase inversion amplifier that can reduce the circuit size and power consumption compared to conventional amplifiers. [Brief explanation of the drawing]
[0012] [Figure 1] This is a circuit diagram showing the configuration of a phase-inverting amplifier according to the first embodiment of this disclosure. [Figure 2A] This is a schematic diagram illustrating the operation of a phase inversion amplifier according to the first embodiment of this disclosure. [Figure 2B] This is a schematic diagram illustrating the operation of a phase inversion amplifier according to the first embodiment of this disclosure. [Figure 3] This is a circuit diagram showing the configuration of a phase inversion amplifier according to the second embodiment of this disclosure. [Figure 4] This is a circuit diagram showing the configuration of a phase-inverting amplifier according to the third embodiment of this disclosure. [Figure 5] This is a circuit diagram showing the configuration of a phase inversion amplifier according to the fourth embodiment of this disclosure. [Modes for carrying out the invention]
[0013] Embodiments of this disclosure will be described below with reference to the drawings. [First Embodiment] First, a first embodiment of the present disclosure will be described with reference to Figures 1, 2A, and 2B. As shown in Figure 1, the phase inversion amplifier A according to the first embodiment includes a high-frequency input terminal RFin, a high-frequency output terminal RFout, a first transistor Tr1, a second transistor Tr2, a third transistor Tr3, a first control terminal Cnt1, a second control terminal Cnt2, a coil L1, a transformer T, a power supply terminal Vcc, and a ground terminal GND. The transformer T also includes four windings, namely the first winding M1, the second winding M2, the third winding M3, and the fourth winding M4.
[0014] The high-frequency input terminal RFin is the input terminal of the phase inversion amplifier A and is connected to the base terminal of the third transistor Tr3. A high-frequency signal of a predetermined frequency is input to the high-frequency input terminal RFin from an external source. This high-frequency signal is the input signal to the phase inversion amplifier A and is applied to the base terminal of the third transistor Tr3.
[0015] The high-frequency output terminal RFout is the output terminal of the phase inversion amplifier A and is connected to one end of the third winding M3 in transformer T. This high-frequency output terminal RFout outputs a high-frequency amplified signal, which is the input signal amplified by the phase inversion amplifier A, to the outside.
[0016] As shown in the figure, the first transistor Tr1 is an NPN bipolar transistor, and its base terminal is connected to the first control terminal Cnt1. The emitter terminal of this first transistor Tr1 is connected to the emitter terminal of the second transistor Tr2 and the collector terminal of the third transistor Tr3, and the collector terminal is connected to one end of the first winding M1.
[0017] The second transistor Tr2 is an NPN bipolar transistor, similar to the first transistor Tr1, with its base terminal connected to the second control terminal Cnt2. Furthermore, the emitter terminal of this second transistor Tr2 is connected to the emitter terminal of the first transistor Tr1 and the collector terminal of the third transistor Tr3, while the collector terminal is connected to one end of the second winding M2.
[0018] The third transistor Tr3 is also an NPN bipolar transistor, and its base terminal is connected to the high-frequency input terminal RFin. Also, for this third transistor Tr3, its emitter terminal is connected to one end of the coil L1, and its collector terminal is connected to the emitter terminals of the first transistor Tr1 and the second transistor Tr2.
[0019] The first control terminal Cnt1 is connected to the base terminal of the first transistor Tr1, and a first control signal is applied from the outside. The first control signal is a binary signal for setting the first transistor Tr1 to an ON state or an OFF state. That is, the first transistor Tr1 is in the ON state (conductive state) when the first control signal is at the Hi (high) level, and is in the OFF state (non-conductive state) when the first control signal is at the Lo (low) level.
[0020] The second control terminal Cnt2 is connected to the base terminal of the second transistor Tr2, and a second control signal is applied from the outside. The second control signal is a binary signal for setting the second transistor Tr2 to an ON state or an OFF state. That is, the second transistor Tr2 is in the ON state (conductive state) when the second control signal is at the Hi (high) level, and is in the OFF state (non-conductive state) when the second control signal is at the Lo (low) level.
[0021] Here, the above-mentioned third transistor Tr3 is an amplification transistor that functions as an amplification element. Also, the first transistor Tr1 and the second transistor Tr2 are switching transistors that function as electronic switches. The first transistor Tr1 is one of the electronic switches, and the second transistor Tr2 is the other electronic switch. Also, the collector terminal of the third transistor Tr3 is the output terminal of the third transistor Tr3 (amplification transistor).
[0022] In other words, the first transistor Tr1 and the second transistor Tr2 have one end, the emitter terminal, connected to the output terminal of the third transistor Tr3 (amplifier transistor), and are also cascode-connected to the third transistor Tr3 (amplifier transistor). Thus, the first transistor Tr1 and the second transistor Tr2 are two electronic switches whose ON / OFF state is controlled by two control signals, the first control signal and the second control signal.
[0023] Coil L1 has a first inductance, with one end connected to the emitter terminal of the third transistor Tr3 and the other end connected to the ground terminal GND. This coil L1 is a circuit element for setting the gain of the phase inversion amplifier A. That is, the gain of the phase inversion amplifier A is set by the first inductance, the transformer T, and the collector current of the third transistor Tr3.
[0024] As described above, transformer T comprises a first winding M1, a second winding M2, a third winding M3, and a fourth winding M4, and is provided on the collector terminal side of the first transistor Tr1 and the second transistor Tr2, as shown in the figure. Specifically, one end of the first winding M1 is connected to the collector terminal of the first transistor Tr1, and the other end is connected to the other end of the second winding M2 and the power supply terminal Vcc.
[0025] The second winding M2 has one end connected to the collector terminal of the second transistor Tr2, and the other end connected to the other end of the first winding M1 and the power supply terminal Vcc. The third winding M3 has one end connected to the high-frequency output terminal RFout, and the other end connected to one end of the fourth winding M4. The fourth winding M4 has one end connected to the other end of the third winding M3, and the other end connected to the ground terminal GND. In other words, one end of the fourth winding M4 is connected to the third winding M3, and the other end of the fourth winding M4 is connected to the ground terminal GND.
[0026] In this transformer T, the first winding M1 and the second winding M2 are connected in series, and the third winding M3 and the fourth winding M4 are also connected in series. The first winding M1 and the second winding M2 are set to the first number of windings and constitute the primary winding of transformer T. The third winding M3 and the fourth winding M4 are set to the second number of windings and constitute the secondary winding of transformer T.
[0027] In such a transformer T, the primary winding is connected to the collector terminals (between the two other ends) of the first transistor Tr1 and the second transistor Tr2 (two electronic switches), and one end of the secondary winding is connected to the high-frequency output terminal RFout (the output terminal of the phase inversion amplifier A).
[0028] Furthermore, in this transformer T, the first winding M1 and the third winding M3 are magnetically coupled, and the second winding M2 and the fourth winding M4 are also magnetically coupled. The magnetic coupling coefficient between the first winding M1 and the third winding M3 is the same as that between the second winding M2 and the fourth winding M4. Such a transformer T has a primary inductance determined by the individual inductances and magnetic coupling coefficients of the first winding M1, the second winding M2, the third winding M3, and the fourth winding M4.
[0029] The power terminal Vcc is connected to the other end of the first winding M1 and the other end of the second winding M2 in the transformer T. In other words, the power terminal Vcc is connected to the center tap of the primary winding in the transformer T. Such a power terminal Vcc is connected externally to a DC voltage power supply of a predetermined power supply voltage.
[0030] The grounding terminal GND is connected to the other end of coil L1 and the other end of the fourth winding M4, as shown in the figure. This grounding terminal GND is grounded externally. That is, the grounding terminal GND is set to a lower potential (ground potential) than the power supply terminal Vcc.
[0031] Next, the operation of the phase inversion amplifier A according to the first embodiment configured in this way will be described in detail.
[0032] In this phase-inverting amplifier A, the first transistor Tr1 and the second transistor Tr2 function as two electronic switches whose ON / OFF states are controlled by the first control signal and the second control signal (two control signals) as described above. The first control signal and the second control signal are two control signals that complementarily set the first transistor Tr1 and the second transistor Tr2 to either an ON state or an OFF state.
[0033] In other words, the first transistor Tr1 and the second transistor Tr2 are set to an OFF state when one is turned ON by the first control signal and the second control signal. For example, when the first transistor Tr1 is ON, the second transistor Tr2 is OFF.
[0034] Figure 2A shows the current path when the first transistor Tr1 is ON and the second transistor Tr2 is OFF. On the other hand, Figure 2B shows the current path when the second transistor Tr2 is ON and the first transistor Tr1 is OFF.
[0035] When the first transistor Tr1 is ON, the high-frequency signal (input signal) input from an external source to the high-frequency input terminal RFin is amplified by the third transistor Tr3 to become a high-frequency amplified signal, which is then input to the transformer T via the first transistor Tr1.
[0036] In this case, the amplification current Is flows through the path shown in Figure 2A: power supply terminal Vcc → first winding M1 → first transistor Tr1 → third transistor Tr3 → coil L1 → ground terminal GND. Since the first winding M1 is magnetically coupled to the third winding M3, the output current Iout induced by the amplification current Is flows from the secondary windings (third winding M3 and fourth winding M4) toward the high-frequency output terminal RFout. That is, the direction in which the output current Iout flows is from the ground terminal GND toward the high-frequency output terminal RFout (first direction).
[0037] On the other hand, when the second transistor Tr2 is ON, the high-frequency signal (input signal) input from an external source to the high-frequency input terminal RFin is amplified by the third transistor Tr3 to become a high-frequency amplified signal, which is then input to the transformer T via the second transistor Tr2.
[0038] In this case, the amplification current Is flows through the path shown in Figure 2B: power supply terminal Vcc → second winding M2 → second transistor Tr2 → third transistor Tr3 → coil L1 → ground terminal GND. Since the second winding M2 is magnetically coupled to the fourth winding M4, the output current Iout induced by the amplification current Is flows from the secondary windings (third winding M3 and fourth winding M4) towards the ground terminal GND. That is, the direction of the output current Iout is from the high-frequency output terminal RFout towards the ground terminal GND (second direction).
[0039] According to this first embodiment, the direction of the output current Iout is reversed depending on whether the first transistor Tr1 or the second transistor Tr2 is set to the ON state. In other words, the phase of the high-frequency amplified signal at the high-frequency output terminal RFout is inverted depending on whether the first transistor Tr1 or the second transistor Tr2 is set to the ON state.
[0040] Therefore, according to the first embodiment, the phase inversion amplifier A comprises a third transistor Tr3 (amplifying transistor), a first transistor Tr1 and a second transistor Tr2 (two electronic switches), and a transformer T. This makes it possible to provide a phase inversion amplifier A that can reduce the circuit size compared to conventional circuits such as the RF amplifier with phase inversion function described in Non-Patent Document 1, and also reduce power consumption compared to conventional circuits.
[0041] [Second Embodiment] Next, a second embodiment of the present disclosure will be described with reference to Figure 3. As shown in Figure 3, the phase inversion amplifier A1 according to the second embodiment has a configuration in which a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, and a bias terminal B are added to the phase inversion amplifier A according to the first embodiment.
[0042] These first resistor R1, second resistor R2, third resistor R3, first capacitor C1, second capacitor C2, third capacitor C3, and fourth capacitor C4 are circuit elements for adjusting at least one of the frequency characteristics, gain (amplification), and output impedance of the phase inversion amplifier A1.
[0043] The first resistor R1 has a predetermined first resistance value, with one end connected to the collector terminal of the first transistor Tr1, one end of the first winding M1, and one end of the first capacitor C1, and the other end connected to the bias terminal B. The second resistor R2 has a predetermined second resistance value, with one end connected to the collector terminal of the second transistor Tr2, one end of the second winding M2, and one end of the second capacitor C2, and the other end connected to the bias terminal B.
[0044] These first resistor R1 and second resistor R2 are additional elements for adjusting the gain and output impedance in the phase inversion amplifier A1, and the first resistance value of the first resistor R1 and the second resistance value of the second resistor R2 are set to the same value.
[0045] The third resistor R3 has a predetermined third resistance value and is located between the fourth winding M4 and the ground terminal GND. That is, one end of the third resistor R3 is connected to the other end of the fourth winding M4, and the other end is connected to the ground terminal GND. This third resistor R3, like the first resistor R1 and the second resistor R2, is an additional element for adjusting the gain and output impedance of the phase inversion amplifier A1.
[0046] The first capacitor C1 has a predetermined first capacitance, with one end connected to the collector terminal of the first transistor Tr1, one end of the first winding M1, and one end of the first resistor R1, and the other end connected to the ground terminal GND. The second capacitor C2 has a predetermined second capacitance, with one end connected to the collector terminal of the second transistor Tr2, one end of the second winding M2, and one end of the second resistor R2, and the other end connected to the ground terminal GND.
[0047] These first capacitor C1 and second capacitor C2 are additional elements used to adjust the frequency characteristics of the phase inversion amplifier A1. The first capacitance of the first capacitor C1 and the second capacitance of the second capacitor C2 are set to the same value.
[0048] The third capacitor C3 has a predetermined third capacitance and is located between the third winding M3 and the high-frequency output terminal RFout. Specifically, one end of the third capacitor C3 is connected to one end of the third winding M3 and one end of the fourth capacitor C4, and the other end is connected to the high-frequency output terminal RFout. This third capacitor C3 is an AC coupling capacitor and also an additional element for adjusting the frequency characteristics of the phase inversion amplifier A1.
[0049] The fourth capacitor C4 has a predetermined fourth capacitance, with one end connected to one end of the third winding M3 and one end of the third capacitor C3, and the other end connected to the ground terminal GND. This fourth capacitor C4 is an additional element for adjusting the frequency characteristics of the phase inversion amplifier A1.
[0050] Bias terminal B is connected to the other end of the first resistor R1 and the other end of the second resistor R2. This bias terminal B is connected to the power supply terminal Vcc.
[0051] According to this second embodiment, it is possible to provide a phase-inverting amplifier A1 that is smaller in circuit size than conventional circuits such as the RF amplifier with phase inversion function described in Non-Patent Document 1, and also reduces power consumption compared to conventional circuits, while also providing adjustments to frequency characteristics, gain (amplification), and output impedance.
[0052] [Third Embodiment] Next, a third embodiment of the present disclosure will be described with reference to Figure 4. As shown in Figure 4, the phase inversion amplifier A2 according to the third embodiment has a configuration in which a first resistor R1, a second resistor R2, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a bias terminal B are added to the phase inversion amplifier A according to the first embodiment.
[0053] The first resistor R1, the second resistor R2, the first capacitor C1, the second capacitor C2, the third capacitor C3, and the bias terminal B are the same as those in the phase inversion amplifier A1 according to the second embodiment, so their explanation will be omitted. However, they are circuit elements for adjusting the frequency characteristics, gain (amplification), and output impedance of the phase inversion amplifier A2.
[0054] According to this third embodiment, it is possible to provide a phase-inverting amplifier A2 that is smaller in circuit size than conventional circuits such as the RF amplifier with phase inversion function described in Non-Patent Document 1, and reduces power consumption compared to conventional circuits, while also having its frequency characteristics, gain (amplification), and output impedance adjusted.
[0055] [Fourth Embodiment] Next, a fourth embodiment of the present disclosure will be described with reference to Figure 5. As shown in Figure 5, the phase inversion amplifier A3 according to the fourth embodiment has a configuration in which a bias generation circuit BG, a bias control terminal Bc, and a second coil L2 are added to the phase inversion amplifier A2 according to the third embodiment.
[0056] The bias generation circuit BG has its input terminal connected to the bias control terminal Bc and its output terminal connected to one end of the second coil L2. Based on the bias control signal input from the bias control terminal Bc, this bias generation circuit BG generates a predetermined input bias voltage and outputs the input bias voltage to the second coil L2.
[0057] The bias control terminal Bc is connected to the input terminal of the bias generation circuit BG, and a bias control signal is input from an external bias control device. This bias control signal specifies the input bias voltage. In other words, the bias control terminal Bc is provided to adjust the input bias voltage externally using the bias control signal.
[0058] The second coil L2 has a second inductance, with one end connected to the output terminal of the bias generation circuit BG and the other end connected to the base terminal and high-frequency input terminal RFin of the third transistor Tr3. This second coil L2 is a circuit element that makes the bias generation circuit BG appear to have a high impedance at a desired frequency.
[0059] The bias generation circuit BG, bias control terminal Bc, and second coil L2 are additional circuits that add a gain adjustment function to the phase inversion amplifier A3. In other words, the bias generation circuit BG, bias control terminal Bc, and second coil L2 function as a gain adjustment circuit in the phase inversion amplifier A3.
[0060] The gain adjustment circuit sets the amplification of the third transistor Tr3 by generating an input bias voltage corresponding to an externally input bias control signal and outputting it to the base terminal of the third transistor Tr3. In other words, the gain adjustment circuit sets the amplification of the third transistor Tr3 by setting the collector current Ic of the third transistor Tr3 based on the bias control signal.
[0061] According to this fourth embodiment, it is possible to reduce the circuit size of the phase inversion amplifier A3 compared to conventional designs, reduce the power consumption of the phase inversion amplifier A3 compared to conventional designs, and provide a phase inversion amplifier A3 in which the amplification can be adjusted externally.
[0062] This disclosure is not limited to the embodiments described above, and the following modifications are possible, for example. (1) In the above embodiments, the amplified signal was output from only one end of the secondary winding of the transformer T, but the disclosure is not limited thereto. The amplified signal may be output from both ends of the secondary winding of the transformer T. That is, the output configuration of the amplified signal in each of the phase inversion amplifiers A, A1, A2, and A3 may be changed from an unbalanced configuration to a parallel configuration.
[0063] (2) In each of the above embodiments, NPN bipolar transistors were used for the first transistor Tr1, the second transistor Tr2, and the third transistor Tr3 (amplifying transistors), but the disclosure is not limited thereto. Other forms of transistors, such as field-effect transistors, may be used.
[0064] (3) In each of the above embodiments, a coil L1 (inductive element) is connected to the emitter terminal of the third transistor Tr3 (amplifying transistor), but the disclosure is not limited thereto. The circuit element connected to the emitter terminal of the third transistor Tr3 (amplifying transistor) may be an element other than an inductive element.
[0065] (4) In the second embodiment described above, the first resistor R1, the second resistor R2, the third resistor R3, the first capacitor C1, the second capacitor C2, the third capacitor C3, and the fourth capacitor C4 are circuit elements that adjust the frequency characteristics, gain (amplification), and output impedance of the phase inversion amplifier A1, and in the third embodiment described above, the first resistor R1, the second resistor R2, the first capacitor C1, the second capacitor C2, and the third capacitor C3 are circuit elements that adjust the frequency characteristics, gain (amplification), and output impedance of the phase inversion amplifier A2, but the disclosure is not limited thereto.
[0066] (5) In the second embodiment described above, one end of the secondary winding of the transformer T, which is composed of a third winding M3 and a fourth winding M4, (the side of the fourth winding M4) is connected to the ground terminal GND via a third resistor R3, and the other end of the secondary winding (the side of the third winding M3) is connected to the high-frequency output terminal RFout via a third capacitor C3. However, the disclosure is not limited thereto. Alternatively, one end of the secondary winding (the side of the fourth winding M4) may be connected to the high-frequency output terminal RFout via a third capacitor C3, and the other end of the secondary winding (the side of the third winding M3) may be connected to the ground terminal GND via a third resistor R3. [Explanation of Symbols]
[0067] A, A1, A2, A3 Phase inversion amplifier, Tr1 First transistor, Tr2 Second transistor, Tr3 Third transistor, L1 Coil, T Transformer, RFin High frequency input terminal, RFout High frequency output terminal, Cnt1 First control terminal, Cnt2 Second control terminal, Vcc Power supply terminal, GND Ground terminal
Claims
1. An amplifying transistor for amplifying an input signal which is a single-ended signal, Two electronic switches, one end of which is connected to the output terminal of the amplification transistor, and whose ON / OFF state is controlled by two control signals, A transformer in which the primary winding is connected between the two other ends of the two electronic switches and the secondary winding outputs an amplified signal from one end. A phase inversion amplifier equipped with the following features.
2. The primary winding comprises a first winding and a second winding, with one end of the first winding connected to the other end of one of the electronic switches, one end of the second winding connected to the other end of the other electronic switch, and the other ends of the first and second windings connected to power terminals. The secondary winding comprises a third winding and a fourth winding connected in series, with one end of the fourth winding connected to the third winding and the other end of the fourth winding connected to the ground terminal. The phase inversion amplifier according to claim 1, wherein the first winding and the third winding are magnetically coupled, and the second winding and the fourth winding are magnetically coupled, and an amplified signal is output from one end of the third winding.
3. The phase inversion amplifier according to claim 1 or 2, wherein the electronic switch is a switching transistor cascode-connected to the amplifying transistor.
4. The phase inversion amplifier according to claim 1 or 2, further comprising a circuit element for adjusting at least one of frequency characteristics, gain, and output impedance.
5. The phase inversion amplifier according to claim 1 or 2, further comprising a gain adjustment circuit for adjusting the amplification of the amplification transistor.