Display devices and electronic equipment

The display device achieves high luminance, miniaturization, and enhanced color reproducibility by integrating transistors with distinct semiconductor layers, addressing the challenges of high-resolution displays for virtual, augmented, and mixed reality applications.

JP7881482B2Active Publication Date: 2026-06-29SEMICON ENERGY LAB CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
SEMICON ENERGY LAB CO LTD
Filing Date
2021-11-29
Publication Date
2026-06-29

AI Technical Summary

Technical Problem

Existing display devices face challenges in achieving high emission luminance, miniaturization, high color reproducibility, high definition, and reliability, particularly in applications requiring high-resolution displays for virtual, augmented, and mixed reality.

Method used

The display device incorporates a display unit and peripheral circuit unit with overlapping areas, utilizing transistors with different semiconductor layers, including single-crystal silicon for the first transistor and oxide semiconductors like indium-zinc oxide for the second, enhancing luminance, miniaturization, and color reproducibility.

Benefits of technology

The solution provides a display device with high luminous brightness, miniaturization, high color reproducibility, and high definition, while ensuring reliability through improved transistor performance and reduced signal delay.

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Abstract

Provided is a novel display device. This display device includes a display unit, and a peripheral circuit which drives the display unit. The display unit is provided above the peripheral circuit so as to overlap the peripheral circuit. The display unit includes a plurality of pixels arrayed in a matrix, and the plurality of pixels each have the function of emitting light. The peripheral circuit includes a first transistor, and the pixel includes a second transistor. A semiconductor layer included in the first transistor and a semiconductor layer included in the second transistor are formed from materials having compositions different from each other.
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Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device. Another aspect of the present invention relates to a method for manufacturing a display device.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention disclosed herein include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, methods for driving them, or methods for manufacturing them. [Background technology]

[0003] In recent years, there has been a growing demand for higher resolution display devices. Examples of devices requiring high-resolution displays include those for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR), and these are currently undergoing extensive development. Display devices used in these applications require both high resolution and miniaturization.

[0004] Examples of display devices include liquid crystal displays, organic EL (Electro-Luminescence) elements, light-emitting devices equipped with light-emitting elements such as LEDs, and electronic paper that displays information using electrophoretic methods.

[0005] For example, the basic structure of an organic EL element consists of a layer containing a light-emitting organic compound sandwiched between a pair of electrodes. By applying a voltage to this element, light can be obtained from the light-emitting organic compound. Because a display device using such an organic EL element does not require a backlight, which is necessary for liquid crystal displays and the like, it is possible to realize a thin, lightweight, high-contrast, and low-power display device. For example, an example of a display device using an organic EL element is described in Patent Document 1.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] Generally, a display device includes a display unit including a plurality of pixels and a peripheral drive circuit unit for supplying a video signal to the display area. Further, the drive circuit unit is provided in an outer peripheral portion of the display area.

[0008] One aspect of the present invention is to provide a display device with high emission luminance as one of the problems. One aspect of the present invention is to provide a miniaturized display device as one of the problems. One aspect of the present invention is to provide a display device with high color reproducibility as one of the problems. One aspect of the present invention is to provide a high-definition display device as one of the problems. One aspect of the present invention is to provide a highly reliable display device as one of the problems. One aspect of the present invention is to provide a novel display device as one of the problems.

[0009] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems can be extracted from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problems

[0010] One aspect of the present invention is a display device having a display unit and a peripheral circuit unit for driving the display unit, wherein the display unit and the peripheral circuit unit have an overlapping area with each other, the display unit has a plurality of pixels arranged in a matrix, the peripheral circuit unit has a first transistor, the pixel has a second transistor, and the composition of the first semiconductor layer included in the first transistor is different from the composition of the second semiconductor layer included in the second transistor.

[0011] The peripheral circuitry includes, for example, a scan line drive circuit and a signal line drive circuit. Each of the multiple pixels has the function of emitting light, and it is preferable that the light is emitted in a direction where the peripheral circuitry is not formed. The pixels may have, for example, an EL element.

[0012] The first semiconductor layer may be a single-crystal semiconductor or a polycrystalline semiconductor. The second semiconductor layer may be an oxide semiconductor. For example, the first semiconductor layer may be formed from single-crystal silicon, and the second semiconductor layer may be formed from an oxide containing at least one of indium or zinc. [Effects of the Invention]

[0013] According to one aspect of the present invention, a display device with high luminous brightness can be provided. Alternatively, according to one aspect of the present invention, a miniaturized display device can be provided. Alternatively, a display device with high color reproducibility can be provided. Alternatively, a high-definition display device can be provided. Furthermore, a highly reliable display device can be provided. Alternatively, a method for manufacturing the above-mentioned display device can be provided.

[0014] Furthermore, the description of these effects does not preclude the existence of other effects. Moreover, one aspect of the present invention does not necessarily have to possess all of these effects. Other effects can be extracted from the description in the specification, drawings, claims, etc. [Brief explanation of the drawing]

[0015] Figures 1A to 1C illustrate examples of the configuration of a display device. Figures 2A and 2B1 to 2B5 illustrate examples of display device configurations. Figures 3A to 3C illustrate examples of pixel circuit configurations. Figure 4 illustrates an example of a display device configuration. Figures 5A to 5F illustrate examples of methods for manufacturing a display device. Figures 6A to 6G illustrate examples of methods for manufacturing a display device. Figures 7A and 7B illustrate examples of methods for manufacturing a display device. Figures 8A and 8B illustrate examples of methods for manufacturing a display device. Figures 9A to 9C illustrate examples of methods for manufacturing a display device. Figure 10A is a diagram illustrating the classification of crystal structures. Figure 10B is a diagram illustrating the XRD spectrum of the CAAC-IGZO film. Figure 10C is a diagram illustrating the micro-electron diffraction pattern of the CAAC-IGZO film. Figures 11A and 11B illustrate an example configuration of a display module. Figures 12A and 12B illustrate an example configuration of a display module. Figures 13A and 13B are layout diagrams of a display device fabricated on a 12-inch wafer. Figures 14A to 14C illustrate examples of the configuration of a light-emitting element. Figures 15A and 15B illustrate examples of electronic device configurations. Figures 16A to 16D illustrate examples of electronic device configurations. [Modes for carrying out the invention]

[0016] The embodiments will be described below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope. Therefore, the present invention is not to be construed as being limited to the contents of the following embodiments.

[0017] In this specification, a semiconductor device refers to a device that utilizes semiconductor properties, including circuits containing semiconductor elements (transistors, diodes, photodiodes, etc.), devices having such circuits, etc. It also refers to any device that can function by utilizing semiconductor properties. For example, integrated circuits, chips equipped with integrated circuits, and electronic components with chips housed in packages are examples of semiconductor devices. Furthermore, memory devices, display devices, light-emitting devices, lighting devices, and electronic devices are themselves semiconductor devices and may contain semiconductor devices.

[0018] Furthermore, when it is stated in this specification that X and Y are connected, it is assumed that this specification discloses the cases in which X and Y are electrically connected, functionally connected, and directly connected. Therefore, it is assumed that the disclosed connections are not limited to predetermined connections, such as those shown in the figures or text, but also include connections other than those shown in the figures or text. X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0019] One example of a case where X and Y are electrically connected is that one or more elements that enable electrical connection between X and Y (e.g., switches, transistors, capacitive elements, inductors, resistors, diodes, display devices, light-emitting devices, loads, etc.) can be connected between X and Y. Note that a switch has an on state and an off state. In other words, a switch has the function of controlling whether or not current flows by being in a conductive state (on state) or a non-conductive state (off state).

[0020] One example of a functional connection between X and Y is when one or more circuits that enable the functional connection between X and Y (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signal conversion circuits (digital-to-analog conversion circuits, analog-to-digital conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc.), voltage sources, current sources, switching circuits, amplification circuits (circuits that can increase the signal amplitude or current amount, such as operational amplifiers, differential amplifiers, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control circuits, etc.) can be connected between X and Y.

[0021] Furthermore, when it is explicitly stated that X and Y are electrically connected, this includes both cases where X and Y are electrically connected (i.e., connected with another element or circuit in between) and cases where X and Y are directly connected (i.e., connected without another element or circuit in between).

[0022] Furthermore, for example, it can be expressed as, "X, Y, the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor are electrically connected to each other, and the connection is in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y." Alternatively, it can be expressed as, "The source (or first terminal, etc.) of the transistor is electrically connected to X, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in this order." Alternatively, it can be expressed as, "X is electrically connected to Y via the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are provided in this connection order." By using similar notation to these examples to define the order of connections in a circuit configuration, the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor can be distinguished and their technical scope determined. Note that these notational methods are examples only and are not limited to them. Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0023] Even if independent components are shown as electrically connected in a circuit diagram, a single component may possess the functions of multiple components. For example, if part of a wire also functions as an electrode, a single conductive film possesses the functions of both the wire and the electrode. Therefore, in this specification, "electrically connected" includes cases where a single conductive film possesses the functions of multiple components.

[0024] Furthermore, in this specification, "capacitive element" can refer to, for example, a circuit element having a capacitance value higher than 0F, a region of wiring having a capacitance value higher than 0F, parasitic capacitance, the gate capacitance of a transistor, etc. Therefore, in this specification, "capacitive element" includes not only a circuit element comprising a pair of electrodes and a dielectric material contained between the electrodes, but also parasitic capacitance occurring between wirings, the gate capacitance occurring between one of the sources or drains of a transistor and the gate, etc. Also, terms such as "capacitive element," "parasitic capacitance," and "gate capacitance" can be replaced with terms such as "capacitance," and conversely, the term "capacitance" can be replaced with terms such as "capacitive element," "parasitic capacitance," and "gate capacitance." In addition, the term "a pair of electrodes" in "capacitance" can be replaced with terms such as "a pair of conductors," "a pair of conductive regions," and "a pair of regions." The capacitance value can be, for example, 0.05fF or more and 10pF or less. Alternatively, it may be, for example, 1pF or more and 10μF or less.

[0025] Furthermore, in this specification, a transistor has three terminals called the gate, source, and drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as either the source or the drain are the input and output terminals of the transistor. Depending on the conductivity type of the transistor (n-channel type, p-channel type) and the potential applied to the three terminals of the transistor, one of the two input and output terminals becomes the source and the other becomes the drain. For this reason, in this specification, the terms source and drain can be used interchangeably. Also, in this specification, when describing the connection relationships of a transistor, the notation "one of the source or drain" (or first electrode, or first terminal) and "the other of the source or drain" (or second electrode, or second terminal) is used. Depending on the structure of the transistor, in addition to the three terminals described above, there may be a back gate. In this case, in this specification, one of the gate or back gate of the transistor may be called the first gate, and the other of the gate or back gate of the transistor may be called the second gate. Furthermore, in the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, if a transistor has three or more gates, in this specification, each gate may be referred to as the first gate, second gate, third gate, and so on.

[0026] Furthermore, in this specification, the term "node" can be replaced with terminals, wiring, electrodes, conductive layers, conductors, impurity regions, etc., depending on the circuit configuration, device structure, etc. Also, terminals, wiring, etc. can be replaced with "node".

[0027] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" in this specification are used to avoid confusion of constituent elements. Therefore, they do not limit the number of constituent elements, nor do they limit the order of the constituent elements. For example, a constituent element referred to as "1st" in one embodiment of this specification may be referred to as "2nd" in another embodiment or in the claims. Also, for example, a constituent element referred to as "1st" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0028] Furthermore, in this specification, phrases indicating arrangement such as "above," "below," "upward," or "downward" are sometimes used for convenience to explain the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes as appropriate depending on the direction in which each component is depicted. Therefore, the phrases explained in the specification are not limited to those described and can be appropriately rephrased depending on the situation. For example, the expression "insulator located on the upper surface of the conductor" can be rephrased as "insulator located on the lower surface of the conductor" by rotating the orientation of the drawing shown by 180 degrees.

[0029] Furthermore, the terms "above" and "below" do not limit the positional relationship of the components to being directly above or below each other and in direct contact. For example, the expression "electrode B on insulating layer A" does not require electrode B to be formed in direct contact with insulating layer A, and does not exclude cases where other components are included between insulating layer A and electrode B.

[0030] Furthermore, in this specification, terms such as "film" and "layer" can be interchanged as needed. For example, the term "conductive layer" may be changed to the term "conductive film." Or, for example, the term "insulating film" may be changed to the term "insulating layer." Alternatively, depending on the circumstances, terms such as "film" and "layer" can be omitted and replaced with other terms. For example, the term "conductive layer" or "conductive film" may be changed to the term "conductor." Or, for example, the terms "insulating layer" or "insulating film" may be changed to the term "insulator."

[0031] Furthermore, in this specification, terms such as "electrode," "wiring," and "terminal" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Moreover, the terms "electrode" or "wiring" include cases where multiple "electrodes" or "wiring" are formed as a single unit. Similarly, for example, "terminal" may be used as part of "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" also includes cases where multiple "electrodes," "wiring," or "terminals" are formed as a single unit. Therefore, for example, an "electrode" can be part of "wiring" or a "terminal," and for example, a "terminal" can be part of "wiring" or an "electrode." In addition, terms such as "electrode," "wiring," and "terminal" may be replaced with terms such as "region" depending on the circumstances.

[0032] Furthermore, in this specification, terms such as "wiring," "signal line," and "power line" can be interchanged with each other depending on the circumstances or situation. For example, the term "wiring" may be changed to the term "signal line." Also, for example, the term "wiring" may be changed to the term "power line." Similarly, the reverse is also true; terms such as "signal line" and "power line" may be changed to the term "wiring." Terms such as "power line" may be changed to the term "signal line." Similarly, the reverse is also true; terms such as "signal line" may be changed to the term "power line." In addition, the term "potential" applied to the wiring may be changed to the term "signal," depending on the circumstances or situation. Similarly, the reverse is also true; terms such as "signal" may be changed to the term "potential."

[0033] In this specification, "parallel" means that two lines are positioned at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. "Approximately parallel" or "roughly parallel" means that two lines are positioned at an angle of -30° or more and 30° or less. "Perpendicular" means that two lines are positioned at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. "Approximately perpendicular" or "roughly perpendicular" means that two lines are positioned at an angle of 60° or more and 120° or less.

[0034] The embodiments described herein will be explained with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope. Therefore, the present invention is not to be interpreted as being limited to the contents of the embodiments. In the configuration of the invention in the embodiments, the same reference numerals are used in common across different drawings for the same parts or parts having similar functions, and repeated explanations may be omitted. Also, in order to make the drawings easier to understand, some components may be omitted in perspective views or top views, etc.

[0035] Furthermore, in the drawings of this specification, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to the size or aspect ratio. The drawings are schematic representations of ideal examples and are not limited to the shapes or values ​​shown in the drawings. For example, they may include variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing differences.

[0036] In the invention described below, the same reference numerals are used in common across different drawings for parts that are identical or have similar functions, and repeated explanations are omitted. Furthermore, when referring to similar functions, the hatch patterns are the same, and reference numerals may not be assigned.

[0037] (Embodiment 1) This embodiment describes a display device and a method for manufacturing the display device according to one aspect of the present invention.

[0038] <Example configuration of display device 100> Figure 1A is a perspective view of a display device 100 according to one embodiment of the present invention. Figure 1B is a top view of the display device 100. Figure 1C is a cross-sectional view of the area shown by the dashed line A1-A2 in Figure 1B.

[0039] The display device 100 has a drive circuit 102, which is a type of semiconductor device, on a substrate 101, and a display unit 104 on the drive circuit 102. The drive circuit 102 and the display unit 104 have overlapping regions. There is also a wiring group 103 between the drive circuit 102 and the display unit 104. The drive circuit 102 and the display unit 104 are electrically connected via the wiring group 103. The drive circuit 102 is also electrically connected to an input / output terminal section 106. The display device 100 has a substrate 105 on the display unit 104.

[0040] Note that in drawings and other materials, arrows indicating the X, Y, and Z directions may be included. In this specification, the "X direction" refers to the direction along the X-axis, and unless explicitly stated, there is no distinction between the forward and reverse directions. The same applies to the "Y direction" and "Z direction." Furthermore, the X, Y, and Z directions are directions that intersect each other. More specifically, the X, Y, and Z directions are directions that are orthogonal to each other. In this specification, one of the X, Y, or Z directions may be referred to as the "first direction" or "first direction." Another may be referred to as the "second direction" or "second direction." The remaining one may be referred to as the "third direction" or "third direction." In Figure 1, the direction perpendicular to the surface of the substrate 101 is defined as the Z direction.

[0041] Figure 2A is a block diagram illustrating the connection relationship between the drive circuit 102 and the display unit 104.

[0042] The drive circuit 102 includes a first drive circuit 232 and a second drive circuit 233. The drive circuit 102 is electrically connected to the input / output terminal section 106. The circuits included in the first drive circuit 232 function, for example, as a scan line drive circuit. The circuits included in the first drive circuit 232 function, for example, as a signal line drive circuit. Note that some circuit may be provided in a position facing the first drive circuit 232 across the display unit 104. Some circuit may be provided in a position facing the second drive circuit 233 across the display unit 104.

[0043] The drive circuit 102 is sometimes referred to as the "peripheral drive circuit." Various circuits such as shift registers, level shifters, inverters, latches, analog switches, and logic circuits can be used in the peripheral drive circuit. Transistors and capacitive elements can also be used in the peripheral drive circuit.

[0044] Furthermore, the display device 100 has m (m is an integer of 1 or more) wires 236, each arranged substantially parallel to the other and whose potential is controlled by a circuit included in the first drive circuit 232, and n (n is an integer of 1 or more) wires 237, each arranged substantially parallel to the other and whose potential is controlled by a circuit included in the second drive circuit 233. The wires 236 are electrically connected to the first drive circuit 232 via a part of the wire group 103. The wires 237 are electrically connected to the second drive circuit 233 via a part of the wire group 103.

[0045] The display unit 104 has multiple pixels 230 arranged in a matrix. By combining the pixels 230 that control red light, 230 that control green light, and 230 that control blue light into a single pixel 240, and controlling the amount of light emitted (luminescence) of each pixel 230, full-color display can be achieved. Therefore, each of these three pixels 230 functions as a sub-pixel. That is, each of the three sub-pixels controls the amount of light emitted, such as red light, green light, or blue light (see Figure 2B1). Note that the color of light controlled by each of the three sub-pixels is not limited to a combination of red (R), green (G), and blue (B), but may also be cyan (C), magenta (M), and yellow (Y) (see Figure 2B2).

[0046] Alternatively, the four subpixels may be combined and function as a single pixel. For example, a subpixel controlling white light (W) may be added to the three subpixels that control red, green, and blue light respectively (see Figure 2B3). Adding a subpixel that controls white light can increase the brightness of the display area. Alternatively, a subpixel that controls yellow light may be added to the three subpixels that control red, green, and blue light respectively (see Figure 2B4). Alternatively, a subpixel that controls white light may be added to the three subpixels that control cyan, magenta, and yellow light respectively (see Figure 2B5).

[0047] By increasing the number of subpixels that function as a single pixel, and by appropriately combining subpixels that control light such as red, green, blue, cyan, magenta, and yellow, the reproduction of midtones can be improved. Therefore, color reproduction can be enhanced.

[0048] Furthermore, a display device according to one aspect of the present invention can reproduce a variety of color gamuts. For example, it can reproduce color gamuts such as the PAL (Phase Alternating Line) and NTSC (National Television System Committee) standards used in television broadcasting, the sRGB (standard RGB) and Adobe RGB standards widely used in display devices for electronic devices such as personal computers, digital cameras, and printers, the ITU-R BT.709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) standard used in HDTV (High Definition Television), the DCI-P3 (Digital Cinema Initiatives P3) standard used in digital cinema projection, and the ITU-R BT.2020 (REC.2020 (Recommendation 2020)) standard used in UHDTV (Ultra High Definition Television).

[0049] Furthermore, by arranging 240 pixels in a 1920 x 1080 matrix, a display device 100 capable of full-color display at a resolution known as Full HD (also called "2K resolution," "2K1K," or "2K"). Also, for example, by arranging 240 pixels in a 3840 x 2160 matrix, a display device 100 capable of full-color display at a resolution known as Ultra HD (also called "4K resolution," "4K2K," or "4K"). Furthermore, for example, by arranging 240 pixels in a 7680 x 4320 matrix, a display device 100 capable of full-color display at a resolution known as Super Hi-Vision (also called "8K resolution," "8K4K," or "8K"). By increasing the number of pixels, it is also possible to realize a display device 100 capable of full-color display at a resolution of 16K or 32K.

[0050] <Example of circuit configuration for 230 pixels> Figure 3A shows an example of the circuit configuration of pixel 230. Pixel 230 has a pixel circuit 431 and a display element 432.

[0051] Each wire 236 is electrically connected to n pixel circuits 431 located in any row of the m rows and n columns of the pixel circuits 431 arranged in the display unit 104. In addition, each wire 237 is electrically connected to m pixel circuits 431 located in any column of the m rows and n columns of the pixel circuits 431.

[0052] The pixel circuit 431 includes a transistor 436, a capacitive element 433, a transistor 251, and a transistor 434. The pixel circuit 431 is also electrically connected to the display element 432.

[0053] One of the source and drain electrodes of transistor 436 is electrically connected to a wiring to which a data signal (also called a "video signal") is supplied (hereinafter referred to as signal line DL_n). Furthermore, the gate electrode of transistor 436 is electrically connected to a wiring to which a gate signal is supplied (hereinafter referred to as scan line GL_m). Signal line DL_n and scan line GL_m correspond to wiring 237 and wiring 236, respectively.

[0054] Transistor 436 has the function of controlling the writing of data signals to node 435.

[0055] One of the pair of electrodes of the capacitive element 433 is electrically connected to node 435, and the other is electrically connected to node 437. Additionally, the source electrode and the other drain electrode of the transistor 436 are electrically connected to node 435.

[0056] The capacitive element 433 functions as a holding capacitor that holds the data written to node 435.

[0057] One of the source and drain electrodes of transistor 251 is electrically connected to the potential supply line VL_a, and the other is electrically connected to node 437. Furthermore, the gate electrode of transistor 251 is electrically connected to node 435.

[0058] One of the source and drain electrodes of transistor 434 is electrically connected to the potential supply line V0, and the other is electrically connected to node 437. Furthermore, the gate electrode of transistor 434 is electrically connected to the scan line GL_m.

[0059] One of the anodes or cathodes of the display element 432 is electrically connected to the potential supply line VL_b, and the other is electrically connected to node 437.

[0060] For example, an organic electroluminescent element (also called an organic EL element) can be used as the display element 432. However, the display element 432 is not limited to this, and for example, an inorganic EL element made of inorganic material may also be used. Note that "organic EL elements" and "inorganic EL elements" are sometimes collectively referred to as "EL elements".

[0061] The light-emitting color of an EL element can be white, red, green, blue, cyan, magenta, or yellow, depending on the materials that make up the EL element.

[0062] There are two methods for achieving color display: one involves combining a white-emitting display element 432 with a colored layer, and the other involves providing a display element 432 with a different emitting color for each pixel. The former method is more productive than the latter. On the other hand, the latter method requires manufacturing a different display element 432 for each pixel, making it less productive than the former method. However, the latter method can produce emitting colors with higher color purity than the former method. In addition to the latter method, color purity can be further improved by adding a microcavity structure to the display element 432.

[0063] The display element 432 may use either low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds. The layers constituting the display element 432 can be formed by methods such as vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating.

[0064] The display element 432 may have an inorganic compound such as a quantum dot. For example, by using a quantum dot as the light-emitting layer, it can function as a light-emitting material.

[0065] Furthermore, the power supply potential can be, for example, the potential on the relatively higher or lower side. The power supply potential on the higher side is called the high power supply potential (also called "VDD"), and the power supply potential on the lower side is called the low power supply potential (also called "VSS"). In addition, the ground potential can be used as the high or low power supply potential. For example, if the high power supply potential is the ground potential, the low power supply potential is lower than the ground potential, and if the low power supply potential is the ground potential, the high power supply potential is higher than the ground potential.

[0066] For example, a high power supply potential VDD is supplied to one of the potential supply lines VL_a or VL_b, and a low power supply potential VSS is supplied to the other.

[0067] In a display device having pixel circuits 431, the first drive circuit 232 sequentially selects the pixel circuits 431 of each row, turns on transistors 436 and 434, and writes a data signal to node 435.

[0068] When data is written to node 435, the pixel circuit 431 enters a holding state when transistors 436 and 434 are turned off. Furthermore, the amount of current flowing between the source and drain electrodes of transistor 251 is controlled according to the potential of the data written to node 435, and the display element 432 emits light with a brightness corresponding to the amount of current flowing. By performing this sequentially for each row, an image can be displayed.

[0069] Figure 3B shows a modified version of the circuit configuration of pixel 230 shown in Figure 3A. The circuit configuration shown in Figure 3B is the same as the circuit configuration shown in Figure 3A, but without transistor 434 and the potential supply line V0. The other components can be understood by referring to the explanation of the circuit configuration shown in Figure 3A. Therefore, in order to reduce repetition of explanation, a detailed explanation of the circuit configuration shown in Figure 3B is omitted.

[0070] Furthermore, some or all of the transistors constituting the pixel circuit 431 may be transistors having back gates. For example, as shown in Figure 3C, a transistor having a back gate may be used for transistor 436, with the back gate and the gate electrically connected. Alternatively, as shown for transistor 251 in Figure 3C, the back gate and either the source or drain of the transistor may be electrically connected.

[0071] [About transistors] In one embodiment of the present invention, the structure of the transistors in the display device is not particularly limited. For example, they may be planar transistors or staggered transistors. They may also be top-gate or bottom-gate transistors. Alternatively, gate electrodes may be provided above and below the channel.

[0072] The transistors in the peripheral drive circuit and the transistors in the pixel circuit may have the same structure or different structures. All transistors in the peripheral drive circuit may have the same structure, or two or more different structures may be used in combination. Similarly, all transistors in the pixel circuit may have the same structure, or two or more different structures may be used in combination.

[0073] When one of the gate electrodes located above and below a channel is referred to as the "gate electrode," the other is called the "back gate electrode." Similarly, when one of the gate electrodes located above and below a channel is referred to as the "gate," the other is called the "back gate." In some cases, the gate electrode is referred to as the "front gate electrode." Likewise, the gate is sometimes referred to as the "front gate."

[0074] By providing a gate electrode and a back gate electrode, the semiconductor layer of the transistor can be electrically surrounded by the electric field generated from the gate electrode and the electric field generated from the back gate electrode. A transistor structure in which the semiconductor layer in which the channel is formed is electrically surrounded by the electric fields generated from the gate electrode and the back gate electrode can be called a Surrounded Channel (S-channel) structure.

[0075] The buck gate electrode can function similarly to the gate electrode. The potential of the buck gate electrode may be the same as the gate electrode, or it may be at ground potential or any other potential. Furthermore, by changing the potential of the buck gate electrode independently of the gate electrode, the threshold voltage of the transistor can be changed.

[0076] By providing a gate electrode and a back gate electrode, and furthermore, by setting them to the same potential, the region in the semiconductor layer where carriers flow becomes larger in the thickness direction, thus increasing the amount of carrier movement. As a result, the on-current of the transistor increases, and the field-effect mobility also increases.

[0077] Therefore, the transistor can be designed to have a large on-current relative to its occupied area. In other words, the occupied area of ​​the transistor can be reduced relative to the required on-current. Thus, a highly integrated semiconductor device can be realized.

[0078] Furthermore, by using transistors with high on-current in the display device, even if the number of wires increases when the display device is made larger or higher resolution, it is possible to reduce the signal delay in each wire, thereby suppressing a decrease in display quality.

[0079] Furthermore, since the gate electrode and back gate electrode are formed from conductive layers, they have the function of preventing electric fields generated outside the transistor from acting on the semiconductor layer in which the channel is formed (particularly an electric field shielding function against static electricity). In a plan view, the electric field shielding function can be enhanced by making the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode.

[0080] The gate electrode and back gate electrode each have the function of shielding from external electric fields, so that charges such as charged particles generated above and below the transistor do not affect the channel formation region of the semiconductor layer. As a result, degradation in stress tests (for example, NGBT (Negative Gate Bias-Temperature) stress tests (also called "NBT" or "NBTS"), in which a negative voltage is applied to the gate) is suppressed. In addition, the gate electrode and back gate electrode can block the electric field generated from the drain electrode from acting on the semiconductor layer. Therefore, fluctuations in the on-current rise voltage caused by fluctuations in the drain voltage can be suppressed. This effect is particularly pronounced when potential is supplied to the gate electrode and back gate electrode.

[0081] Furthermore, transistors with a back gate electrode exhibit smaller threshold voltage fluctuations before and after PGBT (Positive Gate Bias-Temperature) stress testing (also known as "PBT" or "PBTS"), where a positive voltage is applied to the gate, compared to transistors without a back gate electrode.

[0082] BT stress tests, such as NGBT and PGBT, are a type of accelerated testing that allows for the rapid evaluation of transistor characteristic changes (aging) that occur over long-term use. In particular, the change in the transistor's threshold voltage before and after the BT stress test is an important indicator for examining reliability. The smaller the change in threshold voltage before and after the BT stress test, the more reliable the transistor is considered to be.

[0083] Furthermore, by having both a gate electrode and a back gate electrode, and by setting both to the same potential, the fluctuation in the threshold voltage is reduced. As a result, variations in electrical characteristics among multiple transistors are also reduced.

[0084] Furthermore, when light is incident from the back gate electrode side, forming the back gate electrode with a light-shielding conductive film prevents light from entering the semiconductor layer from the back gate electrode side. This prevents photodegradation of the semiconductor layer and prevents deterioration of electrical characteristics such as a shift in the transistor's threshold voltage.

[0085] [Semiconductor materials] There are no major restrictions on the crystallinity of the semiconductor material used in the semiconductor layer of the transistors constituting the display device 100. Amorphous semiconductors, crystalline semiconductors (microcrystalline semiconductors, polycrystalline semiconductors, single-crystal semiconductors, or semiconductors with crystalline regions in part) may be used. Using a crystalline semiconductor is preferable because it suppresses the degradation of transistor characteristics.

[0086] Furthermore, for example, silicon and germanium can be used as semiconductor materials for the semiconductor layer of a transistor. Compound semiconductors such as silicon carbide, gallium arsenide, metal oxides, and nitride semiconductors, as well as organic semiconductors, can also be used.

[0087] For example, polycrystalline silicon (polysilicon) and amorphous silicon can be used as semiconductor materials for transistors. Additionally, oxide semiconductors (OS), a type of metal oxide, can be used as semiconductor materials for transistors.

[0088] As semiconductor materials used in transistors, metal oxides with an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more, can be used. Typical examples include metal oxides containing indium, such as CAC-OS described later.

[0089] For a transistor using a metal oxide with a wider bandgap and lower carrier density than silicon, due to its low off-current, it is possible to hold the charge accumulated in a capacitive element connected in series with the transistor for a long period of time.

[0090] The semiconductor layer can be a film represented by an In-M-Zn-based oxide containing, for example, indium, zinc, and M (where M is a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium).

[0091] When the metal oxide constituting the semiconductor layer is an In-M-Zn-based oxide, it is preferable that the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide satisfies In≧M and Zn≧M. As such atomic ratios of the metal elements of the sputtering target, In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, etc. are preferable. Note that the atomic ratio of the formed semiconductor layer includes fluctuations of plus or minus 40% of the atomic ratio of the metal elements contained in the above sputtering target.

[0092] As the semiconductor layer, a metal oxide film with a low carrier density is used. For example, the carrier density of the semiconductor layer is 1×10 17 / cm 3 or less, preferably 1×10 15 / cm 3 or less, more preferably 1×10 13 / cm 3 or less, still more preferably 1×10 11 / cm 3 or less, even more preferably 1×10 10 / cm 3 less, and 1×10 -9 / cm 3Metal oxides with the carrier densities described above can be used. Such metal oxides are called high-purity intrinsic or substantially high-purity intrinsic metal oxides. These metal oxides have a low defect level density and possess stable properties.

[0093] Furthermore, the choice of metal oxide is not limited to these examples; any metal oxide with an appropriate composition may be used depending on the required semiconductor and electrical characteristics (field-effect mobility, threshold voltage, etc.) of the transistor. In addition, to obtain the required semiconductor characteristics of the transistor, it is preferable to ensure that the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc., of the metal oxide used as the semiconductor layer are appropriate.

[0094] <Metal oxides> Here, we will explain metal oxides that can be used as oxide semiconductors.

[0095] The metal oxide used as the oxide semiconductor preferably contains at least indium or zinc. In particular, it is preferable that it contains indium and zinc. In addition, it is preferable that it contains aluminum, gallium, yttrium, tin, etc. Furthermore, it may contain one or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc.

[0096] Here, we consider the case where the metal oxide is an In-M-Zn oxide containing indium, element M, and zinc. Element M can be aluminum, gallium, yttrium, or tin. Other elements that can be used for element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt. However, it is sometimes permissible to use a combination of multiple of the aforementioned elements as element M.

[0097] In this specification, metal oxides containing nitrogen may also be collectively referred to as metal oxides. Furthermore, metal oxides containing nitrogen may also be called metal oxynitrides.

[0098] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 10A. Figure 10A is a diagram illustrating the classification of crystal structures in oxide semiconductors, specifically IGZO (a metal oxide containing In, Ga, and Zn).

[0099] As shown in Figure 10A, oxide semiconductors are broadly classified into "Amorphous," "Crystalline," and "Crystal." "Amorphous" includes completely amorphous materials. "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite) (excluding single crystal and polycrystal). Note that single crystal, polycrystal, and completely amorphous materials are excluded from the "Crystalline" classification. "Crystal" includes single crystal and polycrystal materials.

[0100] The structure within the thick frame shown in Figure 10A represents an intermediate state between "Amorphous" and "Crystal," and belongs to a new boundary region (New crystalline phase). In other words, this structure can be described as being completely different from the energetically unstable "Amorphous" and "Crystal" states.

[0101] The crystal structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 10B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline." The GIXD method is also known as the thin-film method or the Seemann-Bohlin method. Hereafter, the XRD spectrum obtained by the GIXD measurement shown in Figure 10B may simply be referred to as the XRD spectrum in this specification. The composition of the CAAC-IGZO film shown in Figure 10B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 10B is 500 nm.

[0102] In Figure 10B, the horizontal axis represents 2θ [deg.] and the vertical axis represents intensity [au]. As shown in Figure 10B, the XRD spectrum of the CAAC-IGZO film shows a peak indicating clear crystallinity. Specifically, the XRD spectrum of the CAAC-IGZO film shows a peak indicating c-axis orientation near 2θ = 31°. As shown in Figure 10B, the peak near 2θ = 31° is asymmetrical with respect to the angle at which the peak intensity was detected.

[0103] Furthermore, the crystal structure of a film or substrate can be evaluated by the diffraction pattern (also called the nano-beam electron diffraction pattern) observed by nano-beam electron diffraction (NBED). The diffraction pattern of a CAAC-IGZO film is shown in Figure 10C. Figure 10C shows the diffraction pattern observed by NBED with the electron beam incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 10C is approximately In:Ga:Zn=4:2:3 [atomic ratio]. In nano-beam electron diffraction, electron diffraction is performed with a probe diameter of 1 nm.

[0104] As shown in Figure 10C, the diffraction pattern of the CAAC-IGZO film shows multiple spots indicating c-axis orientation.

[0105] <Oxide semiconductor structure> Note that when focusing on the crystal structure, oxide semiconductors may be classified differently from those shown in Figure 10A. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors also include polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0106] Here, we will explain the details of the CAAC-OS, nc-OS, and a-like OS mentioned above.

[0107] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, the c-axis of which is oriented in a specific direction. This specific direction is the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If we consider the atomic arrangement as a lattice arrangement, then a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC-OS has regions where multiple crystalline regions are connected in the ab-plane direction, and these regions may exhibit distortion. Distortion refers to a point in the connected region where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement. In short, CAAC-OS is an oxide semiconductor that is c-axis oriented and does not exhibit clear orientation in the ab-plane direction.

[0108] Each of the multiple crystalline regions described above is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of a single minute crystal, the maximum diameter of that crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of that crystalline region may be around several tens of nanometers.

[0109] Furthermore, in In-M-Zn oxides (where element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystalline structure (also called a layered structure) consisting of layers containing indium (In) and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer). Note that indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain element M. Also, the In layer may contain Zn. This layered structure can be observed, for example, as a lattice image in high-resolution TEM images.

[0110] When structural analysis of a CAAC-OS film is performed using an XRD instrument, for example, out-of-plane XRD measurements using θ / 2θ scanning show a peak indicating c-axis orientation at 2θ = 31° or nearby. Note that the position of the c-axis orientation peak (value of 2θ) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0111] Furthermore, for example, multiple bright spots are observed in the electron diffraction pattern of a CAAC-OS film. These spots are observed at point-symmetric positions with respect to the incident electron beam spot (also called the direct spot) that passed through the sample.

[0112] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, the strain may have lattice arrangements such as pentagons or heptagons. Moreover, in CAAC-OS, clear grain boundaries cannot be observed even near the strain. In other words, it can be seen that the formation of grain boundaries is suppressed by the strain in the lattice arrangement. This is thought to be because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the ab-plane direction, and the bond distance between atoms changes due to the substitution of metal atoms.

[0113] A crystal structure in which clear grain boundaries are observed is called a polycrystal. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in transistor on-current and field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not observed, is one of the crystalline oxides with a suitable crystal structure for the semiconductor layer of a transistor. In addition, a structure containing Zn is preferred for the composition of CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they suppress the generation of grain boundaries more than In oxide.

[0114] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. Furthermore, since the crystallinity of oxide semiconductors can decrease due to the inclusion of impurities and the generation of defects, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Consequently, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors allows for greater flexibility in the manufacturing process.

[0115] [nc-OS] nc-OS exhibits periodicity in atomic arrangement in minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). In other words, nc-OS contains minute crystals. These minute crystals are also called nanocrystals because their size is, for example, between 1 nm and 10 nm, particularly between 1 nm and 3 nm. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS or amorphous oxide semiconductors. For example, when structural analysis of an nc-OS film is performed using an XRD instrument, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Also, when electron diffraction (also called limited-field electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter larger than that of the nanocrystals (e.g., 50 nm or larger), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern may be obtained in which multiple spots are observed within a ring-shaped region centered on a direct spot.

[0116] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. In other words, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0117] <Oxide semiconductor structure> Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS refers to the material composition.

[0118] [CAC-OS] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing these metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0119] Furthermore, CAC-OS is a composite metal oxide having a mosaic-like structure formed by the separation of the material into a first region and a second region, with the first region distributed within the film (hereinafter also referred to as a cloud-like structure). In other words, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0120] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is the region where [In] is greater than the [In] in the second region, and [Ga] is smaller than the [Ga] in the second region. The second region is the region where [Ga] is greater than the [Ga] in the first region, and [In] is smaller than the [In] in the first region.

[0121] Specifically, the first region described above is a region whose main components are indium oxide, indium zinc oxide, etc. The second region described above is a region whose main components are gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region whose main component is In. Similarly, the second region can be rephrased as a region whose main component is Ga.

[0122] Furthermore, a clear boundary may not be observed between the first region and the second region described above.

[0123] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) confirms that it has a structure in which regions mainly composed of In (first region) and regions mainly composed of Ga (second region) are unevenly distributed and mixed.

[0124] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulation due to the second region work complementaryly to give CAC-OS a switching function (on / off function). In other words, CAC-OS has conductive function in part of the material, insulating function in part of the material, and semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I) can be achieved. on This enables high field-effect mobility (μ) and good switching operation.

[0125] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention may include two or more of the following: amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0126] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0127] By using the above-mentioned oxide semiconductor in transistors, it is possible to realize transistors with high field-effect mobility. Furthermore, it is possible to realize highly reliable transistors.

[0128] It is preferable to use an oxide semiconductor with a low carrier concentration in the channel formation region of a transistor. For example, the carrier concentration in the channel formation region of an oxide semiconductor is 1 × 10⁻⁶. 17 cm -3 The following is preferably 1 × 10 15 cm -3 More preferably 1 × 10 13 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm -3 This concludes the explanation. Furthermore, when lowering the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film should be lowered to reduce the defect level density. In this specification, a low impurity concentration and low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that oxide semiconductors with low carrier concentrations are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0129] Furthermore, oxide semiconductor films that are highly intrinsic or substantially highly intrinsic may have a low trap level density due to their low defect level density.

[0130] Furthermore, charges trapped in the trap levels of oxide semiconductors can take a long time to disappear, sometimes behaving like fixed charges. Therefore, transistors in which channel formation regions are formed in oxide semiconductors with a high trap level density may exhibit unstable electrical properties.

[0131] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0132] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0133] In oxide semiconductors, the presence of silicon or carbon, which are Group 14 elements, leads to the formation of defect levels in the oxide semiconductor. Therefore, the concentrations of silicon and carbon in the channel formation region of the oxide semiconductor and the concentrations of silicon or carbon near the interface with the channel formation region of the oxide semiconductor (concentrations obtained by secondary ion mass spectrometry (SIMS)) are measured in 2 × 10⁻¹⁰ units. 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0134] Furthermore, if an oxide semiconductor contains alkali metals or alkaline earth metals, it may form defect levels and generate carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to exhibit normally-on characteristics. For this reason, the concentration of alkali metals or alkaline earth metals in the channel formation region of the oxide semiconductor obtained by SIMS should be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0135] Furthermore, in oxide semiconductors, the presence of nitrogen generates electrons, which act as carriers, increasing the carrier concentration and making it easier for the semiconductor to become n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to exhibit normally-on characteristics. Alternatively, the presence of nitrogen in oxide semiconductors can lead to the formation of trap levels. As a result, the electrical properties of the transistor may become unstable. For this reason, the nitrogen concentration in the channel formation region of oxide semiconductors obtained by SIMS should be set to 5 × 10⁻⁶. 19 atoms / cm 3Less than 5 × 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:

[0136] Furthermore, hydrogen contained in oxide semiconductors can react with oxygen bonded to metal atoms to form water, potentially creating oxygen vacancies. When hydrogen fills these oxygen vacancies, electrons, which act as carriers, may be generated. Additionally, some of the hydrogen can combine with oxygen bonded to metal atoms to generate electrons. Therefore, transistors using oxide semiconductors containing hydrogen tend to exhibit normally-on characteristics. For this reason, it is preferable to minimize the amount of hydrogen in the channel formation region of the oxide semiconductor. Specifically, in the channel formation region of the oxide semiconductor, the hydrogen concentration obtained by SIMS should be 1 × 10⁻⁶. 20 atoms / cm 3 Less than 5 × 10 19 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0137] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be provided.

[0138] <Other semiconductor materials> The semiconductor materials that can be used for the semiconductor layer of a transistor are not limited to the metal oxides mentioned above. Semiconductor materials with a band gap (semiconductor materials that are not zero-gap semiconductors) may also be used as the semiconductor layer. For example, it is preferable to use semiconductors of single elements such as silicon, compound semiconductors such as gallium arsenide, or layered materials that function as semiconductors (also called atomic layer materials or two-dimensional materials). In particular, it is preferable to use layered materials that function as semiconductors as the semiconductor material.

[0139] In this specification, the term "layered material" refers to a group of materials having a layered crystalline structure. A layered crystalline structure is a structure in which layers formed by covalent or ionic bonds are stacked via weaker bonds than covalent or ionic bonds, such as van der Waals forces. Layered materials have high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, it is possible to provide a transistor with a large on-current.

[0140] Layered materials include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogens. Chalcogens are a general term for elements belonging to Group 16, and include oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides.

[0141] For the semiconductor layer of the transistor, it is preferable to use, for example, a transition metal chalcogenide that functions as a semiconductor. Specific examples of transition metal chalcogenides applicable as semiconductor layers include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum tellurium (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten tellurium (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), and zirconium selenide (typically ZrSe2).

[0142] The drive circuit 102 has the function of generating a signal to control the display unit 104 using the control signal and video signal supplied from the input / output terminal unit 106, and supplying it to the display unit 104. As the resolution of the display unit increases, the drive circuit 102 is required to operate at high speed. Therefore, it is preferable that the drive circuit 102 be composed of transistors with high operating speed. For example, it is preferable that the drive circuit 102 be formed from a crystalline semiconductor.

[0143] Furthermore, it is preferable that the transistors constituting the display unit 104 are transistors (OS transistors) that include an oxide semiconductor in the semiconductor layer where the channel is formed. Since oxide semiconductors have an energy gap of 2 eV or more, the off-current of the transistor can be reduced. Therefore, it is preferable to use OS transistors for transistors 436 and / or transistor 434.

[0144] Furthermore, OS transistors have a high dielectric breakdown voltage between their source and drain. For example, since transistor 251 functions as a switch that supplies power to the display element 432, it is preferable to use a transistor with a high dielectric breakdown voltage between its source and drain as transistor 251. Therefore, it is preferable to use an OS transistor for transistor 251.

[0145] By using different semiconductor materials for the transistors constituting the drive circuit 102 and the transistors constituting the display unit 104, depending on the purpose and / or application, the reliability of the display device 100 can be improved and power consumption reduced.

[0146] Furthermore, depending on the purpose and / or application, the semiconductor material used for the transistors constituting the drive circuit 102 and the semiconductor material used for the transistors constituting the display unit 104 may be the same.

[0147] For example, the display device 100 may be configured as a stacked structure consisting of a drive circuit 102 made from a single-crystal silicon substrate and a display unit 104 made from a single-crystal silicon substrate.

[0148] Furthermore, by placing the display unit 104 on top of the drive circuit 102, the display device 100 can be miniaturized. Also, if the external dimensions of the display device 100 remain constant, the area of ​​the display unit 104 can be increased. Therefore, the resolution of the display device 100 can be increased. Also, if the pixel resolution remains constant, the area occupied per pixel can be increased. Therefore, the luminous brightness of the display device can be increased. Also, the aperture ratio of the pixels can be increased. For example, the aperture ratio of the pixels can be set to 40% or more and less than 100%, preferably 50% or more and 95%, and more preferably 60% or more and 95%. In addition, by increasing the area occupied per pixel, the current density supplied to the pixels can be reduced. Therefore, the load on the pixels is reduced, and the reliability of the display device 100 can be increased.

[0149] A display device 100 according to one aspect of the present invention can be suitably used in VR devices such as head-mounted displays or AR devices such as glasses. The display device 100 according to one aspect of the present invention easily achieves an improved aperture ratio and has good visibility. Therefore, VR devices or AR devices using the display device 100 according to one aspect of the present invention can provide a high level of immersion. Furthermore, the display device 100 according to one aspect of the present invention is not limited to the above-mentioned devices and can be suitably used in electronic devices having a relatively small display unit. For example, it can be suitably used in the display unit of wearable electronic devices such as wristwatches.

[0150] Furthermore, the semiconductor device that can be provided on the substrate 101 is not limited to the drive circuit 102. A storage device 113, a GPU 114, and / or a CPU 115 may also be provided on the substrate 101. The display device 100A shown in Figure 4 has a drive circuit 102, a storage device 113, a GPU 114, and a CPU 115 on the substrate 101. Note that in Figure 4, the semiconductor device on the substrate 101 and the display unit 104 are shown separately in order to make the configuration of the invention easier to understand. Also, in Figure 4, the wiring group 103 and other details are omitted.

[0151] Alternatively, the input / output terminal section 106 may be provided on the underside of the substrate 101 using TSV (Through Silicon Via) technology or the like, instead of being located on the display unit 104 side.

[0152] <Example of manufacturing method> An example of a method for manufacturing the display device 100 will be explained using drawings. Figures 5 and 6 are cross-sectional views illustrating the method for manufacturing the display device 100. Figures 7 to 9 are perspective views illustrating the method for manufacturing the display device 100. In this embodiment, a method for manufacturing multiple display devices 100 together will be described.

[0153] [Process 1] A semiconductor chip 120 is placed on the support substrate 111 (see Figure 5A). The semiconductor chip 120 is a drive circuit 102 provided on an SOI (Silicon on Insulator) substrate, and the drive circuit 102 including a transistor 123 is formed on the Si substrate 121 via a BOX layer 122 (BOX: Buried Oxide). In this process, the drive circuit 102 is positioned so that it faces the support substrate 111. If the transistor 123 is a top-gate type transistor, the gate electrode of the transistor 123 is positioned so that it is closer to the support substrate 111 than to the semiconductor layer.

[0154] [Process 2] Next, polishing is performed to remove the Si substrate 121 (see Figures 5B and 7A). Removal of the Si substrate 121 should be continued until the BOX layer 122 is exposed.

[0155] [Process 3] Next, an insulating layer 124 is formed to cover the drive circuit 102 (see Figure 5C).

[0156] [Step 4] Next, the insulating layer 124 is subjected to a planarization treatment (see Figure 5D). The planarization treatment can be carried out using a known method such as chemical mechanical polishing (CMP). As a result of the planarization treatment, the height of the upper surface of the insulating layer 124 and the exposed surface of the drive circuit 102 become approximately the same.

[0157] [Step 5] Next, the substrate 101 is bonded onto the insulating layer 124 and the drive circuit 102 (see Figure 5E). An insulating layer containing the same constituent elements as the insulating layer 124 may be provided on the bonding surface of the substrate 101. Providing this insulating layer makes it easier for the two to adhere to each other. For example, if the insulating layer 124 is silicon oxide, silicon oxide may be provided on the bonding surface of the substrate 101.

[0158] [Step 6] Next, the support substrate 111 is removed, and the substrate 101 is placed on the bottom side (see Figures 5F and 7B). The drive circuit 102, including the transistor 123, is positioned such that the semiconductor layer of the transistor 123 is closer to the substrate 101 than the gate electrode.

[0159] The support substrate 111 may be removed by polishing. Alternatively, a release layer may be provided between the support substrate 111 and the drive circuit 102 beforehand, and the support substrate 111 may be removed by a release process.

[0160] [Step 7] Next, a wiring group 103 is formed on the insulating layer 124 and the drive circuit 102 (see Figure 6A). The wiring group 103 can be formed by appropriately combining various film deposition methods, photolithography, and etching methods. The wiring group 103 has multiple wires. At least some of the wires included in the wiring group 103 are electrically connected to at least some of the transistors included in the drive circuit 102.

[0161] [Step 8] Next, an insulating layer 125 is formed to cover the wiring group 103 (see Figure 6B).

[0162] [Step 9] Next, the insulating layer 125 is subjected to a planarization treatment (see Figures 6C and 8A). The planarization treatment can be carried out using a known method such as CMP treatment. As a result of the planarization treatment, the height of the upper surface of the insulating layer 125 and the exposed surface of the wiring group 103 become approximately the same.

[0163] [Step 10] Next, the display unit 104 is formed on the insulating layer 125 and the wiring group 103 (see Figures 6D and 8B). The display unit 104 can be formed by appropriately combining various film deposition methods, photolithography, and etching methods. In this embodiment, a top-emission type display unit 104 using an organic EL element is formed.

[0164] [Step 11] Next, a substrate 105 is formed on the display unit 104. A color filter and / or microlenses may be formed on the substrate 105 (see Figures 6E and 9A). A sealing material may be provided between the display unit 104 and the substrate 105. The sealing material may be provided along the outer periphery of the area where the display unit 104 and the substrate 105 overlap, or it may be provided over the entire area where the display unit 104 and the substrate 105 overlap.

[0165] [Step 12] Next, the structures fabricated up to step 11 are separated into individual display units 104 (see Figures 6F and 9B).

[0166] [Step 13] Next, a portion of the substrate 105 is removed to expose the input / output terminal section 106 (see Figures 6G and 9C). In this way, the display device 100 can be formed.

[0167] [substrate] There are no major restrictions on the materials used for substrates 101, 105, and support substrate 111. Depending on the purpose, the materials should be determined considering factors such as the presence or absence of light transmission and heat resistance sufficient to withstand heat treatment. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, and sapphire substrates can be used. Semiconductor substrates, flexible substrates, laminated films, and base films may also be used.

[0168] Examples of semiconductor substrates include semiconductor substrates made from silicon or germanium, or compound semiconductor substrates made from silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, the semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0169] In this embodiment, a translucent substrate is used for substrate 105. It is preferable to use materials with similar coefficients of thermal expansion for substrate 101 and substrate 105. Therefore, it is preferable to use the same material for substrate 101 and substrate 105.

[0170] Furthermore, in order to enhance the flexibility of the display device 100, flexible substrates, laminated films, base films, etc., may be used for substrates 101 and 105.

[0171] Examples of materials that can be used for flexible substrates, laminated films, and base films include polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamide-imide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, and cellulose nanofiber.

[0172] By using the above material as the substrate, a lightweight display device can be provided. Furthermore, by using the above material as the substrate, a shock-resistant display device can be provided. Furthermore, by using the above material as the substrate, a damage-resistant display device can be provided.

[0173] The flexible substrates used for substrates 101 and 105 are preferable if they have a low coefficient of thermal expansion, as this suppresses deformation due to the environment. For example, the flexible substrates used for substrates 101 and 105 have a coefficient of thermal expansion of 1 × 10⁻⁶. -3 / K or less, 5×10 -5 / K or less, or 1 × 10 -5 Any material with a thermal expansion coefficient of 0.00 / K or less should be used. In particular, aramid is suitable as a flexible substrate because of its low coefficient of thermal expansion.

[0174] [Conductive layer] Conductive materials that can be used for conductive layers such as the gate, source, and drain of transistors, as well as various wirings and electrodes that constitute display devices, include metal elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium (Hf), vanadium (V), niobium (Nb), manganese, magnesium, zirconium, beryllium, etc., alloys composed of the above metal elements, or alloys combining the above metal elements. Semiconductors such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may also be used. The method of forming the conductive material is not particularly limited, and various formation methods such as vapor deposition, CVD, sputtering, and spin coating can be used.

[0175] Furthermore, conductive materials that can be used in the conductive layer include oxygen-containing conductive materials such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide with silicon oxide added. In addition, nitrogen-containing conductive materials such as titanium nitride, tantalum nitride, and tungsten nitride can also be used. Moreover, a laminated structure can be constructed by appropriately combining oxygen-containing conductive materials, nitrogen-containing conductive materials, and materials containing the aforementioned metal elements.

[0176] The conductive material that can be used for the conductive layer may be a single-layer structure or a laminated structure of two or more layers. For example, there is a single-layer structure of an aluminum layer containing silicon, a two-layer structure in which a titanium layer is laminated on an aluminum layer, a two-layer structure in which a titanium layer is laminated on a titanium nitride layer, a two-layer structure in which a tungsten layer is laminated on a titanium nitride layer, a two-layer structure in which a tungsten layer is laminated on a tantalum nitride layer, and a three-layer structure in which a titanium layer is laminated, an aluminum layer is laminated on the titanium layer, and then a titanium layer is formed on top of that. In addition, an aluminum alloy containing one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used as the conductive material.

[0177] [Insulating layer] Each insulating layer is made from a material selected from aluminum nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, magnesium oxide, silicon nitride, silicon oxide, silicon oxide nitride, silicon oxide nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, etc., and is used as a single layer or in multiple layers. Alternatively, a material made by mixing multiple materials from oxide materials, nitride materials, oxide nitride materials, and nitride oxide materials may be used.

[0178] In this specification, "nitride oxide" refers to a compound with a higher nitrogen content than oxygen content. Similarly, "oxiditride" refers to a compound with a higher oxygen content than nitrogen content. The content of each element can be measured, for example, using Rutherford backscattering spectrometry (RBS).

[0179] In particular, when using an OS transistor, it is preferable to form an insulating layer using an insulating material that is less permeable to impurities, covering or sandwiching the OS transistor. For example, insulating materials containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in a multilayer structure. Examples of insulating materials that are less permeable to impurities include aluminum oxide, aluminum nitride, aluminum oxide nitride, aluminum oxide nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, and silicon nitride.

[0180] Furthermore, heat-resistant organic materials such as polyimide, acrylic resin, benzocyclobutene resin, polyamide, and epoxy resin can be used as insulating layers that can function as planarization layers. In addition to the above organic materials, low dielectric constant materials (low-k materials), siloxane resins, PSG (phosphorus glass), BPSG (phosphorus boron glass), etc., can also be used. Multiple insulating layers formed from these materials may be laminated.

[0181] Siloxane-based resins refer to resins containing Si-O-Si bonds formed using siloxane-based materials as starting materials. Siloxane-based resins may use organic groups (e.g., alkyl or aryl groups) or fluoro groups as substituents. Furthermore, the organic groups may also contain fluoro groups.

[0182] Furthermore, CMP treatment may be applied to the surface of the insulating layer, etc. By performing CMP treatment, surface irregularities can be reduced, and the coverage of the insulating layer and conductive layer formed thereafter can be improved.

[0183] Furthermore, insulating layers, semiconductor layers, and conductive layers for forming electrodes and wiring that constitute the display device can be formed using methods such as sputtering, chemical vapor deposition (CVD), vacuum deposition, pulsed laser deposition (PLD), atomic layer deposition (ALD), and plasma enhanced ALD (PEALD). For CVD methods, plasma chemical vapor deposition (PECVD) or thermal CVD may also be used. As an example of thermal CVD, metal-organic chemical vapor deposition (MOCVD) may be used.

[0184] Furthermore, insulating layers, semiconductor layers, and conductive layers for forming electrodes and wiring that constitute the display device may be formed by methods such as spin coating, dip coating, spray coating, inkjet printing, dispensing, screen printing, offset printing, slit coating, roll coating, curtain coating, and knife coating.

[0185] PECVD (Polymer-Emission Vapor Deposition) yields high-quality films at relatively low temperatures. Using non-plasma deposition methods such as MOCVD (Modified Oxide Vapor Deposition), ALD (Automated Lamination), or thermal CVD (Chemical Vapor Deposition) reduces damage to the deposition surface. For example, wiring, electrodes, and components (transistors, capacitive elements, etc.) in semiconductor devices can be charged up by receiving charge from the plasma. This accumulated charge can destroy the wiring, electrodes, and components in the semiconductor device. On the other hand, non-plasma deposition methods avoid this plasma damage, resulting in higher yields for semiconductor devices. Furthermore, the absence of plasma damage during deposition allows for the production of films with fewer defects.

[0186] Unlike film deposition methods where particles emitted from a target or other source are deposited, CVD and ALD methods form films through reactions on the surface of the workpiece. Therefore, they are less affected by the shape of the workpiece and offer good step-level coverage. In particular, the ALD method is suitable for coating the surface of openings with high aspect ratios due to its excellent step-level coverage and uniform thickness. However, because the ALD method has a relatively slow deposition rate, it is sometimes preferable to use it in combination with other film deposition methods that have a faster deposition rate, such as the CVD method.

[0187] CVD and ALD methods allow for control of the composition of the resulting film by adjusting the flow rate ratio of the source gases. For example, CVD and ALD methods can deposit films of any composition by changing the flow rate ratio of the source gases. Furthermore, CVD and ALD methods can deposit films with continuously changing compositions by changing the flow rate ratio of the source gases during film deposition. When depositing films while changing the flow rate ratio of the source gases, the time required for film deposition can be reduced compared to depositing films using multiple deposition chambers, by eliminating the time spent on transport and pressure adjustment. Therefore, it may be possible to increase the productivity of semiconductor devices.

[0188] Furthermore, when forming a film using the ALD method, it is preferable to use a chlorine-free gas as the material gas.

[0189] Furthermore, when forming oxide semiconductors by sputtering, the chamber in the sputtering apparatus is kept under high vacuum (5 × 10) using an adsorption-type vacuum pump such as a cryopump to remove as much water and other impurities as possible from the oxide semiconductor. -7 Pa to 1 × 10 -4 It is preferable to evacuate the chamber to approximately Pa. In particular, when the sputtering apparatus is in standby mode, the partial pressure of gas molecules corresponding to H2O (gas molecules corresponding to m / z=18) in the chamber should be 1 × 10⁻⁶. -4 It is preferable to keep it below Pa, 5 × 10 -5It is more preferable to keep the temperature below Pa. The film deposition temperature is preferably RT or above 500°C, more preferably RT or above 300°C, and even more preferably RT or above 200°C.

[0190] Furthermore, it is necessary to purify the sputtering gas. For example, by using oxygen and argon gases used as sputtering gases that have been purified to a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower, and more preferably -120°C or lower, it is possible to prevent moisture and other substances from being incorporated into the oxide semiconductor film as much as possible.

[0191] Furthermore, when forming insulating layers, conductive layers, or semiconductor layers using the sputtering method, oxygen can be supplied to the layer being formed by using a sputtering gas containing oxygen. The more oxygen contained in the sputtering gas, the more oxygen is likely to be supplied to the layer being formed.

[0192] When processing the layers (thin films) that constitute the display device, processing can be done using methods such as photolithography. Alternatively, island-like layers may be formed by a film deposition method using a shielding mask. Alternatively, the layers may be processed by methods such as nanoimprint, sandblasting, or lift-off. Photolithography methods include a method in which a resist mask is formed on the layer (thin film) to be processed, a part of the layer (thin film) is selectively removed using the resist mask as a mask, and then the resist mask is removed; and a method in which a photosensitive layer is deposited, and then exposed and developed to process the layer into the desired shape.

[0193] In photolithography, when using light, the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture thereof. Other options include ultraviolet light, KrF laser light, or ArF laser light. Exposure may also be performed using immersion lithography. Furthermore, extreme ultraviolet (EUV) light or X-rays may be used as the light source for exposure. An electron beam can also be used instead of light for exposure. Using extreme ultraviolet light, X-rays, or an electron beam is preferable because it allows for extremely fine processing. Note that a photomask is not required when exposure is performed by scanning a beam such as an electron beam.

[0194] Dry etching and wet etching methods can be used to remove (etch) the layers (thin films). These etching methods may also be used in combination.

[0195] <Variation> The semiconductor chip 120 may be placed on the substrate 101 without using the support substrate 111. Specifically, the semiconductor chip 120 is positioned so that the drive circuit 102 side faces the substrate 101. Then, the Si substrate 121 is removed, an insulating layer 124 is provided, and the height of the upper surface of the insulating layer 124 and the exposed surface of the drive circuit 102 are made to be approximately the same by a planarization process. Subsequent steps can be carried out in the same manner as from step 7 onward.

[0196] <Example of display module configuration> Next, an example of the configuration of a display module including a display device according to one aspect of the present invention will be described.

[0197] Figures 11A and 11B are schematic perspective views of the display module 300. The display module 300 shown in Figure 11A has a configuration in which a display device 100 is provided on a printed circuit board 301. The printed circuit board 301 has a structure in which wiring is provided inside and / or on the surface of a substrate made of an insulating material.

[0198] In the display module 300 shown in Figure 11A, the input / output terminal section 106 of the display device 100 and the terminal section 302 of the printed circuit board 301 are electrically connected via a wire 303. The wire 303 can be formed by the wire bonding method. After the wire 303 is formed, it may be covered with a resin material or the like. Note that the electrical connection between the display device 100 and the printed circuit board 301 may be made by a method other than wire bonding.

[0199] Furthermore, the display module 300 shown in Figure 11A is electrically connected to the FPC 304 (FPC: Flexible printed circuits). The FPC 304 has a structure in which wiring is provided on a film made of an insulating material. The FPC 304 is also flexible. The FPC 304 functions as wiring for supplying video signals and / or power potential, etc., to the display device 100 from the outside. An IC may also be mounted on the FPC 304.

[0200] Various elements such as resistive elements, capacitive elements, and semiconductor elements can be provided on the printed circuit board 301. Furthermore, the spacing (pitch) between the multiple electrodes of the input / output terminal section 106 can be changed to the spacing between the multiple electrodes of the terminal section 302 using the wiring formed on the printed circuit board 301. In other words, even if the pitch of the electrodes of the input / output terminal section 106 and the pitch of the electrodes of the FPC 304 are different, electrical connection between the electrodes of both can be achieved.

[0201] Alternatively, as shown in Figure 11B, the display module 300 may be directly connected to the input / output terminal section 106 of the display device 100 via the FPC 304. If the pitch of the electrodes on the input / output terminal section 106 and the pitch of the electrodes on the FPC 304 are the same, the input / output terminal section 106 and the FPC 304 may be electrically connected without using the printed circuit board 301.

[0202] Alternatively, as shown in Figure 12A of the display module 300, the terminal portion 302 may be electrically connected to a connection portion 305 provided on the lower surface of the printed circuit board 301 (the side on which the display device 100 is not installed). For example, by making the connection portion 305 a socket-type connection portion, the display module 300 can be easily attached to and detached from other devices.

[0203] As shown in Figure 12B, the electrical connection between the wiring provided on the display unit 104 and the wiring group 103 may be made via a wire 303. This is particularly preferable when the display unit 104 is formed from a crystalline silicon wafer (also called a "Si wafer").

[0204] <Number of devices in display device 100> We estimated the number of display devices 100 that can be manufactured on a single substrate 101 when a 12-inch Si wafer is used as the substrate 101. Table 1 shows the specifications used for the estimation.

[0205] [Table 1]

[0206] In Table 1, shot size refers to the size of the area that can be processed in a single exposure in photolithography (also called the "exposure area"). Shot distance refers to the distance between adjacent exposure areas.

[0207] Figure 13A shows a layout diagram of a display device 100 that can be fabricated on a substrate 101 which is a 12-inch Si wafer. Figure 13B is a diagram illustrating the correspondence between the specifications shown in Table 1 and the layout of the display device 100 fabricated on a 12-inch Si wafer. 56 display devices 100 can be fabricated on a single 12-inch Si wafer substrate.

[0208] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

[0209] (Embodiment 2) This embodiment describes a light-emitting device that can be used in the display element 432.

[0210] Figure 14A shows a diagram representing a light-emitting device. The light-emitting device shown in Figure 14A has a first electrode 181, a second electrode 182, and an EL layer 183.

[0211] In one aspect of the present invention, the light-emitting device can typically be a structure in which different colors of light (for example, red (R), green (G), and blue (B)) are painted separately (also called an SBS (Side By Side) structure), or a tandem structure (also called a tandem element, etc.) as described later. An SBS structure is preferable because it can suppress the power consumption of the light-emitting device. A tandem structure is also preferable because it can reduce the manufacturing cost of the light-emitting device.

[0212] The EL layer 183 has a light-emitting layer 193, which contains a light-emitting material. Between the light-emitting layer 193 and the first electrode 181, a hole injection layer 191 and a hole transport layer 192 are provided.

[0213] Furthermore, the light-emitting layer 193 may contain a host material along with the light-emitting material. The host material is an organic compound having carrier transport properties. The host material may contain not just one type, but multiple types. In this case, it is preferable that the multiple organic compounds include an organic compound having electron transport properties and an organic compound having hole transport properties, as this allows for balancing the carriers within the light-emitting layer 193. Alternatively, the multiple organic compounds may all be organic compounds with electron transport properties, but their differing electron transport properties can be used to adjust the electron transport properties in the light-emitting layer 193. By appropriately adjusting the carrier balance, it is possible to provide a light-emitting device with a good lifetime. Furthermore, the configuration may involve forming excitation complexes between multiple organic compounds that constitute the host material, or between the host material and the light-emitting material. By forming excitation complexes with appropriate emission wavelengths, effective energy transfer to the light-emitting material can be achieved, providing a light-emitting device with high efficiency and a good lifetime.

[0214] In Figure 14A, the EL layer 183 is shown to include an emissive layer 193, a hole injection layer 191, and a hole transport layer 192, as well as electron transport layers 194 and 195. However, the configuration of the light-emitting device is not limited to these. None of these layers may be formed, or layers with other functions may be included.

[0215] Next, we will describe the detailed structure and material examples of the light-emitting device described above. The first electrode 181 is preferably formed using a metal, alloy, conductive compound, or mixture thereof with a large work function (specifically, 4.0 eV or more). Specifically, examples include indium tin oxide (ITO), indium tin oxide containing silicon or silicon oxide, indium zinc oxide, and indium oxide (IWZO) containing tungsten oxide and zinc oxide. These conductive metal oxide films are usually deposited by sputtering, but they may also be fabricated using methods such as the sol-gel method. Furthermore, by using the composite material described later in the layer in contact with the first electrode 181 in the EL layer 183, it becomes possible to select the electrode material regardless of the work function.

[0216] The EL layer 183 preferably has a multilayer structure, but there are no particular limitations on the multilayer structure, and various layer structures such as hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer, carrier block layer, exciton block layer, and charge generation layer can be applied. In this embodiment, two types of configurations will be described: one having a hole injection layer 191, a hole transport layer 192, a light-emitting layer 193, in addition to an electron transport layer 194 and an electron transport layer 195, as shown in Figure 14A, and one having a hole injection layer 191, a hole transport layer 192, a light-emitting layer 193, in addition to an electron transport layer 194 and a charge generation layer 196, as shown in Figure 14B. The materials constituting each layer are specifically described below.

[0217] The hole injection layer 191 is a layer containing an acceptor substance. Both organic and inorganic compounds can be used as the acceptor substance.

[0218] Examples of substances with acceptor properties include compounds having electron-withdrawing groups (halogen groups or cyano groups), such as 7,7,8,8-tetracyano-2,3,5,6-tetrafluoroquinodimethane (abbreviated as F4-TCNQ), chloranil, 2,3,6,7,10,11-hexacyano-1,4,5,8,9,12-hexaazatriphenylene (abbreviated as HAT-CN), 1,3,4,5,7,8-hexafluorotetracyano-naphthoquinodimethane (abbreviated as F6-TCNNQ), and 2-(7-dicyanomethylene-1,3,4,5,6,8,9,10-octafluoro-7H-pyrene-2-ylidene)malononitrile.

[0219] In addition to the organic compounds mentioned above, other acceptor materials that can be used include molybdenum oxide, vanadium oxide, ruthenium oxide, tungsten oxide, manganese oxide, etc. Furthermore, the hole injection layer 191 can also be formed by phthalocyanine-based complex compounds such as phthalocyanine (abbreviated as H2Pc) and copper phthalocyanine (abbreviated as CuPc), aromatic amine compounds, or polymers such as poly(3,4-ethylenedioxythiophene) / (polystyrene sulfonic acid) (abbreviated as PEDOT / PSS). Acceptor materials can extract electrons from adjacent hole transport layers (or hole transport materials) by applying an electric field.

[0220] Furthermore, a composite material containing the above-mentioned acceptor substance in a hole-transporting material can also be used as the hole injection layer 191. By using a composite material containing the acceptor substance in a hole-transporting material, it is possible to select the material for forming the electrode regardless of the work function. In other words, not only materials with a large work function but also materials with a small work function can be used as the first electrode 181.

[0221] Various organic compounds can be used as hole-transporting materials in composite materials, including aromatic amine compounds, carbazole derivatives, aromatic hydrocarbons, and polymer compounds (oligomers, dendrimers, polymers, etc.). -6 cm 2 It is preferable that the material has a hole mobility of / Vs or higher.

[0222] Furthermore, it is even more preferable that the hole-transporting material used in the composite material has a relatively deep HOMO level between -5.7 eV and -5.4 eV. Having a relatively deep HOMO level in the hole-transporting material used in the composite material facilitates the injection of holes into the hole transport layer 192 and makes it easier to obtain a light-emitting device with a good lifetime.

[0223] By forming the hole injection layer 191, the hole injection performance is improved, making it possible to obtain a light-emitting device with a low driving voltage. Furthermore, organic compounds with acceptor properties are easy to deposit and form films with, making them easy to use materials.

[0224] The hole transport layer 192 is formed by including a material having hole transport properties. The material having hole transport properties is 1 × 10 -6 cm 2 It is preferable to have a hole mobility of / Vs or higher. Examples of materials having the above hole transport properties include 4,4'-bis[N-(1-naphthyl)-N-phenylamino]biphenyl (abbreviated as NPB), N,N'-bis(3-methylphenyl)-N,N'-diphenyl-[1,1'-biphenyl]-4,4'-diamine (abbreviated as TPD), and 4,4'-bis[N-(spiro-9,9'-bifluoren-2-yl)-N-phenylamino]biphenyl (abbreviated as BSPB). In addition, the substances listed as materials having hole transport properties used in the composite material of the hole injection layer 191 can also be suitably used as materials constituting the hole transport layer 192.

[0225] The light-emitting layer 193 contains a light-emitting substance and a host material. The light-emitting layer 193 may also contain other materials. Furthermore, it may be a laminate of two layers with different compositions.

[0226] The luminescent material can be a fluorescent material, a phosphorescent material, a thermally activated delayed fluorescence (TADF) material, or any other luminescent material.

[0227] Examples of materials that can be used as fluorescent luminescent substances in the light-emitting layer 193 include 5,6-bis[4-(10-phenyl-9-antryl)phenyl]-2,2'-bipyridine (abbreviated as PAP2BPy), 5,6-bis[4'-(10-phenyl-9-antryl)biphenyl-4-yl]-2,2'-bipyridine (abbreviated as PAPP2BPy), and N,N'-diphenyl-N,N'-bis[4-(9-phenyl-9H-fluoren-9-yl)phenyl]pyrene-1,6-diamine (abbreviated as 1,6FLPAPrn). Other fluorescent luminescent substances can also be used.

[0228] When a phosphorescent material is used as the light-emitting substance in the light-emitting layer 193, possible materials include, for example, organometallic iridium complexes having a 4H-triazole skeleton, organometallic iridium complexes having a 1H-triazole skeleton, organometallic iridium complexes having an imidazole skeleton, and organometallic iridium complexes with a phenylpyridine derivative having an electron-withdrawing group as a ligand. These are compounds that exhibit blue phosphorescence and have emission wavelength peaks between 440 nm and 520 nm.

[0229] Other examples include organometallic iridium complexes with a pyrimidine skeleton, organometallic iridium complexes with a pyrazine skeleton, organometallic iridium complexes with a pyridine skeleton, and rare earth metal complexes such as tris(acetylacetonato)(monophenanthroline)terbium(III) (abbreviation: [Tb(acac)3(Phen)]). These are mainly compounds that exhibit green phosphorescence and have an emission wavelength peak between 500 nm and 600 nm. Organometallic iridium complexes with a pyrimidine skeleton are particularly preferred due to their outstanding reliability and luminescence efficiency.

[0230] Other examples include organometallic iridium complexes with a pyrimidine skeleton, organometallic iridium complexes with a pyrazine skeleton, organometallic iridium complexes with a pyridine skeleton, platinum complexes, and rare earth metal complexes. These compounds exhibit red phosphorescence and have an emission peak between 600 nm and 700 nm. Furthermore, organometallic iridium complexes with a pyrazine skeleton yield red emission with good chromaticity.

[0231] In addition to the phosphorescent compounds described above, other known phosphorescent substances may be selected and used.

[0232] As TADF materials, fullerenes and their derivatives, acridines and their derivatives, eosin derivatives, etc., can be used. Also, metal-containing porphyrins containing magnesium (Mg), zinc (Zn), cadmium (Cd), tin (Sn), platinum (Pt), indium (In), or palladium (Pd) can be used.

[0233] TADF materials are materials that have a small difference between the S1 and T1 energy levels and possess the ability to convert energy from triplet excitation energy to singlet excitation energy through reverse intersystem crossing. Therefore, triplet excitation energy can be upconverted to singlet excitation energy with only a small amount of thermal energy (reverse intersystem crossing), and singlet excited states can be efficiently generated. Furthermore, triplet excitation energy can be converted into luminescence.

[0234] Furthermore, an excited complex (also called an exciplex) that forms an excited state with two types of substances has an extremely small difference between the S1 and T1 levels and functions as a TADF material that can convert triplet excitation energy into singlet excitation energy.

[0235] Furthermore, the phosphorescence spectrum observed at low temperatures (e.g., 77K to 10K) can be used as an indicator of the T1 level. For TADF materials, when a tangent is drawn at the short-wavelength tail of the fluorescence spectrum and the energy at the wavelength of the extrapolation is taken as the S1 level, and when a tangent is drawn at the short-wavelength tail of the phosphorescence spectrum and the energy at the wavelength of the extrapolation is taken as the T1 level, it is preferable that the difference between S1 and T1 is 0.3 eV or less, and more preferably 0.2 eV or less.

[0236] Furthermore, when using TADF material as a light-emitting material, it is preferable that the S1 level of the host material is higher than the S1 level of the TADF material. Also, it is preferable that the T1 level of the host material is higher than the T1 level of the TADF material.

[0237] Various carrier transport materials can be used as the host material for the light-emitting layer, such as electron transport materials, hole transport materials, and the TADF material mentioned above.

[0238] As materials having hole-transporting properties, organic compounds having an amine skeleton or a π-electron-rich heteroaromatic ring skeleton are preferred. Examples include compounds having an aromatic amine skeleton, a carbazole skeleton, a thiophene skeleton, and a furan skeleton. Among the above, compounds having an aromatic amine skeleton and compounds having a carbazole skeleton are preferred because they have good reliability, high hole transport properties, and contribute to reducing the driving voltage.

[0239] Preferred materials with electron transport properties include, for example, metal complexes or organic compounds having a π-electron-deficient heteroaromatic ring skeleton. Examples of organic compounds having a π-electron-deficient heteroaromatic ring skeleton include heterocyclic compounds having a polyazole skeleton, heterocyclic compounds having a diazine skeleton, heterocyclic compounds having a triazine skeleton, and heterocyclic compounds having a pyridine skeleton. Among the above, heterocyclic compounds having a diazine skeleton, heterocyclic compounds having a triazine skeleton, and heterocyclic compounds having a pyridine skeleton are preferred due to their good reliability. In particular, heterocyclic compounds having a diazine (pyrimidine or pyrazine) skeleton have high electron transport properties and contribute to reducing the driving voltage.

[0240] The TADF materials listed above can be used as host materials. When a TADF material is used as a host material, the triplet excitation energy generated by the TADF material is converted into singlet excitation energy through reverse intersystem crossing, and this energy is then transferred to the light-emitting material, thereby increasing the luminescence efficiency of the light-emitting device.

[0241] When using a fluorescent material as the light-emitting material, a material having an anthracene skeleton is preferred as the host material. By using a material having an anthracene skeleton as the host material for the fluorescent material, it is possible to realize a light-emitting layer with good luminescence efficiency and durability.

[0242] The electron transport layer 194 is a layer containing an electron-transporting material. As the electron-transporting material, any of the electron-transporting materials listed above as usable in the host material can be used.

[0243] Furthermore, the electron transport layer 194 has an electron mobility of 1 × 10⁻¹⁴ when the square root of the electric field strength [V / cm] is 600. -7 cm 2 / Vs or more 5×10 -5 cm 2It is preferable that the value is less than or equal to / Vs. By reducing the electron transport properties in the electron transport layer 194, the amount of electrons injected into the light-emitting layer can be controlled, preventing the light-emitting layer from becoming electron-excessive. Furthermore, it is preferable that the electron transport layer contains an electron-transporting material and an alkali metal or an alkali metal element, compound, or complex. These configurations are particularly preferable because they result in a good lifetime when the hole injection layer is formed as a composite material and the HOMO level of the hole-transporting material in the composite material is a relatively deep HOMO level between -5.7eV and -5.4eV. In this case, it is preferable that the HOMO level of the electron-transporting material is -6.0eV or higher.

[0244] Between the electron transport layer 194 and the second electrode 182, an electron transport layer 195 may be provided, which contains an alkali metal or alkaline earth metal or a compound thereof, such as lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF2), or 8-hydroxyquinolinatolithium (abbreviated as Liq). The electron transport layer 195 may be a layer made of an electron-transporting material containing an alkali metal or alkaline earth metal or a compound thereof, or an electride may be used. Examples of electrides include a material obtained by adding electrons to a mixed oxide of calcium and aluminum at a high concentration.

[0245] Furthermore, as the electron transport layer 195, it is also possible to use a layer containing an alkali metal or alkaline earth metal fluoride in a concentration (50 wt% or more) that is in a microcrystalline state, in a material having electron transport properties (preferably an organic compound having a bipyridine skeleton). Since this layer has a low refractive index, it is possible to provide a light-emitting device with better external quantum efficiency.

[0246] Alternatively, a charge generation layer 196 may be provided instead of the electron transport layer 195 (Figure 14B). The charge generation layer 196 is a layer that can inject holes into the layer in contact with the cathode side and electrons into the layer in contact with the anode side by applying a potential. The charge generation layer 196 includes at least a P-type layer 197. The P-type layer 197 is preferably formed using a composite material listed above as a material that can constitute the hole injection layer 191. The P-type layer 197 may also be formed by laminating a film containing the acceptor material and a film containing the hole transport material as materials constituting the composite material. By applying a potential to the P-type layer 197, electrons are injected into the electron transport layer 194 and holes are injected into the second electrode 182, which is the cathode, and the light-emitting device operates. Furthermore, since the organic compound in one aspect of the present invention is an organic compound with a low refractive index, by using it in the P-type layer 197, a light-emitting device with good external quantum efficiency can be obtained.

[0247] Furthermore, it is preferable that the charge generation layer 196 includes, in addition to the P-type layer 197, one or both of the electron relay layer 198 and the electron injection buffer layer 199.

[0248] The electron relay layer 198 contains at least an electron-transporting material and has the function of preventing interaction between the electron injection buffer layer 199 and the P-type layer 197, thereby smoothly transferring electrons. Preferably, the LUMO level of the electron-transporting material contained in the electron relay layer 198 is between the LUMO level of the acceptor material in the P-type layer 197 and the LUMO level of the material contained in the layer in contact with the charge generation layer 196 in the electron transport layer 194. The specific energy level of the LUMO level of the electron-transporting material used in the electron relay layer 198 is preferably -5.0 eV or higher, more preferably -5.0 eV or higher and -3.0 eV or lower. Preferably, the electron-transporting material used in the electron relay layer 198 is a phthalocyanine-based material or a metal complex having a metal-oxygen bond and an aromatic ligand.

[0249] The electron injection buffer layer 199 can use materials with high electron injection potential, such as alkali metals, alkaline earth metals, rare earth metals, and compounds thereof (alkali metal compounds (including oxides such as lithium oxide, halides, and carbonates such as lithium carbonate and cesium carbonate), alkaline earth metal compounds (including oxides, halides, and carbonates), or rare earth metal compounds (including oxides, halides, and carbonates)).

[0250] Furthermore, if the electron injection buffer layer 199 is formed by including an electron-transporting substance and a donor substance, the donor substance can include alkali metals, alkaline earth metals, rare earth metals, and compounds thereof (alkali metal compounds (including oxides such as lithium oxide, halides, and carbonates such as lithium carbonate and cesium carbonate), alkaline earth metal compounds (including oxides, halides, and carbonates), or rare earth metal compounds (including oxides, halides, and carbonates)), as well as organic compounds such as tetratianaphthalene (abbreviated as TTN), nickerosene, and decamethylnickerosene. The electron-transporting substance can be formed using the same materials as those used to constitute the electron transport layer 194 described earlier.

[0251] As the material for forming the second electrode 182, metals, alloys, electrically conductive compounds, and mixtures thereof with a small work function (specifically, 3.8 eV or less) can be used. Specific examples of such cathode materials include alkali metals such as lithium (Li) and cesium (Cs), elements belonging to Group 1 or Group 2 of the periodic table such as magnesium (Mg), calcium (Ca), and strontium (Sr), and alloys containing these (MgAg, AlLi), rare earth metals such as europium (Eu) and ytterbium (Yb), and alloys containing these. However, by providing an electron injection layer between the second electrode 182 and the electron transport layer, various conductive materials such as Al, Ag, ITO, indium tin oxide containing silicon or silicon oxide, etc. can be used as the second electrode 182 regardless of the work function. These conductive materials can be formed into a film using dry methods such as vacuum evaporation or sputtering, inkjet methods, spin coating methods, etc. Also, it may be formed by a wet method using the sol-gel method, or may be formed by a wet method using a paste of a metal material.

[0252] In addition, as a method for forming the EL layer 183, various methods can be used regardless of dry or wet methods. For example, vacuum evaporation, gravure printing, offset printing, screen printing, inkjet methods, or spin coating methods may be used.

[0253] Also, the above-described respective electrodes or respective layers may be formed using different film-forming methods.

[0254] Note that the configuration of the layer provided between the first electrode 181 and the second electrode 182 is not limited to the above. However, a configuration in which a light-emitting region where holes and electrons recombine is provided at a site away from the first electrode 181 and the second electrode 182 is preferable so as to suppress quenching caused by the proximity of the light-emitting region and the metal used for the electrode or the carrier injection layer.

[0255] Furthermore, the hole transport layer and electron transport layer in contact with the light-emitting layer 193, and especially the carrier transport layer near the recombination region in the light-emitting layer 193, are preferably composed of a material whose band gap is larger than that of the light-emitting material constituting the light-emitting layer or the light-emitting material contained in the light-emitting layer, in order to suppress energy transfer from excitons generated in the light-emitting layer.

[0256] When the light-emitting device is a top-emission type light-emitting element, it is preferable to form the first electrode 181 using a conductive material that efficiently reflects the light emitted by the EL layer 183, and the second electrode 182 using a conductive material that transmits visible light. The structure of the first electrode 181 is not limited to a single layer, but may be a multi-layered structure. For example, when the first electrode 181 is used as an anode, the layer in contact with the EL layer 183 may be a translucent layer such as indium tin oxide, and a highly reflective layer (aluminum, an aluminum-containing alloy, or silver, etc.) may be provided in contact with that layer.

[0257] As conductive materials that reflect visible light, for example, metallic materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or alloys containing these metallic materials, can be used. Lanthanum, neodymium, or germanium may also be added to the above metallic materials and / or alloys. Furthermore, alloys containing aluminum (aluminum alloys) such as aluminum-titanium alloys, aluminum-nickel alloys, and aluminum-neodymium alloys, as well as silver-containing alloys such as silver-copper alloys, silver-palladium-copper alloys, and silver-magnesium alloys, can be used to form the film. Alloys containing silver and copper are preferred because of their high heat resistance. In addition, a metal film or alloy film and a metal oxide film may be laminated. For example, by laminating a metal film or metal oxide film so that it is in contact with an aluminum alloy film, oxidation of the aluminum alloy film can be suppressed. Other examples of metal films and metal oxide films include titanium and titanium oxide. Furthermore, as described above, a light-transmitting conductive film and a film made of a metallic material may be laminated. For example, a multilayer film of silver and indium tin oxide, or a multilayer film of a silver-magnesium alloy and indium tin oxide (ITO) can be used.

[0258] Furthermore, when the light-emitting device is a bottom-emission structure (bottom-exjection structure) light-emitting element, a conductive material that transmits visible light may be used for the first electrode 181 and a conductive material that reflects visible light may be used for the second electrode 182. Alternatively, when the light-emitting device is a dual-emission structure (double-sided injection structure) display device, a conductive material that transmits visible light may be used for both the first electrode 181 and the second electrode 182.

[0259] Next, an embodiment of a light-emitting device (also called a stacked element or tandem element) with a configuration in which multiple light-emitting units are stacked will be described with reference to Figure 14C. This light-emitting device has multiple light-emitting units between the anode and the cathode. Each light-emitting unit has a configuration almost identical to the EL layer 183 shown in Figure 14A. In other words, the light-emitting device shown in Figure 14C is a light-emitting device with multiple light-emitting units, while the light-emitting device shown in Figure 14A or Figure 14B is a light-emitting device with one light-emitting unit.

[0260] In Figure 14C, a first light-emitting unit 511 and a second light-emitting unit 512 are stacked between the anode 501 and the cathode 502, and a charge generation layer 513 is provided between the first light-emitting unit 511 and the second light-emitting unit 512. The anode 501 and the cathode 502 correspond to the first electrode 181 and the second electrode 182 in Figure 14A, respectively, and the same components as described in the explanation of Figure 14A can be applied. Furthermore, the first light-emitting unit 511 and the second light-emitting unit 512 may have the same configuration or different configurations.

[0261] The charge generation layer 513 has the function of injecting electrons into one light-emitting unit and holes into the other light-emitting unit when a voltage is applied to the anode 501 and cathode 502. That is, in Figure 14C, when a voltage is applied such that the potential of the anode is higher than the potential of the cathode, the charge generation layer 513 only needs to inject electrons into the first light-emitting unit 511 and holes into the second light-emitting unit 512.

[0262] The charge generation layer 513 is preferably formed with the same configuration as the charge generation layer 196 described in Figure 14B. The composite material of organic compound and metal oxide has excellent carrier implantation and carrier transport properties, enabling low-voltage and low-current operation. If the anode side of the light-emitting unit is in contact with the charge generation layer 513, the charge generation layer 513 can also act as a hole injection layer for the light-emitting unit, so the light-emitting unit does not need to have a hole injection layer.

[0263] Furthermore, when an electron injection buffer layer 199 is provided in the charge generation layer 513, the electron injection buffer layer 199 plays the role of an electron injection layer in the anode-side light-emitting unit, so it is not necessarily required to form an electron injection layer in the anode-side light-emitting unit.

[0264] Figure 14C illustrates a light-emitting device having two light-emitting units, but the same principles can be applied to light-emitting devices with three or more stacked light-emitting units. As in the light-emitting device according to this embodiment, by arranging multiple light-emitting units separated between a pair of electrodes by a charge generation layer 513, high-brightness light emission can be achieved while maintaining a low current density, and a longer-life element can be realized. Furthermore, a light-emitting device that can be driven at a low voltage and consumes little power can be realized.

[0265] Furthermore, by making the light-emitting colors of each light-emitting unit different, it is possible to obtain a desired color of light emission from the entire light-emitting device. For example, in a light-emitting device having two light-emitting units, it is possible to obtain a light-emitting device that emits white light as a whole by obtaining red and green light-emitting colors from the first light-emitting unit and blue light-emitting color from the second light-emitting unit.

[0266] Furthermore, each layer, such as the EL layer 183, the first light-emitting unit 511, the second light-emitting unit 512, and the charge generation layer, as well as the electrodes, can be formed using methods such as vapor deposition (including vacuum deposition), droplet ejection (also known as inkjet printing), coating, and gravure printing. They may also contain low-molecular-weight materials, medium-molecular-weight materials (including oligomers and dendrimers), or polymer materials.

[0267] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

[0268] (Embodiment 3) This embodiment describes electronic equipment to which a display device according to one aspect of the present invention can be applied.

[0269] A display device according to one aspect of the present invention can be applied to the display unit of an electronic device. Therefore, it is possible to realize an electronic device with high display quality, or an extremely high-definition electronic device, or a highly reliable electronic device.

[0270] Electronic devices using a display device according to one aspect of the present invention include televisions, monitors and other display devices, lighting devices, desktop or notebook personal computers, word processors, and DVDs (Digital Versatile). Examples include image playback devices that play still images or videos stored on recording media such as discs, portable CD players, radios, tape recorders, headphone stereos, stereos, desk clocks, wall clocks, cordless telephone handsets, transceivers, car phones, mobile phones, personal digital assistants, tablet devices, portable game consoles, fixed game machines such as pachinko machines, calculators, electronic organizers, e-book readers, electronic translators, voice input devices, video cameras, digital still cameras, electric shavers, high-frequency heating devices such as microwave ovens, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, electric fans, hair dryers, air conditioning equipment such as air conditioners, humidifiers, and dehumidifiers, dishwashers, dish dryers, clothes dryers, futon dryers, electric refrigerators, electric freezers, electric refrigerator-freezers, DNA storage freezers, flashlights, tools such as chainsaws, smoke detectors, and medical equipment such as dialysis machines. Furthermore, industrial equipment such as guide lights, traffic lights, conveyor belts, elevators, escalators, industrial robots, power storage systems, and energy storage devices for power leveling and smart grids can also be included in the category of electronic equipment. In addition, mobile devices propelled by engines using fuel or electric motors using electricity from energy storage devices may also be included in the category of electronic equipment. Examples of such mobile devices include electric vehicles (EVs), hybrid vehicles (HVs) that combine internal combustion engines and electric motors, plug-in hybrid vehicles (PHVs), tracked vehicles in which the tires and wheels of these vehicles are replaced with tracks, motorized bicycles including electric assist bicycles, motorcycles, electric wheelchairs, golf carts, small or large vessels, submarines, helicopters, aircraft, rockets, artificial satellites, space probes, planetary probes, and spacecraft.

[0271] An electronic device according to an aspect of the present invention may have a secondary battery (battery), and it is preferable that the secondary battery can be charged using non-contact power transmission.

[0272] Examples of the secondary battery include a lithium-ion secondary battery, a nickel-metal hydride battery, a nickel-cadmium battery, an organic radical battery, a lead storage battery, an air secondary battery, a nickel-zinc battery, a silver-zinc battery, and the like.

[0273] An electronic device according to an aspect of the present invention may have an antenna. By receiving a signal with the antenna, the display unit can display images, information, and the like. Further, when the electronic device has an antenna and a secondary battery, the antenna may be used for non-contact power transmission.

[0274] An electronic device according to an aspect of the present invention may have a sensor (including a function of measuring force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays).

[0275] An electronic device according to an aspect of the present invention can have various functions. For example, it can have a function of displaying various information (such as still images, moving images, text images, etc.) on a display unit, a touch panel function, a function of displaying a calendar, date, or time, a function of executing various software (programs), a wireless communication function, a function of reading a program or data recorded on a recording medium, and the like.

[0276] Furthermore, electronic devices having multiple display units may have functions such as primarily displaying image information on one display unit and primarily displaying text information on another display unit, or displaying three-dimensional images by displaying images that take parallax into account on multiple display units. Furthermore, electronic devices having an image receiving unit may have functions such as capturing still images or moving images, automatically or manually correcting captured images, saving captured images to a recording medium (external or built into the electronic device), and displaying captured images on a display unit. It should be noted that the functions of an electronic device according to one aspect of the present invention are not limited to these, and it may have a variety of functions.

[0277] A display device according to one aspect of the present invention can be suitably used in portable electronic devices, wearable electronic devices, and e-book terminals. It can also be suitably used in VR (Virtual Reality) devices, AR (Augmented Reality) devices, and the like.

[0278] Figure 15A shows a perspective view of a spectacle-type electronic device 700. The electronic device 700 includes a pair of display panels 701, a pair of housings 702, a pair of optical members 703, a pair of mounting parts 704, and the like.

[0279] The electronic device 700 can project an image displayed on the display panel 701 onto the display area 706 of the optical element 703. Furthermore, because the optical element 703 is translucent, the user can view the image displayed on the display area 706 superimposed on the transmitted image seen through the optical element 703. Therefore, the electronic device 700 is an electronic device capable of AR display.

[0280] Furthermore, one of the housings 702 is equipped with a camera 705 capable of capturing images of the area in front. Although not shown, one of the housings 702 is also equipped with a wireless receiver or a connector to which a cable can be connected, allowing video signals and the like to be supplied to the housing 702. Additionally, by equipping the housing 702 with an acceleration sensor such as a gyro sensor, the orientation of the user's head can be detected and an image corresponding to that orientation can be displayed in the display area 706. Furthermore, it is preferable that the housing 702 is equipped with a battery 707, in which case it can be charged wirelessly or via a wired connection.

[0281] Next, using Figure 15B, the method for projecting an image onto the display area 706 of the electronic device 700 will be explained. Inside the housing 702, a display panel 701, a lens 711, and a reflector 712 are provided. In addition, the portion of the optical element 703 corresponding to the display area 706 has a reflective surface 713 that functions as a half-mirror.

[0282] Light 715 emitted from the display panel 701 passes through the lens 711 and is reflected towards the optical element 703 by the reflector 712. Inside the optical element 703, the light 715 undergoes total internal reflection repeatedly at the end face of the optical element 703 and reaches the reflective surface 713, thereby projecting an image onto the reflective surface 713. As a result, the user can see both the light 715 reflected by the reflective surface 713 and the transmitted light 716 that has passed through the optical element 703 (including the reflective surface 713).

[0283] Figure 15 shows an example where the reflector 712 and the reflective surface 713 each have curved surfaces. This increases the degree of freedom in optical design and allows the optical component 703 to be made thinner compared to when they are flat. However, the reflector 712 and the reflective surface 713 may also be flat.

[0284] As the reflector 712, a material having a mirror surface can be used, and it is preferable that it has a high reflectivity. Also, as the reflective surface 713, a half-mirror that utilizes the reflection of a metal film may be used, but using a prism that utilizes total internal reflection can increase the transmittance of the transmitted light 716.

[0285] Here, it is preferable that the housing 702 has a mechanism for adjusting the distance between the lens 711 and the display panel 701, or the angle between them. This makes it possible to adjust the focus, enlarge or reduce the image, etc. For example, one or both of the lens 711 or the display panel 701 may be configured to move in the optical axis direction.

[0286] Furthermore, it is preferable that the housing 702 has a mechanism that allows the angle of the reflector 712 to be adjusted. By changing the angle of the reflector 712, the position of the display area 706 on which the image is displayed can be changed. This makes it possible to position the display area 706 in an optimal position according to the user's eye position.

[0287] A display device according to one embodiment of the present invention can be applied to the display panel 701. Therefore, an electronic device 700 with high display quality can be obtained.

[0288] Figures 16A and 16B show perspective views of the goggle-type electronic device 750. Figure 16A is a perspective view showing the front, top, and left side of the electronic device 750, while Figure 16B is a perspective view showing the rear, bottom, and right side of the electronic device 750.

[0289] The electronic device 750 includes a pair of display panels 751, a housing 752, a pair of mounting parts 754, a cushioning member 755, a pair of lenses 756, and the like. The pair of display panels 751 are each provided inside the housing 752 in a position where they can be seen through the lenses 756.

[0290] The electronic device 750 is an electronic device for VR. When a user wears the electronic device 750, they can view the image displayed on the display panel 751 through the lens 756. Furthermore, by displaying different images on a pair of display panels 751, a three-dimensional display using parallax can also be performed.

[0291] Furthermore, an input terminal 757 and an output terminal 758 are provided on the rear side of the housing 752. A cable can be connected to the input terminal 757 to supply video signals from a video output device or other device, or to supply power for charging a battery located inside the housing 752. The output terminal 758 functions, for example, as an audio output terminal, and earphones, headphones, etc., can be connected to it. However, if the system is configured to output audio data via wireless communication, or if audio is output from an external video output device, the audio output terminal does not need to be provided.

[0292] Furthermore, it is preferable that the housing 752 has a mechanism that allows adjustment of the left and right positions of the lens 756 and the display panel 751 so that they are in the optimal position according to the user's eye position. It is also preferable that the housing 752 has a mechanism that adjusts the focus by changing the distance between the lens 756 and the display panel 751.

[0293] A display device according to one aspect of the present invention can be applied to the display panel 751. Therefore, an electronic device 750 with high display quality can be obtained. This allows the user to experience a high level of immersion.

[0294] The cushioning member 755 is the part that comes into contact with the user's face (forehead, cheeks, etc.). By ensuring that the cushioning member 755 is in close contact with the user's face, light leakage can be prevented, thereby enhancing the sense of immersion. It is preferable to use a soft material for the cushioning member 755 so that it comes into close contact with the user's face when the user wears the electronic device 750. For example, materials such as rubber, silicone rubber, urethane, and sponge can be used. Furthermore, if the surface of a sponge or similar material is covered with cloth, leather (genuine leather or synthetic leather), gaps are less likely to form between the user's face and the cushioning member 755, effectively preventing light leakage. In addition, using such materials is preferable because it feels good against the skin and does not make the user feel cold when worn in cold seasons. It is preferable that the components that come into contact with the user's skin, such as the cushioning member 755 or the mounting part 754, be removable, as this makes cleaning or replacement easier.

[0295] Figure 16C shows the external appearance of the camera 830 with the viewfinder 840 attached.

[0296] The camera 830 includes a housing 831, a display unit 832, operation buttons 833, a shutter button 834, and the like. The camera 830 also has a detachable lens 836 attached to it.

[0297] Here, the camera 830 is configured so that the lens 836 can be removed from the housing 831 and replaced, but the lens 836 and the housing could also be integrated.

[0298] The camera 830 can take an image by pressing the shutter button 834. Additionally, the display unit 832 functions as a touch panel, and images can also be taken by touching the display unit 832.

[0299] The camera body 831 of the camera 830 has a mount with electrodes, and in addition to the viewfinder 840, a strobe device and the like can be connected to it.

[0300] The viewfinder 840 includes a housing 841, a display unit 842, buttons 843, etc.

[0301] The housing 841 has a mount that engages with the mount of the camera 830, allowing the viewfinder 840 to be attached to the camera 830. The mount also has electrodes, which allow images and other data received from the camera 830 to be displayed on the display unit 842.

[0302] Button 843 functions as a power button. Button 843 can be used to switch the display on and off of the display unit 842.

[0303] A display device according to one aspect of the present invention can be applied to the display unit 832 of the camera 830 and the display unit 842 of the viewfinder 840.

[0304] In Figure 16C, the camera 830 and the viewfinder 840 are shown as separate electronic devices and are configured to be detachable. However, the camera 830's housing 831 may also have a viewfinder equipped with a display device according to one aspect of the present invention built into it.

[0305] Figure 16D shows an example of a wristwatch-type information terminal. The information terminal 860 includes a housing 861, a display unit 862, a band 863, a buckle 864, an operation switch 865, input / output terminals 866, etc. The information terminal 860 also has an antenna and battery inside the housing 861. The information terminal 860 can run various applications such as mobile phone calls, email, document viewing and creation, music playback, internet communication, and computer games.

[0306] Furthermore, the display unit 862 is equipped with a touch sensor and can be operated by touching the screen with a finger or stylus. For example, an application can be launched by touching the icon 867 displayed on the display unit 862. The operation switch 865 can have various functions, including setting the time, turning the power on and off, turning wireless communication on and off, activating and deactivating silent mode, and activating and deactivating power saving mode. For example, the functions of the operation switch 865 can also be configured by the operating system built into the information terminal 860.

[0307] Furthermore, the information terminal 860 is capable of performing standardized short-range wireless communication. For example, it can communicate with a wireless communication-enabled headset to make hands-free calls. The information terminal 860 is also equipped with an input / output terminal 866, which can be used to send and receive data with other information terminals. It can also be charged via the input / output terminal 866. Note that charging may be performed by wireless power supply without using the input / output terminal 866.

[0308] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments. [Explanation of symbols]

[0309] 100: Display device, 101: Substrate, 102: Drive circuit, 103: Wiring group, 104: Display unit, 105: Substrate, 106: Input / output terminal unit, 111: Support substrate, 113: Memory device, 114: GPU, 115: CPU, 120: Semiconductor chip, 121: Si substrate, 122: BOX layer, 123: Transistor, 124: Insulating layer, 125: Insulating layer

Claims

1. A display device comprising a substrate, a display unit, a peripheral circuit unit for driving the display unit, a first insulating layer, wiring, and a second insulating layer, The first insulating layer is arranged on the substrate so as to surround the peripheral circuit portion and not overlap with the peripheral circuit portion. The aforementioned wiring is arranged on the peripheral circuit section, The second insulating layer is arranged on the peripheral circuit section and the first insulating layer, and is arranged so as not to overlap with the wiring. The display unit and the peripheral circuit unit have overlapping regions. The display unit has a plurality of pixels arranged in a matrix, The aforementioned peripheral circuit section includes a first transistor and The aforementioned pixel has a second transistor, The composition of the first semiconductor layer contained in the first transistor is different from the composition of the second semiconductor layer contained in the second transistor. The first semiconductor layer has silicon, The aforementioned second semiconductor layer has an oxide semiconductor, The peripheral circuit section includes a scanning line drive circuit and a signal line drive circuit, respectively, in the display device.

2. In claim 1, Each of the aforementioned plurality of pixels has the function of emitting light, The aforementioned light is emitted in a direction in which the peripheral circuit section is not formed.

3. In claim 1 or claim 2, The aforementioned pixel is a display device including an EL element.

4. In any one of claims 1 to 3, The first semiconductor layer is a display device comprising a single-crystal semiconductor or a polycrystalline semiconductor.

5. In any one of claims 1 to 4, The display device comprises the second semiconductor layer containing at least one of indium or zinc.

6. A display device according to any one of claims 1 to 5, An electronic device including an optical component and a battery.