Anti-interference circuit and system

Abstract

The present application relates to the technical field of communications. Provided are an anti-interference circuit and system. The circuit comprises a signal transmitting circuit, a signal receiving circuit and a switch circuit, wherein the switch circuit is connected to the signal transmitting circuit and the signal receiving circuit; and the switch circuit is used for, if a transmitted signal has been detected by the signal transmitting circuit, determining to control the signal receiving circuit to not work, and if no transmitted signal has been detected by the signal transmitting circuit, determining to control the signal receiving circuit to work. In the anti-interference circuit, after the signal transmitting circuit works, a signal receiving circuit may be controlled to stop working, such that electromagnetic interference with a received signal caused by a transmitted signal is prevented.

Description

Anti-interference circuit and system Technical Field

[0001] The present application relates to the field of communication technology, and in particular to an anti-interference circuit and system. Background Art

[0002] With the continuous development of satellite communication technology, more and more countries are committed to building comprehensive satellite navigation systems. Satellite communications are free and open to users, and can provide high-quality navigation, positioning, global and regional short message communications, international search and rescue, satellite-based augmentation, ground-based augmentation, and precise point positioning services. However, satellite signals are susceptible to interference from other electromagnetic sources during transmission, which can lead to inaccuracy or even failure of satellite communications. This is also known as electromagnetic interference. Therefore, addressing electromagnetic interference is crucial to ensuring the reliability and stability of satellite navigation systems.

[0003] Currently, there are two main methods for suppressing electromagnetic interference that are widely used: filter-based suppression methods and antenna-based suppression methods. Among them, the filter-based suppression method mainly isolates external electromagnetic interference and reduces transmission channel crosstalk by building a shielded cavity structure of multiple discrete transceiver channels and a stripline wiring of a multi-layer printed circuit board (PCB) press-fit structure, thereby achieving a narrowband anti-interference design. However, the filters required for this method are expensive, and the volume requirements and manufacturing process requirements for the circuit are very high. It is not suitable for small-volume application scenarios and is not conducive to large-scale promotion and application. The antenna-based suppression method mainly minimizes the coupling coefficient between antennas by adopting an antenna structure and antenna position layout with the highest isolation, but this method has limited ability to reduce the isolation between the two frequency bands.

[0004] Summary of the Invention

[0005] The present application provides an anti-interference circuit and system to avoid electromagnetic interference.

[0006] In a first aspect, the present application provides an anti-interference circuit, comprising: a signal transmitting circuit, a signal receiving circuit, and a switching circuit; the switching circuit is connected to the signal transmitting circuit and the signal receiving circuit respectively; the switching circuit is used to determine that the control signal receiving circuit is not working if the signal transmitting circuit detects the transmitting signal, and to determine that the control signal receiving circuit is working if the signal transmitting circuit does not detect the transmitting signal.

[0007] In this application, the anti-interference circuit is based on the control of the switching circuit, so that when the signal transmitting circuit transmits the signal, the signal receiving circuit stops receiving the signal to avoid the received signal from being subjected to electromagnetic interference from the transmitted signal, which can improve the signal quality, enhance the stability of the received signal, and improve the stability and reliability of communication.

[0008] In an optional manner, the switching circuit includes: a logic control circuit and a voltage output circuit; the logic control circuit is used to receive the detection signal of the signal transmitting circuit and convert it into a control voltage; the voltage output circuit is used to receive the control voltage and output it to the signal receiving circuit.

[0009] The switching circuit is composed of a logic control circuit and a voltage output circuit. The logic control circuit converts the detection signal from the signal transmission circuit into a control voltage. The voltage output circuit receives the control voltage and outputs it to the signal receiving circuit. Depending on whether a transmission signal is present, the switching circuit outputs a corresponding control voltage to the signal receiving circuit, controlling whether the signal receiving circuit receives the signal. This approach improves the reliability of satellite communications.

[0010] In an optional manner, if the detection signal indicates that the signal transmitting circuit detects the transmitting signal and outputs a high-level voltage, the logic control circuit is a NOT gate control circuit, and the control voltage is a low level; the voltage output circuit is composed of a low dropout regulator (LDO); the input end of the NOT gate control circuit is connected to the signal transmitting circuit, the output end of the NOT gate control circuit is connected to the control end of the LDO, the input end of the LDO is connected to the power supply, and the output end of the LDO is connected to the signal receiving circuit.

[0011] The above circuit shows a working mode of a switch circuit, which realizes the operation of the switch circuit through the NOT gate control circuit, LDO and high and low level conversion, and controls whether the receiving circuit receives the receiving signal through the switch circuit.

[0012] In an optional manner, the signal transmitting circuit includes: a first filter, a power divider, a detector, a power amplifier, a second filter, and a signal transmitting antenna; the input end of the first filter is connected to the signal port, the output end of the first filter is connected to the input end of the power divider, the output end of the power divider is connected to the input end of the detector and the input end of the power amplifier, the output end of the detector is connected to the control end of the power amplifier, the output end of the detector is also connected to the input end of the switching circuit, the output end of the power amplifier is connected to the input end of the second filter, and the output end of the second filter is connected to the signal transmitting antenna.

[0013] In the above circuit, a signal transmission circuit is formed by a filter, a power divider, a detector, a power amplifier, and a signal transmission antenna. This signal transmission circuit can transmit signals to perform satellite communications.

[0014] In an optional embodiment, the signal receiving circuit includes: a signal receiving antenna, a third filter, a low-noise amplifier, and a fourth filter; the input end of the third filter is connected to the signal receiving antenna, the output end of the third filter is connected to the input end of the low-noise amplifier, the control end of the low-noise amplifier is connected to the output end of the switching circuit, the output end of the low-noise amplifier is connected to the input end of the fourth filter, and the output end of the fourth filter is connected to the signal port.

[0015] In the above circuit, a signal receiving circuit is formed by a signal receiving antenna, a filter, and a low-noise amplifier. This circuit can receive signals for satellite communication.

[0016] In an optional manner, the transmitted signal is a satellite radio determination satellite service (RDSS) short message communication signal Tx; and the received signal is a satellite radio navigation satellite system (RNSS) signal B1I or B1C.

[0017] In the above circuit, a transmission signal RDSS Tx that may be transmitted by the signal transmission circuit is given, and two reception signals RNSS B1I or RNSS B1C that may be received by the signal reception circuit are given.

[0018] In the second aspect, the present application provides an anti-interference system, including a signal port, a power supply and an anti-interference circuit; one end of the anti-interference circuit is connected to the power supply, and the other end is connected to the signal port; the power supply is used to provide voltage to the anti-interference circuit; the signal port is used to provide a combined signal to the anti-interference circuit.

[0019] In this application, the two ends of the anti-interference circuit in the anti-interference system are respectively connected to the power supply and the signal port, the signal port is used to provide the anti-interference circuit with a combined signal, and the power supply is used to provide the anti-interference circuit with a voltage.

[0020] These and other aspects of the present application will become more readily apparent from the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] FIG1 is a schematic structural diagram of an anti-interference circuit provided in an embodiment of the present application;

[0023] FIG2 is an envelope diagram of an RDSS Tx signal provided in an embodiment of the present application;

[0024] FIG3 is a circuit diagram of an anti-interference circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0025] To make the objectives, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0026] In the following embodiments of the present application, "and / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " is generally used to indicate that the objects associated with each other are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple. The singular expressions "a", "an", "said", "above", "the" and "this" are intended to also include expressions such as "one or more", unless there is a clear indication to the contrary in the context. And, unless otherwise indicated, the ordinal numbers "first" and "second" mentioned in the embodiments of the present application are used to distinguish multiple objects and are not used to limit the order, timing, priority or importance of multiple objects.

[0027] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0028] Referring to FIG1 , the anti-interference circuit of the present application is described. The anti-interference circuit includes a signal transmitting circuit 101, a switching circuit 102, and a signal receiving circuit 103. The switching circuit 102 is connected to the signal transmitting circuit 101 and the signal receiving circuit 103, respectively. The anti-interference circuit can be provided in an access network device, such as a base station or access point, and is not specifically limited in this application.

[0029] The signal transmitting circuit 101 is used to transmit signals; if the signal transmitting circuit 101 detects the transmission signal, the switch circuit 102 determines that the control signal receiving circuit 103 does not work; if the signal transmitting circuit 101 does not detect the transmission signal, the switch circuit 102 determines that the control signal receiving circuit 103 works; the signal receiving circuit 103 is used to receive signals.

[0030] Among them, the signal transmitting circuit 101 and the signal receiving circuit 103 can be used for satellite communication, and can also be used for other types of communication. Satellite communication is taken as an example here to illustrate. Typical satellite communication services include RDSS and RNSS. Of course, in actual applications, other services may also be included, which are not specifically limited here.

[0031] In this application, the anti-interference circuit is based on the control of the switching circuit, so that when the signal transmitting circuit transmits the signal, the signal receiving circuit stops receiving the signal to avoid the received signal from being subjected to electromagnetic interference from the transmitted signal, which can improve the signal quality, enhance the stability of the received signal, and improve the stability and reliability of communication.

[0032] Specifically, RDSS is a satellite radiodetermination service implemented through the support and cooperation of user devices and external systems. User devices receive satellite signals to obtain positioning and navigation information, while external systems receive and process data transmitted by the RDSS system to provide users with corresponding services and functions. When a user initiates a positioning request, a report is sent to the external system, achieving both positioning and communication.

[0033] Specifically, RNSS is a satellite wireless navigation service, which is characterized by calculating the user's current position by receiving signals from multiple satellites through user equipment.

[0034] When the above-mentioned anti-interference circuit is used for satellite communications, RDSS Tx can be transmitted through the signal transmission circuit, and RNSS B1I / B1C can be received through the signal receiving circuit. RDSS Tx is a high-power envelope signal with a certain bandwidth, commonly used for short message transmission. BeiDou-3 has enhanced the service functions and signal system of RDSS Tx. In BeiDou-3, RDSS Tx has four frequency bands: 1615.68 MHz (mega hertz, MHz), 1614.26 MHz, 1618.34 MHz, 1622.42 MHz, and 1624.524 MHz. Among them, regional short messages usually use the first three frequency bands, and global short messages usually use the last two frequency bands. In addition, B1I and B1C are two commonly used RNSS reception signals in the BeiDou satellite system. In the BeiDou satellite system, the frequency band of B1I is 1561.098 MHz, and the frequency band of B1C is 1575 MHz. It should be noted that since the frequency bands of the RDSS Tx signal and the RNSS B1I / B1C signal are closely spaced, when the RDSS Tx signal is transmitted, the received RNSS B1I / B1C signal will be subject to electromagnetic interference from the RDSS Tx signal, which may cause the satellite navigation receiving system signal carrier-to-noise ratio to deteriorate seriously or even cause loss of lock. However, the switching circuit of this application can avoid electromagnetic interference.

[0035] Figure 2 schematically illustrates an RDSS Tx signal envelope diagram, where the horizontal axis represents the signal frequency in MHz and the vertical axis represents the signal power in decibel milliwatts (dBm). This diagram depicts the envelope signal spectrum of the RDSS Tx frequency band, representing the power values ​​at different frequencies. It should be noted that in actual use, the transmitted signal in the signal transmission circuit is not specifically limited.

[0036] Among them, the signal transmission circuit 101 includes: a first filter, a power splitter, a detector, a power amplifier, a second filter, and a signal transmission antenna; the input end of the first filter is connected to the signal port, the output end of the first filter is connected to the input end of the power splitter, the output end of the power splitter is connected to the input end of the detector and the input end of the power amplifier, the output end of the detector is connected to the control end of the power amplifier, the output end of the detector is also connected to the input end of the switching circuit, the output end of the power amplifier is connected to the input end of the second filter, and the output end of the second filter is connected to the signal transmission antenna.

[0037] 101 of FIG3 exemplarily shows a signal transmission circuit provided for an embodiment of the present application. The signal transmission circuit includes an RDSS Tx surface acoustic wave filter (i.e., a first filter), an RDSS Tx power splitter (i.e., a power splitter), a detector, an RDSS Tx power amplifier (i.e., a power amplifier), an RDSS Tx dielectric filter (i.e., a second filter), and an RDSS Tx transmitting antenna (i.e., a signal transmitting antenna). It should be noted that the present application does not specifically limit the types of the above devices.

[0038] Among them, the input end of the RDSS Tx surface acoustic wave filter is connected to the signal port, the output end of the RDSS Tx surface acoustic wave filter is connected to the input end of the RDSS Tx power divider, the output end of the RDSS Tx power divider is connected to the input end of the detector and the input end of the RDSS Tx power amplifier, the output end of the detector is connected to the control end of the RDSS Tx power amplifier, the output end of the detector is also connected to the input end of the switching circuit 102, the output end of the RDSS Tx power amplifier is connected to the input end of the RDSS Tx dielectric filter, and the output end of the RDSS Tx dielectric filter is connected to the RDSS Tx signal transmitting antenna.

[0039] When RDSS communication is not required, the entire RDSS Tx signal transmission circuit is turned off to save energy. When RDSS communication is required, the signal port outputs the RDSS Tx envelope signal shown in Figure 2. The power value of the RDSS Tx signal at the center frequency is approximately in the range of -5 to 10dBm. At this time, the output RDSS Tx signal passes through the signal port, passes through the RDSS Tx surface acoustic wave filter, and enters the RDSS Tx power divider. The RDSS Tx power divider outputs the RDSS Tx signal to the detector, which converts the RDSS Tx signal into a fixed high-level voltage (such as +5.0V). The high-level voltage controls the RDSS Tx power amplifier circuit to turn on. The other RDSS Tx RF signal output by the RDSS Tx power divider is amplified by the RDSS Tx power amplifier, then optimized and noise-reduced by the RDSS Tx dielectric filter, and finally output to the RDSS Tx antenna for transmission.

[0040] Among them, the signal receiving circuit 103 includes: a signal receiving antenna, a third filter, a low-noise amplifier, and a fourth filter; the input end of the third filter is connected to the signal receiving antenna, the output end of the third filter is connected to the input end of the low-noise amplifier, the control end of the low-noise amplifier is connected to the output end of the switching circuit, the output end of the low-noise amplifier is connected to the input end of the fourth filter, and the output end of the fourth filter is connected to the signal port.

[0041] 103 of FIG. 3 exemplarily illustrates a signal receiving circuit provided for an embodiment of the present application. The signal receiving circuit includes an RNSS B1I / B1C receiving antenna (also known as a signal receiving antenna), an RNSS B1I / B1C dielectric filter (also known as a third filter), an RNSS B1I / B1C low-noise amplifier (also known as a low-noise amplifier), and an RNSS B1I / B1C surface acoustic wave filter (also known as a fourth filter). It should be noted that the present application does not specifically limit the types of the above devices.

[0042] The input end of the RNSS B1I / B1C dielectric filter is connected to the RNSS B1I / B1C receiving antenna, the output end of the RNSS B1I / B1C dielectric filter is connected to the input end of the RNSS B1I / B1C low-noise amplifier, the control end of the RNSS B1I / B1C low-noise amplifier is connected to the output end of the switch circuit 102, the output end of the RNSS B1I / B1C low-noise amplifier is connected to the input end of the RNSS B1I / B1C surface acoustic wave filter, and the output end of the RNSS B1I / B1C surface acoustic wave filter is connected to the signal port.

[0043] When RNSS communication is not required, the entire RDSS B1I / B1C signal receiving circuit is shut down to save energy. It should be noted that, in general, satellite communication equipment typically remains in signal reception mode for extended periods, with brief periods of signal transmission. When RNSS communication is required, the RNSS B1I / B1C receiving antenna receives the RNSS B1I / B1C signal. The RNSS B1I / B1C dielectric filter reduces interference and noise, optimizing signal quality. The signal then reaches the RNSS B1I / B1C low-noise amplifier (LNA), where it is amplified. Finally, the signal passes through the RNSS B1I / B1C surface acoustic wave (SAW) filter to filter out impurities before reaching the signal port, completing RNSS B1I / B1C signal reception.

[0044] The switch circuit 102 includes a logic control circuit and a voltage output circuit. The logic control circuit receives the detection signal from the signal transmitting circuit 101 and converts it into a control voltage. The voltage output circuit receives the control voltage and outputs it to the signal receiving circuit 103.

[0045] Among them, the input end of the logic control circuit is connected to the signal transmitting circuit 101, the output end of the logic control circuit is connected to the control end of the voltage output circuit, the input end of the voltage output circuit is connected to the power supply, and the output end of the voltage output circuit is connected to the signal receiving circuit 103.

[0046] 102 in FIG. 3 exemplarily illustrates a switching circuit provided for an embodiment of the present application. As shown in FIG. 3 , the switching circuit includes a NOT gate control circuit (i.e., a logic control circuit) and an LDO (i.e., a voltage output circuit). It should be noted that the present application does not specifically limit the types of the above devices.

[0047] The input end of the NOT gate control circuit is connected to the signal transmitting circuit 101 , the output end of the NOT gate control circuit is connected to the control end of the LDO, the input end of the LDO is connected to the power supply, and the output end of the LDO is connected to the signal receiving circuit 103 .

[0048] It should be noted that if the detection signal indicates that the signal transmission circuit has detected a transmission signal and outputs a high-level voltage, the logic control circuit is a NOT gate control circuit, and the control voltage is low. The voltage output circuit is composed of a low-dropout linear regulator (LDO). The input of the NOT gate control circuit is connected to the signal transmission circuit, and the output of the NOT gate control circuit is connected to the control terminal of the LDO. The input of the LDO is connected to a power supply, and the output of the LDO is connected to the signal receiving circuit. The above-mentioned switching circuit is composed of a logic control circuit and a voltage output circuit. The logic control circuit converts the detection signal from the signal transmission circuit into a control voltage based on the detection signal. The voltage output circuit receives the control voltage and outputs it to the signal receiving circuit. The switching circuit can output a corresponding control voltage to the signal receiving circuit based on the presence of a transmission signal to control whether the signal receiving circuit receives the signal. This method improves the reliability of satellite communications.

[0049] As can be seen from the circuit diagram of Figure 3, when the signal transmitting circuit 101 transmits the RDSS Tx signal, the RDSS Tx signal is input to the detector. At this time, the detector outputs a high-level voltage, which is synchronously led to the NOT gate control circuit. At this time, the control voltage output by the NOT gate control circuit is low. The output of the NOT gate control circuit is connected to the enable pin of the LDO (i.e., the control end of the LDO). When the control end of the LDO receives the low-level voltage, the LDO stops supplying power to the RNSS B1I / B1C low-noise amplifier in the signal receiving circuit 103. At this time, the B1I / B1C low-noise amplifier stops working, and the signal receiving circuit 103 stops receiving signals, thereby avoiding blocking and loss of lock of the signal receiving device caused by the RDSS Tx transmission moment. When the signal transmitting circuit 101 is not working, no RDSS Tx signal is input to the detector. At this time, the detector outputs a low-level voltage, which is input to the NOT gate control circuit. At this time, the control voltage output by the NOT gate control circuit is high. When the control end of the LDO receives the high-level voltage, the LDO operates normally to supply power to the RNSS B1I / B1C low-noise amplifier in the signal receiving circuit 103. At this time, the RNSS B1I / B1C low-noise amplifier operates normally, and the signal receiving circuit 103 operates normally to receive signals.

[0050] It should be noted that the aforementioned blocking refers to the situation where, due to strong external signal interference, the sensitivity of the signal receiving device decreases when receiving satellite signals, resulting in the signal receiving device being unable to receive signals normally. The aforementioned loss of lock refers to the phenomenon where the signal receiving device is unable to correctly track and capture satellite signals, resulting in signal reception interruption. Once the signal is lost, the signal receiving device needs to recapture the satellite signal, which takes a long time to recover. If the satellite signal cannot be recaptured before the next RDSS Tx signal is transmitted, the signal receiving device will once again be interfered with by the transmitted signal, resulting in the signal receiving device being unable to receive satellite signals.

[0051] It should be noted that the NOT gate control circuit and LDO in the above embodiments are examples. In actual use, there is no specific limitation on the specific design of the logic control circuit and the voltage output circuit. For the logic control circuit, for example, a detector that outputs a low level after detecting the transmission signal is used. The signal transmission circuit transmits a signal, the detector outputs a low level voltage, and the detector is directly connected to the control end of the LDO. After receiving the low level voltage, the LDO stops supplying power to the RNSS B1I / B1C low noise amplifier, and the signal receiving circuit stops receiving the signal; when the signal transmission circuit is not working, the detector outputs a high level voltage, and after receiving the high level voltage, the LDO control end supplies power to the RNSS B1I / B1C low noise amplifier, and the signal receiving circuit receives the signal normally. This switching circuit can also achieve the technical effect of controlling whether the signal receiving circuit receives the signal according to whether the signal transmission circuit transmits the signal. For the voltage output circuit, for example, a PIN diode (a diode composed of a thin layer of low-doped intrinsic semiconductor between a P semiconductor and an N semiconductor material, usually including a PIN photodiode and a PIN switch diode) can be used. The signal transmitting circuit transmits a signal, the detector outputs a high-level voltage, the NOT gate control circuit receives the high-level voltage, the NOT gate control circuit outputs a low-level voltage, and the PIN diode cuts off the voltage. At this time, the RNSS B1I / B1C low-noise amplifier is turned off, and the signal receiving circuit stops receiving signals; when the signal transmitting circuit is not working, the detector outputs a low-level voltage, the PIN diode is turned on, the RNSS B1I / B1C signal is transmitted normally, and the signal receiving circuit receives the signal normally. This switching circuit can achieve the same technical effect.

[0052] It's important to note that the switching time between the NOT gate control circuit and the LDO output level is only in the nanosecond (ns) range. This means the transition time from the LDO outputting voltage to the RNSS B1I / B1C low-noise amplifier stopping voltage is in the nanosecond range, essentially synchronizing the switching times of the LDO and power amplifier. Furthermore, each RDSS Tx signal transmission lasts tens to hundreds of milliseconds (ms) in the time domain. Therefore, the RNSS B1I / B1C low-noise amplifier must be idle for only milliseconds. While the signal receiving circuitry stops receiving during signal transmission, it only lasts for milliseconds, meaning the receiving device reacquires the signal instantly. This millisecond-level interruption in signal reception is negligible compared to blocking and loss of lock caused by electromagnetic interference. Therefore, the solution of the present application uses a detector to convert the input RDSS Tx signal into a radio frequency signal and a high-level voltage signal, thereby controlling the normal operation or shutdown of the RNSS B1I / B1C signal receiving channel by using whether the RDSS Tx signal is transmitted, ensuring the staggered working time of the RDSS Tx signal frequency band and the RNSS B1I / B1C signal frequency band, and realizing complete isolation of the signal transmitting circuit and the signal receiving circuit.

[0053] The present application also provides an anti-interference system, including a signal port, a power supply, and an anti-interference circuit. The anti-interference circuit is connected to the power supply at one end and to the signal port at the other end. The power supply is configured to provide a voltage to the anti-interference circuit. The signal port is configured to provide a combined signal to the anti-interference circuit. The present application will not further describe the anti-interference circuit in detail.

[0054] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0055] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each flow and / or box in the flow chart and / or block diagram, as well as the combination of the flow chart and / or box in the flow chart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for implementing the functions specified in one or more flow charts and / or one or more boxes in the block diagram.

[0056] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0057] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0058] Obviously, those skilled in the art may make various modifications and variations to this application without departing from the scope of protection of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. An anti-interference circuit, characterized in that: include: A signal transmitting circuit, a signal receiving circuit and a switching circuit; The switch circuit is connected to the signal transmitting circuit and the signal receiving circuit respectively; The switch circuit is used to determine that the signal receiving circuit is not operated if the signal transmitting circuit detects the transmitting signal, and to determine that the signal receiving circuit is operated if the signal transmitting circuit does not detect the transmitting signal.

2. The circuit according to claim 1, characterized in that The switch circuit includes: a logic control circuit and a voltage output circuit; The logic control circuit is used to receive the detection signal of the signal transmitting circuit and convert it into a control voltage; The voltage output circuit is used for receiving the control voltage and outputting it to the signal receiving circuit.

3. The circuit according to claim 2, characterized in that If the detection signal indicates that the signal transmission circuit detects the transmission signal and outputs a high-level voltage, the logic control circuit is a NOT gate control circuit, and the control voltage is a low-level voltage; the voltage output circuit is composed of a low-dropout linear regulator LDO; The input end of the NOT gate control circuit is connected to the signal transmitting circuit, the output end of the NOT gate control circuit is connected to the control end of the LDO, the input end of the LDO is connected to a power supply, and the output end of the LDO is connected to the signal receiving circuit.

4. The circuit according to any one of claims 1 to 3, characterized in that: The signal transmission circuit includes: a first filter, a power divider, a detector, a power amplifier, a second filter, and a signal transmission antenna; The input end of the first filter is connected to the signal port, the output end of the first filter is connected to the input end of the power divider, the output end of the power divider is connected to the input end of the detector and the input end of the power amplifier, the output end of the detector is connected to the control end of the power amplifier, the output end of the detector is also connected to the input end of the switching circuit, the output end of the power amplifier is connected to the input end of the second filter, and the output end of the second filter is connected to the signal transmitting antenna.

5. The circuit according to claim 4, characterized in that The signal receiving circuit comprises: a signal receiving antenna, a third filter, a low noise amplifier, and a fourth filter; The input end of the third filter is connected to the signal receiving antenna, the output end of the third filter is connected to the input end of the low noise amplifier, the control end of the low noise amplifier is connected to the output end of the switching circuit, the output end of the low noise amplifier is connected to the input end of the fourth filter, and the output end of the fourth filter is connected to the signal port.

6. The circuit according to claim 5, characterized in that The transmission signal is a satellite radio determination service short message communication signal RDSS Tx; and the reception signal is a satellite radio navigation service signal RNSS B1I or RNSS B1C.

7. An anti-interference system, characterized in that: comprising a signal port, a power supply and an anti-interference circuit as claimed in any one of claims 1 to 6; One end of the anti-interference circuit is connected to the power supply, and the other end is connected to the signal port; The power supply is used to provide voltage for the anti-interference circuit; The signal port is used to provide a combined signal for the anti-interference circuit.

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