Signal processing device and signal processing method

WO2025052531A1PCT designated stage expired Publication Date: 2025-03-13MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
PCT/JP2023/032300
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-09-05
Publication Date
2025-03-13

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Abstract

A signal processing device (100) for executing time-frequency analysis on a signal comprises: a phase multiplication unit (110) for executing a plurality of phase multiplications on a received signal; and a signal addition unit (120) for adding signals, which are obtained by executing the plurality of phase multiplications, according to a synthesized interval that is a combination of time intervals for executing the time-frequency analysis on the signal.
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Description

Signal processing device and signal processing method

[0001] The disclosed technology relates to a signal processing technology that performs time-frequency analysis of a signal.

[0002] Time-frequency analysis (also commonly referred to as "time-frequency analysis") is a signal analysis technique that makes it possible to estimate the time fluctuations of the frequency components of a signal (fluctuations in frequency components over time). A typical example of such time-frequency analysis is the wavelet transform. A transform process related to the wavelet transform is known as the wavelet packet (see Non-Patent Document 1). In the wavelet transform, the sampling interval in the frequency direction increases for high-frequency components of a signal, whereas in the wavelet packet, the sampling interval in the frequency direction (hereinafter also referred to as the "frequency sampling interval") is constant. In the wavelet transform and the wavelet packet, the sampling interval in the time direction (hereinafter also referred to as the "time sampling interval") for low-frequency components is wider than the time sampling interval for high-frequency components.

[0003] Here, a technique for shortening the sampling interval in the time direction for wavelet transform has been disclosed (Patent Document 1, "Wavelet Transform Method and Wavelet Transform Apparatus"). Specifically, Patent Document 1 states that "the wavelet transform apparatus 1 comprises an input signal capturing unit 10, a coefficient multiplication unit 20, a delay unit 30, and an addition unit 40." "The input signal capturing unit 10 samples and acquires input data for each sampling period ST, and passes the acquired data to the coefficient multiplication unit 20. As shown in FIG. 2, the coefficient multiplication unit 20 comprises multipliers 21, 22, ..., 23 for multiplying the input data by n coefficients w0, w1, ..., wn-1 of the fundamental wavelet, respectively, and outputs the n multipliers from the multipliers 21, 22, ..., 23. The patent document states that "the n multiplied values ​​are sent to delay unit 30." "Delay unit 30 is composed of a plurality of delay units 31 as shown in FIG. 3. Delay units 31 realize a delay of sampling period ST, and delay each of the n multiplied values ​​by times nST, (n-1)ST, ..., 2ST, ST. The n delayed signals are then sent to adder unit 40." "Adder unit 40 is composed of adders 41 that calculate the sum of the n outputs from delay unit 30 as shown in FIG. 4" (paragraphs 0024-0027 of Patent Document 1). With this configuration, the wavelet transform method and wavelet transform device of Patent Document 1 use a fixed, fine time sampling interval for wavelet transform.

[0004] T. Guo, T. Zhang, E. Lim, M. Lopez-Benitez, F. Ma, and L. Yu, “A review of wavelet analysis and its applications: challenges and opportunities,” IEEE Access, vol.10, pp.58869-58903, June 2022.

[0005] Japanese Patent Application Laid-Open No. 2002-103914

[0006] However, conventional techniques have a problem in that it is difficult to realize a configuration that allows the time sampling interval to be changed along with the frequency sampling interval. The wavelet transform method and wavelet transform device of Patent Document 1 keep the number of time samples constant, and therefore cannot simply extend the frequency sampling interval, and therefore cannot be configured to make the frequency sampling interval finer.

[0007] The present disclosure is intended to solve the above problem, and aims to provide a configuration that allows the time sampling interval to be changed along with the frequency sampling interval in time-frequency analysis.

[0008] A signal processing device according to the present disclosure is a signal processing device that performs time-frequency analysis of a signal, and includes: a phase multiplication unit that performs multiple phase multiplications on a received signal; and a signal addition unit that adds up signals obtained by the multiple phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signal.

[0009] The present disclosure advantageously provides a configuration that allows the time sampling interval to be changed along with the frequency sampling interval in time-frequency analysis.

[0010] FIG. 1 is a diagram illustrating an example of a basic configuration of a signal processing device according to the present disclosure. FIG. 2 is a flowchart illustrating an example of basic processing by the signal processing device according to the present disclosure. FIG. 3 is a diagram illustrating an image of a processing result by the signal processing device according to the present disclosure and an image of a processing result by a conventional technique. FIG. 4 is a diagram illustrating an example of a configuration of a signal processing device according to a first embodiment of the present disclosure. FIG. 5 is a flowchart illustrating an example of processing by the signal processing device according to the first embodiment of the present disclosure. FIG. 6 is a diagram illustrating an example of a configuration of a signal processing device according to a second embodiment of the present disclosure. FIG. 7 is a flowchart illustrating an example of processing by the signal processing device according to the second embodiment of the present disclosure. FIG. 8 is a flowchart illustrating an example of processing by a time interval information receiving unit in the signal processing device according to the second embodiment of the present disclosure. FIG. 9 is a flowchart illustrating a detailed example of signal addition processing in the signal processing device according to the second embodiment of the present disclosure. FIG. 10 is a diagram illustrating an example of a configuration of a signal processing device according to a third embodiment of the present disclosure. FIG. 11 is a flowchart illustrating an example of processing by the signal processing device according to the third embodiment of the present disclosure. FIG. 12 is a schematic diagram illustrating an image of processing that can be realized by the signal processing device according to the third embodiment of the present disclosure. FIG. 13 is a diagram illustrating a first example of a hardware configuration for realizing functions according to the configuration of the present disclosure. FIG. 14 is a diagram illustrating a second example of a hardware configuration for realizing the functions according to the configuration of the present disclosure.

[0011] In order to explain the present disclosure in more detail, embodiments of the present disclosure will be described below with reference to the accompanying drawings.

[0012] Embodiment 1 In embodiment 1, a basic configuration of the present disclosure, processing by this configuration, a form including the basic configuration, and processing in this form will be described.

[0013] An example of the basic configuration of a signal processing device will be described. FIG. 1 is a diagram showing an example of the basic configuration of a signal processing device according to the present disclosure. The signal processing device 100 performs calculation processing related to time-frequency analysis of a signal and outputs the calculation result. The calculation result output by the signal processing device 100 is a value that enables estimation of the time fluctuation of the frequency component of the signal. The signal processing device 100 shown in FIG. 1 includes a phase multiplication unit 110 and a signal addition unit 120 (first signal addition unit).

[0014] The phase multiplication unit 110 performs multiple phase multiplications on the received signal. The multiple phase multiplications performed by the phase multiplication unit 110 are, for example, N×K complex multiplications (first coefficient N, second coefficient K) on the signal, as will be described in an embodiment below.

[0015] The signal adder 120 (first signal adder) adds together signals obtained by multiple phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signal. The signal adder 120 acquires time intervals for each frequency related to the time-frequency analysis to be performed on the signal, and adds together signals related to the time intervals for each frequency among the signals obtained by the multiple phase multiplications. The time intervals for each frequency acquired by the signal adder 120 are stored in advance in a storage unit (not shown), for example. Alternatively, the time intervals for each frequency acquired by the signal adder 120 may be information determined based on information received from outside the signal processing device 100. In this case, the signal processing device 100 is configured, for example, as in the second embodiment described below.

[0016] The hardware configuration for realizing the functions of the above components of the present disclosure will be described later.

[0017] An example of processing by the signal processing device will be described. Fig. 2 is a flowchart showing an example of basic processing by the signal processing device 100 of the present disclosure. The processing shown in Fig. 2 is a signal processing method by the signal processing device of the present disclosure. According to the signal processing method, the phase multiplication unit 110 of the signal processing device 100 performs a plurality of phase multiplications on a received signal, and the signal addition unit 120 of the signal processing device 100 adds up the signals obtained by the phase multiplication unit 110 in accordance with a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signal, thereby performing time-frequency analysis of the signal.

[0018] The signal processing device 100 starts the process shown in FIG. 2 when it receives, for example, a command from a control unit (not shown) or a signal from outside the device.

[0019] First, the signal processing device 100 executes a phase multiplication process (step ST10). In the phase multiplication process, the phase multiplication unit 110 of the signal processing device 100 performs a plurality of phase multiplications on the received signal. The phase multiplication unit 110 outputs the phase-multiplied signal to the signal addition unit 120.

[0020] Next, the signal processing device 100 executes signal addition processing (first signal addition processing) (step ST20). In the signal addition processing, the signal addition unit 120 of the signal processing device 100 receives the signals after phase multiplication. The signal addition unit 120 then adds up the signals obtained by the multiple phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signals. The signal addition unit 120 acquires time intervals for each frequency related to the time-frequency analysis to be performed on the signals, and adds up the signals related to the time intervals for each frequency among the signals obtained by the multiple phase multiplications.

[0021] Next, the signal processing device 100 executes an end determination process (step ST30). In the end determination process, a control unit (not shown) of the signal processing device 100 determines whether to end the process according to a program stored in a storage unit (not shown), for example.

[0022] When the control unit (not shown) of the signal processing device 100 determines not to end the process ("NO" in step ST30), the signal processing device 100 proceeds to the process of step ST10 and repeats the process shown in FIG.

[0023] When the control unit (not shown) of the signal processing device 100 determines that the processing is to be ended ("YES" in step ST30), the signal processing device 100 ends the processing shown in FIG.

[0024] 3 is a diagram showing an image of a processing result by the signal processing device 100 of the present disclosure and an image of a processing result by the conventional technology, which shows an image of a time-frequency sampling interval 1000 according to the present disclosure, a time-frequency sampling interval 1010 according to a general wavelet transform, a time-frequency sampling interval 1020 according to a wavelet packet, and a time-frequency sampling interval 1030 according to the wavelet transform described in Patent Document 1.

[0025] In the time-frequency sampling interval 1010 associated with a typical wavelet transform, the frequency sampling interval for high frequency components is wider and coarser than the frequency sampling interval for low frequency components, and the time sampling interval for low frequency components is wider and coarser than the time sampling interval for high frequency components.

[0026] In the time-frequency sampling interval 1020 for the wavelet packet, the frequency sampling interval for the high frequency components is finer than the frequency sampling interval for the time-frequency sampling interval 1010 for a general wavelet transform, but the time sampling interval for the low frequency components is wider and coarser than the time sampling interval for the high frequency components, similar to the time-frequency sampling interval 1010 for a general wavelet transform.

[0027] In the time-frequency sampling interval 1030 for the wavelet transform described in Patent Document 1, the time sampling interval for low-frequency components is shorter than the time-frequency sampling interval 1010 for a general wavelet transform, but the frequency sampling interval is the same as the frequency sampling interval for the time-frequency sampling interval 1010 for a general wavelet transform.

[0028] In the time-frequency sampling interval 1000 according to the present disclosure, the frequency sampling interval can be smaller than any of the sampling intervals 1010, 1020, and 1030, and the time sampling interval can be smaller than any of the sampling intervals 1010, 1020, and 1030. Thus, the present disclosure allows for the time sampling interval to be varied along with the frequency sampling interval.

[0029] A configuration example of a signal processing device 100A including the signal processing device 100 will be described. Fig. 4 is a diagram showing a configuration example of the signal processing device 100A according to the first embodiment of the present disclosure. The signal processing device 100A shown in Fig. 4 is configured to include a signal receiving unit 130A, a phase multiplication unit 110A, a signal addition unit 120A (first signal addition unit), and an analysis result output unit 140A.

[0030] The signal receiving unit 130A receives a signal input from outside the signal processing device 100A, and outputs the signal to the phase multiplication unit 110A.

[0031] The phase multiplication unit 110A receives the signal output from the signal reception unit 130A. Similar to the phase multiplication unit 110 already described, the phase multiplication unit 110A performs a plurality of phase multiplications on the received signal.

[0032] The signal adder 120A (first signal adder), like the signal adder 120 already described, adds together signals obtained by multiple phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signal. Specifically, like the signal adder 120 already described, the signal adder 120A (first signal adder) acquires, for example, a time interval for each frequency related to the time-frequency analysis to be performed on the signal, and adds together the signals related to the time interval for each frequency among the signals obtained by the multiple phase multiplications. This makes it possible to perform time-frequency analysis according to a synthesis interval in which different time intervals for each frequency are synthesized. The signal adder 120A outputs the signal after the signal addition process to the analysis result output unit 140A.

[0033] The analysis result output unit 140A acquires the signal processed by the signal adding unit 120A and outputs it as the analysis result.

[0034] In addition to the above components, the signal processing device 100A also includes a control unit (not shown), a storage unit (not shown), and a communication unit (not shown). The control unit (not shown) controls the entire signal processing device 100A and each of its components. The control unit (not shown), for example, starts up the signal processing device 100A in accordance with an external command. The control unit (not shown) also controls the state of the signal processing device 100A (operating state = startup, shutdown, sleep, etc.). The storage unit (not shown) stores various data used in the signal processing device 100A. For example, the storage unit (not shown) stores output (output data) from each component of the signal processing device 100A and outputs data requested by each component to the requesting component. The communication unit (not shown) communicates with an external device. For example, communication is performed between the signal processing device 100A and a peripheral device (not shown). For example, if the signal processing device 100A and the peripheral device are not connected by wire, the communication unit (not shown) has a function of communicating between the signal processing device 100A and the peripheral device. The communication unit (not shown) has a function of communicating with an external device (not shown). The control unit (not shown), the storage unit (not shown), and the communication unit (not shown) also have the same functions in the embodiments described below.

[0035] The hardware configuration for realizing the functions of the above components of the present disclosure will be described later.

[0036] 5 is a flowchart showing an example of processing by the signal processing device 100A according to the first embodiment of the present disclosure. The signal processing device 100A starts the processing shown in FIG. 5 upon receiving, for example, a command from a control unit (not shown) or a signal.

[0037] First, the signal processing device 100A executes a signal reception determination process (step ST110). In the signal reception determination process, if the signal reception unit 130A of the signal processing device 100A determines that a signal has not been received (step ST110 "NO"), the signal reception unit 130A repeats the process of ST110 and waits until a signal is received.

[0038] If the signal receiving unit 130A determines that it has received a signal ("YES" in step ST110), the signal processing device 100A then executes a phase multiplication process (step ST120). In the phase multiplication process, the phase multiplication unit 110A of the signal processing device 100A performs a plurality of phase multiplications on the received signal, similar to the phase multiplication process already described. The phase multiplication unit 110A outputs the signal after the phase multiplication process to the signal adding unit 120A.

[0039] Next, the signal processing device 100A executes a signal addition process (first signal addition process) (step ST130). In the signal addition process, the signal addition unit 120A of the signal processing device 100A adds up signals obtained by a plurality of phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signals, similar to the signal addition process already described. The signal addition unit 120A outputs the signal after the signal addition process to the analysis result output unit 140A.

[0040] Next, the signal processing device 100A executes an analysis result output process (step ST140). In the analysis result output process, the analysis result output unit 140A of the signal processing device 100A outputs the signal after the signal addition process as the analysis result to, for example, an external device (not shown).

[0041] Next, the signal processing device 100A executes an end determination process (step 150). In the end determination process, a control unit (not shown) of the signal processing device 100A determines whether to end the process according to a program stored in a storage unit (not shown), for example.

[0042] When the control unit (not shown) determines not to end the process ("NO" in step ST150), the signal processing device 100A proceeds to the process of step ST110 and repeats the process shown in FIG.

[0043] When the control unit (not shown) determines that the process is to be ended ("YES" in step ST150), the signal processing device 100A ends the process shown in FIG.

[0044] As described above, the signal processing according to the first embodiment of the present disclosure can achieve time-frequency analysis by multiplying phases and adding signals. Here, as time sampling increases, the number of times wavelet bases are used increases, resulting in a problem of an increase in the number of multiplications, among other things. However, in the present disclosure, the multiplications required for the product-sum of each output are performed in advance as common phase multiplications, and the output results at different time sampling positions are expressed by devising a method of summation, thereby reducing the number of multiplications and the amount of computation. The time-frequency analysis using the signal processing according to the present disclosure enables time-frequency analysis with low computational complexity using fine time sampling not provided by wavelet packets. Furthermore, the time-frequency analysis using the signal processing according to the present disclosure does not perform the thinning process to achieve a fixed number of sampling points, as is done in the wavelet transform method described in Patent Document 1, thereby enabling time-frequency analysis in accordance with fine sampling in the frequency direction. The signal processing device according to the first embodiment of the present disclosure enables the time sampling interval to be changed along with the frequency sampling interval in time-frequency analysis. Furthermore, the signal processing device according to the first embodiment of the present disclosure makes it possible to realize time-frequency analysis at fine sampling intervals without excessively increasing the amount of calculation.

[0045] A signal processing device according to the present disclosure is configured, for example, as follows: A signal processing device that performs time-frequency analysis of a signal, comprising: a phase multiplication unit that performs multiple phase multiplications on a received signal; and a signal addition unit that adds up signals obtained by the multiple phase multiplications in accordance with a synthesis interval that combines time intervals related to time-frequency analysis to be performed on the signal. This advantageously enables the present disclosure to provide a signal processing device that can change the time sampling interval as well as the frequency sampling interval in time-frequency analysis.

[0046] A signal processing method according to the present disclosure is configured, for example, as follows: A signal processing method by a signal processing device, characterized in that a phase multiplication unit of the signal processing device performs a plurality of phase multiplications on a received signal, and a signal addition unit of the signal processing device adds up the signals obtained by the phase multiplication units in accordance with a synthesis interval that combines time intervals related to time-frequency analysis to be performed on the signal, thereby performing time-frequency analysis of the signal. This advantageously enables the present disclosure to provide a signal processing method that can change the time sampling interval as well as the frequency sampling interval in time-frequency analysis.

[0047] The signal processing device of the present disclosure may further be configured, for example, as follows: The signal adding unit acquires a time interval for each frequency related to the time-frequency analysis to be performed on the signal, and adds together the signals related to the time interval for each frequency among the signals obtained by the multiple phase multiplications. This provides an advantage that the present disclosure can provide a configuration capable of performing time-frequency analysis according to a synthesis interval obtained by synthesizing different time intervals for each frequency. Furthermore, the present disclosure provides an advantage similar to the above-mentioned advantage by applying the above-mentioned configuration to the above-mentioned method.

[0048] Embodiment 2. In embodiment 2, an example of detailed processing in the signal processing device of the present disclosure and a configuration that enables changing the processing conditions of the signal processing device will be described. In embodiment 2, among the components according to embodiment 2, duplicated descriptions of components similar to the components according to embodiment 1 already described will be omitted as appropriate.

[0049] A configuration example of a signal processing device according to a second embodiment of the present disclosure will be described. Fig. 6 is a diagram illustrating a configuration example of a signal processing device 100B according to the second embodiment of the present disclosure. The signal processing device 100B illustrated in Fig. 6 includes a signal receiving unit 130B, a phase multiplication unit 110B, a signal adding unit 120B (first signal adding unit), an analysis result output unit 140B, a time interval receiving unit 150B, a frequency determining unit 160B, a time interval determining unit 170B, and a time width acquiring unit 180B.

[0050] The time interval receiving unit 150B receives time interval information indicating a time interval for each frequency related to the time-frequency analysis. The time interval receiving unit 150B receives and acquires, for example, a combination of a first coefficient related to a frequency and a second coefficient related to a time interval as the time interval information. The first coefficient is a value that defines a frequency related to the time-frequency analysis to be performed by the signal processing device 100B. The first coefficient is, for example, a value indicating a frequency n (described later) or a value (e.g., "N") from which the frequency n can be derived. The second coefficient is a value that defines a time interval related to the time-frequency analysis to be performed by the signal processing device 100B. The second coefficient is, for example, a value indicating a time interval k (described later) or a value (e.g., "K") from which the time interval k can be derived. The time interval receiving unit 150B may be an internal component of the signal adding unit 120B.

[0051] The frequency determiner 160B determines a frequency related to the time-frequency analysis using the time interval information. Specifically, for example, the frequency determiner 160B obtains a first coefficient that defines the frequency, and determines the frequency n related to the time-frequency analysis using the first coefficient. Note that the frequency determiner 160B may be an internal component of the signal adder 120B.

[0052] The time interval determination unit 170B determines a time interval for the time-frequency analysis using the time interval information. Specifically, for example, the time interval determination unit 170B obtains a second coefficient that defines the time interval, and determines the time interval k for the time-frequency analysis using the second coefficient. Note that the time interval determination unit 170B may be an internal component of the signal addition unit 120B.

[0053] With this configuration, the signal processing device 100B can change the time interval for time-frequency analysis depending on the frequency, and can adaptively change the desired time interval depending on any frequency to perform time-frequency analysis.

[0054] The time width acquisition unit 180B accepts a time width condition and determines the time width of the time interval based on the condition. The time width condition is, for example, "p(n)" of the time width 2p(n)+1 described below. With this configuration, the signal processing device 100B is configured to be able to change the time width of the time interval. Note that the time width acquisition unit 180B may be an internal component of the signal addition unit 120B.

[0055] The signal receiving unit 130B has a configuration having the same functions as the signal receiving unit 130A already described, and therefore a description thereof will be omitted.

[0056] The phase multiplication unit 110B executes a phase multiplication process, which will be described later, and performs a plurality of phase multiplications on the received signal.

[0057] The signal adder 120B (first signal adder) executes a signal addition process described below to add up signals obtained by multiple phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signals. The signal adder 120B uses the first and second coefficients to obtain time intervals for each frequency related to the time-frequency analysis to be performed on the signals, and adds up the signals related to the time intervals for each frequency among the signals obtained by the multiple phase multiplications. The signal adder 120B further uses the time width determined by the time width acquisition unit 180B to add up the signals related to the time intervals for each frequency.

[0058] The analysis result output unit 140B functions in the same way as the analysis result output unit 140A already described, and acquires the signal processed by the signal addition unit 120B and outputs it as the analysis result.

[0059] The hardware configuration for realizing the functions of the above components of the present disclosure will be described later.

[0060] A processing example of the action evaluation device according to the second embodiment of the present disclosure will be described. FIG. 7 is a flowchart showing an example of processing of the signal processing device 100B according to the second embodiment of the present disclosure. In the description, the signal processing device 100B processes the signal s(k) when the signal time is kΔT (k=1, ..., K, ΔT is the sampling interval). In this embodiment, it is assumed that the device is designed to take negative frequency components into consideration and to have low frequency components as the center of frequency. However, it is also possible to design the device so that the low frequency components remain as low frequency components without taking such negative frequencies into consideration.

[0061] The signal processing device 100B starts the process shown in FIG. 7 when it receives a command from a control unit (not shown) or a signal, for example.

[0062] First, the signal processing device 100B executes a signal reception determination process (step ST210). In the signal reception determination process, if the signal reception unit 130B of the signal processing device 100B determines that a signal has not been received (step ST210 "NO"), the signal reception unit 130B repeats the process of step ST210 and waits until a signal is received.

[0063] If the signal receiving unit 130B determines that it has received a signal ("YES" in step ST210), the signal processing device 100B then executes a phase multiplication process (step ST220). In the phase multiplication process, the phase multiplication unit 110B of the signal processing device 100B performs a plurality of phase multiplications on the received signal. The phase multiplication unit 110B multiplies the phase of a signal s(k) when the frequency is (n-1-N / 2) / (KΔT) (n=1, ..., N) as shown in the following equation (1). The signal S(n, k) obtained by the calculation of equation (1) is obtained by performing N×K complex multiplications. The phase multiplication unit 110B outputs the signal S(n, k) to the signal addition unit 120B.

[0064] Next, the signal processing device 100B executes signal addition processing (first signal addition processing) (step ST230). In the signal addition processing, the signal addition unit 120B of the signal processing device 100B acquires time interval k for each frequency n related to the time-frequency analysis to be performed on the signal, and adds together the signals related to time interval k for each frequency n among the signals obtained by multiple phase multiplications. A short-time Fourier transform can be performed on the signal S(n, k) by adding them together for a desired time interval k for an arbitrary frequency n. In this case, a wavelet transform can be realized by adaptively changing the time interval of the signals to be added depending on the frequency. In this case, if the window function used as the wavelet base is rectangular, the process of adding the N × K complex multiplications previously performed is basically an addition, making it possible to perform a wavelet transform without an excessive increase in the amount of calculation. Even if the time sampling becomes finer, a wavelet transform without an increase in the number of complex multiplications is possible. In this disclosure, the addition performed by the signal addition unit 120B to realize a rectangular window wavelet transform will be described. In order to find the interval in which the signals S(n, k) are added together, p(n) is defined as in the following equation (2): Note that, for the purpose of explaining this embodiment, p(n) is explained quantitatively, but p(n) may be changed to another equation depending on the application method. "r" in equation (2) is the lower limit of the time window width for obtaining a certain frequency resolution, and "floor( )" in equation (3) is the floor function. The rectangular window wavelet transform according to the present disclosure performs addition of a width 2p(n)+1 for each frequency n, centered on time k. This enables a wavelet transform with a rectangular window base of frequency n, time k, and time width 2p(n)+1. Therefore, the processed time frequency component ("time frequency component" is also expressed as "time-frequency component") Fr(n, k) is calculated using the following equations (4) and (5). In the above formula, the gain is adjusted according to the number of additions using "α", but the essential calculation related to the wavelet transform is performed by addition only. Note that the gain using "α" is given on the premise that the time length of the wavelet base and the component to be extracted match. Since the wavelet transform can be performed in any time interval, frequency analysis is possible without increasing the number of multiplications.

[0065] Here, a process for receiving time interval information will be described. FIG. 8 is a flowchart showing an example of a process performed by the time interval information receiving unit B in the signal processing device 100B according to the second embodiment of the present disclosure. For example, when an operation for setting a time interval is received, the signal processing device 100B displays an operation screen on a display unit or display device (not shown) and starts the process shown in FIG. 8. The signal processing device 100B executes a time interval information receiving process (step ST260). The time interval information receiving unit B receives time interval information from a user, for example, via a terminal. The time interval information is information indicating a time interval for each frequency and is formed, for example, by a combination of a frequency and a time interval. Upon receiving the time interval information, the signal processing device 100B stores the time interval information in a storage unit (not shown) and terminates the process shown in FIG. 8. Furthermore, upon receiving the time interval information, the time interval information receiving unit B sends the time interval information to the time interval determination unit 170B and the frequency determination unit 160B.

[0066] Here, processing related to the signal addition processing according to the second embodiment will be described. FIG. 9 is a flowchart illustrating a detailed example of the signal addition processing in the signal processing device 100B according to the second embodiment of the present disclosure. For example, when the signal processing device 100B starts the signal addition processing shown in FIG. 8 , the signal processing device 100B starts the processing shown in FIG. 9 . The signal processing device 100B acquires values ​​to be used in the signal addition processing. When the signal processing device 100B starts the processing, the time interval acceptance unit 150B of the signal processing device 100B accepts time intervals for each frequency. Specifically, the time interval acceptance unit 150B accepts, for example, a combination of a first coefficient and a second coefficient. Furthermore, the time interval acceptance unit 150B may acquire the first coefficient and the second coefficient included in time interval information stored in advance in a storage unit (not shown). When the time interval acceptance unit 150B is an internal component of the signal addition unit 120B, the processing is performed in the signal addition unit 120B.

[0067] Next, the signal processing device 100B determines a frequency for signal addition (step ST271). Specifically, the frequency determination unit 160B of the signal processing device 100B determines a frequency for time-frequency analysis using time interval information. More specifically, for example, the frequency determination unit 160B acquires a first coefficient that defines the frequency, and determines a frequency n for time-frequency analysis using the first coefficient. The frequency determination unit 160B outputs the determined frequency to the signal addition unit 120B. If the frequency determination unit 160B is an internal component of the signal addition unit 120B, this processing is executed in the signal addition unit 120B.

[0068] Next, the signal processing device 100B determines a time interval for signal addition (step ST272). Specifically, the time interval determination unit 170B of the signal processing device 100B determines a time interval for time-frequency analysis using the time interval information. More specifically, for example, the time interval determination unit 170B acquires a second coefficient that defines the time interval, and determines a time interval k for time-frequency analysis using the second coefficient. The time interval determination unit 170B outputs the determined time interval to the signal addition unit 120B. If the time interval determination unit 170B is an internal component of the signal addition unit 120B, this processing is executed in the signal addition unit 120B.

[0069] Next, the signal processing device 100B executes a time width acquisition process (step ST273). Specifically, the time width acquisition unit 180B of the signal processing device 100B accepts the time width conditions and determines and acquires the time width of the time interval based on the conditions. The time width acquisition unit 180B outputs the time width to the signal addition unit 120B. If the time width acquisition unit 180B is an internal component of the signal addition unit 120B, this process is executed in the signal addition unit 120B.

[0070] Next, the signal processing device 100B executes a signal addition process (first signal addition process) (step ST274). In the signal addition process, the signal addition unit 120B of the signal processing device 100B acquires and uses the frequency, time interval, and time width related to the time-frequency analysis to execute the above-described signal addition process. The signal addition process (first signal addition process) corresponds to the signal addition process (step ST240) already described.

[0071] After executing the signal addition process (first signal addition process), the signal processing device 100B ends the process shown in FIG.

[0072] Returning to the description of Fig. 7, after the signal processing device 100B executes the signal addition process, the signal processing device 100B then executes an analysis result output process (step ST240). In the analysis result output process, the analysis result output unit 140B of the signal processing device 100B acquires the signal processed by the signal addition unit 120B and outputs it as the analysis result.

[0073] Next, the signal processing device 100B executes an end determination process (step ST250). In the end determination process, a control unit (not shown) of the signal processing device 100B determines whether to end the process according to a program stored in a storage unit (not shown), for example.

[0074] When the control unit (not shown) determines not to end the process ("NO" in step ST250), the signal processing device 100B proceeds to the process of step ST210 and repeats the process shown in FIG.

[0075] When the control unit (not shown) determines to end the process ("YES" in step ST250), the signal processing device 100B ends the process shown in FIG.

[0076] The time-frequency analysis by signal processing according to the second embodiment of the present disclosure enables time-frequency analysis with a low computational load using fine time sampling, which is not possible with wavelet packets. Furthermore, the time-frequency analysis by signal processing according to the second embodiment of the present disclosure does not perform the thinning process to obtain a fixed number of sampling points, which is performed in the wavelet transform method described in Patent Document 1, and therefore enables time-frequency analysis in response to fine sampling in the frequency direction. Furthermore, the configuration according to the second embodiment of the present disclosure is capable of changing the time interval according to the frequency, making it possible to adaptively change the desired time interval according to an arbitrary frequency and perform time-frequency analysis. Furthermore, the configuration according to the second embodiment of the present disclosure makes it possible to change the duration of the time interval.

[0077] The signal processing device of the present disclosure may further be configured, for example, as follows: The signal processing device further includes: a frequency determination unit that acquires a first coefficient defining a frequency and determines a frequency related to time-frequency analysis using the first coefficient; and a time interval determination unit that acquires a second coefficient defining a time interval and determines a time interval related to time-frequency analysis using the second coefficient, wherein the signal addition unit uses the frequency determined by the frequency determination unit and the time interval determined by the time interval determination unit to obtain a time interval for each frequency related to the time-frequency analysis to be performed on the signal, and adds together signals related to the time interval for each frequency among the signals obtained by the multiple phase multiplications. This provides an advantageous effect of providing a configuration that can change the time interval according to the frequency and adaptively change a desired time interval according to an arbitrary frequency to perform time-frequency analysis. Furthermore, the present disclosure provides an advantageous effect similar to the advantageous effect described above by applying the above configuration to the above method.

[0078] The signal processing device of the present disclosure may further be configured, for example, as follows: The signal processing device further includes: a time width acquisition unit that receives a time width condition and determines the time width of the time interval based on the condition; and the signal addition unit adds together signals related to the time interval for each frequency by further using the time width determined by the time width acquisition unit. This provides an advantage that the present disclosure can provide a configuration that can change the time width of the time interval. Furthermore, the present disclosure provides an advantage similar to the above-described advantage by applying the above-described configuration to the above-described method.

[0079] Embodiment 3. In embodiment 3, a form is described in which it is possible to perform time-frequency analysis similar to that in the case where a window function other than a rectangular window, such as a triangular window, is used as a wavelet basis. In embodiment 3, among the components according to embodiment 3, duplicated descriptions of components similar to those according to embodiment 1 or embodiment 2 already described will be omitted as appropriate.

[0080] A configuration example of a signal processing device according to a third embodiment of the present disclosure will be described. FIG. 10 is a diagram illustrating a configuration example of a signal processing device 100C according to the third embodiment of the present disclosure. The signal processing device 100C illustrated in FIG. 10 is configured to obtain an effect similar to that achieved by using a triangular window as a wavelet basis, for example, using a signal S(n, k), which is an intermediate output of the signal processing device 100B described in the second embodiment. The signal processing device 100C includes a signal receiving unit 130C, a phase multiplication unit 110C, a signal adding unit 120C (first signal adding unit), an analysis result output unit 140C, a time interval receiving unit 150C, a frequency determining unit 160C, a time interval determining unit 170C, a time width acquiring unit 180C, and a second signal adding unit 190C.

[0081] The signal receiving unit 130C, the phase multiplication unit 110C, and the analysis result output unit 140C are configured in the same manner as the signal receiving units 130A and 130B, the phase multiplication units 110A and 110B, and the analysis result output units 140A and 140B, which have already been explained, and detailed explanations thereof will be omitted here.

[0082] The time interval receiving unit 150C, the frequency determining unit 160C, the time interval determining unit 170C, and the time width acquiring unit 180C are configured in the same manner as the time interval receiving unit 150B, the frequency determining unit 160B, the time interval determining unit 170B, and the time width acquiring unit 180B, which have already been explained, and detailed explanations thereof will be omitted here.

[0083] The signal adding unit 120C (first signal adding unit) has the same function as the already described signal adding units 120A and 120B. The signal adding unit 120C (first signal adding unit) outputs the signal after the signal adding process to the second signal adding unit 190C.

[0084] The second signal adder 190C further adds the signal output by the signal adder C to the signal output by the signal adder C. With this configuration, the signal processing device 100C has a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used in the wavelet base. Alternatively, the second signal adder 190C adds the signal output by the signal adder 120C by performing a bit shift on a portion of the signal output by the signal adder 120C. With this configuration, the signal processing device 100C has the effect of being able to provide a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used in the wavelet base.

[0085] The analysis result output unit 140C is similar to the analysis result output units 140A and 140B already described, and a description thereof will be omitted.

[0086] The hardware configuration for realizing the functions of the above components of the present disclosure will be described later.

[0087] A processing example of an action evaluation device according to a third embodiment of the present disclosure will be described. Fig. 11 is a flowchart showing an example of processing by a signal processing device 100C according to the third embodiment of the present disclosure. Fig. 12 is a schematic diagram showing an image of processing that can be realized by the signal processing device 100C according to the third embodiment of the present disclosure. The signal processing device 100C starts the processing shown in Fig. 11 upon receiving, for example, a command from a control unit (not shown) or upon receiving a signal.

[0088] First, the signal processing device 100C executes a signal reception determination process (step ST310). In the signal reception determination process, as in the signal reception process already described, if the signal reception unit 130C of the signal processing device 100C determines that a signal has not been received (step ST310 "NO"), the signal reception unit 130C repeats the process of step ST310 and waits until a signal is received.

[0089] If the signal receiving unit 130C determines that a signal has been received ("YES" in step ST310), the signal processing device 100C then executes a phase multiplication process (step ST320). In the phase multiplication process, the phase multiplication unit 110C of the signal processing device 100C performs a plurality of phase multiplications on the received signal, similar to the phase multiplication process already described.

[0090] Next, the signal processing device 100C executes signal addition processing (first signal addition processing) (step ST330). In the signal addition processing, the signal addition unit 120C of the signal processing device 100C acquires time interval k for each frequency n related to the time-frequency analysis to be performed on the signal, similar to the signal addition processing (first signal addition processing) already described, and adds together the signals related to time interval k for each frequency n among the signals obtained by multiple phase multiplications. After executing the first signal addition processing, the signal addition unit 120C (first signal addition unit) of the signal processing device 100C outputs the signal S(n, k) after the first signal addition processing to the second signal addition unit 190C.

[0091] Next, the signal processing device 100C executes a second signal addition process (step ST340). In the second signal addition process, the second signal addition unit 190C of the signal processing device 100C further adds the signal output by the signal addition unit 120C to the signal output by the signal addition unit 120C. The second signal addition unit 190C calculates the processing result Ft(n,k) based on the following equations (6) and (7). In equations (6) and (7), the triangular window is realized by multiplying S(n,k+-(l-p(n))-1) by "l" and then adding them. However, this multiplication can be substituted by adding signals obtained by changing the signal interval with equal gain. This principle will be explained using FIG. 12. FIG. 12 shows a schematic diagram of the weight 2000 when signals obtained by changing the signal interval are added with equal gain. From this diagram, it can be seen that the signal obtained by adding signals with changed signal intervals with equal gain, which is obtained from the processing up to the second signal adder 190C, is equivalent to the triangular window. This indicates that the triangular window can be used without multiplication. Since a narrow time width derived result can also be derived in the process of deriving a calculation result with a wide time width, it is possible to configure the system so that the number of additions is not excessively increased. The second signal adder 190C outputs the processing result Ft(n,k) calculated based on this concept to the analysis result output unit 140C as the time-frequency analysis result.

[0092] The second signal adding unit 190C may perform processing by bit shifting to make the triangular window equivalent to a window with a changed gain without excessively increasing the amount of calculation, thereby achieving the same effect as above.

[0093] After the signal processing device 100C executes the second signal addition process, the signal processing device 100C then executes an analysis result output process (step ST350). In the analysis result output process, the analysis result output unit 140C of the signal processing device 100C executes a process similar to the analysis result output process already described.

[0094] Next, the signal processing device 100C executes an end determination process (step ST360). In the end determination process, a control unit (not shown) of the signal processing device 100C determines whether to end the process according to a program stored in a storage unit (not shown), for example.

[0095] When the control unit (not shown) determines not to end the process ("NO" in step ST360), the signal processing device 100C proceeds to the process of step ST310 and repeats the process shown in FIG.

[0096] When the control unit (not shown) determines to end the process ("YES" in step ST360), the signal processing device 100C ends the process shown in FIG.

[0097] The embodiments of the present disclosure enable finer sampling intervals in both directions. Furthermore, the embodiments of the present disclosure are configured to utilize a triangular window. That is, the embodiments of the present disclosure can provide a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used as the wavelet base. The embodiments of the present disclosure enable the sidelobe reduction effect achieved using a triangular window to be achieved without excessively increasing the amount of calculation. By adding addition, the embodiments of the present disclosure realize a fine wavelet transform with time-frequency sampling equivalent to that using a triangular window as the wavelet base. While patent documents have realized a wavelet transform with fine time sampling, the rectangular window base posed a problem of low accuracy. The embodiments of the present disclosure provide a solution to this problem.

[0098] The signal processing device of the present disclosure may further be configured, for example, as follows: The signal processing device may include a second signal addition unit that further adds the signal output by the signal addition unit to the signal output by the signal addition unit. This provides an effect of providing a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used for the wavelet base. Furthermore, the present disclosure provides an effect similar to that described above by applying the above configuration to the above method.

[0099] The signal processing device of the present disclosure may further be configured, for example, as follows: The signal processing device includes: a second signal addition unit that performs a bit shift on a portion of the signal output by the signal addition unit and adds the signal to the signal output by the signal addition unit. This provides an effect that the present disclosure can provide a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used for the wavelet base. Furthermore, the present disclosure provides an effect similar to that described above by applying the above configuration to the above method.

[0100] Here, a hardware configuration for realizing the functions of the present disclosure will be described. Fig. 13 is a diagram showing a first example of a hardware configuration for realizing the functions of the configuration of the present disclosure. Fig. 14 is a diagram showing a second example of a hardware configuration for realizing the functions of the configuration of the present disclosure. The signal processing devices 100, 100A, 100B, and 100C of the present disclosure are each realized by hardware such as that shown in Fig. 13 or Fig. 14.

[0101] As shown in FIG. 13 , each of the action evaluation devices 100, 100A, 100B, 100C, 100D, 100E, 100E′, and 100E″ is configured, for example, with a processor 10001, a memory 10002, an input / output interface 10003, and a communication circuit 10004. The processor 10001 and the memory 10002 are, for example, installed in a computer. The memory 10002 stores programs for causing the computer to function as phase multiplication units 110, 110A, 110B, 110C, signal addition units 120, 120A, 120B, 120C, signal reception units (first signal addition units) 130A, 130B, 130C, analysis result output units 140A, 140B, 140C, time interval reception units 150B, 150C, frequency determination units 160B, 160C, time interval determination units 170B, 170C, time width acquisition units 180B, 180C, second signal addition unit 190C, and a control unit (not shown). The processor 10001 reads and executes the program stored in the memory 10002, thereby realizing the functions of the phase multiplication units 110, 110A, 110B, and 110C, the signal addition units 120, 120A, 120B, and 120C, the signal reception units (first signal addition units) 130A, 130B, and 130C, the analysis result output units 140A, 140B, and 140C, the time interval reception units 150B and 150C, the frequency determination units 160B and 160C, the time interval determination units 170B and 170C, the time width acquisition units 180B and 180C, the second signal addition unit 190C, and a control unit (not shown). Furthermore, the memory 10002 or another memory (not shown) realizes a storage unit (not shown). Furthermore, the communication circuit 10004 realizes a communication unit (not shown).

[0102] The processor 10001 is, for example, a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), a microprocessor, a microcontroller, or a DSP (Digital Signal Processor). The memory 10002 may be a non-volatile or volatile semiconductor memory such as RAM (Random Access Memory), ROM (Read Only Memory), EPROM (Erasable Programmable ROM), EEPROM (Electrically Erasable Programmable Read Only Memory) or flash memory, or a magnetic disk such as a hard disk or flexible disk, or an optical disk such as a CD (Compact Disc) or DVD (Digital Versatile Disc), or a magneto-optical disk. The processor 10001 and the memory 10002 or the communication circuit 10004 are connected in a state capable of transmitting data to each other. The processor 10001, memory 10002, and communication circuit 10004 are connected via an input / output interface 10003 so as to be capable of transmitting data to and from other hardware.

[0103] Alternatively, the functions of the phase multiplication units 110, 110A, 110B, 110C, signal addition units 120, 120A, 120B, 120C, signal reception units (first signal addition units) 130A, 130B, 130C, analysis result output units 140A, 140B, 140C, time interval reception units 150B, 150C, frequency determination units 160B, 160C, time interval determination units 170B, 170C, time width acquisition units 180B, 180C, second signal addition unit 190C, and a control unit (not shown) in the signal processing devices 100, 100A, 100B, 100C may be realized by a dedicated processing circuit 20001, as shown in FIG. 14 .

[0104] The processing circuit 20001 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), a PLD (Programmable Logic Device), an FPGA (Field-Programmable Gate Array), a SoC (System-on-a-Chip), or a system LSI (Large-Scale Integration), etc. In addition, a storage unit (not shown) is realized by the memory 20002 or another memory (not shown). The memory 20002 may be a non-volatile or volatile semiconductor memory such as RAM (Random Access Memory), ROM (Read Only Memory), EPROM (Erasable Programmable ROM), EEPROM (Electrically Erasable Programmable Read Only Memory), or flash memory, or a magnetic disk such as a hard disk or flexible disk, or an optical disk such as a CD (Compact Disc) or DVD (Digital Versatile Disc), or a magneto-optical disk. The communication circuit 20004 implements a communication unit (not shown). The processing circuit 20001 and the memory 20002 or the communication circuit 20004 are connected in a state where they can transmit data to each other. In addition, the processing circuit 20001, the memory 20002, and the communication circuit 20004 are connected in a state where they can transmit data to other hardware via the input / output interface 20003.In the signal processing devices 100, 100A, 100B, 100C, the functions of the phase multiplication units 110, 110A, 110B, 110C, signal addition units 120, 120A, 120B, 120C, signal reception units (first signal addition units) 130A, 130B, 130C, analysis result output units 140A, 140B, 140C, time interval reception units 150B, 150C, frequency determination units 160B, 160C, time interval determination units 170B, 170C, time width acquisition units 180B, 180C, second signal addition unit 190C, and a control unit (not shown) may be realized by separate processing circuits, or may be realized collectively by a processing circuit.

[0105] Alternatively, in the signal processing devices 100, 100A, 100B, 100C, some of the functions of the phase multiplication units 110, 110A, 110B, 110C, signal addition units 120, 120A, 120B, 120C, signal reception units (first signal addition units) 130A, 130B, 130C, analysis result output units 140A, 140B, 140C, time interval reception units 150B, 150C, frequency determination units 160B, 160C, time interval determination units 170B, 170C, time width acquisition units 180B, 180C, second signal addition unit 190C, and a control unit (not shown) may be realized by the processor 10001 and memory 10002, and the remaining functions may be realized by the processing circuit 20001.

[0106] It should be noted that, within the scope of this disclosure, the embodiments may be freely combined, any component of each embodiment may be modified, or any component of each embodiment may be omitted.

[0107] The signal processing device of the present disclosure can realize a configuration that allows the time sampling interval to be changed along with the frequency sampling interval in time-frequency analysis, and is therefore suitable for use in time-frequency analysis.

[0108] 100, 100A, 100B, 100C Signal processing device, 110, 110A, 110B, 110C Phase multiplication unit, 120, 120A, 120B, 120C Signal addition unit (first signal addition unit), 130A, 130B, 130C Signal acceptance unit, 140A, 140B, 140C Analysis result output unit, 150B, 150C Time interval acceptance unit, 160B, 160C Frequency determination unit, 170B, 170C Time interval determination unit, 180B, 180C Time width acquisition unit, 190C Second signal addition unit, 1000 Time-frequency sampling interval according to the present disclosure, 1010 Time-frequency sampling interval according to a general wavelet transform, 1020 Time-frequency sampling interval according to a wavelet packet, 1030 Time-frequency sampling interval according to the wavelet transform described in Patent Document 1, 2000 Weights when signals obtained by changing the signal section are added with equal gain, 10001 processor, 10002 memory, 10003 input / output interface, 10004 communication circuit, 20001 processing circuit, 20002 memory, 20003 input / output interface, 20004 communication circuit.

Claims

1. A signal processing device that performs time-frequency analysis of a signal, comprising: a phase multiplication unit that performs multiple phase multiplications on a received signal; and a signal addition unit that adds up signals obtained by the multiple phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signal.

2. The signal processing device according to claim 1, characterized in that the signal addition unit obtains a time interval for each frequency related to the time-frequency analysis to be performed on the signal, and adds up the signals related to the time interval for each frequency among the signals obtained by the multiple phase multiplications.

3. A signal processing device as described in claim 1, further comprising: a frequency determination unit that obtains a first coefficient that defines a frequency, and uses the first coefficient to determine a frequency related to the time-frequency analysis; and a time interval determination unit that obtains a second coefficient that defines a time interval, and uses the second coefficient to determine a time interval related to the time-frequency analysis, wherein the signal addition unit obtains a time interval for each frequency related to the time-frequency analysis to be performed on the signal, using the frequency determined by the frequency determination unit and the time interval determined by the time interval determination unit, and adds together the signals related to the time interval for each frequency, among the signals obtained by the multiple phase multiplications.

4. The signal processing device according to claim 3, further comprising a time width acquisition unit that receives a time width condition and determines the time width of the time interval based on the condition, wherein the signal addition unit further uses the time width determined by the time width acquisition unit to add up the signals related to the time interval for each frequency.

5. The signal processing device according to any one of claims 1 to 4, further comprising: a second signal addition unit that further adds the signal output by the signal addition unit to the signal output by the signal addition unit.

6. A signal processing device according to any one of claims 1 to 4, further comprising: a second signal addition unit that performs a bit shift on a portion of the signal output by the signal addition unit and adds the signal output by the signal addition unit.

7. A signal processing method using a signal processing device, comprising: a phase multiplication unit of the signal processing device performs a plurality of phase multiplications on a received signal; and a signal addition unit of the signal processing device performs addition of the signals obtained by the phase multiplication units according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signal, thereby performing a time-frequency analysis of the signal.

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