Beam neural network architecture

The beam neural network architecture addresses the high power consumption and complexity of traditional ANNs by using phase shifters and wireless interaction of phase-shifted signals, resulting in a more efficient and scalable solution.

WO2025053903A1PCT designated stage expired Publication Date: 2025-03-13QUALCOMM INC
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Patent Information

Application Number
PCT/US2024/037465
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-07
Filing Date
2024-07-10
Publication Date
2025-03-13

AI Technical Summary

Technical Problem

Traditional artificial neural networks (ANNs) face significant challenges due to high power consumption and hardware complexity, particularly in operations involving multiplication and summation, which hinder the mass adoption of artificial intelligence.

Method used

The proposed beam neural network (BNN) architecture reduces power consumption by using phase shifters instead of multipliers to shift input signal phases and by allowing phase-shifted signals to interact wirelessly, effectively summing over the air without the need for adders.

Benefits of technology

This approach significantly reduces power consumption and hardware complexity, enabling more efficient and scalable artificial neural networks.

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Abstract

Certain aspects of the present disclosure are directed to methods and apparatus for operating an artificial neural network (ANN) device. The method includes transmitting, from at least one artificial input neuron of the ANN, a plurality of phase-shifted RF signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams, receiving, at least one artificial output neuron of the ANN, the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas, and generating, at the at least one artificial output neuron of the ANN, a plurality of digital output signals corresponding to the plurality of input signals.
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Description

BEAM NEURAL NETWORK ARCHITECTURECROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims priority to Israel Patent Application No. 305741, filed September 7, 2023, which is assigned to the assignee hereof and hereby expressly incorporated by reference in its entirety as if fully set forth below and for all applicable purposes.INTRODUCTION

[0002] Aspects of the present disclosure relate to artificial neural networks and more particularly to a beam neural network architecture.

[0003] Machine learning is generally the process of producing a trained model (e.g., an artificial neural network, a tree, or other structures), which represents a generalized fit to a set of training data. Applying the trained model to input data produces inferences, which may be used to gain insights into the input data. In some cases, applying the model to the input data is described as “running an inference” or “performing an inference” on the input data.

[0004] To train a model and perform inferences on input data, various mathematical operations are performed using various mathematical processing components. For example, multiply-and-accumulate (MAC) units may be used to perform these operations to train a model and perform inferences on input data using the trained model. It should be noted, however, that MAC units may be used for various mathematical operations and are not so limited to use in mathematical operations related to training a model and performing inferences on input data. These mathematical operations may be performed on various types of numerical data with varying complexity. Generally, the complexity of these operations may scale with the bit size of the data and the type of the data. For example, operations using 8-bit integers may be less computationally complex than performing an inference using larger sized integers, such as 64-bit integers. Similarly, operations using a given bit size of integers may be less computationally complex than operations using the given bit size of floating point numbers (e.g., operations performed using 32-bit integers may be less computationally complex than operations using 32-bit floating point numbers, even though the data is the same size in bits).

[0005] Power utilization, thermal output, and processing time generally scale with computational complexity. That is, less computationally complex operations generally consume less power and are completed more quickly than more computationally complex operations. Consequently, the execution of more computationally complex operations may result in reduced battery life and delays in the ability to reassign computing resources (e.g., compute cores on a processor, memory, etc.) to other tasks executing on a device.

[0006] Accordingly, what is needed are improved techniques for performing MAC operations more efficiently.BRIEF SUMMARY

[0007] Certain aspects of the present disclosure are directed to an artificial neural network device. The artificial neural network device may include at least one artificial input neuron configured to transmit a plurality of phase-shifted RF signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams. The artificial neural network device may also include at least one artificial output neuron configured to: receive the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas and generate a plurality of digital output signals corresponding to the plurality of input signals.

[0008] Certain aspects of the present disclosure are directed to a method for operating an artificial neural network device. The method may include transmitting, from at least one artificial input neuron of the ANN, a plurality of phase-shifted RF signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams, receiving, at least one artificial output neuron of the ANN, the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas, and generating, at the at least one artificial output neuron of the ANN, a plurality of digital output signals corresponding to the plurality of input signals.

[0009] Other aspects provide processing systems configured to perform the aforementioned methods as well as those described herein; non-transitory, computer- readable media comprising instructions that, when executed by one or more processors of a processing system, cause the processing system to perform the aforementioned methods as well as those described herein; a computer program product embodied on a computer readable storage medium comprising code for performing the aforementionedmethods as well as those further described herein; and a processing system comprising means for performing the aforementioned methods as well as those further described herein.

[0010] The following description and the related drawings set forth in detail certain illustrative features of one or more aspects.BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG. 1 illustrates an example artificial neuron, according to certain aspects presented herein.

[0012] FIG. 2 illustrates an example block-level hardware implementation of the artificial neuron of FIG. 1.

[0013] FIG. 3 is a block diagram of an example artificial neural network device configured to implement a beam artificial neural network, according to certain aspects presented herein.

[0014] FIG. 4 illustrates another embodiments of the artificial neural network device including a plurality of non-linear components, according to certain aspects presented herein.

[0015] FIG. 5 illustrates another embodiments of the artificial neural network device in which different sets of phase shifts are used, according to certain aspects presented herein.

[0016] FIG. 6 illustrates another embodiments of the artificial neural network device including a plurality of signal attenuators, according to certain aspects presented herein.

[0017] FIG. 7 illustrates additional layers of the artificial neural network device, according to certain aspects presented herein.

[0018] FIG. 8 is a flow diagram illustrating operations for operating the artificial neural network device, according to certain aspects presented herein.

[0019] FIG. 9 illustrates a processing system that may include various components configured to perform operations for the techniques disclosed herein in accordance with aspects of the present disclosure.DETAILED DESCRIPTION

[0020] Certain aspects of the present disclosure relate to a beam artificial neural network (BNN) architecture. For example, artificial neural networks may be used to make predictions or inferences about certain input data or signals, such as for facial recognition, autonomous driving, medical diagnosis, etc. Traditional artificial neural networks (ANNs) operate by multiplying different weights with a set of input signals, summing the weighted input signals, and applying a non-linear function, known as an activation function, to the summed weighted input signals to obtain one or more output signals Y representing an inference or prediction about the set of input signals.

[0021] However, these multiplication and summation operations consume a significant amount of power, which poses a significant barrier in artificial intelligence (Al) mass adoption. Accordingly, aspects of the present disclosure provide techniques for reducing power consumption associated with artificial neural networks. In some cases, these techniques include a BNN configured to reduce power consumption by avoiding the multiplication of input signals and weights and the summation of weighted inputs. For example, rather than implementing power-hungry multipliers to multiply weights and corresponding input signals to generate a plurality of weighted input signals, the BNN may be configured to use a plurality of phase shifters to individually shift phases of the corresponding input signals, which include less logic components and consume significantly less power than multipliers.

[0022] Additionally, rather than implementing power-hungry adders to sum the weighted input signals, the phase-shifted input signals of the BNN may interact with each other when wirelessly transmitted via the plurality of transmit antennas. This interaction between the phase-shifted input signals may result in the phase-shifted input signals effectively being summed over the air, thereby avoiding the need for adders (and included logical components) and reducing power consumption relative to traditional ANNs.

[0023] The detailed description set forth below, in connection with the appended drawings, is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. Insome instances, well-known structures and components are shown in block diagram form in order to avoid obscuring such concepts.

[0024] Based on the teachings, one skilled in the art should appreciate that the scope of the disclosure is intended to cover any aspect of the disclosure, whether implemented independently of or combined with any other aspect of the disclosure. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth. In addition, the scope of the disclosure is intended to cover such an apparatus or method practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the disclosure set forth. It should be understood that any aspect of the disclosure disclosed may be embodied by one or more elements of a claim.

[0025] The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

[0026] Although particular aspects are described herein, many variations and permutations of these aspects fall within the scope of the disclosure. Although some benefits and advantages of the preferred aspects are mentioned, the scope of the disclosure is not intended to be limited to particular benefits, uses or objectives. Rather, aspects of the disclosure are intended to be broadly applicable to different technologies, system configurations, networks and protocols, some of which are illustrated by way of example in the figures and in the following description of the preferred aspects. The detailed description and drawings are merely illustrative of the disclosure rather than limiting, the scope of the disclosure being defined by the appended claims and equivalents thereof.

[0027] In biological neurons, an output spike generated when a neuron fires is referred to as an action potential. This electrical signal is a relatively rapid, transient, nerve impulse, having an amplitude of roughly 100 mV and a duration of about 1 ms. In a particular embodiment of a neural system having a series of connected neurons, every action potential has basically the same amplitude and duration, and thus, the information in the signal may be represented only by the frequency and number of spikes, or the time of spikes, rather than by the amplitude. The information carried by an action potential may be determined by the spike, the neuron that spiked, and the time of the spike relativeto other spike or spikes. The importance of the spike may be determined by a weight applied to a connection between neurons, as explained below.

[0028] The transfer of spikes from one level of neurons to another may be achieved through the network of synaptic connections (or simply “synapses”). Relative to the synapses, neurons occurring before the synapses may be considered presynaptic neurons while neurons occurring after the synapses may be considered postsynaptic neurons. The postsynaptic neurons may receive output signals (i.e., spikes) from the presynaptic neurons and scale those signals according to adjustable synaptic weights wi(1,1+1), . . . , wp(1,1+1)where P is a total number of synaptic connections between the presynaptic neurons and postsynaptic neurons and i is an indicator of the neuron level. Further, the scaled signals may be combined as an input signal of each postsynaptic neuron. Every postsynaptic neuron may generate output spikes based on the corresponding combined input signal. The output spikes may be transferred to another level of neurons using another network of synaptic connections.

[0029] Biological synapses can mediate either excitatory or inhibitory (hyperpolarizing) actions in postsynaptic neurons and can also serve to amplify neuronal signals. Excitatory signals depolarize the membrane potential (i.e., increase the membrane potential with respect to the resting potential). If enough excitatory signals are received within a certain time period to depolarize the membrane potential above a threshold, an action potential occurs in the postsynaptic neuron. In contrast, inhibitory signals generally hyperpolarize (i.e., lower) the membrane potential. Inhibitory signals, if strong enough, can counteract the sum of excitatory signals and prevent the membrane potential from reaching a threshold. In addition to counteracting synaptic excitation, synaptic inhibition can exert powerful control over spontaneously active neurons. A spontaneously active neuron refers to a neuron that spikes without further input, for example due to its dynamics or a feedback. By suppressing the spontaneous generation of action potentials in these neurons, synaptic inhibition can shape the pattern of firing in a neuron, which is generally referred to as sculpturing. The various synapses may act as any combination of excitatory or inhibitory synapses, depending on the behavior desired.

[0030] Recently, biological neurons and synapses have been modeled in artificial neural networks using non-biological components.

[0031] In some cases, artificial neural networks may be emulated, for example, by a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a graphics processing unit (GPU), or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components, a software module executed by a processor, or any combination thereof.

[0032] FIG. 1 illustrates an example artificial neuron 100 that may be implemented in an artificial neural network (ANN), according to certain aspects presented herein. As illustrated, the artificial neuron 100 may receive a plurality of inputs (e.g., XA-XN), which may be summed to produce an output. Typically, a different weight (e.g., WA-WN) may be separately applied to each input to modify the importance of each of the inputs. The sum of the weighted inputs may be passed through a non-linear function (e.g., F), known as an activation function or transfer function, to produce an output Y of the artificial neuron 100.

[0033] The artificial neuron 100 may be one of many artificial neurons of the ANN, which may be organized into layers. By adjusting weights of connections between artificial neurons in different layers of the ANN during a training process, the ANN may learn to map the input data to desired outputs, enabling them to make inferences or predictions, classify objects, or recognize patterns in various domains such as image and speech recognition, natural language processing, and even medical diagnosis.

[0034] In the modern artificial intelligence (AI) / machine learning engines that use artificial neural networks, neurons may be implemented using a multiply-accumulate (MAC) component. For example, FIG. 2 illustrates a block diagram of a MAC component 200 that may be used to implement the artificial neuron 100 illustrated in FIG. 1 of an ANN. As illustrated, the MAC component 200 may include by one or more multipliers 202a-202n, an adder 204, and a non-linear activation function 206. Further, as illustrated, each multiplier, such as multiplier 202a, may receive an input (e.g., XA) and a weight (e.g., WA). The multiplier 202a may then multiply the input and the weight to generate a weighted input. The weighted input from each multiplier 202a-202n may then be passed to the adder 204, which sums all of the weighted inputs. The sum of the weighted inputs may then be passed through a non-linear activation function 206 to generate an output of the MAC component 200 of the artificial neuron 100.Aspects Related to Beam Neural Networks

[0035] As noted above, ANNs may be used to make inferences or predictions about input data, such as for image and speech recognition, natural language processing, and even medical diagnosis. One major issue with operating an ANN today is very high power consumption and hardware complexity associated with the multipliers 202a-202n and the adder 204 of each artificial neuron 100 implemented within the ANN. Not only do does the ANN, itself, consume a very high amount of power, but there is also a significant power expenditure associated with cooling the ANN to prevent overheating and ultimately electrical failure. While there have been huge advancements in the application of ANNs to solve real world problems, the high power consumption poses a significant barrier in Al mass adoption.

[0036] These issues with power consumption have led to additional research aimed at finding more power efficient artificial neural network solutions, one solution of which includes spiking neural networks (SNNs) inspired by the way a human brain works. For example, SNNs use integrate-and-fire spiking neurons that exchange information via pulses or spikes. Because SNNs are active relatively sparsely (e.g., when spikes occur), power consumption may be less in SSNs. However, the reduction in power consumption that SNNs may provide is currently inhibited by a need to allow for tens and hundreds of spikes before converging to effectively one neuron in an equivalent ANN.

[0037] Accordingly, aspects of the present disclosure provide techniques for reducing power consumption associated with artificial neural networks. In some cases, these techniques include a beam-based artificial neural network (BNN) configured to reduce power consumption by avoiding the use of multipliers (e.g., multipliers 202a-202n) and adders (e.g., adder 204). For example, rather than implementing power-hungry multipliers to multiply weights and corresponding input signals to generate a plurality of weighted input signals, the BNN may be configured to use a plurality of phase shifters to individually shift phases of the corresponding input signals, which include less logic components and consume significantly less power than multipliers. These phase-shifted input signals may then be wirelessly transmitted using a plurality of transmit antennas and received by a plurality of receive antennas.

[0038] Further, rather than implementing power-hungry adders (e.g., adder 204) to sum the weighted input signals, the phase-shifted input signals of the BNN may interactwith each other when wirelessly transmitted via the plurality of transmit antennas. This interaction between the phase-shifted input signals may result in the phase-shifted input signals effectively being summed over the air, thereby avoiding the need for adders (and included logical components) and reducing power consumption relative to traditional ANNs.

[0039] FIG. 3 illustrates a block diagram of an example artificial neural network device 300 configured to implement a BNN, in accordance with certain aspects of the present disclosure. In some cases, the artificial neural network device 300 may be configured to make predictions or inferences about input data based on a trained model. For example, in some cases, the trained model of the artificial neural network device 300 may be trained to make predictions or inferences for (1) image recognition and computer vision (e.g., image classification, object detection, facial recognition, and image generation), (2) natural language processing (e.g., language translation, sentiment analysis, text generation, and speech recognition), (3) healthcare (e.g., medical image analysis, disease diagnosis, drug discovery, and predicting patient outcomes from medical records), (4) autonomous vehicles (e.g., interpreting sensor data, making real-time decisions, and autonomous navigating), etc.

[0040] As shown, the artificial neural network device 300 includes a simplistic two- layer BNN, comprising an input layer 302 and an output layer 304. The input layer 302 may correspond to an artificial input neuron while the output layer 304 may correspond to an artificial output neuron. While only two layers and two artificial neurons are illustrated in FIG. 3, the artificial neural network device 300 may include a BNN having additional layers and artificial neurons.

[0041] As will be described in greater detail below, the artificial input neuron in the input layer 302 may be configured to transmit a plurality of phase-shifted radio frequency (RF) signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams. Correspondingly, the artificial output neuron in the output layer 304 may be configured to receive the plurality of phase-shifted RF signals from the artificial input neuron using a plurality of receive antennas and generate a plurality of digital output signals corresponding to the plurality of input signals.

[0042] In some cases, the artificial neural network device 300 may be implemented in an RF transceiver. For example, in some cases, the artificial input neuron in the inputlayer 302 may be implemented by one or more transmit chains in the RF transceiver and the artificial output neuron in the output layer 304 may be implemented by one or more receive chains the RF transceiver. In some cases, the one or more transmit chains of the RF transceiver may be positioned adjacent to and facing the one or more receive chains such that wireless transmitted phase-shifted RF signals from the one or more transmit chains may be directly received by the one or more receive chains.

[0043] As shown, the artificial input neuron in input layer 302 (e.g., transmit chain) includes a plurality of digital -to-analog converters (DACs) 306A-N, a first plurality of local oscillators (LOs) 308A-N, a plurality of phase shifters 310A-N, and a plurality of transmit antennas 312A-N, where A and N are positive whole numbers. Additionally, as shown, the artificial output neuron in the output layer 304 (e.g., receive chain) includes a plurality of receive antennas 314A-M, a second plurality of LOs 316A-M, and a plurality of analog-to- digital converters (ADCs) 318A-M, where A and M are positive whole numbers.

[0044] As shown, each DAC of the plurality of DACs 306A-N is configured to obtain a respective digital input signal of a plurality of digital input signals XA-N. For example, as shown , a first DAC 306A may be configured to receive a first digital input signal XA, a second DAC 306B may be configured to receive a second digital input signal XB, and an N* DAC 306N may be configured to receive an N* digital input sequence XN, where N is a positive whole number. In some cases, the digital input signals may include data for which a prediction or inference is to be made using the trained model of the BNN of the artificial neural network device 300. For example, in some cases, the digital input signals may include image or video data that is input into the BNN of the artificial neural network device 300 for facial recognition, medical diagnosis, etc., as described above.

[0045] Further, after receiving the respective digital input signals, each DAC of the plurality of DACs 306A-N may be configured to convert the respective digital input signal to a respective analog radio frequency (RF) signal. For example, converting a digital input signal may involve converting binary values, such as zeros and / or ones, into a continuous analog RF signal according to a particular sampling rate.

[0046] Thereafter, each DAC of the plurality of DACs 306A-N may be configured to output the respective analog RF signals to a respective phase shifter of the plurality of phase shifters 310A-N. For example, the first DAC 306A may be configured to output afirst analog RF signal to a first phase shifter 310A, the second DAC 306B may be configured to output a second analog RF signal to a second phase shifter 310B, and so on.

[0047] As noted above, the artificial input neuron in the input layer 302 includes the first plurality of LOs 308A-N. The first plurality of LOs 308A-N may be configured to up- convert the respective analog RF signals output by each of the DACs of the plurality of DACs 306A-N to a higher frequency relative to a frequency at which the respective analog RF signals are output by the DACs of the plurality of DACs 306A-N. For example, in some cases, the first analog RF signal may be output by the first DAC 306A at a first frequency. Thereafter, a first LO 308A may output a continuous sinusoidal signal with a second frequency that is higher than the first frequency of the first analog RF signal. A mixer 320 may then be used to mix the first analog RF signal with the continuous sinusoidal signal output by the first LO 308A to up-convert the frequency of the first analog RF signal to third frequency, representing the sum of the first frequency of the first analog RF signal and the second frequency of the continuous sinusoidal signal. As such, the third frequency is a higher frequency relative to the first frequency of the first analog RF signal.

[0048] After receiving the (up-converted) respective analog RF signals, each respective phase shifter of the plurality of phase shifters 310A-N is configured to apply a respective phase shift to the respective analog RF signal associated with that respective phase shifter to generate a respective phase-shifted RF signal of a plurality of phase- shifted RF signals. In some cases, each phase shifter of the plurality of phase shifters 310A-N may include one or more delay elements configured to introduce a controlled delay of a respective analog RF signal, resulting in a phase shift of the respective analog RF signal. For example, a first phase shifter 310A may be configured to apply a first phase shift WA to the first respective analog RF signal output from the first DAC 306A, a second phase shifter 310B may be configured to apply a second phase shift WB to the second respective analog RF signal output from the second DAC 306B, and so on.

[0049] In some cases, each of the respective phase shifts may represent or correspond to a respective weight of the trained model of the artificial neural network device 300. As shown, there may be N number of phase shifts or weights, where A is a positive whole number. In some cases, when the BNN implemented by the artificial neural network device is fully connected, a total number of phase shifts or weights may be equal to N * M, where M is a total number of digital output signals Y.

[0050] As noted above, shifting the phases of the respective analog RF signals may consume significantly less power as compared to using a multiplier to multiply a respective weight with a respective input signal, such as the multipliers 202a-202n illustrated in FIG. 2. For example, multipliers may include significantly more logical components that collectively consume a significantly more power as compared to the one or more delay elements within the plurality of phase shifters 310A-N used to introduce the controlled delay to shift the phase of the respective analog RF signals. As a result, a power consumption of the artificial neural network device 300 may be reduced relative to the MAC component 200 illustrated in FIG. 2 which is configured with and uses multipliers to multiply respective weights with respective input signals.

[0051] After shifting the phases of the respective analog RF signals, each respective phase shifter of the plurality of phase shifters 310A-N may output the respective phase- shifted RF signal associated with that respective phase shifter to a respective transmit antenna of the plurality of transmit antennas 312A-N. For example, a first phase-shifted analog RF signal may be output from the first phase shifter 310A to a first transmit antenna 312A, a second phase-shifted analog RF signal may be output from the second phase shifter 310B to a second transmit antenna 312B, and so on.

[0052] Thereafter, each respective transmit antenna of the plurality of transmit antennas 312A-N is configured to wirelessly transmit the respective phase-shifted RF signal associated with that respective transmit antenna to the plurality of receive antennas 312A-M using a respective transmit beam of a plurality of transmission beams 322A-N. For example, as shown, the first phase-shifted analog RF signal may be wirelessly transmitted using a first transmit antenna 312A and a first transmit beam 322A, the second phase- shifted analog RF signal may be wirelessly transmitted using a second transmit antenna 312B and a second transmit beam 322B, and so on.

[0053] As shown, each transmit beam of the plurality of transmission beams 322A-N may be transmitted in a different spatial direction, which may be controlled based on the respective phase shifts associated with the respective phase-shifted RF signals. For example, the spatial direction of the first transmit beam 322A may be controlled based on the first phase shift associated with the first respective phase-shifted RF signal, the spatial direction of the second transmit beam 322B may be controlled based on the second phase shift associated with the second respective phase-shifted RF signal, and so on.

[0054] In some cases, each respective phase-shifted RF signal of the plurality of phase-shifted RF signals may be transmitted by one of the transmit antennas of the plurality of transmit antennas 312A-N at a same time. As a result, the respective phase- shifted RF signals may combine with each other over the air, effectively resulting in a summation of the respective phase-shifted RF signals over the air. Because the respective phase-shifted RF signals may be summed over the air, the artificial neural network device 300 may not require an adder, such as the adder 204 illustrated in FIG. 2, which may further reduce power consumption of the artificial neural network device 300 (e.g., relative to the MAC component 200 illustrated in FIG. 2).

[0055] As a result of this over-the-air summation and based on positions of the transmit antennas of the plurality of transmit antennas 312A-N relative to positions of the receive antennas of the plurality of receive antennas 314A-M, each receive antenna of the plurality of receive antennas 314A-M may be configured to receive a different respective composite analog RF signal from the plurality of transmit antennas 312A-N. For example, each different composite analog RF signal may be based on a different combination of the respective phase-shifted RF signals (and their associated phases) transmitted by the respective transmit antennas of the plurality of transmit antennas 312A-N. For example, due to the positions of each transmit antenna of the plurality of transmit antennas 312A-N relative to a position of a first receive antenna 314A, the first receive antenna 314A may be configured to receive a first composite analog RF signal. Similarly, due to the positions of each transmit antenna of the plurality of transmit antennas 312A-N relative to a position of a second receive antenna 314M, the second receive antenna 314M may be configured to receive a second composite analog RF signal.

[0056] After receiving the different respective composite analog RF signals, each respective receive antenna of the plurality of receive antennas 314A-M may output the different respective composite analog RF signals associated with that respective antenna to a respective ADC of the plurality of ADCs 318A-M. For example, the first receive antenna 314A may be configured to output the first composite analog RF signal to a first ADC 318A and the second receive antenna 314M may be configured to output the second composite analog RF signal to a second ADC 318M.

[0057] As noted above, the artificial output neuron in the output layer 304 includes the second plurality of LOs 316A-M. In some cases, prior to being obtained by the respective ADCs, the second plurality of LOs 316A-M may be configured to down-convertthe respective composite analog RF signals output by each of the receive antenna of the plurality of receive antennas 314A-M to a lower frequency relative to a frequency at which the respective composite analog RF signals are received and output by the receive antennas of the plurality of receive antennas 314A-M. For example, in some cases, the first composite analog RF signal may be received and output by the first receive antenna 314A at a first frequency. Thereafter, a first LO 316A may output a continuous sinusoidal signal with a second frequency that is lower than the first frequency of the first composite analog RF signal. A mixer 324 may then be used to mix the first composite analog RF signal with the continuous sinusoidal signal output by the first LO 316A to down-convert the frequency of the first composite analog RF signal to third frequency, representing the sum of the first frequency of the first composite analog RF signal and the second frequency of the continuous sinusoidal signal. As such, the third frequency is a lower frequency relative to the first frequency of the first composite analog RF signal.

[0058] As shown, each respective ADC of the plurality of ADCs 318A-M is configured to obtain the (down-converted) different respective composite analog RF signal from the receive antenna associated with that respective ADC. Thereafter, each respective ADC of the plurality of ADCs 318A-M is configured to convert the (down-converted) different respective composite analog RF signal obtained from the receive antenna associated with that respective ADC to a respective digital output signal of the plurality of digital output signals YA-M. In some cases, the respective digital output signals may represent a prediction or inference about the plurality of digital input signals XA-N resulting from application of the respective phase shifts or weights of the trained model of the artificial neural network device 300.

[0059] In some cases, due to the over-the-air summation described above, each digital output signal of the plurality of digital output signals YA-M may represent a sum of the digital input signals modified by the different respective phase shifts applied by the plurality of phase shifters 310A-N and modified by different relative distances between the receive antennas of the plurality of receive antennas 314A-M and transmit antennas of the plurality of transmit antennas 312A-N. For example, a first respective digital output signal YA may be associated with the first receive antenna 314A of the plurality of receive antennas 314A-M. Further, as shown, the first receive antenna 314A has a different relative distance (e.g., dA, dn, ..., d\) to each respective transmit antenna (e.g., 312A, 312B, ..., 312N) of the plurality of transmit antennas 312A-N. AS a result, the first respective digitaloutput signal YA output by the first ADC 3 18A is a sum of the respective digital input signals XA-N modified by the different respective phase shifts (e.g., the first phase shift associated with the first phase shifter 3 10A, the second phase shift associated with the second phase shifter 3 10B, etc.), and the different relative distances (e.g., dA, dB, ..., d\) of the first receive antenna 314A to each respective transmit antenna (e.g., 312A, 312B, ..., 312N) of the plurality of transmit antennas 312A-N.

[0060] As noted above, in a conventional ANN, such as the ANN described with respect to FIG. 1 and FIG. 2, weighted input signals may be summed and passed through a non-linear function (e.g., F), known as an activation function or transfer function, to produce an output Y. Application of this non-linear function is a crucial step that allows the ANNs to capture and model complex relationships in input data. For example, many real-world problems involve complex and nonlinear relationships between input signals and a desired output. Linear combinations of the input signals may only model linear relationships, which may not be sufficient to capture the intricacies of underlying data patterns in the input signals. Conversely, non-linear activation functions introduce an ability to represent more complex relationships, enabling ANNs to learn and generalize from data more effectively.

[0061] In some cases, this non-linear function may be implemented in different manners in the BNN of the artificial neural network device 300. For example, in some cases, each respective ADC of the plurality of ADCs 3 18A-M may be configured to clip the different composite analog RF signal associated with that respective ADC to introduce a non-linearity in the different composite analog RF signal and respective output signal associated with that respective ADC. For example, in some cases, the first ADC 3 18A may be configured to clip a frequency of the first composite analog RF signal at a certain level to introduce non-linearity in the first composite analog RF signal and the first output signal YA.

[0062] In some cases, this non-linearity may be introduced my one or more non-linear components of the artificial neural network device 300. For example, FIG. 4 illustrates another embodiment of the artificial neural network device 300. As shown in the embodiment of FIG. 4, the output layer 304 of the artificial neural network device 300 may include a plurality of non-linear components 326A-M. In some cases, the plurality of non-linear components 326A-M may be configured to introduce a non-linearity (e.g., similar to the non-linear function F, described above) within the respective digitaloutput signals of the plurality of digital output signals YA-M. For example, the non-linear components 326A may be configured to introduce a non-linearity into the first composite analog RF signal prior to being processed by the first ADC 318A and output as the first output signal YA. In some cases, the plurality of non-linear components326A-M may comprise at least one of a plurality of low noise amplifiers (LNAs), a plurality of power amplifiers (PAs), or the plurality of ADCs 318A-M.

[0063] In some cases, one set of phase shifts or weights applied by the plurality of phase shifters 310A-N may be used for all of the plurality of output signals YA-M. In other cases, different sets of phase shifts or weights may be applied by the plurality of phase shifters 310A-N and shared among different groups of the plurality of output signals YA-M. An example of using different sets of phase shifts or weights is illustrated in FIG. 5

[0064] For example, the plurality of phase shifters 310A-N illustrated in FIG. 3 may comprise at least a first set of phase shifters and a second set of phase shifters. For example, as shown in FIG. 5, the first set of phase shifters may include a first phase shifter 310A and a second phase shifter 310B. The second set of phase shifters may include a third phase shifter 310c and a fourth phase shifter 310D. In some cases, the first set of phase shifters 310A, 310B may be configured to apply a first set of phase shifts WI,A and WI,B to the respective analog RF signals output from the first DAC 306A and the second DAC 306B, respectively, that correspond to a first set of digital input signals XA and XB. For example, the first set of phase shifters 310A, 310B may be configured to apply the first set of phase shifts Wi.Aand WI.B to the respective analog RF signals to generate a first set of phase-shifted RF signals of the plurality of phase-shifted RF signals described above with respect to FIG. 3.

[0065] Similarly, the second set of phase shifters 310c, 310D may be configured to apply a second set of phase shifts W2,Aand W2,B to the respective analog RF signals output from a third DAC 306c and a fourth DAC 306D, respectively, that correspond to a first set of digital input signals Xc and XD. For example, the second set of phase shifters 310c, 310D may be configured to apply a second set of phase shifts W2,A and W2,B to the respective analog RF signals to generate a second set of phase-shifted RF signals of the plurality of phase-shifted RF signals described above with respect to FIG. 3. In some cases, the first set of phase shifts (e.g., Wi.A and WI,B) may be different from the second set of phase shifts (e.g., W2,Aand W2 ). In some cases, when different sets of phase shifts or weights are used, a total number of trainable weights / phase shifts in the BNNimplemented by the artificial neural network device 300 may comprise 2*N phase shifts or weights.

[0066] As shown in FIG. 5, the plurality of ADCs 3 18A-M of FIG. 3 may include a first ADC 3 18A, a second ADC 318B, a third ADC 318c, and a fourth ADC 3 18D. Similarly, as shown in FIG. 5, the plurality of receive antennas 3 14A-M of FIG. 3 may include a first receive antenna 3 14A, a second receive antenna 3 14B, a third receive antenna 314c, and a fourth receive antenna 3 14D. In some cases, when different sets of phase shifts or weights are used, the artificial neural network device 300 may selectively apply these different sets of phase shifts or weights to different groups of digital output signals. In some cases, selectively applying the different sets of phase shifts or weights to the different groups of digital output signals may involve the artificial neural network device 300 selectively putting different groups of ADCs into a powered on state or a powered off state. In some cases, the artificial neural network device 300 may selectively put the different groups of ADCs into the powered on state or the powered off state based on control signaling from, for example, one or more processors associated with the artificial neural network device 300.

[0067] For example, in some cases, a first set of ADCs, such as the first ADC 3 18A and the second ADC 3 18B, may be configured to obtain the first set of phase-shifted RF signals from a first set of receive antennas of the plurality of receive antennas, such as the first receive antenna 3 14A and the second receive antenna 3 14B. Additionally, a second set of ADCs, such as the third ADC 318c and the fourth ADC 3 18D, may be configured to obtain the second set of phase-shifted RF signals from a second set of receive antennas of the plurality of receive antennas, such as the third receive antenna 314c and the fourth receive antenna 3 14D.

[0068] In such cases, when obtaining the first set of phase-shifted RF signals (e.g., which are generated based on the first set of phase shifts Wi.A and WI,B), the first set of ADCs (e.g., the first ADC 3 18A and the second ADC 3 18B) may be configured to be in a powered on state and the second set of ADCs (e.g., the third ADC 318c and the fourth ADC 3 18D) is configured to be in a powered off state. Similarly, when obtaining the second set of phase-shifted RF signals (e.g., which are generated based on the second set of phase shifts WI,A and W2 ), the second set of ADCs (e.g., the third ADC 318c and the fourth ADC 318D) is configured to be in the powered on state and the first set of ADCs(e.g., the first ADC 318A and the second ADC 318B) is configured to be in the powered off state.

[0069] As a result of the different sets of phase shifts or weights and selectively putting the different sets of ADCs in the powered on state and powered off state, a first group of digital output signals, such as a first digital output signal YA and a second digital output signal YB, may be associated with the first set of phase shifts Wi.A and WI,B. Similarly, a second group of digital output signals, such as a third digital output signal Yc and a fourth digital output signal YD, may be associated with the second set of phase shifts W2,Aand W2,B.

[0070] In some cases, the artificial neural network device 300 may also include a plurality of signal attenuators that may function as an additional set of weights or trainable parameters (e.g., a level of attenuation) for the BNN implemented in the artificial neural network device 300. For example, as shown in FIG. 6, the at least one artificial output neuron in the output layer 304 further includes a first plurality of signal attenuators 330A- M configured to attenuate the respective composite analog RF signals, received from the plurality of receive antennas 314A-M, prior to being obtained by the respective ADCs of the plurality of ADCs 318A-M. In some cases, the artificial input neuron in the input layer 302 may further comprise a second plurality of signal attenuators 332A-N that may be placed before the plurality of phase shifters 310A-N and configured to attenuate at least one of the respective analog RF signals after being output by the plurality of DACs 306A- N, as shown in FIG. 6. In some cases, the second plurality of signal attenuators 332A-N may be placed after the plurality of phase shifters 310A-N and configured to attenuate the respective phase-shifted RF signals after being output by the respective phase shifters of the plurality of phase shifters 310A-N.

[0071] As noted above, while only two layers and two artificial neurons are illustrated in FIG. 3, the artificial neural network device 300 may include a BNN having one or more intermediate layers. For example, as illustrated in FIG. 7, the artificial neural network device 300 may include an intermediate layer 702 disposed between the input layer 302 and the output layer 304. While only one intermediate layer 702 is illustrated, it should be understood that the artificial neural network device 300 may include any number of intermediate layers.

[0072] As shown, the artificial input neuron in the input layer 302 is configured to generate a phase-shifted RF signal based on a digital input signal XA using the phase shifter 3 10A. Thereafter, the phase-shifted RF signal may be wirelessly transmitted using the transmit antenna 312A to an intermediate artificial neuron in the intermediate layer 702. The phase-shifted RF signal may be received by the intermediate layer 702 using a receive antenna 704. Thereafter, the phase-shifted RF signal received from the input layer 302 may be used as an input signal in the intermediate layer 702. For example, as shown, the phase-shifted RF signal may be input into a phase shifter 706 configured to apply another phase shift to the phase-shifted RF signal. In some cases, as shown, the phase shift applied by the phase shifter 706 (e.g., WA,2) in the intermediate layer 702 may be different from a phase shift applied by the phase shifter 3 10A (e.g., WA,I) in the input layer 302 as well as other phase shifts applied by phase shifters in other intermediate layers. Further, as shown, prior to being input into the phase shifter 706, the phase-shifted RF signal may be input into a power amplifier (PA) 708, which may be configured to amplify a power of the phase-shifted RF signal.

[0073] Thereafter, while not shown in FIG. 7, the (dually) phase-shifted RF signal may be wireless transmitted to one or more other intermediate layers configured to apply additional phase shifts. However, for simplicity, FIG. 7 illustrates the (dually) phase- shifted RF signal being wirelessly transmitted from the intermediate layer 702 to the artificial output neuron in the output layer 304. After receiving the (dually) phase-shifted RF signal from the intermediate layer 702, the artificial output neuron in the output layer 304 may process the (dually) phase-shifted RF signal using techniques described above to output a digital output signal YA.

[0074] FIG. 8 is a flow diagram illustrating operations 800 (e.g., for neural networks) for operating an artificial neural network (ANN) device, according to aspects of the present disclosure. The operations 800 may be performed, for example, by a processing system 900, such as a user equipment (UE) or other computing device, such as that illustrated in FIG. 9, on which operations are performed for various tasks. These operations may include, for example, operations defined for an artificial neural network which generates one or more inferences from input data or signals.

[0075] As illustrated, the operations 800 may begin at block 810 transmitting, from at least one artificial input neuron of the ANN, a plurality of phase-shifted RF signals,corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams.

[0076] The operations 800 continue in block 815 with receiving, at at least one artificial output neuron of the ANN, the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas.

[0077] The operations 800 continue in block 820 with generating, at the at least one artificial output neuron of the ANN, a plurality of digital output signals corresponding to the plurality of input signals.

[0078] In some cases, the at least one artificial input neuron comprises a plurality of digital-to-analog converters (DACs), a plurality of phase shifters, and the plurality of transmit antennas. In some cases, the at least one artificial output neuron comprises the plurality of receive antennas and a plurality of analog-to-digital converters (ADCs).

[0079] In some cases, operations 800 further include, at each DAC of the plurality of DACs, obtaining a respective digital input signal of the plurality of digital input signals, converting the respective digital input signal to a respective analog radio frequency (RF) signal, and outputting the respective analog RF signal to a respective phase shifter of the plurality of phase shifters. In some cases, each DAC of the plurality of DACs may be configured to receive the respective digital input signals from one or more processors, such as a central processing unit (CPU) 902, a graphics processing unit (GPU) 904, digital signal processor (DSP) 906, and / or neural processing unit (NPU) 908 of the processing system 900 described below with respect to FIG. 9.

[0080] In some cases, operations 800 further include, at each respective phase shifter of the plurality of phase shifters, applying a respective phase shift to the respective analog RF signal associated with that respective phase shifter to generate a respective phase- shifted RF signal of the plurality of phase-shifted RF signals and outputting the respective phase-shifted RF signal associated with that respective phase shifter to a respective transmit antenna of the plurality of transmit antennas. In some cases, the respective phase shifts correspond to a set of weights for an ANN implemented by the ANN device. In some cases, the respective phase shifts may be provided to each respective phase shifters by one or more processors, such as the CPU 902, the GPU 904, the DSP 906, and / or the NPU 908 of the processing system 900 described below with respect to FIG. 9. In somecases, the respective phase shifts may be stored in a memory, such as memory 924 of the processing system 900 described below with respect to FIG. 9.

[0081] In some cases, operations 800 further include, at each respective transmit antenna of the plurality of transmit antennas, wirelessly transmitting the respective phase- shifted RF signal associated with that respective transmit antenna to the plurality of receive antennas using a respective transmit beam of the plurality of transmission beams.

[0082] In some cases, operations 800 further include, at each receive antenna of the plurality of receive antennas, receiving a different respective composite analog RF signal from the plurality of transmit antennas, wherein each different composite analog RF signal is based on a different combination of the respective phase-shifted RF signals transmitted by the respective transmit antennas of the plurality of transmit antennas. In some cases, operations 800 further include, at each receive antenna of the plurality of receive antennas outputting the different respective composite analog RF signal associated with that respective antenna to a respective ADC of the plurality of ADCs.

[0083] In some cases, operations 800 further include, at each respective ADC of the plurality of ADCs, obtaining the different respective composite analog RF signal from the receive antenna associated with that respective ADC and converting the different respective composite analog RF signal obtained from the receive antenna associated with that respective ADC to a respective digital output signal of the plurality of digital output signals. In some cases, the respective digital output signals may be provided to another artificial input neuron of the ANN and / or may be provided to one or more processors for further processing, such as the CPU 902, the GPU 904, the DSP 906, and / or the NPU 908 of the processing system 900 described below with respect to FIG. 9.

[0084] In some cases, a first respective digital output signal is associated with a first receive antenna of the plurality of receive antennas. In some cases, the first receive antenna has a different relative distance to each respective transmit antenna of the plurality of transmit antennas. In some cases, the first respective digital output signal is a sum of the respective digital input signals modified by the different respective phase shifts and the different relative distances of the first receive antenna to each respective transmit antenna.

[0085] In some cases, operations 800 further include, at each respective ADC of the plurality of ADCs, clipping the different composite analog RF signal associated with thatrespective ADC to introduce a non-linearity in the different composite analog RF signal associated with that respective ADC.

[0086] In some cases, the at least one artificial output neuron comprises a plurality of non-linear components configured to introduce a non-linearity within the respective digital output signals of the plurality of digital output signals. In some cases, the plurality of non-linear components comprise at least one of a plurality of low noise amplifiers (LNAs), a plurality of power amplifiers (PAs), or the plurality of ADCs.

[0087] In some cases, the plurality of phase shifters comprises at least a first set of phase shifters and a second set of phase shifters. In some cases, operations 800 further include applying, using the first set of phase shifters, a first set of phase shifts to the respective analog RF signals, corresponding to a first set of digital input signals, to generate a first set of phase-shifted RF signals of the plurality of phase-shifted RF signals. In some cases, operations 800 further include applying, using the second set of phase shifters, a second set of phase shifts to the respective analog RF signals, corresponding to a second set of digital input signals, to generate a second set of phase-shifted RF signals of the plurality of phase-shifted RF signals, wherein the first set of phase shifts is different from the second set of phase shifts. In some cases, the first set of phase shifts and the second set of phase shifts may be stored in a memory, such as the memory 924, and provided to the first set of phase shifters and second set of phase shifters, respectively, by one or more processors, such as the CPU 902, the GPU 904, the DSP 906, and / or the NPU 908 of the processing system 900 described below with respect to FIG. 9.

[0088] In some cases, a first set of ADCs of the plurality of ADCs is configured to obtain the first set of phase-shifted RF signals from a first set of receive antennas of the plurality of receive antennas. In some cases, a second set of ADCs of the plurality of ADCs is configured to obtain the second set of phase-shifted RF signals from a second set of receive antennas of the plurality of receive antennas.

[0089] In some cases, when obtaining the first set of phase-shifted RF signals, the first set of ADCs is configured to be in a powered on state and the second set of ADCs is configured to be in a powered off state. In some cases, when obtaining the second set of phase-shifted RF signals, the second set of ADCs is configured to be in the powered on state and the first set of ADCs is configured to be in the powered off state. In some cases, one or more processors, such as the CPU 902, the GPU 904, the DSP 906, and / or the NPU 1908 of the processing system 900 described below with respect to FIG. 9, may be configured to output control signaling to control whether the first set of ADCs and the second set of ADCs are in the powered on state or the powered off state.

[0090] In some cases, the at least one artificial output neuron further comprises a plurality of signal attenuators. In some cases, operations 800 further include attenuating the respective composite analog RF signals prior to being obtained by the respective ADCs. In some cases, a level of attenuation applied to the composite analog RF signals may be controlled or set by one or more processors, such as the CPU 902, the GPU 904, the DSP 906, and / or the NPU 908 of the processing system 900 described below with respect to FIG. 9.

[0091] In some cases, the at least one artificial input neuron further comprises a plurality of signal attenuators. In some cases, operations 800 further include attenuating at least one of the respective analog RF signals after being output by the DACs or the respective phase-shifted RF signals after being output by the respective phase shifters. In some cases, a level of attenuation applied to the respective analog RF signals or the respective phase-shifted RF signals may be controlled or set by one or more processors, such as the CPU 902, the GPU 904, the DSP 906, and / or the NPU 908 of the processing system 900 described below with respect to FIG. 9.

[0092] In some cases, the at least one artificial output neuron further comprises a plurality of local oscillators (LOs). In some cases, operations 800 further include downconverting the respective composite analog RF signals to a lower frequency, relative to a frequency at which the respective composite analog RF signals are received, prior to being obtained by the respective ADCs.

[0093] In some cases, the at least one artificial input neuron further comprises a plurality of local oscillators (LOs). In some cases, operations 800 further include up- converting the respective analog RF signals to a higher frequency relative to a frequency at which the respective analog RF signals are output by the DACs.

[0094] FIG. 9 depicts an example processing system 900. In some cases, the processing system may be configured to perform one or more operations for operating an artificial neural network device, such as the operations 800 described with respect to FIG. 8

[0095] Processing system 900 includes the CPU 902, which in some examples may be a multi-core CPU. Instructions executed at the CPU 902 may be loaded, for example, from a program memory associated with the CPU 902 or may be loaded from a memory 924. In some cases, the instructions executed by the CPU 902 may cause the processing system 900 to perform one or more operations for operating an artificial neural network device, such as the operations 800 described with respect to FIG. 8.

[0096] Processing system 900 also includes additional processing components tailored to specific functions, such as the GPU 904, the DSP 906, the NPU 908, a multimedia component 910, and a wireless connectivity component 912.

[0097] An NPU, such as NPU 908, is generally a specialized circuit configured for implementing control and arithmetic logic for executing machine learning algorithms, such as algorithms for processing artificial neural networks (ANNs), deep neural networks (DNNs), random forests (RFs), and the like. An NPU may sometimes alternatively be referred to as a neural signal processor (NSP), tensor processing units (TPUs), neural network processor (NNP), intelligence processing unit (IPU), vision processing unit (VPU), or graph processing unit.

[0098] NPUs, such as NPU 908, are configured to accelerate the performance of common machine learning tasks, such as image classification, machine translation, object detection, and various other predictive models. In some examples, a plurality of NPUs may be instantiated on a single chip, such as a system on a chip (SoC), while in other examples the NPUs may be part of a dedicated neural -network accelerator.

[0099] NPUs may be optimized for training or inference, or in some cases configured to balance performance between both. For NPUs that are capable of performing both training and inference, the two tasks may still generally be performed independently.

[0100] NPUs designed to accelerate training are generally configured to accelerate the optimization of new models, which is a highly compute-intensive operation that involves inputting an existing dataset (often labeled or tagged), iterating over the dataset, and then adjusting model parameters, such as weights and biases, in order to improve model performance. Generally, optimizing based on a wrong prediction involves propagating back through the layers of the model and determining gradients to reduce the prediction error.

[0101] NPUs designed to accelerate inference are generally configured to operate on complete models. Such NPUs may thus be configured to input a new piece of data and rapidly process it through an already trained model to generate a model output (e.g., an inference).

[0102] In one implementation, NPU 908 is a part of one or more of CPU 902, GPU 904, and / or DSP 906.

[0103] In some examples, wireless connectivity component 912 may include subcomponents, for example, for third generation (3G) connectivity, fourth generation (4G) connectivity (e.g., 4G LTE), fifth generation connectivity (e.g., 5G or NR), Wi-Fi connectivity, Bluetooth connectivity, and other wireless data transmission standards. Wireless connectivity component 912 is further connected to one or more antennas 914.

[0104] Processing system 900 may also include one or more sensor processing units 916 associated with any manner of sensor, one or more image signal processors (ISPs) 918 associated with any manner of image sensor, and / or a navigation component 920, which may include satellite-based positioning system components (e.g., GPS or GLONASS) as well as inertial positioning system components.

[0105] Processing system 900 may also include one or more input and / or output devices 922, such as screens, touch-sensitive surfaces (including touch- sensitive displays), physical buttons, speakers, microphones, and the like.

[0106] In some examples, one or more of the processors of processing system 900 may be based on an ARM or RISC-V instruction set.

[0107] Further, as illustrated, processing system 900 may include the artificial neural network device 300 configured to implement the BNN described above with respect to FIGS. 3, 4, 5, 6, and 7. In some cases, the artificial neural network device 300 in combination with one or more processors, such as the CPU 902, the GPU 904, DSP 906, and / or NPU 908, may be configured to perform the operations 800 described with respect to FIG. 8

[0108] Processing system 900 also includes memory 924, which is representative of one or more static and / or dynamic memories, such as a dynamic random access memory, a flash-based static memory, and the like. In some cases, the memory 924 may include executable instructions that, when executed by one or more of the aforementionedprocessors, cause the processing system 900 to perform one or more operations for operating the artificial neural network device 300, such as the operations 800 described with respect to FIG. 8. Additionally, as noted above, in some cases, one or more phase shifts for the artificial neural network device 300 may be stored in the memory 924 and provided to the artificial neural network device 300 by one or more of the aforementioned processors.

[0109] Generally, processing system 900 and / or components thereof may be configured to perform the methods described herein.

[0110] Notably, in other aspects, features of processing system 900 may be omitted, such as where processing system 900 is a server computer or the like. For example, multimedia component 910, wireless connectivity component 912, sensor processing units 916, ISPs 918, and / or navigation component 920 may be omitted in other aspects. Further, aspects of processing system 900 may be distributed, such as training a model and using the model to generate inferences.Example Clauses

[0111] Implementation examples are described in the following numbered clauses:

[0112] Clause 1 : A method for operating an artificial neural network (ANN) device, comprising: transmitting, from at least one artificial input neuron of the ANN, a plurality of phase-shifted RF signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams; receiving, at at least one artificial output neuron of the ANN, the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas; and generating, at the at least one artificial output neuron of the ANN, a plurality of digital output signals corresponding to the plurality of input signals.

[0113] Clause 2: The method of Clause 1, wherein: the at least one artificial input neuron comprises: a plurality of digital-to-analog converters (DACs); a plurality of phase shifters; and the plurality of transmit antennas; and the at least one artificial output neuron comprises: the plurality of receive antennas; and a plurality of analog-to-digital converters (ADCs).

[0114] Clause 3: The method of Clause 2, further comprising, at each DAC of the plurality of DACs: obtaining a respective digital input signal of the plurality of digitalinput signals; converting the respective digital input signal to a respective analog radio frequency (RF) signal; and outputting the respective analog RF signal to a respective phase shifter of the plurality of phase shifters.

[0115] Clause 4: The method of Clause 3, further comprising, at each respective phase shifter of the plurality of phase shifters: applying a respective phase shift to the respective analog RF signal associated with that respective phase shifter to generate a respective phase-shifted RF signal of the plurality of phase-shifted RF signals; and outputting the respective phase-shifted RF signal associated with that respective phase shifter to a respective transmit antenna of the plurality of transmit antennas.

[0116] Clause 5: The method of Clause 4, wherein the respective phase shifts correspond to a set of weights for an ANN implemented by the ANN device.

[0117] Clause 6: The method of Clause 4, further comprising, at each respective transmit antenna of the plurality of transmit antennas, wirelessly transmitting the respective phase-shifted RF signal associated with that respective transmit antenna to the plurality of receive antennas using a respective transmit beam of the plurality of transmission beams.

[0118] Clause 7: The method of Clause 6, further comprising, at each receive antenna of the plurality of receive antennas: receiving a different respective composite analog RF signal from the plurality of transmit antennas, wherein each different composite analog RF signal is based on a different combination of the respective phase-shifted RF signals transmitted by the respective transmit antennas of the plurality of transmit antennas; and outputting the different respective composite analog RF signal associated with that respective antenna to a respective ADC of the plurality of ADCs.

[0119] Clause 8: The method of Clause 7, further comprising, at each respective ADC of the plurality of ADCs: obtaining the different respective composite analog RF signal from the receive antenna associated with that respective ADC; and converting the different respective composite analog RF signal obtained from the receive antenna associated with that respective ADC to a respective digital output signal of the plurality of digital output signals.

[0120] Clause 9: The method of Clause 8, wherein: a first respective digital output signal is associated with a first receive antenna of the plurality of receive antennas; thefirst receive antenna has a different relative distance to each respective transmit antenna of the plurality of transmit antennas; and the first respective digital output signal is a sum of the respective digital input signals modified by the different respective phase shifts and the different relative distances of the first receive antenna to each respective transmit antenna.

[0121] Clause 10: The method of Clause 8, further comprising, at each respective ADC of the plurality of ADCs, clipping the different composite analog RF signal associated with that respective ADC to introduce a non-linearity in the different composite analog RF signal associated with that respective ADC.

[0122] Clause 11 : The method of Clause 8, wherein: the at least one artificial output neuron comprises a plurality of non-linear components configured to introduce a nonlinearity within the respective digital output signals of the plurality of digital output signals; and the plurality of non-linear components comprise at least one of a plurality of low noise amplifiers (LNAs), a plurality of power amplifiers (PAs), or the plurality of ADCs.

[0123] Clause 12: The method of Clause 8, wherein: the plurality of phase shifters comprises at least a first set of phase shifters and a second set of phase shifters; and the method further comprises: applying, using the first set of phase shifters, a first set of phase shifts to the respective analog RF signals, corresponding to a first set of digital input signals, to generate a first set of phase-shifted RF signals of the plurality of phase-shifted RF signals; and applying, using the second set of phase shifters, a second set of phase shifts to the respective analog RF signals, corresponding to a second set of digital input signals, to generate a second set of phase-shifted RF signals of the plurality of phase- shifted RF signals, wherein the first set of phase shifts is different from the second set of phase shifts.

[0124] Clause 13: The method of Clause 12, wherein: a first set of ADCs of the plurality of ADCs is configured to obtain the first set of phase-shifted RF signals from a first set of receive antennas of the plurality of receive antennas; and a second set of ADCs of the plurality of ADCs is configured to obtain the second set of phase-shifted RF signals from a second set of receive antennas of the plurality of receive antennas.

[0125] Clause 14: The method of Clause 13, wherein: when obtaining the first set of phase-shifted RF signals, the first set of ADCs is configured to be in a powered on stateand the second set of ADCs is configured to be in a powered off state; and when obtaining the second set of phase-shifted RF signals, the second set of ADCs is configured to be in the powered on state and the first set of ADCs is configured to be in the powered off state.

[0126] Clause 15: The method of Clause 8, wherein: the at least one artificial output neuron further comprises a plurality of signal attenuators; and the method further comprises attenuating, using the plurality of signal attenuators of the at least one artificial output neuron, the respective composite analog RF signals prior to being obtained by the respective ADCs.

[0127] Clause 16: The method of Clause 8, wherein: the at least one artificial input neuron further comprises a plurality of signal attenuators; and the method further comprises attenuating, using the plurality of signal attenuators of the at least one artificial input neuron, at least one of the respective analog RF signals after being output by the DACs or the respective phase-shifted RF signals after being output by the respective phase shifters.

[0128] Clause 17: The method of Clause 8, wherein: the at least one artificial output neuron further comprises a plurality of local oscillators (LOs); and the method further comprises down-converting, using the plurality of LOs of the at least one artificial output neuron, the respective composite analog RF signals to a lower frequency, relative to a frequency at which the respective composite analog RF signals are received, prior to being obtained by the respective ADCs.

[0129] Clause 18: The method of Clause 8, wherein: the at least one artificial input neuron further comprises a plurality of local oscillators (LOs); and the method further comprises up-converting, using the plurality of LOs of the at least one artificial input neuron, the respective analog RF signals to a higher frequency relative to a frequency at which the respective analog RF signals are output by the DACs.

[0130] Clause 19: An apparatus, comprising: one or more memories comprising executable instructions; and one or more processors configured to execute the executable instructions and cause the apparatus to perform a method in accordance with any one of Clauses 1-18.

[0131] Clause 20: An apparatus, comprising means for performing a method in accordance with any one of Clauses 1-18.

[0132] Clause 21 : A non-transitory computer-readable medium comprising executable instructions that, when executed by one or more processors of an apparatus, cause the apparatus to perform a method in accordance with any one of Clauses 1-18.

[0133] Clause 22: A computer program product embodied on a computer-readable storage medium comprising code for performing a method in accordance with any one of Clauses 1-18.Additional Considerations

[0134] The preceding description is provided to enable any person skilled in the art to practice the various aspects described herein. The examples discussed herein are not limiting of the scope, applicability, or aspects set forth in the claims. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects. For example, changes may be made in the function and arrangement of elements discussed without departing from the scope of the disclosure. Various examples may omit, substitute, or add various procedures or components as appropriate. For instance, the methods described may be performed in an order different from that described, and various actions may be added, omitted, or combined. Also, features described with respect to some examples may be combined in some other examples. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. In addition, the scope of the disclosure is intended to cover such an apparatus or method that is practiced using other structure, functionality, or structure and functionality in addition to, or other than, the various aspects of the disclosure set forth herein. It should be understood that any aspect of the disclosure disclosed herein may be embodied by one or more elements of a claim.

[0135] The various illustrative logical blocks, modules and circuits described in connection with the present disclosure may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an ASIC, a field programmable gate array (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any commercially available processor, controller, microcontroller, or state machine. A processor may also be implemented as a combinationof computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, a system on a chip (SoC), or any other such configuration.

[0136] As used herein, “a processor,” “at least one processor” or “one or more processors” generally refers to a single processor configured to perform one or multiple operations or multiple processors configured to collectively perform one or more operations. In the case of multiple processors, performance of the one or more operations could be divided amongst different processors, though one processor may perform multiple operations, and multiple processors could collectively perform a single operation. Similarly, “a memory,” “at least one memory” or “one or more memories” generally refers to a single memory configured to store data and / or instructions, multiple memories configured to collectively store data and / or instructions.

[0137] As used herein, a phrase referring to “at least one of’ a list of items refers to any combination of those items, including single members. As an example, “at least one of: a, b, or c” is intended to cover a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiples of the same element (e.g., a-a, a-a-a, a-a-b, a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c or any other ordering of a, b, and c).

[0138] As used herein, the term “determining” encompasses a wide variety of actions. For example, “determining” may include calculating, computing, processing, deriving, investigating, looking up (e.g., looking up in a table, a database or another data structure), ascertaining and the like. Also, “determining” may include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory) and the like. Also, “determining” may include resolving, selecting, choosing, establishing and the like.

[0139] The methods disclosed herein comprise one or more actions for achieving the methods. The method actions may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of actions is specified, the order and / or use of specific actions may be modified without departing from the scope of the claims. Further, the various operations of methods described above may be performed by any suitable means capable of performing the corresponding functions. The means may include various hardware and / or software component(s) and / or module(s), including, but not limited to a circuit, an application specific integrated circuit (ASIC), or processor.

[0140] The following claims are not intended to be limited to the aspects shown herein, but are to be accorded the full scope consistent with the language of the claims. Within a claim, reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more.” Unless specifically stated otherwise, the term “some” refers to one or more. No claim element is to be construed under the provisions of 35 U.S.C. §112(f) unless the element is expressly recited using the phrase “means for”. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public regardless of whether such disclosure is explicitly recited in the claims.

Claims

CLAIMS1. An artificial neural network (ANN) device, comprising: at least one artificial input neuron configured to transmit a plurality of phase- shifted RF signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams; and at least one artificial output neuron configured to: receive the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas; and generate a plurality of digital output signals corresponding to the plurality of input signals.

2. The ANN device of claim 1, wherein: the at least one artificial input neuron comprises: a plurality of digital-to-analog converters (DACs); a plurality of phase shifters; and the plurality of transmit antennas; and the at least one artificial output neuron comprises: the plurality of receive antennas; and a plurality of analog-to-digital converters (ADCs).

3. The ANN device of claim 2, further comprising using each DAC of the plurality of DACs to: obtain a respective digital input signal of the plurality of digital input signals; convert the respective digital input signal to a respective analog radio frequency (RF) signal; and output the respective analog RF signal to a respective phase shifter of the plurality of phase shifters.

4. The ANN device of claim 3, wherein each respective phase shifter of the plurality of phase shifters is configured to: apply a respective phase shift to the respective analog RF signal associated with that respective phase shifter to generate a respective phase-shifted RF signal of the plurality of phase-shifted RF signals; andoutput the respective phase-shifted RF signal associated with that respective phase shifter to a respective transmit antenna of the plurality of transmit antennas.

5. The ANN device of claim 4, wherein the respective phase shifts correspond to a set of weights for an ANN implemented by the ANN device.

6. The ANN device of claim 4, wherein each respective transmit antenna of the plurality of transmit antennas is configured to wirelessly transmit the respective phase- shifted RF signal associated with that respective transmit antenna to the plurality of receive antennas using a respective transmit beam of the plurality of transmission beams.

7. The ANN device of claim 6, wherein each receive antenna of the plurality of receive antennas is configured to: receive a different respective composite analog RF signal from the plurality of transmit antennas, wherein each different composite analog RF signal is based on a different combination of the respective phase-shifted RF signals transmitted by the respective transmit antennas of the plurality of transmit antennas; and output the different respective composite analog RF signal associated with that respective antenna to a respective ADC of the plurality of ADCs.

8. The ANN device of claim 7, wherein each respective ADC of the plurality of ADCs is configured to: obtain the different respective composite analog RF signal from the receive antenna associated with that respective ADC; and convert the different respective composite analog RF signal obtained from the receive antenna associated with that respective ADC to a respective digital output signal of the plurality of digital output signals.

9. The ANN device of claim 8, wherein: a first respective digital output signal is associated with a first receive antenna of the plurality of receive antennas; the first receive antenna has a different relative distance to each respective transmit antenna of the plurality of transmit antennas; andthe first respective digital output signal is a sum of the respective digital input signals modified by the different respective phase shifts and the different relative distances of the first receive antenna to each respective transmit antenna.

10. The ANN device of claim 8, wherein each respective ADC of the plurality of ADCs is configured to clip the different composite analog RF signal associated with that respective ADC to introduce a non-linearity in the different composite analog RF signal associated with that respective ADC.

11. The ANN device of claim 8, wherein: the at least one artificial output neuron comprises a plurality of non-linear components configured to introduce a non-linearity within the respective digital output signals of the plurality of digital output signals; and the plurality of non-linear components comprise at least one of a plurality of low noise amplifiers (LNAs), a plurality of power amplifiers (PAs), or the plurality of ADCs.

12. The ANN device of claim 8, wherein: the plurality of phase shifters comprises at least a first set of phase shifters and a second set of phase shifters; the first set of phase shifters is configured to apply a first set of phase shifts to the respective analog RF signals, corresponding to a first set of digital input signals, to generate a first set of phase-shifted RF signals of the plurality of phase-shifted RF signals; the second set of phase shifters is configured to apply a second set of phase shifts to the respective analog RF signals, corresponding to a second set of digital input signals, to generate a second set of phase-shifted RF signals of the plurality of phase- shifted RF signals; and the first set of phase shifts is different from the second set of phase shifts.

13. The ANN device of claim 12, wherein: a first set of ADCs of the plurality of ADCs is configured to obtain the first set of phase-shifted RF signals from a first set of receive antennas of the plurality of receive antennas; anda second set of ADCs of the plurality of ADCs is configured to obtain the second set of phase-shifted RF signals from a second set of receive antennas of the plurality of receive antennas.

14. The ANN device of claim 13, wherein: when obtaining the first set of phase-shifted RF signals, the first set of ADCs is configured to be in a powered on state and the second set of ADCs is configured to be in a powered off state; and when obtaining the second set of phase-shifted RF signals, the second set of ADCs is configured to be in the powered on state and the first set of ADCs is configured to be in the powered off state.

15. The ANN device of claim 8, wherein the at least one artificial output neuron further comprises a plurality of signal attenuators configured to attenuate the respective composite analog RF signals prior to being obtained by the respective ADCs.

16. The ANN device of claim 8, wherein the at least one artificial input neuron further comprises a plurality of signal attenuators configured to attenuate at least one of the respective analog RF signals after being output by the DACs or the respective phase-shifted RF signals after being output by the respective phase shifters.

17. The ANN device of claim 8, wherein the at least one artificial output neuron further comprises a plurality of local oscillators (LOs) configured to down-convert the respective composite analog RF signals to a lower frequency, relative to a frequency at which the respective composite analog RF signals are received, prior to being obtained by the respective ADCs.

18. The ANN device of claim 8, wherein the at least one artificial input neuron further comprises a plurality of local oscillators (LOs) configured to up-convert the respective analog RF signals to a higher frequency relative to a frequency at which the respective analog RF signals are output by the DACs.

19. A method for operating an artificial neural network (ANN) device, comprising: transmitting, from at least one artificial input neuron of the ANN, a plurality of phase-shifted RF signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams; receiving, at at least one artificial output neuron of the ANN, the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas; and generating, at the at least one artificial output neuron of the ANN, a plurality of digital output signals corresponding to the plurality of input signals.

20. The method of claim 19, wherein: the at least one artificial input neuron comprises: a plurality of digital-to-analog converters (DACs); a plurality of phase shifters; and the plurality of transmit antennas; and the at least one artificial output neuron comprises: the plurality of receive antennas; and a plurality of analog-to-digital converters (ADCs); and the method further comprises, at each DAC of the plurality of DACs: obtaining a respective digital input signal of the plurality of digital input signals; converting the respective digital input signal to a respective analog radio frequency (RF) signal; and outputting the respective analog RF signal to a respective phase shifter of the plurality of phase shifters.

21. The method of claim 20, further comprising: at each respective phase shifter of the plurality of phase shifters: applying a respective phase shift to the respective analog RF signal associated with that respective phase shifter to generate a respective phase- shifted RF signal of the plurality of phase-shifted RF signals; and outputting the respective phase-shifted RF signal associated with that respective phase shifter to a respective transmit antenna of the plurality of transmit antennas;at each respective transmit antenna of the plurality of transmit antennas, wirelessly transmitting the respective phase-shifted RF signal associated with that respective transmit antenna to the plurality of receive antennas using a respective transmit beam of the plurality of transmission beams; and at each receive antenna of the plurality of receive antennas: receiving a different respective composite analog RF signal from the plurality of transmit antennas, wherein each different composite analog RF signal is based on a different combination of the respective phase-shifted RF signals transmitted by the respective transmit antennas of the plurality of transmit antennas; and outputting the different respective composite analog RF signal associated with that respective antenna to a respective ADC of the plurality of ADCs.

22. The method of claim 21, wherein the respective phase shifts correspond to a set of weights for an ANN implemented by the ANN device.

23. The method of claim 21, further comprising, at each respective ADC of the plurality of ADCs: obtaining the different respective composite analog RF signal from the receive antenna associated with that respective ADC; and converting the different respective composite analog RF signal obtained from the receive antenna associated with that respective ADC to a respective digital output signal of the plurality of digital output signals.

24. The method of claim 23, wherein: a first respective digital output signal is associated with a first receive antenna of the plurality of receive antennas; the first receive antenna has a different relative distance to each respective transmit antenna of the plurality of transmit antennas; and the first respective digital output signal is a sum of the respective digital input signals modified by the different respective phase shifts and the different relative distances of the first receive antenna to each respective transmit antenna.

25. The method of claim 23, wherein, at least one of: the method further comprises, at each respective ADC of the plurality of ADCs, clipping the different composite analog RF signal associated with that respective ADC to introduce a non-linearity in the different composite analog RF signal associated with that respective ADC; or the at least one artificial output neuron comprises a plurality of non-linear components configured to introduce a non-linearity within the respective digital output signals of the plurality of digital output signals; and the plurality of non-linear components comprise at least one of a plurality of low noise amplifiers (LNAs), a plurality of power amplifiers (PAs), or the plurality of ADCs.

26. The method of claim 23, wherein: the plurality of phase shifters comprises at least a first set of phase shifters and a second set of phase shifters; and the method further comprises: applying, using the first set of phase shifters, a first set of phase shifts to the respective analog RF signals, corresponding to a first set of digital input signals, to generate a first set of phase-shifted RF signals of the plurality of phase-shifted RF signals; and applying, using the second set of phase shifters, a second set of phase shifts to the respective analog RF signals, corresponding to a second set of digital input signals, to generate a second set of phase-shifted RF signals of the plurality of phase-shifted RF signals, wherein the first set of phase shifts is different from the second set of phase shifts.

27. The method of claim 26, wherein: a first set of ADCs of the plurality of ADCs is configured to obtain the first set of phase-shifted RF signals from a first set of receive antennas of the plurality of receive antennas; a second set of ADCs of the plurality of ADCs is configured to obtain the second set of phase-shifted RF signals from a second set of receive antennas of the plurality of receive antennas;when obtaining the first set of phase-shifted RF signals, the first set of ADCs is configured to be in a powered on state and the second set of ADCs is configured to be in a powered off state; and when obtaining the second set of phase-shifted RF signals, the second set of ADCs is configured to be in the powered on state and the first set of ADCs is configured to be in the powered off state.

28. The method of claim 23, wherein: the at least one artificial input neuron further comprises a plurality of local oscillators (LOs); the at least one artificial output neuron further comprises a plurality of local oscillators (LOs); the at least one artificial input neuron further comprises a plurality of signal attenuators; the at least one artificial output neuron further comprises a plurality of signal attenuators; and the method further comprises: up-converting, using the plurality of LOs of the at least one artificial input neuron, the respective analog RF signals to a higher frequency relative to a frequency at which the respective analog RF signals are output by the DACs; and down-converting, using the plurality of LOs of the at least one artificial output neuron, the respective composite analog RF signals to a lower frequency, relative to a frequency at which the respective composite analog RF signals are received, prior to being obtained by the respective ADCs attenuating, using the plurality of signal attenuators of the at least one artificial input neuron, at least one of the respective analog RF signals after being output by the DACs or the respective phase-shifted RF signals after being output by the respective phase shifters; and attenuating, using the plurality of signal attenuators of the at least one artificial output neuron, the respective composite analog RF signals prior to being obtained by the respective ADCs.

29. An apparatus for operating an artificial neural network (ANN) device, comprising: means for transmitting, from at least one artificial input neuron of the ANN, a plurality of phase-shifted RF signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams; means for receiving, at at least one artificial output neuron of the ANN, the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas; and means for generating, at the at least one artificial output neuron of the ANN, a plurality of digital output signals corresponding to the plurality of input signals.

30. A non-transitory computer-readable medium for operating an artificial neural network (ANN) device, comprising: instructions that, when executed by one or more processors of an apparatus, cause the apparatus to: transmit, from at least one artificial input neuron of the ANN, a plurality of phase-shifted RF signals, corresponding to a plurality of input signals, using a plurality of transmit antennas and a plurality of transmission beams; receive, at at least one artificial output neuron of the ANN, the plurality of phase-shifted RF signals from the at least one artificial input neuron using a plurality of receive antennas; and generate, at the at least one artificial output neuron of the ANN, a plurality of digital output signals corresponding to the plurality of input signals.

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