Driving module for display and display apparatus

Abstract

A driving module for display and a display apparatus. The driving module comprises: a composite board (1) configured to process various low-power signals; a mainboard (2) used for processing digital multimedia signals, the digital multimedia signals comprising video format signals and the low-power signals; and a driving board (3) separately connected to the mainboard (2) and the composite board (1), the driving board (3) being used for forwarding the video format signals to source driving boards, forwarding the various low power signals to the composite board (1), and performing power supply management and gamma voltage conversion.

Description

A driving module and display device for display Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a driving module and a display device for display. Background Art

[0002] In the design architecture of large-size LCD TVs, each functional board is basically designed separately.

[0003] For example, components like the mainboard (MB), power board (P-Board), keypad (Key), mobile hotspot (Wi-Fi) board, microphone (MIC) board, and timing controller (T-CON) board are typically separated and connected via flexible flat cables (FFC) or electronic wires. Furthermore, different brands have different layout requirements and external interfaces for each functional board, resulting in a large number of connected cables, complex assembly processes, and long cable paths.

[0004] Summary of the Invention

[0005] The embodiments of the present disclosure provide a driving module and a display device for display, so as to solve the above-mentioned technical problems existing in the prior art.

[0006] In a first aspect, to solve the above technical problems, the present disclosure provides a driving module for display, comprising:

[0007] a composite board configured to process a variety of low-power signals;

[0008] A mainboard, configured to process digital multimedia signals; wherein the digital multimedia signals include video format signals and the low-power signals;

[0009] The driving board is connected to the main board and the composite board respectively; the driving board is used to forward the video format signal to the source driving board, forward the multiple low-power signals to the composite board, and perform power management and gamma voltage conversion.

[0010] In a possible implementation manner, the driving plate includes:

[0011] A first interface, electrically connected to the mainboard;

[0012] Two speaker interfaces, electrically connected to two speakers respectively;

[0013] Two second interfaces, the two second interfaces being electrically connected to the two source driver boards;

[0014] a third interface, located between the two second interfaces, the third interface being electrically connected to the composite board;

[0015] a power management module configured to convert an input first power source into a second power source required by the source driver board;

[0016] The clock management module is configured to convert the input first clock signal into a series of second clock signals required by the source driver board and provide the second clock signals to the source driver board.

[0017] In a possible implementation manner, the driving board further includes:

[0018] The fourth interface is electrically connected to the external communication board, and the external communication board is configured to realize at least one function of being compatible with WiFi and Bluetooth plug-ins.

[0019] In a possible implementation manner, the driving module further includes:

[0020] A first flexible flat cable is connected between the main board and the driving board;

[0021] a second flexible flat cable connected between the source driver board and the driver board;

[0022] A third flexible flat cable is connected between the composite board and the driving board.

[0023] In a possible implementation manner, the first flexible flat cable includes:

[0024] A plurality of connection lines, and two connection interfaces respectively connected to two ends of the plurality of connection lines; wherein the pin definitions in the two connection interfaces are in opposite orders.

[0025] In one possible implementation, the connection interface includes:

[0026] A first group of pins is configured to transmit the video format signal;

[0027] a second group of pins configured to transmit a power supply signal, wherein the power supply signal includes a plurality of voltage sources;

[0028] A third group of pins is configured to transmit the low-power signal; wherein floating pins are provided between the second group of pins, the first group of pins, and the third group of pins;

[0029] The fourth group of pins is configured to transmit high-power analog signals; there are two isolated ground pins between the fourth group of pins and the third group of pins.

[0030] In a possible implementation manner, the second group of pins includes:

[0031] a first power pin, a second power pin, a third power pin, and a fourth power pin arranged in sequence along a direction from the first group of pins to the third group of pins;

[0032] The first power pin is used to transmit the first power, and the first power pin includes a first number of pins;

[0033] The second power pin is used to transmit a second power supply, and the second power pin includes a pin for a second data; wherein a floating pin is provided between the first power pin and the second power pin, and the first number is greater than the second number;

[0034] The third power pin and the fourth power pin correspond to different third power supplies respectively; wherein the voltages of the first power supply, the second power supply, and the third power supply decrease in sequence.

[0035] In one possible implementation, the third group of pins includes:

[0036] The first group of pins is configured to transmit enable and reset control signals for network communication;

[0037] A second group of pins is configured to transmit universal serial bus signals;

[0038] The third group of pins is configured to transmit digital audio data signals and clock signals;

[0039] The fourth group of pins is configured to transmit key signals, indicator light signals, and infrared signals, and the fourth group of pins is close to the fourth group of pins.

[0040] In a possible implementation manner, the pins corresponding to the universal serial bus signals are designed with differential equal length and 90Ω matching impedance.

[0041] In a possible implementation manner, signal grounds are provided on both sides of the pins corresponding to the digital audio clock signal and the digital audio data signal.

[0042] In a possible implementation manner, at least one isolation ground pin is provided between signal pins corresponding to each signal in the high-power analog signal; wherein the signal pins consist of two pins.

[0043] In a possible implementation manner, two isolation ground pins are provided between two signal pins with the same current direction;

[0044] An isolation ground pin is provided between two signal pins with different current directions.

[0045] In a possible implementation manner, the pins with strong anti-interference capability in the fourth group of pins are arranged close to the fourth group of pins.

[0046] In a possible implementation manner, the pins with strong anti-interference capability include pins corresponding to the key signal and the indicator light signal.

[0047] In a possible implementation manner, the signal ground pin and the isolation ground pin in the connection interface are electrically connected to a grounding resistor connected to a magnetic bead.

[0048] In one possible implementation, the plurality of connecting lines include:

[0049] a first set of connecting wires, connecting the first set of pins to the third set of pins;

[0050] A second group of connecting wires connected to the fourth group of pins;

[0051] The first flexible flat cable further includes a double metal shielding layer, which covers two flat surfaces of the first group of connecting wires and is grounded.

[0052] In a possible implementation manner, the first flexible flat cable includes a plurality of merged lines, and the width of the merged line is greater than the total width of two adjacent connecting lines;

[0053] The merging line is configured to connect wires that transmit the same signal from a plurality of pins.

[0054] In a possible implementation manner, the number of the combined line connected to the first power pin is at least one; and the total width of the at least one combined line is the total width of the first number of connection lines arranged in sequence.

[0055] In a possible implementation manner, the driving module further includes:

[0056] A power supply board and a power supply electronic line; the power supply electronic line is connected between the power supply board and the main board, and the power supply board is configured to supply power to the main board and receive a control signal from the main board to the power supply board.

[0057] In a second aspect, an embodiment of the present disclosure provides a display device, including:

[0058] Display module; the display module includes at least one source driving circuit;

[0059] As in the driving module of the first aspect, the driving module is electrically connected to the source driving circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] FIG1 is a schematic structural diagram of a display device in the related art;

[0061] FIG2 is a schematic structural diagram of a driving module provided by an embodiment of the present disclosure;

[0062] FIG3 is a schematic structural diagram of a driving board provided in an embodiment of the present disclosure;

[0063] FIG4 is a schematic structural diagram of another driving module provided in an embodiment of the present disclosure;

[0064] FIG5 is a schematic structural diagram of another driving module provided in an embodiment of the present disclosure;

[0065] FIG6 is a schematic structural diagram of another driving module provided in an embodiment of the present disclosure;

[0066] FIG7 is a schematic structural diagram of a first flexible flat cable provided in an embodiment of the present disclosure;

[0067] FIG8 is a connection principle diagram of the fourth group of pins in the first flexible flat cable provided by an embodiment of the present disclosure;

[0068] FIG9 is a schematic diagram of two parallel conductors provided in an embodiment of the present disclosure;

[0069] FIG10 is a schematic diagram of a connection interface provided by an embodiment of the present disclosure;

[0070] FIG11 is a schematic structural diagram of a first flexible flat cable provided in an embodiment of the present disclosure;

[0071] FIG12 is a schematic structural diagram of another first flexible flat cable provided by an embodiment of the present disclosure;

[0072] FIG13 is a schematic structural diagram of another driving module provided in an embodiment of the present disclosure.

[0073] Figure numerals: composite board 1, main board 2, driver board 3, first interface 31, speaker interface 32, second interface 33, third interface 34, power management module 35, clock management module 36, fourth interface 37, first flexible flat cable 4, second flexible flat cable 5, third flexible flat cable 6, connecting wire 41, connecting interface 42, first group of connecting wires 41a, second group of connecting wires 41b, double-layer metal shielding layer 43, power board 7, power supply electronic wire 8. DETAILED DESCRIPTION

[0074] The embodiments of the present disclosure provide a driving module and a display device for display, so as to solve the above-mentioned technical problems existing in the prior art.

[0075] In order to make the above-mentioned purposes, features and advantages of the present disclosure more obvious and easy to understand, the present disclosure will be further described below with reference to the accompanying drawings and examples. However, the example embodiments can be implemented in various forms and should not be understood as being limited to the embodiments set forth herein; on the contrary, these embodiments are provided to make the present disclosure more comprehensive and complete, and to fully convey the concepts of the example embodiments to those skilled in the art. The same figure marks in the figures represent the same or similar structures, and their repeated descriptions will be omitted. The words expressing position and direction described in the present disclosure are all explained using the accompanying drawings as examples, but changes can be made as needed, and all changes are included in the scope of protection of the present disclosure. The drawings of the present disclosure are only used to illustrate relative position relationships and do not represent true proportions.

[0076] It should be noted that specific details are set forth in the following description to facilitate a full understanding of the present disclosure. However, the present disclosure can be implemented in a variety of ways different from those described herein, and those skilled in the art can make similar generalizations without violating the connotation of the present disclosure. Therefore, the present disclosure is not limited to the specific embodiments disclosed below. The subsequent description of the specification is a preferred embodiment of the present disclosure, but the description is for the purpose of illustrating the general principles of the present disclosure and is not intended to limit the scope of the present disclosure. The scope of protection of the present disclosure shall be as defined by the appended claims.

[0077] Please refer to FIG1 which is a schematic structural diagram of a display device in the related art.

[0078] The display device includes a power supply board 01, a main board 02, a timing control board 03, a left speaker 04a, a right speaker 04b, a source driver board 05a, a source driver board 05b, a button + indicator light + infrared board 06, an audio and sensor board 07, and a wireless network and Bluetooth (WIRELESS FIDELITY & BLUETOOTH, WIFI & BT) 08. In related art, the above-mentioned function boards contained in the display device are partly designed to be separated and connected via FFC or electronic wires. However, due to the inconsistent layout requirements and external interfaces of the function boards of different brands, the number of connected wires is large, the assembly process is complicated, and the wire paths are long.

[0079] Furthermore, the motherboard 01 is typically fixed to one side of the display unit, not centered. The motherboard 01 controls other functional boards, but the distance from the motherboard 01 to the other functional boards is relatively long, increasing the length of the cables and the need for cable clips and acetate tape. This creates a cluttered and unsightly interior.

[0080] To solve the above problems, the embodiments of the present disclosure provide a driving module and a display device for display, which are described in detail below with reference to the accompanying drawings.

[0081] Please refer to Figure 2 for a schematic diagram of the structure of a drive module provided in an embodiment of the present disclosure. The drive module includes:

[0082] Composite board 1 is configured to process various low-power signals. Composite board 1 may include functions such as keypad, Wi-Fi, Bluetooth, infrared, and indicator lights. The corresponding low-power signals may include keypad signals, Wi-Fi / Bluetooth / infrared data signals, control signals, audio signals, and indicator lights. Composite board 1 may also include functions such as keypad, infrared, and indicator lights, without Wi-Fi and Bluetooth.

[0083] Mainboard 2, for processing digital multimedia signals; wherein the digital multimedia signals include clock embedded differential signals (CEDS, also known as video format signals) and low-power signals;

[0084] The driver board 3 is connected to the main board 2 and the composite board 1 respectively; the driver board 3 is used to forward the video format signal to the source driver board, forward multiple low-power signals to the composite board 1, and perform power management and gamma voltage conversion.

[0085] In the embodiment provided in the present disclosure, by connecting the composite board 1 with the driving board 3, allowing the driving board 3 to forward the CEDS signal to the source driving circuit, forwarding a variety of low-power signals to the composite board 1, and performing power management and gamma voltage conversion, the main board 2 can be connected to the driving board 3 instead of being connected to the composite board 1. Compared with the solution in the related art that the main board 2 needs to be connected to a variety of functional boards, it can effectively reduce the cables connected to the main board 2, reduce cutting-edge wires, thereby reducing auxiliary materials for wires, reducing production costs, improving assembly efficiency, and beautifying the overall process and interior of the machine, thereby enhancing product competitiveness.

[0086] FIG3 is a schematic diagram of the structure of a driving board provided in an embodiment of the present disclosure. The driving board 3 includes:

[0087] The first interface 31 is electrically connected to the mainboard 2; the first interface 31 can be a standard interface with 96 pins (which can be recorded as 96pin). Correspondingly, an interface corresponding to the first interface 31 is also provided on the mainboard 2. The driver board 3 can be connected to the mainboard 2 through a 96-core cable to receive the multimedia signals processed by the mainboard 2.

[0088] The two speaker interfaces 32 are electrically connected to the two speakers respectively. The speaker interface 32 has two pins, which are respectively connected to the positive and negative poles of the speakers. Usually, a 12V analog signal is connected to the speaker interface 32.

[0089] Two second interfaces 33, two second interfaces 33 are electrically connected to the source driver board; the second interface 33 can be an interface with 60 pins. Usually, the display module has two source driver boards, so the two second interfaces 33 of the driver board 3 are electrically connected to the two source driver boards in half.

[0090] The third interface 34 is located between the two second interfaces 33, and the third interface 34 is electrically connected to the composite board 1; if the composite board 1 includes a key function, a WIFI function, a Bluetooth function, an infrared function, an indicator light function, etc., the fourth interface 37 can be an interface with 30 pins; if the composite board 1 includes a key function, an infrared function, an indicator light function, etc. (that is, it does not include a WIFI function and a Bluetooth function), the third interface 34 can be an interface with 14 pins.

[0091] Since the third interface 34 is arranged between the two second interfaces 33, the third interface 34 is closest to the key box, so the length of the cable connecting the third interface 34 and the key box can be shortened, and there is no intersection with other cables, which is convenient for assembly and eliminates the auxiliary materials of copper foil and acetate tape.

[0092] The power management module 35 is configured to convert the input first power supply into the second power supply required by the source driver board; the first voltage can be a 12V voltage, and the second voltage can be the voltage required for the high level (VGH) of the row drive of the display module, the voltage required for the low level (VGL) of the row drive of the display module, the power supply voltage (AVDD) of the digital-to-analog conversion circuit of the display module, the voltage of the low power state of the digital-to-analog conversion circuit of the display module (HAVDD), the chip power supply voltage (VCC), the gamma voltage, the synchronization signal, etc.

[0093] The clock management module 36 is configured to convert the input first clock signal into a series of second clock signals required by the source driver board and provide the second clock signals to the source driver board. The first clock signal may be a clock signal generated by a crystal oscillator, and the second clock signal may be a signal obtained by amplifying the amplitude of the driving voltage of a series of clock signals required by the source driver circuit.

[0094] In the embodiment provided by the present disclosure, by setting a first interface 31 electrically connected to the mainboard 2, two speaker interfaces 32 electrically connected to the two speakers, a second interface 33 electrically connected to the source driver board, and a third interface 34 electrically connected to the composite board 1 in the driver board 3, it is possible to receive the multimedia signal processed by the mainboard 2 through the first interface 31, and forward the CEDS signal in the processed multimedia signal to the source driver board through the second interface 33, forward the low-power signal corresponding to the composite board 1 to the composite board 1 through the third interface 34, and at the same time convert the input first power supply into the second power supply required by the source driver board through the power management module 35, and convert the input first clock signal into a series of second clock signals required by the source driver board through the clock management module 36, and provide them to the source driver board. Since the above-mentioned various functional boards are all connected to the driver board 3, and the driver board 3 is relatively closer to the functional board relative to the mainboard 2, it is possible to effectively reduce the number of cables connected to the mainboard 2, shorten the length of the cables used by each functional board, and make the cable layout more beautiful.

[0095] Please refer to FIG4 for a structural diagram of another driving module provided in an embodiment of the present disclosure. The driving board 3 further includes:

[0096] Fourth interface 37 is electrically connected to an external communication board, which is configured to implement at least one of Wi-Fi and Bluetooth plug-in compatibility. Typically, the external communication board and composite board 1 implement different functions. For example, if composite board 1 lacks Wi-Fi and Bluetooth functionality, and the external communication board implements Wi-Fi and Bluetooth plug-in compatibility (compatibility with previous generation products), fourth interface 37 can be a 12-pin socket. The corresponding cable connected to fourth interface 37 is a 12-core flat cable.

[0097] In the embodiment provided in the present disclosure, by designing an external communication board compatible with the WiFi and Bluetooth of the previous generation of products in the driver board 3, the compatibility of the product can be improved to meet the design requirements of different customers.

[0098] FIG5 is a schematic diagram of the structure of another driving module provided in an embodiment of the present disclosure. The driving module further includes:

[0099] The first flexible flat cable 4 is connected between the main board 2 and the driving board 3 . If the first interface 31 is 96 pins, the first flexible flat cable 4 is also 96 pins.

[0100] The second flexible flat cable 5 is connected between the source driver board and the driver board 3 . If the third interface 34 is 60 pins, the corresponding second flexible flat cable 5 is also 60 pins.

[0101] The third flexible flat cable 6 is connected between the composite board 1 and the driving board 3. If the fourth interface 37 is 30 pins, the corresponding third flexible flat cable 6 is also 30 pins.

[0102] If the composite board 1 does not include WiFi and Bluetooth functions, that is, the driver board includes the fourth interface 37, FIG6 is a schematic structural diagram of another driver module provided by an embodiment of the present invention. The cable of the external communication board can be a 14-pin cable, and a 2-core cable is used to connect the left and right speakers, or the positive and negative poles of each speaker can be connected to a connecting line 41 respectively.

[0103] In the embodiment provided by the present disclosure, the driving board 3 and each functional board are connected with a flexible flat cable, which facilitates assembly operations and effectively improves production efficiency.

[0104] Please refer to FIG7 for a schematic structural diagram of a first flexible flat cable provided in an embodiment of the present disclosure. The first flexible flat cable 4 includes:

[0105] A plurality of connection lines 41 and two connection interfaces 42 respectively connected to both ends of the plurality of connection lines 41 ; wherein the pin definition orders of the two connection interfaces 42 are opposite.

[0106] For example, the connection interface 42 includes 96 pins, each pin has a corresponding pin number, recorded as 1 to 96. One connection interface 42 is defined sequentially from pin 1 to pin 96, and the other connection interface 42 is defined in the same way from pin 96 to pin 1.

[0107] In the embodiment provided by the present disclosure, assembly errors can be prevented by providing connection interfaces 42 with opposite pin definition orders at both ends of the plurality of connection lines 41 .

[0108] In some embodiments, the connection interface 42 includes:

[0109] The first group of pins is configured to transmit video format signals;

[0110] The second group of pins is configured to transmit a power supply signal, wherein the power supply signal includes a plurality of voltage sources;

[0111] The third group of pins is configured to transmit low-power signals; wherein floating pins are provided between the second group of pins and the first group of pins and the third group of pins;

[0112] The fourth group of pins is configured to transmit high-power analog signals; and there are two isolated ground pins between the fourth group of pins and the third group of pins.

[0113] Please refer to Table 1 for a pin definition table of a connection interface 42 provided in an embodiment of the present disclosure.

[0114] Table 1

[0115] The table above shows the pin definitions for one connection interface 42 at one end of a flexible flat cable. The definitions of pins 96-1 of the other connection interface 42 are the same as those for pins 1-96 in the table above and are not repeated here. In Table 1, the first group of pins are numbered 46-96, the second group of pins are numbered 34-44, the third group of pins are numbered 15-32, and the fourth group of pins are numbered 1-12.

[0116] In the embodiment provided by the present disclosure, by setting the pin definition of the connection interface 42 to be arranged in sequence as a first group of pins for transmitting CEDS signals, a second group of pins for transmitting voltage sources, a third group of pins for transmitting low-power signals, and a fourth group of pins for transmitting high-power analog signals, and setting two isolation grounds between the fourth group of pins and the third group of pins, it is possible to facilitate signal transmission and reduce interference between different signals.

[0117] Please continue to refer to Table 1, the second group of pins, including:

[0118] The first power pin (VDD IN), the second power pin (VCC 5.5V), the third power pin (VCC 3.3V), and the fourth power pin (STB3.3V) are arranged in sequence along the direction from the first group of pins to the third group of pins;

[0119] The first power pin is used to transmit the first power supply, and the first power pin includes a first number of pins; the first number can be determined based on the current required to be provided by the first power supply and the current corresponding to the width of a single connecting wire 41 in the first flexible flat cable 4. For example, the designed current capacity of the first power supply (12V) is 4A, the width of a single connecting wire 41 is 0.3, the gap between two adjacent connecting wires 41 is 0.2, the current capacity of a single connecting wire 41 is 0.5A (i.e., the current corresponding to a width of 0.3 is 0.5A), and the current corresponding to a width of 0.2 is approximately 0.33A. Here, the first power pin is actually composed of 6 pins corresponding to 6 connecting wires 41. There are three options for merging the corresponding connecting wires 41:

[0120] Solution 1: The six connecting lines 41 are combined into one conductor, and the current carrying capacity is A = (6 × 0.5 + 5 × 0.33) ≈ 4.65 A.

[0121] Solution 2: The three connecting wires 41 are combined into one conductor, and two conductors are used to connect to the six pins. The total current carrying capacity of the two conductors is A = 2 × (3 × 0.5 + 2 × 0.33) ≈ 4.32A.

[0122] Solution 3: Combine the two connecting wires 41 into one conductor, and use three conductors to connect to the six pins. The total current carrying capacity of the three conductors is A = 3 × (2 × 0.5 + 0.33) ≈ 3.99A

[0123] The first two options both meet the design requirements. Considering the comprehensive cost and design margin, option 2 is preferred.

[0124] The second power pin is used to transmit the second power supply, and the second power pin includes a pin for the second data; wherein, a floating pin is provided between the first power pin and the second power pin, and the first number is greater than the second number; the second number is determined in a similar manner to the above-mentioned first number, and will not be repeated here. If the first number is determined to be 2, the second power pin is composed of 2 pins.

[0125] The third power pin and the fourth power pin correspond to different third power supplies (3.3V) respectively; wherein the voltages of the first power supply, the second power supply and the third power supply decrease in sequence.

[0126] In the embodiment provided by the present disclosure, by setting a floating pin between the first power supply and the second power supply, the high and low voltage sources can be isolated and the first flexible cable can be prevented from being inserted skew, thereby preventing short circuits and avoiding burning of circuit boards, thereby effectively improving production yield and after-sales yield. By setting the second power supply pin to the fourth power supply pin adjacent to each other, the number of pins occupied by the voltage source can be effectively saved.

[0127] Please continue to refer to Table 1, the third group of pins, including:

[0128] The first group of pins is configured to transmit enable and reset control signals for network communication; wherein, a floating pin is provided between the second group of pins and the first group of pins and the third group of pins;

[0129] A second group of pins is configured to transmit universal serial bus signals;

[0130] The third group of pins is configured to transmit digital audio data signals and clock signals;

[0131] The fourth group of pins is configured to transmit key signals, indicator light signals, and infrared signals. The fourth group of pins is close to the fourth group of pins.

[0132] In the embodiment provided by the present disclosure, since the third group of pins corresponds to the transmission of low-power signals, and the fourth group of pins that transmit button signals, indicator light signals, and infrared signals has a strong anti-interference ability, the fourth group of pins with a strong anti-interference ability in the third group of pins is set close to the fourth group of pins that transmit high-power analog signals. This can effectively reduce the interference of high-power analog signals on low-power signals and improve the stability of signal transmission of the first flexible flat cable 4.

[0133] In some embodiments, the pins corresponding to the universal serial bus signals are designed with differential equal length and 90Ω matching impedance, which can improve the anti-interference capability of the serial bus.

[0134] In other embodiments, signal grounds are provided on both sides of the digital audio clock signal and the pins corresponding to the digital audio data signal, which can be placed on the digital audio interference clock signal to improve the anti-interference ability of the digital audio.

[0135] Please refer to Figure 8 for a schematic diagram of the connection principle of the fourth group of pins in the first flexible flat cable provided in an embodiment of the present disclosure. At least one isolated ground pin is provided between the signal pins corresponding to each signal in the high-power analog signal; wherein the signal pins consist of two pins.

[0136] As shown in Figure 8, SPK L+ is used to transmit the positive signal of the left speaker, corresponding to two pins in each connection interface 42 (pin 1 and pin 2, and pin 96 and pin 95 on the opposite end). These two pins are signal pins in the fourth group of pins; SPK L- is used to transmit the negative signal of the left speaker, corresponding to two pins in each connection interface 42 (pin 4 and pin 5, and pin 93 and pin 92 on the opposite end). These two pins are also signal pins in the fourth group of pins. The same applies to other pins, which will not be repeated here.

[0137] Driving the left and right speakers typically requires a high-power analog signal. This signal is typically a sinusoidal alternating current signal. This current fluctuates, creating a varying magnetic field around the conductors. Consequently, self-inductance and mutual inductance exist between the two (usually parallel) wires carrying the positive and negative signals to the left and right speakers. Furthermore, due to the high power, current, and variability of the speaker's alternating current signal, the mutual inductance of the two wires significantly affects adjacent signals, ultimately affecting signal quality.

[0138] Please refer to Figure 9 for a schematic diagram of two parallel conductors provided in an embodiment of the present disclosure. The mutual inductance calculation formula of the two parallel conductors is:

[0139] Where M is the self-inductance, μ0 is the magnetic permeability of vacuum, l is the length of the parallel conductors, and D is the distance between the center lines of the two parallel conductors.

[0140] The formula for calculating the self-inductance of two parallel conductors is: L = (∫B·dS) / I;

[0141] Where L is the self-inductance of the two parallel conductors, B is the magnetic flux between the two parallel conductors, S is the cross-sectional area of ​​the parallel conductors, and I is the current in the parallel conductors.

[0142] Since the current directions of the two parallel conductors are different, their effective inductances are calculated differently accordingly.

[0143] If the currents in two parallel conductors are in the same direction, their effective inductance (denoted as N) is: N = M + L;

[0144] If the currents in two parallel conductors are in opposite directions, their effective inductance (denoted as N) is: N=LM.

[0145] As shown in Figure 8, pins 4 and 5 corresponding to the left connection interface 42 transmit the signal SPK_L-, and pins 8 and 9 transmit the signal SPK_R-. The current directions of SPK_L- and SPK_R- are the same, which will cause interference between L- and R-. If the L / R channel signals interfere with each other, crosstalk between R / L will occur, and current noise will cause abnormal sound output by the speaker. The present disclosure adds two isolated ground (PGND) pins between the signal pins corresponding to SPK_L- and SPK_R-, which can increase the distance D between the signal pins corresponding to SPK_L- and SPK_R- to 1.2mm, while reducing the effects of self-inductance and mutual inductance.

[0146] For example, pins 4 and 5 transmit the signal SPK_L-, while pins 1 and 2 transmit the signal SPK_L+. The currents in SPK_L- and SPK_L+ flow in opposite directions, so while interference between L+ and L- is reduced, it still exists. This disclosure adds a ground isolation (PGND) pin between the signal pins corresponding to SPK_L- and SPK_L+, increasing the distance between the signal pins corresponding to SPK_L- and SPK_L+ to D = 0.7mm. This GND isolation also reduces the effects of self-inductance and mutual inductance.

[0147] For example, pins 11 and 12 transmit signal SPK_R+, a high-power analog signal with a sinusoidal current output that fluctuates. Because the current continuously changes, a varying magnetic field forms around the conductor. If the pins corresponding to other low-power signals are too close to pins 11 and 12, the mutual inductance coupling can cause the quality of these other low-power signals to fall short of design requirements. The present disclosure effectively reduces the impact of SPK_R+ on these other low-power signals by adding a 2-pin PGND connector between pin 12 and the pins corresponding to these other low-power signals.

[0148] In order to improve the interference caused by the effective inductance generated by the wires corresponding to the left speaker and the right speaker when transmitting signals to adjacent signals, the present invention provides at least one isolation ground pin between the signal pins corresponding to each signal in the power analog signal, such as providing two isolation ground pins between two signal pins with the same current direction, and providing one isolation ground pin between two signal pins with different current directions. In this way, the distance between adjacent signal pins can be increased, the effective inductance between adjacent signal pins can be reduced, and the interference to adjacent signal pins can be reduced, thereby improving the transmission quality of high-power analog signals. Using two pins to constitute the signal pin in the high-power analog signal can improve the current-carrying capacity of the signal pin corresponding to the high-power analog signal and prevent the pin from being damaged.

[0149] In some embodiments, the pins with strong anti-interference capability in the fourth group of pins are arranged close to the fourth group of pins.

[0150] As shown in Figure 8, pin 15 in the left connection interface 42 transmits the enable signal of the indicator light, and pin 16 transmits the key signal, which have strong anti-interference capabilities; the signal close to SPK_R+ can also be designed as an enable signal with strong anti-interference capabilities, and pins 15 and 16 LED_EN / KEY can be set close to pin 12.

[0151] Since the pins with strong anti-interference ability in the fourth group of pins are arranged close to the fourth group of pins, the influence of the pins transmitting high-power analog signals on other signals with weak anti-interference ability can be further reduced, thereby improving the stability of signal transmission.

[0152] In some embodiments, signal grounds can be set on both sides of the pin corresponding to the low-power signal. For example, the pin corresponding to the IR_IN (infrared) signal in Figure 5 has GNDs set on both sides. This can improve the anti-interference ability of the low-power signal and improve the stability of signal transmission.

[0153] Please refer to Figure 10 for a schematic diagram of a connection interface provided in an embodiment of the present disclosure.

[0154] The signal ground pin in the connection interface 42 is connected to the signal ground, and the isolation ground pin is electrically connected to the signal ground via the magnetic bead MC and the grounding resistor R.

[0155] In the embodiment provided in the present disclosure, the anti-interference capability of the connection interface 42 can be improved by connecting the signal ground pin in the connection interface 42 to the signal ground and electrically connecting the isolation ground pin to the signal ground via the magnetic bead MC and the grounding resistor R.

[0156] Please refer to FIG11 for a schematic structural diagram of a first flexible flat cable provided by an embodiment of the present disclosure. The multiple connecting wires 41 of the first flexible flat cable 4 include:

[0157] A first set of connecting wires 41a, connecting the first set of pins to the third set of pins;

[0158] The second group of connecting wires 41b are connected to the fourth group of pins;

[0159] The first flexible flat cable 4 further includes a double metal shielding layer 43 covering two flat surfaces of the first group of connecting wires 41 a and being grounded.

[0160] In the embodiment provided in the present disclosure, by covering the first group of connection lines 41a corresponding to the CEDS signal and the low-power signal with a double-layer metal shielding layer 43 and grounding the double-layer metal shielding layer 43, the anti-interference ability of the CEDS signal and the low-power signal can be improved, and the reliability of signal transmission can be improved.

[0161] Please refer to FIG12 which is a schematic structural diagram of another first flexible flat cable provided in an embodiment of the present disclosure.

[0162] The first flexible flat cable 4 includes a plurality of merged lines LL, and a width w1 of the merged line is the distance between outer edges of two of the most distant adjacent merged connection lines 41;

[0163] Merging lines are configured to connect wires that carry the same signal from multiple pins.

[0164] For example, the combined line corresponding to the 5V power supply consists of two connecting lines 41, and the width of one connecting line 41 is w2, and the corresponding current capacity is 0.5 A. The width of the gap between the two connecting lines 41 is w3, and the width w1 of the combined line corresponding to 5V is 2w2+w3.

[0165] The current carrying capacity of the combined line corresponding to the 5V power supply is A=[(2×w2+w3) / W2]×0.5A;

[0166] For example, the first power pin is composed of 6 pins, and the aforementioned solution 2 is preferred, with 2 merged lines with a width w1 of 3w2+2w3. The total current capacity of the 2 merged lines corresponding to the first power supply is A=2×[(3×w2+2w3) / W2]×0.5A.

[0167] By setting the parallel line corresponding to multiple pins transmitting the same signal to the distance between the outer edges of the two most distant connection lines in the merged adjacent connection lines 41, the flow capacity of the merged line can be improved, and the load capacity and signal stability can be improved.

[0168] In some embodiments, the number of the merged line connected to the first power pin is at least one.

[0169] Please refer to FIG13 for a structural diagram of another driving module provided in an embodiment of the present disclosure. The driving module further includes:

[0170] Power board 7, power supply electronic wire 8; the power supply electronic wire 8 is connected between the power board 7 and the main board 2. The power board 7 is configured to supply power to the main board 2 and receive control signals from the main board 2 to the power board 7.

[0171] Based on the same inventive concept, an embodiment of the present disclosure provides a display device, which includes:

[0172] Display module; the display module includes at least one source driving circuit;

[0173] The driving module as described above is electrically connected to the source driving circuit.

[0174] The display device may be a liquid crystal display, a liquid crystal display screen, a liquid crystal television or other display device, or may be a mobile device such as a mobile phone, a tablet computer, or a notebook.

[0175] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0176] Obviously, those skilled in the art may make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include these modifications and variations.

Claims

1. A driving module for display, comprising: A composite board configured to process a variety of low-power signals; A mainboard, used for processing digital multimedia signals; wherein the digital multimedia signals include video format signals and the low-power signals; The driving board is connected to the main board and the composite board respectively; the driving board is used to forward the video format signal to the source driving board, forward the multiple low-power signals to the composite board, and perform power management and gamma voltage conversion.

2. The driving module according to claim 1, wherein the driving board comprises: A first interface, electrically connected to the mainboard; Two speaker interfaces, electrically connected to two speakers respectively; Two second interfaces are electrically connected to the two source driving boards respectively; A third interface, located between the two second interfaces, the third interface being electrically connected to the composite board; A power management module, configured to convert an input first power source into a second power source required by the source driving board; The clock management module is configured to convert the input first clock signal into a series of second clock signals required by the source driving board and provide the second clock signals to the source driving board.

3. The driving module according to claim 2, wherein the driving board further comprises: The fourth interface is electrically connected to an external communication board, and the external communication board is configured to realize at least one function of being compatible with WiFi and Bluetooth plug-ins.

4. The driving module according to any one of claims 1 to 3, further comprising: A first flexible flat cable connected between the main board and the driving board; A second flexible flat cable connected between the source driving board and the driving board; A third flexible flat cable is connected between the composite board and the driving board.

5. The driving module according to claim 4, wherein the first flexible flat cable comprises: A plurality of connection lines, and two connection interfaces respectively connected to two ends of the plurality of connection lines; The pin definition orders of the two connection interfaces are opposite.

6. The drive module according to claim 5, wherein the connection interface comprises: A first group of pins is configured to transmit the video format signal; A second group of pins is configured to transmit a power supply signal, wherein the power supply signal includes a plurality of voltage sources; The third group of pins is configured to transmit the low-power signal; wherein, Floating pins are arranged between the second group of pins and the first group of pins and the third group of pins; The fourth group of pins is configured to transmit high-power analog signals; and there are two isolated ground pins between the fourth group of pins and the third group of pins.

7. The driving module according to claim 6, wherein the second group of pins comprises: A first power pin, a second power pin, a third power pin, and a fourth power pin are arranged in sequence along a direction from the first group of pins to the third group of pins; The first power pin is used to transmit the first power, and the first power pin includes a first number of pins; The second power pin is used to transmit a second power supply, and the second power pin includes a pin for a second data; wherein a floating pin is provided between the first power pin and the second power pin, and the first number is greater than the second number; The third power pin and the fourth power pin correspond to different third power supplies respectively; wherein the voltages of the first power supply, the second power supply and the third power supply decrease in sequence.

8. The driving module according to claim 6, wherein the third group of pins comprises: The first group of pins is configured to transmit enable and reset control signals for network communication; A second group of pins is configured to transmit universal serial bus signals; A third group of pins is configured to transmit a data signal and a clock signal of a digital audio; The fourth group of pins is configured to transmit key signals, indicator light signals, and infrared signals, and the fourth group of pins is close to the fourth group of pins.

9. The driving module according to claim 8, wherein the pins corresponding to the universal serial bus signals are designed with differential equal length and 90Ω matching impedance. 10 . The driving module according to claim 8 , wherein signal grounds are provided on both sides of the pins corresponding to the clock signal of the digital audio and the data signal of the digital audio.

11. The driving module according to claim 6, wherein at least one isolation ground pin is provided between signal pins corresponding to each signal in the high-power analog signal; wherein: The signal pin is composed of 2 pins.

12. The driving module according to claim 11, wherein two pins of the isolation ground are arranged between two signal pins with the same current direction; An isolation ground pin is arranged between two signal pins with different current directions. 13 . The driving module according to claim 5 , wherein the pins with strong anti-interference capability in the fourth group of pins are arranged close to the fourth group of pins.

14. The driving module according to claim 13, wherein the pins with strong anti-interference capability include pins corresponding to the key signal and the indicator light signal. 15 . The driving module according to claim 6 , wherein the signal ground pin in the connection interface and the isolation ground pin are electrically connected to a grounding resistor connected to a magnetic bead.

16. The driving module according to any one of claims 6 to 15, wherein the plurality of connecting lines comprises: A first set of connection lines, connecting the first set of pins to the third set of pins; A second group of connecting wires connected to the fourth group of pins; The first flexible flat cable also includes a double-layer metal shielding layer, which covers two flat surfaces of the first group of connecting wires and is grounded.

17. The driving module according to claim 16, wherein the first flexible flat cable comprises a plurality of merged lines, and the width of the merged line is the distance between the outer edges of the two most distant connection lines among the plurality of adjacent merged connection lines; The merging line is configured to connect wires that transmit the same signal from a plurality of pins. 18 . The driving module according to claim 17 , wherein the number of the combined lines connected to the first power pin is at least one.

19. The driving module according to any one of claims 1 to 18, further comprising: Power board, power supply electronic wire; The power supply electronic wire is connected between the power board and the main board. The power board is configured to supply power to the main board and receive a control signal from the main board to the power board.

20. A display device, comprising: Display module; The display module includes at least one source driving circuit; The driving module according to any one of claims 1 to 19, wherein the driving module is electrically connected to the source driving circuit.

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