OLED display panel and terminal device

Abstract

Disclosed in embodiments of the present application are an OLED display panel and a terminal device. The OLED display panel comprises: power supply signal lines and longitudinal auxiliary lines extending in a first direction, and transverse auxiliary lines and reset signal lines extend in a second direction. The transverse auxiliary lines and the power supply signal lines are electrically connected at intersections to form a latticed connection, and / or the longitudinal auxiliary lines and the reset signal lines are electrically connected at intersections to form a latticed connection, thereby improving the display uniformity.

Description

OLED display panels, terminal equipment Technical Field

[0001] The present application relates to the field of display technology, and in particular to an OLED display panel and a terminal device. Background Art

[0002] FIAA technology is currently an important technology for achieving a narrow bottom bezel of OLED display panels. Its principle is mainly to achieve the purpose of a narrow bottom bezel by passing a part of the fan-out traces vertically through the display area, and then connecting them horizontally to the corresponding data signal lines. One feature of this technology is that on the basis of conventional pixel design, horizontal and vertical metal traces are added in the display area near the bottom bezel for the wiring of the fan-out traces in the display area. In actual design, only a part of the metal traces are used for the wiring of the fan-out traces, and the remaining metal traces in the display area near the bottom bezel are not fully utilized and are idle.

[0003] Therefore, existing OLED display panels have the technical problem of poor display uniformity. SUMMARY OF THE INVENTION

[0004] The embodiments of the present application provide an OLED display panel and a terminal device, which can alleviate the technical problem of poor display uniformity of existing OLED display panels.

[0005] An embodiment of the present application provides an OLED display panel, including a display area and a non-display area, wherein the OLED display panel includes:

[0006] substrate;

[0007] A power signal line, a data signal line, and a reset signal line are provided above the substrate;

[0008] a fan-out line disposed above the substrate, the fan-out line comprising a first fan-out line and a second fan-out line, the first fan-out line being disposed in a first region of the display area, the second fan-out line being disposed in a non-display area, one end of the first fan-out line being electrically connected to the data signal line, and the other end of the first fan-out line being electrically connected to the second fan-out line;

[0009] Auxiliary lines are arranged in the first area above the substrate, the auxiliary lines include longitudinal auxiliary lines and transverse auxiliary lines arranged in different layers, the longitudinal auxiliary lines and the power signal lines extend along a first direction, and the transverse auxiliary lines and the reset signal lines extend along a second direction, and the first direction and the second direction are perpendicular to each other;

[0010] Among them, the horizontal auxiliary line and the power signal line are arranged in different layers, the vertical auxiliary line and the reset signal line are arranged in different layers, the horizontal auxiliary line and the power signal line are electrically connected at the intersection to form a grid connection, and / or the vertical auxiliary line and the reset signal line are electrically connected at the intersection to form a grid connection.

[0011] Optionally, in some embodiments of the present application, the OLED display panel includes a plurality of pixel units, and any of the pixel units includes two sub-pixels.

[0012] Optionally, in some embodiments of the present application, the display area includes metal routing, the metal routing includes a first metal routing extending along a first direction and a second metal routing extending along a second direction, part of the first metal routing is used as the first routing, and part of the second metal routing is used as the second routing, the first fan-out routing includes the first routing extending along the first direction and the second routing extending along the second direction, and the remaining metal routing not used as the first fan-out routing is used as the compensation routing, wherein the remaining part of the first metal routing not used as the first routing is used as the longitudinal auxiliary line, and the remaining part of the second metal routing not used as the second routing is used as the horizontal auxiliary line.

[0013] Optionally, in some embodiments of the present application, the first routing line is spaced apart from and insulated from the longitudinal auxiliary line, the second routing line is spaced apart from and insulated from the transverse auxiliary line, one end of the first routing line is electrically connected to the second fan-out line, the other end of the first routing line is electrically connected to the second routing line through a first via, and the second routing line is electrically connected to the data signal line through a second via.

[0014] Optionally, in some embodiments of the present application, any of the pixel units includes a second wiring and a horizontal auxiliary line, and the second wiring and the horizontal auxiliary line are periodically alternately arranged.

[0015] Optionally, in some embodiments of the present application, two adjacent pixel units include three second wirings and one horizontal auxiliary line.

[0016] Optionally, in some embodiments of the present application, the OLED display panel includes a single reset signal pixel driving circuit, the reset signal line is a first reset signal line, and any of the pixel units further includes a first routing line and a longitudinal auxiliary line.

[0017] Optionally, in some embodiments of the present application, in any pixel unit, one of the longitudinal auxiliary lines is connected in parallel with the first reset signal line at an intersection.

[0018] Optionally, in some embodiments of the present application, one of every four, six, or eight adjacent first metal traces serves as the longitudinal auxiliary line, and the longitudinal auxiliary line is arranged in parallel with the first reset signal line at an intersection.

[0019] Optionally, in some embodiments of the present application, the OLED display panel includes a dual reset signal pixel driving circuit, the reset signal line includes a second reset signal line and a third reset signal line, and any pixel unit also includes a first routing line and a longitudinal auxiliary line. In two adjacent pixel units, the longitudinal auxiliary line in one pixel unit is connected in parallel with the second reset signal line at the intersection, and the longitudinal auxiliary line in the other pixel unit is connected in parallel with the third reset signal line at the intersection.

[0020] Optionally, in some embodiments of the present application, one of each four, six, or eight adjacent first metal lines serves as the longitudinal auxiliary line, and the longitudinal auxiliary line is arranged in parallel with the second reset signal line or the third reset signal line at the intersection.

[0021] Optionally, in some embodiments of the present application, the OLED display panel includes a three-reset signal pixel driving circuit, the reset signal line includes a fourth reset signal line, a fifth reset signal line, and a sixth reset signal line, and any of the pixel units also includes the first routing line and the longitudinal auxiliary line.

[0022] Optionally, in some embodiments of the present application, in three adjacent pixel units, the longitudinal auxiliary line in one pixel unit is connected in parallel with the fourth reset signal line at the intersection, the longitudinal auxiliary line in another pixel unit is connected in parallel with the fifth reset signal line at the intersection, and the longitudinal auxiliary line in yet another pixel unit is connected in parallel with the sixth reset signal line at the intersection.

[0023] Optionally, in some embodiments of the present application, three of the nine adjacent first metal lines serve as the longitudinal auxiliary lines, and the three longitudinal auxiliary lines are respectively arranged in parallel with the fourth reset signal line, the fifth reset signal line, and the sixth reset signal line at the intersection.

[0024] Optionally, in some embodiments of the present application, the OLED display panel further includes a first source and drain layer arranged above the substrate, and a second source and drain layer arranged on a side of the first source and drain layer away from the substrate, the horizontal auxiliary line is arranged on the same layer as the first source and drain layer, and the vertical auxiliary line is arranged on the same layer as the second source and drain layer.

[0025] Optionally, in some embodiments of the present application, the reset signal line is provided in the same layer as the first source-drain layer, and the power signal line is provided in the same layer as the second source-drain layer.

[0026] Optionally, in some embodiments of the present application, the OLED display panel further includes a gate layer, the gate layer is arranged above the substrate, the first source and drain layer is arranged on a side of the gate layer away from the substrate, the power signal line is arranged on the same layer as the second source and drain layer, and the reset signal line is arranged on the same layer as the gate layer.

[0027] Optionally, in some embodiments of the present application, at least one of the first source and drain electrode layer and the second source and drain electrode layer is a titanium / aluminum / titanium stacked structure.

[0028] Optionally, in some embodiments of the present application, the spacing between adjacent horizontal auxiliary lines is equal, and / or the spacing between adjacent vertical auxiliary lines is equal.

[0029] An embodiment of the present application provides a terminal device, which includes the OLED display panel as described in any of the above embodiments. Beneficial effects

[0030] Part of the metal wiring in the first area of ​​the display area is used as auxiliary wiring, wherein the horizontal auxiliary line and the power signal line are electrically connected at the intersection to form a grid connection, and / or the vertical auxiliary line and the reset signal line are electrically connected at the intersection to form a grid connection; by forming a grid connection with the auxiliary wiring and the power signal line and / or the reset signal line, the impedance of the power signal line and / or the reset signal line is reduced, thereby improving the display uniformity. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0032] FIG1 is a cross-sectional schematic diagram of an OLED display panel of the present application adopting a FIAA design;

[0033] FIG2 is a first cross-sectional schematic diagram of an OLED display panel provided in the present application;

[0034] FIG3 is a second cross-sectional schematic diagram of an OLED display panel provided in the present application;

[0035] FIG4 is a schematic diagram of the circuit structure of a single reset signal pixel driving circuit used in an OLED display panel provided by the present application;

[0036] FIG5 is a third cross-sectional schematic diagram of the OLED display panel provided in this application;

[0037] FIG6 is a schematic diagram of the circuit structure of a dual-reset signal pixel driving circuit used in an OLED display panel provided by the present application;

[0038] FIG7 is a fourth cross-sectional schematic diagram of the OLED display panel provided in the present application;

[0039] FIG8 is a schematic diagram of the circuit structure of a three-reset signal pixel driving circuit used in the OLED display panel provided in this application.

[0040] Description of reference numerals:

[0041] Modes for Carrying Out the Invention

[0042] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; and "inside" and "outside" refer to the outline of the device.

[0043] Referring to Figures 1 to 8, the OLED display panel provided in the present application includes a display area 1 and a non-display area 2, the OLED display panel includes a substrate 10, a power signal line 20, a data signal line 30, a reset signal line 40, a fan-out line 50, and an auxiliary line 60 arranged above the substrate 10, the fan-out line 50 includes a first fan-out line and a second fan-out line, the first fan-out line is arranged in the first area 3 of the display area 1, the second fan-out line is arranged in the non-display area 2, one end of the first fan-out line is electrically connected to the data signal line 30, and the other end of the first fan-out line is electrically connected to the second fan-out line, the auxiliary line 60 includes a longitudinal auxiliary line arranged in different layers Auxiliary line 601, horizontal auxiliary line 602, the longitudinal auxiliary line 601 and the power signal line 20 extend along the first direction 130, the horizontal auxiliary line 602 and the reset signal line 40 extend along the second direction 140, and the first direction 130 and the second direction 140 are perpendicular to each other; wherein, the horizontal auxiliary line 602 and the power signal line 20 are arranged in different layers, the longitudinal auxiliary line 601 and the reset signal line 40 are arranged in different layers, the horizontal auxiliary line 602 and the power signal line 20 are electrically connected at the intersection to form a grid connection, and / or, the longitudinal auxiliary line 601 and the reset signal line 40 are electrically connected at the intersection to form a grid connection.

[0044] In this embodiment, part of the metal routing within the first area 3 of the display area 1 is used as an auxiliary routing 60, wherein the horizontal auxiliary line 602 is electrically connected to the power signal line 20 at the intersection to form a grid connection, and / or the vertical auxiliary line 601 is electrically connected to the reset signal line 40 at the intersection to form a grid connection; by forming a grid connection with the auxiliary routing 60 and the power signal line 20 and / or the reset signal line 40, the impedance of the power signal line 20 and / or the reset signal line 40 is reduced, thereby improving the display uniformity.

[0045] The technical solution of this application is now described in conjunction with specific embodiments.

[0046] The embodiment of the present application only uses the example of some metal lines in the first area 3 of the display area 1 that are not used as fan-out lines 50 as auxiliary lines 60. If there are unused metal lines in other areas of the panel, the inventive concept of the present application can also be adopted and should also fall within the scope of protection of the present application. They can be connected in parallel with signal lines such as the power signal line 20 and the reset signal line 40 that need to have their impedance reduced, thereby improving display uniformity.

[0047] It should be noted that in order to set the first fan-out routing 70 in the display area 1, it is necessary to prepare metal routing in the first area 3 of the display area 1 in advance, and the metal routing includes a first metal routing extending along the first direction 130 and a second metal routing extending along the second direction 140, and then part of the first metal routing is used as the first routing 701, and part of the second metal routing is used as the second routing 702. The first routing 701 and the second routing 702 are connected through the first via 90 to form the first fan-out routing 70; further, the present application can use the remaining metal routing that is not used as the first fan-out routing 70 as a compensation routing. Specifically, the remaining part of the first metal routing that is not used as the first routing 701 can be used as a longitudinal auxiliary line 601, and the remaining part of the second metal routing that is not used as the second routing 702 can be used as a horizontal auxiliary line 602.

[0048] It should be noted that the electrical connection can be a parallel connection, the longitudinal auxiliary line 601 and the reset signal line 40 are connected in parallel through the third via 110 at the intersection, and the transverse auxiliary line 602 and the power signal line 20 are connected in parallel through the fourth via 120 at the intersection.

[0049] It should be noted that this application is an improvement based on the FIAA design. Therefore, for positions not mentioned in this application, reference can be made to the existing FIAA design.

[0050] In one embodiment, the spacing between adjacent transverse auxiliary lines 602 is equal, and / or the spacing between adjacent longitudinal auxiliary lines 601 is equal.

[0051] The longitudinal auxiliary lines 601 and the reset signal lines 40 are arranged in different layers and cross-connected to form a grid, and the transverse auxiliary lines 602 and the power signal lines 20 are arranged in different layers and cross-connected to form a grid.

[0052] It can be understood that the equal spacing between the grids is beneficial to reducing the impedance of the reset signal line 40 and the power signal line 20, and further improving display uniformity.

[0053] In one embodiment, the OLED display panel includes a plurality of pixel units, and any of the pixel units includes two sub-pixels.

[0054] The two sub-pixels include a first sub-pixel and a second sub-pixel, the first sub-pixel is a red-green sub-pixel, and the second sub-pixel is a blue-green sub-pixel.

[0055] It can be understood that the pixel arrangement of the OLED display panel is a Pentile arrangement, which only includes two sub-pixels in one pixel; since each sub-pixel has one horizontal auxiliary line 602 or one second wiring 702, one vertical auxiliary line 601 or one first wiring 701, therefore, using this arrangement, one pixel unit only includes two horizontal auxiliary lines 602 or one second wiring 702, and two vertical auxiliary lines 601 or one first wiring 701.

[0056] It should be noted that the following examples only use the Pentile arrangement as an example of pixel arrangement. Other pixel arrangements may be applicable to this application and should also fall within the scope of protection of this application.

[0057] In one embodiment, the first fan-out line 70 includes a first line 701 extending along a first direction 130 and a second line 702 extending along a second direction 140. The first line 701 is spaced apart from and insulated from the longitudinal auxiliary line 601, and the second line 702 is spaced apart from and insulated from the transverse auxiliary line 602. One end of the first line 701 is electrically connected to the second fan-out line, and the other end of the first line 701 is electrically connected to the second line 702 through a first via 90. The second line 702 is electrically connected to the data signal line 30 through a second via 100.

[0058] The second routing line 702 and the first routing line 701 are arranged on different layers, and the second routing line 702 and the data signal line 30 are arranged on different layers.

[0059] The first trace 701 may be provided on the same layer as the data signal line 30 .

[0060] It is understandable that the first routing 701 of the first fan-out routing 70 can adopt part of the first metal routing, the second routing 702 of the first fan-out routing 70 can adopt part of the second metal routing, and the remaining metal routing can be used as auxiliary routing 60.

[0061] In this embodiment, part of the metal routing is used as the first routing 701 and the second routing 702. The second routing 702 is connected to the first routing 701 through the first via 90 and is connected to the data signal line 30 through the second via 100. That is, the cross-line connection is realized by means of vias to avoid short circuit of the first fan-out routing 70 located in the display area 1.

[0062] In one embodiment, referring to FIG. 2 , any of the pixel units includes a second wiring 702 and a horizontal auxiliary line 602 , and the second wiring 702 and the horizontal auxiliary line 602 are periodically and alternately arranged.

[0063] It can be understood that since only two second metal lines extending along the second direction 140 are provided in any pixel unit, that is, in any pixel unit, one of the two second metal lines serves as the second line 702, which connects the first line 701 and the data signal line 30; the other of the two second metal lines serves as a horizontal auxiliary line 602, and the horizontal auxiliary line 602 is connected in parallel with the power signal line 20 extending along the first direction 130 at the intersection. For multiple pixel units, the horizontal auxiliary line 602 and the power signal line 20 form a network in the top view direction perpendicular to the substrate 10.

[0064] In this embodiment, since the second wirings 702 and the horizontal auxiliary lines 602 are periodically and alternately arranged, each pixel unit includes a horizontal auxiliary line 602 , further improving the display uniformity of the OLED display panel.

[0065] In another embodiment, referring to FIG. 3 , two adjacent pixel units include three second wirings 702 and one horizontal auxiliary line 602 .

[0066] It can be understood that, as another design method for setting the second routing 702 and the horizontal auxiliary line 602, one of every four adjacent second metal routings is used as the horizontal auxiliary line 602, and the other three are used as the second routing 702. That is to say, in any two adjacent pixel units, four second metal routings extending along the second direction 140 are provided, three of which serve as the second routing 702 to connect the first routing 701 and the data signal line 30; one of them serves as the horizontal auxiliary line 602, and the horizontal auxiliary line 602 is connected in parallel with the power signal line 20 extending along the first direction 130 at the intersection. For multiple pixel units, the horizontal auxiliary line 602 and the power signal line 20 form a network in the top-down direction perpendicular to the substrate 10.

[0067] It should be noted that the intersection refers to the overlapping position of two lines arranged in different layers in the direction perpendicular to the substrate 10 when viewed from above. For example, the intersection of the horizontal auxiliary line 602 and the power signal line 20 refers to the overlapping position of the horizontal auxiliary line 602 and the power signal line 20 in the direction perpendicular to the substrate 10.

[0068] In this embodiment, since only one horizontal auxiliary line 602 is set in one of two adjacent pixel units, three second wirings 702 can be set in every two adjacent pixel units. Since the second wirings 702 are set more densely, the setting space of the second wirings 702 can be saved, and the setting space of the reset signal line 40 extending along the second direction 140 is increased, thereby improving space utilization.

[0069] In one embodiment, referring to Figures 2 and 4, the OLED display panel includes a single reset signal pixel driving circuit, the reset signal line 40 is a first reset signal line 401, and any of the pixel units further includes a first routing line 701 and a longitudinal auxiliary line 601. In any pixel unit, the longitudinal auxiliary line 601 is connected in parallel with the first reset signal line 401 at the intersection.

[0070] The single reset signal pixel driving circuit is a 7T1C circuit as shown in FIG4 . The single reset signal pixel driving circuit only includes one reset signal line 40 . The specific connection relationship of the single reset signal pixel driving circuit can be referred to FIG4 and will not be described again.

[0071] It can be understood that, in any pixel unit, two first metal routings are included, one of which is used as the first routing 701, connecting the second fan-out routing 80 and the data signal line 30, and the other first metal routing is used as the longitudinal auxiliary line 601, connecting to the first reset signal line 401 to reduce the impedance of the first reset signal line 401; this means that for a single reset signal pixel driving circuit, when the longitudinal auxiliary line 601 is periodically set, the minimum period for setting the longitudinal auxiliary line 601 is two adjacent first metal routings extending along the first direction 130.

[0072] In this embodiment, by including one of the two first metal wires in any pixel unit as the first wire 701 and the other as the longitudinal auxiliary wire 601, the number of unused first metal wires is further reduced, the utilization rate of the first metal wires is improved, and it is conducive to further achieving a narrow frame and reducing costs.

[0073] Furthermore, in some embodiments, one of every four, six, or eight adjacent first metal traces serves as a longitudinal auxiliary line 601 , and the longitudinal auxiliary line 601 is connected in parallel with the first reset signal line 401 at an intersection.

[0074] In one embodiment, referring to Figures 5 and 6, the OLED display panel includes a dual reset signal pixel driving circuit, the reset signal line 40 includes a second reset signal line 402 and a third reset signal line 403, and any of the pixel units also includes a first routing line 701 and a longitudinal auxiliary line 601. In two adjacent pixel units, the longitudinal auxiliary line 601 in one pixel unit is connected in parallel with the second reset signal line 402 at the intersection, and the longitudinal auxiliary line 601 in the other pixel unit is connected in parallel with the third reset signal line 403 at the intersection.

[0075] Among them, the dual reset signal pixel driving circuit is a 7T1C circuit as shown in Figure 6. The dual reset signal pixel driving circuit includes two reset signal lines 40, namely a second reset signal line 402 and a third reset signal line 403. Here, the second reset signal line 402 and the third reset signal line 403 are only distinguished from the first reset signal line 401. Different reset signals can be connected to these lines, or the same reset signal can be connected to these lines. The specific connection relationship of the dual reset signal pixel driving circuit can be referred to Figure 6 and will not be repeated here.

[0076] It can be understood that four first metal lines are included in two adjacent pixel units, and one first metal line in any pixel unit is used as a longitudinal auxiliary line 601. The longitudinal auxiliary lines 601 of the adjacent pixel units are respectively connected in parallel with the second reset signal line 402 and the third reset signal line 403, thereby reducing the impedance of the second reset signal line 402 and the third reset signal line 403; this means that for the dual reset signal pixel driving circuit, when the longitudinal auxiliary lines 601 are periodically set, since the longitudinal auxiliary lines 601 in the two adjacent pixel units need to be connected to different second reset signal lines 402 and third reset signal lines 403, respectively, the minimum period of setting the longitudinal auxiliary lines 601 is four adjacent first metal lines extending along the first direction 130, wherein two of the four first metal lines are used as longitudinal auxiliary lines 601 to connect the second reset signal line 402 and the third reset signal line 403, respectively.

[0077] In this embodiment, for the case where the dual reset signal pixel driving circuit includes a second reset signal line 402 and a third reset signal line 403, by making two of the four first metal routing lines in any two adjacent pixel units serve as the first routing line 701, another serves as a longitudinal auxiliary line 601 connected to the second reset signal line 402, and the last serves as a longitudinal auxiliary line 601 connected to the third reset signal line 403, the number of unused first metal routing lines is further reduced, the utilization rate of the first metal routing lines is improved, and it is conducive to further achieving a narrow frame and reducing costs.

[0078] Furthermore, in some embodiments, one of every four, six, or eight adjacent first metal traces serves as a longitudinal auxiliary line 601 , and the longitudinal auxiliary line 601 is connected in parallel with the second reset signal line 402 or the third reset signal line 403 at the intersection.

[0079] It can be understood that the remaining first metal traces can be used as first traces.

[0080] In one embodiment, referring to Figures 7 and 8, the OLED display panel includes a three-reset signal pixel driving circuit, the reset signal line 40 includes a fourth reset signal line 404, a fifth reset signal line 405, and a sixth reset signal line 406, and any of the pixel units also includes a first routing line 701 and a longitudinal auxiliary line 601. Among the three adjacent pixel units, the longitudinal auxiliary line 601 in one pixel unit is connected in parallel with the fourth reset signal line 404 at the intersection, the longitudinal auxiliary line 601 in another pixel unit is connected in parallel with the fifth reset signal line 405 at the intersection, and the longitudinal auxiliary line 601 in yet another pixel unit is connected in parallel with the sixth reset signal line 406 at the intersection.

[0081] Among them, the three-reset signal pixel driving circuit is an 8T1C circuit as shown in Figure 6. The three-reset signal pixel driving circuit includes three reset signal lines 40, namely the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406. Here, the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406 are only distinguished from the first reset signal line 401, the second reset signal line 402, and the third reset signal line 403. Different reset signals can be connected to these lines, or the same reset signal can be connected to them. The specific connection relationship of the three-reset signal pixel driving circuit can be referred to Figure 8 and will not be repeated here.

[0082] It can be understood that a total of six first metal traces are included in three adjacent pixel units, and one first metal trace in any pixel unit is used as a longitudinal auxiliary line 601. The longitudinal auxiliary lines 601 of the three adjacent pixel units are respectively connected in parallel with the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406, thereby reducing the impedance of the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406; this means that for the three-reset signal pixel driving circuit, when the longitudinal auxiliary lines 601 are periodically set, since the longitudinal auxiliary lines 601 in the three adjacent pixel units need to be respectively connected to different fourth reset signal lines 404, fifth reset signal lines 405, and sixth reset signal lines 406, the minimum period of setting the longitudinal auxiliary lines 601 is the six adjacent first metal traces extending along the first direction 130, wherein three of the six adjacent first metal traces are used as longitudinal auxiliary lines 601 to connect the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406, respectively.

[0083] In this embodiment, for the case where the three-reset signal pixel driving circuit includes a fourth reset signal line 404, a fifth reset signal line 405, and a sixth reset signal line 406, by making three of the six first metal routings in any three adjacent pixel units serve as the first routing 701, and the other three serve as longitudinal auxiliary lines 601 respectively connected to the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406, the number of unused first metal routings is further reduced, the utilization rate of the first metal routing is improved, and it is conducive to further achieving a narrow frame and cost reduction.

[0084] Furthermore, in some embodiments, three of every six or nine adjacent first metal traces serve as longitudinal auxiliary lines 601, and the three longitudinal auxiliary lines 601 are respectively arranged in parallel with the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406 at the intersection.

[0085] In one embodiment, the OLED display panel further includes a first source and drain layer arranged above the substrate 10, and a second source and drain layer arranged on a side of the first source and drain layer away from the substrate 10, the horizontal auxiliary line 602 is arranged in the same layer as the first source and drain layer, and the vertical auxiliary line 601 is arranged in the same layer as the second source and drain layer.

[0086] Among them, at least one of the first source and drain layer and the second source and drain layer is a titanium / aluminum / titanium stacked structure; the horizontal auxiliary line 602 and the vertical auxiliary line 601 formed by the titanium / aluminum / titanium stacked structure have lower impedance, thereby further improving display uniformity.

[0087] The reset signal line 40 is provided in the same layer as the first source-drain layer, and the power signal line 20 is provided in the same layer as the second source-drain layer.

[0088] The power signal line 20 can be arranged in the same layer as the second source and drain layer, and can be a titanium / aluminum / titanium laminated structure, thereby further reducing the impedance of the power signal line 20 itself, reducing voltage drop, and improving high-brightness display uniformity.

[0089] The reset signal line 40 can be provided in the same layer as the first source and drain electrode layer, and can be a titanium / aluminum / titanium laminated structure, thereby further reducing the impedance of the reset signal line 40 itself, reducing the voltage drop, and improving the low grayscale display uniformity.

[0090] It can be understood that since the horizontal auxiliary line 602 and the second routing line 702 are both wired using the second metal routing line, and the vertical auxiliary line 601 and the first routing line 701 are both wired using the first metal routing line, the horizontal auxiliary line 602 and the second routing line 702 are set on the same layer, and the vertical auxiliary line 601 and the first routing line 701 are set on the same layer.

[0091] In this embodiment, the reset signal line 40 and the horizontal auxiliary line 602 are arranged in the first source and drain layer, and the power signal line 20 and the vertical auxiliary line 601 are arranged in the second source and drain layer, thereby further reducing the impedance of the reset signal line 40 and the power signal line 20 and improving the display uniformity.

[0092] In another embodiment, the horizontal auxiliary line 602 may be provided in the same layer as the second source-drain electrode layer, and the vertical auxiliary line 601 may be provided in the same layer as the first source-drain electrode layer.

[0093] In one embodiment, the OLED display panel further includes a gate layer, which is disposed above the substrate 10; the first source and drain layer is disposed on a side of the gate layer away from the substrate 10; the power signal line 20 is disposed on the same layer as the second source and drain layer; and the reset signal line 40 is disposed on the same layer as the gate layer.

[0094] The gate layer further includes a gate, and the reset signal line 40 and the gate may both be made of molybdenum.

[0095] Furthermore, in some gate layer designs, the gate layer may also adopt a titanium / aluminum / titanium stacked structure, which can also improve the conductivity of the reset signal line 40 and reduce the impedance of the bit signal line; thereby improving the display uniformity at low grayscale.

[0096] It can be understood that when there is insufficient wiring space in the first source and drain layer and the second source and drain layer, the reset signal line 40, which has lower conductivity requirements than the power signal line 20, is prepared on the same layer as the gate. This can make full use of the spare wiring space in the gate layer, which is beneficial to increase the spacing between the lines in the first source and drain layer and the second source and drain layer, and reduce the risk of short circuit of the lines in the first source and drain layer and the second source and drain layer; at the same time, it can also improve the utilization rate of the wiring space of the gate layer.

[0097] In this embodiment, by arranging the reset signal line 40, which has a lower conductivity requirement than the power signal line 20, on the same layer as the gate layer, the utilization rate of the wiring space in the OLED display panel is improved; and the risk of short circuits in the first source and drain layers and the second source and drain layers is reduced.

[0098] The present application pre-sets the metal traces in the first area 3 of the display area 1. A portion of the metal traces is used as the first fan-out traces 70 of the display area 1, and the remaining unused metal traces are used as auxiliary traces 60. The auxiliary traces 60 include longitudinal auxiliary traces 601 extending along the first direction 130 and transverse auxiliary traces 602 extending along the second direction 140. The longitudinal auxiliary traces 601 extending along the first direction 130 and the reset signal traces 40 extending along the second direction 140 are connected in parallel at their intersections to form a grid, thereby reducing the impedance of the reset signal traces 40, thereby improving display uniformity at low grayscales. The horizontal auxiliary lines 602 extending along the second direction 140 and the power signal lines 20 extending along the first direction 130 are connected in parallel at the intersection to form a grid, which is used to reduce the impedance of the power signal lines 20, thereby improving the display uniformity at high brightness; therefore, the horizontal auxiliary lines 602 and the power signal lines 20 are electrically connected at the intersection to form a grid connection, and / or the vertical auxiliary lines 601 and the reset signal lines 40 are electrically connected at the intersection to form a grid connection, thereby improving the display uniformity of the OLED display panel in at least one of low grayscale and high brightness.

[0099] The present application also proposes a display module and a terminal device, both of which include the above-mentioned OLED display panel, which will not be repeated here; wherein, the display module also includes at least one of a back panel, a cover panel, and an optical film, and the terminal device includes but is not limited to a mobile phone, a laptop computer, and a tablet computer.

[0100] The OLED display panel provided by the embodiment of the present application includes a display area and a non-display area, the OLED display panel includes a substrate, a power signal line, a data signal line, a reset signal line, a fan-out line, and an auxiliary line arranged above the substrate, the fan-out line includes a first fan-out line and a second fan-out line, the first fan-out line is arranged in a first area of ​​the display area, the second fan-out line is arranged in the non-display area, one end of the first fan-out line is electrically connected to the data signal line, and the other end of the first fan-out line is electrically connected to the second fan-out line, the auxiliary line includes a longitudinal auxiliary line and a transverse auxiliary line arranged in different layers, the longitudinal auxiliary line, the power signal line, the data signal line, the reset signal line, the fan-out line and the auxiliary line, the first fan-out line and the data signal line are arranged in a first area of ​​the display area, the second fan-out line is arranged in a non-display area, one end of the first fan-out line is electrically connected to the data signal line, and the other end of the first fan-out line is electrically connected to the second fan-out line, the auxiliary line includes a longitudinal auxiliary line and a transverse auxiliary line arranged in different layers, the longitudinal auxiliary line, the power signal line, the data signal line, the reset signal line, the fan-out line and the auxiliary line, the first fan-out line and the data signal line are arranged in a first area of ​​the display area, the second fan-out line The line extends along a first direction, the horizontal auxiliary line and the reset signal line extend along a second direction, and the first direction and the second direction are perpendicular to each other; wherein, the horizontal auxiliary line and the power signal line are arranged in different layers, the vertical auxiliary line and the reset signal line are arranged in different layers, the horizontal auxiliary line and the power signal line are electrically connected at the intersection to form a grid connection, and / or the vertical auxiliary line and the reset signal line are electrically connected at the intersection to form a grid connection; by forming a grid connection with the auxiliary line and the power signal line and / or the reset signal line, the impedance of the power signal line and / or the reset signal line is reduced, thereby improving the display uniformity.

[0101] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0102] The above is a detailed introduction to the OLED display panel provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An OLED display panel, comprising a display area and a non-display area, comprising: substrate; A power signal line, a data signal line, and a reset signal line are arranged above the substrate; A fan-out line is arranged above the substrate, the fan-out line includes a first fan-out line and a second fan-out line, the first fan-out line is arranged in the display area, the second fan-out line is arranged in the non-display area, one end of the first fan-out line is electrically connected to the data signal line, and the other end of the first fan-out line is electrically connected to the second fan-out line; Auxiliary lines arranged in an array in the display area above the substrate, the auxiliary lines comprising longitudinal auxiliary lines and transverse auxiliary lines arranged in different layers, the longitudinal auxiliary lines and the power signal lines extending along a first direction, the transverse auxiliary lines and the reset signal lines extending along a second direction, the first direction and the second direction being perpendicular to each other; Among them, the horizontal auxiliary line and the power signal line are arranged in different layers, the vertical auxiliary line and the reset signal line are arranged in different layers, the horizontal auxiliary line and the power signal line are electrically connected to form a grid connection at the intersection, and / or the vertical auxiliary line and the reset signal line are electrically connected to form a grid connection at the intersection.

2. The OLED display panel according to claim 1, wherein: The OLED display panel includes a plurality of pixel units, and any of the pixel units includes two sub-pixels.

3. The OLED display panel according to claim 2, wherein: The display area includes metal routing, the metal routing includes a first metal routing extending along a first direction and a second metal routing extending along a second direction, part of the first metal routing is used as the first routing, part of the second metal routing is used as the second routing, the first fan-out routing includes the first routing extending along the first direction and the second routing extending along the second direction, the remaining metal routing not used as the first fan-out routing is used as a compensation routing, wherein the remaining part of the first metal routing not used as the first routing is used as the longitudinal auxiliary line, and the remaining part of the second metal routing not used as the second routing is used as the horizontal auxiliary line.

4. The OLED display panel according to claim 3, wherein: The first routing line is spaced apart from and insulated from the longitudinal auxiliary line, the second routing line is spaced apart from and insulated from the transverse auxiliary line, one end of the first routing line is electrically connected to the second fan-out line, the other end of the first routing line is electrically connected to the second routing line through a first via, and the second routing line is electrically connected to the data signal line through a second via.

5. The OLED display panel according to claim 4, wherein: Any of the pixel units comprises a second wiring and a transverse auxiliary line, and the second wiring and the transverse auxiliary line are periodically and alternately arranged.

6. The OLED display panel according to claim 4, wherein: Two adjacent pixel units include three of the second wirings and one of the horizontal auxiliary lines.

7. The OLED display panel according to claim 5 or 6, wherein: The OLED display panel includes a single reset signal pixel driving circuit, the reset signal line is a first reset signal line, and any of the pixel units also includes the first wiring and the longitudinal auxiliary line.

8. The OLED display panel according to claim 7, wherein: In any pixel unit, one of the longitudinal auxiliary lines is connected in parallel with the first reset signal line at the intersection.

9. The OLED display panel according to claim 7, wherein: One of each of the four, six or eight adjacently arranged first metal wirings serves as the longitudinal auxiliary line, and the longitudinal auxiliary line is arranged in parallel with the first reset signal line at a crossing.

10. The OLED display panel according to claim 5 or 6, wherein: The OLED display panel includes a dual reset signal pixel driving circuit, the reset signal line includes a second reset signal line and a third reset signal line, any of the pixel units also includes one of the first routing lines and one of the longitudinal auxiliary lines, and in two adjacent pixel units, the longitudinal auxiliary line in one of the pixel units is connected in parallel with the second reset signal line at an intersection, and the longitudinal auxiliary line in the other of the pixel units is connected in parallel with the third reset signal line at an intersection.

11. The OLED display panel according to claim 10, wherein: One of each of the four, six or eight adjacently arranged first metal wirings serves as the longitudinal auxiliary line, and the longitudinal auxiliary line is arranged in parallel with the second reset signal line or the third reset signal line at an intersection.

12. The OLED display panel according to claim 5 or 6, wherein: The OLED display panel includes a three-reset signal pixel driving circuit, the reset signal lines include a fourth reset signal line, a fifth reset signal line, and a sixth reset signal line, and any of the pixel units also includes one of the first wiring lines and one of the longitudinal auxiliary lines.

13. The OLED display panel according to claim 12, wherein: In three adjacent pixel units, the longitudinal auxiliary line in one pixel unit is connected in parallel with the fourth reset signal line at the intersection, the longitudinal auxiliary line in another pixel unit is connected in parallel with the fifth reset signal line at the intersection, and the longitudinal auxiliary line in yet another pixel unit is connected in parallel with the sixth reset signal line at the intersection.

14. The OLED display panel according to claim 13, wherein: Three of the nine adjacent first metal wirings serve as the longitudinal auxiliary lines, and the three longitudinal auxiliary lines are respectively connected in parallel with the fourth reset signal line, the fifth reset signal line, and the sixth reset signal line at intersections.

15. The OLED display panel according to claim 1, wherein: The OLED display panel also includes a first source and drain layer arranged above the substrate, and a second source and drain layer arranged on a side of the first source and drain layer away from the substrate. The horizontal auxiliary line is arranged in the same layer as the first source and drain layer, and the vertical auxiliary line is arranged in the same layer as the second source and drain layer.

16. The OLED display panel according to claim 15, wherein: The reset signal line is disposed in the same layer as the first source-drain electrode layer, and the power signal line is disposed in the same layer as the second source-drain electrode layer.

17. The OLED display panel according to claim 15, wherein: The OLED display panel also includes a gate layer, which is arranged above the substrate. The first source and drain layer is arranged on a side of the gate layer away from the substrate. The power signal line is arranged on the same layer as the second source and drain layer, and the reset signal line is arranged on the same layer as the gate layer.

18. The OLED display panel according to claim 15, wherein: At least one of the first source-drain electrode layer and the second source-drain electrode layer is a titanium / aluminum / titanium stacked layer structure.

19. The OLED display panel according to claim 1, wherein: The spacing between adjacent transverse auxiliary lines is equal, and / or the spacing between adjacent longitudinal auxiliary lines is equal.

20. A terminal device comprising the OLED display panel according to any one of claims 1 to 19.

Images