Data read-write method, server, and storage medium

Abstract

A data read-write method, a server, and a storage medium, belonging to the technical field of computers. In the method, a kernel space and a user space share a shared memory, the shared memory is mapped to the user space from the kernel space; when there is a data processing task for target data, an application server sends a first read-write request to a DMA controller, so that the DMA controller acquires the target data and writes the target data into the shared memory, and the application server acquires data from the shared memory, and then sends a second read-write request to the DMA controller, so that the DMA controller executes the data processing task on the basis of the target data in the shared memory. The application server can directly perform operations such as data read-write on the shared memory, data copying does not need to be repeatedly carried out between a buffer in the kernel space and a buffer in the application server, the processing efficiency of the data processing task can be improved, data transmission performance is improved, and memory latency is reduced.

Description

Data reading and writing method, server and storage medium

[0001] This application claims priority to Chinese patent application No. 202311288843.1 filed on September 28, 2023, with the invention name “Data reading and writing method, server and storage medium”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computer technology, and in particular to a data reading and writing method, a server, and a storage medium. Background Art

[0003] In the server, the application server runs in user mode. When the application server needs to perform data processing tasks, it cannot directly access data in external hardware such as disks and network cards. Instead, it needs to initiate read and write requests in the kernel mode, which obtains the data in the external hardware and returns it to the application server.

[0004] In the related art, when the application server needs to send data in the local disk to the network card, the application server first initiates a read and write request for the local disk, the direct memory access (DMA) controller first copies the data in the local disk to the read buffer in the kernel state, and then the central processing unit (CPU) copies the data from the read buffer to the buffer of the application server in the user state. The application server then initiates a read and write request to the network card, the CPU then copies the data from the buffer of the application server to the socket buffer in the kernel state, and then the DMA controller copies the data from the socket buffer to the network card, and finally the network card sends the data.

[0005] However, during the above data reading and writing process, multiple switches between user mode and kernel mode occur, and multiple data copies are performed by the CPU. When the amount of data to be copied is large, the CPU and memory are heavily loaded, and the response delay is long, affecting the efficiency of data reading and writing and the performance of the server.

[0006] Summary of the Invention

[0007] The embodiments of the present application provide a data reading and writing method, server, and storage medium that can achieve zero copy of data by the CPU during the data reading and writing process, reduce response latency, improve data reading and writing efficiency, and enhance server performance. The technical solution is as follows.

[0008] In a first aspect, a data reading and writing method is provided, which is applied to a server. The server includes a DMA controller, an application server, and a shared memory. The application server runs in user mode. Both the user mode and the kernel mode can access the shared memory. The method includes:

[0009] When there is a data processing task for target data, the application server sends a first read / write request to the DMA controller, so that the DMA controller obtains the target data and writes the target data into the shared memory. The application server obtains the data from the shared memory and then sends a second read / write request to the DMA controller, so that the DMA controller performs the data processing task based on the target data in the shared memory.

[0010] The data processing task may be data transmission between network cards, between a network card and a disk, or between disks.

[0011] In the above method, the kernel state and the user state share a shared memory, and the shared memory is mapped from the kernel state to the user state. That is, the application server can directly perform operations such as reading and writing data on the shared memory without repeatedly copying data between the buffer in the kernel state and the buffer in the application server. This can improve the processing efficiency of data processing tasks, improve data transmission performance and reduce memory latency.

[0012] Optionally, the shared memory satisfies a non-uniform memory access architecture.

[0013] Among them, non-uniform memory access (NUMA) is an architectural model for how multiple CPUs access memory. NUMA divides a computer into multiple nodes, each of which has multiple CPUs. Each node uses a shared memory controller, and nodes are connected and exchange information through interconnect modules. Therefore, all memory in a node is identical for all CPUs in that node, but different for all CPUs in other nodes. Therefore, each CPU can access the entire system memory, but accessing memory on the local node is fastest (without going through the interconnect module), while accessing memory on non-local nodes is slower (requiring the interconnect module). In other words, the speed at which a CPU accesses memory is related to the distance between nodes.

[0014] In the above method, the shared memory satisfies the non-uniform memory access architecture, that is, the shared memory has NUMA affinity, therefore, it can avoid the CPU from accessing the shared memory across NUMA nodes, thereby improving the efficiency of the CPU accessing the shared memory.

[0015] Optionally, the DMA controller obtains the target data in response to the first read / write request, and writes the target data into the shared memory, including:

[0016] The DMA controller obtains the target data in response to the first read / write request, and writes the target data into a first memory block in the shared memory.

[0017] In the above method, for a read or write request, the kernel state allocates a block of memory in the shared memory. After the data reading and writing is completed, the kernel state only needs to release a memory block without releasing the entire shared memory. That is, the shared memory can be reused by different processes after being allocated once, and there is no need to allocate shared memory and memory mapping every time a read or write request needs to be processed. This can save server kernel resources and improve the processing efficiency of data processing tasks.

[0018] Optionally, the first memory block is clean memory.

[0019] Among them, clean memory refers to memory that has not been written.

[0020] In the above method, since the first memory block is a clean memory, data can be written directly without initialization before writing the data, thereby improving the processing efficiency of the data processing task.

[0021] Optionally, the application server obtains target data from the shared memory, including:

[0022] The application server obtains the target data from the shared memory through direct memory access.

[0023] Optionally, the kernel state provides a first system call, the first system call instructs to obtain data and write the obtained data into the shared memory, and the sending of the first read / write request to the DMA controller includes:

[0024] The application server sends a first read / write request to the DMA controller through the first system call.

[0025] Among them, the system call is a program interface set up by the operating system specifically for user applications, and is the way for user applications to obtain operating system services.

[0026] Optionally, the first system call is compatible with a portable operating system interface.

[0027] Among them, the Portable Operating System Interface of Unix (POSIX): In order to run software on the Unix operating system, it is necessary to define an application programming interface (API). POSIX is the general term for a series of interrelated standards that define APIs.

[0028] In the above method, since the first system call is compatible with POSIX, there is no need to modify the API of the application server. The application server can call the newly defined system call through the existing interface, which can save the development cost and migration cost of the application server.

[0029] Optionally, the kernel state provides a second system call, the second system call instructing to perform a data processing task based on the data in the shared memory, and the sending of the second read / write request to the DMA controller includes:

[0030] The application server sends the second read / write request to the DMA controller through the second system call.

[0031] Optionally, the second system call is compatible with a portable operating system interface.

[0032] Optionally, the method further includes: when the capacity of the released memory in the shared memory reaches a preset capacity, the kernel state initializes the released memory.

[0033] In the above method, since the released memory is reset to zero in batches, the memory block allocated to the application server is clean memory, and data can be written directly without initialization operation before writing data, thereby improving the processing efficiency of data processing tasks.

[0034] Optionally, the data processing task instructs obtaining the target data from the network card and writing the target data to a disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a disk;

[0035] Alternatively, the data processing task instructs obtaining the target data from the network card and sending the target data through the network card, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the network card, and sending the target data by the network card;

[0036] Alternatively, the data processing task instructs obtaining the target data from the network card, writing the target data to the disk, and sending the target data through the network card. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.

[0037] Optionally, the data processing task instructs to obtain the target data from a disk and write the target data to another disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk;

[0038] Alternatively, the data processing task instructs to obtain the target data from a disk and write the target data to another disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a network card, and the network card sending the target data;

[0039] Alternatively, the data processing task instructs obtaining the target data from the disk, writing the target data to another disk, and sending the target data through a network card. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.

[0040] In a second aspect, a data reading and writing method is provided, the method comprising:

[0041] In response to a first read / write request, the target data is obtained and written into a shared memory in the server. The first read / write request is sent by the application server in the server in response to a data processing task for the target data. In response to a second read / write request, the data processing task is performed based on the target data in the shared memory. The second read / write request is sent by the application server after obtaining the target data from the shared memory.

[0042] Optionally, the shared memory satisfies a non-uniform memory access architecture.

[0043] Optionally, in response to the first read / write request, obtaining target data, and writing the target data into the shared memory includes:

[0044] In response to the first read / write request, the target data is acquired and written into a first memory block in the shared memory.

[0045] Optionally, the first memory block is clean memory.

[0046] Optionally, the data processing task instructs obtaining the target data from the network card and writing the target data to a disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a disk;

[0047] or,

[0048] The data processing task instructs obtaining the target data from the network card and sending the target data through the network card, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the network card, and sending the target data by the network card;

[0049] or,

[0050] The data processing task indicates obtaining the target data from the network card, writing the target data to the disk, and sending the target data through the network card. The execution of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.

[0051] Optionally, the data processing task instructs to obtain the target data from a disk and write the target data to another disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk;

[0052] or,

[0053] The data processing task instructs to obtain the target data from a disk and write the target data to another disk, and the performing of the data processing task based on the target data in the shared memory comprises: writing the target data from the shared memory to a network card, and the network card sending the target data;

[0054] or,

[0055] The data processing task indicates obtaining the target data from the disk, writing the target data to another disk, and sending the target data through the network card. The execution of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.

[0056] In a third aspect, a data reading and writing device is provided, which includes at least one functional module, and the at least one functional module is used to execute the data reading and writing method provided by the second aspect or any possible implementation of the second aspect.

[0057] In a fourth aspect, a server is provided, which includes a processor, a memory and a DMA controller, the memory storing program code, and the processor being used to execute the program code, so that the server executes the data reading and writing method provided by the first aspect or any possible implementation method of the first aspect.

[0058] In a fifth aspect, a DMA controller is provided, which is used to execute the data reading and writing method provided by the aforementioned second aspect or any possible implementation of the second aspect.

[0059] In the sixth aspect, a storage medium is provided, which is used to store at least one segment of program code, and the at least one segment of program code is used to execute the data reading and writing method provided by the first aspect, any possible implementation of the first aspect, the second aspect, or any possible implementation of the second aspect.

[0060] Based on the implementation methods provided in the above aspects, this application can also be further combined to provide more implementation methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] FIG1 is a schematic diagram of the structure of a server provided in an embodiment of the present application;

[0062] FIG2 is a schematic diagram of a zero-copy architecture between kernel state and user state provided by an embodiment of the present application;

[0063] FIG3 is a flow chart of a data reading and writing method provided in an embodiment of the present application;

[0064] FIG4 is a schematic diagram of a process for storing target data in three copies according to an embodiment of the present application;

[0065] FIG5 is a schematic diagram of a process of sending target data to a server in a network according to an embodiment of the present application;

[0066] FIG6 is a schematic diagram of a process for storing target data in three copies according to an embodiment of the present application;

[0067] FIG7 is a schematic diagram of a process for storing target data in three copies according to an embodiment of the present application;

[0068] FIG8 is a schematic diagram of a process for managing shared memory based on a buddy algorithm according to an embodiment of the present application;

[0069] FIG9 is a schematic structural diagram of a data reading and writing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0070] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0071] In order to facilitate understanding of the contents of the embodiments of the present application, several technical terms involved in the embodiments of the present application are first introduced below.

[0072] User space: The space where user applications run that is independent of the operating system.

[0073] Kernel space: The space where operating system-related components run.

[0074] System call (syscall): A program interface set up by the operating system specifically for user applications. It is the way for user applications to obtain operating system services.

[0075] Portable Operating System Interface (POSIX): In order to run software on the Unix operating system, an API needs to be defined. POSIX is the general term for a series of interrelated standards that define APIs.

[0076] Memory mapping (mmap) is a memory mapping method that maps a file or other object to the address space of a process, achieving a one-to-one mapping relationship between the file's disk address and a virtual address in the process's virtual address space. After achieving such a mapping relationship, this memory segment can be read and written using a pointer, and the operating system will automatically write the data back to the address corresponding to the file on disk.

[0077] Non-Uniform Memory Access Architecture (NUMA): is an architectural model for how multiple CPUs access memory. NUMA divides a computer into multiple nodes, each of which has multiple CPUs. Each node uses a shared memory controller, and the nodes are connected and exchange information through interconnect modules. Therefore, all the memory of a node is the same for all the CPUs in the node, but different for all the CPUs in other nodes. Therefore, each CPU can access the entire system memory, but the memory access speed of the local node is the fastest (without going through the interconnect module), and the memory access speed of non-local nodes is slower (needs to go through the interconnect module). In other words, the speed at which the CPU accesses memory is related to the distance between the nodes.

[0078] NUMA affinity: Prevents the CPU from accessing memory across NUMA nodes.

[0079] Universal block layer: used to provide a unified interface for file system implementers to use without having to worry about the differences between different device drivers, so that the implemented file system can be used for any block device.

[0080] Network protocol stack: responsible for handling the transmission and processing of network data packets between different protocol layers, used for operations such as protocol parsing and data packet forwarding.

[0081] Dirty memory: Memory that has been written to by user applications.

[0082] Clean memory: Memory that has not been written to.

[0083] Buddy algorithm: Merge two free memory blocks with the same capacity and consecutive physical page numbers. The two memory blocks involved in the merger are called buddies. When allocating memory, if there is no memory block with exactly the right capacity, the merged memory block will be split in half until a memory block of the right capacity is separated. When releasing memory, the memory block adjacent to the released memory block will be searched. If it has been released, the two memory blocks will be merged, and this process will be repeated recursively until the two blocks can no longer be merged.

[0084] The following describes the structure of a server provided in an embodiment of the present application.

[0085] FIG1 is a schematic diagram of the structure of a server provided by this application. As shown in FIG1 , server 100 can be implemented using a general bus architecture. Server 100 includes at least one processor 101, a communication bus 102, a memory 103, a DMA controller 104, at least one communication interface 105, a network card 106, and a disk 107.

[0086] The processor 101 is, for example, a general-purpose central processing unit (CPU), a network processor (NP), a graphics processing unit (GPU), a neural-network processing unit (NPU), a data processing unit (DPU), a microprocessor, or one or more integrated circuits for implementing the solution of the present application. For example, the processor 101 includes an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The PLD is, for example, a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0087] The communication bus 102 is used to transmit information between the various components of the server 100. The communication bus 102 can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, FIG1 shows only one line, but this does not mean that there is only one bus or one type of bus.

[0088] The memory 103 may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, or a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by the server, but is not limited thereto. The memory 103 may exist independently and be connected to the processor via a communication bus. The memory 103 may also be integrated with the processor 101. The memory 103 includes user-mode memory and kernel-mode memory, and the kernel-mode memory includes shared memory, which can be accessed by both user mode and memory mode.

[0089] The DMA controller 104 is used to transfer data between the memory and an external device (eg, a network card 106 or a disk 106 ), and does not require CPU resources to be occupied during data transfer.

[0090] The communication interface 105 uses any transceiver-like device for communicating with other devices or communication networks. For example, the communication interface 105 communicates with the network card 106 and the disk 107. The communication interface 105 includes a wired communication interface and may also include a wireless communication interface. The wired communication interface may be, for example, an Ethernet interface. The Ethernet interface may be an optical interface, an electrical interface, or a combination thereof. The wireless communication interface may be a wireless local area network (WLAN) interface, a cellular network communication interface, or a combination thereof.

[0091] Exemplarily, an application server is running on the server 100, which is used to respond to a data processing task for target data and send a data read and write request for the target data to the DMA controller 104 through a system call to execute the data processing task.

[0092] The network card 106 is used to connect the server 100 to the network and to transmit data between the server 100 and the network. The number of network cards 106 can be one or more, and this embodiment of the application does not limit this. The network card driver is an interface for the processor 101 to control and use the network card 106. In some embodiments, the network card 106 and the processor 101 communicate based on a network protocol stack. The network protocol stack is used to handle the transmission and processing of network data packets between different protocol layers and to perform operations such as protocol parsing and forwarding of network data packets.

[0093] Disk 107 is used to store data, program code, etc. The number of disks 107 can be one or more, and this is not limited in the present embodiment. A disk drive is used to read and write data from disk 107. In some embodiments, communication between disk 107 and processor 101 is based on a common block layer. This common block layer is used to provide a unified interface for file system implementers to use, regardless of the differences between different device drivers. In this way, the implemented file system can be used on any block device.

[0094] As an embodiment, the processor may include one or more CPUs.

[0095] As an embodiment, the server 100 may include multiple processors, each of which may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processor herein may refer to one or more devices, circuits, and / or processing cores for processing data (such as computer program instructions).

[0096] As an embodiment, the server 100 may further include an output device and an input device. The output device communicates with the processor and can display information in a variety of ways. For example, the output device can be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector. The input device communicates with the processor and can receive user input in a variety of ways. For example, the input device can be a mouse, a keyboard, a touch screen device, or a sensor device.

[0097] In some embodiments, the memory is used to store program codes for executing the solution of the present application, and the processor can execute the program codes stored in the memory. That is, the server 100 can implement the data reading and writing method provided by the method embodiment through the processor and the program codes in the memory.

[0098] Based on the implementation environment shown in FIG1 above, the present application provides a zero-copy framework between kernel state and user state. FIG2 is a schematic diagram of a zero-copy architecture between kernel state and user state provided by an embodiment of the present application. As shown in FIG2 , the zero-copy architecture is applied to a server. In the zero-copy architecture, kernel state and user state share a shared memory, which is managed by kernel state and mapped (mmap) from kernel state to user state. That is, the application server can directly perform operations such as reading and writing data on the shared memory through direct memory access, without the need to repeatedly copy data between the buffer in kernel state and the buffer in the application server. In order to achieve zero copy of data between kernel state and user state, the zero-copy architecture newly defines a first system call and a second system call, wherein the first system call indicates to obtain data and write the obtained data into the shared memory, and the second system call indicates to perform data processing tasks based on the data in the shared memory. The application server can send read and write requests to the DMA controller through the first system call and the second system call. The DMA controller then completes the corresponding data transmission work without the need for the CPU to complete the data transmission, which can reduce the burden on the CPU; further, since the above-mentioned newly defined first system call and second system call are compatible with the Portable Operating System Interface (POSIX), there is no need to modify the API of the application server. The application server can call the above-mentioned newly defined system call through the existing interface, which can save the development cost and migration cost of the application server.

[0099] The aforementioned zero-copy architecture can be applied to data reading and writing scenarios. In this scenario, when a data processing task is performed for target data, the application server sends a first read / write request to the DMA controller, causing the DMA controller to retrieve the target data and write it to the shared memory. The application server then retrieves the data from the shared memory and sends a second read / write request to the DMA controller, causing the DMA controller to execute the data processing task based on the target data in the shared memory. The specific process by which the DMA controller executes the data processing task based on the target data in the shared memory varies depending on the data processing task. The specific execution processes for different data processing tasks are illustrated below.

[0100] Case 1: The data processing task instructs to obtain the target data from the network card and write the target data to the disk. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk;

[0101] The second scenario: the data processing task instructs to obtain the target data from the network card and send the target data through the network card. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the network card, and sending the target data by the network card.

[0102] In a third scenario, the data processing task instructs obtaining the target data from the network card, writing the target data to a disk, and sending the target data via the network card. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a disk, writing the target data from the shared memory to the network card, and sending the target data via the network card.

[0103] A fourth scenario: the data processing task instructs to obtain the target data from the disk and write the target data to another disk. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk.

[0104] A fifth scenario: the data processing task instructs to obtain the target data from a disk and write the target data to another disk. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a network card, and the network card sends the target data.

[0105] In a sixth case, the data processing task instructs obtaining the target data from a disk, writing the target data to another disk, and sending the target data via a network card. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk, writing the target data from the shared memory to the network card, and sending the target data via the network card.

[0106] It should be noted that the above six situations are only exemplary. In some embodiments, the data processing task is a combination of two or more of the above situations, and may also include other data reading and writing situations between any two hardware devices based on the server, for example, obtaining the target data from a USB flash drive and writing the target data to a CD, or obtaining the target data from a disk and writing the target data to a USB flash drive, etc. The embodiments of the present application do not limit this.

[0107] The following takes the data processing task of storing the target data received by the network card in three copies as an example to introduce the data reading and writing method. Among them, storing the target data received by the network card in three copies means obtaining the target data from the network card, writing the target data to the disk, and sending the target data to the other two servers in the network through the network card, respectively, and the two servers each store the received target data to form three copies of the target data. Figure 3 is a flow chart of a data reading and writing method provided by an embodiment of the present application. As shown in Figure 3, taking the method being executed by a server as an example, the server includes a DMA controller, an application server and a shared memory. The application server runs in user mode, and both the user mode and the kernel mode can access the shared memory. The method includes the following steps 301 to 306.

[0108] 301. In response to a data processing task for target data, the application server sends a first read / write request for the target data to the DMA controller through a first system call. The data processing task instructs the target data received by the network card to be stored in three copies.

[0109] In response to the startup of the application server, the kernel state of the server allocates a section of memory in the memory as shared memory, and maps the shared memory to the virtual address space of the application server through the memory mapping (mmap) method. The kernel state uses a buddy algorithm and a slabs mechanism to manage the shared memory. In some embodiments, the shared memory meets the non-uniform memory access architecture (NUMA), that is, the shared memory has NUMA affinity, therefore, it can avoid the CPU from accessing the shared memory across NUMA nodes, thereby improving the efficiency of the CPU accessing the shared memory.

[0110] The kernel state of the server provides a first system call, the first system call instructing to obtain data and write the obtained data to the shared memory. In some embodiments, the first system call is compatible with a portable operating system interface. The first read / write request is used to read the target data from the network card and write the target data to the shared memory.

[0111] Among them, storing the target data received by the network card in a three-copy manner means obtaining the target data from the network card, writing the target data to the disk, and sending the target data to the other two servers in the network through the network card, respectively, and the two servers each store the received target data to form three copies of the target data. Among them, the three-copy method can be represented by Figure 4, which is a flow chart of a process for storing target data in a three-copy manner provided by an embodiment of the present application. As shown in Figure 4, the server includes a message module and a logic processing module, step ①: the message module receives the network message sent by the client; step ②: the logic processing module is used to parse the network message, and the result of the parsing determines the data processing task instruction to store the target data received by the network card in a three-copy manner; step ③: write the target data from the shared memory to the local disk; step ④: send the target data to a remote server through the network; step ⑤: send the target data to another remote server through the network.

[0112] It should be noted that the above step 301 is an implementation method in which the application server sends a first read / write request to the DMA controller in response to a data processing task for the target data. In some embodiments, this step is also implemented based on other methods, which is not limited in the embodiments of the present application.

[0113] 302. The DMA controller obtains the target data from the network card in response to the first read / write request, and writes the target data into a first memory block in the shared memory.

[0114] Wherein, in response to the first read / write request, the kernel state determines a first memory block in the shared memory, and the first memory block is used to store the target data. The DMA controller writes the target data obtained from the network card into the first memory block, and sends a completion response to the first read / write request to the application server. In the above method, for a read / write request, the kernel state allocates a block of memory in the shared memory for storing related data. When the read / write request is completed, the kernel state only needs to release the memory block without releasing the entire shared memory. That is, the shared memory can be reused by different processes after being allocated once, and there is no need to perform shared memory allocation and memory mapping every time a read / write request needs to be processed. This can save the resources of the server kernel state and improve the processing efficiency of read / write requests.

[0115] In some embodiments, the kernel state uses a best-fit algorithm to find a memory block from the free area of ​​the shared memory that can meet the job requirements and has the smallest size. This memory block is the first memory block. In the above method, by using the best-fit algorithm to allocate memory blocks from the shared memory, the fragmentation in the shared memory can be minimized, thereby improving the utilization rate of the shared memory. The free area of ​​the shared memory includes a zeroed area and a non-zeroed area. The memory in the zeroed area is clean memory and can directly write data without first performing an initialization operation (memset); the memory in the non-zeroed area is dirty memory and needs to be initialized before writing data to make it clean memory. In some embodiments, the kernel state determines the first memory block from the zeroed area of ​​the free area of ​​the shared memory. That is, the first memory block is clean memory and can directly write data without first initializing it before writing data, thereby improving the processing efficiency of read and write requests.

[0116] It should be noted that step 302 is an implementation method in which the DMA controller responds to the first read / write request, obtains the target data, and writes the target data into the shared memory. In some embodiments, this step is also implemented based on other methods, which is not limited in the embodiments of the present application.

[0117] 303. The application server obtains the target data from the shared memory through direct memory reading.

[0118] Among them, the application server obtains the starting address (virtual address) and length of the target data in the shared memory through the write interface, obtains the target data from the shared memory through direct memory reading, and determines the message header and verification information for the first server and the message header and verification information for the second server based on the starting address and length.

[0119] 304. The application server sends a second read / write request for the target data to the DMA controller through a second system call.

[0120] The kernel state of the server provides a second system call, which instructs execution of the data processing task based on the data in the shared memory. In some embodiments, the second system call is compatible with the portable operating system interface. The second read / write request is used to write the target data in the shared memory to the disk and send the target data to the first server and the second server respectively via the network card. The second read / write request carries the starting address and length information of the target data in the shared memory.

[0121] The second read / write request can be split into a write request for the disk, a write request for the first server, and a write request for the second server. The write request for the first server also carries a message header and verification information for the first server; the write request for the second server also carries a message header and verification information for the second server.

[0122] 305. The DMA controller writes the target data from the shared memory to the disk and writes the target data to the network card in response to the second read / write request.

[0123] In response to the second read / write request, the DMA controller converts the virtual address carried in the second read / write request into a physical address, and reads a data segment corresponding to the length information carried in the second read / write request from the shared memory to obtain the target data. The second read / write request can be split into a write request for the disk, a write request for the first server, and a write request for the second server. Correspondingly, in response to the write request for the disk, the DMA controller writes the read target data to the disk; in response to the write request for the first server, the DMA controller writes the read target data, a message header for the first server, and checksum information to the network card; and in response to the write request for the second server, the DMA controller writes the read target data, a message header for the second server, and checksum information to the network card.

[0124] The process shown in the above steps 303 to 305 can be represented by Figure 5, which is a schematic diagram of a process of sending target data to a server in a network provided by an embodiment of the present application.

[0125] 306. The network card sends the target data to the first server and the second server in the network respectively.

[0126] After the network card sends the target data to the first server and the second server, it starts asynchronous snooping to monitor the receiving responses of the first server and the second server.

[0127] In some embodiments, after the network card receives the receipt responses from the first server and the second server, the network card returns a delivery completion response for the target data to the application server. If the network card does not receive the receipt responses from either the first server or the second server within a preset time period, the operating system returns a delivery failure response for the target data to the application server.

[0128] It should be noted that the above steps 301 to 306 are described by taking the example of a first system call indicating the acquisition of data and writing the acquired data into the shared memory, and a second system call indicating the execution of the data processing task based on the data in the shared memory. In some embodiments, the first system call includes a receive system call (indicating the acquisition of data and the writing of the acquired data into the shared memory), and the second system call includes a send system call (indicating the writing of data from the shared memory into the network card, and the network card sending the data) and a write system call (indicating the writing of data from the shared memory into the disk). In some embodiments, the first system call and the second system call can also be split or combined according to actual needs, and the embodiments of the present application do not limit this.

[0129] The following uses Figures 6 and 7 as examples to illustrate the process shown in the above steps 301 to 306. Figure 6 is a flow chart of a method of storing data in three copies provided by an embodiment of the present application, and Figure 7 is a flow chart of a method of storing data in three copies provided by an embodiment of the present application. As shown in Figure 6, the network card receives a network message, and the kernel state applies for a memory block in the shared memory; the application server calls the receiving interface to receive the network message, and sends a receiving request to the DMA controller through the receiving system call, and the DMA controller writes the network message from the network card to the memory block applied for in the shared memory (corresponding to step ① in Figure 7); the application server reads the network message from the shared memory, and parses the network message to obtain the parsing result (that is, the data processing task); the application server calls the sending interface to call the sending system call, and sends a message to the DMA controller for the first server and the second server. The DMA controller sends data to the first server and the second server in the network in response to a write request (corresponding to steps ② and ③ in FIG7 ); the application server calls the write interface to call the write system call, sends a write request for the disk to the DMA controller, and the DMA controller writes data to the disk (corresponding to step ④ in FIG7 ); the application server asynchronously receives the results returned by the first server and the second server and the results returned by the disk (corresponding to steps ⑤ to ⑦ in FIG7 ); if the return result from the first server or the second server is not received, a failure response for the data processing task is returned to the application server; if the return result from the first server and the second server is received, a completion response for the data processing task is returned to the application server (corresponding to step ⑧ in FIG7 ).

[0130] In some embodiments, when the data processing task is completed, the kernel state releases the first memory block. Wherein, the kernel state releases the first memory block, that is, places the first memory block into a non-zero area in the shared memory free area. When the capacity of the content in the non-zero area reaches a preset capacity, the kernel state performs batch zeroing (that is, batch initialization) on the memory in the non-zero area, and places the zeroed memory into the zero area. This process is a response to the first memory block being released. If the capacity of the released memory in the shared memory reaches the preset capacity, the kernel state initializes the released memory. In some embodiments, this process is also implemented based on other methods, which is not limited in the embodiments of the present application.

[0131] Among them, the kernel state manages the shared memory based on the buddy algorithm. FIG8 is a flow chart of a shared memory management based on the buddy algorithm provided by an embodiment of the present application. As shown in FIG8 , the kernel state performs a memset operation on the dirty memory in the shared memory to convert the dirty memory into clean memory, and merges the memory block with a capacity of 1 page in the clean memory with its adjacent clean memory block to obtain a clean memory block with a capacity of 2 pages. If the memory block with a capacity of 2 pages adjacent to the clean memory block with a capacity of 2 pages is also clean memory, then it is merged into a clean memory with a capacity of 4 pages. The process is recursively repeated until no further merging is possible. In the above method, the buddy algorithm is used to manage shared memory, and the clean memory blocks that can be merged in the shared memory are merged, so that when allocating memory, the memory blocks that meet the job requirements and are the smallest in size can be allocated first, thereby reducing the generation of memory fragmentation and improving the utilization of shared memory.

[0132] In the above method, kernel state and user state share a shared memory, and the shared memory is mapped from kernel state to user state. This means that the application server can directly read and write data to the shared memory through direct memory access, without having to repeatedly copy data between the kernel state buffer and the application server buffer. In addition, zero copy of data between kernel state and user state is achieved through newly defined system calls. Since the newly defined system calls are compatible with the POSIX interface, there is no need to modify the application server API. The application server can call the newly defined system calls through the existing interface, which can save the development and migration costs of the application server. Furthermore, the shared memory has NUMA affinity, which can prevent the CPU from accessing the shared memory across NUMA nodes, thereby improving the efficiency of CPU access to the shared memory. In addition, the released memory is batch-zeroed, and the memory blocks allocated to the application server are clean memory, which can be directly written to without initialization operations before writing data. This can improve the processing efficiency of network messages, improve data transmission performance by 50%, and reduce memory latency by 20%.

[0133] FIG9 is a schematic structural diagram of a data reading and writing device provided in an embodiment of the present application. The device includes a writing module 901 and an execution module 902 .

[0134] A writing module 901 is configured to obtain target data in response to a first read / write request, and write the target data into a shared memory in the server. The first read / write request is sent by an application server in the server in response to a data processing task for the target data.

[0135] The execution module 902 is used to execute the data processing task based on the target data in the shared memory in response to the second read / write request sent by the application server. The second read / write request is sent by the application server after obtaining the target data from the shared memory.

[0136] Optionally, the shared memory satisfies a non-uniform memory access architecture.

[0137] Optionally, the writing module 901 is used to:

[0138] In response to the first read / write request, the target data is acquired and written into a first memory block in the shared memory.

[0139] Optionally, the first memory block is clean memory.

[0140] Optionally, the data processing task instructs to obtain the target data from the network card and write the target data to the disk, and the execution module 902 is used to: write the target data from the shared memory to the disk;

[0141] or,

[0142] The data processing task instructs to obtain the target data from the network card and send the target data through the network card, and the execution module 902 is used to: write the target data from the shared memory to the network card, and the network card sends the target data;

[0143] or,

[0144] The data processing task instructs to obtain the target data from the network card, write the target data to the disk and send the target data through the network card. The execution module 902 is used to: write the target data from the shared memory to the disk, write the target data from the shared memory to the network card, and send the target data by the network card.

[0145] Optionally, the data processing task instructs to obtain the target data from the disk and write the target data to another disk, and the execution module 902 is used to: write the target data from the shared memory to another disk;

[0146] or,

[0147] The data processing task instructs to obtain the target data from the disk and write the target data to another disk, and the execution module 902 is used to: write the target data from the shared memory to the network card, and the network card sends the target data;

[0148] or,

[0149] The data processing task instructs to obtain the target data from the disk, write the target data to another disk and send the target data through the network card. The execution module 902 is used to: write the target data from the shared memory to another disk, write the target data from the shared memory to the network card, and send the target data by the network card.

[0150] The writing module 901 and the execution module 902 can be implemented by software or hardware. For example, the implementation of the writing module 901 will be described below using the writing module 901 as an example. Similarly, the implementation of the execution module 902 can refer to the implementation of the writing module 901.

[0151] As an example of a software functional unit, the write module 901 may include code running on a computing instance. The computing instance may include at least one of a physical host (computing device), a virtual machine, and a container. Furthermore, the computing instance may be one or more. For example, the write module 901 may include code running on multiple hosts / virtual machines / containers. It should be noted that the multiple hosts / virtual machines / containers used to run the code may be distributed in the same region or in different regions. Furthermore, the multiple hosts / virtual machines / containers used to run the code may be distributed in the same availability zone (AZ) or in different AZs, each AZ including one data center or multiple geographically close data centers. Typically, a region may include multiple AZs.

[0152] Similarly, multiple hosts / virtual machines / containers running the code can be distributed within the same virtual private cloud (VPC) or across multiple VPCs. Typically, a VPC is set up within a region. Cross-region communication between two VPCs within the same region, or between VPCs in different regions, requires a communication gateway within each VPC to interconnect the VPCs.

[0153] As an example of a hardware functional unit, the write module 901 may include at least one computing device, such as a server. Alternatively, the write module 901 may be implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The PLD may be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0154] The multiple computing devices included in the write module 901 can be distributed in the same region or in different regions. The multiple computing devices included in the write module 901 can be distributed in the same AZ or in different AZs. Similarly, the multiple computing devices included in the write module 901 can be distributed in the same VPC or in multiple VPCs. The multiple computing devices can be any combination of servers, ASICs, PLDs, CPLDs, FPGAs, GALs, and other computing devices.

[0155] It should be noted that, in other embodiments, the steps that the above modules are responsible for implementing can be specified as needed, and the above modules can respectively implement different steps in the above data reading and writing method to realize all the functions of the above device. That is, the data reading and writing device provided in the above embodiment only uses the division of the above functional modules as an example to illustrate when implementing the data reading and writing method. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the device provided in the above embodiment and the corresponding method embodiment belong to the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0156] An embodiment of the present application provides a DMA controller, which is used to execute the data reading and writing method provided by any possible implementation method in the above method embodiment.

[0157] An embodiment of the present application provides a storage medium for storing at least one segment of program code, which is used to execute a data reading and writing method provided by any possible implementation manner in the above method embodiment.

[0158] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, storage, display, etc.), and signals involved in this application are all authorized by the user or fully authorized by all parties, and the collection, use, and processing of relevant data must comply with the relevant laws, regulations, and standards of the relevant countries and regions. For example, the network messages and data involved in this application are obtained with full authorization.

[0159] Those skilled in the art will appreciate that the various method steps and units described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the steps and components of each embodiment have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0160] Those skilled in the art will clearly understand that, for the sake of convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0161] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the unit is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or can be electrical, mechanical or other forms of connection.

[0162] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiments of the present application.

[0163] In addition, each unit in each embodiment of the present application may be integrated into a processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The above-mentioned integrated units may be implemented in the form of hardware or software units.

[0164] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling a computing device (which can be a personal computer, a server, or a computing device, etc.) to execute all or part of the steps of the method in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0165] In this application, the terms "first", "second", etc. are used to distinguish between identical or similar items having substantially the same effects and functions. It should be understood that there is no logical or temporal dependency between "first", "second", and "nth", nor is there a limit on quantity and execution order. It should also be understood that although the following description uses the terms first, second, etc. to describe various elements, these elements should not be limited by the terms. These terms are merely used to distinguish one element from another. For example, without departing from the scope of the various examples, a first read-write request may be referred to as a second read-write request, and similarly, a second read-write request may be referred to as a first read-write request. The first read-write request and the second read-write request may both be read-write requests, and in some cases, may be separate and different read-write requests.

[0166] It should also be understood that the term "if" may be interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting." Similarly, the phrase "if it is determined that..." or "if [stated condition or event] is detected" may be interpreted to mean "upon determining that..." or "in response to determining that..." or "upon detecting [stated condition or event]" or "in response to detecting [stated condition or event]," depending on the context.

[0167] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

[0168] In the above embodiments, all or part of the embodiments may be implemented using software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer program instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device.

[0169] The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired or wireless method. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, or a magnetic tape), an optical medium (e.g., a digital video disc (DVD), or a semiconductor medium (e.g., a solid-state drive)), etc.

[0170] Those skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware, or may be accomplished by a program to instruct the relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0171] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A data reading and writing method, characterized in that: Applied to a server, the server includes a DMA controller, an application server and a shared memory, the application server runs in a user state, and both the user state and the kernel state can access the shared memory, the method includes: The application server sends a first read / write request to the DMA controller in response to a data processing task for target data; The DMA controller obtains the target data in response to the first read / write request, and writes the target data into the shared memory; The application server obtains the target data from the shared memory and sends a second read / write request to the DMA controller; The DMA controller executes the data processing task based on the target data in the shared memory in response to the second read / write request.

2. The method according to claim 1, characterized in that The shared memory satisfies a non-uniform memory access architecture.

3. The method according to claim 1, characterized in that The DMA controller obtains the target data in response to the first read / write request, and writes the target data into the shared memory, including: The DMA controller obtains the target data in response to the first read / write request, and writes the target data into a first memory block in the shared memory.

4. The method according to claim 3, characterized in that The first memory block is a clean memory.

5. The method according to claim 1, characterized in that The application server obtains the target data from the shared memory including: The application server obtains the target data from the shared memory through direct memory access.

6. The method according to claim 1, characterized in that The kernel state provides a first system call, the first system call indicates obtaining data and writing the obtained data into the shared memory, and the sending of the first read / write request to the DMA controller includes: The application server sends the first read / write request to the DMA controller through the first system call.

7. The method according to claim 6, characterized in that The first system call is compatible with a portable operating system interface.

8. The method according to claim 1, characterized in that The kernel state provides a second system call, the second system call indicates to perform a data processing task based on the data in the shared memory, and the sending a second read / write request to the DMA controller includes: The application server sends the second read / write request to the DMA controller through the second system call.

9. The method according to claim 8, characterized in that The second system call is compatible with a portable operating system interface.

10. The method according to any one of claims 1 to 9, characterized in that The method further comprises: When the capacity of the released memory in the shared memory reaches a preset capacity, the kernel state initializes the released memory.

11. The method according to claim 1, characterized in that: The data processing task indicates obtaining the target data from the network card and writing the target data to a disk, and the performing of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a disk; or, The data processing task indicates obtaining the target data from the network card and sending the target data through the network card, and the performing of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into the network card, and sending the target data by the network card; or, The data processing task indicates obtaining the target data from the network card, writing the target data to the disk, and sending the target data through the network card. The execution of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.

12. The method according to claim 1, characterized in that The data processing task indicates obtaining the target data from a disk and writing the target data into another disk, and the performing of the data processing task based on the target data in the shared memory comprises: writing the target data from the shared memory into another disk; or, The data processing task indicates obtaining the target data from a disk and writing the target data into another disk, and the performing of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into a network card, and the network card sending the target data; or, The data processing task indicates obtaining the target data from the disk, writing the target data to another disk, and sending the target data through the network card. The execution of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.

13. A data reading and writing method, characterized in that: The method comprises: Responding to a first read / write request, acquiring target data, and writing the target data into a shared memory of the server, wherein the first read / write request is sent by an application service end in the server in response to a data processing task for the target data; In response to a second read / write request, the data processing task is performed based on the target data in the shared memory, and the second read / write request is sent by the application server after obtaining the target data from the shared memory.

14. A data reading and writing device, characterized in that: The device comprises: A writing module, configured to obtain target data in response to a first read / write request and write the target data into a shared memory in the server, wherein the first read / write request is sent by an application server in the server in response to a data processing task for the target data; The execution module is used to execute the data processing task based on the target data in the shared memory in response to a second read / write request, wherein the second read / write request is sent by the application server after obtaining the target data from the shared memory.

15. A server, characterized in that: The server includes a processor, a memory and a DMA controller, the memory stores program codes, and the processor is used to execute the program codes, so that the server executes the data reading and writing method according to any one of claims 1 to 12.

16. A DMA controller, characterized in that: The DMA controller is used to execute the data reading and writing method as claimed in claim 13.

17. A storage medium, characterized in that: The storage medium is used to store at least one section of program code, and the at least one section of program code is used to execute the data reading and writing method according to any one of claims 1 to claim 13.

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