Image processing method and apparatus, and electronic device and medium

Abstract

The present application belongs to the technical field of image processing. Disclosed are an image processing method and apparatus, and an electronic device and a medium. The method of the present application comprises: determining an image processing mode for a first image, wherein the image processing mode comprises a plurality of image processing algorithms; generating a first task and a second task on the basis of a frame rate of an image sequence and a processing time for each image processing algorithm; processing the first image on the basis of the first task, so as to obtain a second image and store same in a cache region; and processing the second image on the basis of the second task, so as to obtain a third image, wherein the image sequence comprises the first image, the first task comprises one or more of the plurality of image processing algorithms, and the second task comprises one or more image processing algorithms other than the first task among the plurality of image processing algorithms.

Description

Image processing method, device, electronic device and medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Chinese patent application No. 202311267644.2 filed in China on September 27, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present application belongs to the field of image processing technology, and specifically relates to an image processing method, device, electronic device and medium. Background Art

[0004] With the rapid development of mobile electronic devices, users are increasingly demanding higher image quality from their device cameras in a variety of complex scenarios. Currently, image processing for complex scenes like night scenes and portraits often takes a long time to meet user demands for effects like noise reduction and beautification.

[0005] However, when faced with some large-scale image processing tasks, it is easy to have processing omissions or errors.

[0006] Summary of the Invention

[0007] The purpose of the embodiments of the present application is to provide an image processing method, device, electronic device and medium that can solve the problem of omissions or errors caused by the high complexity of image processing tasks.

[0008] In a first aspect, an embodiment of the present application provides an image processing method, comprising:

[0009] determining an image processing method for the first image, wherein the image processing method includes a plurality of image processing algorithms;

[0010] generating a first task and a second task according to a frame rate of the image sequence and a processing time of each of the image processing algorithms;

[0011] Processing the first image according to the first task to obtain a second image and storing the second image in a buffer area;

[0012] processing the second image according to the second task to obtain a third image;

[0013] The image sequence includes the first image, the first task includes one or more of the multiple image processing algorithms, and the second task includes one or more of the multiple image processing algorithms except the first task.

[0014] In a second aspect, an embodiment of the present application provides an image processing device, comprising:

[0015] A first processing module, configured to determine an image processing method for the first image, wherein the image processing method includes a plurality of image processing algorithms;

[0016] a second processing module, configured to generate a first task and a second task according to a frame rate of the image sequence and a processing time of each of the image processing algorithms;

[0017] a third processing module, configured to process the first image according to the first task, obtain a second image, and store the second image in a buffer area;

[0018] a fourth processing module, configured to process the second image according to the second task to obtain a third image;

[0019] The image sequence includes the first image, the first task includes one or more of the multiple image processing algorithms, and the second task includes one or more of the multiple image processing algorithms except the first task.

[0020] In a third aspect, an embodiment of the present application provides an electronic device comprising a processor and a memory, wherein the memory stores programs or instructions that can be run on the processor, and when the programs or instructions are executed by the processor, the steps of the method described in the first aspect are implemented.

[0021] In a fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the method described in the first aspect are implemented.

[0022] In a fifth aspect, an embodiment of the present application provides a chip, which includes a processor and a communication interface, the communication interface and the processor are coupled, and the processor is used to run programs or instructions to implement the method described in the first aspect.

[0023] In a sixth aspect, an embodiment of the present application provides a computer program / program product, which is stored in a storage medium and executed by at least one processor to implement the method described in the first aspect.

[0024] In an embodiment of the present application, after determining the image processing method for the first image according to user needs, the first task and the second task can be generated by combining the frame rate of the image sequence and the processing time of each image processing algorithm in the image processing method; then, the first task is executed to process the first image to obtain the second image, the second image is stored in the cache area, and then the second task is executed to process the second image to obtain the third image. Therefore, when faced with image processing involving multiple image processing algorithms, the multiple image processing algorithms can be decomposed into multiple tasks to achieve more refined image processing and avoid omissions or errors in the processing of the first image. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] FIG1 is a schematic flow chart of an image processing method according to an embodiment of the present application;

[0026] FIG2 is a schematic diagram of an application of the image processing method according to an embodiment of the present application;

[0027] FIG3 is a schematic diagram of the module structure of the image processing device according to an embodiment of the present application;

[0028] FIG4 is a schematic structural diagram of an electronic device according to an embodiment of the present application;

[0029] FIG5 is a schematic structural diagram of an electronic device according to another embodiment of the present application. DETAILED DESCRIPTION

[0030] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0031] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable, where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of a class, and do not limit the number of objects; for example, the first object can be one or more. Furthermore, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0032] For ease of understanding, some of the contents involved in the embodiments of this application are described below:

[0033] Main image processor: refers to the image signal processing module that comes with the main chip of a mobile device, such as the image signal processing (ISP) module of Qualcomm series chips.

[0034] External image processor: refers to the image signal processing module developed by mobile device manufacturers, which is connected to the main chip of the device as a separate chip.

[0035] The transmission and processing process of the external image processor are both considered to be a node in the video image processing pipeline. If a user wants to record a video with a frame rate of 30 frames per second (Fps), the image sensor generates a frame of image every 1000 / 30=33.33 milliseconds and hands it over to the image signal processor pipeline for processing. If the processing time of a node in the pipeline exceeds 33.33 milliseconds, it will cause pipeline processing congestion, resulting in video frame loss. As a node in the pipeline, the transmission and processing time of the external image processor are generally difficult to complete within 33.33 milliseconds, especially for high-resolution video images such as 4k. Usually, the processing time of the node can only be limited to within 33.33 milliseconds by limiting the resolution of the image of the external processing node or simplifying the processing algorithm.

[0036] The image processing method provided in the embodiment of the present application is described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0037] As shown in FIG1 , an image processing method according to an embodiment of the present application includes:

[0038] Step 101: Determine an image processing method for a first image, where the image processing method includes one or more image processing algorithms.

[0039] Determining the image processing method for the first image can be specifically based on user needs. User needs refer to the user's processing requirements for the first image (the image to be processed), such as noise reduction or image blurring. The image processing method includes multiple image processing algorithms executed on the first image. In this step, determining the image processing method for the first image will ensure that subsequent image processing that meets the user's needs is completed according to this image processing method.

[0040] Step 102: Generate a first task and a second task according to the frame rate of the image sequence and the processing time of each of the image processing algorithms.

[0041] The image sequence includes the first image, the first task includes one or more of the multiple image processing algorithms, and the second task includes image processing algorithms other than the first task. In this step, the image processing task is divided into two tasks based on the frame rate of the image sequence and the processing time of each image processing algorithm in the image processing method.

[0042] Step 103: Process the first image according to the first task to obtain a second image and store it in a buffer area.

[0043] In this step, the first image is processed for the first task to obtain a processed second image, and the second image is stored in a buffer area.

[0044] Step 104: Process the second image according to the second task to obtain a third image;

[0045] In this step, the second image is further processed for the second task to obtain a processed third image.

[0046] In this way, according to the above steps 101-104, the electronic device that executes the method of the embodiment of the present application can, based on user needs, after determining the image processing method for the first image, generate the first task and the second task in combination with the frame rate of the image sequence and the processing time of each image processing algorithm in the image processing method; then, first execute the first task to process the first image to obtain the second image, store the second image in the cache area, and then execute the second task to process the second image to obtain the third image. Therefore, when faced with image processing involving multiple image processing algorithms, the multiple image processing algorithms can be decomposed into multiple tasks to achieve more refined image processing and avoid omissions or errors in the processing of the first image.

[0047] In this embodiment, for camera image signals, the image sequence may be an image sequence captured by shooting a video, or an image sequence captured in a preview mode. Of course, for other image signals of electronic devices, the image sequence may be an image sequence of video playback, etc., which will not be described in detail herein.

[0048] In this embodiment, two buffer areas can also be set, and three tasks can be generated accordingly, and the images obtained by the first two tasks can be stored in the corresponding buffer areas. Of course, more buffer areas can be set and a corresponding number of tasks can be generated to complete image processing that meets user needs, which will not be listed here one by one.

[0049] Optionally, the method of this embodiment is applied to an electronic device, wherein the electronic device includes a first image processor and a second image processor;

[0050] In a case where the first image processor receives the image sequence transmitted by the second image processor, the first image processor executes the plurality of image processing algorithms on the image sequence;

[0051] After the first image is processed according to the first task to obtain a second image and the second image is stored in a buffer area, the method further includes:

[0052] Processing the fourth image according to the first task to obtain a fifth image and storing the fifth image in a buffer area;

[0053] The fourth image is an image subsequent to the first image in the image sequence.

[0054] Here, the first image processor is an external image processor; the first image processor and the second image processor are connected as main image processors. The first image processor is a processor with certain image processing algorithms specifically designed for complex image processing scenarios.

[0055] In this way, for a certain frame in the image sequence, after processing that frame according to the first task and storing the resulting second image in the buffer, the next frame can be processed according to the first task; and for the second image in the buffer, the second image is processed according to the second task, and similarly, the fifth image can be processed according to the second task. Therefore, according to user needs, the image processing time for each frame can be unrestricted by the image frame rate. Of course, after all frames in the image sequence are processed, a video that meets the user's needs can be obtained.

[0056] Optionally, generating the first task and the second task according to the frame rate of the image sequence and the processing time of each of the image processing algorithms includes:

[0057] Calculating the total processing time of each frame of the image according to the image frame rate;

[0058] generating the first task and the second task according to the total duration and the processing time of each of the image processing algorithms;

[0059] The processing time of the first task is less than or equal to the total duration; the processing time of the second task is less than or equal to the total duration.

[0060] Here, the processing time of the first task is the processing time of one or more image processing algorithms included in the first task; the processing time of the second task is the processing time of one or more image processing algorithms included in the second task.

[0061] That is to say, the processing time of the first task is less than or equal to the total duration calculated based on the frame rate of the image sequence, and the processing time of the second task is less than or equal to the total duration, ensuring that the processing time of the first task and the processing time of the second task will not exceed the frame interval of the original image stream (image sequence).

[0062] For example, the image processing method includes a beautification algorithm (function), a blur function, a drawing function, and a filter function. The beautification process takes 20ms, the blur process takes 10ms, the drawing process takes 25ms, and the filter process takes 5ms. If the image processing method is used, the next frame of the image can only be processed after these four functions are completed. In this way, the processing time of a frame of image requires 20+10+25+5=60ms, which means that a frame of image needs to be received and processed every 60ms. If the beautification function and the blur function are divided into the first task, the drawing function and the filter function are placed in the second task. After beautifying and blurring according to the first task (taking 30ms), the image is placed in the cache area, and then the next frame of image can be beautified and blurred. At the same time, the image is obtained from the cache area, and brushing and filtering are performed. In this way, a frame of image is received and processed every 30ms, meeting the processing requirement of an image frame rate of 30fps.

[0063] In some embodiments, in addition to meeting the aforementioned time requirements, the image processing algorithms assigned to the first and second tasks must also ensure that the functions are logically consistent. For example, functions that have no logical relationship can be evenly assigned to the first and second tasks based on processing time.

[0064] Optionally, in some embodiments, processing the first image according to the first task to obtain the second image and storing the second image in a buffer area includes:

[0065] For the first image, controlling the first image processor to execute a corresponding image processing algorithm according to the first task to obtain the second image;

[0066] The second image is stored in a buffer area of ​​the first image processor.

[0067] Here, the first image processor is an external image processor, connected to the second image processor, also known as the main image processor, and receives the frame image output by the second image processor for image processing. A cache area is provided in the first image processor, which can implement a ping-pong buffer, that is, composed of two independent storage bodies, enabling greater flexibility in terms of speed and capacity. The first task can be understood as pre-processing by the first image processor. Therefore, after receiving the frame image output by the second image processor, the first image processor executes the image processing algorithm according to the first task, completes the pre-processing of the first image, obtains the second image, and stores the second image in the ping-pong buffer.

[0068] Among them, the image processing algorithm supported by the first image processor is pre-set, and the image processing algorithm may include processing functions for camera image signals, such as beauty function, blur function, brushing function and filter function, etc.; the image processing algorithm may also include processing functions for other image signals, such as anti-shake function, noise reduction function, 3D rendering function, image fusion function, etc.

[0069] Optionally, in some embodiments, processing the second image according to the second task to obtain a third image includes:

[0070] Acquire the second image in the buffer area;

[0071] For the second image, the first image processor is controlled to execute a corresponding image processing algorithm according to the second task to obtain the third image.

[0072] The second task can be understood as post-processing of the first image processor. Therefore, after extracting the second image from the ping-pong buffer, the first image processor executes the corresponding image processing algorithm according to the second task to complete the post-processing of the second image and obtain the third image.

[0073] Optionally, in some embodiments, the method further comprises:

[0074] After extracting the second image, the second image is deleted from the buffer area.

[0075] That is, after the second image is extracted, it will be deleted from the cache in a timely manner to reduce the consumption of storage space.

[0076] The following describes the application of the method of the embodiment of the present application in conjunction with specific scenarios:

[0077] Step 201: The image sensor generates an image;

[0078] The image sensor generates a continuous raw image stream at a fixed image sequence frame rate based on the current scene and sends it to the main image sensor for front-end processing.

[0079] Step 202: Processing by the main image processor;

[0080] After receiving the original image stream from the image sensor, the main image processor first converts it into a YUV format image, performs corresponding anti-shake, face detection and other algorithm processing, and then sends the processed image to the external image processor.

[0081] Step 203: The external image processor receives the image and performs pre-processing;

[0082] After receiving the image, the external image processor performs the image processing algorithm in the first task. After the processing is completed, the image is temporarily stored in the ping-pong buffer. Then, the external processor pre-processing can receive the next frame of image for processing.

[0083] Step 204: The external image processor post-processes and returns the image;

[0084] The external image processor retrieves the pre-processed image from the ping-pong buffer and clears the ping-pong buffer. It then applies the image processing algorithm from the second task to the acquired image. Once the external image processor completes processing, it returns the processed image to the main image processor.

[0085] Step 204: Save and display the recorded video;

[0086] After the main image processor receives the image, it sends it to the encoder to be stored as a video file, and at the same time sends it to the display for real-time preview.

[0087] In summary, the method of the embodiment of the present application solves the limitation of the frame rate of the image sequence on the transmission processing time requirement of the external image processor, so that the external image processing chip can support more and more complex algorithms, and can also support video processing with higher frame rates, which is equivalent to improving the performance of the chip in disguise.

[0088] The image processing method provided in the embodiment of the present application can be executed by an image processing device. In the embodiment of the present application, the image processing device provided in the embodiment of the present application is described by taking the image processing device executing the image processing method as an example.

[0089] As shown in FIG3 , an image processing apparatus 300 according to an embodiment of the present application includes:

[0090] A first processing module 310 is configured to determine an image processing method for the first image, wherein the image processing method includes a plurality of image processing algorithms;

[0091] A second processing module 320 is configured to generate a first task and a second task according to a frame rate of the image sequence and a processing time of each of the image processing algorithms;

[0092] A third processing module 330 is configured to process the first image according to the first task to obtain a second image and store the second image in a buffer area;

[0093] a fourth processing module 340, configured to process the second image according to the second task to obtain a third image;

[0094] The image sequence includes the first image, the first task includes one or more of the multiple image processing algorithms, and the second task includes one or more of the multiple image processing algorithms except the first task.

[0095] Optionally, the second processing module includes:

[0096] A first processing unit, configured to calculate a total processing time of each image frame according to a frame rate of the image sequence;

[0097] a second processing unit, configured to generate the first task and the second task according to the total duration and the processing time of each of the image processing algorithms;

[0098] The processing time of the first task is less than or equal to the total duration; the processing time of the second task is less than or equal to the total duration.

[0099] Optionally, the third processing module includes:

[0100] a first control unit, configured to control a first image processor to execute a corresponding image processing algorithm according to the first task on the first image, so as to obtain the second image;

[0101] The third processing unit is configured to store the second image in a cache area of ​​the first image processor.

[0102] Optionally, the fourth processing module includes:

[0103] a fourth processing unit, configured to obtain the second image in the buffer area;

[0104] The second control unit is configured to control the first image processor to execute a corresponding image processing algorithm according to the second task on the second image to obtain the third image.

[0105] Optionally, the device further comprises:

[0106] A fifth processing module is configured to delete the second image from the buffer area after extracting the second image.

[0107] Optionally, the apparatus comprises a first image processor and a second image processor;

[0108] In a case where the first image processor receives the image sequence transmitted by the second image processor, the first image processor executes the plurality of image processing algorithms on the image sequence;

[0109] The device further comprises:

[0110] a fifth processing module, configured to process the fourth image according to the first task to obtain a fifth image and store the fifth image in a buffer area;

[0111] The fourth image is an image subsequent to the first image in the image sequence.

[0112] After determining the image processing method for the first image, the device can generate a first task and a second task by combining the frame rate of the image sequence and the processing time of each image processing algorithm in the image processing method; then, the first task is executed to process the first image to obtain the second image, the second image is stored in a cache area, and the second task is executed to process the second image to obtain the third image. Therefore, when faced with image processing involving multiple image processing algorithms, the multiple image processing algorithms can be decomposed into multiple tasks to achieve more refined image processing and avoid omissions or errors in the processing of the first image.

[0113] The image processing device in the embodiment of the present application can be an electronic device or a component in the electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other device other than a terminal. For example, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a mobile Internet device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a personal digital assistant (PDA), etc. It can also be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), a teller machine or a self-service machine, etc., and the embodiment of the present application does not specifically limit it.

[0114] The image processing device in the embodiment of the present application may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0115] The image processing device provided in the embodiment of the present application can implement each process implemented in the method embodiments of Figures 1 to 2. To avoid repetition, they will not be described here.

[0116] Optionally, as shown in Figure 4, an embodiment of the present application also provides an electronic device 400, including a processor 401 and a memory 402, and the memory 402 stores a program or instruction that can be run on the processor 401. When the program or instruction is executed by the processor 401, the various steps of the above-mentioned image processing method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0117] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0118] FIG5 is a schematic diagram of the hardware structure of an electronic device implementing an embodiment of the present application.

[0119] The electronic device 500 includes but is not limited to components such as a radio frequency unit 501 , a network module 502 , an audio output unit 503 , an input unit 504 , a sensor 505 , a display unit 506 , a user input unit 507 , an interface unit 508 , a memory 509 , and a processor 510 .

[0120] Those skilled in the art will appreciate that the electronic device 500 may further include a power source (e.g., a battery) to power various components. The power source may be logically connected to the processor 510 via a power management system, thereby enabling the power management system to manage charging, discharging, and power consumption. The electronic device structure shown in FIG5 does not limit the electronic device. The electronic device may include more or fewer components than shown, or may combine certain components or arrange the components differently, which will not be described in detail here.

[0121] The processor 510 is configured to determine an image processing method for the first image, wherein the image processing method includes a plurality of image processing algorithms;

[0122] generating a first task and a second task according to a frame rate of the image sequence and a processing time of each of the image processing algorithms;

[0123] Processing the first image according to the first task to obtain a second image and storing the second image in a buffer area;

[0124] processing the second image according to the second task to obtain a third image;

[0125] The image sequence includes the first image, the first task includes one or more of the multiple image processing algorithms, and the second task includes one or more of the multiple image processing algorithms except the first task.

[0126] The device can, based on user needs, after determining the image processing method for the first image, generate a first task and a second task in combination with the frame rate of the image sequence and the processing time of each image processing algorithm in the image processing method; then, first execute the first task to process the first image to obtain the second image, store the second image in a cache area, and then execute the second task to process the second image to obtain the third image. Therefore, when faced with image processing involving multiple image processing algorithms, the multiple image processing algorithms can be decomposed into multiple tasks to achieve more refined image processing and avoid omissions or errors in the processing of the first image.

[0127] Optionally, the processor 510 is further configured to calculate a total processing time of each frame of the image according to a frame rate of the image sequence;

[0128] generating the first task and the second task according to the total duration and the processing time of each of the image processing algorithms;

[0129] The processing time of the first task is less than or equal to the total duration; the processing time of the second task is less than or equal to the total duration.

[0130] Optionally, the processor 510 is further configured to control the first image processor to execute a corresponding image processing algorithm according to the first task on the first image to obtain the second image;

[0131] The second image is stored in a buffer area of ​​the first image processor.

[0132] Optionally, the processor 510 is further configured to obtain the second image in the buffer area;

[0133] For the second image, the first image processor is controlled to execute a corresponding image processing algorithm according to the second task to obtain the third image.

[0134] Optionally, the processor 510 is further configured to delete the second image from the cache after extracting the second image.

[0135] Optionally, the electronic device includes a first image processor and a second image processor;

[0136] In a case where the first image processor receives the image sequence transmitted by the second image processor, the first image processor executes the plurality of image processing algorithms on the image sequence;

[0137] The processor 510 is further configured to process the fourth image according to the first task to obtain a fifth image and store the fifth image in a buffer area;

[0138] The fourth image is an image subsequent to the first image in the image sequence.

[0139] It should be understood that in an embodiment of the present application, the input unit 504 may include a graphics processing unit (GPU) 5041 and a microphone 5042, and the graphics processor 5041 processes the image data of a static picture or video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 506 may include a display panel 5061, and the display panel 5061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 507 includes a touch panel 5071 and at least one of other input devices 5072. The touch panel 5071 is also called a touch screen. The touch panel 5071 may include two parts: a touch detection device and a touch controller. Other input devices 5072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and an operating stick, which will not be repeated here.

[0140] The memory 509 can be used to store software programs and various data. The memory 509 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, applications or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 509 may include a volatile memory or a non-volatile memory, or the memory 509 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM), and a direct memory bus random access memory (DRRAM). The memory 509 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0141] Processor 510 may include one or more processing units. Optionally, processor 510 integrates an application processor and a modem processor. The application processor primarily handles operations related to the operating system, user interface, and application programs, while the modem processor primarily processes wireless communication signals, such as a baseband processor. It is understood that the modem processor may not be integrated into processor 510.

[0142] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned image processing method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0143] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0144] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned image processing method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0145] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0146] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned image processing method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0147] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0148] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the relevant technology, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0149] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. An image processing method, comprising: Determining an image processing method for the first image, wherein the image processing method includes a plurality of image processing algorithms; generating a first task and a second task according to a frame rate of the image sequence and a processing time of each of the image processing algorithms; Processing the first image according to the first task to obtain a second image and storing the second image in a buffer area; Processing the second image according to the second task to obtain a third image; The image sequence includes the first image, the first task includes one or more of the multiple image processing algorithms, and the second task includes one or more of the multiple image processing algorithms except the first task.

2. The method according to claim 1, wherein: The generating of the first task and the second task according to the frame rate of the image sequence and the processing time of each of the image processing algorithms comprises: Calculating the total duration of processing each frame of the image according to the frame rate of the image sequence; Generate the first task and the second task according to the total duration and the processing time of each of the image processing algorithms; The processing time of the first task is less than or equal to the total duration, and the processing time of the second task is less than or equal to the total duration.

3. The method according to claim 1, wherein: The step of processing the first image according to the first task to obtain a second image and storing the second image in a buffer area includes: For the first image, controlling the first image processor to execute a corresponding image processing algorithm according to the first task to obtain the second image; The second image is stored in a buffer area of ​​the first image processor.

4. The method according to claim 3, wherein: The step of processing the second image according to the second task to obtain a third image includes: Acquire the second image in the buffer area; For the second image, the first image processor is controlled to execute a corresponding image processing algorithm according to the second task to obtain the third image.

5. The method according to claim 4, wherein: The method further comprises: After acquiring the second image, the second image is deleted from the buffer area.

6. The method according to any one of claims 1 to 5, wherein: Applied to an electronic device, the electronic device comprises a first image processor and a second image processor; In a case where the first image processor receives the image sequence transmitted by the second image processor, the first image processor executes the plurality of image processing algorithms on the image sequence; After the first image is processed according to the first task to obtain the second image and store it in the buffer area, Also includes: Processing the fourth image according to the first task to obtain a fifth image and storing it in a buffer area; The fourth image is an image subsequent to the first image in the image sequence.

7. An image processing device, comprising: A first processing module, used to determine an image processing method for the first image, wherein the image processing method includes a plurality of image processing algorithms; A second processing module, used for generating a first task and a second task according to a frame rate of the image sequence and a processing time of each of the image processing algorithms; A third processing module, used for processing the first image according to the first task to obtain a second image and store it in a cache area; a fourth processing module, configured to process the second image according to the second task to obtain a third image; The image sequence includes the first image, the first task includes one or more of the multiple image processing algorithms, and the second task includes one or more of the multiple image processing algorithms except the first task.

8. The device according to claim 7, wherein: The second processing module comprises: A first processing unit, configured to calculate a total duration of processing each frame of the image according to a frame rate of the image sequence; A second processing unit, configured to generate the first task and the second task according to the total duration and the processing time of each of the image processing algorithms; The processing time of the first task is less than or equal to the total duration; the processing time of the second task is less than or equal to the total duration.

9. An electronic device comprising a processor and a memory, wherein the memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, the steps of the image processing method according to any one of claims 1 to 6 are implemented.

10. A readable storage medium storing a program or an instruction, wherein the program or the instruction, when executed by a processor, implements the steps of the image processing method according to any one of claims 1 to 6.

11. A chip, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run a program or an instruction to implement the image processing method according to any one of claims 1 to 6.

12. A computer program product, wherein the program product is executed by at least one processor to implement the image processing method according to any one of claims 1 to 6.

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