LED display drive control method and system

Abstract

Provided in the present invention are an LED display drive control method and system. The LED display drive control method provided in the present invention comprises: on the basis of an external control signal, calculating time configurations of a plurality of stages of a scanning display period of each driving port, and dividing a scanning display period into a high-resistance stage, a first discharging stage, a delay stage, a row scanning enabling stage, a driving lighting stage and a second discharging stage; and then switching driving modes of the port on the basis of the corresponding time configurations. Thus, different driving modes are used to improve the display effect.

Description

LED display drive control method and system Technical Field

[0001] The present invention relates to the technical field of LED display control, and in particular to an LED display drive control method and system. Background Art

[0002] Dot matrix display is a technology that uses LEDs, LCDs, and other units arranged on a flat surface to display images or text. The dot matrix consists of many small display units (pixels) arranged in a regular grid, and the brightness or color of each pixel can be independently controlled to form an image or text. Digital tube display is a technology that uses seven-segment digital tubes or other multi-segment display devices to display numbers, letters, and some special symbols. A digital tube typically consists of seven independent LED segments, each representing the decimal digits 0-9, as well as some letters and symbols. By controlling the on and off states of these LED segments, the desired number or character can be displayed.

[0003] LEDs are currently the most common display elements in dot-matrix and digital tube displays. As their applications grow, the need to drive more LEDs is shifting towards better display quality. However, most current LED display drivers only allow for configuration of grayscale and line scan frequency, without the ability to optimize the display quality.

[0004] Based on this, a new solution is needed.

[0005] Summary of the Invention

[0006] The object of the present invention is to provide an LED display drive control method and system to optimize and adjust the display effect without affecting the display state.

[0007] An embodiment of the present invention provides an LED display drive control method, comprising the following steps:

[0008] Receive external input control signal;

[0009] Calculating the time configuration of multiple phases of the scanning display cycle of each driving port according to the control signal; and

[0010] According to the time configuration of the multiple stages of the scanning and display cycle, each driving port is controlled to perform mode switching.

[0011] In the LED display drive control method provided by the present invention, the multiple stages of the scanning display cycle include multiple stages of a high-resistance stage, a first discharge stage, a delay stage, a row scan enable stage, a driving light stage and a second discharge stage.

[0012] In the LED display driving and controlling method provided by the present invention, when a time-division multiplexing driving scheme is adopted at the driving ports, including n driving ports, calculating the time configuration of multiple stages of the scanning display cycle for each driving port according to the control signal includes:

[0013] In the i-th line scanning cycle, the i-th driving port sequentially experiences a high-impedance stage, a line scanning enable stage, a high-impedance stage, and a second discharge stage, where the duration of the high-impedance stage is t1, the duration of the line scanning enable stage is t4, and the duration of the second discharge stage is t5;

[0014] When the i-th driving port is in the high-impedance stage and the second discharge stage, the remaining driving ports are respectively in the high-impedance stage and the second discharge stage;

[0015] When the i-th driving port is in the line scanning enable stage, when j < i, the j-th driving port sequentially experiences a first discharge stage, (j - 1) delay stages, a driving lighting stage, (n - j - 1) delay stages, and a first discharge stage. When i < j, the j-th driving port sequentially experiences a first discharge stage, (j - 2) delay stages, a driving lighting stage, (n - j) delay stages, and a first discharge stage, where the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

[0016] In the LED display driving and controlling method provided by the present invention, the driving module of each driving port includes a PMOS transistor, an NMOS transistor, a first inverter, and a second inverter. The source of the PMOS transistor is connected to the power supply, the source of the NMOS transistor is connected to the ground, the drains of the PMOS transistor and the NMOS transistor are commonly connected, the gate of the PMOS transistor is connected to the first inverter, the gate of the NMOS transistor is connected to the second inverter. Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display cycle includes:

[0017] In the high-impedance stage, the PMOS transistors and NMOS transistors of all driving ports are turned off. In the second discharge stage, the PMOS transistors of all driving ports are turned off and the NMOS transistors are turned on;

[0018] When the i-th driving port is in the line scanning enable stage, the PMOS transistor of the i-th driving port is turned off and the NMOS transistor is turned on. When in the first discharge stage, the PMOS transistor and the NMOS transistor of the corresponding driving port are both turned off. When in the driving lighting stage, the PMOS transistor of the corresponding driving port is turned on and the NMOS transistor is turned off. When in the delay stage, the PMOS transistor and the NMOS transistor of the corresponding driving port are both turned off.

[0019] In the LED display drive control method provided by the present invention, when the drive port adopts a segment-type LED drive solution or an external MOS-type drive solution, the drive port includes x segment selection ports and y bit selection ports. Calculating the time configuration of multiple stages of the scanning display cycle of each drive port according to the control signal includes:

[0020] In the i-th line scan cycle, the i-th segment select port is valid, and the other segment select ports are invalid, and the i-th segment select port sequentially undergoes a high-impedance stage and a line scan enable stage, wherein the duration of the high-impedance stage is t1, and the duration of the line scan enable stage is t4;

[0021] When the i-th segment selection port is in the high-impedance stage, all bit selection ports are in the high-impedance stage respectively;

[0022] When the i-th segment selection port is in the row scan enable stage, the j-th bit selection port sequentially undergoes the first discharge stage, (j-1) delay stages, the driving light-up stage, (yj-1) delay stages, and the first discharge stage, wherein the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving light-up stage is t6, and t4=2*t2+t6+(n-2)*t3.

[0023] In the LED display drive control method provided by the present invention, each segment selection port includes a third inverter and an NMOS transistor, and each bit selection port includes a fourth inverter and a PMOS transistor. According to the time configuration of the multiple stages of the scanning display cycle, controlling each drive port to perform mode switching includes:

[0024] In the high-resistance stage, the NMOS transistor of each segment select port and the PMOS transistor of each bit select port are turned off;

[0025] When the i-th segment selection port is in the row scan enable stage, the NMOS tube of the i-th segment selection port is turned on, and the NMOS tubes of the other segment selection ports are turned off. When in the first discharge stage, the PMOS tubes of the corresponding bit selection ports are all turned off. When in the driving and lighting stage, the PMOS tubes of the corresponding bit selection ports are all turned on. When in the delay stage, the PMOS tubes of the corresponding bit selection ports are all turned off.

[0026] In the LED display drive control method provided by the present invention, in the step of calculating the time configuration of multiple stages of the scan display cycle of each drive port according to the control signal, the number of row scans in the scan display cycle is configurable.

[0027] In the LED display drive control method provided by the present invention, in the step of calculating the time configuration of multiple stages of the scanning display cycle of each drive port, a delay stage is set every m drive ports in a row scanning cycle.

[0028] According to another aspect of the present invention, there is also provided an LED display drive control system, which adopts the above-mentioned LED display drive control method, comprising:

[0029] External communication interface, receiving external input control signals;

[0030] a time configuration module, configured to calculate the time configuration of multiple stages of the scan display cycle of each drive port according to the control signal; and

[0031] The mode switching module is used to control each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display cycle.

[0032] The present invention also provides an LED display system, which includes the LED display drive control system described above.

[0033] The implementation of the embodiments of the present invention has the following beneficial effects: the LED display drive control method provided by the present invention calculates the time configuration of multiple stages of the scanning display cycle of each driving port according to a control signal from an external source, and divides a scanning display cycle into a high-resistance stage, a first discharge stage, a delay stage, a row scan enable stage, a driving light-on stage, and a second discharge stage; and then switches the driving mode of the port according to the corresponding time configuration, thereby improving the display effect through different driving modes. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0035] FIG1 is a schematic diagram showing an application scenario of an LED display drive control system provided by an embodiment of the present application;

[0036] FIG2 is a logic structure diagram of the LED display drive control system in FIG1 ;

[0037] FIG3 shows a schematic diagram of an LED display system using a time-division multiplexing drive scheme;

[0038] FIG4 is a schematic structural diagram of a driving module of a driving port of the LED display system shown in FIG2 ;

[0039] FIG5 is an overall scanning diagram of the display drive control using the time-division multiplexing drive scheme shown in FIG2 ;

[0040] FIG6 shows a time configuration diagram of multiple stages in a scanning display cycle, taking three drive ports as an example;

[0041] FIG7 is a flow chart of an LED display drive control method provided by an embodiment of the present application;

[0042] FIG8 shows a time configuration diagram in which the number of row scans is configured as 1;

[0043] FIG9 shows a time configuration diagram for setting a delay stage every n driving ports;

[0044] FIG10 shows a schematic diagram of an LED display system using a segment-type LED driving solution;

[0045] FIG11 is an overall scanning diagram of the display drive control using the pen segment LED drive solution shown in FIG10 ;

[0046] FIG12 shows a timing configuration diagram of multiple stages within a scan display cycle, taking one segment selection port and two bit selection ports as an example. DETAILED DESCRIPTION

[0047] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. The drawings illustrate exemplary embodiments of the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present invention.

[0048] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0049] The general idea of ​​the present invention is: to address the problem that LED display drivers in the prior art can only configure display grayscale and row scanning frequency and cannot optimize and adjust the display effect, an LED display drive control method is provided. The time configuration of multiple stages of the scanning display cycle of each drive port is calculated based on a control signal from an external source, and a scanning display cycle is divided into a high-impedance stage, a first discharge stage, a delay stage, a row scanning enable stage, a driving and lighting stage, and a second discharge stage; then, the drive mode of the switching port is switched according to the corresponding time configuration, and the display effect is improved by using different drive modes.

[0050] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the drawings and specific implementation methods of the specification. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solution of the present application, rather than limitations on the technical solution of the present application. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0051] FIG1 is a schematic diagram of an application scenario of an LED display drive control system provided by an embodiment of the present invention. As shown in FIG1 , the LED display drive control system 10 provided by the present invention is connected to a controller 20 and an LED load 30. The controller 20 transmits a control signal to the LED display drive control system 10 through a communication protocol, wherein the communication protocol includes but is not limited to an IIC protocol, an SPI protocol, a return-to-zero code protocol, and a VDD carrier protocol; then the LED display drive control system 10 performs a configuration of a scanning display cycle according to the control signal, and then controls the display of the LED load 30 by switching the mode of the control drive port. Among them, the LED load 30 includes but is not limited to a Micro LED display screen or a mini LED display screen; the driving scheme of the LED display drive control system 10 to drive the LED load 30 includes a time-sharing multiplexing driving scheme, a pen-segment LED driving scheme, and an external MOS type driving scheme.

[0052] Specifically, in one embodiment of the present invention, as shown in Figure 2, the LED display drive control system 10 includes: an external communication interface 11, which receives an external input control signal; a time configuration module 12, which is used to calculate the time configuration of multiple stages of the scanning display cycle of each drive port according to the control signal; and a mode switching module 13, which is used to control each drive port to perform mode switching according to the time configuration of multiple stages of the scanning display cycle.

[0053] FIG3 is a schematic diagram of an LED display system employing a time-division multiplexing drive scheme. FIG3 includes nine drive ports, each connected to the cathodes of all LEDs in a corresponding row. Two LEDs are connected in anti-phase parallel between every two ports, for example, the anode of LED 11 is connected to the cathode of LED 21, and vice versa. Those skilled in the art will appreciate that other numbers of drive ports may be included, and the connection arrangement of the LED array on the right may also be other, without limiting the present invention. FIG4 is a schematic diagram of the drive modules of the drive ports of the LED display system shown in FIG3. As shown in FIG4, each drive module includes a PMOS transistor, an NMOS transistor, a first inverter 110, and a second inverter 120. The source of the PMOS transistor is connected to a power supply, the source of the NMOS transistor is connected to ground, and the drain of the PMOS transistor is connected to the drain of the MOS transistor, which serves as the output signal of the drive port. The gate of the PMOS transistor is connected to the first inverter, and the gate of the NMOS transistor is connected to the second inverter.

[0054] Figure 5 is an overall scanning diagram of the display drive control using the time-division multiplexing drive scheme shown in Figure 3; Figure 6 shows a time configuration diagram of multiple stages within a scanning display cycle using three drive ports as an example, DA1_1 and DA1_2 are the DA1 port control signals shown in Figure 3, DA2_1 and DA2_2 are the DA2 port control signals shown in Figure 3, DA3_1 and DA3_2 are the DA3 port control signals shown in Figure 3, when DA1_1 is high, the PMOS shown in Figure 4 is turned on, when DA1_2 is low, the NMOS shown in Figure 4 is turned on. Based on Figures 3 to 6, the present application proposes a method for controlling LED display drive. Referring to Figure 7, an LED display drive control method 100 according to an embodiment of the present application includes the following steps:

[0055] Step S10: receiving an external control signal.

[0056] Step S20: Calculate the time configuration of multiple stages of the scanning and display cycle of each driving port according to the control signal.

[0057] Step S30 : Control each driving port to switch modes according to the time configuration of the multiple stages of the scanning and display cycle.

[0058] Specifically, in one embodiment of the present invention, the number of drive ports performing row scanning is configurable. For example, for a system with n drive ports, in the embodiment shown in FIG6 , in the first scanning display cycle, the first drive port performs row scanning, and in the nth scanning display cycle, the nth drive port performs row scanning, i.e., in the example shown in FIG6 , the number of drive ports performing row scanning is configured to be n; while in the embodiment shown in FIG8 , in the first scanning display cycle, the first drive port performs row scanning, and in the nth scanning display cycle, the first drive port also performs row scanning, i.e., in the example shown in FIG8 , the number of drive ports performing row scanning is configured to be 1; those skilled in the art will appreciate that, in other examples, it is also possible that in the first scanning display cycle, the first drive port performs row scanning, in the second scanning display cycle, the second drive port still performs row scanning, in the third scanning display cycle, the first drive port performs row scanning, and in the fourth scanning display cycle, the second drive port still performs row scanning, and so on. In this example, the number of drive ports performing row scanning is configured to be 2.

[0059] Specifically, in one embodiment of the present invention, within a scanning cycle, after the high-impedance phase, a delay phase is set for every m driver ports. That is, for a system with n driver ports, the n driver ports can be divided into n / m groups. After the high-impedance phase, the first group of driver ports does not have a delay phase, the second group of driver ports has a delay phase, the third group of driver ports has two delay phases, and so on. For example, in the example shown in FIG9 , with three driver ports as a group, within a scanning cycle, after the high-impedance phase, driver ports 1-3 do not have a delay phase, while driver ports 4-6 have a delay phase. In contrast, in the example shown in FIG6 , m=n.

[0060] Specifically, in one embodiment of the present invention, as shown in FIG6 , a scanning display cycle includes a high-impedance phase of duration t1, a first discharge phase of duration t2, a delay phase of duration t3, a row scan enable phase of duration t4, a drive light-on phase of duration t6, and a second discharge phase of duration t5. In the same scanning display cycle, only one drive port is in the row scan enable phase, that is, starting from the first scanning display cycle, the drive ports DA1, DA2, ..., DAn enter the row scan enable phase in sequence, and can drive the corresponding LED lamp to light up during the row scan enable phase. For a display scanning cycle:

[0061] At the start of a scan display cycle, all drive ports (such as the drive ports DA1, DA2, and DA3 shown in FIG6 ) are in a high-impedance stage. The high-impedance stage is an intermediate buffer state. In the high-impedance stage, the PMOS and NMOS transistors of all drive ports are turned off to prevent the upper and lower transistors of the drive module from being penetrated when the level jumps.

[0062] Subsequently, one drive port (the drive port DA1 shown in FIG6 ) enters the row scan enable stage, and the remaining drive ports (the drive ports DA2 and DA3 shown in FIG6 ) enter the first discharge stage. The drive port entering the row scan enable stage turns on the NMOS transistor of its drive module, while the remaining drive ports still keep both the PMOS transistor and the NMOS transistor closed. However, since the NMOS transistor of the drive port entering the row scan enable stage is already turned on, these drive ports are all discharged through the drive port entering the row scan enable stage. This can prevent the drive high level from arriving earlier than the row scan signal, which would cause irregular charge flow.

[0063] Then, the remaining driving ports except the driving port enter the driving lighting stage successively after several delay stages. During the delay stage, the PMOS transistor and the NMOS transistor corresponding to the driving port are both turned off. Thus, it is possible to prevent the high level of the driving port from being pulled up simultaneously and the sudden increase of the VDD current. When entering the driving lighting stage, the PMOS transistor corresponding to the driving port is turned on. Therefore, together with the previous driving port, they jointly drive the diode connected between them to light up. For example, as shown in FIG. 6, when DA1 is in the line scan enable stage, after DA2 enters the driving lighting stage, D1-1 connected between DA1 and DA2 is lit. DA3 will go through a delay stage and then enter the driving lighting stage, and D1-2 connected between DA1 and DA3 is lit, and so on. When DA1 is in the line scan enable stage, the lights in the first row are lit in sequence. Since the duration of the driving lighting stage of each driving port is the same, the remaining driving ports except the driving port enter the first discharge stage successively after several delay stages after the driving lighting stage. For example, as shown in FIG. 6, after the first discharge stage, DA2 enters the driving lighting stage and then enters the first discharge stage after a delay stage, while DA3 enters the driving lighting stage after a delay stage and then enters the first discharge stage. Another example is that in an example including 4 driving ports, when DA1 is in the line scan enable stage, after the first discharge stage, DA2 enters the driving lighting stage and then enters the first discharge stage after two delay stages, while DA3 enters the driving lighting stage after a delay stage after the first discharge stage and then enters the first discharge stage after another delay stage, and DA4 enters the driving lighting stage after two delay stages after the first discharge stage and then enters the first discharge stage. That is, when the i-th driving port is in the line scan enable stage, when j < i, the j-th driving port successively experiences the first discharge stage, (j - 1) delay stages, the driving lighting stage, (n - j - 1) delay stages, and the first discharge stage. When i < j, the j-th driving port successively experiences the first discharge stage, (j - 2) delay stages, the driving lighting stage, (n - j) delay stages, and the first discharge stage, and t4 = 2 * t2 + t6 + (n - 2) * t3;

[0064] After the line scan enable stage, all driving ports enter the high impedance stage again for buffering. Subsequently, in order to prevent incomplete discharge in the first discharge stage and ghosting, all driving ports enter the second discharge stage, turn off the PMOS transistor and turn on the NMOS transistor to completely discharge the electricity in the NMOS transistor and then enter the next line scan cycle.

[0065] Therefore, when adopting the time division multiplexing driving scheme for the driving port, step S20 includes:

[0066] During the i-th line scan period, the i-th driving port sequentially experiences a high impedance stage, a line scan enabling stage, a high impedance stage, and a second discharge stage, where the duration of the high impedance stage is t1, the duration of the line scan enabling stage is t4, and the duration of the second discharge stage is t5.

[0067] When the i-th driving port is in the high impedance stage and the second discharge stage, the remaining driving ports are respectively in the high impedance stage and the second discharge stage.

[0068] When the i-th driving port is in the line scan enabling stage, when j < i, the j-th driving port sequentially experiences a first discharge stage, (j - 1) delay stages, a driving lighting stage, (n - j - 1) delay stages, and a first discharge stage. When i < j, the j-th driving port sequentially experiences a first discharge stage, (j - 2) delay stages, a driving lighting stage, (n - j) delay stages, and a first discharge stage, where the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

[0069] Step 30 includes: in the high impedance stage, the PMOS transistors and NMOS transistors of all driving ports are turned off. In the second discharge stage, the PMOS transistors of all driving ports are turned off and the NMOS transistors are turned on. When the i-th driving port is in the line scan enabling stage, the PMOS transistor of the i-th driving port is turned off and the NMOS transistor is turned on. When in the first discharge stage, the PMOS transistors and NMOS transistors of the corresponding driving ports are turned off. When in the driving lighting stage, the PMOS transistors of the corresponding driving ports are turned on and the NMOS transistors are turned off. When in the delay stage, the PMOS transistors and NMOS transistors of the corresponding driving ports are turned off.

[0070] FIG. 10 shows a schematic diagram of an LED display system adopting a segmental LED driving scheme. FIG. 10 shows 4 segment selection ports and 8 bit selection ports. Those skilled in the art can understand that other numbers of ports can also be included, and the present invention is not limited thereto. Each segment selection port is controlled by an inverter and an NMOS transistor, and each bit selection port is controlled by an inverter and a PMOS transistor. Those skilled in the art can understand that other ways can also be selected to control the segment selection ports and bit selection ports, and the present invention is not limited thereto.

[0071] Figure 11 is an overall scanning diagram of the display drive control using the pen segment LED drive solution shown in Figure 10; Figure 12 shows a time configuration diagram of multiple stages within a scanning display cycle using one segment selection port and two bit selection ports as an example. DIG1 is the control signal of the GRID1 port shown in Figure 10, and SEG1 and SEG2 are the control signals of the Seg1 and Seg2 ports shown in Figure 10. When DIG1 is low, the NMOS of the segment selection port is turned on, and when SEG1 and SEG2 are high, the PMOS of the bit selection port is turned on. As shown in Figures 10 to 12, the LED display drive control method provided by the present invention includes the following steps:

[0072] Step S10: receiving an external control signal.

[0073] Step S20: Calculate the time configuration of multiple stages of the scanning and display cycle of each driving port according to the control signal.

[0074] Step S30 : Control each driving port to switch modes according to the time configuration of the multiple stages of the scanning and display cycle.

[0075] Specifically, in one embodiment of the present invention, as shown in FIG12 , a scanning display cycle includes a high-impedance phase of duration t1, a first discharge phase of duration t2, a delay phase of duration t3, a row scan enable phase of duration t4, and a drive light-on phase of duration t6. Within the same scanning display cycle, only one segment select port is in the row scan enable phase, that is, starting from the first scanning display cycle, the segment select ports DIG1, ​​DIG2, ..., DIGn enter the row scan enable phase in sequence, and can drive the corresponding LED lights to light up during the row scan enable phase. For a display scanning cycle:

[0076] At the start of a scan display cycle, all segment selection ports and bit selection ports (segment selection port DIG1, ​​bit selection ports SEG1, SEG2 as shown in Figure 10) are in a high-impedance stage. The high-impedance stage is an intermediate buffer state. In the high-impedance stage, all PMOS and NMOS transistors are turned off to facilitate the switching of the segment selection ports.

[0077] Subsequently, a segment select port (the driving port DIG1 shown in FIG10 ) enters the row scan enable stage, and all the bit select ports enter the first discharge stage. The segment select port entering the row scan enable stage turns on the NMOS transistor of its driving module, while the bit select ports still keep the PMOS transistors closed. However, since the NMOS transistors of the segment select ports entering the row scan enable stage are already turned on, these bit select ports are discharged through the segment select ports entering the row scan enable stage. This can prevent the bit select signal from arriving earlier than the row scan signal, which would cause irregular charge flow.

[0078] Then, the bit select port enters the driving and lighting stage after several delay stages in sequence. During the delay stage, the PMOS tube of the bit select port is still closed, thereby preventing the high level of the bit select port from being pulled high at the same time and the VDD current from suddenly increasing. During the driving and lighting stage, the PMOS tube of the corresponding bit select port is turned on, and thus, the corresponding diode is driven to light up together with the segment select port. That is, when DIG1 is in the row scan enable stage, after SEG1 enters the driving and lighting stage, the diode connected between DIG1 and SEG1 is lit, SEG2 will go through a delay stage and then enter the driving and lighting stage, and the diode connected between DIG1 and SEG2 is lit, and so on.

[0079] Since the duration of the driving light-on stage of each bit selection port is the same, the bit selection port enters the first discharge stage after the driving light-on stage through several delay stages in sequence. For example, as shown in FIG12 , after the first discharge stage, SEG1 enters the driving light-on stage and then enters the first discharge stage after a delay stage, while SEG2 enters the driving light-on stage after a delay stage and then enters the first discharge stage. For another example, in an example including three bit selection ports, after the first discharge stage, SEG1 enters the driving light-on stage and then enters the first discharge stage after two delay stages, while SEG2 enters the driving light-on stage after the first discharge stage. After a delay stage, it enters the driving and lighting stage and then enters the first discharge stage after another delay stage. SEG3 enters the driving and lighting stage after two delay stages after the first discharge stage and then enters the first discharge stage; that is, when the i-th segment selection port is in the row scan enable stage, the j-th bit selection port successively undergoes the first discharge stage, (j-1) delay stages, driving and lighting stage, (yj-1) delay stages, and the first discharge stage, among which the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving and lighting stage is t6, and t4=2*t2+t6+(n-2)*t3.

[0080] The control method of the external MOS type driving scheme and the segment type LED driving scheme is the same, and the present invention will not be repeated here. Therefore, when the external MOS type driving scheme and the segment type LED driving scheme are used at the driving port, step S20 includes:

[0081] In the i-th line scan cycle, the i-th segment select port is valid, and the i-th segment select port sequentially undergoes a high-impedance stage and a line scan enable stage, wherein the duration of the high-impedance stage is t1, and the duration of the line scan enable stage is t4.

[0082] When the i-th segment selection port is in the high impedance stage, all bit selection ports are in the high impedance stage respectively.

[0083] When the i-th segment selection port is in the row scan enable stage, the j-th bit selection port sequentially undergoes the first discharge stage, (j-1) delay stages, the driving light-up stage, (yj-1) delay stages, and the first discharge stage, wherein the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving light-up stage is t6, and t4=2*t2+t6+(n-2)*t3.

[0084] Step 30 includes: in the high-resistance stage, the NMOS tube of each segment selection port and the PMOS tube of each bit selection port are turned off; when the i-th segment selection port is in the row scan enable stage, the NMOS tube of the i-th segment selection port is turned on, and the NMOS tubes of the remaining segment selection ports are turned off; in the first discharge stage, the PMOS tubes of the corresponding bit selection ports are turned off; in the driving and lighting stage, the PMOS tubes of the corresponding bit selection ports are turned on; and in the delay stage, the PMOS tubes of the corresponding bit selection ports are turned off.

[0085] Although the present application describes the embodiments of the present invention above in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations shall fall within the scope defined by the appended claims.

Claims

1. An LED display driving control method, characterized in that, Including the following steps: Receiving a control signal input externally; Calculating the time configuration of multiple stages of the scanning display cycle for each driving port according to the control signal; And Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display cycle.

2. The LED display driving control method according to claim 1, wherein The multiple stages of the scanning display cycle include multiple ones among a high-impedance stage, a first discharge stage, a delay stage, a line scan enable stage, a driving lighting stage, and a second discharge stage.

3. The LED display driving control method according to claim 2, wherein, When a time-division multiplexing driving scheme is adopted for the driving port, including n driving ports, calculating the time configuration of multiple stages of the scanning display cycle for each driving port according to the control signal includes: In the i-th line scan cycle, the i-th driving port sequentially experiences a high-impedance stage, a line scan enable stage, a high-impedance stage, and a second discharge stage, where the duration of the high-impedance stage is t1, the duration of the line scan enable stage is t4, and the duration of the second discharge stage is t5; When the i-th driving port is in the high-impedance stage and the second discharge stage, the remaining driving ports are respectively in the high-impedance stage and the second discharge stage; When the i-th driving port is in the line scan enable stage, when j < i, the j-th driving port sequentially experiences a first discharge stage, (j - 1) delay stages, a driving lighting stage, (n - j - 1) delay stages, and a first discharge stage, when i < j, the j-th driving port sequentially experiences a first discharge stage, (j - 2) delay stages, a driving lighting stage, (n - j) delay stages, and a first discharge stage, where the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

4. The LED display driving control method according to claim 3, wherein The driving module of each driving port includes a PMOS transistor, an NMOS transistor, a first inverter, and a second inverter. The source of the PMOS transistor is connected to the power supply, the source of the NMOS transistor is connected to the ground, the drains of the PMOS transistor and the NMOS transistor are commonly connected, the gate of the PMOS transistor is connected to the first inverter, the gate of the NMOS transistor is connected to the second inverter. Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display cycle includes: In the high-impedance stage, the PMOS transistors and NMOS transistors of all driving ports are turned off. In the second discharge stage, the PMOS transistors of all driving ports are turned off and the NMOS transistors are turned on; When the i-th driving port is in the line scan enable stage, the PMOS transistor of the i-th driving port is turned off and the NMOS transistor is turned on. When in the first discharge stage, the PMOS transistor and the NMOS transistor of the corresponding driving port are both turned off. When in the driving lighting stage, the PMOS transistor of the corresponding driving port is turned on and the NMOS transistor is turned off. When in the delay stage, the PMOS transistor and the NMOS transistor of the corresponding driving port are both turned off.

5. The LED display driving control method according to claim 2, wherein, When a segmental LED driving scheme or an external MOS type driving scheme is adopted for the driving port, the driving port includes x segment selection ports and y bit selection ports. Calculating the time configuration of multiple stages of the scanning display cycle for each driving port according to the control signal includes: During the i-th line scan period, the i-th segment selection port is valid, and the i-th segment selection port sequentially experiences a high impedance stage and a line scan enable stage, where the duration of the high impedance stage is t1 and the duration of the line scan enable stage is t4; When the i-th segment selection port is in the high impedance stage, all bit selection ports are respectively in the high impedance stage; When the i-th segment selection port is in the line scan enable stage, the j-th bit selection port sequentially experiences a first discharge stage, (j - 1) delay stages, a driving lighting stage, (y - j - 1) delay stages, and a first discharge stage, where the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

6. The LED display driving control method according to claim 5, characterized in that, Each segment selection port includes a third inverter and an NMOS transistor, and each bit selection port includes a fourth inverter and a PMOS transistor. Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display period includes: In the high impedance stage, the NMOS transistors of each segment selection port and the PMOS transistors of each bit selection port are all turned off; When the i-th segment selection port is in the line scan enable stage, the NMOS transistor of the i-th segment selection port is turned on, and the NMOS transistors of the remaining segment selection ports are turned off. When in the first discharge stage, the PMOS transistors of the corresponding bit selection ports are all turned off. When in the driving lighting stage, the PMOS transistors of the corresponding bit selection ports are all turned on. When in the delay stage, the PMOS transistors of the corresponding bit selection ports are all turned off.

7. The LED display driving control method according to claim 2, wherein In the step of calculating the time configuration of multiple stages of the scanning display period of each driving port according to the control signal, the number of driving ports for line scan can be configured.

8. The LED display driving control method according to claim 2, wherein In the step of calculating the time configuration of multiple stages of the scanning display period of each driving port according to the control signal, within one line scan period, after the high impedance stage, a delay stage is set every m driving ports.

9. An LED display driving and control system, which adopts the LED display driving and control method described in any one of claims 1-8, is characterized in that, Including: An external communication interface for receiving an externally input control signal; A time configuration module for calculating the time configuration of multiple stages of the scanning display period of each driving port according to the control signal; And A mode switching module for controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display period.

10. An LED display system, characterized in that, The LED display system includes the LED display driving control system as described in Claim 9.

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