Display substrate and manufacturing method therefor, and display device

By designing specific inorganic layer structures and etching methods in OLED displays, the charge generation layer crosstalk and inorganic layer etching damage problems are solved, which improves the luminous efficiency and simplifies the preparation process.

WO2025152778A1PCT designated stage expired Publication Date: 2025-07-24BOE TECHNOLOGY GROUP CO LTD
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Patent Information

Application Number
PCT/CN2025/070138
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-18
Filing Date
2025-01-02
Publication Date
2025-07-24

AI Technical Summary

Technical Problem

In existing OLED displays, the high carrier mobility of the charge generation layer results in reduced crosstalk and luminous efficiency between adjacent structures, and the thickness of the inorganic layer and the etching process may damage the driving circuit layer.

Method used

A display substrate structure is designed, wherein the second inorganic layer is located on the side of the third inorganic layer away from the substrate, and in the partition structure, the support part on the positive projection edge of the substrate falls outside the partition part to prevent the charge generation layer from being broken; the first inorganic layer is located on the side of the first electrode facing the substrate, and is in direct contact with the second inorganic layer, and a partition structure is formed by controlling the etching speed, reducing the thickness of the inorganic layer to reduce the depth of the pixel opening.

Benefits of technology

It effectively avoids crosstalk of the charge generation layer, improves luminous efficiency, and protects the driving circuit layer, simplifies the preparation process and reduces costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides a display substrate, a manufacturing method therefor, and a display device. The display substrate comprises a base, a light-emitting layer located on the base, and a plurality of inorganic layers. The light-emitting layer comprises a plurality of light-emitting structures arranged at intervals, and each light-emitting structure comprises a first electrode, a first light-emitting layer, a charge generation layer, a second light-emitting layer, and a second electrode which are sequentially arranged in a direction away from the base. At least one inorganic layer is located on the side of the first electrode distant from the base and is provided with a pixel opening. The plurality of inorganic layers comprise a first inorganic layer, a second inorganic layer, and a third inorganic layer which are located on the side of the first electrode facing the base, and the first inorganic layer is in direct contact with the second inorganic layer. A partition structure comprises a support portion located on the second inorganic layer and a partition portion located on the third inorganic layer, and the edge of the orthographic projection of the partition portion on the base is located on the outer side of the edge of the orthographic projection of the support portion on the base; the orthographic projection of the first electrode on the base falls within the orthographic projection of the support portion on the base; and the charge generation layer is disconnected at the partition structure.
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Description

Display substrate and manufacturing method thereof, and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display substrate and a preparation method thereof, and a display device. Background Art

[0002] OLED (Organic Light-Emitting Diode) displays are widely used in display, lighting, smart wearable and other fields due to their many advantages such as self-luminescence, low driving voltage, high luminous efficiency, short response time, high clarity and contrast, wide operating temperature range, and flexible display. Summary of the Invention

[0003] The present application provides a display substrate, a method for preparing the same, and a display device.

[0004] According to a first aspect of an embodiment of the present application, a display substrate is provided. The display substrate includes:

[0005] substrate;

[0006] a light-emitting layer located on the substrate, the light-emitting layer comprising a plurality of light-emitting structures arranged at intervals, the light-emitting structures comprising a first electrode, a first light-emitting layer, a charge generation layer, a second light-emitting layer, and a second electrode arranged in sequence in a direction away from the substrate;

[0007] A plurality of inorganic layers are located on the side of the first light-emitting layer facing the substrate; at least one inorganic layer is located on the side of the first electrode away from the substrate, the at least one inorganic layer is provided with a plurality of pixel openings, each of the pixel openings exposes at least a portion of the first electrode, and the first light-emitting layer is at least partially located within the pixel openings; the plurality of inorganic layers include a first inorganic layer located on the side of the first electrode facing the substrate, a second inorganic layer located on the side of the first inorganic layer away from the substrate, and a third inorganic layer located on the side of the second inorganic layer away from the substrate, the first inorganic layer is in direct contact with the second inorganic layer; the plurality of inorganic layers are provided with a plurality of partition structures arranged at intervals, the partition structure includes a supporting portion located in the second inorganic layer and a partition portion located in the third inorganic layer, the edge of the orthographic projection of the partition portion on the substrate is located outside the edge of the orthographic projection of the support portion on the substrate; an orthographic projection of the first electrode on the substrate falls within the orthographic projection of the support portion on the substrate; the charge generation layer is disconnected at the partition structure.

[0008] In one embodiment, the second inorganic layer is located on a side of the first electrode facing the substrate; or the second inorganic layer is located on a side of the first electrode away from the substrate.

[0009] In one embodiment, the third inorganic layer includes multiple first sub-inorganic layers, the partition portion includes the first sub-inorganic layer, and the material of the first sub-inorganic layer is metal oxide; the part of the partition portion that extends beyond the supporting portion is a protrusion, and the protrusion is at least partially located in the first sub-inorganic layer.

[0010] In one embodiment, the protrusions are all located in the first sub-inorganic layer; or, the metal oxide is a conductive material, the third inorganic layer also includes an insulating material layer located on the side of the first sub-inorganic layer away from the substrate, the insulating material layer includes multiple second sub-inorganic layers, the partition portion includes the second sub-inorganic layer, a portion of the protrusion is located in the first sub-inorganic layer, and another portion is located in the second sub-inorganic layer; among the adjacent end portions of two adjacent protrusions, the end portion of one of the protrusions is located in the first sub-inorganic layer, and the end portion of the other protrusion is located in the second sub-inorganic layer.

[0011] In one embodiment, the first electrode includes a metal layer and a metal oxide layer, the metal oxide layer covers the surface of the metal layer away from the substrate and the side of the metal layer; the first sub-inorganic layer is disposed in the same layer as the metal oxide layer.

[0012] In one embodiment, the first inorganic sub-layer is connected to the adjacent first electrode.

[0013] In one embodiment, the third inorganic layer includes an insulating material layer, the insulating material layer includes a plurality of second sub-inorganic layers, the partition portion includes the second sub-inorganic layers; and the at least one inorganic layer includes the insulating material layer.

[0014] In one embodiment, the display substrate further includes a driving circuit layer located between the substrate and the first inorganic layer, and the density of the material of the first inorganic layer is greater than the density of the material of the second inorganic layer.

[0015] In one embodiment, the material of the first inorganic layer is the same as the material of the third inorganic layer; and the density of the material of the first inorganic layer is greater than the density of the material of the second inorganic layer.

[0016] In one embodiment, the second inorganic layer is located on the side of the first electrode facing the substrate, and the display substrate further includes a fourth inorganic layer located between the second inorganic layer and the first electrode, and the density of the material of the fourth inorganic layer is greater than the density of the material of the second inorganic layer; the partition structure further includes an auxiliary part located on the fourth inorganic layer, and the edge of the orthographic projection of the auxiliary part on the substrate is located outside the edge of the orthographic projection of the supporting part on the substrate.

[0017] In one embodiment, the thickness of the first inorganic layer is in the range of 50 nm to 200 nm, the thickness of the second inorganic layer is in the range of 30 nm to 150 nm, and the thickness of the third inorganic layer is in the range of 10 nm to 100 nm.

[0018] According to a second aspect of an embodiment of the present application, a method for preparing a display substrate is provided, the method comprising:

[0019] providing a substrate;

[0020] forming a plurality of first electrodes and a plurality of inorganic layers on the substrate; at least one of the plurality of inorganic layers is located on a side of the first electrode away from the substrate; the plurality of inorganic layers includes a first inorganic layer located on a side of the first electrode facing the substrate, a second inorganic layer located on a side of the first inorganic layer away from the substrate, and a third inorganic layer located on a side of the second inorganic layer away from the substrate, wherein the first inorganic layer is in direct contact with the second inorganic layer;

[0021] A plurality of pixel openings are formed in the at least one inorganic layer, each of the pixel openings exposing at least a portion of one of the first electrodes; the second inorganic layer and the third inorganic layer are simultaneously etched, and the etching rate of the second inorganic layer is greater than the etching rate of the first inorganic layer and the etching rate of the third inorganic layer, respectively, to form a plurality of partition structures, wherein the partition structures include a support portion located in the second inorganic layer and a partition portion located in the third inorganic layer, wherein edges of the orthographic projections of the partition portions on the substrate are located outside edges of the orthographic projections of the support portions on the substrate; and an orthographic projection of one of the first electrodes on the substrate falls within an orthographic projection of one of the support portions on the substrate;

[0022] A first light-emitting layer, a charge generation layer located on the side of the first light-emitting layer away from the substrate, a second light-emitting layer located on the side of the charge generation layer away from the substrate, and a second electrode located on the side of the second light-emitting layer away from the substrate are formed in sequence; the first light-emitting layer is at least partially located within the pixel opening, and the charge generation layer is disconnected at the partition structure.

[0023] In one embodiment, the second inorganic layer is located on a side of the first electrode facing the substrate; the at least one inorganic layer includes the third inorganic layer; and the pixel opening and the partition structure are formed using the same mask.

[0024] In one embodiment, the third inorganic layer includes a plurality of first sub-inorganic layers arranged at intervals and an insulating material layer located on a side of the first sub-inorganic layer away from the substrate, and the material of the first sub-inorganic layer is metal oxide;

[0025] The etching of the second inorganic layer and the third inorganic layer simultaneously includes:

[0026] forming a mask layer on a side of the plurality of inorganic layers away from the substrate, wherein a hollow portion is provided on the mask layer, and an edge of an orthographic projection of the first sub-inorganic layer on the substrate is at least partially located within the orthographic projection of the hollow portion on the substrate;

[0027] The second inorganic layer and the insulating material layer are etched through the hollow portion to form a plurality of supporting portions in the second inorganic layer and a plurality of second sub-inorganic layers in the insulating material layer, thereby obtaining a plurality of partition structures, wherein the partition portion includes the first sub-inorganic layer and the second sub-inorganic layer; the portion of the partition portion that extends beyond the supporting portion is a protruding portion, and the protruding portion is at least partially located in the first sub-inorganic layer.

[0028] In one embodiment, all edges of the orthographic projection of the first inorganic sub-layer on the substrate are located within the orthographic projection of the hollow portion on the substrate, and all the protruding portions are located in the first inorganic sub-layer; or

[0029] Part of the edge of the orthographic projection of the first sub-inorganic layer on the substrate is located within the orthographic projection of the hollow portion on the substrate, part of the protrusion is located in the first sub-inorganic layer, and the other part is located in the second sub-inorganic layer; among the adjacent end portions of two adjacent protrusions, the end portion of one of the protrusions is located in the first sub-inorganic layer, and the end portion of the other protrusion is located in the second sub-inorganic layer.

[0030] In one embodiment, the first electrode includes a metal layer and a metal oxide layer, the metal oxide layer covers the surface of the metal layer away from the substrate and the side of the metal layer, and the first sub-inorganic layer and the metal oxide layer are formed in the same process step.

[0031] According to a third aspect of an embodiment of the present application, a display device is provided, comprising the above-mentioned display substrate.

[0032] In the display substrate, preparation method thereof, and display device provided by the embodiments of the present application, the second inorganic layer is located on the side of the third inorganic layer away from the substrate, and the edge of the positive projection of the support portion of the second inorganic layer in the partition structure on the substrate falls outside the edge of the positive projection of the partition portion of the third inorganic layer on the substrate. The partition structure can disconnect the charge generation layer at the partition structure, thereby avoiding the problem of crosstalk between adjacent structures and reduced luminous efficiency of the light-emitting structure due to the high carrier mobility of the charge generation layer; the first inorganic layer is located on the side of the first electrode facing the substrate and is in direct contact with the second inorganic layer. During the etching process of the second inorganic layer and the third inorganic layer, the first inorganic layer can prevent damage to the film layer (such as the driving circuit layer) located between the first inorganic layer and the substrate; the first inorganic layer is arranged on the side of the first electrode facing the substrate, compared with the first inorganic layer being arranged on the side of the first electrode away from the substrate, the thickness of the inorganic layer located on the side of the first electrode away from the substrate can be reduced, thereby reducing the depth of the pixel opening, helping to reduce the step difference between the portion of the first light-emitting layer located within the pixel opening and the portion located outside the pixel opening, thereby improving the luminous efficiency of the light-emitting structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] FIG1 is a partial cross-sectional view of a display substrate provided by an exemplary embodiment of the present application;

[0034] FIG2 is a partial cross-sectional view of a portion of a film layer of a display substrate provided by an exemplary embodiment of the present application;

[0035] FIG3 is a partial cross-sectional view of a portion of a film layer of a display substrate provided by another exemplary embodiment of the present application;

[0036] FIG4 is a partial cross-sectional view of a portion of a film layer of a display substrate provided by another exemplary embodiment of the present application;

[0037] FIG5 is a partial cross-sectional view of a portion of a film layer of a display substrate provided by another exemplary embodiment of the present application;

[0038] FIG6 is a partial cross-sectional view of a portion of a film layer of a display substrate provided by another exemplary embodiment of the present application;

[0039] FIG7 is a flow chart of a method for preparing a display substrate provided by another exemplary embodiment of the present application;

[0040] FIG8 is a partial cross-sectional view of a first intermediate structure provided by an exemplary embodiment of the present application;

[0041] FIG9 is a partial cross-sectional view of a second intermediate structure provided by an exemplary embodiment of the present application;

[0042] FIG10 is a partial cross-sectional view of a third intermediate structure provided by an exemplary embodiment of the present application;

[0043] FIG11 is a partial cross-sectional view of a fourth intermediate structure provided by an exemplary embodiment of the present application;

[0044] FIG12 is a partial cross-sectional view of a fifth intermediate structure provided by an exemplary embodiment of the present application;

[0045] FIG13 is a partial cross-sectional view of a sixth intermediate structure provided by an exemplary embodiment of the present application;

[0046] FIG. 14 is a partial cross-sectional view of a fourth intermediate structure provided by another exemplary embodiment of the present application. DETAILED DESCRIPTION

[0047] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0048] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. As used in this application and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0049] It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0050] The embodiments of the present application provide a display substrate, a method for manufacturing the same, and a display device. The display substrate, a method for manufacturing the same, and a display device in the embodiments of the present application are described in detail below with reference to the accompanying drawings. The features of the following embodiments may complement or be combined with each other unless they conflict.

[0051] The embodiment of the present application provides a display substrate. As shown in FIG1 and FIG2 , the display substrate includes a substrate 10 , a light-emitting layer, and a plurality of inorganic layers.

[0052] The light-emitting layer is located on the substrate and includes a plurality of spaced-apart light-emitting structures 20. The light-emitting structures 20 include a first electrode 21, a first light-emitting layer 22, a charge generation layer 23, a second light-emitting layer 24, and a second electrode 25, arranged in sequence away from the substrate 10. The plurality of inorganic layers are located on the side of the first light-emitting layer 22 facing the substrate 10. At least one inorganic layer 30 of the plurality of inorganic layers is located on the side of the first electrode 21 facing away from the substrate 10. The at least one inorganic layer 30 is defined with a plurality of pixel openings 301, each of which exposes at least a portion of a first electrode 21. The first light-emitting layer 22 is at least partially located within the pixel openings 301. The plurality of inorganic layers include a first inorganic layer 40 located on the side of the first electrode 21 facing the substrate 10, a second inorganic layer 50 located on the side of the first inorganic layer 40 facing away from the substrate 10, and a third inorganic layer 60 located on the side of the second inorganic layer 50 facing away from the substrate 10. The first inorganic layer 40 is in direct contact with the second inorganic layer 50. The multiple inorganic layers are provided with a plurality of spaced-apart partition structures 51. The partition structures 51 include a support portion 501 located in the second inorganic layer 50 and a partition portion 601 located in the third inorganic layer 60. The support portion 501 located in the second inorganic layer 50 and the partition portion 601 located in the third inorganic layer 60 refer to the support portion 501 being part of the second inorganic layer 50 and the partition portion 601 being part of the third inorganic layer 60. The edges of the orthographic projections of the partition portions 601 on the substrate 10 are located outside the edges of the orthographic projections of the support portions 501 on the substrate 10; the orthographic projections of one of the first electrodes 21 on the substrate 10 fall within the orthographic projections of one of the support portions 501 on the substrate 10; and the charge generation layer 23 is disconnected at the partition structures 51.

[0053] In the display substrate provided by the embodiment of the present application, the second inorganic layer is located on the side of the third inorganic layer away from the substrate, and the edge of the positive projection of the support part of the second inorganic layer in the partition structure on the substrate falls outside the edge of the positive projection of the partition part of the third inorganic layer on the substrate. The partition structure can disconnect the charge generation layer at the partition structure, thereby avoiding the problem of crosstalk between adjacent structures and reduced luminous efficiency of the light-emitting structure due to the high carrier mobility of the charge generation layer; the first inorganic layer is located on the side of the first electrode facing the substrate and is in direct contact with the second inorganic layer. During the etching process of the second inorganic layer and the third inorganic layer, the first inorganic layer can prevent damage to the film layer (such as the driving circuit layer) located between the first inorganic layer and the substrate; the first inorganic layer is arranged on the side of the first electrode facing the substrate, compared with the first inorganic layer being arranged on the side of the first electrode away from the substrate, the thickness of the inorganic layer located on the side of the first electrode away from the substrate can be reduced, thereby reducing the depth of the pixel opening, helping to reduce the step difference between the portion of the first light-emitting layer located within the pixel opening and the portion located outside the pixel opening, thereby improving the luminous efficiency of the light-emitting structure.

[0054] In one embodiment, the substrate 10 may be a flexible substrate, and the material of the flexible substrate may include one or more of PI (polyimide), PET (polyethylene terephthalate), and PC (polycarbonate). In other embodiments, the substrate 10 may be a rigid substrate, and the material of the rigid substrate may be, for example, glass, metal, plastic, etc.

[0055] In one embodiment, as shown in Figures 1 and 2, the display substrate further includes a driving circuit layer 70 located between the substrate 10 and the first inorganic layer 40. The driving circuit layer 70 includes a plurality of pixel circuits, which are used to drive the light-emitting structure. The pixel circuits may correspond one-to-one to the light-emitting structure, and each pixel circuit is used to drive the corresponding light-emitting structure. The pixel circuit may include a thin film transistor 71, which includes an active layer 711, a gate 712, a first electrode 713, and a second electrode 714. One of the first electrode 713 and the second electrode 714 is a source electrode, and the other is a drain electrode. The gate 712 may be located on a side of the active layer 711 away from the substrate 10. The first electrode 713 of the thin film transistor 71 is electrically connected to the first electrode 21 of the corresponding light-emitting structure 20. The pixel circuit may also include a capacitor.

[0056] In one embodiment, as shown in Figures 1 and 2, the driving circuit layer 70 may further include a gate insulating layer 72 located between the active layer 711 and the gate 712, an interlayer dielectric layer 73 located on the side of the gate insulating layer 72 away from the substrate 10, and a planarization layer 74 located on the side of the interlayer dielectric layer 73 away from the substrate 10. The first electrode 713 and the second electrode 714 are partially located between the interlayer dielectric layer 73 and the planarization layer 74, and partially located within a through hole penetrating the gate insulating layer 72 and the interlayer dielectric layer 73 and contacting the active layer 711. The first electrode 21 is electrically connected to the first electrode 713 via a through hole penetrating the first inorganic layer 40 and the planarization layer 74.

[0057] In one embodiment, the display substrate further comprises an encapsulation layer located on a side of the light-emitting layer away from the substrate. The encapsulation layer may be a thin film encapsulation layer comprising alternating organic and inorganic layers, wherein the film layer furthest from the substrate is the inorganic layer.

[0058] In one embodiment, the display substrate further includes a color filter layer located on a side of the encapsulation layer away from the substrate. The color filter layer includes a plurality of filter portions arranged at intervals, such that the orthographic projection of a pixel opening corresponding to a light-emitting structure on substrate 10 falls within the orthographic projection of a filter portion on substrate 10. The color filter layer may include filter portions of at least three different colors, for example, a red filter portion, a green filter portion, and a blue filter portion.

[0059] In one embodiment, one of the first electrode 21 and the second electrode 25 is an anode and the other is a cathode. For example, the first electrode 21 is an anode and the second electrode 25 is a cathode. The second electrodes of each light emitting structure 20 can be connected surface electrodes.

[0060] In one embodiment, when the first electrode 21 is an anode and the second electrode 25 is a cathode, the light-emitting structure 20 may further include a hole injection layer and a hole transport layer located between the first electrode 21 and the first light-emitting layer 22, a hole injection layer and a hole transport layer located between the first light-emitting layer 22 and the second light-emitting layer 24, and an electron injection layer and an electron transport layer located between the second light-emitting layer 24 and the second electrode 25. Since the first light-emitting layer 22 and the hole injection layer and the hole transport layer located between the first electrode 21 and the first light-emitting layer 22 are all located between the charge generation layer 23 and the first electrode 21, the first light-emitting layer 22 and the hole injection layer and the hole transport layer located between the first electrode 21 and the first light-emitting layer 22 are all disconnected at the partition structure.

[0061] In one embodiment, the light emitted by the first light-emitting layer 22 of the light-emitting structure 20 and the light emitted by the second light-emitting layer 24 are combined to form white light. After passing through the filter portion corresponding to each light-emitting structure, the white light is converted into light of the same color as the filter portion. In this way, the display substrate can achieve color display. In some embodiments, the first light-emitting layer 22 may include a stacked red light-emitting layer and a green light-emitting layer, and the second light-emitting layer 24 is a blue light-emitting layer.

[0062] In one embodiment, as shown in Figures 1 and 2, the first electrode 21 includes a metal layer 211 and a metal oxide layer 212. The metal oxide layer 212 covers the surface of the metal layer 211 away from the substrate 10 and the side surfaces of the metal layer 211. The metal oxide layer 212 is made of a conductive material. In this manner, the metal oxide layer 212 protects the metal layer 211 and prevents damage to the metal layer 211 during the formation of the inorganic layer above the first electrode 21.

[0063] In one embodiment, the metal layer 211 may include two titanium film layers and an aluminum film layer located between the two titanium film layers. The material of the metal oxide layer 212 may be indium zinc oxide, indium tin oxide, etc. With this configuration, a dry etching process may be used when forming the metal layer 211. Compared to a wet etching process, this process can reduce the spacing between adjacent metal layers 211, thereby increasing the light-emitting area and light-emitting efficiency of the light-emitting structure, thereby reducing the power consumption of the display substrate.

[0064] In one embodiment, as shown in FIG. 1 and FIG. 2 , the second inorganic layer 50 is located on a side of the first electrode 21 away from the substrate 10 .

[0065] In another embodiment, as shown in FIG3 , the second inorganic layer 50 is located on the side of the first electrode 21 facing the substrate 10. This arrangement can reduce the thickness of the inorganic layer located on the side of the first electrode away from the substrate, further reduce the depth of the pixel opening, and help reduce the step difference between the portion of the first light-emitting layer located inside the pixel opening and the portion located outside the pixel opening, further improving the luminous efficiency of the light-emitting structure; when etching the second inorganic layer 50 and the third inorganic layer 60, the partition structure 51 can be obtained by controlling the etching speed of the second inorganic layer 50 to be greater than the etching speed of the third inorganic layer 60. The inorganic layer located on the side of the first electrode 21 away from the substrate 10 only has the third inorganic layer 60, that is, the at least one inorganic layer only includes the third inorganic layer. Layer 60, the different etching speeds of the second inorganic layer 50 and the third inorganic layer 60 in the etching process will not affect the shape of the side of the pixel opening, so the pixel opening 301 and the partition structure 51 can be formed at the same time through one etching process, that is, the pixel opening 301 and the partition structure 51 can be formed by using the same mask, which helps to reduce the preparation cost of the display substrate and simplify the preparation process; in the process of etching the first inorganic layer and the second inorganic layer, part of the material remaining in the process of forming the metal oxide layer 212 can be etched away, which can improve the crosstalk problem caused by the residual material electrically connecting the two adjacent first electrodes 21.

[0066] In one embodiment, as shown in Figures 4 and 5, the third inorganic layer 60 includes a plurality of first sub-inorganic layers 61, the partition portion 601 includes the first sub-inorganic layer 61, and the portion of the partition portion 601 that extends beyond the support portion 501 is a protrusion 511. The protrusion 511 is at least partially located in the first sub-inorganic layer 61. The protrusion 511 being at least partially located in the first sub-inorganic layer 61 means that at least part of the protrusion is part of the first sub-inorganic layer 61. Because the material of the first sub-inorganic layer 61 is metal oxide, which has relatively high strength, the protrusion 511 being at least partially located in the first sub-inorganic layer 61 can prevent the protrusion 511 from breaking, thereby ensuring that the charge generation layer is isolated by the partition structure 51.

[0067] In one embodiment, as shown in Figures 4 and 5, the third inorganic layer 60 also includes an insulating material layer 62 located on the side of the first sub-inorganic layer 61 away from the substrate 10, the insulating material layer 62 includes multiple second sub-inorganic layers 621, and the partition portion 601 includes the second sub-inorganic layer 621.

[0068] In one embodiment, the material of the first inorganic sub-layer 61 is a conductive material, and the first inorganic sub-layer 61 is disposed in the same layer as the metal oxide layer 212. The first inorganic sub-layer 61 and the metal oxide layer 212 being disposed in the same layer means that the first inorganic sub-layer 61 and the metal oxide layer 212 are made of the same material and are formed in the same process step. This helps simplify the display substrate manufacturing process. In this embodiment, the second inorganic sub-layer 621 is located on the side of the first electrode 21 away from the substrate 10.

[0069] Furthermore, the first inorganic sub-layer 61 is connected to an adjacent metal oxide layer 212. This arrangement, compared to a solution where the first inorganic sub-layer 61 and the metal oxide layer 212 are spaced apart, reduces the space occupied by the gap between the first inorganic sub-layer 61 and the metal oxide layer 212, thereby increasing the light-emitting area of ​​the light-emitting structure. When the first inorganic sub-layer 61 and the metal oxide layer 212 are connected, the distance between the edge of the orthographic projection of the combined portion of the first inorganic sub-layer 61 and the edge of the orthographic projection of the metal layer 211 on the substrate 10 is greater than or equal to 1 μm.

[0070] 4 , the protrusion 511 is entirely located in the first inorganic sub-layer 61. That is, the portion of the partition 601 extending beyond the support portion 501 is entirely located in the first inorganic sub-layer 61, which helps prevent the portion of the partition 601 extending beyond the support portion 501 from breaking.

[0071] In another embodiment, as shown in FIG5 , a portion of the protrusion 511 is located in the first sub-inorganic layer 61, and another portion is located in the second sub-inorganic layer 621. Of the adjacent ends of two adjacent protrusions 511, one end of the protrusion 511 is located in the first sub-inorganic layer 61, and the other end of the protrusion 511 is located in the second sub-inorganic layer 621. This configuration improves the strength of the protrusion 511, and when the first sub-inorganic layer 61 is connected to the metal oxide layer 212 of the first electrode 21, even if the portion of the charge generation layer 23 located between the two partition structures 51 contacts the protrusion 511, the problem of crosstalk between adjacent light-emitting structures, which would otherwise occur due to electrical connection between the two adjacent first electrodes 21 through the charge generation layer 23 located within the opening, can be avoided.

[0072] In one embodiment, as shown in FIG. 1 to FIG. 3 , the third inorganic layer 60 only includes an insulating material layer 62 .

[0073] In one embodiment, as shown in Figures 1 to 5, the at least one inorganic layer 30 includes the insulating material layer 62, and the insulating material layer 62 is located on the side of the first electrode 21 away from the substrate 10. The at least one inorganic layer 30 may only include an insulating material layer, that is, the inorganic layer located between the first electrode 21 and the first light-emitting layer 22 only includes the insulating material layer 62. This helps reduce the depth of the pixel opening.

[0074] In one embodiment, the density of the material of the first inorganic layer 40 is greater than the density of the material of the second inorganic layer 50. When etching the second inorganic layer 50 and the third inorganic layer 60, a dry etching process can be used. Since the density of the material of the first inorganic layer 40 is greater than the density of the material of the second inorganic layer 50, the degree of etching of the first inorganic layer 40 during the etching of the second inorganic layer 50 and the third inorganic layer 60 is relatively small, and the first inorganic layer 40 can effectively prevent damage to the driving circuit layer. Since the degree of etching of the first inorganic layer 40 during the etching process is relatively small, the maximum height difference between the portion of the inorganic layer located on the side of the first electrode away from the substrate and the first inorganic layer can be reduced, thereby reducing the risk of fracture of the second electrode.

[0075] In one embodiment, the material of the first inorganic layer 40 is the same as that of the third inorganic layer 60; the density of the material of the first inorganic layer 40 is greater than that of the material of the second inorganic layer 50. This facilitates controlling the etching rate of the first inorganic layer 40, the second inorganic layer 50, and the third inorganic layer 60 during dry etching. In some embodiments, the materials of the first inorganic layer 40 and the third inorganic layer 60 may be silicon oxide, and the material of the second inorganic layer 50 may be silicon nitride.

[0076] In one embodiment, as shown in Figure 6, the second inorganic layer 50 is located on the side of the first electrode 21 facing the substrate 10, and the display substrate also includes a fourth inorganic layer 90 located between the second inorganic layer 50 and the first electrode 21, and the density of the material of the fourth inorganic layer 90 is greater than the density of the material of the second inorganic layer 50; the partition structure 51 also includes an auxiliary portion 91 located on the fourth inorganic layer 90, and the edge of the orthographic projection of the auxiliary portion 91 on the substrate 10 is located outside the edge of the orthographic projection of the support portion 501 on the substrate 10. In this arrangement, since the density of the material of the fourth inorganic layer 90 is greater than the density of the material of the second inorganic layer 50, when the dry etching process is used to form the metal layer 211 of the first electrode 21, the etching degree of the second inorganic layer 50 is relatively small, which can reduce the maximum fault difference of the second electrode in different areas and avoid the problem of the second electrode breaking; and the part of the auxiliary part 91 that extends beyond the support part 501 is in contact with the part of the third inorganic layer 60 that extends beyond the support part 501, which can increase the strength of the protrusion 511 and help avoid the protrusion 511 from breaking.

[0077] 6 , within the same partition structure 51 , the edge of the orthographic projection of the auxiliary portion 91 on the substrate 10 coincides with the orthographic projection of the second sub-inorganic layer 621 on the substrate 10 . The fourth inorganic layer 90 and the insulating material layer 62 may be made of the same material.

[0078] In one embodiment, the thickness of the first inorganic layer 40 ranges from 50 nm to 200 nm. This configuration can prevent the first inorganic layer 40 from being too thin and failing to effectively protect the drive circuit layer, and can also prevent the first inorganic layer 40 from being too thick and increasing the time required to prepare the first inorganic layer 40. In some embodiments, the thickness of the first inorganic layer 40 can be 50 nm, 70 nm, 90 nm, 100 nm, 120 nm, 130 nm, 150 nm, 170 nm, 200 nm, etc.

[0079] In one embodiment, the thickness of the second inorganic layer 50 ranges from 30 nm to 150 nm. This configuration prevents the second inorganic layer 50 from being too thin, which could result in the charge generation layer not being isolated at the isolation structure 51, and also prevents the second inorganic layer 50 from being too thick, which could result in the second electrode breaking. In some embodiments, the thickness of the second inorganic layer 50 can be 30 nm, 50 nm, 70 nm, 90 nm, 100 nm, 110 nm, 130 nm, 150 nm, etc.

[0080] In one embodiment, the thickness of the third inorganic layer 60 ranges from 10 nm to 100 nm. This configuration prevents the third inorganic layer 60 from being too thin, which could cause the protrusion 511 to break. It also prevents the third inorganic layer 60 from being too thick, which could result in a larger depth of the pixel opening when the third inorganic layer 60 is located on the side of the first electrode away from the substrate, leading to a decrease in the luminous efficiency of the first light-emitting layer. In some embodiments, the thickness of the third inorganic layer 60 can be 10 nm, 30 nm, 50 nm, 70 nm, 90 nm, 100 nm, etc. Preferably, the thickness of the third inorganic layer 60 is less than or equal to 50 nm.

[0081] The embodiment of the present application also provides a method for preparing a display substrate. The following is an introduction through the preparation process of the display substrate. The "composition process" mentioned in the embodiment of the present application includes processes such as depositing a film layer, coating a photoresist, mask exposure, development, etching and stripping the photoresist. Deposition can be carried out by any one or more selected from sputtering, evaporation and chemical vapor deposition, and etching can be carried out by any one or more selected from dry etching and wet etching. "Thin film" refers to a thin film made by a deposition or coating process on a substrate of a certain material. If the "thin film" does not require a composition process during the entire production process, the "thin film" can also be called a "layer". When the "thin film" still requires a composition process during the entire production process, it is called a "thin film" before the composition process and a "layer" after the composition process. The "layer" after the composition process contains at least one "pattern".

[0082] As shown in FIG. 7 , the preparation method includes the following steps 110 to 140 .

[0083] In step 110, a substrate is provided.

[0084] In step 120, a plurality of first electrodes and a plurality of inorganic layers are formed on the substrate; at least one of the plurality of inorganic layers is located on a side of the first electrode away from the substrate; the plurality of inorganic layers include a first inorganic layer located on a side of the first electrode facing the substrate, a second inorganic layer located on a side of the first inorganic layer away from the substrate, and a third inorganic layer located on a side of the second inorganic layer away from the substrate, and the first inorganic layer is in direct contact with the second inorganic layer.

[0085] In step 130, a plurality of pixel openings are formed in the at least one inorganic layer, each of the pixel openings exposing at least a portion of the first electrode; the second inorganic layer and the third inorganic layer are etched simultaneously, and the etching rate of the second inorganic layer is greater than the etching rate of the first inorganic layer and the etching rate of the third inorganic layer, respectively, to form a plurality of partition structures, the partition structures comprising a supporting portion located in the second inorganic layer and a partition portion located in the third inorganic layer, the edge of the orthographic projection of the partition portion on the substrate being located outside the edge of the orthographic projection of the support portion on the substrate; the orthographic projection of one of the first electrodes on the substrate falls within the orthographic projection of one of the support portions on the substrate.

[0086] In step 140, a first light-emitting layer, a charge generation layer located on a side of the first light-emitting layer away from the substrate, a second light-emitting layer located on a side of the charge generation layer away from the substrate, and a second electrode located on a side of the second light-emitting layer away from the substrate are formed in sequence; the first light-emitting layer is at least partially located within the pixel opening, and the charge generation layer is disconnected at the partition structure.

[0087] In one embodiment, a first intermediate structure as shown in FIG8 is obtained through step 120. As shown in FIG8, the second inorganic layer 50 is located on a side of the first electrode 21 away from the substrate 10, and the at least one inorganic layer 30 includes the second inorganic layer 50 and a third inorganic layer 60, and the third inorganic layer 60 includes only an insulating material layer 62.

[0088] In an exemplary embodiment, the preparation process of the first intermediate structure shown in FIG8 may include the following steps:

[0089] An active layer thin film is deposited on the substrate 10 and patterned through a patterning process to form an active layer 711 .

[0090] Subsequently, a gate insulating layer 72 and a first metal film are deposited in sequence, and the first metal film is patterned through a patterning process to form a gate 712 located in the display area 101 .

[0091] Subsequently, an interlayer dielectric layer 73 is deposited, and the gate insulating layer 72 and the interlayer dielectric layer 73 are etched to form a through hole penetrating the gate insulating layer 72 and the interlayer dielectric layer 73 .

[0092] Subsequently, a second metal film is deposited and patterned through a patterning process to form a first electrode 713 and a second electrode 714 . The first electrode and the second electrode are in contact with the active layer 711 through through holes penetrating the gate insulating layer 72 and the interlayer dielectric layer 73 .

[0093] Subsequently, a planarization layer 74 and a first inorganic layer 40 are deposited, and the planarization layer 74 and the first inorganic layer 40 are etched to form a through hole penetrating the planarization layer 74 and the first inorganic layer 40 .

[0094] Subsequently, a third metal film is deposited and patterned by a patterning process to form a metal layer 211 . The metal layer 211 contacts the first electrode 713 through a through hole penetrating the planarization layer 74 and the first inorganic layer 40 .

[0095] Subsequently, a metal oxide film is deposited, and the third metal film is patterned by a patterning process to form a metal oxide layer 212 .

[0096] Subsequently, a second inorganic layer 50 and an insulating material layer 62 are sequentially deposited.

[0097] In the embodiment shown in FIG8 , since the second inorganic layer 50 and the third inorganic layer 60 are both located on the side of the first electrode away from the substrate, the etching rates of the second inorganic layer 50 and the third inorganic layer 60 are different when forming the partition structure. If the second inorganic layer 50 is retracted relative to the third inorganic layer 60 on the side of the pixel opening, the first light-emitting layer will be partitioned on the side of the pixel opening, affecting the luminous efficiency of the first light-emitting layer. Therefore, the pixel opening and the partition structure cannot be formed simultaneously. Step 130 includes the following process:

[0098] First, the second inorganic layer 50 and the third inorganic layer 60 are etched to form a pixel opening.

[0099] This step can produce the second intermediate structure shown in Figure 9. In this step, the second inorganic layer 50 and the third inorganic layer 60 can be etched using a wet etching process, and the etching rate of the etching solution on the inorganic layer 50 and the etching rate on the third inorganic layer 60 are substantially the same.

[0100] Subsequently, the second inorganic layer 50 and the third inorganic layer 60 are etched to form a partition structure.

[0101] This step can produce the structure shown in FIG2 . In this step, the second inorganic layer 50 and the third inorganic layer 60 can be etched using a dry etching process. The etching rate of the second inorganic layer 50 by the dry etching process is higher than that of the third inorganic layer 60 .

[0102] In another embodiment, the second inorganic layer 50 is located on the side of the first electrode 21 facing the substrate 10; the at least one inorganic layer includes the third inorganic layer, and the material of the third inorganic layer is an insulating material; the pixel opening, the first opening and the second opening are formed simultaneously using the same mask.

[0103] In this embodiment, the third intermediate structure shown in FIG10 can be obtained through step 120. As shown in FIG10, the at least one inorganic layer 30 only includes the third inorganic layer 60, and the third inorganic layer 60 only includes the insulating material layer 62.

[0104] In this embodiment, in step 130, since the inorganic layer located on the side of the first electrode 21 away from the substrate 10 is only the third inorganic layer 60, and the third inorganic layer 60 only includes the insulating material layer 62, the difference in etching speed between the second inorganic layer 50 and the third inorganic layer 60 will not affect the shape of the side of the pixel opening, and thus the pixel opening 301 and the partition structure 51 can be formed simultaneously through a single etching process.

[0105] In this embodiment, prior to step 130, the preparation method further includes: forming a mask layer on the side of the third inorganic layer away from the substrate, placing a mask plate on the side of the mask layer away from the substrate, and transferring the mask plate pattern to the mask layer through an exposure and development process. This step results in a fourth intermediate structure as shown in Figure 11. As shown in Figure 11, the mask layer 80 is provided with a plurality of through holes 801 and hollow portions 802, each of which is opposite a first electrode 21. In step 130, the third inorganic layer is etched through the through holes 801 to form pixel openings 301, and the second and third inorganic layers are etched through the hollow portions 802 to form partition structures 51, thereby obtaining the structure shown in Figure 3.

[0106] In yet another embodiment, a fifth intermediate structure as shown in FIG12 is obtained through step 120. As shown in FIG12 , the third inorganic layer 60 includes a plurality of first sub-inorganic layers 61 and an insulating material layer 62 located on a side of the first sub-inorganic layers 61 away from the substrate 10. The material of the first sub-inorganic layers 61 is a metal oxide. The metal oxide can be a conductive material.

[0107] Optionally, the first electrode 21 includes a metal layer 211 and a metal oxide layer 212, wherein the metal oxide layer 212 covers the surface of the metal layer 211 away from the substrate 10 and the side of the metal layer 211, and the first sub-inorganic layer 61 and the metal oxide layer 212 are formed in the same process step. Furthermore, the first sub-inorganic layer 61 is connected to the metal oxide layer 212 of one first electrode 21.

[0108] In this step, the step of simultaneously etching the second inorganic layer and the third inorganic layer includes the following process:

[0109] First, a mask layer is formed on a side of the multiple inorganic layers away from the substrate, wherein a hollow portion is provided on the mask layer, and an edge of the orthographic projection of the first sub-inorganic layer on the substrate is at least partially located within the orthographic projection of the hollow portion on the substrate.

[0110] This step can yield a sixth intermediate structure as shown in FIG13 or FIG14 . As shown in FIG13 and FIG14 , the mask layer 80 is provided with a plurality of hollow portions 802 and a plurality of through holes 801 , each of the through holes 801 being opposite to a first electrode 21 .

[0111] In the embodiment shown in FIG13 , all edges of the orthographic projection of the first inorganic sub-layer 61 on the substrate 10 are located within the orthographic projection of the hollow portion 802 on the substrate 10. In the embodiment shown in FIG14 , a portion of the edge of the orthographic projection of the first inorganic sub-layer 61 on the substrate 10 is located within the orthographic projection of the hollow portion 802 on the substrate 10.

[0112] Subsequently, the second inorganic layer and the insulating material layer are etched through the hollow portion to form a plurality of supporting portions in the second inorganic layer and a plurality of second sub-inorganic layers in the insulating material layer, thereby obtaining a plurality of the partition structures, wherein the partition portion includes the first sub-inorganic layer and the second sub-inorganic layer; the portion of the partition portion that extends beyond the supporting portion is a protruding portion, and the protruding portion is at least partially located in the first sub-inorganic layer.

[0113] In this step, a dry etching process may be used to etch the second inorganic layer 50 and the insulating material layer 62 . The dry etching process hardly causes damage to the first sub-inorganic layer 61 .

[0114] When the sixth intermediate structure is shown in FIG13 , this step can produce the structure shown in FIG4 . As shown in FIG4 , the entire protrusion 511 is located in the first sub-inorganic layer 61 . When the sixth intermediate structure is shown in FIG14 , this step can produce the structure shown in FIG5 . As shown in FIG5 , a portion of the protrusion 511 is located in the first sub-inorganic layer 61 , while another portion is located in the second sub-inorganic layer 621 . Of the adjacent ends of two adjacent protrusions 511 , one end of the protrusion 511 is located in the first sub-inorganic layer 61 , while the other end of the protrusion 511 is located in the second sub-inorganic layer 621 .

[0115] The embodiment of the method for preparing the display substrate provided in the embodiment of the present application and the embodiment of the display substrate belong to the same inventive concept, and the description of relevant details and beneficial effects can be referred to each other, which will not be repeated here.

[0116] An embodiment of the present application further provides a display device, which includes the display substrate described in any of the above embodiments.

[0117] In some embodiments, the display device further includes a housing, and the display substrate is embedded in the housing.

[0118] The display device provided in the embodiments of the present application may be any appropriate display device, including but not limited to mobile phones, tablet computers, televisions, monitors, laptop computers, digital photo frames, navigators, e-books, and any other products or components with display functions.

[0119] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0120] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the contents disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0121] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A display substrate, characterized in that, The display substrate includes: a substrate; a light-emitting layer located on the substrate, the light-emitting layer including a plurality of spaced-apart light-emitting structures, and each light-emitting structure including a first electrode, a first light-emitting layer, a charge generation layer, a second light-emitting layer, and a second electrode arranged in sequence in a direction away from the substrate; a plurality of inorganic layers located on a side of the first light-emitting layer facing the substrate; at least one inorganic layer is located on a side of the first electrode away from the substrate, the at least one inorganic layer being provided with a plurality of pixel openings, each pixel opening exposing at least a part of one of the first electrodes, and at least a part of the first light-emitting layer being located within the pixel openings; the plurality of inorganic layers include a first inorganic layer located on a side of the first electrode facing the substrate, a second inorganic layer located on a side of the first inorganic layer away from the substrate, and a third inorganic layer located on a side of the second inorganic layer away from the substrate, and the first inorganic layer is in direct contact with the second inorganic layer; the plurality of inorganic layers are provided with a plurality of spaced-apart partition structures, the partition structure including a support portion located in the second inorganic layer and a partition portion located in the third inorganic layer, and an edge of a positive projection of the partition portion on the substrate is located outside an edge of a positive projection of the support portion on the substrate; a positive projection of one of the first electrodes on the substrate falls within a positive projection of one of the support portions on the substrate; and the charge generation layer is disconnected at the partition structure.

2. The display substrate according to claim 1, wherein The second inorganic layer is located on a side of the first electrode facing the substrate; or the second inorganic layer is located on a side of the first electrode away from the substrate.

3. The display substrate according to claim 1, wherein The third inorganic layer includes a plurality of first sub-inorganic layers, the partition portion includes the first sub-inorganic layer, and a material of the first sub-inorganic layer is a metal oxide; a part of the partition portion exceeding the support portion is a protruding portion, and at least a part of the protruding portion is located in the first sub-inorganic layer.

4. The display substrate according to claim 3, wherein The protruding portion is entirely located in the first sub-inorganic layer; or, the metal oxide is a conductive material, the third inorganic layer further includes an insulating material layer located on a side of the first sub-inorganic layer away from the substrate, the insulating material layer includes a plurality of second sub-inorganic layers, the partition portion includes the second sub-inorganic layer, a part of the protruding portion is located in the first sub-inorganic layer, and another part of the protruding portion is located in the second sub-inorganic layer; among adjacent ends of two adjacent protruding portions, an end of one of the protruding portions is located in the first sub-inorganic layer, and an end of the other protruding portion is located in the second sub-inorganic layer.

5. The display substrate according to claim 3, characterized in that, The first electrode includes a metal layer and a metal oxide layer, and the metal oxide layer covers a surface of the metal layer away from the substrate and a side surface of the metal layer; the first sub-inorganic layer is arranged on the same layer as the metal oxide layer.

6. The display substrate according to claim 5, wherein The first sub-inorganic layer is connected to the adjacent first electrode.

7. The display substrate according to claim 1, wherein The third inorganic layer includes an insulating material layer, the insulating material layer includes a plurality of second sub-inorganic layers, the partition portion includes the second sub-inorganic layer; and the at least one inorganic layer includes the insulating material layer.

8. The display substrate according to claim 1, wherein The display substrate further includes a driving circuit layer located between the substrate and the first inorganic layer, and the density of the material of the first inorganic layer is greater than that of the material of the second inorganic layer.

9. The display substrate according to claim 1, wherein The material of the first inorganic layer is the same as that of the third inorganic layer; the density of the material of the first inorganic layer is greater than that of the material of the second inorganic layer.

10. The display substrate according to claim 1, characterized in that, The second inorganic layer is located on the side of the first electrode facing the substrate. The display substrate further includes a fourth inorganic layer located between the second inorganic layer and the first electrode, and the density of the material of the fourth inorganic layer is greater than that of the material of the second inorganic layer; the partition structure further includes an auxiliary portion located on the fourth inorganic layer, and the edge of the orthographic projection of the auxiliary portion on the substrate is located outside the edge of the orthographic projection of the support portion on the substrate.

11. The display substrate according to claim 1, characterized in that, The thickness range of the first inorganic layer is 50 nm to 200 nm, the thickness range of the second inorganic layer is 30 nm to 150 nm, and the thickness range of the third inorganic layer is 10 nm to 100 nm.

12. A method for preparing a display substrate, characterized in that, The preparation method includes: Providing a substrate; Forming a plurality of first electrodes and a plurality of inorganic layers on the substrate; at least one of the plurality of inorganic layers is located on the side of the first electrode away from the substrate; the plurality of inorganic layers include a first inorganic layer located on the side of the first electrode facing the substrate, a second inorganic layer located on the side of the first inorganic layer away from the substrate, and a third inorganic layer located on the side of the second inorganic layer away from the substrate, and the first inorganic layer is in direct contact with the second inorganic layer; Forming a plurality of pixel openings in the at least one inorganic layer, each pixel opening exposing at least a part of one of the first electrodes; etching the second inorganic layer and the third inorganic layer simultaneously, and the etching rate of the second inorganic layer is greater than the etching rate of the first inorganic layer and the etching rate of the third inorganic layer respectively, so as to form a plurality of partition structures, the partition structures include a support portion located on the second inorganic layer and a partition portion located on the third inorganic layer, and the edge of the orthographic projection of the partition portion on the substrate is located outside the edge of the orthographic projection of the support portion on the substrate; the orthographic projection of one of the first electrodes on the substrate falls within the orthographic projection of one of the support portions on the substrate; Sequentially forming a first light-emitting layer, a charge generation layer located on the side of the first light-emitting layer away from the substrate, a second light-emitting layer located on the side of the charge generation layer away from the substrate, and a second electrode located on the side of the second light-emitting layer away from the substrate; at least a part of the first light-emitting layer is located within the pixel opening, and the charge generation layer is disconnected at the partition structure.

13. The method for manufacturing a display substrate according to claim 12, wherein, The second inorganic layer is located on the side of the first electrode facing the substrate; the at least one inorganic layer includes the third inorganic layer; the pixel opening and the partition structure are formed using the same mask.

14. The method for preparing a display substrate according to claim 12, wherein The third inorganic layer includes a plurality of first sub-inorganic layers arranged at intervals and an insulating material layer on a side of the first sub-inorganic layer away from the substrate, and a material of the first sub-inorganic layer is a metal oxide; The etching of the second inorganic layer and the third inorganic layer simultaneously includes: forming a mask layer on a side of the plurality of inorganic layers away from the substrate, the mask layer being provided with a hollowed-out portion, and at least a part of an edge of a positive projection of the first sub-inorganic layer on the substrate is located within a positive projection of the hollowed-out portion on the substrate; etching the second inorganic layer and the insulating material layer through the hollowed-out portion, so that the second inorganic layer forms a plurality of support portions, the insulating material layer forms a plurality of second sub-inorganic layers, and a plurality of the partition structures are obtained, the partition portion includes the first sub-inorganic layer and the second sub-inorganic layer; a portion of the partition portion exceeding the support portion is a protruding portion, and at least a part of the protruding portion is located in the first sub-inorganic layer.

15. The method for preparing a display substrate according to claim 14, wherein All of an edge of a positive projection of the first sub-inorganic layer on the substrate is located within a positive projection of the hollowed-out portion on the substrate, and the protruding portion is entirely located in the first sub-inorganic layer; or, a part of an edge of a positive projection of the first sub-inorganic layer on the substrate is located within a positive projection of the hollowed-out portion on the substrate, a part of the protruding portion is located in the first sub-inorganic layer, and another part is located in the second sub-inorganic layer; among adjacent ends of two adjacent protruding portions, an end of one of the protruding portions is located in the first sub-inorganic layer, and an end of the other protruding portion is located in the second sub-inorganic layer.

16. The method for preparing a display substrate according to claim 14, wherein The first electrode includes a metal layer and a metal oxide layer, the metal oxide layer covers a surface of the metal layer away from the substrate and a side surface of the metal layer, and the first sub-inorganic layer and the metal oxide layer are formed in the same process step.

17. A display device, characterized in that, The display device includes the display substrate according to any one of claims 1 to 11.

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