Coding method and device

Abstract

The present application relates to the technical field of communications, and provides a coding method and device. The method comprises: performing first coding on P bit sequences to obtain P first sequences; and performing second coding on some or all bits of some or all first sequences among the P first sequences to obtain Q second sequences, Q being a positive integer greater than or equal to P. After performing channel coding on bit sequences to obtain first sequences, the first sequences can be subjected to second coding to obtain second sequences. Compared with the first sequences obtained by only one coding process, the redundancy of the second sequences obtained by two coding processes is further increased, so that when errors occur in transmission of the second sequences, the errors can be corrected with a higher probability by means of more redundancy, thereby improving the reliability of transmission.

Description

Coding method and device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on January 31, 2024, with application number 202410147513.9 and application name “Encoding Method and Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of communication technology, and more particularly, to a coding method and device. Background Art

[0003] With the continuous development of 5G communication systems, data transmission latency continues to decrease, while transmission capacity continues to increase. 5G communication systems are gradually infiltrating multimedia services with strong real-time requirements and large data capacity requirements, such as video transmission, cloud gaming (CG), and extended reality (XR). XR can include virtual reality (VR) and augmented reality (AR). In the uplink transmission of XR or video services, for each video frame, the most commonly used method is to split the image frame into dozens of Internet Protocol (IP) packets at the network transport layer. These packets are then transmitted from the user equipment (UE) to the base station, and then through the core network to the cloud server for rendering. During the network transmission process, if an IP packet is transmitted incorrectly, the entire image frame cannot be recovered.

[0004] Therefore, how to improve the reliability of data transmission is an urgent problem to be solved. Summary of the Invention

[0005] The present application provides a coding method and device that can improve the reliability of data transmission.

[0006] In the first aspect, a coding method is provided, which can be executed by a communication device (for example, a network device or a terminal device), or by a component in the communication device (for example, a processor, a chip, or a chip system, etc.), or by a logic module or software that can implement all or part of the functions of the communication device.

[0007] The method includes: performing a first encoding on P bit sequences to obtain P first sequences (or referred to as first bit sequences), wherein a p-th first sequence in the P first sequences is obtained by performing a first encoding on the p-th bit sequence in the P bit sequences, the p-th first sequence includes the p-th bit sequence and a check bit of the p-th bit sequence, P is a positive integer, and p is a positive integer less than or equal to P; performing a second encoding on some or all of the bits of some or all of the first sequences in the P first sequences to obtain Q second sequences (or referred to as second bit sequences), where Q is a positive integer greater than or equal to P.

[0008] Through the above embodiment, after channel coding a bit sequence to obtain a first sequence, the first sequence can be further coded a second time to obtain a second sequence. Those skilled in the art will appreciate that coding can increase redundancy. Therefore, compared to the first sequence obtained by only performing a single coding operation, the redundancy of the second sequence obtained by performing a double coding operation is further increased. This allows the second sequence to be more likely to correct errors in the event of transmission errors due to the increased redundancy, thereby improving transmission reliability.

[0009] In combination with the first aspect, in certain implementations of the first aspect, performing a second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain Q second sequences includes: performing a second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences, where the Q second sequences include the P first sequences and the QP first check sequences.

[0010] Through the above embodiments, further encoding of part or all of the first sequence can generate a first check sequence. The first check sequence can improve decoding performance. For example, by iterative decoding using soft information, the bit sequence of decoding errors can be restored, thereby reducing the number of retransmissions. The first check sequence can improve spectrum efficiency. For example, in hybrid automatic repeat request (HARQ) technology, retransmission with transmission block (TB), code block group (CBG), or code block (CB) granularity is often used. The first check sequence of the embodiment of the present application can simultaneously provide redundant information to the first sequence involved in encoding, overcome the limitations of retransmission with TB, CBG or CB granularity, and can simultaneously support error correction decoding of multiple first sequences, thereby supporting more efficient and finer-grained error correction and retransmission on the decoding side, thereby improving spectrum efficiency.

[0011] In combination with the first aspect, in certain implementations of the first aspect, performing a second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences includes: performing a second encoding on all bits of some or all of the first sequences in the P first sequences to obtain the QP first check sequences.

[0012] Through the above embodiment, further encoding of all bits of part or all of the first sequence can generate a first check sequence. Since all bits of some (or a certain) first sequence are encoded, the decoding performance can be further improved. For example, by using soft information for iterative decoding, the bit sequence of the decoding error can be recovered with a greater probability, thereby further reducing the number of retransmissions. The above embodiment can further improve the spectrum efficiency. For example, in HARQ technology, TB, CBG, or CB granularity retransmission is often used. The check sequence of the embodiment of the present application can simultaneously provide redundant information to the first sequence involved in the encoding, overcome the limitations of TB, CBG or CB granularity retransmission, and can simultaneously support error correction decoding of multiple first sequences, thereby supporting more efficient and finer-grained error correction and retransmission on the decoding side, thereby improving spectrum efficiency.

[0013] With reference to the first aspect, in certain implementations of the first aspect, the length of each first check sequence in the QP first check sequences is equal to the length of one first sequence in the P first sequences.

[0014] Through the above embodiment, further encoding of all bits of part or all of the first sequence can generate first check sequences of equal length. Since the bit lengths of the first check sequences are the same, encoding is simple to implement.

[0015] In conjunction with the first aspect, in certain implementations of the first aspect, the P bit sequences belong to a first transport block, a size of the first transport block is determined according to R1,

[0016] Through the above embodiment, R1 can correct the size of the transport block so that the transmitting end can correctly calculate the original data bits that are effectively carried.

[0017] With reference to the first aspect, in certain implementations of the first aspect, each of the P first sequences consists of X subsequences, where X is a positive integer. Performing second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences includes: encoding some or all of the P×X subsequences to obtain the QP first check sequences.

[0018] Through the above embodiments, further encoding of part or all of the bits of the first sequence can generate a first check sequence, thereby further improving the decoding performance. For example, by using soft information for iterative decoding, the bit sequence of decoding errors can be recovered with a greater probability, thereby further reducing the number of retransmissions. The above embodiments can further improve the spectrum efficiency. For example, in HARQ technology, retransmission with TB, CBG, or CB granularity is often used. The first check sequence of the embodiment of the present application can further provide more redundant information, thereby supporting more efficient and finer-grained error correction and retransmission on the decoding side, further improving the spectrum efficiency.

[0019] With reference to the first aspect, in certain implementations of the first aspect, lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

[0020] In combination with the first aspect, in some implementations of the first aspect, the P bit sequences belong to a second transport block, and a size of the second transport block is determined according to R2. w is less than or equal to m, w is the length of each subsequence in the first X-1 subsequences of each first sequence in the P first sequences, and m is the length of the last subsequence in the X subsequences of each first sequence in the P first sequences.

[0021] Through the above embodiment, R2 can correct the size of the transport block so that the transmitting end can correctly calculate the original data bits that are effectively carried.

[0022] With reference to the first aspect, in certain implementations of the first aspect, each first sequence in the P first sequences is composed of X subsequences, wherein second encoding is performed on some or all of the bits of the first sequences in the P first sequences to obtain Q second sequences, including: encoding the P first sequences to obtain P third sequences (or called third bit sequences), wherein a p-th third sequence in the P third sequences is obtained by encoding some or all of the subsequences of the X subsequences of the p-th first sequence in the P first sequences, and the p-th third sequence includes the p-th first sequence and a parity bit of the p-th first sequence; and encoding all bits of some or all of the third sequences in the P third sequences to obtain the Q second sequences, where the Q second sequences include the P third sequences and QP second parity sequences.

[0023] Through the above embodiment, the first sequence is first encoded once to obtain a third sequence with check bits, and then all the bits of the third sequence are further encoded to generate a second check sequence. Since the above scheme can bring more redundancy, it can further improve the decoding performance. For example, by using soft information for iterative decoding, the bit sequence with decoding errors can be recovered with a greater probability, thereby further reducing the number of retransmissions. The above embodiment can further improve the spectrum efficiency. For example, in HARQ technology, retransmission with TB, CBG, or CB granularity is often used. The second check sequence of the embodiment of the present application can further provide more redundant information, thereby supporting finer-grained error correction and retransmission on the decoding side, further improving the spectrum efficiency.

[0024] With reference to the first aspect, in certain implementations of the first aspect, the length of each second check sequence in the QP second check sequences is equal to the length of one third sequence in the P third sequences.

[0025] With reference to the first aspect, in certain implementations of the first aspect, lengths of any two subsequences in at least first X-1 subsequences of any two first sequences in the P first sequences are equal.

[0026] In combination with the first aspect, in certain implementations of the first aspect, the P bit sequences belong to a third transport block, and a size of the third transport block is determined according to R3. The length of each first sequence in the P first sequences is z, and the length of each third sequence in the P third sequences is t.

[0027] Through the above embodiment, R3 can correct the size of the transport block so that the transmitting end can correctly calculate the original data bits that are effectively carried.

[0028] In a second aspect, a communication device is provided, including: a first encoding module, used to perform a first encoding on P bit sequences to obtain P first sequences, wherein the p-th first sequence in the P first sequences is obtained by performing a first encoding on the p-th bit sequence in the P bit sequences, and the p-th first sequence includes the p-th bit sequence and a check bit of the p-th bit sequence, P is a positive integer, and p is a positive integer less than or equal to P; a second encoding module, used to perform a second encoding on part or all of the bits of some or all of the first sequences in the P first sequences to obtain Q second sequences, where Q is a positive integer greater than or equal to P.

[0029] The first encoding module may also be referred to as a first encoding unit; the second encoding module may also be referred to as a second encoding unit. The first encoding module or the second encoding module may be implemented as a hardware circuit, software, or a combination of hardware circuit and software.

[0030] In combination with the second aspect, in certain implementations of the second aspect, the second encoding module is specifically configured to: perform second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences, where the Q second sequences include the P first sequences and the QP first check sequences.

[0031] In combination with the second aspect, in some implementations of the second aspect, the second encoding module is specifically configured to: perform second encoding on all bits of some or all of the P first sequences to obtain the QP first check sequences.

[0032] In combination with the second aspect, in certain implementations of the second aspect, the length of each first check sequence in the QP first check sequences is equal to the length of one first sequence in the P first sequences.

[0033] In conjunction with the second aspect, in some implementations of the second aspect, the P bit sequences belong to a first transport block, a size of the first transport block is determined according to R1,

[0034] With reference to the second aspect, in certain implementations of the second aspect, each of the P first sequences consists of X subsequences, where X is a positive integer; wherein the second encoding module is specifically configured to: encode part or all of the P×X subsequences to obtain the QP first check sequences.

[0035] With reference to the second aspect, in certain implementations of the second aspect, lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

[0036] In conjunction with the second aspect, in some implementations of the second aspect, the P bit sequences belong to a second transport block, and a size of the second transport block is determined according to R2. w is less than or equal to m, w is the length of each subsequence in the first X-1 subsequences of each first sequence in the P first sequences, and m is the length of the last subsequence in the X subsequences of each first sequence in the P first sequences.

[0037] With reference to the second aspect, in certain implementations of the second aspect, each first sequence in the P first sequences consists of X subsequences, wherein the second encoding module is specifically configured to: encode the P first sequences to obtain P third sequences, wherein a p-th third sequence in the P third sequences is obtained by encoding some or all of the X subsequences of the p-th first sequence in the P first sequences, and the p-th third sequence includes the p-th first sequence and a parity bit of the p-th first sequence; and encode all bits of some or all of the third sequences in the P third sequences to obtain the Q second sequences, where the Q second sequences include the P third sequences and QP second parity sequences.

[0038] In combination with the second aspect, in certain implementations of the second aspect, the length of each second check sequence in the QP second check sequences is equal to the length of one third sequence in the P third sequences.

[0039] With reference to the second aspect, in certain implementations of the second aspect, lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

[0040] In conjunction with the second aspect, in certain implementations of the second aspect, the P bit sequences belong to a third transport block, and a size of the third transport block is determined according to R3. The length of each first sequence in the P first sequences is z, and the length of each third sequence in the P third sequences is t.

[0041] In a third aspect, a communication device is provided, comprising a processing circuit (also referred to as a processor) and an input / output interface (also referred to as an interface circuit), wherein the input / output interface is used to input and / or output signals, and the processing circuit is used to execute the first aspect and any possible method of the first aspect.

[0042] In conjunction with the third aspect, in certain implementations of the third aspect, the processor is configured to communicate with other devices via an interface circuit and execute the first aspect and any possible method of the first aspect. The processor includes one or more.

[0043] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program or instruction is stored. When the computer program or the instruction is run on a computer, the first aspect and any possible method of the first aspect are executed.

[0044] In a fifth aspect, a computer program product is provided, comprising a computer program or instructions, which enables the first aspect and any possible method of the first aspect to be executed when the computer program or instructions are run on a computer.

[0045] In a sixth aspect, a communication device is provided, comprising a processor, connected to a memory, configured to call a program stored in the memory to execute any possible method of the first aspect. The memory may be located within or outside the communication device. The processor may include one or more processors.

[0046] In one implementation, the encoding device of the second aspect, and the communication device of the third aspect or the sixth aspect may be a chip or a chip system.

[0047] In a seventh aspect, a chip device is provided, comprising a processor for calling a computer program or computer instruction in a memory so that the processor executes any one of the implementation methods of the above-mentioned first aspect.

[0048] In combination with the seventh aspect, in certain implementations of the seventh aspect, the processor is coupled to the memory through an interface.

[0049] The description of the advantageous effects of any of the second to seventh aspects etc. may refer to the description of the advantageous effects of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] FIG1 is a schematic diagram of a communication system to which an embodiment of the present application is applicable.

[0051] FIG2 is a schematic diagram of an encoding method.

[0052] FIG3 is a schematic flowchart of an encoding method provided in an embodiment of the present application.

[0053] FIG4 is a schematic diagram of an encoding method provided in an embodiment of the present application.

[0054] FIG5 is another schematic diagram of the encoding method provided in an embodiment of the present application.

[0055] FIG6 is a schematic block diagram of a communication device according to an embodiment of the present application.

[0056] FIG7 is a schematic block diagram of another communication device according to an embodiment of the present application.

[0057] FIG8 is a schematic block diagram of an encoding device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0058] The technical solution in this application will be described below with reference to the accompanying drawings.

[0059] This application will present various aspects, embodiments, or features in the context of systems that may include multiple devices, components, modules, etc. It should be understood and appreciated that each system may include additional devices, components, modules, etc., and / or may not include all of the devices, components, modules, etc. discussed in conjunction with the figures. Furthermore, combinations of these aspects may also be used.

[0060] Additionally, in the embodiments of this application, words such as "exemplary" and "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of the word "exemplary" is intended to present concepts in a concrete manner.

[0061] The business scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Ordinary technicians in this field will know that with the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0062] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in yet other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically stated. The terms "including," "comprising," "having," and variations thereof mean "including but not limited to," unless otherwise specifically stated.

[0063] The technical solutions of the embodiments of the present application can be applied to various communication systems, including but not limited to: global system for mobile communications (GSM), enhanced data rate for GSM evolution (EDGE), wideband code division multiple access (WCDMA), code division multiple access 2000 (CDMA2000), time division-synchronization code division multiple access (TD-SCDMA), long term evolution (LTE), LTE frequency division duplex (FDD), LTE time division duplex (TDD), world wide interoperability for microwave access (WiMAX) communication system, fifth generation (5G) LTE, LTE frequency division duplex (FDD), LTE time division duplex (TDD), and 5G LTE. th The 5G generation mobile communication system or new radio (NR) system, narrowband Internet of Things (NB-IoT) system, enhanced machine-type communication (eMTC) system, enhanced mobile broadband (eMBB) system, ultra-reliable low latency communications (URLLC) system, satellite communication system or LTE-machine-to-machine (LTE-M) system and the future sixth generation (6G) system. th generation, 6G) mobile communication systems, etc.

[0064] It should be noted that in the embodiments of this application, the term "communication" can also be described as "data transmission," "signal transmission," "information transmission," or "transmission." In the embodiments of this application, transmission can include sending or receiving. For example, transmission can be uplink transmission, such as a terminal device sending a signal to a network device; transmission can also be downlink transmission, such as a network device sending a signal to a terminal device.

[0065] Figure 1 is a schematic diagram of a communication system applicable to embodiments of the present application. As shown in Figure 1 , communication system 100 may include multiple communication devices, which can wirelessly communicate with each other using air interface resources. Air interface resources may include at least one of time domain resources, frequency domain resources, code resources, and space resources. For example, the communication devices may include network device 110 and terminal device 120.

[0066] The network device 110 can be any device with wireless transceiver functions, such as a base station for accessing the terminal device 120 to a radio access network (RAN). The base station is sometimes also referred to as an access network device or an access network node. It is understandable that in systems using different wireless access technologies, the names of devices with base station functions may be different. For the convenience of description, the embodiments of the present application will collectively refer to devices that provide wireless communication access functions for terminal devices as base stations. In the embodiments of the present application, the network device 110 includes but is not limited to: various forms of macro base stations, micro base stations, pico base stations, small stations, balloon stations, relay stations, access points, etc. The network device 110 may include an evolved node B (eNB or eNodeB) in LTE, a radio network controller (RNC), a node B (NB), a base station controller (BSC), a base transceiver station (BTS), a home evolved node B (HNB), a base band unit (BBU), an access point, a wireless relay node, a wireless backhaul node, a transmission point (TP) or a transmission reception point (TRP) in a wireless fidelity (WIFI) system, etc., and may also include a next generation node basestation (gNB) or a transmission point (TRP or TP) in a 5G system, one or a group of antenna panels (including multiple antenna panels) of a base station in a 5G system, and network nodes constituting a gNB or a transmission point, such as a baseband unit (BBU) or a distributed unit (DPU). The network device 110 may also include network devices, servers, wearable devices, or vehicle-mounted devices in future 6G networks. The network device 110 may also be a module or unit that performs some functions of a base station, for example, a centralized unit (CU) or a distributed unit (DU).

[0067] Network device 110 may include a baseband unit (BBU) and a remote radio unit (RRU). The BBU and RRU may be located in different locations. For example, the RRU may be remotely located in a high-traffic area, while the BBU is located in a central computer room. The BBU and RRU may also be located in the same location, such as in the same computer room. The BBU and RRU may also be separate components within the same rack.

[0068] In the embodiment of the present application, the device for implementing the function of the network device 110 may be the network device 110, or may be a device capable of supporting the network device 110 to implement the function, such as a chip system, which may be installed in the network device 110. The chip system may be composed of a chip, or may include a chip and other discrete devices.

[0069] In another possible scenario, multiple network devices collaborate to assist the terminal in achieving wireless access, and different network devices respectively implement part of the functions of the base station. For example, the network device 110 can be a centralized unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), or a radio unit (RU). The CU and DU can be set separately, or can also be included in the same network element, such as a baseband unit (BBU). The RU can be included in a radio frequency device or radio frequency unit, such as a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH).

[0070] In different systems, CU (or CU-CP and CU-UP), DU or RU may also have different names, but those skilled in the art can understand their meanings. For example, in an open radio access network (O-RAN) system, CU may also be called O-CU (open CU), DU may also be called O-DU, CU-CP may also be called O-CU-CP, CU-UP may also be called O-CU-UP, and RU may also be called O-RU. For the convenience of description, this application uses CU, CU-CP, CU-UP, DU and RU as examples for description. Any unit of CU (or CU-CP, CU-UP), DU and RU in this application may be implemented by a software module, a hardware module, or a combination of a software module and a hardware module. The embodiments of this application do not limit the specific technology and specific device form adopted by the network device.

[0071] Terminal device 120 can be any device with wireless transceiver capabilities. Terminal device 120 can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; can also be deployed on water (such as on a ship); and can also be deployed in the air (for example, on an airplane, balloon, or satellite). Terminal device 120 can also be referred to as UE, access terminal, terminal, subscriber unit (subscriber unit), user station, mobile station, mobile station (MS), remote station, remote terminal, mobile device, user terminal, wireless network device, user agent, or user equipment. In the embodiment of the present application, the terminal device 120 includes, but is not limited to, a cellular phone, a mobile phone, a wireless data card, a wireless modem, a tablet computer, a laptop computer, a computer with wireless transceiver function, a cordless phone, a Session Initiation Protocol (SIP) phone, a smart phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication function, a computing device or other device connected to a wireless modem, an in-vehicle device, a wearable device, an unmanned aerial vehicle device, a terminal device in the Internet of Things or the Internet of Vehicles, and any form of terminal in a future network, a relay user device, or a terminal in a future evolved public land mobile communication network (PLMN). The terminal device 120 can also be a VR terminal device, an AR terminal device, a machine type communication (MTC) terminal, a terminal device in industrial control, a terminal device in self-driving, a terminal device in remote medical, a terminal device in a smart grid, a wireless terminal in transportation safety, a terminal device in a smart city, a terminal device in a smart home, a tactile terminal device, a vehicle-mounted terminal device, a wearable terminal device, etc., and the embodiments of the present application are not limited to this.

[0072] In the embodiment of the present application, the device for implementing the function of the terminal device 120 may be the terminal device 120, or may be a device capable of supporting the terminal device 120 to implement the function, such as a chip system, which may be installed in the terminal device 120. The chip system may be composed of a chip, or may include a chip and other discrete devices. In the technical solution of the embodiment of the present application, the device for implementing the function of the terminal device is a terminal device, which may also be referred to as a terminal. The following may take the terminal device as an example to describe the technical solution provided by the embodiment of the present application.

[0073] It should be understood that FIG1 is only a simplified schematic diagram for ease of understanding, and the communication system 100 may further include other network devices or other terminal devices, which are not shown in FIG1 .

[0074] The network device 110 and the terminal device 120 can communicate via a wireless link. The transmission link from the network device 110 to the terminal device 120 can be called a downlink (DL) or a downlink channel, which is used to transmit downlink signals. The transmission link from the terminal device 120 to the network device 110 can be called an uplink (UL) or an uplink channel, which is used to transmit uplink signals. Exemplarily, the network device 110 can send a downlink reference signal, such as a cell-specific reference signal (CRS) or a UE-specific reference signal (UE-specific reference signal), to the terminal device 120 via a downlink channel for channel state information measurement, data demodulation, beam training, time-frequency parameter tracking, etc. The terminal device 120 can send an uplink reference signal, such as an SRS or a DMRS, to the network device 110 via an uplink channel for uplink and downlink channel measurement, data demodulation, etc. The network device 110 and the terminal device 120 can also perform downlink data transmission via a downlink channel and perform uplink data transmission via an uplink channel.

[0075] Wireless communication can also be performed between the network device 110 and other network devices, and wireless communication can also be performed between the terminal device 120 and other terminal devices.

[0076] In an embodiment of the present application, the network device 110 provides services for a cell, and the terminal device 110 communicates with the network device 110 through the transmission resources (e.g., frequency domain resources, or spectrum resources) used by the cell, such as the cell 130 shown in FIG1 . The network device 110 may be a macro base station, a micro base station, a relay station, or an access point. The cell 130 may belong to a macro base station, or to a base station corresponding to a small cell. The small cells here may include: metro cells, micro cells, pico cells, femto cells, etc. Small cells are relative to macro cells. Macro cells generally have a larger coverage area (e.g., a radius of more than 500 meters) and high transmission power, while small cells have the characteristics of a smaller coverage area (e.g., a radius of tens of meters) and low transmission power, and are suitable for providing high-speed data transmission services.

[0077] As mentioned above, how to improve the reliability of data transmission is an urgent problem to be solved.

[0078] Hybrid Automatic Repeat Request (HARQ) technology allows retransmission of erroneous bit sequences, thereby improving transmission reliability. The HARQ mechanism operates using a multi-process stop-and-wait protocol. While one process is waiting for an acknowledgement, the sender can continue sending information using another process. Similarly, while the receiver is processing information received by one process, it can continue receiving information using another process. Multiple HARQ processes operate in parallel, forming a HARQ entity. For example, a HARQ entity can support up to 16 HARQ processes. Each uplink or downlink carrier can correspond to a HARQ entity. The HARQ entity determines whether a transmission is successful based on feedback from the receiver. An acknowledgment (ACK) indicates successful transmission; a negative acknowledgment (NACK) indicates a transmission failure. In the event of a transmission failure, retransmission is required. In NR, soft combining schemes can be categorized as chase combining (CC) or incremental redundancy (IR), depending on whether the retransmitted bit sequence is identical to the initial transmission. The bit sequence of the retransmission in CC is the same as that of the initial transmission, and the bit sequence of the retransmission in IR does not need to be the same as that of the initial transmission.

[0079] HARQ technology can retransmit at the granularity of transmission block (TB) or code block group (CBG) based on the feedback of ACK or NACK. Among them, a TB can include at least one CBG, and a CBG can include at least one code block (CB). Although retransmission can improve reliability, the redundancy overhead of retransmission is large, and there are problems such as waste of wireless resources. In order to provide redundancy more accurately, it is necessary to increase the feedback overhead, and refine the feedback information from CBG granularity to CB granularity feedback information, so as to more effectively support CB granularity feedback retransmission. However, the performance improvement of CB granularity feedback retransmission spectrum is limited, and higher feedback overhead is required.

[0080] Random linear network coding (RLNC) can be used to add parity bits to a bit sequence. When a bit sequence transmission error occurs, the parity bits can detect the erroneous bits, triggering HARQ and improving transmission reliability. RLNC technology can be used in data blocks, each of which contains one or more data packets. A coding coefficient matrix (also called a coding matrix) is constructed to encode the original data to produce a set of coded data packets. For a certain bit sequence in the original data, a coding coefficient matrix can be constructed to encode the bit sequence, producing a first sequence consisting of the bit sequence and parity bits. The coefficients in the coding matrix can be randomly selected from a finite field, such as a Galois field (GF).

[0081] Figure 2 is a schematic diagram of an encoding method. It should be noted that Figure 2 is for illustration only and does not constitute a limitation of the present application.

[0082] As shown in Figure 2, coefficients are randomly selected in the GF(q) domain as elements of the coding coefficient matrix A. The size of the coding coefficient matrix A is assumed to be (K+R)*K. The original data block may include K original data packets, and each element in the original data matrix X in Figure 2 corresponds to an original data packet. By performing the RLNC operation on the original data block, K+R coded data packets can be obtained (i.e., the set of coded data packets described above or the coded data matrix Y in the figure). Therefore, the bit rate can be expressed as K / (K+R).

[0083] In the RLNC scheme, there's no correlation between coded data blocks. That is, the encoding operation is performed on each independent original data block, and the redundancy (code rate) of each original data block can be the same or different. The generated K+R coded data packets are transmitted. When the receiver receives K linearly independent coded data packets, it can correctly decode and recover the K original data packets. However, due to factors such as interference and noise, if the number of correctly linearly independent coded data packets received by the receiver is less than K, decoding will be impossible. As can be seen from the above, the RLNC scheme needs to avoid linear correlation between coding coefficients. Therefore, a larger GF domain value is typically selected, and the number of original data packets in the original data block is large, which increases computational complexity and overhead. Furthermore, since there's no correlation between coded data blocks, the receiver and transmitter have poor immunity to burst channel errors.

[0084] The scheme of Figure 2 is a coding method based on the data packet or data block level, which corresponds to the bit-level channel coding method, such as the low-density parity check code (LDPC) coding and polar code coding proposed by 5GNR. This application can be combined with many channel coding methods and is not limited to the aforementioned LDPC or polar code methods.

[0085] FIG3 is a schematic flow chart of an encoding method 300 provided in an embodiment of the present application. Method 300 can improve the reliability of data transmission. Method 300 can be executed by a communication device (e.g., a network device or a terminal device), or by a component in the communication device (e.g., a processor, a chip, or a chip system), or by a logic module or software that can implement all or part of the functions of the communication device. Method 300 is described below in conjunction with FIG3.

[0086] S310: Perform first encoding on P bit sequences to obtain P first sequences.

[0087] The pth first sequence among the P first sequences may be obtained by first encoding the pth bit sequence among the P bit sequences. The pth first sequence may include the pth bit sequence and a check bit of the pth bit sequence.

[0088] Here, P can be a positive integer, or in other words, P can be a natural number greater than 0, or in other words, P = 1, 2, 3, .... p can be a positive integer from 1 to P, or in other words, p = 1, ..., P. In other words, p is a positive integer less than or equal to P.

[0089] It is understood that a bit sequence is a sequence before encoding. For example, assume there are three bit sequences (P=3), namely bit sequence 1, bit sequence 2, and bit sequence 3. Bit sequence 1 is first encoded to obtain first sequence 1; bit sequence 2 is first encoded to obtain first sequence 2; and bit sequence 3 is first encoded to obtain first sequence 3. First sequence 1 includes bit sequence 1 and the parity bits of bit sequence 1; first sequence 2 includes bit sequence 2 and the parity bits of bit sequence 2; and first sequence 3 includes bit sequence 3 and the parity bits of bit sequence 3.

[0090] Assuming the length of a bit sequence is k, then after performing the first encoding on the bit sequence, the length of the first sequence obtained can be n. Alternatively, assuming the bit sequence has k bits, then after performing the first encoding on the bit sequence, the first sequence obtained can have n bits. Of the n bits in the first sequence, k bits are bits of the original bit sequence, and the remaining nk bits are parity bits of the original bit sequence. For example, assuming k is 4 and n is 6. Then, of the 6 bits in the first sequence, 4 bits are bits of the original bit sequence, and the remaining 2 bits, excluding the 4 bits of the original bit sequence, are parity bits of the original bit sequence.

[0091] The first encoding may also be referred to as channel encoding or have other names. As an example, the first encoding may be performed based on a certain (n, k) code, for example, based on a G matrix or an H matrix. However, this application does not limit the specific method of the first encoding, and the first encoding may also be performed in other methods.

[0092] The P bit sequences may also be referred to as P information sequences, P data sequences, P CBs, P CB concatenated CRCs, or have other names. The check bits may also be referred to as redundant bits, or have other names.

[0093] In some optional embodiments, before S310, method 300 further includes: determining the size of the TB; adding a cyclic redundancy check (CRC) to the TB; and segmenting the TB with the CRC added to obtain the above-mentioned P bit sequences.

[0094] S320: Perform second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain Q second sequences.

[0095] Wherein, Q can be a positive integer greater than or equal to P.

[0096] As an optional embodiment, performing the second encoding on part or all of the first sequences may mean performing the second encoding on one or more of the P first sequences, with at least one of the P first sequences not performing the second encoding. For example, assuming P = 3, the second encoding may be performed on first sequences 1 and 2, while the second encoding may not be performed on first sequence 3.

[0097] As an optional embodiment, performing the second encoding on part or all of the first sequences may mean performing the second encoding on P first sequences. For example, assuming P=3, the second encoding may be performed on first sequence 1, first sequence 2, and first sequence 3.

[0098] As an optional embodiment, performing the second encoding on some or all of the bits in the first sequence may mean performing the second encoding on one or more bits in the first sequence, with at least one bit in the first sequence not performing the second encoding. For example, assuming N=6, bits 1 to 4 may be second encoded, while bits 5 and 6 may not be second encoded.

[0099] As an optional embodiment, performing the second encoding on some or all bits of the first sequence may mean performing the second encoding on all bits in the first sequence. For example, assuming N=6, the second encoding may be performed on bits 1 to 6.

[0100] The above four embodiments may be combined in any manner. For example, S320 may include performing the second encoding on all bits of a portion of the P first sequences, where at least one first sequence is not second-encoded, and all bits of the second-encoded first sequences are second-encoded.

[0101] It should be noted that, in the case where all bits of all first sequences in the P first sequences are second-encoded, S320 can also be expressed as performing the second encoding on all first sequences in the P first sequences, or performing the second encoding on all bits in the P first sequences, or performing the second encoding on the P first sequences. In other words, for simplicity, the term "all" can be deleted from the description, or the term "all" and the noun modified by "all" can be deleted from the description.

[0102] It should be noted that P can also be replaced by other symbols (such as n c ), Q can also be replaced by other symbols (for example, R+n c ), which is not limited in this application. The P first sequences may also be referred to as multiple first sequences, or at least one first sequence. The Q second sequences may also be referred to as multiple second sequences, or at least one second sequence.

[0103] Through the above embodiment, after channel coding a bit sequence to obtain a first sequence, the first sequence can be further coded a second time to obtain a second sequence. Those skilled in the art will appreciate that coding can increase redundancy. Therefore, compared to the first sequence obtained by only performing a single coding operation, the redundancy of the second sequence obtained by performing a double coding operation is further increased. This allows the second sequence to be more likely to correct errors in the event of transmission errors due to the increased redundancy, thereby improving transmission reliability.

[0104] Optionally, in some other implementation scenarios of the above embodiment, S320 includes: performing second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences, where the Q second sequences include the P first sequences and the QP first check sequences.

[0105] The QP first check sequences can be replaced by R first check sequences. That is, R = QP. For ease of description, the following may be expressed as QP first check sequences or R first check sequences. It should be noted that other symbols can also be used to represent QP or R, and this application does not limit this.

[0106] In other optional embodiments, S320 may be replaced by: performing a second encoding on some or all of the bits of some or all of the first sequences in the P first sequences to obtain R first parity check sequences. In other words, performing the second encoding on the P first sequences obtains R first parity check sequences, rather than Q second sequences including the P first sequences and the R first parity check sequences.

[0107] The R first check sequences may be referred to as check sequences of the P first sequences. The first check sequence may also be referred to as a redundant sequence, a redundant bit sequence, a redundant code sequence, a check code sequence, or other names.

[0108] Optionally, the P first sequences and QP first check sequences correspond to different transmission modes. As an example, the P first sequences correspond to a first modulation order, the QP first check sequences correspond to a second modulation order, and the first modulation order is different from the second modulation order. In other words, the first sequence and the first check sequence may correspond to different modulation orders. As another example, the P first sequences are mapped to the first layer, the QP first check sequences are mapped to the second layer, and the first layer is different from the second layer. In other words, the first sequence and the first check sequence may be mapped to different layers. As yet another example, the P first sequences correspond to a first antenna port, the QP first check sequences correspond to a second antenna port, and the first antenna port is different from the second antenna port. In other words, the first sequence and the first check sequence may correspond to different antenna ports. The first antenna port may be one or more antenna ports, or a group of antenna ports. The second antenna port may be one or more antenna ports, or a group of antenna ports.

[0109] Optionally, QP first check sequences can be sent as a single sequence. In other words, the QP first check sequences can be assembled into a single sequence, and the transmitter can send the sequence. Optionally, the QP first check sequences can be sent separately. In other words, the transmitter can send the QP first check sequences. Optionally, the QP first check sequences can be sent after the P first sequences. Exemplarily, the QP first check sequences can be assembled into at least one sequence, and the at least one sequence can be sent after some of the P first sequences. For example, assuming that the QP first check sequences can be assembled into three sequences, these three sequences can be assembled and sent after three of the P first sequences.

[0110] Through the above embodiment, further encoding of part or all of the first sequence can generate a first check sequence. The first check sequence can improve the decoding performance. For example, by using soft information for iterative decoding, the bit sequence with decoding errors can be restored, thereby reducing the number of retransmissions. The first check sequence can improve the spectrum efficiency. For example, in HARQ technology, TB, CBG, or CB granularity retransmission is often used. The first check sequence of the embodiment of the present application can simultaneously provide redundant information to the first sequence involved in the encoding, overcome the limitations of the retransmission of TB, CBG or CB granularity, and can simultaneously support error correction decoding of multiple first sequences, thereby supporting more efficient and finer-grained error correction and retransmission on the decoding side, thereby improving spectrum efficiency. Figure 4 is a schematic diagram of the encoding method provided by an embodiment of the present application. After executing S410, the P first sequences obtained can be from s1 to s in (a) in Figure 4. P Some embodiments of S420 are described below with reference to FIG4 .

[0111] Optionally, in some other implementation scenarios of the foregoing embodiment, performing a second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences includes: performing a second encoding on all bits of some or all of the first sequences in the P first sequences to obtain the QP first check sequences.

[0112] Through the above embodiment, further encoding of all bits of part or all of the first sequence can generate a first check sequence. Since all bits of some (or a certain) first sequence are encoded, the decoding performance can be further improved. For example, by using soft information for iterative decoding, the bit sequence of the decoding error can be recovered with a greater probability, thereby further reducing the number of retransmissions. The above embodiment can further improve the spectrum efficiency. For example, in HARQ technology, TB, CBG, or CB granularity retransmission is often used. The check sequence of the embodiment of the present application can simultaneously provide redundant information to the first sequence involved in the encoding, overcome the limitations of TB, CBG or CB granularity retransmission, and can simultaneously support error correction decoding of multiple first sequences, thereby supporting more efficient and finer-grained error correction and retransmission on the decoding side, thereby improving spectrum efficiency.

[0113] Optionally, in some other implementation scenarios of the above embodiment, the length of each first check sequence in the QP first check sequences is equal to the length of one first sequence in the P first sequences.

[0114] In some optional embodiments, the lengths of any two of the P first sequences are equal (or identical). That is, the length of each of the QP first check sequences can be equal to the length of any one of the first sequences. For example, referring to (b) in FIG4 , the first check sequences r1 to r Q-P The length of the first sequence s1 to s P The length of any first sequence in is equal.

[0115] In other optional embodiments, the lengths of two first sequences in the P first sequences are unequal (or different). In other words, there are at least two first sequences of unequal length in the P first sequences. In some optional embodiments, the length of each first check sequence in the QP first check sequences is equal to the length of the longest first sequence in the P first sequences. Alternatively, a "0" bit is added to the first sequences in the P first sequences that are shorter than the maximum length, thereby making the lengths of the P first sequences equal, thereby converting to the solution in Figure 4 (b).

[0116] FIG5 is another schematic diagram of the encoding method provided in an embodiment of the present application. FIG5 is only an example and does not constitute a limitation of the present application. In conjunction with FIG5, some embodiments of the method 300 can be characterized by the following formula: r = S * c * G

[0117] Here, r represents the set of first check sequences, or QP first check sequences. The size of r is R*n, or (QP)*n.

[0118] Where c represents a P bit sequence, and the size of c is P*k.

[0119] Here, G represents the first coding matrix (also known as the generator matrix for channel coding). The size of G is k*n. Using c*G, P bit sequences can be first encoded, each of length k. In other words, the result obtained by c*G can be considered as P first sequences, and the size of the matrix obtained by c*G is P*n.

[0120] Where S represents the second encoding matrix. The size of S is R*P, or (QP)*P. By left-multiplying S by P first sequences, the P first sequences can be second-encoded.

[0121] In addition, the result obtained by c*G can be regarded as P first sequences. In other optional embodiments, P first sequences can be obtained by channel coding the H matrix. That is, the G matrix is ​​replaced by the H matrix.

[0122] In some optional embodiments, the encoding may be performed in the GF(2) domain. However, this application is not limited thereto. For example, the encoding may be performed in the high domain.

[0123] In some optional embodiments, the second encoding may adopt a bit-by-bit exclusive or (XOR) encoding method.

[0124] It should be noted that the bit-by-bit XOR operation can be performed on some or all of the P first sequences. For example, assuming P=4, the bit-by-bit XOR operation can be performed on all of the P first sequences, that is, a bit-by-bit XOR operation is performed on first sequence 1, first sequence 2, first sequence 3, and first sequence 4. The bit-by-bit XOR operation can also be performed on some of the P first sequences, such as a bit-by-bit XOR operation is performed on first sequence 1 and first sequence 2.

[0125] In the scheme of performing bit-by-bit XOR on a portion of the first sequences, as an example, all first sequences can be divided into multiple groups, and a bit-by-bit XOR can be performed on the first sequences in each group (equivalent to a portion of the first sequences), that is, a bit-by-bit XOR is performed on each first sequence. As another example, a bit-by-bit XOR can be performed on any first sequence in all first sequences, that is, a bit-by-bit XOR may be performed on each first sequence once or multiple times, and there may be first sequences that are not subjected to a bit-by-bit XOR.

[0126] Exemplarily, performing bit-by-bit XOR on some or all of the P first sequences may yield the solution shown in (b) of FIG4 .

[0127] The present application does not limit the name of the bit-by-bit XOR. For example, it may also be called bit-by-bit modulo-2 addition, bit-by-bit XOR, bit-by-bit modulo-2 addition, or have other names.

[0128] Through the above embodiment, further encoding of all bits of part or all of the first sequences can generate first check sequences of equal length. Since the first check sequences have the same bit length, encoding is simple to implement.

[0129] It should be noted that, in the relevant technical solution, multiple data CBs of length k are first encoded to obtain redundant CBs of length k, and then the data CBs and redundant CBs are channel coded to obtain data CBs of length n and redundant CBs of length n. The method provided in the embodiment of the present application is completely different from the relevant technical solution. The first step of the present application adopts channel coding, while the relevant technical solution adopts channel coding in the second step. Moreover, the effect of the method provided in the embodiment of the present application is better than that of the relevant technical solution. This is because the relevant technical solution can only provide a redundant sequence of k bits, while the present application can provide a redundant sequence of n bits. Therefore, the embodiment of the present application can provide more soft information and has a stronger error correction capability.

[0130] Optionally, in some other implementation scenarios of the above embodiment, the P bit sequences belong to the first TB, and the size of the first TB is determined according to R1. Optionally,

[0131] The P bit sequences belong to the first TB; in other words, the P bit sequences correspond to the first TB; in other words, the P bit sequences can be carried in the first TB and sent to the receiving end.

[0132] Optionally, the size of the first TB is based on N re , R1, R', v or Q m At least one of the following is determined. reIt can be the total number of resource elements (RE), N re The determination of can refer to the relevant scheme of the NR system. R' can be the code rate, for example, R' can be the code rate in the modulation and coding scheme (MCS) of the NR system. v can be the number of layers transmitted. Q m It can be the modulation order.

[0133] Optionally, the size of the first TB is determined based on P and Q. Optionally, the size of the first TB is determined based on P and R.

[0134] Optionally, the size N of the first TB info Satisfy the following formula. N info =N re *R1*R′*Q m *v.

[0135] Optionally, the MCS table may include information indicating R1.

[0136] Through the above embodiment, R1 can correct the size of the transport block so that the transmitting end can correctly calculate the original data bits that are effectively carried.

[0137] Optionally, in some other implementation scenarios of the foregoing embodiment, each first sequence in the P first sequences consists of X subsequences, where X is a positive integer; wherein performing second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences includes: encoding some or all of the P×X subsequences to obtain the QP first check sequences.

[0138] Figure 4(c) illustrates the scenario where X = 4. Referring to Figure 4(c), the dashed line divides the P first sequences into 4P subsequences. Each first sequence consists of four subsequences. By encoding some or all of the 4P subsequences, QP first parity check sequences can be obtained. For example, a bit-by-bit XOR operation can be performed on any two or more of the 4P subsequences to obtain a first parity check sequence.

[0139] It should be noted that the above is only an example, and the present application does not limit the value of X, and X can be any positive integer.

[0140] Optionally, performing bit-by-bit XOR on at least two of the P×X subsequences is repeated QP times to obtain QP first parity check sequences. In some optional embodiments, the subsequences subjected to bit-by-bit XOR may be repeated each time. In other words, at least one subsequence is bit-by-bit XORed multiple times. In other optional embodiments, the subsequences subjected to bit-by-bit XOR are not repeated each time. In other words, each subsequence is bit-by-bit XORed at most once. In some optional embodiments, each subsequence is bit-by-bit XORed once. In some optional embodiments, each subsequence is bit-by-bit XORed y times, where y is a positive integer.

[0141] Optionally, the lengths of the x-th subsequences in the X subsequences of any two first sequences are equal. Wherein, x is a positive integer from 1 to X. Referring to (c) in Figure 4 , the above scheme can be understood as that the lengths of the subsequences divided by the same dotted line (i.e., in the same column) are equal. For example, the lengths of the subsequences in the first column are equal; the lengths of the subsequences in the second column are equal; the lengths of the subsequences in the third column are equal; and the lengths of the subsequences in the fourth column are equal. However, it should be noted that the above scheme does not limit the length of the subsequence in the first column to be equal to the length of the subsequence in the second column. In other words, a first sequence is divided into X subsequences, and at least two of the X subsequences may have unequal lengths.

[0142] Through the above embodiments, further encoding of part or all of the bits of the first sequence can generate a first check sequence, thereby further improving the decoding performance. For example, by using soft information for iterative decoding, the bit sequence of decoding errors can be recovered with a greater probability, thereby further reducing the number of retransmissions. The above embodiments can further improve spectrum efficiency. For example, in HARQ technology, retransmission with TB, CBG, or CB granularity is often used. The first check sequence of the embodiment of the present application can further provide more redundant information, thereby supporting more efficient and finer-grained error correction and retransmission on the decoding side, further improving spectrum efficiency.

[0143] Optionally, in some other implementation scenarios of the above embodiment, the lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

[0144] In other words, at least the first X-1 subsequences of each of the P first sequences have the same length. The lengths of the X-1 subsequences corresponding to any two of the P first sequences are also the same.

[0145] For example, referring to (c) in FIG4 , the above scheme can be understood as follows: the lengths of the subsequences of the first, second, and third columns (i.e., the first X-1 columns) are equal. The length of the subsequence of the fourth column (i.e., the Xth column) can be equal to or different from the length of the first X-1 columns, and the above scheme is not limited thereto.

[0146] Optionally, the X subsequences in each first sequence are of equal length. In other words, the subsequences of the P first sequences are of equal length. In other words, the P×X subsequences are of equal length. Referring to (c) in FIG. 4 , the above solution can be understood as meaning that the 4P subsequences are all of equal length.

[0147] Optionally, in some other implementation scenarios of the above embodiment, the number of the first check sequence is the same as the number of the first sequence. In other words, R=P. In other words, the number of the first check sequence is P.

[0148] Optionally, the P first check sequences can be sent separately from the P first sequences. In other words, the transmitter can send the P first sequences and the P first check sequences. Alternatively, the P first check sequences can be sent as a sequence. In other words, the transmitter can send the P first sequences and a sequence concatenated from the P first sequences. Optionally, the P first check sequences can be concatenated and sent after (or before, or between) the P first sequences. For example, see (d) in Figure 4 .

[0149] Optionally, in some other implementation scenarios of the foregoing embodiment, each of the P first sequences consists of X subsequences, where X is a positive integer; wherein performing second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences includes: encoding the X subsequences of each first sequence in the P first sequences to obtain the P first check sequences.

[0150] Referring to (c) in Figure 4 , the above scheme can be understood as encoding subsequences in the same row. For example, performing a bit-by-bit XOR on the four subsequences of s1 yields r1. It should be noted that the P first check sequences can be sent separately from the P first sequences, concatenated into a single sequence, or concatenated and sent after (or before, or between) the P first sequences.

[0151] In a scenario where P first check sequences are respectively concatenated into P first sequences for transmission, the first check sequence concatenated with one first sequence may be obtained by encoding the first sequence, or may not be obtained by encoding the first sequence.

[0152] Optionally, in some other implementation scenarios of the above embodiment, the P bit sequences belong to a second transmission block, and the size of the second transmission block is determined according to R2. w is less than or equal to m, w is the length of each subsequence in the first X-1 subsequences of each first sequence in the P first sequences, and m is the length of the last subsequence in the X subsequences of each first sequence in the P first sequences.

[0153] The P bit sequences belong to the second TB; in other words, the P bit sequences correspond to the second TB; in other words, the P bit sequences can be carried in the second TB and sent to the receiving end.

[0154] Optionally, the size of the second TB is based on N re , R2, R', v or Q m At least one of the following is determined. re It can be the total number of RE, N re The determination of can refer to the relevant scheme of NR system. R' can be the code rate, for example, R' can be the code rate in the MCS of NR system. v can be the number of layers transmitted. Q m It can be the modulation order.

[0155] Optionally, the size of the second TB is determined according to P and Q. Optionally, the size of the second TB is determined according to P and R.

[0156] Optionally, the size N of the second TB info Satisfy the following formula. N info =N re *R2*R′*Q m *v.

[0157] Optionally, the MCS table may include information indicating R2.

[0158] Through the above embodiment, R2 can correct the size of the transport block so that the transmitting end can correctly calculate the original data bits that are effectively carried.

[0159] Optionally, when the lengths of the X subsequences of each of the P first sequences are equal, that is, when m=w, Optionally,

[0160] Optionally, in some other implementation scenarios of the foregoing embodiment, each first sequence in the P first sequences consists of X subsequences, wherein S320 includes: encoding the P first sequences to obtain P third sequences, wherein a p-th third sequence in the P third sequences is obtained by encoding part or all of the X subsequences of the p-th first sequence in the P first sequences, and the p-th third sequence includes the p-th first sequence and a parity bit of the p-th first sequence; and encoding all bits of part or all of the third sequences in the P third sequences to obtain the P second sequences, and the Q second sequences include the P third sequences and QP second parity sequences.

[0161] It is understandable that the above scheme includes two-step encoding. The first step is to encode P first sequences to obtain P third sequences. In the first step, the number of encoded sequences does not change, and the encoded first check sequences are respectively spliced ​​after (or before, or in the middle of) the original first sequences as the check bits of the original first sequences. As an example, see (e) in Figure 4, for the first sequence s i Encode part or all of the four subsequences (for example, bit-by-bit XOR) to obtain the first sequence s i The check bit (or called the first check sequence) a i , i is a positive integer from 1 to P. The i-th third sequence may include the first sequence s i and the first sequence s i The parity bit a i .

[0162] The second step is to encode all bits of some or all of the P third sequences to obtain P second sequences. Optionally, encoding all bits of some or all of the P third sequences to obtain the P second sequences includes: encoding all bits of some or all of the P third sequences to obtain the QP second check sequences.

[0163] The second check sequence may also be referred to as a check sequence of the third sequence. The second check sequence may also be referred to as a redundant sequence, a redundant bit sequence, a redundant code sequence, a check code sequence, or other names.

[0164] Optionally, the P third sequences and QP second check sequences correspond to different transmission modes. As an example, the P third sequences correspond to a first modulation order, the QP second check sequences correspond to a second modulation order, and the first modulation order is different from the second modulation order. In other words, the third sequence and the second check sequence may correspond to different modulation orders. As another example, the P third sequences are mapped to the first layer, the QP second check sequences are mapped to the second layer, and the first layer is different from the second layer. In other words, the third sequence and the second check sequence may be mapped to different layers. As yet another example, the P third sequences correspond to a first antenna port, the QP second check sequences correspond to a second antenna port, and the first antenna port is different from the second antenna port. In other words, the third sequence and the second check sequence may correspond to different antenna ports. The first antenna port may be one or more antenna ports, or a group of antenna ports. The second antenna port may be one or more antenna ports, or a group of antenna ports.

[0165] As an example, the remaining descriptions of the first step can refer to the aforementioned "encoding part or all of the P×X subsequences to obtain the QP first parity check sequences" or the content of (c) in FIG4 . The difference is that the previous description is about obtaining QP first parity check sequences, while the remaining descriptions of the first step can be replaced by obtaining P third sequences.

[0166] As another example, the remaining description of the first step can refer to the aforementioned "encoding X subsequences of each of the P first sequences to obtain the P first parity sequences" or the example of step (d) in FIG4 . The difference is that the previous description is about obtaining P first parity sequences, while the remaining description of the first step can be replaced by obtaining P third sequences.

[0167] The rest of the description of the second step can refer to the aforementioned "performing a second encoding on all bits of some or all of the P first sequences to obtain the QP first check sequences" or the example of step (b) in FIG4 . The difference is that the previous description is for the first sequence, while the rest of the description of the second step can be replaced with the description for the third sequence.

[0168] Through the above embodiment, the first sequence is first encoded once to obtain a third sequence with check bits, and then all the bits of the third sequence are further encoded to generate a second check sequence. Since the above scheme can bring more redundancy, it can further improve the decoding performance. For example, by using soft information for iterative decoding, the bit sequence with decoding errors can be recovered with a greater probability, thereby further reducing the number of retransmissions. The above embodiment can further improve the spectrum efficiency. For example, in HARQ technology, retransmission with TB, CBG, or CB granularity is often used. The second check sequence of the embodiment of the present application can further provide more redundant information, thereby supporting finer-grained error correction and retransmission on the decoding side, further improving the spectrum efficiency.

[0169] Optionally, in some other implementation scenarios of the above embodiment, the length of each second check sequence in the QP second check sequences is equal to the length of one third sequence in the P third sequences.

[0170] In some optional embodiments, the lengths of any two third sequences in the P third sequences are equal (or the same). That is, the length of each second check sequence in the QP second check sequences can be equal to the length of any third sequence. For example, referring to (e) in FIG4 , the second check sequences r1 to r Q-P The length of the third sequence (s1|a1) to (s P |a P ) have the same length as any first sequence. |The symbol “|” indicates concatenation.

[0171] In other optional embodiments, two of the P third sequences have unequal (or different) lengths. In other words, there are at least two third sequences of unequal lengths among the P third sequences. In some optional embodiments, the length of each second parity check sequence in the QP second parity check sequences is equal to the length of the longest third sequence among the P third sequences. Alternatively, a "0" bit is added to the first sequence of the P third sequences whose length is less than the maximum length, thereby making the lengths of the P third sequences equal, thereby converting to the solution (e) in Figure 4.

[0172] Optionally, in some other implementation scenarios of the above embodiment, the lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

[0173] Optionally, in some other implementation scenarios of the above embodiment, the P bit sequences belong to a third TB, and the size of the third TB is determined according to R3. Optionally, The length (or number of bits) of each first sequence in the P first sequences is z, and the length (or number of bits) of each third sequence in the P third sequences is t.

[0174] The P bit sequences belong to the third TB; in other words, the P bit sequences correspond to the third TB; in other words, the P bit sequences can be carried in the third TB and sent to the receiving end.

[0175] Optionally, the size of the third TB is based on N re , R3, R', v or Q m At least one of the following is determined. re It can be the total number of RE, N re The determination of can refer to the relevant scheme of NR system. R' can be the code rate, for example, R' can be the code rate in the MCS of NR system. v can be the number of layers transmitted. Q m It can be the modulation order.

[0176] Optionally, the size of the third TB is determined based on P and Q. Optionally, the size of the third TB is determined based on P and R.

[0177] Optionally, the size N of the third TB info Satisfy the following formula. N info =N re *R3*R′*Q m *v.

[0178] Optionally, the MCS table may include information indicating R3.

[0179] Through the above embodiment, R3 can correct the size of the transport block so that the transmitting end can correctly calculate the original data bits that are effectively carried.

[0180] Optionally, when the lengths of the X subsequences of each first sequence are equal, Optionally,

[0181] The following is an introduction to the device embodiment corresponding to the method embodiment of the present application. The following is only a brief introduction to the device, and the specific implementation steps and details of the solution can be referred to the method embodiment above.

[0182] To implement the various functions of the methods provided herein, both terminal devices and network devices may include hardware structures and / or software modules, with the aforementioned functions implemented in the form of hardware structures, software modules, or a combination of hardware structures and software modules. Whether a particular function is implemented in the form of hardware structures, software modules, or a combination of hardware structures and software modules depends on the specific application and design constraints of the technical solution.

[0183] Figure 6 is a schematic block diagram of a communication device 600 according to an embodiment of the present application. The communication device 600 includes a processor 610 and a communication interface 620, which may be interconnected via a bus 630. For example, the communication device 600 may be a terminal device or a network device.

[0184] Optionally, the communication device 600 may further include a memory 640. The memory 640 includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), or compact disc read-only memory (CD-ROM). The memory 640 is used for related instructions and data. The memory 640 may be integrated with the processor 610 or provided separately.

[0185] The processor 610 may be one or more central processing units (CPUs). In the case where the processor 610 is a CPU, the CPU may be a single-core CPU or a multi-core CPU. The processor 610 may be a signal processor, a chip, or other integrated circuit that can implement the method of the present application, or a portion of the circuitry used for processing functions in the aforementioned processor, chip, or integrated circuit. In addition, the communication interface 620 may also be an input / output interface, which is used for inputting or outputting signals or data, or may be an input / output circuit.

[0186] Exemplarily, the processor 610 is configured to perform the following operations: perform a first encoding on P bit sequences to obtain P first sequences, wherein a p-th first sequence among the P first sequences is obtained by performing a first encoding on the p-th bit sequence among the P bit sequences, the p-th first sequence includes the p-th bit sequence and a check bit of the p-th bit sequence, P is a positive integer, and p is a positive integer less than or equal to P; and perform a second encoding on some or all of the bits of some or all of the first sequences in the P first sequences to obtain Q second sequences, where Q is a positive integer greater than or equal to P.

[0187] The above contents are merely exemplary descriptions. The communication device 600 is responsible for executing the methods or steps related to the communication device in the above method embodiments.

[0188] It is understood that the communication interface 620 may also be referred to as a transceiver. The transceiver may include a transmitter and a receiver, where the transmitter is used to perform a transmission operation and the receiver is used to perform a reception operation. For example, the processor 610 is used to control the transceiver to receive and / or transmit signals.

[0189] It should be noted that the communication device 600 may include a transmitter but not a receiver. Alternatively, the communication device 600 may include a receiver but not a transmitter. The specific implementation depends on whether the above solution executed by the communication device 600 includes a sending action and a receiving action.

[0190] The above description is merely exemplary. For details, please refer to the contents of the above method embodiments. The implementation of each operation in FIG6 may also correspond to the corresponding description of the method embodiments shown in FIG3 to FIG5.

[0191] For other implementations, please refer to the detailed description of the embodiments shown in Figures 3 to 5 above, which will not be repeated here. It should be understood that the specific process of each component performing the above corresponding process has been detailed in the above method embodiment, and for the sake of brevity, it will not be repeated here.

[0192] Figure 7 is a schematic block diagram of another communication device 700 according to an embodiment of the present application. Communication device 700 may be the communication device itself, or a chip or module within the communication device, and is configured to implement the methods described in the embodiments of Figures 3 to 5. For details, please refer to the relevant descriptions in the aforementioned method embodiments.

[0193] The communication device 700 includes a processing unit 720. The processing unit 720 is exemplarily introduced below.

[0194] Illustratively, the processing unit 720 is configured to: perform a first encoding on P bit sequences to obtain P first sequences, wherein a p-th first sequence among the P first sequences is obtained by performing the first encoding on the p-th bit sequence among the P bit sequences, the p-th first sequence includes the p-th bit sequence and a check bit of the p-th bit sequence, P is a positive integer, and p is a positive integer less than or equal to P; and perform a second encoding on some or all of the bits of some or all of the first sequences in the P first sequences to obtain Q second sequences, where Q is a positive integer greater than or equal to P.

[0195] The above contents are merely exemplary descriptions, and the communication device 700 is responsible for executing the methods or steps of the above method embodiments.

[0196] Optionally, the communication device 700 may further include a transceiver unit 710. The transceiver unit 710 may include a transmitting unit and a receiving unit. The transmitting unit is used to perform the transmitting action of the communication device, and the receiving unit is used to perform the receiving action of the communication device. For ease of description, the embodiment of the present application combines the transmitting unit and the receiving unit into a single transceiver unit. This is described here for a unified explanation and will not be repeated later. The transceiver unit 710 can implement corresponding communication functions. The transceiver unit 710 may also be referred to as a communication interface or a communication module.

[0197] It should be noted that the communication device 700 may include a sending unit but not a receiving unit. Alternatively, the communication device 700 may include a receiving unit but not a sending unit. The specific implementation depends on whether the above solution executed by the communication device 700 includes a sending action and a receiving action.

[0198] Optionally, the communication device 700 further includes a storage unit 730, which is configured to store a program or code for executing the aforementioned method. Alternatively, the storage unit 730 may be configured to store instructions and / or data, and the processing unit 720 may read the instructions and / or data in the storage unit 730 to enable the communication device 700 to implement the aforementioned method embodiment. For example, the communication device 700 may be configured to execute the solution shown in FIG. 3 .

[0199] FIG8 is a schematic block diagram of an encoding device 800 provided in an embodiment of the present application. The device 800 can be used to implement the solution shown in FIG3 .

[0200] As shown in Figure 8, the encoding device 800 includes: a first encoding module 810, used to perform a first encoding on P bit sequences to obtain P first sequences, wherein the p-th first sequence in the P first sequences is obtained by performing a first encoding on the p-th bit sequence in the P bit sequences, and the p-th first sequence includes the p-th bit sequence and a check bit of the p-th bit sequence, P is a positive integer, and p is a positive integer less than or equal to P; a second encoding module 820, used to perform a second encoding on some or all of the bits of some or all of the first sequences in the P first sequences to obtain Q second sequences, where Q is a positive integer greater than or equal to P.

[0201] The first encoding module 810 may also be referred to as the first encoding unit; the second encoding module 820 may also be referred to as the second encoding unit. The first encoding module 810 or the second encoding module 820 may be implemented as a hardware circuit, software, or a combination of hardware circuits and software. For example, the processor 610 in the communication device 600 may implement the functions of the first encoding module 810 or the second encoding module 820. For another example, the processing unit 720 in the communication device 700 may implement the functions of the first encoding module 810 or the second encoding module 820.

[0202] Optionally, the second encoding module 820 is specifically configured to perform second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences, where the Q second sequences include the P first sequences and the QP first check sequences.

[0203] Optionally, the second encoding module 820 is specifically configured to perform second encoding on all bits of part or all of the P first sequences to obtain the QP first check sequences.

[0204] Optionally, the length of each first check sequence in the QP first check sequences is equal to the length of one first sequence in the P first sequences.

[0205] Optionally, the P bit sequences belong to a first transport block, and the size of the first transport block is determined according to R1.

[0206] Optionally, each of the P first sequences consists of X subsequences, where X is a positive integer; wherein the second encoding module 820 is specifically configured to: encode part or all of the P×X subsequences to obtain the QP first check sequences.

[0207] Optionally, lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

[0208] Optionally, the P bit sequences belong to a second transport block, and a size of the second transport block is determined according to R2. w is less than or equal to m, w is the length of each subsequence in the first X-1 subsequences of each first sequence in the P first sequences, and m is the length of the last subsequence in the X subsequences of each first sequence in the P first sequences.

[0209] Optionally, each first sequence in the P first sequences consists of X subsequences, wherein the second encoding module 820 is specifically configured to: encode the P first sequences to obtain P third sequences, wherein a p-th third sequence in the P third sequences is obtained by encoding part or all of the X subsequences of the p-th first sequence in the P first sequences, and the p-th third sequence includes the p-th first sequence and a parity bit of the p-th first sequence; and encode all bits of part or all of the third sequences in the P third sequences to obtain the Q second sequences, wherein the Q second sequences include the P third sequences and QP second parity sequences.

[0210] Optionally, the length of each second check sequence in the QP second check sequences is equal to the length of one third sequence in the P third sequences.

[0211] Optionally, any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences have the same length.

[0212] Optionally, the P bit sequences belong to a third transport block, and a size of the third transport block is determined according to R3. The length of each first sequence in the P first sequences is z, and the length of each third sequence in the P third sequences is t.

[0213] For other implementations, please refer to the detailed description of the embodiments shown in Figures 3 to 5 above, which will not be repeated here. It should be understood that the specific process of each component performing the above corresponding process has been detailed in the above method embodiment, and for the sake of brevity, it will not be repeated here.

[0214] The device embodiments shown in Figures 6 to 8 are used to implement the contents described in Figures 3 to 5. The specific execution steps and methods of the devices shown in Figures 6 to 8 can refer to the contents described in the above method embodiments.

[0215] When communication device 600 is a chip, the chip includes a transceiver, a memory, and a processor. The transceiver can be an input / output circuit or a communication interface; the processor can be a processor, microprocessor, or integrated circuit integrated on the chip. The sending operation in the above method embodiment can be understood as an output of the chip, and the receiving operation in the above method embodiment can be understood as an input of the chip.

[0216] The present application also provides a decoding method, which is the inverse process of the encoding method in the embodiment of the present application.

[0217] The present application also provides a chip, including a processor, for calling and executing instructions stored in a memory, so that a communication device equipped with the chip executes the methods in the above examples.

[0218] The present application also provides another chip, comprising: an input interface, an output interface, and a processor, wherein the input interface, the output interface, and the processor are connected via an internal connection path, and the processor is configured to execute code in a memory. When the code is executed, the processor is configured to execute the methods in the above examples. Optionally, the chip also includes a memory, which is configured to store computer programs or code.

[0219] The present application also provides a processor for coupling with a memory, and for executing the methods and functions involving a communication device or an encoding device in any of the above embodiments.

[0220] In another embodiment of the present application, a computer program product including a computer program or instructions is provided. When the computer program product is run on a computer, the method of the aforementioned embodiment is implemented.

[0221] The present application also provides a computer program. When the computer program is executed in a computer, the method of the aforementioned embodiment is implemented.

[0222] In another embodiment of the present application, a computer-readable storage medium is provided, which stores a computer program. When the computer program is executed by a computer, the method described in the above embodiment is implemented.

[0223] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0224] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0225] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0226] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0227] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0228] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0229] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A coding method, characterized in that: include: Performing a first encoding on P bit sequences to obtain P first sequences, wherein a p-th first sequence among the P first sequences is obtained by performing the first encoding on a p-th bit sequence among the P bit sequences, the p-th first sequence includes the p-th bit sequence and a check bit of the p-th bit sequence, P is a positive integer, and p is a positive integer less than or equal to P; Second encoding is performed on some or all bits of some or all of the first sequences in the P first sequences to obtain Q second sequences, where Q is a positive integer greater than or equal to P.

2. The method according to claim 1, characterized in that The performing second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain Q second sequences includes: Performing second encoding on some or all bits of some or all of the P first sequences to obtain QP first check sequences, where the Q second sequences include the P first sequences and the QP first check sequences.

3. The method according to claim 2, characterized in that The performing second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences includes: Second encoding is performed on all bits of some or all of the P first sequences to obtain the QP first check sequences.

4. The method according to claim 3, characterized in that The length of each first check sequence in the QP first check sequences is equal to the length of one first sequence in the P first sequences.

5. The method according to claim 3 or 4, characterized in that The P bit sequences belong to a first transport block, the size of the first transport block is determined according to R1, 6. The method according to claim 2, characterized in that Each of the P first sequences consists of X subsequences, where X is a positive integer; The performing second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain QP first check sequences includes: Part or all of the P×X subsequences are encoded to obtain the QP first check sequences.

7. The method according to claim 6, characterized in that The lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

8. The method according to claim 6 or 7, characterized in that The P bit sequences belong to a second transport block, the size of the second transport block is determined according to R2, w is less than or equal to m, w is the length of each subsequence in the first X-1 subsequences of each first sequence in the P first sequences, and m is the length of the last subsequence in the X subsequences of each first sequence in the P first sequences.

9. The method according to claim 1, characterized in that Each of the P first sequences is composed of X subsequences, wherein the second encoding is performed on some or all bits of some or all of the first sequences in the P first sequences to obtain Q second sequences, including: Encoding the P first sequences to obtain P third sequences, wherein a p-th third sequence among the P third sequences is obtained by encoding part or all of the X subsequences of the p-th first sequence among the P first sequences, and the p-th third sequence includes the p-th first sequence and a parity bit of the p-th first sequence; All bits of part or all of the P third sequences are encoded to obtain the Q second sequences, where the Q second sequences include the P third sequences and QP second check sequences.

10. The method according to claim 9, characterized in that The length of each second check sequence in the QP second check sequences is equal to the length of one third sequence in the P third sequences.

11. The method according to claim 9 or 10, characterized in that The lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

12. The method according to any one of claims 9 to 11, characterized in that The P bit sequences belong to a third transport block, the size of the third transport block is determined according to R3, The length of each first sequence in the P first sequences is z, and the length of each third sequence in the P third sequences is t.

13. An encoding device, characterized in that: include: a first encoding module, configured to perform a first encoding on P bit sequences to obtain P first sequences, wherein a p-th first sequence among the P first sequences is obtained by performing the first encoding on a p-th bit sequence among the P bit sequences, the p-th first sequence includes the p-th bit sequence and a check bit of the p-th bit sequence, where P is a positive integer and p is a positive integer less than or equal to P; The second encoding module is used to perform second encoding on some or all bits of some or all of the first sequences in the P first sequences to obtain Q second sequences, where Q is a positive integer greater than or equal to P.

14. The device according to claim 13, characterized in that The second encoding module is specifically configured to: Performing second encoding on some or all bits of some or all of the P first sequences to obtain QP first check sequences, where the Q second sequences include the P first sequences and the QP first check sequences.

15. The device according to claim 14, characterized in that The second encoding module is specifically configured to: Second encoding is performed on all bits of some or all of the P first sequences to obtain the QP first check sequences.

16. The device according to claim 15, characterized in that The length of each first check sequence in the QP first check sequences is equal to the length of one first sequence in the P first sequences.

17. The device according to claim 15 or 16, characterized in that The P bit sequences belong to a first transport block, the size of the first transport block is determined according to R1, 18. The device according to claim 14, characterized in that Each of the P first sequences consists of X subsequences, where X is a positive integer; The second encoding module is specifically configured to: Part or all of the P×X subsequences are encoded to obtain the QP first check sequences.

19. The device according to claim 18, characterized in that The lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

20. The device according to claim 18 or 19, characterized in that The P bit sequences belong to a second transport block, the size of the second transport block is determined according to R2, w is less than or equal to m, w is the length of each subsequence in the first X-1 subsequences of each first sequence in the P first sequences, and m is the length of the last subsequence in the X subsequences of each first sequence in the P first sequences.

21. The device according to claim 14, characterized in that Each of the P first sequences consists of X subsequences, wherein the second encoding module is specifically configured to: Encoding the P first sequences to obtain P third sequences, wherein a p-th third sequence among the P third sequences is obtained by encoding part or all of the X subsequences of the p-th first sequence among the P first sequences, and the p-th third sequence includes the p-th first sequence and a parity bit of the p-th first sequence; All bits of part or all of the P third sequences are encoded to obtain the Q second sequences, where the Q second sequences include the P third sequences and QP second check sequences.

22. The device according to claim 21, characterized in that The length of each second check sequence in the QP second check sequences is equal to the length of one third sequence in the P third sequences.

23. The device according to claim 21 or 22, characterized in that The lengths of any two subsequences in at least the first X-1 subsequences of any two first sequences in the P first sequences are equal.

24. The device according to any one of claims 21 to 23, characterized in that The P bit sequences belong to a third transport block, the size of the third transport block is determined according to R3, The length of each first sequence in the P first sequences is z, and the length of each third sequence in the P third sequences is t.

25. A communication device, characterized in that: The method comprises a processing circuit and an input / output interface, wherein the input / output interface is used to input and / or output signals, and the processing circuit is used to execute the method according to any one of claims 1 to 12.

26. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program or instructions, and when the computer program or instructions are run on a computer, the method according to any one of claims 1 to 12 is executed.

27. A computer program product, characterized in that The method comprises a computer program or a code, which implements the method according to any one of claims 1 to 12 when the computer program or the code is executed.

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