Display panel and electronic device

Abstract

The present application discloses a display panel and an electronic device. The display panel comprises a pixel arrangement structure and a multiplexing circuit. By means of multiplexing sub-circuits, sub-pixels are controlled to use different charging modes in different frames, so that the sub-pixels can use different charging modes.

Description

Display panels and electronic devices

[0001] This application claims priority to Chinese patent application No. 202410182036.X filed on February 18, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present application relates to the field of display technology, and in particular to a display panel and an electronic device. Background Art

[0003] Different display panels generally have corresponding pixel arrangement structures, and the pixel arrangement structure is formed by sub-pixels of different colors arranged in certain positions.

[0004] Each sub-pixel needs to be charged before displaying in a frame. If there is a difference in charging between sub-pixels of the same color, it will easily lead to brightness differences, which will appear as vertical stripes. SUMMARY OF THE INVENTION

[0005] The present application provides a display panel and an electronic device to alleviate the technical problem of charging differences caused by using different charging methods for sub-pixels of the same color.

[0006] In a first aspect, the present application provides a display panel, which includes a pixel arrangement structure and a multiplexing circuit. In the pixel arrangement structure, each row of sub-pixels is arranged cyclically with red sub-pixels, green sub-pixels and blue sub-pixels, and each column of sub-pixels is one of red sub-pixels, green sub-pixels and blue sub-pixels; the multiplexing circuit includes a multiplexing sub-circuit, and each multiplexing sub-circuit is connected to two adjacent columns of sub-pixels through a data line to control the corresponding sub-pixels to adopt different charging methods in different frames.

[0007] In a second aspect, the present application provides an electronic device, which includes a terminal and the above-mentioned display panel provided on the terminal. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The following detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings will make the technical solutions and other beneficial effects of the present application apparent.

[0009] FIG1 is a schematic structural diagram of a display panel.

[0010] FIG. 2 is a timing diagram of the display panel shown in FIG. 1 .

[0011] FIG3 is another structural schematic diagram of a display panel.

[0012] FIG. 4 is a timing diagram of the display panel shown in FIG. 3 .

[0013] FIG5 is a schematic structural diagram of a display panel provided in an embodiment of the present application.

[0014] FIG. 6 is a timing diagram of the display panel shown in FIG. 5 . Modes for Carrying Out the Invention

[0015] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0016] In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features. The features specified as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of this application, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0017] The present application provides a display panel, which includes a pixel arrangement structure and a multiplexing circuit. In the pixel arrangement structure, each row of sub-pixels is arranged cyclically with red sub-pixels, green sub-pixels and blue sub-pixels, and each column of sub-pixels is one of red sub-pixels, green sub-pixels and blue sub-pixels; the multiplexing circuit includes a multiplexing sub-circuit, each multiplexing sub-circuit is connected to two adjacent columns of sub-pixels through a data line, so as to control the corresponding sub-pixels to adopt different charging methods in different frames.

[0018] In some embodiments, the two columns of sub-pixels include a first column of sub-pixels and a second column of sub-pixels, and each multiplexing sub-circuit is connected to the first column of sub-pixels and the second column of sub-pixels respectively through data lines located on the same side of the first column of sub-pixels and the second column of sub-pixels, and each multiplexing sub-circuit includes a first transistor and a second transistor, the first electrode of the first transistor is connected to the first column of sub-pixels through the data line; the first electrode of the second transistor is connected to the second column of sub-pixels through the data line, and the second electrode of the second transistor is connected to the second electrode of the first transistor and receives the corresponding data signal; wherein, one of the first transistor and the second transistor is turned on during the pulse duration period of the data signal, and the other of the first transistor and the second transistor is turned on after the pulse duration period of the data signal.

[0019] In some embodiments, different frames include an X frame and a Y frame, and the X frame and the Y frame are consecutive; in the X frame, one of the first transistor and the second transistor is turned on during a pulse duration of the data signal, and the other of the first transistor and the second transistor is turned on after the pulse duration of the data signal; in the Y frame, one of the first transistor and the second transistor is turned on after the pulse duration of the data signal, and the other of the first transistor and the second transistor is turned on during the pulse duration of the data signal; wherein X and Y are both integers greater than or equal to 1.

[0020] In some embodiments, different frames include alternating odd frames and even frames; in the odd frames, the first transistor is turned on during the pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; in the even frames, the first transistor is turned on after the pulse duration of the data signal, and the second transistor is turned on during the pulse duration of the data signal.

[0021] In some embodiments, different frames include alternating odd frames and even frames; in the even frames, the first transistor is turned on during the pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; in the odd frames, the first transistor is turned on after the pulse duration of the data signal, and the second transistor is turned on during the pulse duration of the data signal.

[0022] In some embodiments, in the first frame of the three consecutive frames, the first transistor is turned on during the pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; in the last two frames of the three consecutive frames, the first transistor is turned on after the pulse duration of the data signal, and the second transistor is turned on during the pulse duration of the data signal.

[0023] In some embodiments, in the first two frames of three consecutive frames, the first transistor is turned on during the pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; in the last frame of the three consecutive frames, the first transistor is turned on after the pulse duration of the data signal, and the second transistor is turned on during the pulse duration of the data signal.

[0024] In some embodiments, the display panel includes a first control line, a second control line, and a control circuit, the first control line is connected to the gate of the first transistor in each multiplexing sub-circuit; the second control line is connected to the gate of the second transistor in each multiplexing sub-circuit; the first output end of the control circuit is connected to the first control line, and the second output end of the control circuit is connected to the second control line.

[0025] In some embodiments, the control circuit is a timing controller or a data driver.

[0026] The present application also provides an electronic device, which includes a terminal and the above-mentioned display panel provided on the terminal.

[0027] The display panel and electronic device provided in the present application control each sub-pixel to adopt different charging methods in different frames through a multiplexing sub-circuit, so that each sub-pixel can use a mixture of different charging methods. Compared with the same sub-pixel always using the same charging method in different frames, the mixing of different charging methods for each sub-pixel can reduce the charging differences between each sub-pixel in multiple frames, thereby reducing the brightness difference between each sub-pixel and improving the phenomenon of vertical stripes on the display.

[0028] As an introduction to the embodiments of the present application, a structure of a display panel is now introduced. The arrangement of pixels in the display panel shown in Figure 1 is RGBG, where R represents a red sub-pixel, G represents a green sub-pixel, and B represents a blue sub-pixel. Multiple green sub-pixels can form a column, and red sub-pixels and blue sub-pixels are arranged alternately to form another column.

[0029] Among them, the sub-pixels in the n-1th row are connected to the n-1th scan line, and the n-1th scan line is used to transmit the n-1th scan signal SCAN(n-1); the sub-pixels in the nth row are connected to the nth scan line, and the nth scan line is used to transmit the nth scan signal SCAN(n).

[0030] Under the control of the first control signal Mux1 and the second control signal Mux2, the first data signal DS1 charges the first column of sub-pixels and the second column of sub-pixels from left to right accordingly; similarly, under the control of the first control signal Mux1 and the second control signal Mux2, the second data signal DS2 charges the third column of sub-pixels and the fourth column of sub-pixels from left to right accordingly.

[0031] As shown in Figure 2, after the negative pulse of the n-1th scan signal SCAN(n-1), the scanning of the n-1th row of sub-pixels is completed. Then, the scanning of the nth row of sub-pixels begins: during the period when the negative pulse of the first control signal Mux1 and the positive pulse of the data signal DS arrive synchronously, the data lines connected to the first and third columns of sub-pixels are charged, but the corresponding sub-pixels are not charged. This charging method is called line charging. During the period when the negative pulse of the second control signal Mux2 overlaps with the negative pulse of the nth scan signal SCAN(n), the data signal DS can be charged to the sub-pixels corresponding to the second and fourth columns of sub-pixels. This charging method is called direct charging.

[0032] As can be seen in Figure 1, the red and blue sub-pixels are both charged under the control of the first control signal Mux1, that is, the red and blue sub-pixels are both charged using line charging. The green sub-pixels are all charged under the control of the second control signal Mux2, that is, the green sub-pixels are all charged using direct charging. Because sub-pixels of the same color are charged in the same way, there will be no difference in brightness caused by different first control signals Mux1 or second control signals Mux2 to charge the same sub-pixel.

[0033] The pixel arrangement structure shown in FIG. 1 is mostly used in small-sized display panels.

[0034] Now let's introduce another structure of the display panel. Since the display panel shown in Figure 3 is medium-sized, it mostly adopts a Real-type pixel arrangement structure, that is, each row of sub-pixels is arranged in a cycle of red sub-pixels, green sub-pixels, and blue sub-pixels, and each column of sub-pixels is one of red sub-pixels, green sub-pixels, and blue sub-pixels.

[0035] The first data signal DS1, under the control of the first control signal Mux1 and the second control signal Mux2, charges the first column of sub-pixels and the second column of sub-pixels from left to right accordingly; similarly, the second data signal DS2, under the control of the first control signal Mux1 and the second control signal Mux2, charges the third column of sub-pixels and the fourth column of sub-pixels from left to right accordingly; similarly, the third data signal DS3, under the control of the first control signal Mux1 and the second control signal Mux2, charges the fifth column of sub-pixels and the sixth column of sub-pixels from left to right accordingly.

[0036] As shown in Figure 4, after the negative pulse of the n-1th scan signal SCAN(n-1), the scanning of the n-1th row of sub-pixels is completed. Then, the scanning of the nth row of sub-pixels begins: during the period when the negative pulse of the first control signal Mux1 and the positive pulse of the data signal DS arrive synchronously, the data lines connected to the first column of sub-pixels, the third column of sub-pixels, and the fifth column of sub-pixels are charged, but the corresponding sub-pixels are not charged. This charging method is called line charging. During the period when the negative pulse of the second control signal Mux2 overlaps with the negative pulse of the nth scan signal SCAN(n), the data signal DS can be charged to the sub-pixels corresponding to the second column of sub-pixels, the fourth column of sub-pixels, and the sixth column of sub-pixels. This charging method is called direct charging.

[0037] Among them, for red sub-pixels, the charging method of the first column of sub-pixels is line charging, and the charging method of the fourth column of sub-pixels is direct charging; for green sub-pixels, the charging method of the second column of sub-pixels is direct charging, and the charging method of the fifth column of sub-pixels is line charging; for blue sub-pixels, the charging method of the third column of sub-pixels is line charging, and the charging method of the sixth column of sub-pixels is direct charging.

[0038] From this we can see that the charging methods of sub-pixels of the same color are different. Since the charging effects of different charging methods are different, there will be brightness differences between sub-pixels of the same color due to charging differences, which will appear as vertical stripes.

[0039] In view of this, the present embodiment provides a display panel, as shown in Figures 5 and 6. The display panel includes a pixel arrangement structure 100 and a multiplexing circuit 200. In the pixel arrangement structure 100, each row of sub-pixels is arranged cyclically with red sub-pixels, green sub-pixels, and blue sub-pixels, and each column of sub-pixels is one of red sub-pixels, green sub-pixels, and blue sub-pixels. The multiplexing circuit 200 includes multiplexing sub-circuits 210. Each multiplexing sub-circuit 210 is connected to two adjacent columns of sub-pixels via data lines to control the corresponding sub-pixels to adopt different charging methods in different frames.

[0040] It can be understood that the display panel provided in this embodiment controls each sub-pixel to adopt different charging methods in different frames through the multiplexing sub-circuit 210, so that each sub-pixel can mix different charging methods. Compared with the same sub-pixel always adopting the same charging method in different frames, the sub-pixel mixes different charging methods to reduce the charging difference between each sub-pixel in multiple frames, thereby reducing the brightness difference between each sub-pixel and improving the phenomenon of vertical stripes on the display.

[0041] It should be noted that the charging method can be direct charging or line charging. Line charging refers to pre-charging the data line between the multiplexing sub-circuit 210 and the sub-pixel with the data signal DS. Direct charging refers to charging the data line between the multiplexing sub-circuit 210 and the sub-pixel with the data signal DS and writing the data signal DS to the corresponding sub-pixel.

[0042] In one embodiment, as shown in FIG5 , the two columns of sub-pixels include a first column of sub-pixels and a second column of sub-pixels, and each multiplexing sub-circuit 210 includes a first transistor T1 and a second transistor T2, wherein a first electrode of the first transistor T1 is connected to the first column of sub-pixels through a data line; a first electrode of the second transistor T2 is connected to the second column of sub-pixels through a data line, and a second electrode of the second transistor T2 is connected to the second electrode of the first transistor T1 and receives a corresponding data signal DS.

[0043] It should be noted that, in this embodiment, the first column of sub-pixels may be the odd-numbered columns of sub-pixels from left to right, and the second column of sub-pixels may be the even-numbered columns of sub-pixels from left to right.

[0044] The first electrode can be one of the source and the drain, and the second electrode can be the other of the source and the drain. For example, for the same transistor, if the first electrode is the drain, the second electrode is the source; or if the first electrode is the source, the second electrode is the drain.

[0045] Among them, one of the first transistor T1 and the second transistor T2 is turned on during the pulse duration of the data signal DS, and can charge the corresponding sub-pixel using the line charging method; the other of the first transistor T1 and the second transistor T2 is turned on after the pulse duration of the data signal DS, and can charge the corresponding sub-pixel using the direct charging method. This facilitates switching the charging method in different frames by swapping the waveforms of the first control signal Mux1 and the second control signal Mux2, which can reduce the brightness difference caused by the difference in charging method.

[0046] Each multiplexing sub-circuit 210 is connected to the first column of sub-pixels and the second column of sub-pixels via data lines located on the same side of the first column of sub-pixels and the second column of sub-pixels. For example, each multiplexing sub-circuit 210 is connected to the first column of sub-pixels and the second column of sub-pixels via data lines located to the left of the first column of sub-pixels and the second column of sub-pixels; or each multiplexing sub-circuit 210 is connected to the first column of sub-pixels and the second column of sub-pixels via data lines located to the right of the first column of sub-pixels and the second column of sub-pixels.

[0047] In one embodiment, different frames include an X frame and a Y frame, and the X frame and the Y frame are consecutive. In the X frame, one of the first transistor T1 and the second transistor T2 is turned on during a pulse duration of the data signal DS, and the other of the first transistor T1 and the second transistor T2 is turned on after the pulse duration of the data signal DS. In the Y frame, one of the first transistor T1 and the second transistor T2 is turned on after the pulse duration of the data signal DS, and the other of the first transistor T1 and the second transistor T2 is turned on during the pulse duration of the data signal DS. Wherein, X and Y are both integers greater than or equal to 1.

[0048] It should be noted that frame X may be displayed before frame Y, or frame Y may be displayed before frame X, or at least one frame in frame X and at least one frame in frame Y may be displayed alternately.

[0049] In this embodiment, for the same sub-pixel, charging can be performed using a hybrid charging method of line charging and direct charging in the X frame and the Y frame, respectively. This is beneficial for uniforming the brightness differences of each sub-pixel in consecutive X frames and Y frames, thereby facilitating reducing the brightness differences between each sub-pixel, especially the brightness differences between sub-pixels of the same color.

[0050] In one embodiment, as shown in FIG6 , different frames include alternating odd frames (F1) and even frames (F2); in the odd frames, the first transistor T1 is turned on during the pulse duration of the data signal DS, and the second transistor T2 is turned on after the pulse duration of the data signal DS; in the even frames, the first transistor T1 is turned on after the pulse duration of the data signal DS, and the second transistor T2 is turned on during the pulse duration of the data signal DS.

[0051] It should be noted that, in this embodiment, for the same sub-pixel, it can be charged in odd frames and even frames using a mixed charging method of line charging and direct charging, respectively, which is beneficial for uniforming the brightness differences of each sub-pixel in consecutive frames, and further beneficial for reducing the brightness differences between each sub-pixel, especially the brightness differences between sub-pixels of the same color.

[0052] This embodiment may be an embodiment in which both X and Y are 1.

[0053] In one embodiment, different frames include alternating odd frames and even frames; in the even frames, the first transistor T1 is turned on during the pulse duration of the data signal DS, and the second transistor T2 is turned on after the pulse duration of the data signal DS; in the odd frames, the first transistor T1 is turned on after the pulse duration of the data signal DS, and the second transistor T2 is turned on during the pulse duration of the data signal DS.

[0054] It should be noted that in this embodiment, for the same sub-pixel, a hybrid charging method of line charging and direct charging can be used in odd and even frames, respectively. This helps to even out the brightness differences of each sub-pixel in consecutive frames, thereby helping to reduce the brightness differences between sub-pixels, especially the brightness differences between sub-pixels of the same color. This embodiment can be an embodiment when both X and Y are 1.

[0055] In one embodiment, in the first frame of the three consecutive frames, the first transistor T1 is turned on during the pulse duration of the data signal DS, and the second transistor T2 is turned on after the pulse duration of the data signal DS; in the last two frames of the three consecutive frames, the first transistor T1 is turned on after the pulse duration of the data signal DS, and the second transistor T2 is turned on during the pulse duration of the data signal DS.

[0056] It should be noted that in this embodiment, for the same sub-pixel, a hybrid charging method of line charging and direct charging can be used in the first frame of three consecutive frames and the last two frames of three consecutive frames, respectively. This helps to even out the brightness differences of each sub-pixel in the three consecutive frames, thereby helping to reduce the brightness differences between each sub-pixel, especially the brightness differences between sub-pixels of the same color. This embodiment can be an embodiment when X is 1 and Y is 2.

[0057] In one embodiment, in the first two frames of three consecutive frames, the first transistor T1 is turned on during the pulse duration of the data signal DS, and the second transistor T2 is turned on after the pulse duration of the data signal DS; in the last frame of the three consecutive frames, the first transistor T1 is turned on after the pulse duration of the data signal DS, and the second transistor T2 is turned on during the pulse duration of the data signal DS.

[0058] It should be noted that in this embodiment, for the same sub-pixel, a hybrid charging method of line charging and direct charging can be used in the first two frames of three consecutive frames and the last frame of three consecutive frames, respectively. This helps to even out the brightness differences of each sub-pixel in the three consecutive frames, thereby helping to reduce the brightness differences between each sub-pixel, especially the brightness differences between sub-pixels of the same color. This embodiment can be an embodiment when X is 2 and Y is 1.

[0059] In one embodiment, the display panel includes a first control line, a second control line, and a control circuit, the first control line is connected to the gate of the first transistor T1 in each multiplexing sub-circuit 210; the second control line is connected to the gate of the second transistor T2 in each multiplexing sub-circuit 210; the first output end of the control circuit is connected to the first control line, and the second output end of the control circuit is connected to the second control line.

[0060] It should be noted that the first control line is used to transmit the first control signal Mux1. The second control line is used to transmit the second control signal Mux2. The first control line can simultaneously turn off or on all first transistors T1 in the multiplexing circuit 200 via the first control signal Mux1; the second control line can simultaneously turn off or on all second transistors T2 in the multiplexing circuit 200 via the second control signal Mux2. Compared to connecting different transistors to separate control lines, this can reduce the number of control lines.

[0061] The channel type of the first transistor T1 may be the same as the channel type of the second transistor T2. For example, both the first transistor T1 and the second transistor T2 are P-channel thin film transistors or N-channel thin film transistors.

[0062] In one embodiment, the control circuit is a timing controller or a data driver. It is understandable that the first control signal Mux1 and the second control signal Mux2 of the multiplexing circuit 200 can be in the timing controller or the data driver, which not only improves the integration but also is more conducive to improving the timing coordination with the data signal DS.

[0063] 5 , the first column of sub-pixels and the second column of sub-pixels from left to right share the first data signal DS1; the third column of sub-pixels and the fourth column of sub-pixels from left to right share the second data signal DS2; and the fifth column of sub-pixels and the sixth column of sub-pixels from left to right share the third data signal DS3.

[0064] In one embodiment, this embodiment provides an electronic device, which includes a terminal and the above-mentioned display panel provided in the terminal.

[0065] It can be understood that since the electronic device provided in this embodiment includes the above-mentioned display panel, it can also control each sub-pixel to adopt different charging methods in different frames through the multiplexing sub-circuit 210, so that each sub-pixel can mix different charging methods. Compared with the same sub-pixel always adopting the same charging method in different frames, the sub-pixel mixes different charging methods to reduce the charging differences between each sub-pixel in multiple frames, thereby reducing the brightness difference between each sub-pixel and improving the phenomenon of vertical stripes on the display.

[0066] The pixel arrangement structure 100 of the display panel is not limited to the Real-type pixel arrangement structure 100 provided in this application, and may also be other applicable pixel arrangement structures 100 .

[0067] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0068] The above is a detailed introduction to the display panel and electronic device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, comprising: A pixel arrangement structure in which each row of sub-pixels is cyclically arranged with red sub-pixels, green sub-pixels, and blue sub-pixels, and each column of sub-pixels is one of red sub-pixels, green sub-pixels, and blue sub-pixels; A multiplexing circuit includes multiplexing sub-circuits, each of which is connected to two adjacent columns of sub-pixels via data lines to control the corresponding sub-pixels to adopt different charging modes in different frames.

2. The display panel according to claim 1, wherein The two columns of sub-pixels include a first column of sub-pixels and a second column of sub-pixels. Each of the multiplexing sub-circuits is connected to the first column of sub-pixels and the second column of sub-pixels via a data line located on the same side of the first column of sub-pixels and the second column of sub-pixels, respectively. Each of the multiplexing sub-circuits includes: a first transistor, wherein a first electrode of the first transistor is connected to the first column of sub-pixels via a data line; a second transistor, wherein a first electrode of the second transistor is connected to the second column of sub-pixels via a data line, and a second electrode of the second transistor is connected to the second electrode of the first transistor and receives a corresponding data signal; One of the first transistor and the second transistor is turned on during a pulse duration of the data signal, and the other of the first transistor and the second transistor is turned on after the pulse duration of the data signal.

3. The display panel according to claim 2, wherein: When one of the first transistor and the second transistor is turned on during the pulse duration of the data signal, the corresponding sub-pixel is charged in a line charging manner; when the other of the first transistor and the second transistor is turned on after the pulse duration of the data signal, the corresponding sub-pixel is charged in a direct charging manner.

4. The display panel according to claim 2, wherein: The different frames include an X frame and a Y frame, and the X frame and the Y frame are sequentially continuous; In the X frame, one of the first transistor and the second transistor is turned on during a pulse duration of the data signal, and the other of the first transistor and the second transistor is turned on after the pulse duration of the data signal; In the Y frame, one of the first transistor and the second transistor is turned on after a pulse duration of the data signal, and the other of the first transistor and the second transistor is turned on during a pulse duration of the data signal; Wherein, X and Y are both integers greater than or equal to 1.

5. The display panel according to claim 4, wherein: The different frames include alternating odd-numbered frames and even-numbered frames; In the odd-numbered frame, the first transistor is turned on during a pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; In the even frame, the first transistor is turned on after a pulse duration of the data signal, and the second transistor is turned on during a pulse duration of the data signal. The display panel according to claim 4 , wherein: The different frames include alternating odd-numbered frames and even-numbered frames; In the even frame, the first transistor is turned on during a pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; In the odd-numbered frame, the first transistor is turned on after a pulse duration of the data signal, and the second transistor is turned on during a pulse duration of the data signal.

7. The display panel according to claim 4, wherein: In a previous frame of three consecutive frames, the first transistor is turned on during a pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; In the latter two frames of the three consecutive frames, the first transistor is turned on after a pulse duration of the data signal, and the second transistor is turned on during a pulse duration of the data signal.

8. The display panel according to claim 4, wherein: In first two frames of three consecutive frames, the first transistor is turned on during a pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; In a subsequent frame of the three consecutive frames, the first transistor is turned on after a pulse duration of the data signal, and the second transistor is turned on during a pulse duration of the data signal.

9. The display panel according to any one of claims 1 to 8, wherein: The display panel includes: a first control line connected to a gate of a first transistor in each of the multiplexing sub-circuits; a second control line connected to a gate of a second transistor in each of the multiplexing sub-circuits; A control circuit, wherein a first output end of the control circuit is connected to the first control line, and a second output end of the control circuit is connected to the second control line.

10. The display panel according to claim 9, wherein: The first control line is used to transmit a first control signal, and the second control line is used to transmit a second control signal; the first control line simultaneously turns off or turns on all first transistors in the multiplexing circuit through the first control signal, and the second control line simultaneously turns off or turns on all second transistors in the multiplexing circuit through the second control signal.

11. The display panel according to claim 9, wherein: The control circuit is a timing controller or a data driver.

12. An electronic device comprising a terminal and a display panel provided on the terminal, wherein the display panel comprises: A pixel arrangement structure in which each row of sub-pixels is cyclically arranged with red sub-pixels, green sub-pixels, and blue sub-pixels, and each column of sub-pixels is one of red sub-pixels, green sub-pixels, and blue sub-pixels; A multiplexing circuit includes multiplexing sub-circuits, each of which is connected to two adjacent columns of sub-pixels via data lines to control the corresponding sub-pixels to adopt different charging modes in different frames.

13. The electronic device according to claim 12, wherein: The two columns of sub-pixels include a first column of sub-pixels and a second column of sub-pixels. Each of the multiplexing sub-circuits is connected to the first column of sub-pixels and the second column of sub-pixels via a data line located on the same side of the first column of sub-pixels and the second column of sub-pixels, respectively. Each of the multiplexing sub-circuits includes: a first transistor, wherein a first electrode of the first transistor is connected to the first column of sub-pixels via a data line; a second transistor, wherein a first electrode of the second transistor is connected to the second column of sub-pixels via a data line, and a second electrode of the second transistor is connected to the second electrode of the first transistor and receives a corresponding data signal; One of the first transistor and the second transistor is turned on during a pulse duration of the data signal, and the other of the first transistor and the second transistor is turned on after the pulse duration of the data signal.

14. The electronic device according to claim 13, wherein: The different frames include an X frame and a Y frame, and the X frame and the Y frame are sequentially continuous; In the X frame, one of the first transistor and the second transistor is turned on during a pulse duration of the data signal, and the other of the first transistor and the second transistor is turned on after the pulse duration of the data signal; In the Y frame, one of the first transistor and the second transistor is turned on after a pulse duration of the data signal, and the other of the first transistor and the second transistor is turned on during a pulse duration of the data signal; Wherein, X and Y are both integers greater than or equal to 1.

15. The electronic device according to claim 14, wherein The different frames include alternating odd-numbered frames and even-numbered frames; In the odd-numbered frame, the first transistor is turned on during a pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; In the even frame, the first transistor is turned on after a pulse duration of the data signal, and the second transistor is turned on during a pulse duration of the data signal.

16. The electronic device according to claim 14, wherein The different frames include alternating odd-numbered frames and even-numbered frames; In the even frame, the first transistor is turned on during a pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; In the odd-numbered frame, the first transistor is turned on after a pulse duration of the data signal, and the second transistor is turned on during a pulse duration of the data signal.

17. The electronic device according to claim 14, wherein: In a previous frame of three consecutive frames, the first transistor is turned on during a pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; In the latter two frames of the three consecutive frames, the first transistor is turned on after a pulse duration of the data signal, and the second transistor is turned on during a pulse duration of the data signal.

18. The electronic device according to claim 14, wherein In first two frames of three consecutive frames, the first transistor is turned on during a pulse duration of the data signal, and the second transistor is turned on after the pulse duration of the data signal; In a subsequent frame of the three consecutive frames, the first transistor is turned on after a pulse duration of the data signal, and the second transistor is turned on during a pulse duration of the data signal.

19. The electronic device according to any one of claims 12 to 18, wherein: The display panel includes: a first control line connected to a gate of a first transistor in each of the multiplexing sub-circuits; a second control line connected to a gate of a second transistor in each of the multiplexing sub-circuits; and A control circuit, wherein a first output end of the control circuit is connected to the first control line, and a second output end of the control circuit is connected to the second control line.

20. The electronic device according to claim 19, wherein The control circuit is a timing controller or a data driver.

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