Method for manufacturing a light-emitting display device, light-emitting display device

Abstract

One aspect of the invention relates to a method for manufacturing a light-emitting display device including a step of forming a plurality of pixels, each pixel comprising a lower electrode, a support element supporting the lower electrode, an upper electrode and an active element arranged between the lower and upper electrodes, which comprises forming, on a surface of a substrate, support elements and lower electrodes of the pixels, each support element having a height and at least one dimension, referred to as differentiation dimension, in a plane parallel to the plane of the substrate, each differentiation dimension being measured in a differentiation direction and being strictly less than the corresponding dimension of the lower electrode that it supports, the height of the support element being strictly greater than the sum of the thickness of the active element and the thickness of the upper electrode.

Description

DESCRIPTION TITLE: METHOD FOR MANUFACTURING AN ELECTROLUMINESCENT DISPLAY DEVICE, ELECTROLUMINESCENT DISPLAY DEVICE TECHNICAL FIELD OF THE INVENTION

[0001] The technical field of the invention is that of optoelectronic devices and components and more particularly that of matrix display devices with organic electroluminescent layers.

[0002] The present invention relates to a method for manufacturing an electroluminescent display device of the OLED (Organic Light-Emitting Diodes) type.

[0003] The present invention finds an advantageous application for the production of display screens for electronic objects, and in particular for the production of high-resolution color display screens. The expression "high resolution" designates pixels with a size of less than 15 pm. TECHNOLOGICAL BACKGROUND OF THE INVENTION

[0004] In the field of matrix display devices with organic electroluminescent layers, OLED type matrix displays are known which have pixels smaller than 15 pm, typically between 4 pm and 12 pm.

[0005] When this type of matrix display is in color, each pixel is subdivided into subpixels of different colors (typically three, with the colors red, green and blue) which cooperate to make the pixel emit the desired color. Each subpixel is an elementary light source and has a size of less than 10 pm, for example 2 pm or 6 pm.

[0006] Each sub-pixel is generally formed by several superimposed layers, including a lower electrode (the anode) deposited on a common substrate, several organic layers (at least one of which is emissive) forming an OLED stack on each lower electrode, and an upper electrode (the cathode).

[0007] Documents FR3079909A1 and US2023 / 0041252A1 describe structures for forming OLED pixels (or OLED sub-pixels) of such small size with improved industrial reliability.

[0008] These structures have the common advantage of allowing a soft discretization of the OLED stack and the cathode to form the pixels (or sub-pixels). The term "soft discretization" refers to a structuring process that preserves the performance of the OLED stack.

[0009] In particular, the proposed solutions consist of carrying out the discretization of the OLED stack other than with masking and removal steps which, generally, require environments (humidity, temperature above 90°C, solvents, ultraviolet, etc.) which are harmful to organic materials.

[0010] Document FR3079909 A1 describes a first OLED display device in which the lower electrodes of each sub-pixel are separated from each other by an insulating wall rising vertically from the substrate. Each wall acts as a separator between two neighboring sub-pixels.

[0011] This same document FR3079909 describes a second device in which the insulating walls are replaced by trenches in which an insulating layer is deposited.

[0012] The insulating walls and trenches are formed before the OLED stack is deposited by thermal evaporation and play the same role. Since the evaporation deposition technique is predominantly directive, the OLED stack is preferentially deposited on the horizontal walls of the device, and not on the side walls of the insulating walls or trenches. The OLED stack is thus broken (or discretized) at the insulating walls or trenches.

[0013] However, the directivity of the OLED stack deposition is never complete in practice. Organic particles can also be deposited on the side walls of insulating walls or trenches. However, these particles are undesirable because they degrade the insulation (electrical, optical) between the sub-pixels. Neighboring sub-pixels can then interact with each other, for example by capacitive coupling or by parasitic currents. These phenomena, known as cross-talk, lead to a degradation of the performance of the display device. These phenomena are exacerbated when the sub-pixels are diodes. so-called “tandem” organic electroluminescents, i.e. when the sub-pixels comprise several OLED stacks stacked and connected in series using interconnection layers.

[0014] Document US2023 / 0041252A1 provides a solution to this problem by describing sub-pixel separators that are arranged on a substrate and have a mushroom-shaped structure (or "hang-over" according to the English terminology used in this document). More specifically, this mushroom structure comprises a lower part having oblique sides, forming the foot of the mushroom. It also comprises an upper part, of greater width than that of the lower part, which masks a region of the substrate. This upper part forms the cap of the mushroom.

[0015] The subpixels are formed once the mushroom structures are in place. The OLED stack is then deposited on these structures and broken at the upper parts. The breaking of the OLED stack is achieved with satisfactory reliability since no organic particles can be deposited on the region of the substrate masked by the upper part or on the side walls of the mushroom structure (the lower part is not accessible from the top because it is hidden by the upper part). Thus, the degree of directionality of the OLED stack deposition is of little importance.

[0016] These mushroom structures are, however, particularly complex to produce and not very compact (vertically, they have a height of around 1 pm). In addition, the production of the common cathode requires the use of specific equipment to produce a deposit oriented at the desired angle. This involves depositing a conductive layer under the upper part of the mushroom structures, at a very specific angle determined by the inclination of the sides of the lower parts. It is therefore not easy, nor economically advantageous, to deploy such a manufacturing process.

[0017] Therefore, there is still a need for a manufacturing process for an OLED display device with improved resolution that is less expensive and simpler to implement. SUMMARY OF THE INVENTION

[0018] The invention provides a solution to the problems mentioned above, by making it possible to discretize the OLED stack and the cathode using separation structures integrated into the lower electrodes of the pixels (these often being the anodes of these pixels). For this, the invention makes it possible to produce pixels each having a lower electrode support element of smaller section than the lower electrode that it supports and which is sized according to the cumulative thickness of the OLED stack and the cathode.

[0019] A first aspect of the invention relates to a method for manufacturing an electroluminescent device comprising a step of forming a plurality of pixels on a substrate, the pixels being separated from each other along at least one so-called differentiation direction included in a plane of the substrate, each pixel comprising a lower electrode, a support element supporting the lower electrode, an upper electrode and an active element arranged between the lower and upper electrodes, said step of forming the pixels comprising the following successive sub-steps: Formation, on a surface of the substrate, of the support elements and the lower electrodes of the pixels, the lower electrodes being separated from each other, each support element having a height and at least one dimension, called differentiation dimension, in a plane parallel to the plane of the substrate, each differentiation dimension being measured along a differentiation direction and being strictly less than the corresponding dimension of the lower electrode that it supports, the height of the support element being strictly greater than the sum of the thickness of the active element and the thickness of the upper electrode, Deposition over the entire surface of the substrate of a first stack of organic layers, from which results the active elements of the pixels, separated from each other according to said at least one direction of differentiation and arranged on the lower electrodes of the pixels, the first stack of organic layers being configured to generate a first radiation, Deposition, over the entire surface of the substrate, of a transparent conductive layer, from which results the upper electrodes of the pixels, separated from each other according to said at least one direction of differentiation and arranged on the active elements of the pixels.

[0020] The term "transparent" means having an optical transmission coefficient greater than 60% for at least one wavelength in the 400-800 nm spectral band.

[0021] The use of a bottom electrode support element in each pixel allows each bottom electrode to be raised above the substrate. Since this elevation (produced by the height of the support element) is greater than the combined thickness of the OLED stack and the top electrode, the active elements and top electrodes of the pixels are well separated from residual deposits on the substrate, even when the materials of the OLED stack and the top electrode are deposited on the peripheral side surface of the bottom electrodes. This allows for a better display device and simplifies its fabrication, since even an imperfectly directive full-wafer deposition technique can be used to form the active elements and top electrodes of the pixels.

[0022] Furthermore, thanks to the (lateral) differentiation dimension specified for each support element, the lower electrode of each pixel has in at least one direction (in this case, the at least one differentiation direction) an overhanging character with respect to the underlying support element. This overhanging character makes it possible to make invisible (when placed above the device) regions of the substrate located at the base of the support element and according to the at least one differentiation direction. These regions are therefore inaccessible from the top of the device. This ensures that no deposition of organic or conductive layers will be carried out in these regions when the active elements and the upper electrodes are formed.In other words, the lateral extension made by the lower electrodes of the pixels above the support elements (along the at least one differentiation direction) allows that the residual deposits on the substrate (between the pixels) do not touch the base of the support elements. The support elements, and consequently the pixels to which they belong, are therefore effectively isolated from each other along the at least one differentiation direction.

[0023] Finally, since the discretization of the active elements and the upper electrodes of the pixels is achieved using the overhanging lower electrodes, it is not necessary to provide separation elements between the pixels. This reduces, compared to prior art solutions, the number of steps to be implemented. The manufacturing process is thus simpler and faster to implement.

[0024] In addition to the characteristics which have just been mentioned in the preceding paragraph, the manufacturing method according to the first aspect of the invention may have one or more additional characteristics among the following, considered individually or according to all technically possible combinations: Each support element has a single differentiation dimension and a dimension measured in a direction, called non-differentiation, secant to the direction of measurement of the differentiation dimension, the dimension measured in the non-differentiation direction being equal to or greater than the corresponding dimension of the lower electrode that said support element supports. Alternatively, each support element has a first differentiation dimension measured along a first differentiation direction, and a second dimension measured along a second differentiation direction secant to the first differentiation direction. When the support element of each pixel has a first and a second differentiating dimension, each support element may include a peripheral side surface disposed recessed from a peripheral side surface of the lower electrode that it supports. The minimum withdrawal distance between said peripheral lateral surface of the support element and the peripheral lateral surface of the lower electrode supported by said support element may then be strictly greater than 100 nm. According to a first embodiment, the sub-step of forming the support elements and the lower electrodes of the pixels comprises the sub-steps of: Providing a multilayer structure comprising the substrate, a dielectric layer disposed on the substrate, a first conductive layer disposed on the dielectric layer and conductive vias passing through the dielectric layer, each conductive via connecting the first conductive layer to a conductive pad of the substrate, Formation of an etching mask on the first conductive layer, Etching, through the mask, of the first conductive layer to obtain the lower electrodes of the pixels, each lower electrode being connected to a conductive via, Etching the dielectric layer, isotropically and selectively relative to the first conductive layer, so as to form the support elements of the lower electrodes of the pixels, each support element comprising a conductive via. Preferably, said dielectric layer is partially etched, resulting in each support element comprising a conductive via and a portion of said dielectric layer surrounding the conductive via. According to this first embodiment, when the support element of each pixel comprises a differentiation dimension and a non-differentiation dimension, the sub-step of forming the support elements and the lower electrodes of the pixels further comprises, between the etching operation of the first conductive layer and the etching operation of the dielectric layer, an operation of filling, with a dielectric material, each space separating two neighboring lower electrodes arranged according to the non-differentiation direction, the filling operation comprising a creep of the dielectric material configured to form an excess thickness of the dielectric material overflowing on the lower electrode of each pixel. Said dielectric material may be polymer-based or an inorganic dielectric material, preferably an inorganic dielectric material chosen from the following materials: silicon dioxide or SiC>2, silicon nitride or SiN, aluminum oxide or AI2O3. According to a second embodiment, the sub-step of forming the support elements and the lower electrodes of the pixels comprises the following operations: Providing a multilayer structure comprising the substrate, a dielectric layer disposed on the substrate, a first conductive layer disposed on the dielectric layer, a second conductive layer disposed on the first conductive layer and conductive vias passing through the dielectric layer, each conductive via connecting the first conductive layer to a conductive pad of the substrate, the first and second conductive layers being formed of different conductive materials, Formation of an etching mask on the second conductive layer, Etching, through the mask, the first and second conductive layers to obtain a plurality of conductive patterns separated from each other, each conductive pattern being connected to a conductive via, Partial etching of the first conductive layer, isotropically and selectively with respect to the second conductive layer, the lower electrodes of the pixels being delimited in the second conductive layer and the support elements being delimited in the first conductive layer. According to this second embodiment, when the support element of each pixel comprises a differentiation dimension and a non-differentiation dimension, the sub-step of forming the support elements and the lower electrodes of the pixels further comprises, between the etching operation of the first conductive layer and the etching operation of the dielectric layer, an operation of filling, with a dielectric material, each space separating two neighboring lower electrodes arranged in the non-differentiation direction, the filling operation comprising a flow of the dielectric material configured to form an excess thickness of the dielectric material overflowing onto the lower electrode of each pixel. Said dielectric material may be polymer-based, such as a resin, or an inorganic dielectric material, preferably an inorganic dielectric material chosen from the following materials: silicon dioxide or SiC>2, silicon nitride or SiN, aluminum oxide or AI2O3. After the pixel formation step, and regardless of the embodiment, the manufacturing method may include a step of depositing a passivation layer on the edges of the pixels and on the substrate. The deposition of the passivation layer can be carried out using a conformal deposition technique, preferably an atomic layer deposition technique. When the manufacturing process includes the step of depositing the passivation layer, the height of each support element may be strictly greater than the sum of the thicknesses of the passivation layer, the active element and the upper electrode. After the step of depositing a passivation layer, the method may comprise a step of replacing only part of the pixels to form a group of pixels configured to generate a second radiation distinct from the first radiation, said replacement step comprising the following successive sub-steps: Formation of a first mask to expose the pixels of said part and protect the other pixels, Successive etching, through the first mask, of the passivation layer, of the upper electrode and of the first stack of organic layers of the pixels of said part, Removing the first mask, Deposition, on the surface of the substrate, of a second stack of organic layers configured to emit the second radiation, from which result the active elements of the pixels of said group, Deposition, on the surface of the substrate, of an additional conductive and transparent layer, from which result the upper electrodes of the pixels of said group, Deposition of a passivation layer on the edges of the pixels, Formation of a second mask to protect the pixels of said part and expose the other pixels, Etching, through the second mask, of the passivation layer deposited on the contours of the pixels of said group, of the additional conductive and transparent layer, and second stack of organic layers, Removing the second mask. After the step of depositing the passivation layer on the edges of the pixels and the substrate, the manufacturing process may comprise a step of forming an electrode common to all the pixels comprising the following sub-steps: Filling the free space between pixels with a dielectric material, Etching the passivation layer to obtain openings on the pixels, each opening giving access to the upper electrode of one of the pixels, Deposition of a conductive and transparent material in the openings and between the openings. The dielectric material deposited in the openings and between the openings during the filling substep of the common electrode forming step may be a permanent resin, preferably an optically absorbent permanent resin. A permanent resin is, for example, a resin selected from the following resins: SU-8(TD) Kayaku Advanced Materials, TELR(TD) TOK, or CFPR BK(TD) series TOK. The common electrode can be made of aluminum-doped zinc oxide (AZO). The filling sub-step can be configured to form an excess thickness of the dielectric material between the pixels and overflowing onto the pixels.

[0025] Another aspect of the invention relates to an electroluminescent display device comprising a plurality of pixels arranged on a substrate and separated from each other in at least one direction, called the differentiation direction, included in a plane of the substrate, each pixel comprising a lower electrode, a support element supporting the lower electrode, a transparent upper electrode and an active element arranged between the lower and upper electrodes, the active element of each pixel comprising a part of a stack of organic layers, and in which each support element is at least partly conductive and has: At least one dimension, called the differentiation dimension, each differentiation dimension being measured in a plane parallel to the plane of the substrate along one or more of the differentiation directions, each differentiation dimension being strictly less than the corresponding dimension of the lower electrode that it supports, and A height strictly greater than the sum of the thickness of the active element and the thickness of the upper electrode arranged on said lower electrode.

[0026] According to a variant, the support element of each pixel can have a single differentiation dimension and a dimension measured in a direction, called non-differentiation, secant to the direction of measurement of the differentiation dimension, the dimension measured in the non-differentiation direction being equal to or greater than the corresponding dimension of the lower electrode that said support element supports.

[0027] Alternatively, the support element of each pixel has a first differentiation dimension measured along a first differentiation direction, and a second differentiation dimension, measured along a second differentiation direction secant to the first differentiation direction.

[0028] Preferably, the support element of each pixel comprises a pillar of dielectric material and a conductive through-via located within the pillar of dielectric material.

[0029] Preferably, the support element of each pixel is a solid conductive pillar formed of a metallic material.

[0030] Preferably, the active element of each pixel (40) is formed from a stack of organic layers configured to emit a first radiation. Thus, the electroluminescent display device is monochrome.

[0031] Alternatively, the pixels are divided into first, second and third groups of pixels, the active element of each pixel of the first group being formed from a stack of organic layers configured to generate the first radiation, the active element of each pixel of the second group being formed from a stack of organic layers configured to generate a second radiation distinct from the first radiation, and the active element of each pixel of the third group being formed from a stack of organic layers configured to generate a third radiation distinct from the first radiation and distinct from the second radiation. Thus, the electroluminescent display device is a color device.

[0032] Preferably, the minimum withdrawal distance measured along each differentiation direction between the peripheral lateral surface of the support element and the peripheral lateral surface of the lower electrode supported by said support element is strictly greater than 100 nm.

[0033] The invention and its various applications will be better understood by reading the following description and examining the accompanying figures. BRIEF DESCRIPTION OF THE FIGURES

[0034] The figures are presented for information purposes only and in no way limit the invention. Figures 1 to 20 represent in sectional view steps and sub-steps of a first embodiment of a method for manufacturing an electroluminescent display device according to the invention, Figure 21 shows a top view corresponding to the electroluminescent display device shown in Figure 5, Figure 22 shows a top view corresponding to the electroluminescent display device shown in Figure 11, and Figures 23A to 31A, 23B to 31B and 23C to 31C represent, respectively in cross-sectional view along line AA, in cross-sectional view along line BB and in top view, steps and sub-steps of a second embodiment of the method for manufacturing an electroluminescent display device according to the invention.

[0035] Unless otherwise specified, the same element appearing in different figures has a single reference. DETAILED DESCRIPTION

[0036] The present invention aims to improve the manufacturing methods of organic electroluminescent display devices with improved resolution, also called OLED micro-displays (for “Organic Light-Emitting Diodes” in English), and more specifically, the pixel separation phase.

[0037] In the following description, the term "pixel" means a sub-pixel, that is to say the smallest element composing a pixel of the electroluminescent display device.

[0038] The pixels preferably have lateral dimensions of less than 15 pm, preferably between 5 pm and 1 pm, for example equal to 3 pm. In top view, they advantageously have a square shape. The size of the pixels will hereinafter designate the side of the square.

[0039] The present invention thus relates to a method of manufacturing an electroluminescent display device which comprises a step of forming a matrix of pixels on a substrate, where each pixel comprises a lower electrode support element which makes it possible to physically separate the pixels, simply and reliably, without creating crosstalk between the pixels.

[0040] According to a first embodiment E, the method for manufacturing an electroluminescent display device is used to produce the electroluminescent display device 1 (also referred to as “device 1” hereinafter) of which an enlargement of a sectional view is shown schematically in Figure 5, or to produce the electroluminescent display device T (also referred to as “device 1'” hereinafter), a variant of the device 1 shown in Figure 5 and of which an enlargement of a sectional view is shown schematically in Figure 20.

[0041] Device 1 and its variant T both have the same top view, illustrated in Figure 21.

[0042] It is noted that the sectional view shown in figures 5 and 11 corresponds indifferently to the cross-section through line AA shown in figure 21 or to the cross-section through line BB shown in this same figure 21.

[0043] The substrate 11 has an upper surface 11 a (see figures 5 and 21), more simply referred to as “surface 11 a of the substrate 11”. It extends in a plane {X,Y} which defines the plane of the substrate 11.

[0044] The directions and dimensions will subsequently be designated according to this plane {X,Y} of the substrate.

[0045] The term "lateral" designates a direction included in the plane of the substrate 11 or in a plane parallel to the plane of the substrate 11, while the term "vertical" designates a direction along a Z axis perpendicular to the plane {X,Y} of the substrate. The terms "height" and "thickness" refer to dimensions measured perpendicular to the plane {X,Y} of the substrate, i.e. along the Z axis. Finally, the terms "length" and "width" refer to dimensions measured in a plane parallel to the plane {X,Y} of the substrate.

[0046] The substrate 11 is advantageously a specialized circuit or ASIC (for “Application Specific Integrated Circuit”) of the CMOS (for “Complementary Metal Oxide Semiconductor) type. In this case, the substrate 11 is opaque and therefore advantageously suitable for manufacturing a top-emitting electroluminescent display device. In the remainder of the description, the terms “transparent” and “opaque” refer to an element which, for at least one wavelength of the 400-800 nm spectral band, has an optical transmission coefficient respectively greater than 60%, and less than or equal to 60%.

[0047] Note that the substrate 11 can alternatively be made with amorphous silicon, polycrystalline silicon and / or deposited on a glass plate. In this case, the substrate 11 can be transparent and therefore suitable for manufacturing a bottom-emitting electroluminescent display device.

[0048] The substrate 11 comprises an addressing circuit 111 configured to address the pixels 40. With reference to FIG. 5, this substrate 11 also comprises an insulating layer 113 which may be an oxide, a nitride or an oxynitride. This insulating layer 113 is for example formed from silicon nitride (SiN). The substrate 11 finally comprises a plurality of contact pads 112 arranged through the insulating layer 113.

[0049] These contact pads 112 are formed from a conductive material. They are spaced apart from each other and open onto the surface 11a of the substrate 11. They make it possible to make electrical contact between each pixel 40 and the addressing circuit 111.

[0050] The pixels 40 are arranged with a first repetition pitch along a first direction included in the plane {X,Y} of the substrate 11 and with a second repetition pitch along a second direction intersecting the first direction.

[0051] In the example of Figure 21, the first direction and the second direction are respectively, here, the X direction and the Y direction of the plane ((X,Y} of the substrate 11. The first and the second repetition pitch can be equal.

[0052] In the remainder of the description, a row of pixels 40 designates the pixels which are aligned along the first direction X, while a column of pixels designates the pixels which are aligned along the second direction Y.

[0053] Advantageously, the 40 pixels all have an identical shape and dimensions (within manufacturing tolerances).

[0054] As shown in Figures 5 and 21, the pixels 40 of the device 1 are spaced (or separated, or even differentiated) from each other in the two directions X and Y. These two directions are then respectively called “first direction of differentiation X” and “second direction of differentiation Y”.

[0055] In other words, each pixel 40 of the device 1 is physically spaced from all its neighboring pixels, that is to say from the neighboring pixels arranged on the same row of the matrix M1 m (see figure 21) as this pixel and from the neighboring pixels arranged on the same column as this pixel.

[0056] As shown in Figure 5, each pixel 40 of the device 1 comprises: A lower electrode 41, A support element 42 which carries (or supports, or even supports) the lower electrode 41, An upper electrode 44, and An active element 43 disposed between the lower electrode and the upper electrode.

[0057] The lower electrode 41 of each pixel 40 is formed from a conductive layer 13. This conductive layer 13 is advantageously reflective for a “top-emitting” type electroluminescent display device. The term “reflective” designates a surface or element which has, for at least one wavelength of the 400-800 nm spectral band, an optical reflection coefficient greater than 60%.

[0058] Referring to Figure 5, the lower electrode 41 has a lower face 41a and an opposite upper face 41b.

[0059] The lower electrode 41 also has a peripheral lateral surface 41 d connecting the lower and upper faces 41 a, 41 b. The peripheral lateral surface 41 d defines the lateral outer limit (or contour) of this lower electrode 41.

[0060] The lower electrode 41 finally has, in a plane parallel to the plane {X,Y} of the substrate, a surface, or section, which can take different shapes (square, circular, rectangular, etc.). Depending on the section shape chosen, the lower electrode 41 has one or more dimensions measured in the plane of the substrate 11. These dimensions are more simply noted “dimensions of the lower electrode 41” hereinafter.

[0061] In Figure 5, the section of the lower electrode 41 is here square in shape. The peripheral lateral surface 41 d is then made up of four facets corresponding to the four lateral faces (also called peripheral edges hereinafter) 41 c of the lower electrode 41. In the sectional view of Figure 5, two of these side walls 41 c are visible.

[0062] The section of the lower electrode 41 corresponds substantially to the emission surface of the pixel 40. For high-resolution display devices, this surface is advantageously less than 5x5 pm 2 , preferably between 5x5 pm 2 and 1x1 pm 2 , and for example equal to 3x3 pm 2 .

[0063] As shown in Figure 5, the lower electrode 41 is electrically connected to one of the contact pads 112 of the substrate 11.

[0064] The active element 43 of each pixel 40 is arranged on the upper face 41a of the lower electrode 41. As shown in FIG. 5, the active element 43 generally also covers the side walls 41c of the lower electrode 41.

[0065] The active element 43 comprises, in its simplest configuration, a portion of a stack 431 of organic layers comprising an emissive OLED layer when a voltage is applied between the lower and upper electrodes 41, 44. The radiation emitted by the active element 43 depends on the configuration of the stack 431 of organic layers. This radiation may be white in color or an equivalent red, green or blue color.

[0066] In the example of Figure 5, the active element 43 of the pixel 40 is here formed by a first stack 431 of organic layers configured to emit a first radiation. This first radiation has for example a spectrum located mainly in the blue, that is to say a spectrum extending in a range of wavelengths between 430 nm and 490 nm.

[0067] The active element 43 may alternatively comprise several emissive layers for a so-called tandem OLED structure (not shown in FIG. 5). In this case, the OLED stack forming the active element 43 comprises a stack of organometallic layers comprising, typically, two emissive OLED layers arranged one on top of the other and separated by organic functional layers of the charge transport, charge injection and / or charge generation type. In the following description, for the sake of simplicity, the term “stack of organic layers” will refer to a stack of organic layers or a stack of organometallic layers.

[0068] From the above, the device 1 is monochrome, since all the active elements 43 of this device 1 are configured to emit the same first radiation.

[0069] The active element 43 has a thickness denoted e43 in FIG. 5. This thickness e43 of the active element 43 is preferably between 100 nm and 200 nm.

[0070] The upper electrode 44 of each pixel 40 covers the active element 43 (on its upper face and, preferably, also on its sides) and terminates (from the top) the pixel 40. The active element 43 and the upper electrode 44 thus form a stack 4344 on the lower electrode 41. This stack 4344 has a thickness which is equal to the sum of the thickness e43 of the active element 43 arranged on the lower electrode 41 and the thickness e44 of the upper electrode 44 (see FIG. 5).

[0071] The upper electrode 44 is formed from a transparent conductive layer 441, whether the lower electrode 41 is opaque or reflective (for a "top-emitting" type electroluminescent display device).

[0072] The support element 42 of the lower electrode of the pixel supports the lower electrode 41 of the pixel. In other words, the support element 42 is a connecting element between the substrate 11 and the lower electrode 41 which ensures the maintenance of the lower electrode 41 on the surface 11 a of the substrate 11. The lower electrode 41 is therefore not in direct contact with the surface 11 a of the substrate 11.

[0073] The support element 42 is at least partly conductive, so that it also has the function of making an electrical connection between the lower electrode 41 and the contact pad 112 of the substrate 11 located below.

[0074] In Figure 5, the support element 42 of the pixel 40 here comprises a pillar of dielectric material 12 enclosing a through-conductor via 14. The presence of a pillar of dielectric material in the support element 42 makes it possible to improve the maintenance, from a mechanical point of view, of the lower electrodes 41 on the substrate 11.

[0075] Alternatively, the support element 42 of each pixel 40 only comprises the through via 14 (this configuration is not shown in the figures).

[0076] The support member 42 has a base and a top and a peripheral side surface 42d that extends between the base and the top. Generally, the base of the support member 42 is joined to the surface 11a of the substrate 11, and its top is joined to the lower electrode 41.

[0077] The support element 42 further has: A height t which is strictly greater than the thickness of the stack 4344 on the lower electrode 41 (i.e. a height t which is strictly greater than the cumulative thickness e43+e44 of the active element 43 and the upper electrode 44), and A first and a second dimension d42x, d42Y, called differentiation, measured in a plane parallel to the plane {X,Y} of the substrate 11 respectively according to the first and second differentiation direction X,Y, which are each strictly less than the corresponding dimension of the lower electrode 41 that the support element 42 supports.

[0078] The term "corresponding dimension of the lower electrode 41" refers to the dimension of the lower electrode 41 measured along the same measurement direction as the differentiating dimension of the support member 42.

[0079] In other words, the first differentiation dimension d42x of the support element is strictly less than the dimension of the corresponding lower electrode 41, measured along the X direction. The second differentiation dimension d42Y of the support element is strictly less than the dimension of the corresponding lower electrode 41, measured along the Y direction.

[0080] Thus, the section of the support element 42, considered in a plane parallel to the plane {X,Y} of the substrate 11 is strictly smaller than the section of the lower electrode 41. This allows a portion of the lower electrode 41 to extend laterally beyond the support element 42 both in the first differentiation direction X and in the second differentiation direction Y. In other words, the lower electrode 41 overhangs its support element 42.

[0081] In Figure 5, the support element 42 is here shown with an identical section over the entire height of the support element 42 (d42x=d42Y). Concretely, the section may have a certain variability along the height of the support element 42, while remaining strictly smaller than the section of the lower electrode 41 which is supported by the support element 42. For example, it may have a rounded and concave profile.

[0082] As shown in Figure 5, the device 1 also comprises residual deposits R431-44 arranged on the surface 11a of the substrate, between the lower electrodes 41 arranged in the first and second differentiation directions X and Y. These residual deposits R431-44 are made up of the materials of the stack 4344 on the lower electrode 41. Indeed, these residual deposits R431-44 are formed at the same time as the active elements 43 and the upper electrodes 44, since the materials of the active elements and the upper electrodes are deposited from the top and over the entire surface 11a of the substrate 11, according to a directional physical deposition method (e.g. evaporation type), in other words having a preferential deposition direction.

[0083] Thanks to the section chosen for the support elements 42 (which produces the overhanging character of each lower electrode 41 with respect to the underlying support element 42), it is ensured that these residual deposits R431-44 do not extend to the support elements 42 (they are not formed on the regions 20A of the substrate 11 which are masked by the overhanging lower electrodes 41, cf. Figure 5). This allows the support elements 42, and therefore the pixels 40 to which they belong, to be effectively isolated from each other, here in each direction of differentiation X and Y.

[0084] Furthermore, thanks to the height t chosen for the support elements 42, these residual deposits R431-44 do not touch either the active elements 43 or the upper electrodes 41, even when these cover the peripheral side wall 41d of the lower electrodes 41. This makes it possible to improve the reliability of the discretization of the layers 431, 13 of the materials forming the active elements and the upper electrodes.

[0085] It should be noted, furthermore, that since the height t of the support elements is a function of the cumulative thickness of the materials arranged on the lower electrodes, it can be dimensioned as necessary (i.e. neither too high nor too small). The height t is, for example, equal to 200 nm, for a pixel height strictly less than 1 pm, for example between 500 nm and 700 nm.

[0086] Thus, the support elements 42 make it possible to reliably separate the pixels without impacting the height of the final display device. In addition, the support elements 42 make it possible to dispense with the separation elements described in the prior art. The electroluminescent display device is thus both better made and simpler, and therefore faster, to manufacture.

[0087] In order to take into account the variability of manufacturing processes, and to further improve the reliability of pixel separation, the device may advantageously have one or more of the characteristics described below.

[0088] The support element 42 may be entirely arranged under the lower electrode 41 (see FIG. 5). In other words, the peripheral lateral surface 42d of the support element 42 is set back from the peripheral lateral surface 41d of the lower electrode 41. Thus, the region 20A of the substrate 11 which is masked by the projecting portion of the lower electrode 41 surrounds the entire base of the support element 42. This makes it possible to obtain electrical insulation between the support elements 42.

[0089] The minimum setback distance r between the peripheral lateral surface 42d of the support element 42 and the peripheral lateral surface 41d of the lower electrode 41 may be strictly greater than 100 nm. This ensures that no material 431, 13 of the active elements 43 and of the upper electrodes is not deposited on the peripheral lateral surface 42d of the support elements 42.

[0090] Device T, an alternative embodiment of device 1 which has just been described, is detailed below in relation to figure 20.

[0091] As shown in Figure 20, the device T differs from the device 1 illustrated in Figure 5, only in that the materials which constitute its lower electrodes 41 and its support elements 42 are different from those which constitute the lower electrodes 41 and the support elements 42 of the device 1 shown in Figure 5.

[0092] According to this variant of the device 1, the support element 42 of each pixel 40 consists of a solid conductive pillar, formed from a metallic material 13. This metallic material will be described in more detail in relation to the description of a step ET of forming the pixels 40 of the manufacturing method.

[0093] The support elements 42 therefore have, according to this variant T, the same characteristics as those described in relation to the device 1 illustrated in figure 5. These support elements 42 therefore produce here the same effects as those described in relation to the device 1 represented in figure 5, namely naturally and easily separating each pixel from its neighboring pixels arranged according to the first and second direction X, Y of differentiation.

[0094] Finally, it is noted that the device T represented in figure 20 is a monochrome device, like the device 1 represented in figure 5. Indeed, the active element 43 of each pixel 40 of the device 1' is identical (in its nature, its shape, its dimensions) to the active element 43 of the device 1 represented in figure 5.

[0095] A first development of device 1 is described below in relation to figure 6.

[0096] As shown in Figure 6, this first development relates to a device 1 i comprising the device 1 shown in Figure 5 and a passivation layer 50 shaped to the pixels 40 and to the surface 11 a of the substrate 11 of this device 1 (i.e. the passivation layer 50 is continuous and follows the outer limits or contours of the pixels 40 and of the substrate 11 ). Thus, the pixels 40 are encapsulated, and therefore protected from the external environment, by the passivation layer 50.

[0097] Naturally, this first development applies alternatively to the device 1' shown in Figure 20. In this configuration, the device 11' obtained (not shown in the figures) differs from that shown in Figure 6 only by the nature of the support element 42 and the lower electrode 41 of each pixel 40. In particular, the support element 42 of each pixel 40 of the device 11', alternative to the device 11 shown in Figure 6, is made up of the solid conductive pillar 42, 13 illustrated in Figure 20.

[0098] Whatever the nature of the support elements and the lower electrodes, when the pixels 40 are thus encapsulated, the height t of the support element 42 is advantageously strictly greater than the cumulative thickness 643+644+650 (also noted e43445o) of the active element 43, of the lower electrode 41 and of the passivation layer 50. The support elements 42 are thus dimensioned as a function of all the layers of materials arranged on the lower electrodes 41. This makes it possible to ensure that the pixels 40 are well separated from each other when the passivation layer is present.

[0099] Preferably, the height t of the support element 42 is greater than or equal to 1.2 times this cumulative thickness 643+644+650 of the active element 43, of the lower electrode 41 and of the passivation layer 50.

[0100] More preferably, the height t of the support element 42 is greater than or equal to 1.5 times this cumulative thickness 643+644+650 of the active element 43, of the lower electrode 41 and of the passivation layer 50.

[0101] The distance D42 between two neighboring support elements 42 (see FIG. 6), defined as the distance between a side wall of the first support element 42 and the side wall of the second support element 42 located opposite, is preferably strictly greater than twice the thickness 6434450 of the stack formed by the active element 43, the upper electrode 44 and the passivation layer of the first or second support element 42. This makes it possible to ensure with good reliability that two neighboring stacks on the lower electrodes 41 do not touch each other directly.

[0102] Furthermore, like the height t of the support elements 42, this distance D42 can be dimensioned as precisely as possible. This makes it possible to bring the pixels 40 closer together. The pixel density, and therefore the display resolution of the device 1, is then not limited by a minimum distance required between the pixels (it can be, on the other hand, by the addressing circuit of the substrate 11).

[0103] Figure 11 shows a sectional view of a device 12 according to a second development of the device 1 shown in Figure 5.

[0104] As shown in Figure 11, the device I2 according to this second development is a color device 12. This device I2 differs from the monochrome device 1 shown in Figure 6 in that the stack of organic layers which forms the active element 43 of each pixel differs from one pixel to another.

[0105] In Figure 11, the color I 2 device has three adjacent pixels noted, starting from the left in Figure 11, 40(V), 40(B) and 40(R).

[0106] The central pixel 40(B) is here formed from the stack of organic layers 431 previously described in relation to figure 5, and is therefore blue in color.

[0107] In addition, pixel 40(V) is formed from a stack of organic layers 432 configured to generate a second radiation, in a wavelength range between 490 m and 590 nm. This pixel 40(V) is therefore green here.

[0108] Finally, the pixel 40(R) is formed from a stack of organic layers 433 configured to generate a third radiation in a wavelength range between 600 μm and 700 nm. This pixel 40(R) is therefore a red-colored pixel.

[0109] This arrangement by group of three pixels 40(V), 40(B), 40(R) of green, blue and red color respectively makes it possible to form a white color by superimposing the color radiation. Each group of three pixels 40(V), 40(B), 40(R) advantageously has a surface which is less than 15x15 pm 2 , preferably between 8x8 pm 2 and 4x4 pm 2 , and for example equal to 6x6 pm 2 .

[0110] In addition, the use of a stack of organic layers 431, 432, 433 configured to generate radiation in the spectral band corresponding to the color is particularly interesting compared to pixels provided with a colored filter because the luminous efficiency of each pixel is higher.

[0111] Figure 22 shows a top view of the color device I2 (in this case of the matrix M1 c of color pixels of this device I 2).

[0112] As shown in Figure 22, the arrangement by series of three pixels of green, blue and red colors is repeated throughout the entire 12 color device. In this example, there is a repetition of three adjacent columns, the first column having green pixels, the second having blue pixels and the third having blue pixels. The pixels are, as in devices 1 and T, all separated from each other. Note that each color pixel (green, blue, red) here has a rectangular shape preferably having a ratio equal to 3:1 between its length (along the second direction Y) and its width (along the first direction X). Thus, each group of three pixels of green, blue and red colors is square in shape.

[0113] The color device 12 shown in Figures 11 and 22 thus comprises a first group G1 of pixels 40 (B) which are all blue color pixels 40 (B), a group G2 of pixels 40 (V) which are all green color pixels 40 (V), and a group of pixels 40 (R) which are all red color pixels 40 (R).

[0114] Naturally, the number of pixel groups can be different from 3 and / or the arrangement of each of these groups G1, G2, G3 can vary.

[0115] It should be noted that the color device I 2 comprises a passivation layer 52 of the same nature as the passivation layer 50 previously described in relation to FIG. 6, and which is also shaped to the pixels 40(V), 40(B) and 40(R) and to the surface of the substrate 11 (see FIG. 11).

[0116] Naturally, this second development also concerns the device T shown in Figure 20. In this configuration, the 1'2 color device obtained (not shown in sectional view by the figures) differs from that shown in Figure 11 only by the nature of the support element and the lower electrode of each pixel 40 (the support element 42 is then constituted by the solid metal conductive pillar 42, 13 illustrated in Figure 20). It is noted that Figure 22 is also a sectional view of the 1'2 color device alternative to the 1'2 color device.

[0117] According to a second embodiment S, the method for manufacturing an electroluminescent display device is used to produce the electroluminescent display device 2 (also referred to as “device 2” hereinafter) of which an enlargement of a top view is shown schematically in FIG. 29C.

[0118] Figures 29A and 29B respectively represent a cross-sectional view along the section plane AA (see figure 29C) and a sectional view along the section plane BB (see figure 29C) of the device 2 shown in figure 29C.

[0119] The device 2 illustrated in Figures 29A to 29C differs from the devices 1, 1' according to the first embodiment of the manufacturing method, illustrated in Figures 5 and 20, in that the support element 42 of each pixel 40 has a single differentiation dimension d42x instead of two (d42x, d42y).

[0120] More precisely, the support element 42 of each pixel 40 of the device 2 according to the second mode S of implementation of the manufacturing method differs from that of each pixel of the device 1 in that it has: A single dimension of differentiation among the two directions X and Y of arrangement of the pixels 40 (in the example represented by figures 29A, 29B and 29C, this is the first direction X, the dimension of differentiation being noted d42x). A so-called non-differentiation dimension measured along the other direction Y which is equal to the corresponding dimension of the lower electrode 41 which it supports.

[0121] As shown in Figure 29A, the differentiation dimension d42x of the support element 42 of each pixel 40 of the device 2 is specified in the same way as the first differentiation dimension described in relation to Figure 5. Thus, the differentiation dimension d42x of the support element 42 of each pixel 40 is strictly less than the corresponding dimension of the lower electrode 42 that this support element 42 supports. Thus, in the differentiation direction X, the lower electrode of each pixel 40 projects beyond the support element that supports it.

[0122] This overflow can advantageously have a minimum dimension, called withdrawal, greater than or equal to 100 nm.

[0123] More generally, the fact that the support element 42 has at least one differentiating dimension allows a portion of the lower electrode 41 that it supports to protrude laterally from the support element 42 in the direction in which the differentiating dimension is measured. Tl

[0124] As shown in Figure 29B, the support element 42 of each pixel 40 of the device 2 is connected to the support element of the neighboring pixel, arranged in the non-differentiation direction Y, by a pattern 120 formed of a dielectric material 80. This dielectric material 80 may be a polymer-based material (for example a resin) or an inorganic dielectric material chosen from the following materials: silicon dioxide or SiC>2, silicon nitride or SiN, aluminum oxide or AI2O3.

[0125] In addition, the active elements 43 and the upper electrodes 44 of these neighboring pixels 40 arranged in the non-differentiation direction Y are connected to each other, respectively, by the first stack 431 of organic layers and the material 441 forming the upper electrodes 44 (in other words, there is an active element and an upper electrode common to all the pixels 40 arranged in the second direction Y).

[0126] The use of a single differentiation dimension of the support element of each pixel allows the pixels 40 to be physically separated from each other along this single differentiation direction X. This allows, as illustrated in FIG. 29C, to separate only the pixels 40 belonging to the same row of the pixel matrix 40. In this case, the pixels of the same column of the pixel matrix 40 are connected to each other.

[0127] The device 2 has the advantage of being faster to manufacture than the electroluminescent display devices 1 according to the first mode of implementation of the manufacturing method.

[0128] In Figures 29A and 29B, the support element 42 here has the same characteristics (nature of the materials constituting it, height t) as those of the support element 42 of each pixel 40 of the device T represented in Figure 20.

[0129] The second mode S of implementation of the manufacturing method also makes it possible to obtain a device 2' (not shown in the figures), an alternative to the device 2. The device 2' then differs from the device 2 which has just been described only in that its support elements 42 are of the same nature (formed from the same materials) as those described in relation to the device 1 shown in Figure 5. In other words, this variant 2' of the device 2 therefore differs from the device 2 shown in Figures 29A, 29B and 29C only in that the support element 43 of each pixel 40 comprises the dielectric pillar 12 and the conductive through via 14 shown in Figure 5.

[0130] Note that devices 2 and 2' are monochrome, like devices 1 and T.

[0131] A first development 2i of the device 2 is represented by figures 30A, 30B and 30C. As shown in these figures, this development is analogous to that 1i described previously in relation to the device 1 (see figure 6), in that the device 2i comprises the device 2 and the passivation layer 50 shaped to the pixels 40 and to the surface of the substrate of the device 2.

[0132] A second development 22 of the device 2 is shown in Figure 31 A, Figure 31 B and Figure 31 C. In these figures, the device 2 concerned is that shown in Figures 29A, 29B and 29C. Naturally, the device 2 concerned can alternatively be the variant 2' of the device 2 described previously, in which the support element of each pixel comprises the dielectric pillar 12 and the conductive through via 14.

[0133] The second development is analogous to that described in relation to device 1 (see figures 11 and 22). Indeed, the device 22 according to the second development comprises the three groups G1, G2, G3 of pixels of different colors (blue, green, red) described previously in relation to figure 11. The device 22 is therefore a color device.

[0134] In Figure 31 C, each column of pixels is here made up of pixels of the same color (pixels 40(V) or pixels 40(B) or pixels 40(B)). As shown in Figure 31 B, the stack of organic layers arranged between the pixels of the same column is here the stack of organic layers 433 configured to generate the radiation of equivalent red color.

[0135] It is noted that the device 22 comprises a passivation layer 52 of the same nature as the passivation layer 50 described previously in relation to FIG. 6, and which is shaped to the pixels 40 and to the surface of the substrate.

[0136] The first mode E of implementation of the manufacturing process is described below in relation to figures 1 to 20.

[0137] Step E1 of forming the pixels making it possible to form the device 1 shown in Figure 5 is described below in relation to Figures 1 to 5.

[0138] Step E1 of forming the pixels 40 begins with a sub-step E11, illustrated in FIG. 1, of providing a multilayer structure 10.

[0139] This multilayer structure 10 comprises the substrate 11 described previously in relation to FIG. 5, a dielectric layer 12, a first conductive layer 13 and conductive vias 14.

[0140] The dielectric layer 12 is arranged on the surface 11a of the substrate 11. It is formed, for example, of silicon dioxide (SiC).

[0141] As will be described below, the dielectric layer 12 will be structured to form a part of the support elements 42. Also, its thickness ei2 corresponds to the desired thickness t for the support elements 42.

[0142] The first conductive layer 13 is arranged on the dielectric layer 12. It is intended, in this first embodiment, to form the lower electrodes 41 of the pixels 40. It is therefore advantageously reflective or semi-reflective in the spectral band [400 nm - 800 nm] for an electroluminescent display device of the “top emission” type.

[0143] In Figure 5, the first conductive layer 13 is here formed from a single layer of a metallic material or a metallic alloy.

[0144] The first conductive layer 13 may alternatively comprise several stacked sub-layers. Each sub-layer is then formed from a different metallic material or metallic alloy.

[0145] The metallic material(s) (or metallic alloys) used to form the first conductive layer 13 all have the property of being resistant to the etching chemistry of the material of the dielectric layer 12.

[0146] When this dielectric material is SiC>2, the first conductive layer 13 can be formed from a metallic material, a conductive metal alloy. For example, the first conductive layer can be based on aluminum (Al), copper-aluminum alloy (AlCu), chromium (Cr) or even silver (Ag). Alternatively, the first layer 13 can be formed from a transparent conductive oxide (or TCO, for “Transparent Conductive Oxide” in English) to produce a “bottom emission” type electroluminescent display device.

[0147] Preferably, the first conductive layer 13 is based on AlCu. It has a thickness e (see figure 1), which is for example of the order of 200 nm.

[0148] The conductive vias 14 are vertical conductive structures which pass through the dielectric layer 12. Each conductive via 14 connects the first conductive layer 12 to one of the contact pads 112 of the substrate 11. The conductive vias 14 are typically formed by etching the dielectric layer 12 (after its deposition on the substrate 11) and filling with a metal, before the deposition of the first conductive layer 13.

[0149] The sub-step E11 of providing the multilayer structure 10 is followed by a sub-step E12, illustrated in FIG. 2, which consists of delimiting the lower electrodes 41 of the pixels 40 in the first conductive layer 13.

[0150] More precisely, the lower electrodes 41 are delimited by carrying out the following successive operations: Deposition of an etching mask on the first conductive layer 13, Dry etching, through this etching mask, of the first conductive layer 13 with a stop on the dielectric layer 12, Removal of the etching mask deposited on the first conductive layer 13.

[0151] The dry etching operation is typically an anisotropic physical etching, i.e. an etching carried out in a preferential direction (called the etching direction) perpendicular or substantially perpendicular to the {X,Y} plane of the substrate (90° +- 5°).

[0152] The etching mask deposited on the first conductive layer 13 is structured so that the lower electrodes 41 are spaced from each other and arranged in a line (along the first differentiation direction X) and in a column (along the second differentiation direction Y), and also, so that they have the desired shape and size and so that each lower electrode 41 is connected to one of the contact pads 112 of the substrate 11. As shown in Figure 2, this connection is here made by means of a through via 14 associated with this contact pad 112.

[0153] This etching mask is advantageously structured so that the lower electrodes 41 have the same shape and dimensions.

[0154] At the end of sub-step E12, the rows and columns of the matrix M1 m of pixels (see figure 21) are defined. They correspond to the rows and columns of the lower electrodes 41 formed.

[0155] In Figure 2, it is observed that the dielectric layer 12 is slightly etched between the formed lower electrodes (in the regions denoted 12A). This etching of the dielectric layer is typically linked to the fact that, in practice, the etching stop is not carried out exactly on the upper surface of the dielectric layer 12.

[0156] The sub-step E12 of delimiting the lower electrodes 41 is followed by a sub-step E13, illustrated in FIG. 3, of delimiting the support elements 42.

[0157] Sub-step E13 comprises for this purpose a step of etching the dielectric layer 12, isotropically and selectively with respect to the first conductive layer 13, until reaching the surface 11a of the substrate 11. The insulating layer 113 of the substrate 11 acts here as an etching stop layer. The step of etching the dielectric layer 12 is for example carried out at room temperature and in a humid environment based on hydrofluoric acid (HF), the HF concentration being between 0.1% and 2%.

[0158] Since the etching of the dielectric layer 12 is carried out from the trenches made, in the previous sub-step E12, between the lower electrodes 41, the peripheral side wall 41d of these lower electrodes 41 is not altered. On the other hand, cavities 30 are created in line with the trenches and under the lower electrodes 41 which make it possible to form the support elements 42 described previously.

[0159] The etching of the dielectric layer 12 is advantageously partial to obtain the support elements 42 shown in FIG. 3. Each support element 42 then comprises a pillar of dielectric material enclosing one of the through vias 14. The presence of a pillar of dielectric material in the support element support 42 makes it possible to improve the maintenance, from a mechanical point of view, of the lower electrodes 41 on the substrate 11.

[0160] As shown in Figure 3, each lower electrode 41 forms a plate which overhangs the support element 42 which supports it.

[0161] The etching of the dielectric layer 12 can alternatively be total (not shown). Each support element 42 is then constituted by one of the through vias 14. The regions 20A of the substrate 11 which are masked (from the top) by the lower electrodes 41 are then enlarged compared to a partial etching.

[0162] Whether the etching of the dielectric layer 12 is partial or total, the support elements 42 make it possible, in addition to performing a support function, to make the electrical connection between the lower electrodes 41 and the contact pads 112 of the substrate 11.

[0163] The following sub-steps E14 and E15 aim to complete the formation of the pixels.

[0164] Sub-step E14 is illustrated in FIG. 4. It comprises the deposition of the first stack 431 of organic layers according to a physical deposition method, for example an evaporation deposition method (or PVD for “Physical Vapor Deposition” according to the commonly used English terminology). The organic materials forming this first stack 431 are deposited in a full plate layer, that is to say over the entire surface 11a of the substrate 11.

[0165] As the lower electrodes 41 overhang the support elements 42, each organic layer of this first stack 431 is discretized at the tops of the lower electrodes 41 and between the support elements 42.

[0166] As shown in Figure 4, the active elements 43 are thus obtained, separated from each other and arranged on the upper surface 41 b of the lower electrodes 41 . The residual deposits R431 are also obtained on the regions of the substrate 11 located between two neighboring lower electrodes 41 . These residual deposits R431 are therefore present within the rows within the columns defined during the sub-step E11. Each residual deposit R431 is constituted by the materials of the first stack 431 of organic layers.

[0167] Although the physical deposition process is directional, each active element 43 can also cover the peripheral lateral surface 41 d of the lower electrodes 41 (see regions marked Z1 in figure 4).

[0168] As explained previously in relation to Figure 5, the section and height t of the support elements 42 allow the support elements 42 are well insulated from each other and that the active elements 43 are well separated from each other, despite residual deposits R431.

[0169] Sub-step E15 is illustrated in Figure 5. It follows step E14 and comprises the deposition of a conductive and transparent layer 441 from the top and over the entire surface 11a of the substrate 11. Preferably, this deposition is carried out according to a physical deposition method similar to that used in sub-step E13. This is, for example, an evaporation deposition method (or PVD for “Phase Vapor Deposition” in English).

[0170] The conductive and transparent layer 441 can be a thin layer, with a thickness e44 of between 5 nm and 100 nm, of aluminum (Al), silver (Ag), or chromium (Cr).

[0171] It may, alternatively, be based on a conductive and transparent material chosen (but not limited to) from the following materials: Poly(3,4-ethylenedioxythiophene) (or PEDOT), indium-tin oxide (or ITO for "Indium Tin Oxide" in English), tin dioxide (SnO2), zinc oxide (ZnO) or aluminum-doped zinc oxide (or AZO).

[0172] Thanks to the section and the height t chosen for the support elements 42, which is strictly greater than the cumulative thickness of the first stack 431 of organic layers and of the conductive layer 441 forming the upper electrodes 44, the conductive and transparent layer 441 is discretized on and between the active elements 43, despite the residual deposits R431-44. These residual deposits R431-44 are present between the support elements 42. They are made up of the materials of the first stack 441 of organic layers and of the material of the conductive and transparent layer 441.

[0173] At the end of this sub-step E15, we therefore obtain the device 1 described previously in relation to figure 5.

[0174] It is noted that, as the first stack 431 of organic layers is common to all the lower electrodes 41 of the pixels 40, the pixels 40 are, at this stage of the method, all configured to emit the same first radiation.

[0175] The step ET of forming the pixels making it possible to form the device T represented in Figure 20 is described below in relation to Figures 17 to 20.

[0176] This step ET is an alternative to step E1 (illustrated in FIGS. 1 to 5). It differs from this step E1 in that the support elements 42 are formed in a conductive layer and not in the dielectric layer 12.

[0177] With reference to figure 17, the step ET of forming the pixels 40 begins with a sub-step E1T of providing a multilayer structure 10' comprising an additional conductive layer 15 compared to the multilayer structure 10 illustrated in figure 1.

[0178] Specifically, as illustrated in Figure 17, the multilayer structure 10' comprises: The substrate 11, A dielectric layer 12 arranged on the substrate 11, A first conductive layer 13 arranged on the dielectric layer 12, A second conductive layer 15 arranged on the first conductive layer 13, The conductive vias 14 pass through the dielectric layer 12, each conductive via connecting the first conductive layer 13 to a conductive pad 112 of the substrate 11.

[0179] The second conductive layer 15 will be structured to form the lower electrodes 41 while the first conductive layer 13 will be structured to form the support elements 42.

[0180] Thus, the first conductive layer 13 has a thickness e strictly greater than the expected cumulative thickness of the active element 42 and the upper electrode 44 (see Figure 20).

[0181] The first and second conductive layers 13, 15 are formed from different conductive materials, so as to allow selective etching of the first conductive layer 13 relative to the second conductive layer 14.

[0182] For example, the first conductive layer 13 is based on AICu and the second conductive layer 15 comprises two sub-layers 151 and 152, the lower sub-layer being based on titanium nitride (TiN) and the upper sub-layer being based on tin oxide (SnO2).

[0183] Sub-step E1 T is followed by a sub-step E12' illustrated in figure 18.

[0184] Sub-step E12' comprises the formation of an etching mask (not shown in FIG. 18) on the second conductive layer 15.

[0185] Then, sub-step E12' comprises etching, through the etching mask deposited on the second conductive layer 15, the first and second conductive layers 13, 15 to obtain a plurality of conductive patterns 410 separated from each other.

[0186] Preferably, the etching of sub-step E12' is anisotropic (i.e. carried out according to a preferential etching direction perpendicular to the plane {X,Y} of the substrate 11).

[0187] As shown in Figure 18, each conductive pattern 410 is connected to at least one of the conductive vias 14 of the initial multilayer structure 10', shown in Figure 17.

[0188] An etching sub-step E13', illustrated in figure 19, is then implemented from the spaces (or trenches) located between the conductive patterns 410. This involves a partial etching of the first conductive layer 13, isotropically and selectively with respect to the second conductive layer 15 so as to obtain the support elements 42.

[0189] The support elements 42 then consist, in this second embodiment, of a conductive pillar, formed from the material of the first conductive layer 13.

[0190] With reference to Figure 20, deposition sub-steps E14' and E15' are then performed to finalize the pixels 40. These steps E14' and E15' are identical to the deposition steps E14 and E15 illustrated respectively by Figures 4 and 5, in that they consist respectively of depositing in full plate the first 431 stack of organic layers (sub-step E14') then in depositing in full plate the conductive and transparent layer 441.

[0191] Whatever the steps E1, ET implemented to form the pixels 40, the manufacturing method E according to the first embodiment advantageously continues with the steps E2, E3, E4 and E5 to form a color electroluminescent display device, or, more simply, with the steps E2, E4 and E5 (the step E3 is not necessary) to form a monochrome electroluminescent display device.

[0192] These steps are illustrated in Figures 6 to 16, starting from device 1 illustrated in Figure 5. Naturally, they can alternatively be implemented in the same way, starting from the variant of device 1, illustrated in Figure 20.

[0193] Step E2 is illustrated in Figure 6. It makes it possible to manufacture the device 11 shown in Figure 6. It consists of depositing, in a conformal manner, the passivation layer 50 on the substrate 11 and on the periphery of the pixels 40. A conformal deposition technique by atomic thin layer deposition (or pure ALD “Atomic Layer Deposition” in English) is preferably used.

[0194] The passivation layer 50 is formed from a material that acts as a barrier to oxygen. For example, it is formed from alumina or SiO2. The passivation layer 50 thus makes it possible to protect the active elements 43 from the external environment, since it prevents the organic layers of these active elements 43 from coming into contact with oxygen (they are particularly sensitive to this element).

[0195] Since oxygen barrier materials are also insulating materials, the encapsulation layer 50 is also electrically insulating. This therefore makes it possible to coat the outer boundaries of the pixels with an electrically insulating layer.

[0196] Step E3, illustrated in relation to figures 7 to 11, is optional. It makes it possible to manufacture the device 12 shown in figure 11. Step E3 thus aims to form the three groups G1, G2, G3 of different colors (see figure 11) at from the pixels 40 formed with the first stack 431 of organic layers, during step E1. The expression “color pixel” is, as detailed previously, understood as a pixel whose active element is formed from a stack of organic layers configured to emit radiation having a narrow spectrum, with a width between 60 nm and 100 nm, centered on one of the wavelengths of the visible spectrum 400 nm-800 nm corresponding to the desired color.

[0197] Step E3 is iterative: the second group G2 of pixels 40(V) is formed from a first group G1 of pixels 40(B) corresponding to the pixels 40 formed with the first stack 431 of organic layers. Then, the third group G3 of pixels 40(R) is formed from the second group of pixels.

[0198] In other words, step E3 consists of replacing only part of the pixels of the first group G1 to form the second group G2 of pixels configured to generate the second radiation, then replacing only part of the pixels of the second group G2 to form the third group G3 of pixels configured to generate the third radiation, the first, second and third radiation being distinct (they have distinct spectra).

[0199] With reference to Figures 7 to 9, we begin by forming the second group G2 of pixels from the pixels formed with the first stack 431 of organic layers.

[0200] To do this, we first determine the pixels of the second group G2 (see figure 7) among the pixels formed with the first stack 431 of organic layers.

[0201] Preferably, two pixels out of three adjacent pixels are selected to belong to the second group G2. The unselected pixels form the first group of pixels G1. They have the color corresponding to the first radiation generated by the first stack 431 of organic layers (in the example chosen, this color is blue, noted “(B)” in the figures).

[0202] Then, during an operation E31 illustrated in figure 7, we first form a first mask (not shown in figure 7) which covers the unselected pixels (i.e. the pixels of the first group G1) and exposes the selected pixels (i.e. the pixels of the second group G2).

[0203] Then, an operation is carried out to remove the stacks 431 of organic layers present on the lower electrodes of the pixels of the second group G2. For this, successive etchings are carried out, through the first mask, of the passivation layer 50, the upper electrodes 44 and the active elements 43 of the pixels of the second group G2, until the lower electrodes 41 of these pixels of the second group G2 are reached.

[0204] By successive engravings, we mean: A first etching of the passivation layer 50, A second etching of the conductive and transparent layer 441, A third, isotropic, etching of the stacks 431 of organic (or organometallic) layers of the active elements 43.

[0205] It is noted that the pixels (of the first group G1) protected by the first mask are not damaged by the first, second and third etchings. Indeed, the sides of these pixels are always covered on their sides, and therefore protected, by the passivation layer 50.

[0206] Finally, the first mask is removed.

[0207] Figure 7 illustrates the device obtained at the end of this step E31: the lower electrodes 41 of the pixels of the second group G2 are free, therefore ready to receive a new active element and a new upper electrode. The unselected pixels 40(B) (of the first group G1) are intact.

[0208] The following operations E32, E33 and E34 are shown in Figure 8.

[0209] The operation E32 consists of forming an active element 43 on the lower electrodes 41 of the pixels of the second group G2. These active elements 43 are formed from a second stack 432 of organic layers configured to emit radiation different from the first radiation. For example, since the first radiation here corresponds to an equivalent blue color, a second stack 432 of organic layers configured to generate radiation of equivalent green color is chosen (the spectrum of this radiation is between 490 nm and 590 nm). This green color is indicated by the reference “(V)” in the figures.

[0210] The operation E32 of forming these active elements 43 of the pixels 40(V) of the second group G2 is analogous to the method implemented during the substep E14 described previously to form the active elements 43 with the first 431 stack of organic layers. Thus, a full-plate deposition (over the entire surface 11a of the substrate 11 of the second stack 432 of organic layers) of the second stack 432 of organic layers is carried out.

[0211] Operation E33 consists of forming an upper electrode 44 on each newly formed active element 43. For this, a deposit is made over the entire surface of the substrate of a transparent conductive layer 442 which is preferably of the same nature as the transparent conductive layer 441 described in relation to FIG. 5.

[0212] As shown in Figure 8, the second stack 432, the upper electrodes 44 are discretized on and between the lower electrodes 41 of the pixels of the second group G2 and on the pixels of the first group G1.

[0213] Operation E34 consists of encapsulating the pixels of the second group G2. For this, a passivation layer 51 is formed in a conformal manner on the edges of the pixels of the second group and the pixels of the first group G1 as well as on the surface 11a of the substrate 11. The passivation layer 51 is of the same nature as the passivation layer 50 formed in step E2, illustrated in FIG. 6.

[0214] As shown in Figure 8, at the end of this sub-step E34, the pixels 40(V) of the second group G2 are formed. In addition, the pixels 40(B) of the first group G1 are covered with the stack of layers that has just been formed, namely: the second stack 432 of organic layers, the transparent conductive layer 442 and the passivation layer 51.

[0215] To create the third group G3 of pixels, we begin by determining the pixels of the third group G3 from the pixels 40(V) of the second group G2. Preferably, we select every other pixel from the pixels of the second group G2. We thus obtain three groups G1, G2, G3 of an equivalent number of pixels.

[0216] Then, in an E35 operation, a second mask (not shown in Figure 9) is first formed, configured to expose the pixels of the third group G3 and protect all other pixels (from the first and second group G1 and G2).

[0217] Then, the following successive engravings are carried out through the second mask: Etching of the passivation layer 51, Etching of the conductive and transparent layer 442, Isotropic etching of 432 stacks of organic or organometallic layers.

[0218] Finally, the second mask is removed.

[0219] Figure 9 shows the structure obtained at the end of this operation E35. The pixels 40(B) of the first group G1 are released from the second stack 432 of organic layers, from the transparent conductive layer 442 and from the passivation layer 51. The pixels 40(B) of the first group G1 are therefore formed.

[0220] In addition, the pixels 40(V) of the second group G2, which were protected during this E35 operation, are also formed.

[0221] Finally, the lower electrodes 41 of the pixels of the third group G3 are free.

[0222] The following operations E36, E37 and E38 are represented by Figure 10.

[0223] During operation E36, the active elements 43 of the pixels of the third group G3 are formed with a third stack 433 of organic layers configured to emit a third radiation different from the first and second radiations. For example, this third radiation corresponds to a red equivalent color noted “(R)” in the figures (its spectrum is between 600 nm and 700 nm). A full-plate deposition of the third stack 433 of organic layers is then carried out.

[0224] Then, during operation E37, a full plate deposition of a conductive and transparent layer 443 of the same nature as the transparent conductive layer 441 is carried out to form the upper electrodes 44 of the pixels of the third group G3.

[0225] Finally, during operation E38, a passivation layer 52 of the same nature as the passivation layer 50 is deposited full plate on the structure obtained at the end of operation E37.

[0226] As shown in FIG. 10, at the end of operation E38, the pixels 40(R) of the third group G3 are formed, and the pixels 40(B), 40(V) of the first and second groups G1, G2 are covered with the third stack 433 of organic layers, the transparent conductive layer 443 and the passivation layer 52.

[0227] Finally, during an operation E39, illustrated in figure 11, a third mask is formed on the device to expose the pixels 40(B), 40(V) of the first and second groups G1, G2 (covered with the third stack 433 of organic layers, the transparent conductive layer 443 and the passivation layer 52) and protect the pixels 40(R) of the third group G3. Then, the following etchings are successively carried out through the third mask: Etching of the passivation layer 52, Etching of the conductive and transparent 443 layer, Isotropic etching of 433 stacks of organic or organometallic layers.

[0228] Finally, the third mask is removed to obtain the color electroluminescent display device shown in Figure 11.

[0229] Alternatively, step E3 may consist of implementing the manufacturing method described in document FR3079909A1.

[0230] Naturally, a number of pixel groups greater than three can be formed by iterating step E3.

[0231] It is noted that, thanks to the electrode support elements and to step E3 of forming groups of pixels, the manufacturing method according to the invention makes it possible to produce with improved reliability so-called native color display devices (the active elements of the pixels directly generate the radiation at the desired wavelength) of high resolution.

[0232] Step E4 is described below, in relation to figures 12 to 15. This step E4 is implemented either directly after step E2 of forming the passivation layer, or after the last iteration of step E3.

[0233] Step E4 consists of forming a common electrode 70 (see FIG. 15) for all pixels 40(V), 40(B), 40(R). Since the common electrode 70 makes contact with the upper electrode 44 of each pixel 40, it is necessary, during this step, to create access zones to these upper electrodes 44.

[0234] For this, step E4 begins with a sub-step E41 of filling, with a dielectric material 80, the spaces between the pixels 40(V), 40(B), 40(R). The dielectric material may be of the same nature as the dielectric material 80 described in relation to FIG. 29B, namely that it may be polymer-based or be an inorganic dielectric material). This filling sub-step is illustrated in FIG. 13.

[0235] The dielectric material 80 used during substep E41 is here advantageously a permanent resin, preferably an optically absorbent resin. For example, the permanent resin is the SU-8(TD) resin from the Kayaku Advanced Materials brand, or the TELR(TD) resin from the TOK brand, or a resin of the CFPR BK Series (TD) type from the TOK brand. Thus, the dielectric material 80 reduces parasitic reflections due to ambient light.

[0236] When the dielectric material 80 is a permanent resin, the sub-step E41 comprises, after the filling E41, an annealing sub-step at a temperature below 100°C followed by a drying step.

[0237] The use of a temperature below 100°C makes it possible to preserve the stacks 431, 432, 433 of organic layers of the pixels 40(V), 40(B), 40(R) which are fragile.

[0238] The filling E41 can stop, as shown in Figure 12, flush with the passivation layer (in Figure 12, this is the passivation layer 52) covering the pixels 40(V), 40(B), 40(R).

[0239] Sub-step E41 is followed by a sub-step E42, illustrated in figure 13, comprising the following successive operations: Deposition of an etching mask on the upper layer of the dielectric material 80 and the pixels 40, Etching, through this mask, of the passivation layer 50 to obtain openings 90 on the pixels 40, each opening 90 giving access to the upper electrode 44 of one of the pixels 40.

[0240] Sub-step E42 is then extended by a sub-step E43, illustrated in figure 14, consisting of depositing, in a conformal or non-conformal manner, a layer of conductive and transparent material in the openings 71 and between the openings 71. This layer of conductive and transparent material forms the common electrode 70. It is preferably deposited so as to cover the entire surface of the substrate (according to a full-plate deposition).

[0241] This conductive and transparent material is similar to the material of the upper electrodes 44 of the pixels 40. Thus, the common electrode 70 may be based on aluminum (Al), silver (Ag), or chromium (Cr). Its thickness is preferably between 5 nm and 100 nm. Alternatively, the common electrode 70 may be based on or made of a conductive and transparent material chosen from (but not limited to) the following materials: Poly(3,4-ethylenedioxythiophene) (or PEDOT), indium-tin oxide (or ITO for "Indium Tin Oxide" according to the commonly used English terminology), tin dioxide (SnO2), zinc oxide (ZnO) or aluminum-doped zinc oxide (or AZO).

[0242] Advantageously, the material of the common electrode 70 is AZO. The deposition of such a material is in fact “gentle” with respect to the active elements 43, that is to say it does not degrade their performance.

[0243] The ability to make a non-conforming deposit constitutes another simplification compared to the manufacturing processes of the prior art.

[0244] Sub-step E43 can advantageously be followed by a sub-step E44, illustrated in FIG. 15, consisting of forming common electrode contacts 100 on the common electrode 70. Each contact 100 is arranged between two pixels 40(V), 40(B), 40(R) or at the periphery of the pixel matrix, so as not to obstruct the emitted radiation(s). The multiplication of contacts 100 allows better distribution of the electric current to the pixels.

[0245] The contacts 100 are made of a more conductive material than the material of the common electrode 70, for example based on an alloy of aluminum and silicon (or AISi). In addition, since these contacts are advantageously opaque to visible light, they make it possible to effectively reduce the reflections of stray light between the pixels 40.

[0246] Figure 16 represents an alternative implementation of step E4. According to this alternative embodiment, the filling E4T, with the dielectric material 80, of the spaces between the pixels 40(V), 40(B), 40(R) is configured so that an excess thickness 81 of this dielectric material 80 overflows onto the pixels 40(V), 40(B), 40(R), without covering them completely. This makes it possible to directly define the openings 90 (see figure 16) and to avoid the formation E42 of the etching mask (the dielectric material 80 used for the filling is then used as an etching mask).

[0247] Manufacturing process 1 is therefore faster to implement.

[0248] The sub-steps following the filling E4T are identical to the sub-steps E43 and E44 described previously. Since the dielectric material 80 has a certain slope on the edges of the pixels, this makes it possible to use, as conductive material 70, a material that is not very conformal, i.e. not necessarily suitable for being deposited in a conformal manner.

[0249] The main steps of the second mode S of implementing the manufacturing method are now described in relation to figures 23A to 31 A, 23B to 31 B and 23C to 31 C.

[0250] The step S1 of forming the pixels making it possible to form the device 2 shown in FIGS. 29A, 29B and 29C is described below in relation to FIGS. 23A to 29A, 23B to 29B and 23C to 29C.

[0251] Step S1 begins with a sub-step S11 of providing the multilayer structure 10' described previously in relation to sub-step E1 T illustrated by figure 17.

[0252] Then, a sub-step S12 of structuring the multilayer structure 10' is implemented. This sub-step S12 is identical to the sub-step E12' illustrated in figure 18.

[0253] The structure obtained at the end of this sub-step S12 is shown in Figure 23A, Figure 23B and Figure 23C, respectively in cross-sectional view by line AA (see Figure 23C), in cross-sectional view by line BB and in top view. Line AA intersects a line of pixels (it therefore extends along the differentiation direction X) and line BB intersects a column of pixels (it therefore extends along the non-differentiation direction Y).

[0254] As shown in these figures 23A to 23C, conductive patterns 410 spaced from each other are formed on the dielectric layer 12 of the initial multilayer structure 10'. This results in a matrix of conductive patterns 410.

[0255] These conductive patterns 410 are identical to those described previously. Thus, the second conductive layer 15 of each conductive pattern 410 forms the lower electrode 41 of each pixel 40. In addition, the first conductive layer 13 of each conductive pattern 410 will be structured to form the support elements 42 of the pixels 40. Finally, each conductive pattern 410 is connected to one of the conductive vias 14 of the initial multilayer structure 10'.

[0256] As shown in Figure 23C, the conductive patterns 410 are arranged in the first X direction and the second Y direction to form rows and columns.

[0257] As shown in Figure 23C, each conductive pattern 410 is spaced from the neighboring conductive patterns 410 by, on the one hand, two Tx trenches oriented along the first direction X (hereinafter referred to as “Tx line trenches”) and, on the other hand, two T trenches y oriented along the second Y direction. The T trenches y are noted “T column trenches y " afterwards.

[0258] Then, substeps S13 and S14 illustrated respectively by FIGS. 24A, 24B, 24C and 25A, 25B and 25C are performed.

[0259] These sub-steps S13, S14 consist of forming the patterns 120 represented in FIG. 29B from the dielectric material 80 described previously in relation to FIG. 29B.

[0260] When the dielectric material 80 is a resin (hereinafter referred to as “resin 80”), sub-step S13 begins with a photolithography process in the manner described below.

[0261] First, the resin 80 is spread over the entire conductive pattern array 410.

[0262] When spreading, the resin 80 infiltrates into, and fills, all of the Tx and T trenches y .

[0263] Once spread, the resin 80 is dried. A sequence is then carried out 1) of a projection of a first etching mask exposing the column trenches T y and protecting the Tx line trenches, 2) from exposure to light, through the etching mask, of the resist 80 and 3) from dissolution (or development) of the resist 80 exposed to light. The Tx line trenches are then filled with resist 80 which forms the lines 121 of resist 80 shown in Figure 24C.

[0264] Then, a creep of the resin 80 is carried out, so that the resin 80 overflows onto the conductive patterns 410 which run along the Tx trenches. The creep consists of making the solid resin viscoelastic and causing a controlled sliding (or flow) of this resin 80 on the conductive patterns 410.

[0265] At the end of the creep, the part Z2 (see figures 24B and 24C) of the conductive pads 410 which runs along the trenches Tx is covered with the resin 80.

[0266] The creep is preferentially configured so that the resin overflows onto the conductive patterns 410 by making a gentle slope.

[0267] The term "gentle slope" refers to a rounded edge of the resin 80 on the conductive patterns 410, as illustrated in Figure 24B.

[0268] Concretely, the creep is for example carried out in an oven at a temperature of 200°C for 30 minutes. Under the effect of the temperature, the polymer which constitutes the resin becomes viscous and the resin flows over the edges of the conductive pads 410. It is noted that the creep operation is important because the controlled deformation of the resin 80 cannot be obtained when the resin 80 is in a liquid state.

[0269] As shown in Figure 24C, resin 80 also flows into the column trenches T y , at the intersection Z3 of these column trenches with the Tx line trenches.

[0270] The creep is then followed by a drying step which makes the deformation of the resin 80 obtained by the creep irreversible.

[0271] Then, in a sub-step S14 illustrated by Figures 25A, 25B and 25C, a projection of a second etching mask exposing the column trenches T yand protecting the Tx line trenches is first carried out.

[0272] Then, an anisotropic etching of the 80 resin still present in the T column trenches y (in the areas Z3 shown in Figure 24C) is accomplished through the etching mask defined by projection, stopping on the dielectric layer 112. The column trenches Ty are then entirely free of resist while the trenches Tx are filled with resist between two successive column trenches Ty. The lines 121 of resist 80 are then interrupted to form the patterns 120 of resist 80. Finally, the second etching mask is removed.

[0273] At the end of sub-step S14, the patterns 120 in resin 80 are formed.

[0274] These patterns 120 in resin 80 act as an etching mask for sub-step S15, making it possible to protect the parts of the Tx row trenches located between the conductive patterns 410 and to expose the T column trenches y .

[0275] It should be noted that, when the dielectric material 80 is an inorganic dielectric material 80, such as SiC>2, SiN or AI2O3, the photolithography method of sub-step S13 is replaced by operations of depositing the organic dielectric material 80 and then structuring this deposited inorganic dielectric material 80. The creep and drying operations, as well as sub-step S14 are then implemented in the manner described previously.

[0276] Substep S15, illustrated by FIG. 26A, FIG. 26B and FIG. 26C, aims to obtain the support element 42 of each pixel 40 from the first conductive layer 13 of the conductive patterns 410.

[0277] Sub-step S15 is analogous to sub-step E13' described previously in relation to FIG. 19, in that a partial etching of the first conductive layer 13, isotropically and selectively relative to the second conductive layer 15, is accomplished from the free trenches located between the conductive patterns 410. In addition, the support element 42 of each pixel 40 is formed from a portion of the first conductive layer 13.

[0278] Unlike Figure 19 representing sub-step E13', the free trenches here are the column trenches T y only, due to the sub-steps S13 and S14 previously performed. The cavities 30 are formed under the lower electrode 41, 15 of each pixel (see figure 26A) on the side of the column trenches T yonly. On the side of the line trenches (see figure 26B), the first conductive layer 13 is not etched due to the presence of the patterns 120 of dielectric material 80.

[0279] This makes it possible to obtain the support elements 42 having a single differentiation dimension d42x, described in relation to the device 2 illustrated in FIGS. 29A, 29B and 29C. The support element 42 obtained in fact consists of an asymmetrical conductive pillar, formed from the material of the first conductive layer 13.

[0280] During an optional sub-step S16, illustrated by FIG. 27A, FIG. 27B and FIG. 27C, a layer of an insulating material 100 is first deposited full plate (from above) on the structure obtained at the end of sub-step S15. This insulating material 100 is for example an aluminum oxide (or AI2O3), and the deposition is carried out according to an atomic thin film deposition technique or ALD.

[0281] Due to the presence of the asymmetric support element 42 under each lower electrode 41, the layer of insulating material 100 is discretized in the differentiation direction X, that is to say on the edges of each lower electrode 41 located on the side of the column trenches only.

[0282] The fact that the dielectric material 80 extends gently over the lower electrodes of the pixels also allows the layer of insulating material 100 to be continuous in the non-differentiation direction Y. In this case, the layer of insulating material 100 extends continuously over the lower electrodes 41 arranged on the same column.

[0283] Then, an etching of this layer of insulating material 100 is carried out to obtain openings 110 on the lower electrodes 41.

[0284] The layer of insulating material 100 makes it possible to reinforce the electrical insulation between the support elements 42 and between the lower electrodes 41 of the pixels 40.

[0285] Substep S17, illustrated by Figure 28A, Figure 28B and Figure 28C, consists of forming the active element 43 of each pixel.

[0286] During this sub-step S17, the first stack 431 of organic layers is thus deposited in a full-plate manner on the structure obtained at the end of sub-step S16 (when the latter is completed), or on the structure obtained at the end of sub-step S15. The deposition method is identical to the deposition method described in relation to sub-step E14' (illustrated in FIG. 20).

[0287] The support elements 42 produce the same discretizing effects as those described in relation to the layer of insulating material 100.

[0288] The first stack 431 of organic layers is thus discretized on the edges of each lower electrode 41 located on the side of the column trenches T y only (see figure 28A), and extends continuously over the lower electrodes 41 and between the lower electrodes 41 located on the same column (see figure 28B).

[0289] As a result, each active element 43 is separated from the neighboring active elements 43 belonging to the same row of the matrix as this active element 43 (despite the residues R431 present between the support elements 42, but is connected by the first stack 431 of organic layers to the neighboring pixels belonging to the same column of the matrix as this active element 43.

[0290] Next, a substep S18 illustrated by FIG. 29A, FIG. 29B and FIG. 29C is performed to form the upper electrode 44 of each pixel and, thus, finalize the formation of the pixels 40.

[0291] Sub-step S18 consists, like sub-step E15' illustrated in FIG. 20, of depositing in a full plate manner the conductive and transparent layer 441 on and between the active elements 43.

[0292] As shown in Figures 29A and 29B, the transparent conductive layer 441 is discretized between the active elements 43 belonging to the same line but remains continuous between the active elements 43 belonging to the same line.

[0293] The second mode S of implementing the manufacturing method advantageously continues with a step S2 illustrated by FIG. 30A, FIG. 30B and FIG. 30C. Step S2 makes it possible to manufacture the device 2i described previously in relation to these figures, in which the pixels 40 are encapsulated. This step S2 is analogous to step E2 illustrated in FIG. 6 in that it also consists of a deposition of the passivation layer 50 on the edges of the pixels 40 and on the surface of the substrate 11.

[0294] In this case, as shown in FIGS. 30A, 30B and 30C, the passivation layer 50 covers the outer boundaries of the pixels 40 and the regions of the substrate 11 located between the pixels 40.

[0295] In Figures 30A, 30B and 30C, the pixels are denoted 40, G1 because they all belong to the same group G1 of pixels of the blue color, defined by the first stack 431 of organic layers.

[0296] The manufacturing method S according to this second embodiment can advantageously continue with a step S3 which consists of forming several, typically three, groups of pixels of different colors from the first group of pixels 40, G1. This step S3 therefore makes it possible to form the 22-color device described previously in relation to figures 31 A, 31 B and 31 C.

[0297] This step S3 comprises the sub-steps E31 to E39 of the step E3 described previously in relation to FIGS. 9 to 11, these sub-steps being implemented from the device 2i shown in FIGS. 30A, 30B and 30C. Alternatively, step S3 can be implemented on the device 2i shown in FIGS. 30A, 30B and 30C by applying the method described in the document FR3079909A1.

[0298] The presence of the support elements 42 finds an additional advantage (in addition to allowing the discretization of the pixels 40) during this step S3. Indeed, these support elements make it possible to preserve the pixels already formed (by putting them at a distance) during the engravings implemented to form the second and third groups of pixels.

[0299] The manufacturing method S can then comprise a step S4 of forming an electrode common to all the pixels 40(V), 40(B) and 40(R) of the device 22 shown in FIGS. 31 A, 31 B and 31 C. This step S4 of forming a common electrode, not shown in the figures, is implemented on the device 2i shown in FIGS. 31 A, 31 B and 31 C, and is identical to the step E4 described previously in relation to FIGS. 12 to 16.

[0300] The second mode S of implementing the manufacturing method may comprise a step ST (not shown in the figures) instead of step S1, for forming the device 2' alternative to the device 2, in which the support element 42 of each pixel 40 comprises the dielectric pillar 12 and the through via 14 shown in FIG. 5.

[0301] Step ST then begins with a sub-step S1 T of providing the multilayer structure 10 described previously in relation to sub-step E11 illustrated by figure 1.

[0302] Then, during a sub-step S12' identical to the sub-step E12 illustrated in FIG. 2, the lower electrodes 41 are delimited in the first conductive layer 13 of the multilayer structure 10 shown in FIG.

[0303] A sub-step S13' identical to the sub-step S13 described previously in relation to FIG. 24A, FIG. 24B and FIG. 24C and a sub-step S14' identical to the sub-step S14 described previously in relation to FIG. 25A, FIG. 25B and FIG. 25C are then successively implemented. Thus, at the end of sub-step S134, the patterns 120 of dielectric material 80 are formed.

[0304] In a sub-step S15' identical to the sub-step E13 illustrated in FIG. 3, the device obtained at the end of the sub-step S14' is implemented. At the end of the sub-step S15', the support element 42 of each pixel is formed.

[0305] Finally, sub-steps S16' and S17' respectively identical to sub-steps E14 (see figure 4) and E15 (see figure 5) are successively implemented from the device obtained at the end of sub-step S15'.

Claims

CLAIMS

1. Method (E, S) for manufacturing an electroluminescent display device (1, 2) comprising a step of forming (E1, ET, S1) a plurality of pixels (40) on a substrate (11), the pixels (40) being separated from each other along at least one so-called differentiation direction (X,Y) included in a plane ({X,Y}) of the substrate (11), each pixel (40) comprising a lower electrode (41), a support element (42) supporting the lower electrode (41), an upper electrode (44) and an active element (43) arranged between the lower and upper electrodes (41, 44), said step (E1) of forming the pixels comprising the following successive sub-steps: - Formation, on a surface (11a) of the substrate (11), of the support elements (42) and of the lower electrodes (41) of the pixels (40), the lower electrodes (41) being separated from each other, each support element (42) having a height (t) and a first differentiation dimension measured along a first differentiation direction (X), and a second differentiation dimension, measured along a second differentiation direction (Y) secant to the first differentiation direction (X), in a plane parallel to the plane of the substrate, each differentiation dimension being strictly less than the corresponding dimension of the lower electrode (41) that it supports, the height (t) of the support element (42) being strictly greater than the sum (043+644) of the thickness of the active element and the thickness of the upper electrode, - Deposition (E14, E14', S17) over the entire surface (11 a) of the substrate (11) of a first stack (431) of organic layers, from which results the active elements (43) of the pixels (40), separated from each other along said at least one differentiation direction (X,Y), and arranged on the lower electrodes (41) of the pixels (40), the first stack (431) of organic layers being configured to generate a first radiation, - Deposition (E15, E15', S18) over the entire surface (11 a) of the substrate (11 ) of a transparent conductive layer, from which the electrodes result upper (44) of the pixels (40), separated from each other according to said at least one direction of differentiation (X, Y) and arranged on the active elements (43) of the pixels.

2. A manufacturing method (E) according to claim 1, wherein each support member (42) comprises a peripheral side surface (42d) disposed set back from a peripheral side surface (41d) of the lower electrode (41) which it supports.

3. A manufacturing method according to claim 2, wherein the minimum withdrawal distance (d r ) between the peripheral lateral surface (42d) of the support element (42) and the peripheral lateral surface (41 d) of the lower electrode (41 ) supported by said support element (42) is strictly greater than 100 nm.

4. Manufacturing method (E, S) according to one of claims 1 to 3, in which the sub-step of forming the support elements (42) and the lower electrodes (41) of the pixels (40) comprises the following operations: - Supply (E11) of a multilayer structure (10) comprising the substrate (11), a dielectric layer (12) disposed on the substrate (11), a first conductive layer (13) disposed on the dielectric layer (12) and conductive vias (14) passing through the dielectric layer (12), each conductive via (14) connecting the first conductive layer (13) to a conductive pad (14) of the substrate (11), - Formation of an etching mask on the first conductive layer (13), - Etching (E12), through the mask, of the first conductive layer (13) to obtain the lower electrodes (41) of the pixels (40), each lower electrode (41) being connected to a conductive via (14), - Etching (E13) of the dielectric layer (12), isotropically and selectively relative to the first conductive layer (13), so as to form the support elements of the lower electrodes of the pixels, each support element (42) comprising a conductive via (14).

5. A manufacturing method according to claim 4, wherein the dielectric layer (12) is partially etched, whereby each support element (42) comprises a conductive via (14) and a portion of the dielectric layer surrounding the conductive via.

6. Manufacturing method (E, S) according to one of claims 1 to 53 in which the sub-step (ET, S1) of forming the support elements (42) and the lower electrodes (41) of the pixels (40) comprises the following operations: - Provision (E1 T, S11) of a multilayer structure (10') comprising the substrate (11), a dielectric layer (12) arranged on the substrate (11), a first conductive layer (13) arranged on the dielectric layer (12), a second conductive layer (15) arranged on the first conductive layer (13) and conductive vias (14) passing through the dielectric layer (12), each conductive via (14) connecting the first conductive layer (13) to a conductive pad (14) of the substrate (11), the first and second conductive layers (13, 15) being formed from different conductive materials, - Formation of an etching mask on the second conductive layer (15), - Etching (E12', S12), through the mask, of the first and second conductive layers (13, 15) to obtain a plurality of conductive patterns (410) separated from each other, each conductive pattern (410) being connected to a conductive via (14), - Partial etching (E13', S15) of the first conductive layer (13), isotropically and selectively with respect to the second conductive layer (15), the lower electrodes (41) of the pixels (40) being delimited in the second conductive layer (15) and the support elements (42) being delimited in the first conductive layer (13).

7. Manufacturing method (E, S) according to one of claims 1 to 6, comprising, after the step (E1, ET, S1) of forming the pixels (40), a step (E2, S2) of depositing a passivation layer (50) on the edges of the pixels (40) and on the substrate (11).

8. Manufacturing method (E, S) according to claim 7, in which the deposition (E2, S2) of the passivation layer (50) is carried out using a conformal deposition technique, preferably an atomic thin layer deposition technique.

9. Manufacturing method (E, S) according to one of claims 7 to 8, in which the height (t) of each support element (42) is strictly greater than the sum (0434450) of the thicknesses of the passivation layer (50), of the active element (42) and of the upper electrode (44).

10. Manufacturing method (E, S) according to one of claims 7 to 9, comprising, after the step (E2, S2) of depositing the passivation layer (50) on the edges of the pixels and the substrate, a step (E4, S4) of forming a common electrode (70) for all the pixels (40) comprising the following sub-steps: - Filling (E41) of the free space between the pixels (40) with a dielectric material (80), - Etching (E42) of the passivation layer (50) to obtain openings (90) on the pixels (40), each opening (90) giving access to the upper electrode (44) of one of the pixels (40), - Deposition (E43) of a conductive and transparent material in the openings (90) and between the openings (90).

11. Manufacturing method (E, S) according to claim 10, wherein the dielectric material (80) deposited in the openings (90) and between the openings (90) during the filling sub-step (E41) of the step (E4, S4) of forming the common electrode (70) is a permanent resin, preferably an optically absorbent permanent resin.

12. Manufacturing method (E, S) according to one of claims 10 to 11, wherein the common electrode (70) is made of aluminum-doped zinc oxide (AZO).

13. Manufacturing method (E, S) according to one of claims 10 to 12, in which the filling sub-step (E41) is configured to form an excess thickness (81) of the dielectric material (80) between the pixels (40) and extending over the pixels (40).

14. Manufacturing method (E, S) according to one of claims 10 to 13, comprising, after the step (E2, S2) of depositing the passivation layer (50), a step (E3, S3) of replacing only part of the pixels to form a group of pixels configured to generate a second radiation distinct from the first radiation, said replacement step (E3, S3) comprising the following successive sub-steps: - Formation (E31) of a first mask to expose the pixels of said part and protect the other pixels, - Successive etching (E31), through the first mask, of the passivation layer (50), of the upper electrode (44) and of the first stack of organic layers (431) of the pixels (40) of said part, - Removal (E31) of the first mask, - Deposition (E32), on the surface of the substrate, of a second stack of organic layers (432) configured to emit the second radiation, from which results the active elements (43) of the pixels (40) of said group, - Deposition (E33), on the surface of the substrate (11), of an additional conductive and transparent layer, from which result the upper electrodes (44) of the pixels of said group, - Deposition (E34) of a passivation layer (51) on the contours of the pixels (40), - Formation (E35) of a second mask to protect the pixels of said part and expose the other pixels, - Etching (E35), through the second mask, of the passivation layer (51) deposited on the contours of the pixels of said group, of the additional transparent layer and of the second stack 432 of organic layers, - Removal (E35) of the second mask.

15. Electroluminescent display device (1, 2) comprising a plurality of pixels (40) arranged on a substrate (11) and separated from each other in at least one direction (X,Y), called differentiation, included in a plane ({X,Y}) of the substrate (11), each pixel (40) comprising a lower electrode (41), a support element (42) supporting the lower electrode (41), a transparent upper electrode (44) and an active element (43) disposed between the lower and upper electrodes (41, 44), the active element (43) of each pixel (40) comprising a portion of a stack (431) of organic layers configured to generate radiation, and wherein each support element (42) is entirely or partly conductive and has: - a first differentiation dimension (d42X) measured along a first differentiation direction (X), and a second differentiation dimension (d42Y), measured along a second differentiation direction (Y) secant to the first differentiation direction (X), in a plane parallel to the plane of the substrate, each differentiation dimension being strictly less than the corresponding dimension of the lower electrode (41) which it supports, - A height (h42) strictly greater than the sum of the thickness (e43) of the active element (42) and the thickness (e44) of the upper electrode (44) arranged on said lower electrode (41).

16. An electroluminescent display device (1, 2) according to claim 15, wherein the support element (42) of each pixel (40) comprises a pillar of dielectric material (12) and a conductive through-via (14) located inside the pillar of dielectric material (12).

17. An electroluminescent display device (1, 2) according to claim 15, wherein the support element (42) of each pixel (40) is a solid conductive pillar formed of a metallic material (13).

18. Electroluminescent display device (1, 2) according to one of claims 15 to 17, in which the active element of each pixel (40) is formed from a stack of organic layers configured to emit a first radiation.

19. Electroluminescent display device (1, 2) according to one of claims 15 to 17, in which the pixels (40) are distributed into first, second and third groups (G1, G2, G3) of pixels, the active element of each pixel of the first group being formed of a stack of organic layers configured to generate the first radiation, the active element of each pixel of the second group being formed from a stack of organic layers configured to generate a second radiation distinct from the first radiation, and the active element of each pixel of the third group being formed from a stack of organic layers configured to generate a third radiation distinct from the first radiation and distinct from the second radiation.

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