Communication method and communication apparatus

Abstract

The present application relates to the technical field of wireless communications, and in particular to a communication method and a communication apparatus. The method comprises: acquiring a first environmental interference intensity of a communication apparatus; and if the first environmental interference intensity is less than or equal to an interference intensity threshold, switching the working mode of each signal receiving channel among at least one signal receiving channel in the communication apparatus from a first working mode to a second working mode. A first sampling rate of each signal receiving channel in the first working mode is greater than a second sampling rate of each signal receiving channel in the second working mode, and / or a first bit width of a ADC in each signal receiving channel in the first working mode is greater than a second bit width of the ADC in each signal receiving channel in the second working mode. By means of the method provided by the present application, the anti-interference performance of the communication apparatus can be ensured, and the power consumption of the communication apparatus can also be reduced.

Description

Communication method and communication apparatus

[0001] The present application claims priority to the Chinese patent application No. 202410482521.9, filed on April 19, 2024, and entitled "A communication method and communication apparatus", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the technical field of wireless communication, and in particular to a communication method and communication apparatus. BACKGROUND

[0003] With the continuous development of positioning technology and the continuous change of positioning demand, the application scenarios of positioning systems such as global navigation satellite system (GNSS) are becoming more and more complex, which also leads to more and more interference received by the receivers in these positioning systems. Therefore, anti-interference technology has become one of the key technologies of the receivers in these positioning systems.

[0004] In order to solve the interference problem of the receiver, on the one hand, people have proposed adaptive anti-interference technology. The so-called adaptive anti-interference technology is to set an interference detection module and an interference suppression module in the receiver. The interference detection module detects whether there is interference in the surrounding environment of the receiver in real time, and the interference suppression module suppresses the detected environmental interference. On the other hand, the anti-interference performance of the receiver can also be ensured by designing high analog-to-digital converter (ADC) bit width and high sampling rate for the receiver. However, the design of high ADC bit width and high sampling rate will lead to high power consumption of the receiver, thereby leading to poor applicability and practicability. SUMMARY

[0005] In order to solve the above problems, the present application provides a communication method and communication apparatus, which can reduce the power consumption of the communication apparatus while ensuring the anti-interference performance of the communication apparatus.

[0006] The present application is introduced from multiple aspects below, and it is easy to understand that the implementation modes of the multiple aspects below can be mutually referred.

[0007] In a first aspect, an embodiment of the present application provides a communication method. The method is applied to a communication device, and the communication device comprises at least one signal receiving channel. The method comprises: obtaining a first ambient interference intensity of the communication device; and switching an operation mode of each of the at least one signal receiving channel from a first operation mode to a second operation mode, in a case where the first ambient interference intensity is less than or equal to an interference intensity threshold. The first sampling rate of each of the at least one signal receiving channel in the first operation mode is greater than a second sampling rate of each of the at least one signal receiving channel in the second operation mode, and / or the first bit width of an analog-to-digital converter (ADC) in each of the at least one signal receiving channel in the first operation mode is greater than a second bit width of the ADC in each of the at least one signal receiving channel in the second operation mode.

[0008] In the above implementation, in a case where the ambient interference intensity is small, the communication device can reduce the sampling rate of each of the at least one signal receiving channel included in the communication device, and / or reduce the bit width of the ADC included in the at least one signal receiving channel, so that the power consumption of the communication device can be effectively reduced without affecting the performance of the communication device. Therefore, the communication method provided in the present application can also solve the problem of large power consumption of the existing GNSS receiver, and can improve the applicability and practicability of the GNSS receiver.

[0009] In combination with the first aspect, in a possible implementation, the at least one signal receiving channel comprises a first signal receiving channel and a second signal receiving channel, and the first signal receiving channel and the second signal receiving channel correspond to different operation frequency bands.

[0010] In combination with the first aspect, in a possible implementation, the first signal receiving channel at least comprises a first pre-receiving link and a first signal processing module connected to each other, and the second signal receiving channel at least comprises a second pre-receiving link and a second signal processing module connected to each other. The communication device can switch the sampling rate of the first pre-receiving link, the first signal processing module, the second pre-receiving link, and the second signal processing module from a first sampling rate corresponding to the first operation mode to a second sampling rate corresponding to the second operation mode, and / or switch the bit width of a first ADC in the first pre-receiving link and a second ADC in the second pre-receiving link from a first bit width corresponding to the first operation mode to a second bit width corresponding to the second operation mode, so as to switch the first signal receiving channel and the second signal receiving channel from the first operation mode to the second operation mode.

[0011] With reference to the first aspect, in a possible implementation manner, before the working mode of each of the at least one signal receiving channel is switched from the first working mode to the second working mode, the method further includes: disabling the first VCO in the first front-end receiving chain from outputting the first clock signal to the first phase-locked loop in the first front-end receiving chain and the second phase-locked loop in the second front-end receiving chain. Controlling the second VCO in the second front-end receiving chain to output the second clock signal to the first phase-locked loop and the second phase-locked loop. The clock frequency of the first clock signal corresponds to the first working mode, and the clock frequency of the second clock signal corresponds to the second working mode.

[0012] In the implementation manner, before the working mode switching, the communication apparatus can control the first VCO in the first front-end receiving chain to stop providing the first clock signal corresponding to the first working mode for the first phase-locked loop in the first front-end receiving chain and the second phase-locked loop in the second front-end receiving chain, and control the second VCO in the second front-end receiving chain to simultaneously provide the second clock signal corresponding to the second working mode for the first phase-locked loop and the second phase-locked loop, so as to ensure the clock continuity of the first signal receiving channel and the second signal receiving channel during the working mode switching, and enable the communication apparatus to continuously receive and process signals, thereby ensuring the stable performance of the communication apparatus.

[0013] With reference to the first aspect, in a possible implementation manner, the connection between the first VCO in the first front-end receiving chain and the first phase-locked loop in the first front-end receiving chain and the second phase-locked loop in the second front-end receiving chain is disconnected, to disable the first VCO from outputting the first clock signal to the first phase-locked loop and the second phase-locked loop. The connection between the second VCO in the second front-end receiving chain and the first phase-locked loop and the second phase-locked loop is established, to control the second VCO to output the second clock signal to the first phase-locked loop and the second phase-locked loop.

[0014] With reference to the first aspect, in a possible implementation manner, the communication apparatus can adjust the clock signal output by the second phase-locked loop in the second front-end receiving chain from the first clock signal to the second clock signal. The sampling rate of the second front-end receiving chain is switched from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode, or the sampling rate of the second front-end receiving chain is switched from the first sampling rate to the second sampling rate and the bit width of the second ADC in the second front-end receiving chain is switched from the first bit width corresponding to the first working mode to the second bit width corresponding to the second working mode. Then, the first signal corresponding to the first front-end receiving chain is processed through the second front-end receiving chain to obtain a second signal, and the second signal is transmitted to the first signal processing module. Then, the sampling rate of the first signal processing module is switched from the first sampling rate to the second sampling rate. The first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode.

[0015] In a possible implementation manner of the first aspect, the method further includes: adjusting a clock signal output by a first phase-locked loop in the first front-end receiving chain from a third clock signal to a fourth clock signal; switching a sampling rate of the first front-end receiving chain from a first sampling rate to a second sampling rate, or switching the sampling rate of the first front-end receiving chain from the first sampling rate to the second sampling rate and switching a bit width of a first ADC in the first front-end receiving chain from a first bit width to a second bit width; processing, by the first front-end receiving chain, a third signal corresponding to the second front-end receiving chain to obtain a fourth signal, and transmitting the fourth signal to the second signal processing module; and switching the second signal processing module from the first sampling rate to the second sampling rate. The third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode.

[0016] In a possible implementation manner of the first aspect, the communication apparatus can adjust a clock signal output by a second phase-locked loop in the second front-end receiving chain from a first clock signal to a second clock signal. Then, a bit width of a second ADC in the second front-end receiving chain is switched from a first bit width corresponding to the first working mode to a second bit width corresponding to the second working mode. Then, a first signal corresponding to the first front-end receiving chain is processed by the second front-end receiving chain to obtain a second signal, and the second signal is transmitted to the first signal processing module. The first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode.

[0017] In a possible implementation manner of the first aspect, the method further includes: adjusting a clock signal output by a first phase-locked loop in the first front-end receiving chain from a third clock signal to a fourth clock signal; switching a bit width of a first ADC in the first front-end receiving chain from a first bit width to a second bit width; processing, by the first front-end receiving chain, a third signal corresponding to the second front-end receiving chain to obtain a fourth signal, and transmitting the fourth signal to the second signal processing module. The third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode.

[0018] In the implementation described above, in a case where it is determined that the working mode switching needs to be performed on the first signal receiving channel and the second signal receiving channel, the working mode of the second front-end receiving chain is first switched from the first working mode to the second working mode, and then the second front-end receiving chain is used to replace the first front-end receiving chain to implement the corresponding functions. Through the multiplexing of the second front-end receiving chain, the clock continuity of the first signal receiving channel can be ensured, and the interruption of the received signal caused by the working mode switching can be avoided, thereby ensuring the performance stability of the communication apparatus.

[0019] In a possible implementation manner of the first aspect, the at least one signal receiving channel includes a first signal receiving channel, and the first signal receiving channel includes at least a first pre-receiving link and a first signal processing module connected to each other. In this case, the communication device can switch the sampling rate of the first pre-receiving link and the first signal processing module from a first sampling rate corresponding to the first working mode to a second sampling rate corresponding to the second working mode; and / or, switch the bit width of the first ADC in the first pre-receiving link from a first bit width corresponding to the first working mode to a second bit width corresponding to the second working mode, so as to switch the first signal receiving channel from the first working mode to the second working mode.

[0020] In a possible implementation manner of the first aspect, the first pre-receiving link includes a first phase-locked loop and a second phase-locked loop. Before the working mode of each of the at least one signal receiving channel is switched from the first working mode to the second working mode, the method further includes: controlling the first pre-receiving link to receive a second clock signal provided by the second phase-locked loop, and prohibiting the first pre-receiving link from receiving a first clock signal provided by the first phase-locked loop. The clock frequency of the second clock signal corresponds to the second working mode, and the clock frequency of the first clock signal corresponds to the first working mode.

[0021] In the implementation manner, two phase-locked loops are arranged in the first pre-receiving link. Before the working mode is switched, the communication device can control the first phase-locked loop to stop providing the clock signal required by the first pre-receiving link in the first working mode, and control the second phase-locked loop to provide the clock signal required by the first pre-receiving link in the second working mode, so as to ensure the clock continuity of the first signal receiving channel during the working mode switching, and enable the communication device to continuously receive and process signals, thereby ensuring the performance stability of the communication device.

[0022] In a possible implementation manner of the first aspect, the communication device can control the second phase-locked loop to output the second clock signal. Then, the connection between the first phase-locked loop and the first mixer in the first pre-receiving link is disconnected, and the connection between the first mixer and the second phase-locked loop is established, so that the second phase-locked loop provides the second clock signal for the first pre-receiving link, and the first pre-receiving link is prohibited from receiving the first clock signal output by the first phase-locked loop.

[0023] In a possible implementation manner of the first aspect, the method further includes: obtaining a second environmental interference intensity of the communication device. In a case where the second environmental interference intensity is greater than the interference intensity threshold, each of the signal receiving channels is switched from the second working mode to the first working mode.

[0024] In the implementation, when the environmental interference intensity changes from small to large, the communication device increases the sampling rate of each of the at least one signal receiving channel and / or increases the bit width of the ADC included in the signal receiving channel, so as to ensure the anti-interference performance of the communication device.

[0025] In a second aspect, the present application provides a communication device. The communication device can be used to implement the communication method provided in the first aspect or any possible implementation manner of the first aspect. The communication device includes at least one signal receiving channel and a switching module, each of the at least one signal receiving channel is connected to the switching module. The switching module is configured to switch the working mode of each signal receiving channel from a first working mode to a second working mode when the first environmental interference intensity of the communication device is less than or equal to an interference intensity threshold. The first sampling rate of each signal receiving channel in the first working mode is greater than the second sampling rate of each signal receiving channel in the second working mode, and / or the first bit width of an analog-to-digital converter (ADC) in each signal receiving channel in the first working mode is greater than the second bit width of the ADC in each signal receiving channel in the second working mode.

[0026] In the implementation, when the environmental interference intensity is small, the communication device can reduce the sampling rate of each of the at least one signal receiving channel and / or reduce the bit width of the ADC included in the signal receiving channel, so as to effectively reduce the power consumption without affecting the performance of the communication device. Therefore, by using the communication device provided in the present application, the problem of large power consumption caused by the existing GNSS receiver to ensure the anti-interference performance can be avoided, and the applicability and practicability of the GNSS receiver are improved.

[0027] In combination with the second aspect, in a possible implementation manner, the at least one signal receiving channel includes a first signal receiving channel and a second signal receiving channel, and the first signal receiving channel and the second signal receiving channel correspond to different working frequency bands.

[0028] In combination with the second aspect, in a possible implementation manner, the first signal receiving channel at least includes a first pre-receiving link and a first signal processing module connected in sequence, the second signal receiving channel at least includes a second pre-receiving link and a second signal processing module connected in sequence, and the first pre-receiving link, the first signal processing module, the second pre-receiving link and the second signal processing module are connected with the switching module. In a case where the first environmental interference intensity of the communication device is less than or equal to the interference intensity threshold, the switching module is configured to: switch the sampling rates of the first pre-receiving link, the first signal processing module, the second pre-receiving link and the second signal processing module from the first sampling rate to the second sampling rate, and / or switch the bit widths of the first ADC in the first pre-receiving link and the second ADC in the second pre-receiving link from the first bit width to the second bit width.

[0029] In combination with the second aspect, in a possible implementation manner, before the sampling rates of the first pre-receiving link, the first signal processing module, the second pre-receiving link and the second signal processing module are switched from the first sampling rate to the second sampling rate, and / or the bit widths of the first ADC in the first pre-receiving link and the second ADC in the second pre-receiving link are switched from the first bit width to the second bit width, the switching module is further configured to: disable the first VCO in the first pre-receiving link from outputting a first clock signal to the first phase-locked loop in the first pre-receiving link and the second phase-locked loop in the second pre-receiving link. Control the second VCO in the second pre-receiving link to output a second clock signal to the first phase-locked loop and the second phase-locked loop. Wherein, the clock frequency of the first clock signal corresponds to the first working mode, and the clock frequency of the second clock signal corresponds to the second working mode.

[0030] In the above implementation, before the working mode switching is performed, the switching module can be configured to control the first VCO in the first pre-receiving link to stop providing the first clock signal corresponding to the first working mode for the first phase-locked loop in the first pre-receiving link and the second phase-locked loop in the second pre-receiving link, and control the second VCO in the second pre-receiving link to simultaneously provide the second clock signal corresponding to the second working mode for the first phase-locked loop and the second phase-locked loop. This can ensure the clock continuity of the first signal receiving channel and the second signal receiving channel during the working mode switching, so that the communication device can continuously receive and process signals, thereby ensuring the stable performance of the communication device.

[0031] In combination with the second aspect, in a possible implementation manner, the switching module includes a switch module, a first clock processing device, a second clock processing device, and a control module, the control module is connected with the switch module, the first VCO is connected with the first phase-locked loop through the switch module, the first VCO is further connected with the second phase-locked loop through the first clock processing device and the switch module, the second VCO is connected with the first phase-locked loop through the second clock processing device and the switch module, and the second VCO is further connected with the second phase-locked loop through the switch module. In a case where the first environmental interference intensity of the communication device is less than or equal to the interference intensity threshold, the control module is configured to: control the switch module to disconnect the first VCO from the first phase-locked loop and the second phase-locked loop, so as to prohibit the first VCO from outputting the first clock signal to the first phase-locked loop and the second phase-locked loop. The control module controls the switch module to connect the second VCO with the first phase-locked loop and the second phase-locked loop, so that the second VCO outputs the second clock signal to the first phase-locked loop and the second phase-locked loop.

[0032] In the implementation manner, the switching module is composed of the switch module, the first clock processing device, the second clock processing device, and the control module. The control module controls the switch module to control the connection relationship between the first VCO and the first phase-locked loop and the second phase-locked loop, and the connection relationship between the second VCO and the first phase-locked loop and the second phase-locked loop, so as to ensure the clock continuity of the first signal receiving channel and the second signal receiving channel. The implementation manner is simple and easy to implement, and can ensure the performance stability of the communication device while avoiding increasing the structural complexity and cost of the communication device.

[0033] In combination with the second aspect, in a possible implementation manner, in a case where the first environmental interference intensity of the communication device is less than or equal to the interference intensity threshold, the switching module is configured to: adjust the clock signal output by the second phase-locked loop in the second front-end receiving chain from the first clock signal to the second clock signal. Switch the sampling rate of the second front-end receiving chain from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode, or switch the sampling rate of the second front-end receiving chain from the first sampling rate to the second sampling rate and switch the second ADC in the second front-end receiving chain from the first bit width corresponding to the first working mode to the second bit width corresponding to the second working mode. Control so that the second front-end receiving chain processes the first signal corresponding to the first front-end receiving chain to obtain a second signal, and transmits the second signal to the first signal processing module. Switch the sampling rate of the first signal processing module from the first sampling rate to the second sampling rate. The first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode.

[0034] In the implementation, in a case where it is determined that the mode switching of the first signal receiving channel and the second signal receiving channel is needed, the working mode of the second front-end receiving link is switched from the first working mode to the second working mode, and the second front-end receiving link is used to replace the first front-end receiving link to implement the corresponding function. By multiplexing the second front-end receiving link, the clock continuity of the first signal receiving channel can be ensured, the interruption of the received signal caused by the mode switching can be avoided, and the performance stability of the communication device can be ensured.

[0035] With reference to the second aspect, in a possible implementation, the switching module is further configured to: adjust a clock signal output by a first phase-locked loop in the first front-end receiving link from a third clock signal to a fourth clock signal; switch a sampling rate of the first front-end receiving link from a first sampling rate to a second sampling rate, or switch the sampling rate of the first front-end receiving link from the first sampling rate to the second sampling rate and switch a bit width of a first ADC in the first front-end receiving link from a first bit width to a second bit width; control the first front-end receiving link to process a third signal corresponding to the second front-end receiving link to obtain a fourth signal, and transmit the fourth signal to the second signal processing module; and switch the second signal processing module from the first sampling rate to the second sampling rate. The third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode.

[0036] With reference to the second aspect, in a possible implementation, in a case where the first environmental interference intensity of the communication device is less than or equal to the interference intensity threshold, the switching module is configured to: adjust a clock signal output by a second phase-locked loop in the second front-end receiving link from a first clock signal to a second clock signal; switch a bit width of a second ADC in the second front-end receiving link from a first bit width corresponding to the first working mode to a second bit width corresponding to the second working mode; and control the second front-end receiving link to process a first signal corresponding to the first front-end receiving link to obtain a second signal, and transmit the second signal to the first signal processing module. The first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode.

[0037] With reference to the second aspect, in a possible implementation, the switching module is further configured to: adjust a clock signal output by a first phase-locked loop in the first front-end receiving link from a third clock signal to a fourth clock signal; switch a bit width of a first ADC in the first front-end receiving link from a first bit width to a second bit width; and control the first front-end receiving link to process a third signal corresponding to the second front-end receiving link to obtain a fourth signal, and transmit the fourth signal to the second signal processing module. The third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode.

[0038] With reference to the second aspect, in a possible implementation manner, the first signal receiving channel further includes a first antenna module, the second signal receiving channel further includes a second antenna module, the switching module includes a first switch module, a second switch module and a control module, the control module is connected with the first switch module, the second switch module, the first pre-receiving chain, the second pre-receiving chain, the first signal processing module and the second signal processing module respectively, the first switch module is connected with the first pre-receiving chain, the second pre-receiving chain, the first antenna module and the second antenna module respectively, and the second switch module is connected with the control module, the first pre-receiving chain, the second pre-receiving chain, the first signal processing module and the second signal processing module respectively. In a case where the first environmental interference intensity of the communication device is less than or equal to the interference intensity threshold, the control module is configured to: control the first switch module to disconnect the second antenna module from the second pre-receiving chain and establish a connection between the first antenna module and the second pre-receiving chain, wherein the first antenna module is configured to provide a first signal corresponding to the first pre-receiving chain, and the second antenna module is configured to provide a third signal corresponding to the second pre-receiving chain; and control the second switch module to disconnect the second pre-receiving chain from the second signal processing module and establish a connection between the second pre-receiving chain and the first signal processing module, so as to process the first signal through the second pre-receiving chain to obtain a second signal.

[0039] In the implementation manner, the switching module is composed of the first switch module, the second switch module and the control module. The first switch module and the second switch module are controlled by the control module, so that the first signal receiving channel can reuse the second pre-receiving chain in the process of switching the working mode, thereby ensuring the clock continuity of the first signal receiving channel. This implementation manner is simple and easy to implement, and can ensure the performance stability of the communication device while avoiding increasing the structural complexity and cost of the communication device.

[0040] With reference to the second aspect, in a possible implementation manner, the control module is further configured to: control the first switch module to establish a connection between the second antenna module and the first pre-receiving chain; and control the second switch module to establish a connection between the first pre-receiving chain and the second signal processing module, so as to process the third signal through the first pre-receiving chain to obtain a fourth signal.

[0041] In a possible implementation manner of the second aspect, the at least one signal receiving channel includes a first signal receiving channel, and the first signal receiving channel includes at least a first pre-receiving chain and a first signal processing module connected in sequence, and the first pre-receiving chain and the first signal processing module are connected with the switching module. In a case where the first environmental interference intensity of the communication device is less than or equal to the interference intensity threshold, the switching module is configured to: switch a sampling rate of the first pre-receiving chain and the first signal processing module from a first sampling rate to a second sampling rate, and / or switch a bit width of a first ADC in the first pre-receiving chain from a first bit width to a second bit width.

[0042] In a possible implementation manner of the second aspect, the first pre-receiving chain includes a first phase-locked loop and a second phase-locked loop. Before the sampling rate of the first pre-receiving chain and the first signal processing module is switched from the first sampling rate to the second sampling rate, and / or the bit width of the first ADC in the first pre-receiving chain is switched from the first bit width to the second bit width, the switching module is configured to: control the first pre-receiving chain to receive a second clock signal provided by the second phase-locked loop, and control the first pre-receiving chain to stop receiving a first clock signal provided by the first phase-locked loop. A clock frequency of the second clock signal corresponds to the second working mode, and a clock frequency of the first clock signal corresponds to the first working mode.

[0043] In the implementation manner, two phase-locked loops are arranged in the first pre-receiving chain. Before the working mode is switched, the switching module can be configured to control the first phase-locked loop to stop providing a clock signal required by the first pre-receiving chain in the first working mode, and control the second phase-locked loop to provide a clock signal required by the first pre-receiving chain in the second working mode. In this way, clock continuity of the first signal receiving channel during the working mode switching process is ensured, so that the communication device can continuously receive and process signals, thereby ensuring stable performance of the communication device 100.

[0044] In a possible implementation manner of the second aspect, the switching module includes a switching module and a control module, and the switching module is connected with the first phase-locked loop, the second phase-locked loop, a first mixer in the first pre-receiving chain, and the control module respectively. The control module is configured to control the second phase-locked loop to output the second clock signal. The control module is further configured to control the switching module to disconnect the first mixer from the first phase-locked loop, and establish a connection between the first mixer and the second phase-locked loop, so as to control the first pre-receiving chain to receive the second clock signal, and control the first pre-receiving chain to stop receiving the first clock signal.

[0045] In the implementation manner, the switching module is composed of a switching module and a control module. The control module controls the switching module to realize the function of controlling the first front-end receiving chain to receive the second clock signal and prohibiting the first front-end receiving chain to receive the first clock signal. The implementation manner is simple and easy to implement, and can avoid increasing the structural complexity and cost of the communication device while ensuring the stability of the performance of the communication device.

[0046] In combination with the second aspect, in a possible implementation manner, the switching module is further configured to switch the signal receiving channels from the second working mode to the first working mode when the second environmental interference intensity of the communication device is greater than the interference intensity threshold.

[0047] In the implementation, when the environmental interference intensity changes from small to large, the communication device increases the sampling rate of each signal receiving channel in at least one signal receiving channel included by the communication device and / or increases the bit width of the ADC included by the signal receiving channel, so that the anti-interference performance of the communication device can be ensured.

[0048] In the third aspect, the present application provides a communication device including at least one processor and a memory. The memory is configured to store a computer program. The processor is configured to execute the computer program stored in the memory, so that the communication device executes the communication method provided by the first aspect or any possible implementation manner of the first aspect.

[0049] In the fourth aspect, the present application provides a chip including at least a processor. The processor is configured to execute computer execution instructions, so that the device installed with the chip executes the communication method provided by the first aspect or any possible implementation manner of the first aspect.

[0050] In combination with the fourth aspect, in a possible implementation manner, the chip can further include an interface circuit. The interface circuit is configured to receive the computer execution instructions and transmit the computer execution instructions to the processor.

[0051] In the fifth aspect, the present application provides a computer program product including instructions. When the instructions are executed on a computer, the computer executes the method in the first aspect or any possible implementation manner of the first aspect.

[0052] In summary, the communication method and the communication device provided by the present application can ensure the anti-interference performance of the communication device while reducing the power consumption of the communication device. Therefore, the communication method and the communication device provided by the present application can effectively solve the problem of large power consumption of the existing GNSS receiver. BRIEF DESCRIPTION OF DRAWINGS

[0053] FIG. 1 is a structural schematic diagram of a communication device provided by the present application;

[0054] Fig. 2 is another structural schematic diagram of a communication apparatus provided in the present application;

[0055] Fig. 3 is another structural schematic diagram of a communication apparatus provided in the present application;

[0056] Fig. 4 is another structural schematic diagram of a communication apparatus provided in the present application;

[0057] Fig. 5 is another structural schematic diagram of a communication apparatus provided in the present application;

[0058] Fig. 6 is another structural schematic diagram of a communication apparatus provided in the present application;

[0059] Fig. 7 is another structural schematic diagram of a communication apparatus provided in the present application;

[0060] Fig. 8 is another structural schematic diagram of a communication apparatus provided in the present application;

[0061] Fig. 9 is another structural schematic diagram of a communication apparatus provided in the present application;

[0062] Fig. 10 is another structural schematic diagram of a communication apparatus provided in the present application;

[0063] Fig. 11 is another structural schematic diagram of a communication apparatus provided in the present application;

[0064] Fig. 12 is another structural schematic diagram of a communication apparatus provided in the present application;

[0065] Fig. 13 is another structural schematic diagram of a communication apparatus provided in the present application;

[0066] Fig. 14 is another structural schematic diagram of a communication apparatus provided in the present application;

[0067] Fig. 15 is another structural schematic diagram of a communication apparatus provided in the present application;

[0068] Fig. 16 is a flow schematic diagram of a communication method provided in the present application;

[0069] Fig. 17 is another flow schematic diagram of a communication method provided in the present application;

[0070] Fig. 18 is a structural schematic diagram of another communication apparatus provided in the present application. DETAILED DESCRIPTION

[0071] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings provided in the embodiments of the present application.

[0072] In order to solve the interference problem of the existing GNSS receiver, on the one hand, an adaptive anti-interference technology is proposed. The so-called adaptive anti-interference technology is to detect whether the environment around the receiver exists interference in real time by the interference detection module, and to suppress the detected environmental interference by the interference suppression module. On the other hand, the anti-interference performance of the receiver can also be ensured by designing high ADC bit width and high sampling rate for the receiver. However, the design of high ADC bit width and high sampling rate will result in large power consumption of the receiver, thereby resulting in poor applicability and practicability of the receiver.

[0073] Therefore, the technical problem to be solved by the present application is how to reduce the power consumption of the receiver while ensuring the anti-interference performance of the receiver, thereby improving the applicability and practicability of the receiver.

[0074] Embodiment one

[0075] To solve the above technical problem, the present application provides a communication device. The communication device comprises at least one signal receiving channel and a switching module. The switching module is used to switch the working mode of each of the at least one signal receiving channel from a first working mode to a second working mode when the environmental interference intensity of the communication device is small. The sampling rate of each of the signal receiving channels in the first working mode is greater than that in the second working mode, and / or the bit width of the ADC in each of the signal receiving channels in the first working mode is greater than that in the second working mode. When the environmental interference intensity is small, reducing the sampling rate of the signal receiving channels and / or reducing the bit width of the ADC contained in the signal receiving channels can effectively reduce the power consumption of the communication device without affecting the performance of the communication device. Therefore, by using the communication device provided by the present application, the problem of large power consumption of the existing GNSS receiver can be solved, and the applicability and practicability of the receiver can be improved.

[0076] The structure and working principle of the communication device provided by the present application will be described in detail below in combination with FIGS. 1 to 15.

[0077] Please refer to FIG. 1, which is a structure schematic diagram of a communication device provided by the present application. As shown in FIG. 1, the communication device 100 comprises at least one signal receiving channel and a switching module 10. Each of the at least one signal receiving channel is connected with the switching module 10. It should be understood that in actual implementation, each of the signal receiving channels exists independently, and each signal receiving channel can be used to independently receive a wireless signal and perform signal processing on the received wireless signal.

[0078] In actual work, the switching module 10 can be used to obtain the environmental interference intensity of the communication device 100 (for the convenience of distinction, the first environmental interference intensity will be used to replace the description below). It should be understood that in the embodiments of the present application, the environmental interference intensity of the communication device 100 refers to the signal intensity value of the interference signal that exists interference to the communication device 100, such as the signal intensity value of the co-frequency interference signal of the communication device 100, and the like. The present application does not make specific limitation on the type of the interference signal of the communication device 100. The switching module 10 is also used to switch the working mode of each signal receiving channel from the first working mode to the second working mode in the case where it is determined that the first environmental interference intensity is less than or equal to the preset interference intensity threshold. Wherein the first sampling rate of each signal receiving channel in the first working mode is greater than the second sampling rate of each channel receiving channel in the second working mode, and / or the first bit width of the ADC in each signal receiving channel in the first working mode is greater than the second bit width of the ADC in each signal receiving channel in the second working mode. In other words, the switching module is used to adjust the sampling rate of each signal receiving channel from the first sampling rate to the second sampling rate, or adjust the bit width of the ADC in each signal receiving channel from the first bit width to the second bit width, or adjust the sampling rate of each signal receiving channel from the first sampling rate to the second sampling rate and adjust the bit width of the ADC in each signal receiving channel from the first bit width to the second bit width, so as to switch the working mode of each signal receiving channel from the first working mode to the second working mode in the case where it is determined that the first environmental interference intensity is less than or equal to the preset interference intensity threshold.

[0079] It should be noted that in some possible implementations, the communication device 100 provided by the present application can be a communication device that is adapted or supports adaptive anti-interference technology, which is internally provided with an interference detection module and an anti-interference module. The interference detection module is used to detect the intensity value of the interference signal in the surrounding environment of the communication device 100. That is, in the case where the communication device 100 is provided with an interference detection module, the first environmental interference intensity can be detected by the interference detection module and provided to the switching module 10.

[0080] In the implementation described above, in the case that the environmental interference intensity of the communication apparatus 100 is small, the switching module 10 reduces the sampling rate of each of the at least one signal receiving channel included in the communication apparatus 100 and / or reduces the bit width of the ADC in each of the signal receiving channels, thereby switching the operation mode of each of the signal receiving channels from the first operation mode to the second operation mode. In the case that the environmental interference intensity is small, reducing the sampling rate of the signal receiving channel and / or reducing the bit width of the ADC included in the signal receiving channel can effectively reduce the power consumption of the communication apparatus 100 without affecting the performance of the communication apparatus 100. Therefore, by using the communication apparatus 100 provided in the present application, the problem of large power consumption caused by the existing GNSS receiver to ensure the anti-interference performance can be solved, thereby improving the applicability and practicality of the GNSS receiver.

[0081] In some possible implementation manners, referring to FIG. 2, FIG. 2 is another structural schematic diagram of a communication apparatus provided in the present application. As shown in FIG. 2, the at least one signal receiving channel can include a first signal receiving channel 20 and a second signal receiving channel 30. Moreover, the working frequency band of the first signal receiving channel 20 and the working frequency band of the second signal receiving channel 30 are different. For example, the working frequency band (for the convenience of distinction, hereinafter referred to as the first working frequency band) of the first signal receiving channel 20 can be the L1 frequency band. Here, the L1 frequency band is one of the most commonly used frequency bands in the global satellite navigation system, and the center frequency thereof is 1575.42 MHz. The working frequency band (for the convenience of distinction, hereinafter referred to as the second working frequency band) of the second signal receiving channel 30 can be the L5 frequency band. The L5 frequency band is a newly used frequency band in the global satellite navigation system, and the center frequency thereof is 1176.45 MHz. It should be understood that the description of the working frequency band of each of the signal receiving channels is only exemplary, and in actual implementation, the working frequency band of each of the signal receiving channels can also be another specific frequency band, which is not limited in the present application. In addition, the at least one signal receiving channel can also be only part of the signal receiving channels included in the communication apparatus 100 that can realize the switching of the operation mode. That is, the communication apparatus 100 can further include other signal receiving channels in addition to the at least one signal receiving channel, and these other signal receiving channels will not be controlled by the switching module 10 to switch the operation mode.

[0082] In actual work, the first signal receiving channel 20 can be used to receive a wireless signal (for the sake of distinction, the fifth signal will be used in the following description) and the signal frequency of the fifth signal should be included in the first operating frequency band. The first signal receiving channel 20 can also be used to process the fifth signal to obtain the information carried by the fifth signal (for the sake of distinction, the first information will be used in the following description). Similarly, the second signal receiving channel 30 can be used to receive another wireless signal (for the sake of distinction, the sixth signal will be used in the following description) and the signal frequency of the sixth signal should be included in the second operating frequency band. The second signal receiving channel can also be used to process the sixth signal to obtain the information carried by the sixth signal (for the sake of distinction, the second information will be used in the following description).

[0083] In an optional implementation, based on the structure shown in FIG. 2, please refer to FIG. 3, which is another structure of a communication device provided by the present application. As shown in FIG. 3, the first signal receiving channel 20 can include a first pre-receiving link 201 and a first signal processing module 202. The second signal receiving channel 30 includes a second pre-receiving link 301 and a second signal processing module 302. The first pre-receiving link 201 can include a first ADC 2011 and the second pre-receiving link 301 can include a second ADC 3011. The first pre-receiving link 201 and the first signal processing module 202 are connected, and the second pre-receiving link 301 and the second signal processing module 302 are connected. The first pre-receiving link 201, the first signal processing module 202, the second pre-receiving link 301 and the second signal processing module 302 are respectively connected with the switching module 10. And the switching module 10 is also respectively connected with the first ADC 2011 and the second ADC 3011.

[0084] In actual work, when it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold, the switching module 10 can be used to switch the sampling rate of the first pre-receiving link 201, the sampling rate of the first signal processing module 202, the sampling rate of the second pre-receiving link 301 and the sampling rate of the second signal processing module 302 from the first sampling rate to the second sampling rate, thereby switching the operating mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the first operating mode to the second operating mode.

[0085] Alternatively, in a case where it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold, the switching module 10 can be configured to switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 and the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the first bit width to the second bit width, thereby switching the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the first working mode to the second working mode.

[0086] Alternatively, in a case where it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold, the switching module 10 can be configured to switch the sampling rate of the first front-end receiving chain 201, the sampling rate of the first signal processing module 202, the sampling rate of the second front-end receiving chain 301, and the sampling rate of the second signal processing module 302 from the first sampling rate to the second sampling rate, and switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 and the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the first bit width to the second bit width, thereby switching the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the first working mode to the second working mode.

[0087] Optionally, based on the structure shown in FIG. 3, referring to FIG. 4, FIG. 4 is another structure of a communication device provided by the present application. As shown in FIG. 4, the first front-end receiving chain 201 can further include a first phase-locked loop 2012 and a first voltage-controlled oscillator (VCO) 2013, and the second front-end receiving chain 301 can further include a second phase-locked loop 3012 and a second VCO 3013. The first phase-locked loop 2012, the first VCO 2013, the second phase-locked loop 3012, and the second VCO 3013 are respectively connected to the switching module 10. In addition, the first signal processing module 202 is connected to the first ADC 2011, and the second signal processing module 302 is connected to the second ADC 3011.

[0088] In actual work, before the sampling rate of the first front-end receiving chain 201, the sampling rate of the first signal processing module 202, the sampling rate of the second front-end receiving chain 301, and the sampling rate of the second signal processing module 302 are switched from the first sampling rate to the second sampling rate, and / or, the bit width of the first ADC 2011 and the bit width of the second ADC 3011 are switched from the first bit width to the second bit width, the switching module 10 is further configured to disable the first VCO 2013 from outputting the first clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012. In other words, the switching module 10 is further configured to disable the first phase-locked loop 2012 from receiving the first clock signal from the first VCO 2013 through the switching module 10, and to disable the second phase-locked loop 3012 from receiving the first clock signal from the first VCO 2013 through the switching module 10. It should be understood that, before the switching module 10 performs the above-mentioned switching function, the first VCO 2013 can be configured to simultaneously provide the clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012 through the switching module 10. Moreover, since the working frequency bands of the first signal receiving channel 20 and the second signal receiving channel 30 are different, the clock signals required by the first phase-locked loop 2012 and the second phase-locked loop 3012 are also different, and therefore the switching module 10 can provide the first clock signal to the first phase-locked loop 2012, and can provide the first clock signal that has been divided or multiplied (for the convenience of understanding, hereinafter referred to as a third clock signal) to the second phase-locked loop 3012. That is to say, before the switching module 10 performs the above-mentioned function, the switching module 10 can directly output the first clock signal output by the first VCO 2013 to the first phase-locked loop 2012. The switching module 10 can also divide or multiply the first clock signal to obtain the third clock signal, and then output the third clock signal to the second phase-locked loop 3012. It should be noted that the clock frequency of the first clock signal corresponds to the first working mode. That is to say, the first clock signal is the clock signal required by the first signal receiving channel 20 working in the first working mode, and the third clock signal is the clock signal required by the second signal receiving channel 30 working in the first working mode.

[0089] Further, the switching module 10 is also configured to control the second VCO 3013 to output a second clock signal to the first PLL 2012 and the second PLL 3012. Alternatively, the switching module 10 is also configured to enable the first PLL 2012 to receive the second clock signal from the second VCO 3013 through the switching module 10, and enable the second PLL 3012 to receive the second clock signal from the second VCO 3013 through the switching module 10. It should be understood that, since the working frequency bands of the first signal receiving channel 20 and the second signal receiving channel 30 are different, the switching module 10 can directly output the second clock signal output by the second VCO 3013 to the second PLL 3012, and can also perform frequency division or frequency multiplication on the second clock signal to obtain a frequency-divided or frequency-multiplied second clock signal (for the convenience of understanding, hereinafter, the fourth clock signal will be used instead of description), and then output the fourth clock signal to the first PLL 2012. It should be noted that the clock frequency of the second clock signal corresponds to the second working mode. That is, the fourth clock signal is the clock signal required for the first signal receiving channel 20 to work in the second working mode, and the second clock signal is the clock signal required for the second signal receiving channel 30 to work in the second working mode.

[0090] In short, before switching from the first working mode to the second working mode, the switching module 10 can control the first VCO 2013 to stop providing the clock signal required for the first PLL 2012 and the second PLL 3012 in the first working mode, and simultaneously control the second VCO 3013 to provide the clock signal required for the first PLL 2012 and the second PLL 3012 in the second working mode.

[0091] In the above implementation, before the working mode switching, the switching module 10 can be configured to control the first VCO 2013 in the first front-end receiving chain 201 to stop providing the first clock signal corresponding to the first working mode to the first PLL 2012 in the first front-end receiving chain 201 and the second PLL 3012 in the second front-end receiving chain 301, and simultaneously control the second VCO 3013 in the second front-end receiving chain 301 to provide the second clock signal corresponding to the second working mode to the first PLL 2012 and the second PLL 3012, so as to ensure the clock continuity of the first signal receiving channel 20 and the second signal receiving channel 30 during the working mode switching, and enable the communication device 100 to continuously receive and process signals, thereby ensuring the stable performance of the communication device 100.

[0092] It should be noted that, preferably, before the first VCO 2013 is prohibited from outputting the first clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012, the switching module 10 can first control the second VCO 3013 to start outputting the second clock signal, and when the clock frequency of the second clock signal is stable, the first VCO 2013 is prohibited from outputting the first clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012.

[0093] Optionally, referring to FIG. 5, FIG. 5 is another structural schematic diagram of a communication apparatus provided by the present application. As shown in FIG. 5, the switching module 10 can include a switch module 101, a first clock processing device 102, a second clock processing device 103, and a control module 104. The control module 104 is connected to the switch module 101, the first VCO 2013, the second VCO 3013, the first ADC 2011, the second ADC 3011, the first signal processing module 202, and the second signal processing module 302, respectively. The first VCO 2013 is connected to the first phase-locked loop 2012 through the switch module 101, and the first VCO 2013 is also connected to the second phase-locked loop 3012 through the first clock processing device 102 and the switch module 101. The second VCO 3013 is connected to the second phase-locked loop 3012 through the switch module 101, and the second VCO 3013 is also connected to the first phase-locked loop 2012 through the second clock processing device 103 and the switch module 101.

[0094] In actual work, before the above-mentioned working mode switching operation is performed, the control module 104 can be used to control the switch module 101 to disconnect the first VCO 2013 from the first phase-locked loop 2012 and the second phase-locked loop 3012, so as to prohibit the first VCO 2013 from outputting the first clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012. The control module 104 can also be used to control the second VCO 3013 to generate the second clock signal, and control the switch module 101 to connect the second VCO 3013 to the first phase-locked loop 2012 and the second phase-locked loop 3012, so that the second VCO 3013 can output the second clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012.

[0095] It should be understood that, in the case that the first VCO 2013 outputs the above-mentioned first clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012, the first clock processing device 102 receives the first clock signal output by the first VCO 2013, performs frequency division or frequency multiplication on the first clock signal to obtain the above-mentioned third clock signal, and outputs the third clock signal to the second phase-locked loop 3012 through the switch module 101. Similarly, in the case that the second VCO 3013 outputs the second clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012, the second clock processing device 103 receives the second clock signal output by the second VCO 3013, performs frequency division or frequency multiplication on the second clock signal to obtain the above-mentioned fourth clock signal, and outputs the fourth clock signal to the first phase-locked loop 2012 through the switch module 101.

[0096] It should be further understood that, in the case of the structure shown in FIG. 5, the control module 104 can also be used to obtain the above-mentioned first environmental interference intensity, and in the case that the first environmental interference intensity is determined to be less than or equal to the interference intensity threshold value, switch the sampling rates of the first front-end receiving chain 201, the first signal processing module 202, the second front-end receiving chain 301 and the second signal processing module 302 from the first sampling rate to the second sampling rate, and / or switch the bit widths of the first ADC 2011 and the second ADC 3011 from the first bit width to the second bit width.

[0097] In the above-mentioned implementation, the switching module 10 is composed of the switch module 101, the first clock processing device 102, the second clock processing device 103 and the control module 104. The control module 104 controls the switch module 101 to control the connection relationship between the first VCO 2013 and the first phase-locked loop 2012 and the second phase-locked loop 3012, and the connection relationship between the second VCO 3013 and the first phase-locked loop 2012 and the second phase-locked loop 3012, thereby ensuring the clock continuity of the first signal receiving channel 20 and the second signal receiving channel 30. This implementation is simple and easy to implement, and can ensure the stable performance of the communication device 100 while avoiding increasing the structural complexity and cost of the communication device 100.

[0098] Optionally, based on the structure shown in FIG. 5, please refer to FIG. 6, which is another structure of the communication device provided by the present application. As shown in FIG. 6, the switch module 101 can include a first controllable switch device 1011 and a second controllable switch device 1012. The first end of the first controllable switch device 1011 is connected to the first PLL 2012, the second end is connected to the control module 104, the third end is connected to the first VCO 2013, and the fourth end is connected to the second PLL 3012 through the second clock processing device 103. The first end of the second controllable switch device 1012 is connected to the second PLL 3012, the second end is connected to the control module 104, the third end is connected to the second VCO 3013, and the fourth end is connected to the first PLL 2012 through the first clock processing device 102.

[0099] In actual work, the control module 104 can control the first controllable switch device 1011 to disconnect the connection between the first end and the third end through the second end of the first controllable switch device 1011, and the control module 104 can also control the second controllable switch device 1012 to disconnect the connection between the first end and the fourth end through the second end of the second controllable switch device 1012, so as to disconnect the connection between the first VCO 2013 and the first PLL 2012 and the second PLL 3012. Further, the control module 104 can control the first controllable switch device 1011 to establish the connection between the first end and the fourth end through the second end of the first controllable switch device 1011, and the control module 104 can also control the second controllable switch device 1012 to establish the connection between the first end and the third end through the second end of the second controllable switch device 1012, so as to establish the connection between the second VCO 3013 and the first PLL 2012 and the second PLL 3012.

[0100] In the above implementation, the switch module 101 is composed of two controllable switch devices, which is simple and easy to implement, and is more conducive to reducing the cost and structural complexity of the communication device 100.

[0101] Further, based on the structure shown in FIG. 6, please refer to FIG. 7, which is another structure of the communication device provided by the present application. As shown in FIG. 7, the first pre-receiving chain 201 can further include a gain-adjustable low noise amplifier (LNA) (which can be simply referred to as iLNA) 2014, a first mixer 2015, a low pass filter (LPF) 2016, and a variable gain amplifier (which can be simply referred to as VGA) 2017. The first signal receiving channel 20 further includes a first antenna module 203. Wherein, the iLNA 2014 is connected with the first antenna module 203 and the first mixer 2015 respectively, the first mixer 2015 is further connected with the LPF 2016 and the first phase-locked loop 2012 respectively, the LPF 2016 is further connected with the VGA 2017, and the VGA 2017 is further connected with the first ADC 2011. Similarly, the second pre-receiving chain 301 can further include an iLNA 3014, a second mixer 3015, an LPF 3016, and a VGA 3017. The second signal receiving channel 30 further includes a second antenna module 303. Wherein, the iLNA 3014 is connected with the second antenna module 303 and the second mixer 3015 respectively, the second mixer 3015 is further connected with the LPF 3016 and the second phase-locked loop 3012 respectively, the LPF 3016 is further connected with the VGA 3017, and the VGA 3017 is further connected with the second ADC 3011.

[0102] In actual work, the first antenna module 203 can be used to receive the fifth signal, filter and amplify the fifth signal to obtain the first signal, and transmit the first signal to the first pre-receiving chain 201. The iLNA 2014 is used to amplify the first signal and transmit the amplified first signal to the first mixer 2015. The first mixer 2015 is used to mix the signal from the iLNA 2014 based on the clock signal provided by the first phase-locked loop 2012 or the second phase-locked loop 3012, and transmit the mixed signal to the LPF 2016. The LPF 2016 is used to filter the signal from the first mixer 2015, and transmit the filtered signal to the VGA 2017. The VGA 2017 is used to amplify the signal from the VGA 2017, and transmit the amplified signal to the first ADC 2011. The first ADC 2011 is used to perform analog-to-digital conversion on the signal from the VGA 2017 to obtain the second signal, and transmit the second signal to the first signal processing module 202. The first signal processing module 202 can be used to process the second signal to obtain the first information carried by the second signal.

[0103] Similarly, the second antenna module 303 can be used to receive the sixth signal described above, filter and amplify the sixth signal to obtain the third signal described above, and transmit the third signal to the second front-end receiving chain 301. The i LNA 3014 is configured to amplify the third signal described above, and transmit the amplified third signal to the second mixer 3015. The second mixer 3015 is configured to mix the signal from the i LNA 3014 based on the clock signal provided by the second phase-locked loop 3012 or the first phase-locked loop 2012, and transmit the mixed signal to the LPF 3016. The LPF 3016 is configured to filter the signal from the second mixer 3015, and transmit the filtered signal to the VGA 3017. The VGA 3017 is configured to amplify the signal from the LPF 3016, and transmit the amplified signal to the second ADC 3011. The second ADC 3011 is configured to convert the signal from the VGA 3017 into the fourth signal described above, and transmit the fourth signal to the second signal processing module 302. The second signal processing module 302 can be configured to process the fourth signal to obtain the second information carried by the fourth signal.

[0104] Optionally, based on the structure shown in FIG. 3, please refer to FIG. 8, which is another structure of the communication device provided by the present application. As shown in FIG. 8, the first front-end receiving chain 201 further includes the first phase-locked loop 2012, and the second front-end receiving chain 301 further includes the second phase-locked loop 3012.

[0105] In the first possible implementation, when it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold, the switching module 10 can be configured to adjust the clock signal output by the second phase-locked loop 3012 from the first clock signal to the second clock signal. The first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode. In other words, the first clock signal is the clock signal required by the second front-end receiving chain 301 in the first working mode, and the second clock signal is the clock signal required by the first front-end receiving chain 201 in the second working mode.

[0106] Further, the switching module 10 can also switch the sampling rate of the second front-end receiving chain 301 from a first sampling rate corresponding to the first working mode to a second sampling rate corresponding to the second working mode. Alternatively, the switching module 10 can also switch the sampling rate of the second front-end receiving chain 301 from the first sampling rate to the second sampling rate and switch the bit width of the second ADC 3011 in the second front-end receiving chain 301 from a first bit width corresponding to the first working mode to a second bit width corresponding to the second working mode. In this way, the second front-end receiving chain 301 can be switched from the first working mode to the second working mode. Then, the switching module 10 is further configured to control the second front-end receiving chain 301 to process a first signal corresponding to the first front-end receiving chain 201 to obtain a second signal and transmit the second signal to the first signal processing module 202. It should be understood that the first signal corresponding to the first front-end receiving chain 201 is a signal received and processed by the first signal receiving channel 20, and in the case that the first signal receiving channel 20 and the second signal receiving channel 30 both work in the first working mode, the signal will be received and processed by the first front-end receiving chain 201. That is, the switching module 10 can be used to forward the first signal that should be transmitted to the first front-end receiving chain 201 to the second front-end receiving chain 301, so as to obtain the second signal based on the first signal processing by the second front-end receiving chain 301, and forward the second signal output by the second front-end receiving chain 301 to the first signal processing module 202. Further, the switching module 10 is further configured to switch the sampling rate of the first signal processing module 202 from the first sampling rate to the second sampling rate, so as to complete the switching of the working mode of the first signal receiving channel 20 from the first working mode to the second working mode.

[0107] In the above implementation, in the case that it is determined that the working mode switching of the first signal receiving channel 20 and the second signal receiving channel 30 is needed, the working mode of the second front-end receiving chain 301 is first switched from the first working mode to the second working mode, and then the second front-end receiving chain 301 replaces the first front-end receiving chain 201 to realize the corresponding functions. Through the multiplexing of the second front-end receiving chain 301, the clock of the first signal receiving channel 20 can be ensured to be continuous, and the interruption of the received signal caused by the working mode switching can be avoided, thereby ensuring the performance stability of the communication device 100.

[0108] Further, the switching module 10 can also adjust the clock signal output by the first phase-locked loop 2012 in the first front-end receiving chain 201 from a third clock signal to a fourth clock signal. The third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode. In other words, the third clock signal is the clock signal required by the first front-end receiving chain 201 in the first working mode, and the fourth clock signal is the clock signal required by the second front-end receiving chain 301 in the second working mode. The switching module 10 is also configured to switch the sampling rate of the first front-end receiving chain 201 from a first sampling rate to a second sampling rate. Alternatively, the switching module 10 can be configured to switch the sampling rate of the first front-end receiving chain 201 from the first sampling rate to the second sampling rate and switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 from a first bit width to a second bit width. It should be noted that when the switching module 10 only switches the sampling rate of the second front-end receiving chain 301 from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode, the switching module 10 will only switch the sampling rate of the first front-end receiving chain 201 from the first sampling rate to the second sampling rate. When the switching module 10 switches the sampling rate of the second front-end receiving chain 301 from the first sampling rate to the second sampling rate and switches the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the first bit width to the second bit width, the switching module 10 will also switch the sampling rate of the first front-end receiving chain 201 from the first sampling rate to the second sampling rate and switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 from the first bit width to the second bit width.

[0109] Then, the switching module 10 can control the first front-end receiving chain 201 to process the third signal corresponding to the second front-end receiving chain to obtain a fourth signal, and transmit the fourth signal to the second signal processing module. It should be understood that the third signal corresponding to the second front-end receiving chain 301 is the signal received and processed by the second signal receiving channel 30, and in the case that the first signal receiving channel 20 and the second signal receiving channel 30 both work in the first working mode, the signal will be received and processed by the second front-end receiving chain 301. That is, the switching module 10 can also be used to forward the third signal that should be transmitted to the second front-end receiving chain 301 to the first front-end receiving chain 201, so as to process the third signal based on the first front-end receiving chain 201 to obtain the fourth signal, and forward the fourth signal output by the first front-end receiving chain 201 to the second signal processing module 302. That is, the second signal receiving channel 30 multiplexes the first front-end receiving chain 201. Further, the switching module 10 can also be used to switch the sampling rate of the second signal processing module 302 from the first sampling rate to the second sampling rate. At this point, the switching module 10 completes the switching of the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the first working mode to the second working mode.

[0110] In the second possible implementation, when it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold, the switching module 10 can be used to adjust the clock signal output by the second phase-locked loop 3012 from the first clock signal to the second clock signal. Here, the description of the first clock signal and the second clock signal can refer to the corresponding description in the first possible implementation described above, and will not be repeated here.

[0111] Further, the switching module 10 can also switch the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the first bit width corresponding to the first working mode to the second bit width corresponding to the second working mode, so as to realize the switching of the second front-end receiving chain 301 from the first working mode to the second working mode. Then, the switching module 10 is also used to control the second front-end receiving chain 301 to process the first signal corresponding to the first front-end receiving chain 201 to obtain a second signal, and transmit the second signal to the first signal processing module 202. The specific process can be referred to the corresponding description in the first possible implementation described above, and will not be repeated here.

[0112] In the above implementation, in a case where it is determined that the working mode switching of the first signal receiving channel 20 and the second signal receiving channel 30 is needed, the working mode of the second pre-receiving link 301 is switched from the first working mode to the second working mode, and the corresponding function is realized by the second pre-receiving link 301 instead of the first pre-receiving link 201. Through multiplexing of the second pre-receiving link 301, the clock continuity of the first signal receiving channel 20 can be ensured, and the interruption of the received signal caused by the working mode switching can be avoided, thereby ensuring the performance stability of the communication device 100.

[0113] Further, the switching module 10 can also adjust the clock signal output by the first phase-locked loop 2012 in the first pre-receiving link 201 from the third clock signal to the fourth clock signal. Here, the description of the third clock signal and the fourth clock signal can be referred to the corresponding description in the first possible specific implementation above, which will not be repeated here. The switching module 10 is also used to switch the bit width of the first ADC 2011 in the first pre-receiving link 201 from the first bit width to the second bit width. It should be noted that in a case where the switching module 10 only switches the sampling rate of the second pre-receiving link 301 from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode, the switching module 10 will only switch the sampling rate of the first pre-receiving link 201 from the first sampling rate to the second sampling rate. In a case where the switching module 10 switches the sampling rate of the second pre-receiving link 301 from the first sampling rate to the second sampling rate and switches the bit width of the second ADC 3011 in the second pre-receiving link 301 from the first bit width to the second bit width, the switching module 10 will also switch the sampling rate of the first pre-receiving link 201 from the first sampling rate to the second sampling rate and switch the bit width of the first ADC 2011 in the first pre-receiving link 201 from the first bit width to the second bit width.

[0114] Then, the switching module 10 can control the first pre-receiving link 201 to process the third signal corresponding to the second pre-receiving link to obtain a fourth signal, and transmit the fourth signal to the second signal processing module. The specific process can be referred to the corresponding description in the first possible specific implementation above, which will not be repeated here. At this point, the switching module 10 completes the working mode switching of the first signal receiving channel 20 and the second signal receiving channel 30 from the first working mode to the second working mode.

[0115] Optionally, based on the structure shown in FIG. 8, please refer to FIG. 9, which is another structure of the communication device provided by the present application. As shown in FIG. 9, the first signal receiving channel 20 further comprises a first antenna module 203, and the second signal receiving channel 30 further comprises a second antenna module 303. The switching module 10 can comprise a first switch module 105, a second switch module 106 and a control module 104. The control module 104 is connected with the first switch module 105, the second switch module 106, the first pre-receiving link 201, the second pre-receiving link 301, the first signal processing module 202 and the second signal processing module 302 respectively. The first switch module 105 is connected with the first pre-receiving link 201, the second pre-receiving link 301, the first antenna module 203 and the second antenna module 303 respectively. The second switch module 106 is connected with the first pre-receiving link 201, the second pre-receiving link 301, the first signal processing module 202 and the second signal processing module 302 respectively. In other words, the first antenna module 203 is connected with the first pre-receiving link 201 and the second pre-receiving link 301 through the first switch module 105, the second antenna module 303 is connected with the first pre-receiving link 201 and the second pre-receiving link 301 through the first switch module 105, the first signal processing module 202 is connected with the first pre-receiving link 201 and the second pre-receiving link 301 through the second switch module 106, and the second signal processing module 302 is connected with the first pre-receiving link 201 and the second pre-receiving link 301 through the second switch module 106.

[0116] In actual work, when it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold, the control module 104 can be used to control the first switch module 105 to disconnect the second antenna module 303 from the second pre-receiving link 301, so that the second pre-receiving link 301 no longer receives the third signal output by the second antenna module 303. The control module 104 can also be used to establish a connection between the first antenna module 203 and the second pre-receiving link 301, so that the second pre-receiving link 301 can receive the first signal provided by the first antenna module 203. It should be understood that in this case, the control module 104 can also control the first switch module 105 to disconnect the first antenna module 203 from the first pre-receiving link 201, so as to ensure the signal receiving quality of the second pre-receiving link 301.

[0117] Further, the control module 104 is also configured to control the second switch module 106 to disconnect the second front-end receiving chain 301 from the second signal processing module 302 and connect the second front-end receiving chain 301 to the first signal processing module 202, so that the second front-end receiving chain 301 can transmit the second signal obtained based on the first signal processing to the first signal processing module 202, thereby realizing the operation of controlling the second front-end receiving chain 301 to process the first signal corresponding to the first front-end receiving chain 201 to obtain the second signal and transmit the second signal to the first signal processing module 202. It should be understood that in this case, the control module 104 can also control the second switch module 106 to disconnect the first front-end receiving chain 201 from the first signal processing module 202, so as to avoid the first signal processing module 202 from receiving the interference signal from the first front-end receiving chain 201.

[0118] Further, the control module 104 can be configured to control the first switch module 105 to connect the second antenna module 303 to the first front-end receiving chain 201, so that the first front-end receiving chain 201 can receive the third signal output by the second antenna module 303. In addition, the control module 104 can also be configured to control the second switch module 106 to connect the first front-end receiving chain 201 to the second signal processing module 302, so that the first front-end receiving chain 201 can transmit the fourth signal obtained based on the third signal processing to the second signal processing module 302, thereby realizing the operation of controlling the first front-end receiving chain 201 to process the third signal corresponding to the second front-end receiving chain 301 to obtain the fourth signal and transmit the fourth signal to the second signal processing module 302.

[0119] In the above implementation, the switching module 10 is composed of the first switch module 105, the second switch module 106 and the control module 104. The first switch module 105 and the second switch module 106 are controlled by the control module 104, so that the first signal receiving channel 20 can reuse the second front-end receiving chain 301 in the process of switching the working mode, thereby ensuring the clock continuity of the first signal receiving channel 20. This implementation is simple and easy to implement, which can ensure the performance stability of the communication device 100 while avoiding increasing the structural complexity and cost of the communication device 100.

[0120] It should be noted that in the case of the structure shown in FIG. 9, the control module 104 can also be configured to obtain the first environmental interference intensity, and switch the sampling rate of the first front-end receiving chain 201, the first signal processing module 202, the second front-end receiving chain 301 and the second signal processing module 302 from the first sampling rate to the second sampling rate, and / or switch the bit width of the first ADC 2011 and the second ADC 3011 from the first bit width to the second bit width, if it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold.

[0121] Optionally, based on the structure shown in FIG. 9, referring to FIG. 10, FIG. 10 is another structure of a communication device provided by the present application. As shown in FIG. 10, the first switch module 105 can include a first controllable switch device 1011 and a second controllable switch device 1012. The first end of the first controllable switch device 1011 is connected to the first antenna module 203, the second end thereof is connected to the control module 104, the third end thereof is connected to the first front-end receiving chain 201, and the fourth end thereof is connected to the second front-end receiving chain 301. The first end of the second controllable switch device 1012 is connected to the second antenna module 303, the second end thereof is connected to the control module 104, the third end thereof is connected to the second front-end receiving chain 301, and the fourth end thereof is connected to the first front-end receiving chain 201.

[0122] In actual work, the control module 104 can be configured to control the first end and the third end of the first controllable switch device 1011 to be connected through the second end thereof, so as to establish the connection between the first antenna module 203 and the first front-end receiving chain 201 and disconnect the connection between the first antenna module 203 and the second front-end receiving chain 301. In this case, the control module 104 can also control the first end and the third end of the second controllable switch device 1012 to be connected through the second end thereof, so as to establish the connection between the second antenna module 303 and the second front-end receiving chain 301 and disconnect the connection between the second antenna module 303 and the first front-end receiving chain 201.

[0123] Alternatively, the control module 104 can be configured to control the first end and the fourth end of the first controllable switch device 1011 to be connected through the second end thereof, so as to disconnect the connection between the first antenna module 203 and the first front-end receiving chain 201 and establish the connection between the first antenna module 203 and the second front-end receiving chain 301. In this case, the control module 104 can also control the first end and the fourth end of the second controllable switch device 1012 to be connected through the second end thereof, so as to disconnect the connection between the second antenna module 303 and the second front-end receiving chain 301 and establish the connection between the second antenna module 303 and the first front-end receiving chain 201.

[0124] Further, as shown in FIG. 10, the second switch module 106 can include a third controllable switch device 1061 and a fourth controllable switch device 1062. The first end of the third controllable switch device 1061 is connected to the first front-end receiving chain 201, the second end is connected to the control module 104, the third end is connected to the first signal processing module 202, and the fourth end is connected to the second signal processing module 302. The first end of the fourth controllable switch device 1062 is connected to the second front-end receiving chain 301, the second end is connected to the control module 104, the third end is connected to the second signal processing module 302, and the fourth end is connected to the first signal processing module 202.

[0125] In actual work, the control module 104 can be used to control the first end and the third end of the third controllable switch device 1061 to be connected through the second end, so as to establish the connection between the first signal processing module 202 and the first front-end receiving chain 201 and disconnect the connection between the first signal processing module 202 and the second front-end receiving chain 301. In this case, the control module 104 also controls the first end and the third end of the fourth controllable switch device 1062 to be connected through the second end, so as to establish the connection between the second signal processing module 302 and the second front-end receiving chain 301 and disconnect the connection between the second signal processing module 302 and the first front-end receiving chain 201.

[0126] Alternatively, the control module 104 can be used to control the first end and the fourth end of the third controllable switch device 1061 to be connected through the second end, so as to disconnect the connection between the first signal processing module 202 and the first front-end receiving chain 201 and establish the connection between the first signal processing module 202 and the second front-end receiving chain 301. In this case, the control module 104 also controls the first end and the fourth end of the fourth controllable switch device 1062 to be connected through the second end, so as to disconnect the connection between the second signal processing module 302 and the second front-end receiving chain 301 and establish the connection between the second signal processing module 302 and the first front-end receiving chain 201.

[0127] In the above implementation, the switch module is composed of controllable switch devices, which is simple and easy to implement, and is more conducive to reducing the cost and structural complexity of the communication device 100.

[0128] Further, as shown in FIG. 10, the first pre-receiving chain 201 can further include an iLNA 2014, a first mixer 2015, an LPF 2016, a VGA 2017. Wherein, the iLNA 2014 is connected with the third end of the first controllable switch device 1011, the fourth end of the second controllable switch device 1012 and the first mixer 2015 respectively, the first mixer 2015 is further connected with the LPF 2016 and the first PLL 2012 respectively, the LPF 2016 is further connected with the VGA 2017, and the VGA 2017 is further connected with the first ADC 2011. Similarly, the second pre-receiving chain 301 can further include an iLNA 3014, a second mixer 3015, an LPF 3016, a VGA 3017. Wherein, the iLNA 3014 is connected with the fourth end of the first controllable switch device 1011, the third end of the second controllable switch device 1012 and the second mixer 3015 respectively, the second mixer 3015 is further connected with the LPF 3016 and the second PLL 3012 respectively, the LPF 3016 is further connected with the VGA 3017, and the VGA 3017 is further connected with the second ADC 3011.

[0129] In actual work, in the case that the first signal receiving channel 20 and the second signal receiving channel 30 both work in the first working mode described above, the first antenna module 203 can be used to receive a fifth signal, filter and amplify the fifth signal to obtain the first signal described above, and transmit the first signal to the first pre-receiving chain 201 through the first controllable switch device 1011. The iLNA 2014 is used to amplify the first signal described above and transmit the amplified first signal to the first mixer 2015. The first mixer 2015 is used to mix the signal from the iLNA 2014 based on the clock signal provided by the first PLL 2012 or the second PLL 3012, and transmit the mixed signal to the LPF 2016. The LPF 2016 is used to filter the signal from the first mixer 2015, and transmit the filtered signal to the VGA 2017. The VGA 2017 is used to amplify the signal from the VGA 2017, and transmit the amplified signal to the first ADC 2011. The first ADC 2011 is used to perform analog-to-digital conversion on the signal from the VGA 2017 to obtain a corresponding second signal, and transmit the second signal to the first signal processing module 202 through the third controllable switch device 1061. The first signal processing module 202 can be used to process the second signal to obtain the first information carried by the second signal.

[0130] Similarly, the second antenna module 303 can be configured to receive a sixth signal, filter and amplify the sixth signal to obtain the third signal, and transmit the third signal to the second front-end receiving chain 301 through the second controllable switch device 1012. The iLNA 3014 is configured to amplify the third signal, and transmit the amplified third signal to the second mixer 3015. The second mixer 3015 is configured to mix the signal from the iLNA 3014 based on the clock signal provided by the second phase-locked loop 3012 or the first phase-locked loop 2012, and transmit the mixed signal to the LPF 3016. The LPF 3016 is configured to filter the signal from the second mixer 3015, and transmit the filtered signal to the VGA 3017. The VGA 3017 is configured to amplify the signal from the LPF 3016, and transmit the amplified signal to the second ADC 3011. The second ADC 3011 is configured to convert the signal from the VGA 3017 into the fourth signal, and transmit the fourth signal to the second signal processing module 302 through the fourth controllable switch device 1062. The second signal processing module 302 can be configured to process the fourth signal to obtain the second information carried by the fourth signal.

[0131] Alternatively, when the first signal receiving channel 20 and the second signal receiving channel 30 both work in the second working mode described above, the first antenna module 203 can be configured to receive a fifth signal, filter and amplify the fifth signal to obtain the first signal, and transmit the first signal to the second front-end receiving chain 301 through the first controllable switch device 1011. Correspondingly, the components in the second front-end receiving chain 301 can be configured to process the first signal into the second signal, and transmit the second signal to the first signal processing module 202 through the fourth controllable switch device 1062. The first signal processing module 202 can be configured to process the second signal to obtain the first information carried by the second signal.

[0132] Similarly, the second antenna module 303 can be configured to receive a sixth signal, filter and amplify the sixth signal to obtain the third signal, and transmit the third signal to the second front-end receiving chain 301 through the second controllable switch device 1012. The iLNA 3014 is configured to amplify the third signal, and transmit the amplified third signal to the second mixer 3015. The second mixer 3015 is configured to mix the signal from the iLNA 3014 based on the clock signal provided by the second phase-locked loop 3012 or the first phase-locked loop 2012, and transmit the mixed signal to the LPF 3016. The LPF 3016 is configured to filter the signal from the second mixer 3015, and transmit the filtered signal to the VGA 3017. The VGA 3017 is configured to amplify the signal from the LPF 3016, and transmit the amplified signal to the second ADC 3011. The second ADC 3011 is configured to convert the signal from the VGA 3017 into the fourth signal, and transmit the fourth signal to the second signal processing module 302 through the fourth controllable switch device 1062. The second signal processing module 302 can be configured to process the fourth signal to obtain the second information carried by the fourth signal.

[0133] In some possible implementation manners, based on the structure shown in FIG. 1, referring to FIG. 11, FIG. 11 is another structural schematic diagram of a communication apparatus provided by the present application. As shown in FIG. 11, the at least one signal receiving channel includes a first signal receiving channel 20. The first signal receiving channel 20 at least includes a first pre-receiving link 201 and a first signal processing module 202 connected with each other. The first pre-receiving link 201 and the first signal processing module 202 are connected with the switching module 10 respectively. Further, the first pre-receiving link 201 can further include a first ADC 2011, and the first ADC 2011 is connected with the switching module 10.

[0134] In actual work, in the case that the first environmental interference intensity of the communication apparatus 100 is less than or equal to the interference intensity threshold value, the switching module 10 can be used to switch the sampling rate of the first pre-receiving link 201 and the first signal processing module 202 from the first sampling rate to the second sampling rate.

[0135] Alternatively, in the case that the first environmental interference intensity of the communication apparatus 100 is less than or equal to the interference intensity threshold value, the switching module 10 can be used to switch the bit width of the first ADC 2011 from the first bit width to the second bit width.

[0136] Further alternatively, in the case that the first environmental interference intensity of the communication apparatus 100 is less than or equal to the interference intensity threshold value, the switching module 10 can be used to switch the sampling rate of the first pre-receiving link 201 and the first signal processing module 202 from the first sampling rate to the second sampling rate, and switch the bit width of the first ADC 2011 from the first bit width to the second bit width.

[0137] Optionally, based on the structure shown in FIG. 11, referring to FIG. 12, FIG. 12 is another structural schematic diagram of a communication apparatus provided by the present application. As shown in FIG. 12, the first pre-receiving link 201 includes a first phase-locked loop 2012 and a second phase-locked loop 3012. The first phase-locked loop 2012 and the second phase-locked loop 3012 are connected with the switching module 10 respectively.

[0138] In actual work, before switching the sampling rate of the first front-end receiving chain 201 and the first signal processing module 202 from the first sampling rate to the second sampling rate, and / or switching the bit width of the first ADC 2011 in the first front-end receiving chain 201 from the first bit width to the second bit width, the switching module 10 can be configured to control the second phase-locked loop 3012 to provide a second clock signal. The switching module 10 is further configured to control the first front-end receiving chain 201 to receive the second clock signal provided by the second phase-locked loop 3012 and to disable the first front-end receiving chain 201 from receiving the first clock signal provided by the first phase-locked loop 2012. The clock frequency of the second clock signal corresponds to the second working mode, and the clock frequency of the first clock signal corresponds to the first working mode. Alternatively, the second clock signal is a clock signal required by the first signal receiving channel 20 to work in the second working mode, and the first clock signal is a clock signal required by the first signal receiving channel 20 to work in the first working mode.

[0139] In short, the first front-end receiving chain 201 is provided with the first phase-locked loop 2012 and the second phase-locked loop 3012, and before switching from the first working mode to the second working mode, the switching module 10 can control the first phase-locked loop 2012 to stop providing the clock signal required by the first front-end receiving chain in the first working mode, and control the second phase-locked loop 3012 to provide the clock signal required by the first front-end receiving chain 201 in the second working mode.

[0140] In the above implementation, the first front-end receiving chain 201 is provided with two phase-locked loops, and before switching the working mode, the switching module 10 can be configured to control the first phase-locked loop 2012 to stop providing the clock signal required by the first front-end receiving chain in the first working mode, and control the second phase-locked loop 3012 to provide the clock signal required by the first front-end receiving chain 201 in the second working mode, so as to ensure the clock continuity of the first signal receiving channel 20 during the working mode switching process, so that the communication device 100 can continuously receive and process signals, thereby ensuring the stable performance of the communication device 100.

[0141] Optionally, based on the structure shown in FIG. 12, please refer to FIG. 13, which is another structure of a communication device provided by the present application. As shown in FIG. 13, the switching module 10 can include a switch module 101 and a control module 104. The first front-end receiving chain 201 can further include a first mixer 2015. The switch module 101 is connected to the first phase-locked loop 2012, the second phase-locked loop 3012, the first mixer 2015, and the control module 104, respectively.

[0142] In actual work, the control module 104 can be configured to control the second phase-locked loop 3012 to output the second clock signal. The control module 104 can also be configured to control the switch module 101 to disconnect the first mixer 2015 from the first phase-locked loop 2012 and connect the first mixer 2015 to the second phase-locked loop 3012, so as to control the first pre-receiving chain 201 to receive the second clock signal and prohibit the first pre-receiving chain 201 from receiving the first clock signal.

[0143] In the above implementation, the switch module 10 is composed of the switch module 101 and the control module 104. The control module 104 controls the switch module 101 to control the first pre-receiving chain 201 to receive the second clock signal and prohibit the first pre-receiving chain 201 from receiving the first clock signal. This implementation is simple and easy to implement, and can avoid increasing the complexity and cost of the communication device 100 while ensuring the stability of the performance of the communication device 100.

[0144] It should be noted that in the structure shown in FIG. 13, the control module 104 can also be configured to obtain the first environmental interference intensity, and switch the sampling rate of the first pre-receiving chain 201 and the first signal processing module 202 from the first sampling rate to the second sampling rate and / or switch the bit width of the first ADC 2011 from the first bit width to the second bit width when it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold.

[0145] Further, based on the structure shown in FIG. 13, please refer to FIG. 14, which is another structure of a communication device provided by the present application. As shown in FIG. 14, the switch module 101 can include a first controllable switching device 1011. The first end of the first controllable switching device 1011 is connected to the first mixer 2015, the second end is connected to the control module 104, the third end is connected to the second phase-locked loop 3012, and the fourth end is connected to the first phase-locked loop 2012.

[0146] In actual work, the control module 104 can control the first end and the third end of the first controllable switching device 1011 to be connected through the second end, and control the first end and the fourth end to be disconnected, so as to disconnect the first mixer 2015 from the first phase-locked loop 2012 and connect the first mixer 2015 to the second phase-locked loop 3012.

[0147] Alternatively, the control module 104 can also control the first end and the third end of the first controllable switching device 1011 to be disconnected through the second end, and control the first end and the fourth end to be connected, so as to connect the first mixer 2015 to the first phase-locked loop 2012 and disconnect the first mixer 2015 from the second phase-locked loop 3012.

[0148] Further, based on the structure shown in FIG. 14, please refer to FIG. 15, which is another structure of the communication device provided by the present application. As shown in FIG. 15, the first pre-receiving link 201 can further include an iLNA 2014, an LPF 2016, and a VGA 2017. The first signal receiving channel 20 further includes a first antenna module 203. Wherein, the iLNA 2014 is connected with the first antenna module 203 and a first mixer 2015 respectively, the first mixer 2015 is further connected with the LPF 2016, the LPF 2016 is further connected with the VGA 2017, and the VGA 2017 is further connected with the first ADC 2011.

[0149] In actual work, the first antenna module 203 can be used to receive the fifth signal, filter and amplify the fifth signal to obtain the first signal, and transmit the first signal to the first pre-receiving link 201. The iLNA 2014 is used to amplify the first signal and transmit the amplified first signal to the first mixer 2015. The first mixer 2015 is used to mix the signal from the iLNA 2014 based on the clock signal provided by the first phase-locked loop 2012 or the second phase-locked loop 3012, and transmit the mixed signal to the LPF 2016. The LPF 2016 is used to filter the signal from the first mixer 2015 and transmit the filtered signal to the VGA 2017. The VGA 2017 is used to amplify the signal from the VGA 2017 and transmit the amplified signal to the first ADC 2011. The first ADC 2011 is used to convert the signal from the VGA 2017 into the second signal and transmit the second signal to the first signal processing module 202. The first signal processing module 202 can be used to process the second signal to obtain the first information carried by the second signal.

[0150] In some possible implementation manners, in the case of the structures shown in FIG. 7, FIG. 9, FIG. 10 or FIG. 15, the first antenna module 203 can specifically include a first antenna, a first LPF, a first LNA and a second LPF. The first LPF is connected to the first antenna and the first LNA respectively, the first LNA is further connected to the second LPF, and the second LPF is connected to the iLNA 2014. The second antenna module 303 can include a second antenna, a third LPF, a second LNA and a fourth LPF. The third LPF is connected to the second antenna and the second LNA respectively, the second LNA is further connected to the fourth LPF, and the fourth LPF is connected to the iLNA 3014. In actual operation, the first antenna can be used to receive the fifth signal and transmit the fifth signal to the first LPF, the first LPF, the second LPF and the first LNA are used to filter and amplify the fifth signal to obtain the first signal, and the first signal is transmitted to the iLNA 2014 through the second LPF. Similarly, the second antenna can be used to receive the sixth signal and transmit the sixth signal to the third LPF, the third LPF, the fourth LPF and the second LNA are used to filter and amplify the sixth signal to obtain the third signal, and the third signal is transmitted to the iLNA 3014 through the fourth LPF.

[0151] Further, the communication apparatus 100 can further include a baseband unit. The first signal processing module 202 and the second signal processing module 302 are included in the baseband unit, and the baseband unit can further include the interference detection module, the anti-interference module and the positioning module described above. The positioning module can be used to calculate the position, speed, time and the like of the communication apparatus 100 based on the first information and / or the second information.

[0152] In some possible implementation manners, the switching module 10 can also be used to obtain a second environmental interference intensity of the communication apparatus 100. It should be understood that the second environmental interference intensity is an interference intensity at a different time from the first environmental interference intensity. The process of obtaining the second environmental interference intensity is similar to that of obtaining the first environmental interference intensity, which will not be described here. The switching module 10 is further used to switch the working mode of each signal receiving channel from the second working mode to the first working mode when it is determined that the second environmental interference intensity is greater than the interference intensity threshold.

[0153] Specifically, the switching module 10 can adjust the sampling rate of each signal receiving channel from the second sampling rate to the first sampling rate, and / or adjust the bit width of the ADC in each signal receiving channel from the second bit width to the first bit width, so as to switch the working mode of each signal receiving channel from the second working mode to the first working mode.

[0154] Optionally, in the case that the communication device 100 adopts the structure shown in FIG. 3, when the switching module 10 determines that the second environmental interference intensity is greater than the above-mentioned interference intensity threshold, the switching module 10 can be configured to switch the sampling rate of the first front-end receiving chain 201, the sampling rate of the first signal processing module 202, the sampling rate of the second front-end receiving chain 301, and the sampling rate of the second signal processing module 302 from the above-mentioned second sampling rate to the above-mentioned first sampling rate, so as to switch the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the above-mentioned second working mode to the above-mentioned first working mode.

[0155] Alternatively, the switching module 10 can be configured to switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 and the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the above-mentioned second bit width to the above-mentioned first bit width, so as to switch the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the above-mentioned second working mode to the above-mentioned first working mode.

[0156] Alternatively, the switching module 10 can be configured to switch the sampling rate of the first front-end receiving chain 201, the sampling rate of the first signal processing module 202, the sampling rate of the second front-end receiving chain 301, and the sampling rate of the second signal processing module 302 from the above-mentioned second sampling rate to the above-mentioned first sampling rate, and switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 and the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the above-mentioned second bit width to the above-mentioned first bit width, so as to switch the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the above-mentioned second working mode to the above-mentioned first working mode.

[0157] Further, in the case that the communication device 100 adopts the structure shown in FIG. 4, before switching the sampling rate of the first front-end receiving chain 201, the sampling rate of the first signal processing module 202, the sampling rate of the second front-end receiving chain 301, and the sampling rate of the second signal processing module 302 from the second sampling rate to the first sampling rate, and / or, switching the bit width of the first ADC 2011 and the bit width of the second ADC 3011 from the second bit width to the first bit width, the switching module 10 is further configured to disable the second VCO 3013 from outputting the second clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012. Further, the switching module 10 is further configured to control the first VCO 2013 to output the first clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012.

[0158] It should be noted that, preferably, before the second VCO 3013 is prohibited from outputting the second clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012, the switching module 10 can first control the first VCO 2013 to start outputting the first clock signal, and when the clock frequency of the first clock signal is stable, the switching module 10 can start to prohibit the second VCO 3013 from outputting the second clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012.

[0159] Further, in the case where the communication apparatus 100 adopts the structure shown in FIG. 5, the control module 104 can be configured to control the switching module 101 to establish the connection between the first VCO 2013 and the first phase-locked loop 2012 and the second phase-locked loop 3012, so as to control the first VCO 2013 to output the first clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012. The control module 104 can also be configured to control the switching module 101 to disconnect the second VCO 3013 from the first phase-locked loop 2012 and the second phase-locked loop 3012, so as to prohibit the second VCO 3013 from outputting the second clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012.

[0160] It should be further noted that, in the case where the structure shown in FIG. 5 is adopted, the control module 104 can also be configured to obtain the second environmental interference intensity, and determine that the second environmental interference intensity is greater than the interference intensity threshold value, and in this case, switch the sampling rate of the first front-end receiving chain 201, the first signal processing module 202, the second front-end receiving chain 301 and the second signal processing module 302 from the second sampling rate to the first sampling rate, and / or switch the bit width of the first ADC 2011 and the second ADC 3011 from the second bit width to the first bit width.

[0161] Optionally, in the case where the communication apparatus 100 adopts the structure shown in FIG. 8, in a first possible implementation, when it is determined that the second environmental interference intensity is greater than the interference intensity threshold value, the switching module 10 can be configured to adjust the clock signal output by the first phase-locked loop 2012 from the fourth clock signal to the third clock signal.

[0162] Further, the switching module 10 can also switch the sampling rate of the first front-end receiving chain 201 from the second sampling rate to the first sampling rate. Alternatively, the switching module 10 can also switch the sampling rate of the second front-end receiving chain 301 from the second sampling rate to the first sampling rate and switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 from the second bit width to the first bit width. In this way, the first front-end receiving chain 201 can be switched from the second working mode to the first working mode. Then, the switching module 10 is further configured to control the first front-end receiving chain 201 to process the first signal corresponding to the first front-end receiving chain 201 to obtain a second signal and transmit the second signal to the first signal processing module 202. It should be understood that the first signal corresponding to the first front-end receiving chain 201 is the signal received and processed by the first signal receiving channel 20, and in the case that the first signal receiving channel 20 and the second signal receiving channel 30 both work in the first working mode, the signal will be received and processed by the first front-end receiving chain 201. Further, the switching module 10 is further configured to switch the sampling rate of the first signal processing module 202 from the second sampling rate to the first sampling rate, thereby completing the switching of the working mode of the first signal receiving channel 20 from the second working mode to the first working mode.

[0163] Further, the switching module 10 can also switch the sampling rate of the second front-end receiving chain 301 from the second sampling rate to the first sampling rate. Alternatively, the switching module 10 can also switch the sampling rate of the second front-end receiving chain 301 from the second sampling rate to the first sampling rate and switch the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the second bit width to the first bit width.

[0164] Then, the switching module 10 can control the second front-end receiving chain 301 to process the third signal corresponding to the second front-end receiving chain 301 to obtain a fourth signal and transmit the fourth signal to the second signal processing module 302. Further, the switching module 10 can also be configured to switch the sampling rate of the second signal processing module 302 from the second sampling rate to the first sampling rate. At this point, the switching module 10 completes the switching of the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the second working mode to the first working mode.

[0165] In the second possible implementation, when it is determined that the second environmental interference intensity is greater than the interference intensity threshold, the switching module 10 can be configured to adjust the clock signal output by the first phase-locked loop 2012 from the fourth clock signal to the third clock signal. Further, the switching module 10 can also switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 from the second bit width to the first bit width, so as to switch the first front-end receiving chain 201 from the second working mode to the first working mode. Then, the switching module 10 is further configured to control the first front-end receiving chain 201 to process the first signal corresponding to the first front-end receiving chain 201 to obtain a second signal, and transmit the second signal to the first signal processing module 202. For details, reference can be made to the description of the corresponding part in the first possible implementation above, which will not be repeated here.

[0166] Further, the switching module 10 can also adjust the clock signal output by the second phase-locked loop 3012 in the second front-end receiving chain 301 from the second clock signal to the first clock signal. The switching module 10 is further configured to switch the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the second bit width to the first bit width. Then, the switching module 10 can control the second front-end receiving chain 301 to process the third signal corresponding to the second front-end receiving chain to obtain a fourth signal, and transmit the fourth signal to the second signal processing module. For details, reference can be made to the description of the corresponding part in the first possible implementation above, which will not be repeated here. Thus, the switching module 10 completes the switching of the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the second working mode to the first working mode.

[0167] Optionally, in the case where the communication apparatus 100 adopts the structure shown in FIG. 9, in the case where it is determined that the second environmental interference intensity is greater than the interference intensity threshold, the control module 104 can be configured to control the first switching module 105 to establish the connection between the second antenna module 303 and the second front-end receiving chain 301, so that the second front-end receiving chain 301 can receive the sixth signal output by the second antenna module 303. The control module 104 can also be configured to disconnect the connection between the first antenna module 203 and the second front-end receiving chain 301, so that the second front-end receiving chain 301 no longer receives the fifth signal provided by the first antenna module 203.

[0168] Further, the control module 104 is further configured to control the second switch module 106 to establish a connection between the second front-end receiving chain 301 and the second signal processing module 302 and to disconnect the connection between the second front-end receiving chain 301 and the first signal processing module 202, so that the second front-end receiving chain 301 can transmit the fourth signal obtained based on the third signal processing to the second signal processing module 302, thereby realizing the operation of controlling the second front-end receiving chain 301 to process the third signal corresponding to the second front-end receiving chain 301 to obtain the fourth signal and to transmit the fourth signal to the second signal processing module 302.

[0169] Further, the control module 104 is further configured to control the first switch module 105 to disconnect the connection between the second antenna module 303 and the first front-end receiving chain 201 and to establish a connection between the first antenna module 203 and the first front-end receiving chain 201, and to control the second switch module 106 to establish a connection between the first front-end receiving chain 201 and the first signal processing module 202, so that the first front-end receiving chain 201 can transmit the second signal obtained based on the first signal processing to the first signal processing module 202, thereby realizing the operation of controlling the first front-end receiving chain 201 to process the first signal corresponding to the first front-end receiving chain 201 to obtain the second signal and to transmit the second signal to the first signal processing module 202.

[0170] It should be noted that in the case of the structure shown in FIG. 9, the control module 104 is further configured to obtain the second environmental interference intensity, and in the case that the second environmental interference intensity is greater than the interference intensity threshold, to switch the sampling rate of the first front-end receiving chain 201, the first signal processing module 202, the second front-end receiving chain 301 and the second signal processing module 302 from the second sampling rate to the first sampling rate, and / or to switch the bit width of the first ADC 2011 and the second ADC 3011 from the second bit width to the first bit width.

[0171] Optionally, in the case that the communication apparatus 100 adopts the structure shown in FIG. 11, when the second environmental interference intensity of the communication apparatus 100 is greater than the interference intensity threshold, the switching module 10 is configured to switch the sampling rate of the first front-end receiving chain 201 and the first signal processing module 202 from the second sampling rate to the first sampling rate. Alternatively, the switching module 10 is configured to switch the bit width of the first ADC 2011 from the second bit width to the first bit width. Alternatively, the switching module 10 is configured to switch the sampling rate of the first front-end receiving chain 201 and the first signal processing module 202 from the second sampling rate to the first sampling rate, and to switch the bit width of the first ADC 2011 from the second bit width to the first bit width.

[0172] Further, in the case that the communication apparatus 100 adopts the structure shown in Fig. 12, before switching the sampling rate of the first front-end receiving chain 201 and the first signal processing module 202 from the second sampling rate to the first sampling rate, and / or switching the bit width of the first ADC 2011 in the first front-end receiving chain 201 from the second bit width to the first bit width, the switching module 10 can be configured to control the first PLL 2012 to provide the first clock signal. The switching module 10 is further configured to control the first front-end receiving chain 201 to receive the first clock signal provided by the first PLL 2012, and to disable the first front-end receiving chain 201 from receiving the second clock signal provided by the second PLL 3012.

[0173] Further, in the case that the communication apparatus 100 adopts the structure shown in Fig. 13, the control module 104 can be configured to control the first PLL 2012 to output the first clock signal. The control module 104 is further configured to control the switching module 101 to connect the first mixer 2015 to the first PLL 2012, and to disconnect the first mixer 2015 from the second PLL 3012, so as to achieve the function of controlling the first front-end receiving chain 201 to receive the first clock signal, and disabling the first front-end receiving chain 201 from receiving the second clock signal.

[0174] It should be noted that, in the case that the communication apparatus 100 adopts the structure shown in Fig. 13, the control module 104 can be further configured to obtain the second environmental interference intensity, and to switch the sampling rate of the first front-end receiving chain 201 and the first signal processing module 202 from the second sampling rate to the first sampling rate, and / or switch the bit width of the first ADC 2011 from the second bit width to the first bit width, in the case that the second environmental interference intensity is greater than the interference intensity threshold.

[0175] Further, in the case that the communication apparatus 100 adopts the structure shown in Fig. 14, the control module 104 can also control the first controllable switching device 1011 to disconnect its first end and third end, and to connect its first end and fourth end, so as to connect the first mixer 2015 to the first PLL 2012, and to disconnect the first mixer 2015 from the second PLL 3012.

[0176] In some possible implementation manners, the controllable switching device (such as the first controllable switching device 1011, the second controllable switching device 1012, and the like) can be an insulated gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), a triode, a single-pole double-throw switch, or the like. The controllable switching device is not specifically limited in the present application.

[0177] In some possible implementation manners, the control module 104 can be a device with data processing and control functions, such as a CPU, a general processor, a DSP, an ASIC, an FPGA, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The control module 104 is not specifically limited in the present application.

[0178] It should be further understood that, in actual implementation, the communication apparatus 100 can be a wireless signal transceiver with at least one signal receiving channel, such as a GNSS receiver, a GPS positioning apparatus, or the like. Alternatively, the communication apparatus 100 can be a device or product including a wireless signal transceiver, such as a terminal device with a built-in GNSS receiver, a wearable device, or the like. The communication apparatus 100 is not specifically limited in the present application.

[0179] Embodiment Two

[0180] To solve the above technical problems, the present application provides a communication method. The communication method is applicable to the communication apparatus 100 described in the foregoing embodiment one. In the communication method, the working mode of each of the at least one signal receiving channel in the communication apparatus 100 is switched from the first working mode to the second working mode when the environmental interference intensity of the communication apparatus 100 is small. The sampling rate of each of the signal receiving channels in the first working mode is greater than that in the second working mode, and / or the bit width of the ADC in each of the signal receiving channels in the first working mode is greater than that in the second working mode. When the environmental interference intensity is small, reducing the sampling rate of each of the signal receiving channels and / or reducing the bit width of the ADC included in each of the signal receiving channels can effectively reduce the power consumption of the communication apparatus without affecting the performance of the communication apparatus. Therefore, the communication method provided by the present application can also solve the problem of large power consumption of the existing GNSS receiver, and can improve the applicability and practicability of the GNSS receiver.

[0181] Please refer to Fig. 16, which is a flowchart of a communication method provided in the present application. The structure of the communication device 100 suitable for the communication method can be seen in the corresponding description in the foregoing embodiment one, and will not be repeated in the present embodiment. As shown in Fig. 16, the communication method comprises the following steps:

[0182] S161, obtaining the first environmental interference intensity of the communication device.

[0183] In some possible implementation manners, the communication device 100 can obtain the first environmental interference intensity thereof. Here, the specific process of obtaining the first environmental interference intensity by the communication device 100 can be seen in the process of obtaining the first environmental interference intensity described in the foregoing embodiment one, and will not be repeated here.

[0184] S162, in the case where the first environmental interference intensity is less than or equal to the interference intensity threshold, switching the working mode of each of the at least one signal receiving channel in the communication device from the first working mode to the second working mode.

[0185] In some possible implementation manners, when the communication device 100 determines that the first environmental interference intensity is less than or equal to the interference intensity threshold, it can switch the working mode of each of the at least one signal receiving channel contained therein from the first working mode to the second working mode. Wherein, the first sampling rate of each of the above signal receiving channels in the first working mode is greater than the second sampling rate of each of the signal receiving channels in the second working mode, and / or the first bit width of the ADC of each of the above signal receiving channels in the first working mode is greater than the second bit width of the ADC of each of the signal receiving channels in the second working mode.

[0186] Since there are multiple possible implementation scenarios of the at least one signal receiving channel, in order to facilitate understanding, the specific process of switching the working mode of each of the signal receiving channels from the first working mode to the second working mode by the communication device 100 will be described in different scenarios below.

[0187] Scenario one:

[0188] In this scenario, the above at least one signal receiving channel comprises the first signal receiving channel 20 and the second signal receiving channel 30, and the first signal receiving channel 20 and the second signal receiving channel 30 correspond to different working frequency bands. For example, the first working frequency band of the above first signal receiving channel 20 can be the L1 frequency band. The second working frequency band of the above second signal receiving channel 30 can be the L5 frequency band.

[0189] In some possible implementations, the first signal receiving channel 20 can include a first pre-receiving link 201 and a first signal processing module 202. The second signal receiving channel 30 includes a second pre-receiving link 301 and a second signal processing module 302. The first pre-receiving link 201 includes a first ADC 2011, and the second pre-receiving link 301 includes a second ADC 3011. The first pre-receiving link 201 is connected to the first signal processing module 202, and the second pre-receiving link 301 is connected to the second signal processing module 302. The first pre-receiving link 201, the first signal processing module 202, the second pre-receiving link 301, and the second signal processing module 302 are respectively connected to the switching module 10. The switching module 10 is further connected to the first ADC 2011 and the second ADC 3011 respectively.

[0190] In this case, when it is determined that the first environmental interference intensity is less than or equal to the interference intensity threshold, the communication device 100 can switch the sampling rate of the first pre-receiving link 201, the sampling rate of the first signal processing module 202, the sampling rate of the second pre-receiving link 301, and the sampling rate of the second signal processing module 302 from the first sampling rate to the second sampling rate, and / or switch the bit width of the first ADC 2011 in the first pre-receiving link 201 and the bit width of the second ADC 3011 in the second pre-receiving link 301 from the first bit width to the second bit width, so as to switch the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the first working mode to the second working mode.

[0191] In the first optional implementation, before the sampling rate of the first front-end receiving chain 201, the sampling rate of the first signal processing module 202, the sampling rate of the second front-end receiving chain 301, and the sampling rate of the second signal processing module 302 are switched from the first sampling rate to the second sampling rate, and / or, before the bit width of the first ADC 2011 in the first front-end receiving chain 201 and the bit width of the second ADC 3011 in the second front-end receiving chain 301 are switched from the first bit width to the second bit width, the communication apparatus 100 can also disable the first VCO 2013 in the first front-end receiving chain 201 from outputting the first clock signal to the first phase-locked loop 2012 in the first front-end receiving chain 201 and the second phase-locked loop 3012 in the second front-end receiving chain 301. In other words, the communication apparatus 100 can disable the first phase-locked loop 2012 from receiving the first clock signal from the first VCO 2013 and disable the second phase-locked loop 3012 from receiving the first clock signal from the first VCO 2013. It should be understood that before the above-mentioned working mode switching is performed, the first VCO 2013 can be used to simultaneously provide clock signals for the first phase-locked loop 2012 and the second phase-locked loop 3012. Moreover, since the working frequency bands of the first signal receiving channel 20 and the second signal receiving channel 30 are different, the clock signals required by the first phase-locked loop 2012 and the second phase-locked loop 3012 are also different. Therefore, the communication apparatus 100 can directly output the first clock signal output by the first VCO 2013 to the first phase-locked loop 2012, and perform frequency division or frequency multiplication processing on the first clock signal to obtain the third clock signal, and then output the third clock signal to the second phase-locked loop 3012. It should be noted that the clock frequency of the first clock signal corresponds to the first working mode. That is, the first clock signal is the clock signal required for the first signal receiving channel 20 to work in the first working mode, and the third clock signal is the clock signal required for the second signal receiving channel 30 to work in the first working mode.

[0192] In specific implementations, the communication apparatus 100 can disconnect the first VCO 2013 from the first phase-locked loop 2012 and the second phase-locked loop 3012 to disable the first VCO 2013 from outputting the first clock signal to the first phase-locked loop 2012 and the second phase-locked loop 3012. Here, the specific process in which the communication apparatus 100 disconnects the first VCO 2013 from the first phase-locked loop 2012 and the second phase-locked loop 3012 can refer to the corresponding process described in the foregoing embodiment one, which will not be described herein again.

[0193] Then, the communication apparatus 100 can control the second VCO 3013 in the second front-end receiving chain 301 to output a second clock signal to the first PLL 2012 and the second PLL 3012. It should be understood that, since the operating frequency bands of the first signal receiving channel 20 and the second signal receiving channel 30 are different, the communication apparatus 100 can directly output the second clock signal output by the second VCO 3013 to the second PLL 3012, and further perform frequency division or frequency multiplication on the second clock signal to obtain a second clock signal after frequency division or frequency multiplication (for the convenience of understanding, hereinafter, the fourth clock signal will be used instead of description), and then output the fourth clock signal to the first PLL 2012. It should be noted that the clock frequency of the second clock signal corresponds to the second operating mode. That is, the fourth clock signal is the clock signal required for the first signal receiving channel 20 to operate in the second operating mode, and the second clock signal is the clock signal required for the second signal receiving channel 30 to operate in the second operating mode.

[0194] In a specific implementation, the communication apparatus 100 can establish a connection between the second VCO 3013 and the first PLL 2012 and the second PLL 3012, so as to control the second VCO 3013 to output the second clock signal to the first PLL 2012 and the second PLL 3012. For specific processes, reference can be made to the corresponding description in Embodiment 1, which will not be described here.

[0195] In the above implementation, before the operating mode switching, the communication apparatus 100 can control the first VCO 2013 in the first front-end receiving chain 201 to stop providing the first clock signal corresponding to the first operating mode to the first PLL 2012 in the first front-end receiving chain 201 and the second PLL 3012 in the second front-end receiving chain 301, and control the second VCO 3013 in the second front-end receiving chain 301 to simultaneously provide the second clock signal corresponding to the second operating mode to the first PLL 2012 and the second PLL 3012. In this way, the clock continuity of the first signal receiving channel 20 and the second signal receiving channel 30 during the operating mode switching can be ensured, so that the communication apparatus 100 can continuously receive and process signals, thereby ensuring the performance stability of the communication apparatus 100.

[0196] In the second optional implementation, before the sampling rate of the first front-end receiving chain 201, the sampling rate of the first signal processing module 202, the sampling rate of the second front-end receiving chain 301, and the sampling rate of the second signal processing module 302 are switched from the first sampling rate to the second sampling rate, and / or, before the bit width of the first ADC 2011 in the first front-end receiving chain 201 and the bit width of the second ADC 3011 in the second front-end receiving chain 301 are switched from the first bit width to the second bit width, the communication apparatus 100 can first adjust the clock signal output by the second phase-locked loop 3012 from a first clock signal to a second clock signal. The first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode. Alternatively, the first clock signal is the clock signal required by the second front-end receiving chain 301 in the first working mode, and the second clock signal is the clock signal required by the first front-end receiving chain 201 in the second working mode.

[0197] Then, the communication apparatus 100 can switch the sampling rate of the second front-end receiving chain 301 from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode, or switch the sampling rate of the second front-end receiving chain 301 from the first sampling rate to the second sampling rate and switch the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the first bit width corresponding to the first working mode to the second bit width corresponding to the second working mode.

[0198] Then, the communication apparatus 100 can process the first signal corresponding to the first front-end receiving chain 201 through the second front-end receiving chain 301 to obtain a second signal, and transmit the second signal to the first signal processing module 202. Here, the description of the first signal corresponding to the first front-end receiving chain 201 is referred to the corresponding description in the first embodiment, which will not be repeated here. Moreover, the specific process of processing the first signal corresponding to the first front-end receiving chain 201 through the second front-end receiving chain 301 to obtain a second signal, and transmitting the second signal to the first signal processing module 202 can be referred to the corresponding description in the first embodiment, which will not be repeated here.

[0199] Then, the communication apparatus 100 can also switch the sampling rate of the first signal processing module 202 from the first sampling rate to the second sampling rate, thereby completing the switching of the working mode of the first signal receiving channel 20 from the first working mode to the second working mode.

[0200] In the above implementation, in a case where it is determined that the working mode switching of the first signal receiving channel 20 and the second signal receiving channel 30 is needed, the working mode of the second front-end receiving link 301 is switched from the first working mode to the second working mode, and the corresponding function is implemented by the second front-end receiving link 301 instead of the first front-end receiving link 201. By multiplexing the second front-end receiving link 301, the clock continuity of the first signal receiving channel 20 can be ensured, and the interruption of the received signal caused by the working mode switching can be avoided, thereby ensuring the performance stability of the communication apparatus 100.

[0201] Further, the communication apparatus 100 can also adjust the clock signal output by the first phase-locked loop 2012 in the first front-end receiving link 201 from a third clock signal to a fourth clock signal. The third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode. In other words, the third clock signal is the clock signal required by the first front-end receiving link 201 in the first working mode, and the fourth clock signal is the clock signal required by the second front-end receiving link 301 in the second working mode.

[0202] Then, the communication apparatus 100 can also switch the sampling rate of the first front-end receiving link 201 from a first sampling rate to a second sampling rate. Alternatively, the sampling rate of the first front-end receiving link 201 is switched from the first sampling rate to the second sampling rate, and the bit width of the first ADC 2011 in the first front-end receiving link 201 is switched from a first bit width to a second bit width. It should be noted that in a case where the communication apparatus 100 only switches the sampling rate of the second front-end receiving link 301 from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode, the communication apparatus 100 will only switch the sampling rate of the first front-end receiving link 201 from the first sampling rate to the second sampling rate. In a case where the communication apparatus 100 switches the sampling rate of the second front-end receiving link 301 from the first sampling rate to the second sampling rate and switches the bit width of the second ADC 3011 in the second front-end receiving link 301 from the first bit width to the second bit width, the communication apparatus 100 will also switch the sampling rate of the first front-end receiving link 201 from the first sampling rate to the second sampling rate and switch the bit width of the first ADC 2011 in the first front-end receiving link 201 from the first bit width to the second bit width.

[0203] Then, the communication apparatus 100 can control the first front-end receiving chain 201 to process the third signal corresponding to the second front-end receiving chain to obtain a fourth signal, and transmit the fourth signal to the second signal processing module. Here, the specific process that the communication apparatus 100 controls the first front-end receiving chain 201 to process the third signal corresponding to the second front-end receiving chain to obtain the fourth signal, and transmit the fourth signal to the second signal processing module can be jointly referred to the corresponding description in the foregoing embodiment one, and thus will not be described here.

[0204] Then, the communication apparatus 100 can further switch the sampling rate of the second signal processing module 302 from the first sampling rate to the second sampling rate. At this point, the communication apparatus 100 completes the switching of the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the first working mode to the second working mode.

[0205] In the third optional implementation, the communication apparatus 100 can adjust the clock signal output by the second phase-locked loop 3012 from the first clock signal to the second clock signal. Here, the description of the first clock signal and the second clock signal can be jointly referred to the corresponding description in the foregoing first possible implementation, and thus will not be described here.

[0206] Then, the communication apparatus 100 can switch the bit width of the second ADC 3011 in the second front-end receiving chain 301 from the first bit width corresponding to the first working mode to the second bit width corresponding to the second working mode, so as to realize the switching of the second front-end receiving chain 301 from the first working mode to the second working mode.

[0207] Then, the communication apparatus 100 can process the first signal corresponding to the first front-end receiving chain 201 through the second front-end receiving chain 301 to obtain a second signal, and transmit the second signal to the first signal processing module 202. The specific process can be jointly referred to the corresponding description in the foregoing second optional implementation, and thus will not be described here.

[0208] Further, the communication apparatus 100 can further adjust the clock signal output by the first phase-locked loop 2012 in the first front-end receiving chain 201 from the third clock signal to the fourth clock signal. Here, the description of the third clock signal and the fourth clock signal can be jointly referred to the corresponding description in the foregoing second possible implementation, and thus will not be described here. Then, the communication apparatus 100 can switch the bit width of the first ADC 2011 in the first front-end receiving chain 201 from the first bit width to the second bit width.

[0209] Then, the communication apparatus 100 can process the third signal corresponding to the second front-end receiving link by the first front-end receiving link 201 to obtain a fourth signal, and transmit the fourth signal to the second signal processing module. The specific process can be jointly referred to the corresponding description in the second possible implementation manner, and thus will not be described here. At this point, the switching module 10 completes the switching of the working mode of the first signal receiving channel 20 and the second signal receiving channel 30 from the first working mode to the second working mode.

[0210] Scenario two:

[0211] In this scenario, the at least one signal receiving channel includes the first signal receiving channel 20. For example, the first working frequency band of the first signal receiving channel 20 can be the L1 frequency band or the L5 frequency band.

[0212] In some optional implementation manners, the first signal receiving channel 20 at least includes the first front-end receiving link 201 and the first signal processing module 202 connected with each other. The first front-end receiving link 201 and the first signal processing module 202 are connected with the switching module 10, respectively. Further, the first front-end receiving link 201 can further include the first ADC 2011, and the first ADC 2011 is connected with the switching module 10.

[0213] In actual implementation, the communication apparatus 100 can switch the sampling rate of the first front-end receiving link 201 and the first signal processing module 202 from the first sampling rate to the second sampling rate, so as to switch the working mode of the first signal receiving channel 20 from the first working mode to the second working mode. Alternatively, the communication apparatus 100 can switch the bit width of the first ADC 2011 from the first bit width to the second bit width, so as to switch the working mode of the first signal receiving channel 20 from the first working mode to the second working mode. Alternatively, the communication apparatus 100 can switch the sampling rate of the first front-end receiving link 201 and the first signal processing module 202 from the first sampling rate to the second sampling rate, and switch the bit width of the first ADC 2011 from the first bit width to the second bit width, so as to switch the working mode of the first signal receiving channel 20 from the first working mode to the second working mode.

[0214] Optionally, the first front-end receiving chain 201 comprises a first phase-locked loop 2012 and a second phase-locked loop 3012. The first phase-locked loop 2012 and the second phase-locked loop 3012 are respectively connected to the switching module 10. Before switching the sampling rate of the first front-end receiving chain 201 and the first signal processing module 202 from the first sampling rate to the second sampling rate, and / or switching the bit width of the first ADC 2011 in the first front-end receiving chain 201 from the first bit width to the second bit width, the communication device 100 can control the second phase-locked loop 3012 to provide a second clock signal. Then, the communication device 100 can control the first front-end receiving chain 201 to receive the second clock signal provided by the second phase-locked loop 3012, and prohibit the first front-end receiving chain 201 from receiving a first clock signal provided by the first phase-locked loop 2012. The clock frequency of the second clock signal corresponds to the second working mode, and the clock frequency of the first clock signal corresponds to the first working mode. Alternatively, the second clock signal is a clock signal required by the first signal receiving channel 20 to work in the second working mode, and the first clock signal is a clock signal required by the first signal receiving channel 20 to work in the first working mode.

[0215] In the above implementation, two phase-locked loops are arranged in the first front-end receiving chain 201. Before the working mode switching, the communication device 100 can control the first phase-locked loop 2012 to stop providing the clock signal required by the first front-end receiving chain 201 in the first working mode, and control the second phase-locked loop 3012 to provide the clock signal required by the first front-end receiving chain 201 in the second working mode. In this way, the clock continuity of the first signal receiving channel 20 during the working mode switching can be ensured, so that the communication device 100 can continuously receive and process signals, thereby ensuring the stable performance of the communication device 100.

[0216] In a specific implementation, after the communication device 100 controls the second phase-locked loop to output the second clock signal, the communication device 100 can disconnect the first phase-locked loop 2012 from the first mixer 2015 in the first front-end receiving chain 201, and establish a connection between the first mixer 2015 and the second phase-locked loop 3012, so that the second phase-locked loop 3012 can provide the second clock signal for the first front-end receiving chain 201, and the first front-end receiving chain 201 is prohibited from receiving the first clock signal output by the first phase-locked loop 2012.

[0217] In the method provided in the embodiments of the present application, in the case that the environmental interference intensity is small, the communication device 100 reduces the sampling rate of each signal receiving channel in the at least one signal receiving channel contained by the communication device 100 and / or reduces the bit width of the ADC contained by the signal receiving channel, so that the power consumption of the communication device 100 can be effectively reduced without affecting the performance of the communication device 100. Therefore, the communication method provided in the present application can also solve the problem of large power consumption of the existing GNSS receiver, and can improve the applicability and practicability.

[0218] In some possible implementation manners, referring to FIG. 17, FIG. 17 is another flow diagram of a communication method provided in the present application. As shown in FIG. 17, the communication method can further include the following steps:

[0219] S163, obtaining a second environmental interference intensity of the communication device.

[0220] In some possible implementation manners, the communication device 100 can obtain the second environmental interference intensity thereof. Here, the specific process in which the communication device 100 obtains the second environmental interference intensity can be refer to the process of obtaining the second environmental interference intensity described in the first embodiment, which will not be repeated here.

[0221] S164, in the case that the second environmental interference intensity is greater than the interference intensity threshold, switching the working mode of each signal receiving channel in the at least one signal receiving channel in the communication device from the first working mode to the second working mode.

[0222] In some possible implementation manners, the communication device 100 can switch the working mode of each signal receiving channel in the at least one signal receiving channel from the second working mode to the first working mode in the case that the second environmental interference intensity is greater than the interference intensity threshold.

[0223] Specifically, the communication device 100 can adjust the sampling rate of each signal receiving channel from the second sampling rate to the first sampling rate and / or adjust the bit width of the ADC in each signal receiving channel from the second bit width to the first bit width, so as to switch the working mode of each signal receiving channel from the first working mode to the second working mode. Here, the specific process in which the communication device 100 switches the working mode of each signal receiving channel from the second working mode to the first working mode can be refer to the corresponding process described in the first embodiment, which will not be repeated here.

[0224] In the method provided in the embodiments of the present application, when the environmental interference intensity changes from small to large, the communication device 100 increases the sampling rate of each of the at least one signal receiving channel included in the communication device 100, and / or increases the bit width of the ADC included in the at least one signal receiving channel, so that the anti-interference performance of the communication device 100 can be ensured.

[0225] Please refer to FIG. 18, which is a structural schematic diagram of another communication device provided in the present application. The communication device 1800 can be the communication device 100 described above, or a component (such as a circuit, a chip or a chip system) in the communication device 100. The communication device 1800 can be used to implement the communication method provided in the above embodiments. The communication device 1800 includes a processor 1810, a memory 1820 and a bus system 1830.

[0226] The memory 1820 includes, but is not limited to, a RAM, a ROM, an EPROM or a CD-ROM, and is configured to store relevant instructions and data.

[0227] The memory 1820 stores the following elements, executable modules or data structures, or a subset of them, or an extended set of them:

[0228] Operation instructions: include various operation instructions, which are used to implement various operations.

[0229] Operating system: includes various system programs, which are used to implement various basic services and process hardware-based tasks.

[0230] Only one memory is shown in FIG. 18, but the memory can also be set to multiple memories according to needs.

[0231] The communication device 1800 can also include a transceiver 1840. The transceiver 1840 can be a communication module or a transceiving circuit. In the embodiments of the present application, the transceiver 1840 is configured to perform the signal transceiving operations described in the above embodiments.

[0232] The processor 1810 can be a controller, a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. The processor 1810 can also be a combination for implementing computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0233] In a particular implementation, the various components of the communication device 1800 are coupled together by a bus system 1830, which can include a data bus, a power bus, a control bus, and a state line bus, among others. However, for clarity, the various buses are shown as the bus system 1830. For further clarity, only some of the various buses are shown in Figure 18.

[0234] In a particular implementation, the communication device 1800 can perform the steps of the method performed by the communication device 100 of the second embodiment.

[0235] It should be noted that in actual applications, the processor in the embodiments of the present application can be an integrated circuit chip with a signal processing capability. In the implementation process, the steps of the method embodiments described above can be completed by hardware integrated logic circuits in the processor or by instructions in the form of software. The processor described above can be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The disclosed methods, steps and logic block diagrams in the embodiments of the present application can be implemented or executed. The general purpose processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly embodied as a hardware code processor for execution, or a combination of hardware and software modules in the code processor for execution. The software module can be located in a random access memory, a flash memory, a read only memory, a programmable read only memory or an electrically erasable programmable memory, a register or other mature storage medium in the art. The storage medium is located in the memory, and the processor reads the information in the memory, and combines the hardware to complete the steps of the above method.

[0236] It can be appreciated that the memory in the embodiments of the present application can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memory. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically EPROM (EEPROM) or a flash memory. The volatile memory can be a random access memory (RAM) used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM) and direct rambus RAM (DR RAM). It should be noted that the memory described in the embodiments of the present application is intended to include, but not limited to, these and any other suitable types of memory.

[0237] The present application also provides a chip comprising at least a processor. The processor is configured to execute computer-executable instructions to enable a device installed with the chip to implement the method steps performed by the communication device 100 in the communication method provided in FIG. 16 to FIG. 17.

[0238] Optionally, the chip can further comprise an interface circuit. The interface circuit is configured to receive computer-executable instructions and transmit them to the processor.

[0239] In various embodiments of the present application, the terms and / or descriptions of different embodiments are consistent and can be mutually referred to if there is no special description and logical conflict. The technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0240] It can be appreciated that the various numerical numbers involved in the embodiments of the present application are only for convenient differentiation, and do not limit the scope of the embodiments of the present application. The size of the serial number of the above processes does not mean the execution order, and the execution order of the processes should be determined according to its function and inherent logic.

[0241] The above merely provides the preferred embodiments of the present application, and is not used to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A communication method characterized by comprising: The method is applied to a communication device comprising at least one signal receiving channel, and the method comprises: obtaining a first ambient interference intensity of the communication device; switching an operation mode of each of the at least one signal receiving channel from a first operation mode to a second operation mode, in a case that the first ambient interference intensity is less than or equal to an interference intensity threshold; wherein a first sampling rate of the each of the signal receiving channel in the first operation mode is greater than a second sampling rate of the each of the signal receiving channel in the second operation mode, and / or a first bit width of an analog-to-digital converter (ADC) in the each of the signal receiving channel in the first operation mode is greater than a second bit width of the ADC in the each of the signal receiving channel in the second operation mode.

2. The method of claim 1, wherein, The at least one signal receiving channel comprises a first signal receiving channel and a second signal receiving channel, and the first signal receiving channel and the second signal receiving channel correspond to different operation frequency bands.

3. The method of claim 2, wherein, The first signal receiving channel comprises at least a first pre-receiving link and a first signal processing module connected to each other, and the second signal receiving channel comprises at least a second pre-receiving link and a second signal processing module connected to each other; The switching of the operation mode of the each of the at least one signal receiving channel from the first operation mode to the second operation mode comprises: switching a sampling rate of the first pre-receiving link, the first signal processing module, the second pre-receiving link and the second signal processing module from a first sampling rate corresponding to the first operation mode to a second sampling rate corresponding to the second operation mode; and / or switching a bit width of a first ADC in the first pre-receiving link and a second ADC in the second pre-receiving link from a first bit width corresponding to the first operation mode to a second bit width corresponding to the second operation mode.

4. The method of claim 3, wherein, Before the switching of the operation mode of the each of the at least one signal receiving channel from the first operation mode to the second operation mode, the method further comprises: inhibiting a first VCO in the first pre-receiving link from outputting a first clock signal to a first phase-locked loop in the first pre-receiving link and a second phase-locked loop in the second pre-receiving link; controlling a second VCO in the second pre-receiving link to output a second clock signal to the first phase-locked loop and the second phase-locked loop; wherein a clock frequency of the first clock signal corresponds to the first operation mode, and a clock frequency of the second clock signal corresponds to the second operation mode.

5. The method of claim 4, wherein, The inhibiting of the first VCO in the first pre-receiving link from outputting the first clock signal to the first phase-locked loop in the first pre-receiving link and the second phase-locked loop in the second pre-receiving link comprises: disconnecting the first VCO in the first pre-receiving link from the first phase-locked loop in the first pre-receiving link and the second phase-locked loop in the second pre-receiving link, so as to inhibit the first VCO from outputting the first clock signal to the first phase-locked loop and the second phase-locked loop; The control of the second VCO in the second pre-receiving chain link outputs the second clock signal to the first phase-locked loop and the second phase-locked loop, comprising: The connection of the second VCO in the second pre-receiving chain link and the first phase-locked loop and the second phase-locked loop is established to control the second VCO to output the second clock signal to the first phase-locked loop and the second phase-locked loop.

6. The method of claim 3, wherein, The sampling rate of the first pre-receiving chain link, the first signal processing module, the second pre-receiving chain link and the second signal processing module is switched from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode; And / or, the bit width of the first ADC in the first pre-receiving chain link and the second ADC in the second pre-receiving chain link is switched from the first bit width corresponding to the first working mode to the second bit width corresponding to the second working mode, comprising: The clock signal output by the second phase-locked loop in the second pre-receiving chain link is adjusted from the first clock signal to the second clock signal; The sampling rate of the second pre-receiving chain link is switched from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode, or the sampling rate of the second pre-receiving chain link is switched from the first sampling rate to the second sampling rate and the bit width of the second ADC in the second pre-receiving chain link is switched from the first bit width corresponding to the first working mode to the second bit width corresponding to the second working mode; The first signal corresponding to the first pre-receiving chain link is processed through the second pre-receiving chain link to obtain a second signal, and the second signal is transmitted to the first signal processing module; The sampling rate of the first signal processing module is switched from the first sampling rate to the second sampling rate; Wherein, the first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode.

7. The method of claim 6, wherein, The method further comprises: The clock signal output by the first phase-locked loop in the first pre-receiving chain link is adjusted from the third clock signal to the fourth clock signal; The sampling rate of the first pre-receiving chain link is switched from the first sampling rate to the second sampling rate, or the sampling rate of the first pre-receiving chain link is switched from the first sampling rate to the second sampling rate and the bit width of the first ADC in the first pre-receiving chain link is switched from the first bit width to the second bit width; The third signal corresponding to the second pre-receiving chain link is processed through the first pre-receiving chain link to obtain a fourth signal, and the fourth signal is transmitted to the second signal processing module; The second signal processing module is switched from the first sampling rate to the second sampling rate; Wherein, the third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode.

8. The method of claim 3, wherein, The sampling rate of the first pre-receiving chain link, the first signal processing module, the second pre-receiving chain link and the second signal processing module is switched from the first sampling rate corresponding to the first working mode to the second sampling rate corresponding to the second working mode; And / or, switching the bit width of the first ADC in the first front-end receiving chain and the second ADC in the second front-end receiving chain from a first bit width corresponding to a first working mode to a second bit width corresponding to a second working mode, comprises: Adjusting a clock signal output by a second phase-locked loop in the second front-end receiving chain from a first clock signal to a second clock signal; Switching the bit width of the second ADC in the second front-end receiving chain from a first bit width corresponding to a first working mode to a second bit width corresponding to a second working mode; Processing a first signal corresponding to the first front-end receiving chain through the second front-end receiving chain to obtain a second signal, and transmitting the second signal to the first signal processing module; Wherein, the first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode.

9. The method of claim 8, wherein, The method further comprises: Adjusting a clock signal output by a first phase-locked loop in the first front-end receiving chain from a third clock signal to a fourth clock signal; Switching the bit width of the first ADC in the first front-end receiving chain from the first bit width to the second bit width; Processing a third signal corresponding to the second front-end receiving chain through the first front-end receiving chain to obtain a fourth signal, and transmitting the fourth signal to the second signal processing module; Wherein, the third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode.

10. The method of claim 1, wherein, The at least one signal receiving channel comprises a first signal receiving channel, and the first signal receiving channel at least comprises a first front-end receiving chain and a first signal processing module connected in sequence; The switching of the working mode of each signal receiving channel in the at least one signal receiving channel from a first working mode to a second working mode comprises: Switching the sampling rate of the first front-end receiving chain and the first signal processing module from a first sampling rate corresponding to a first working mode to a second sampling rate corresponding to a second working mode; And / or, switching the bit width of the first ADC in the first front-end receiving chain from a first bit width corresponding to a first working mode to a second bit width corresponding to a second working mode.

11. The method of claim 10, wherein, The first front-end receiving chain comprises a first phase-locked loop and a second phase-locked loop, and before the switching of the working mode of each signal receiving channel in the at least one signal receiving channel from a first working mode to a second working mode, the method further comprises: Controlling the first front-end receiving chain to receive a second clock signal provided by the second phase-locked loop, and disabling the first front-end receiving chain to receive a first clock signal provided by the first phase-locked loop; Wherein, the clock frequency of the second clock signal corresponds to the second working mode, and the clock frequency of the first clock signal corresponds to the first working mode.

12. The method of claim 11, wherein, The controlling of the first front-end receiving chain to receive the second clock signal provided by the second phase-locked loop, and the disabling of the first front-end receiving chain to receive the first clock signal provided by the first phase-locked loop, comprises: Controlling the second phase-locked loop to output a second clock signal; disconnecting the first phase-locked loop from a first mixer in the first front-end receive chain and connecting the first mixer to the second phase-locked loop, so that the second phase-locked loop provides the second clock signal for the first front-end receive chain and the first front-end receive chain is prohibited from receiving the first clock signal output by the first phase-locked loop.

13. The method according to any one of claims 1 to 12, characterized in that, The method further comprises: acquiring a second environmental interference intensity of the communication device; switching the signal receiving channels from the second working mode to the first working mode if the second environmental interference intensity is greater than the interference intensity threshold.

14. A communications device, characterized by The communication device comprises at least one signal receiving channel and a switching module, each of the at least one signal receiving channel being connected to the switching module; The switching module is configured to switch the working mode of the signal receiving channels from a first working mode to a second working mode if a first environmental interference intensity of the communication device is less than or equal to an interference intensity threshold. The first sampling rate of the signal receiving channels in the first working mode is greater than the second sampling rate of the signal receiving channels in the second working mode, and / or the first bit width of an analog-to-digital converter (ADC) in the signal receiving channels in the first working mode is greater than the second bit width of the ADC in the signal receiving channels in the second working mode.

15. The communication apparatus according to claim 14, wherein, The at least one signal receiving channel comprises a first signal receiving channel and a second signal receiving channel, and the first signal receiving channel and the second signal receiving channel correspond to different working frequency bands.

16. The communication apparatus according to claim 15, wherein The first signal receiving channel comprises at least a first front-end receive chain and a first signal processing module connected to each other, the second signal receiving channel comprises at least a second front-end receive chain and a second signal processing module connected to each other, and the first front-end receive chain, the first signal processing module, the second front-end receive chain and the second signal processing module are connected to the switching module; The switching module is configured to switch the sampling rate of the first front-end receive chain, the first signal processing module, the second front-end receive chain and the second signal processing module from the first sampling rate to the second sampling rate, and / or switch the bit width of a first ADC in the first front-end receive chain and a second ADC in the second front-end receive chain from the first bit width to the second bit width if a first environmental interference intensity of the communication device is less than or equal to an interference intensity threshold.

17. The communication apparatus according to claim 16, wherein Before switching the sampling rate of the first front-end receive chain, the first signal processing module, the second front-end receive chain and the second signal processing module from the first sampling rate to the second sampling rate, and / or switching the bit width of the first ADC in the first front-end receive chain and the second ADC in the second front-end receive chain from the first bit width to the second bit width, the switching module is further configured to: inhibit the first VCO in the first front-end receive chain from outputting a first clock signal to a first phase-locked loop in the first front-end receive chain and a second phase-locked loop in the second front-end receive chain; control a second VCO in the second front-end receive chain to output a second clock signal to the first phase-locked loop and the second phase-locked loop; wherein a clock frequency of the first clock signal corresponds to the first operating mode, and a clock frequency of the second clock signal corresponds to the second operating mode.

18. The communication apparatus according to claim 17, wherein The switching module comprises a switch module, a first clock processing device, a second clock processing device, and a control module. The control module is connected to the switch module. The first VCO is connected to the first phase-locked loop through the switch module. The first VCO is also connected to the second phase-locked loop through the first clock processing device and the switch module. The second VCO is connected to the first phase-locked loop through the second clock processing device and the switch module. The second VCO is also connected to the second phase-locked loop through the switch module. In a case where the first environmental interference intensity of the communication device is less than or equal to an interference intensity threshold, the control module is configured to: control the switch module to disconnect the first VCO from the first phase-locked loop and the second phase-locked loop, so as to inhibit the first VCO from outputting the first clock signal to the first phase-locked loop and the second phase-locked loop; control the switch module to connect the second VCO to the first phase-locked loop and the second phase-locked loop, so as to enable the second VCO to output the second clock signal to the first phase-locked loop and the second phase-locked loop.

19. The communication apparatus according to claim 16, wherein In a case where the first environmental interference intensity of the communication device is less than or equal to an interference intensity threshold, the switching module is configured to: adjust a clock signal output by a second phase-locked loop in the second front-end receive chain from a first clock signal to a second clock signal; switch a sampling rate of the second front-end receive chain from a first sampling rate corresponding to the first operating mode to a second sampling rate corresponding to the second operating mode, or switch the sampling rate of the second front-end receive chain from the first sampling rate to the second sampling rate and switch a second ADC in the second front-end receive chain from a first bit width corresponding to the first operating mode to a second bit width corresponding to the second operating mode; control the second front-end receive chain to process a first signal corresponding to the first front-end receive chain to obtain a second signal, and transmit the second signal to the first signal processing module; switch a sampling rate of the first signal processing module from the first sampling rate to the second sampling rate; wherein the first clock signal corresponds to the first operating mode, and the second clock signal corresponds to the second operating mode.

20. The communication apparatus according to claim 19, wherein, The switching module is further configured to: adjust a clock signal output by a first phase-locked loop in the first front-end receive chain from a third clock signal to a fourth clock signal; switching a sampling rate of the first front-end receiving chain from the first sampling rate to the second sampling rate, or switching the sampling rate of the first front-end receiving chain from the first sampling rate to the second sampling rate and switching a bit width of a first ADC in the first front-end receiving chain from the first bit width to the second bit width; controlling the first front-end receiving chain to process a third signal corresponding to the second front-end receiving chain to obtain a fourth signal, and transmitting the fourth signal to the second signal processing module; switching the second signal processing module from the first sampling rate to the second sampling rate; wherein the third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode.

21. The communication apparatus according to claim 16, wherein In a case where the first environmental interference intensity of the communication device is less than or equal to an interference intensity threshold, the switching module is configured to: adjust a clock signal output by a second phase-locked loop in the second front-end receiving chain from a first clock signal to a second clock signal; switch a bit width of a second ADC in the second front-end receiving chain from a first bit width corresponding to a first working mode to a second bit width corresponding to a second working mode; controlling the second front-end receiving chain to process a first signal corresponding to the first front-end receiving chain to obtain a second signal, and transmitting the second signal to the first signal processing module; wherein the first clock signal corresponds to the first working mode, and the second clock signal corresponds to the second working mode.

22. The communication apparatus according to claim 21, wherein, The switching module is further configured to: adjust a clock signal output by a first phase-locked loop in the first front-end receiving chain from a third clock signal to a fourth clock signal; switch a bit width of a first ADC in the first front-end receiving chain from the first bit width to the second bit width; controlling the first front-end receiving chain to process a third signal corresponding to the second front-end receiving chain to obtain a fourth signal, and transmitting the fourth signal to the second signal processing module; wherein the third clock signal corresponds to the first working mode, and the fourth clock signal corresponds to the second working mode.

23. The communication apparatus according to any one of claims 19-22, wherein, The first signal receiving channel further comprises a first antenna module, and the second signal receiving channel further comprises a second antenna module. The switching module comprises a first switch module, a second switch module, and a control module. The control module is connected to the first switch module, the second switch module, the first front-end receiving chain, the second front-end receiving chain, the first signal processing module, and the second signal processing module. The first switch module is connected to the first front-end receiving chain, the second front-end receiving chain, the first antenna module, and the second antenna module. The second switch module is connected to the control module, the first front-end receiving chain, the second front-end receiving chain, the first signal processing module, and the second signal processing module. In a case that the first environment interference intensity of the communication device is less than or equal to the interference intensity threshold, the control module is configured to: control the first switch module to disconnect the second antenna module from the second front-end receiving chain and establish connection between the first antenna module and the second front-end receiving chain, wherein the first antenna module is configured to provide a first signal corresponding to the first front-end receiving chain, and the second antenna module is configured to provide a third signal corresponding to the second front-end receiving chain; control the second switch module to disconnect the second front-end receiving chain from the second signal processing module and establish connection between the second front-end receiving chain and the first signal processing module, so as to process the first signal through the second front-end receiving chain to obtain the second signal.

24. The communication apparatus according to claim 23, wherein, The control module is further configured to: control the first switch module to establish connection between the second antenna module and the first front-end receiving chain; control the second switch module to establish connection between the first front-end receiving chain and the second signal processing module, so as to process the third signal through the first front-end receiving chain to obtain the fourth signal.

25. The communication apparatus according to claim 14, wherein The at least one signal receiving channel comprises a first signal receiving channel, and the first signal receiving channel comprises at least a first front-end receiving chain and a first signal processing module connected in series, wherein the first front-end receiving chain and the first signal processing module are connected to the switch module respectively; In a case that the first environment interference intensity of the communication device is less than or equal to the interference intensity threshold, the switch module is configured to: switch the sampling rate of the first front-end receiving chain and the first signal processing module from the first sampling rate to the second sampling rate, and / or switch the bit width of a first ADC in the first front-end receiving chain from the first bit width to the second bit width.

26. The communication apparatus according to claim 25, wherein, The first front-end receiving chain comprises a first phase-locked loop and a second phase-locked loop; Before the switch module switches the sampling rate of the first front-end receiving chain and the first signal processing module from the first sampling rate to the second sampling rate, and / or switches the bit width of a first ADC in the first front-end receiving chain from the first bit width to the second bit width, the switch module is configured to: control the first front-end receiving chain to receive a second clock signal provided by the second phase-locked loop; inhibit the first front-end receiving chain from receiving a first clock signal provided by the first phase-locked loop; wherein the clock frequency of the second clock signal corresponds to the second working mode, and the clock frequency of the first clock signal corresponds to the first working mode.

27. The communication apparatus according to claim 26, wherein The switch module comprises a switch module and a control module, and the switch module is connected to the first phase-locked loop, the second phase-locked loop, a first frequency mixer in the first front-end receiving chain and the control module respectively; the control module is configured to control the second phase-locked loop to output the second clock signal; The control module is further configured to control the switch module to disconnect the first frequency mixer from the first phase-locked loop and connect the first frequency mixer to the second phase-locked loop, so as to control the first pre-receiving chain to receive the second clock signal and prohibit the first pre-receiving chain from receiving the first clock signal.

28. The communication apparatus according to any one of claims 14-27, wherein, The switch module is further configured to switch the signal receiving channels from the second working mode to the first working mode when the second environmental interference intensity of the communication device is greater than the interference intensity threshold.

29. A communications device, characterized by The communication device comprises: at least one processor and a memory; the memory is configured to store a computer program; the processor is configured to execute the computer program stored in the memory, so that the communication device performs the communication method in any one of claims 1 to 13.

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