Fault injection test system

WO2025251380A1PCT designated stage Publication Date: 2025-12-11BEIJING JINGWEI HIRAIN TECH CO INC
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Patent Information

Application Number
PCT/CN2024/104966
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-06-05
Filing Date
2024-07-11
Publication Date
2025-12-11

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    Figure CN2024104966_11122025_PF_FP_ABST
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Abstract

Disclosed is a fault injection test system. The system comprises: a backboard module, comprising a switching chip, a plurality of first connectors, and a plurality of second connectors, wherein the plurality of second connectors are connected to a fail rail, the switching chip is configured to be connected to a superordinate computer, and the switching chip is connected to the plurality of first connectors, separately; an execution board module, connected to a corresponding first connector and two corresponding second connectors, separately, and configured to provide a corresponding fault signal for the fail rail by means of one of the second connectors in response to an instruction from the superordinate computer; and at least one fault injection module, connected to a corresponding first connector and a corresponding second connector, separately, configured to be connected to an external ECU, and configured to select, in response to an instruction from the superordinate computer, a corresponding fault signal from the fail rail for injection.
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Citation Information

Patent Citations

  • ECU detection and calibration system

    CN111830936A

  • FPGA-based universal digital circuit fault simulation injection system and method

    CN112307695A

  • Testing device and hardware-in-loop simulator

    CN202183045U

  • HIL test equipment

    CN211375425U

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    EP3379276A1