Display device and and power controlling method therefor

Abstract

A display device according to an embodiment of the present disclosure comprises: a display module; and a power board which includes a switching unit, an LLC resonant circuit, and a power controller, and supplies an output voltage to the display module, wherein the power controller generates a switch control signal for controlling a voltage applied to a gate in the switching unit, and can adjust the switch control signal on the basis of a current detection signal detected by the LLC resonance circuit.

Description

Display device and power control method therefor

[0001] The present disclosure relates to a display device and a power control method therefor.

[0002] A Switching Mode Power Supply (SMPS) is a power supply device that converts externally supplied alternating current into direct current (DC). The SMPS is designed to first apply AC input to an AC filter and rectify it, then, when power consumption is high, use an AC-DC converter with a power factor correction circuit. Then, it supplies the required voltage on the secondary side through an isolated DC-DC.

[0003] At this time, the FET of the switching circuit used in the converter is supplied with a constant driver voltage input from the Vcc of the IC. If this current increases or the switching frequency rises, gate ringing or switching loss increases.

[0004] Accordingly, display devices are applying soft switching technology to reduce switching loss, but measures to improve loss when gate is turned off and to meet EMI standards are still required.

[0005] The present disclosure seeks to minimize EMI problems caused by negative reverse voltage ringing due to rapid voltage changes at gate-off in soft switching.

[0006] The present disclosure seeks to minimize loss and switch damage caused by off-time delay when a fault occurs.

[0007] A display device according to an embodiment of the present disclosure includes a display module and a switching unit, an LLC resonant circuit, and a power controller, and includes a power board that supplies an output voltage to the display module, and the power controller generates a switch control signal that controls a voltage applied to a gate in the switching unit, and can adjust the switch control signal based on a current detection signal detected by the LLC resonant circuit.

[0008] The power controller can adjust the switch control signal to vary the gate voltage based on the current sensing signal detected in the LLC resonant circuit.

[0009] The power controller can adjust the switch control signal to reduce the voltage applied to the gate based on the current sensing signal detected in the LLC resonant circuit.

[0010] The power controller can adjust the switch control signal so that the voltage applied to the gate decreases with a first slope based on the peak period of the current sensing signal.

[0011] The power controller adjusts the switch control signal so that the voltage applied to the gate decreases at a second slope when the gate voltage reaches a threshold, and the second slope may be greater than the first slope.

[0012] The threshold may be a voltage value that is a predetermined value greater than a preset off reference level.

[0013] The power controller can calculate a gate-on level, which is a gate voltage value when the gate is turned on, based on a current detection signal, and adjust a switch control signal according to the calculated gate-on level.

[0014] The power controller can calculate the gate-on level based on the difference between the average value of the current value of the current detection signal integrated by an integrator and the preset gate level reference value compared by a comparator.

[0015] The power controller can calculate a higher gate-on level when the difference value is smaller, and can calculate a lower gate-on level when the difference value is larger.

[0016] A method of operating a display device according to an embodiment of the present disclosure may include a step of generating a switch control signal that controls a voltage applied to a gate in a switching unit, a step of adjusting the switch control signal based on a current detection signal detected in an LLC resonant circuit, and a step of controlling a gate according to the adjusted switch control signal.

[0017] The step of adjusting the switch control signal may include the step of adjusting the switch control signal so that the voltage applied to the gate decreases at a first slope based on a peak period of the current sensing signal.

[0018] The step of adjusting the switch control signal includes the step of adjusting the switch control signal so that the voltage applied to the gate decreases at a second slope when the gate voltage reaches a threshold, wherein the second slope may be greater than the first slope.

[0019] The method of operating the display device may further include a step of calculating a gate-on level, which is a gate voltage value when the gate is turned on, based on a current detection signal, and the step of generating a switch control signal may include a step of generating a switch control signal according to the calculated gate-on level.

[0020] The step of calculating the gate-on level may include a step of calculating the gate-on level based on a difference value obtained by comparing an average value obtained by integrating the current value of the current detection signal with an integrator and a preset gate level reference value with a comparator.

[0021] According to an embodiment of the present disclosure, by varying the voltage applied to the gate of the switching unit, there is a technical effect of suppressing rapid voltage changes when the gate is turned off, thereby reducing ringing and EMI effects.

[0022] According to an embodiment of the present disclosure, there is a technical effect of reducing loss due to off-time delay and protecting the switch by reducing the voltage applied to the gate of the switching unit in advance.

[0023] According to an embodiment of the present disclosure, by decreasing the gate voltage with a first slope and then decreasing it with a second slope greater than the first slope, the gate current is reduced, thereby minimizing the effect of parasitic inductance and enabling stable control of the gate.

[0024] FIG. 1 is a block diagram illustrating a display device (100) according to one embodiment of the present disclosure.

[0025] FIG. 2 is a block diagram showing an example of the display module (110) illustrated in FIG. 1.

[0026] FIG. 3 is a drawing showing the layout structure of a display panel (118) according to one embodiment of the present disclosure.

[0027] FIG. 4 is a diagram showing the structure of a unit pixel according to an embodiment of the present disclosure.

[0028] FIG. 5 is a block diagram showing a power board (130) according to one embodiment of the present disclosure.

[0029] Figure 6 is a diagram to explain a problem caused by rapid voltage change when the gate is turned off in soft switching technology.

[0030] FIG. 7 is a circuit diagram illustrating an example of a power board (130) according to an embodiment of the present disclosure.

[0031] FIG. 8 is an exemplary drawing for explaining the configuration of a power controller (136) according to an embodiment of the present disclosure.

[0032] FIG. 9 is an exemplary diagram illustrating a method for generating a switch control signal according to a gate-on level of a display device according to an embodiment of the present disclosure.

[0033] FIG. 10 is a flowchart illustrating an operation method of a display device according to an embodiment of the present disclosure.

[0034] FIG. 11 is a flowchart illustrating a method for a display device according to an embodiment of the present disclosure to adjust a switch control signal according to a current detection signal.

[0035] FIG. 12 is a drawing for explaining a display device according to an embodiment of the present disclosure in which the gate voltage is controlled to decrease at a first slope based on the peak section of the current detection signal (Vcs).

[0036] FIG. 13 is a drawing for explaining the effect that occurs when the gate voltage is reduced according to an embodiment of the present disclosure.

[0037] FIG. 14 is a diagram showing waveforms of gate voltage, drain voltage, and current according to an embodiment of the present disclosure.

[0038] Hereinafter, embodiments disclosed in this specification will be described in detail with reference to the attached drawings. Regardless of the drawing numbers, identical or similar components will be given the same reference numbers, and redundant descriptions thereof will be omitted. The suffixes 'module' and 'part' used for components in the following description are given or used interchangeably only for the convenience of writing the specification, and do not in themselves have distinct meanings or roles. In addition, when describing the embodiments disclosed in this specification, if it is determined that a specific description of a related known technology may obscure the gist of the embodiments disclosed in this specification, a detailed description thereof will be omitted. In addition, the attached drawings are only intended to make it easier to understand the embodiments disclosed in this specification, and the technical ideas disclosed in this specification are not limited by the attached drawings, and should be understood to include all modifications, equivalents, and substitutes included in the spirit and technical scope of the present disclosure.

[0039] Terms that include ordinal numbers, such as first, second, etc., may be used to describe various components, but the components are not limited by these terms. These terms are used solely to distinguish one component from another.

[0040] When a component is referred to as being "connected" or "connected" to another component, it should be understood that it may be directly connected or connected to that other component, but that there may be other components in between. Conversely, when a component is referred to as being "directly connected" or "connected" to another component, it should be understood that there are no other components in between.

[0041]

[0042] FIG. 1 is a block diagram illustrating a display device (100) according to one embodiment of the present disclosure.

[0043] Referring to FIG. 1, a display device (100) according to one embodiment of the present disclosure may include a control board (120), a power board (130), and a display module (110).

[0044] The control board (120) may be referred to as a control unit, controller, processor, CPU, etc. The power board (130) may be referred to as a power unit, power supply unit, power management unit, power controller, etc. The display module (110) may be referred to as a display, display unit, display block, display section, image display device, image device, etc.

[0045] The control board (120) is responsible for the overall management and control of the display device (100). For example, the control board (120) can control the display module (110) to display an image, and can control the power board (130) to stably supply a direct current voltage (EVDD) to the display module (110). In addition, the control board (120) can obtain status information of the display device (100) based on various detection signals received by the display device (100) and control the display device (100) to take actions corresponding to the status information.

[0046] The control board (120) may provide a dynamic power control (DPC) mode for reducing power consumption. The DPC mode may refer to an operating mode that reduces power consumption in the display panel (118, see FIG. 2) by intermittently switching the switching unit (132, see FIG. 5).

[0047] In one embodiment, the control board (120) generates a power control signal considering whether the DPC mode is activated and the load information of the display panel (118), transmits the generated power control signal to the power board (130), and the power board (130) generates an output voltage (EVDD) based on the transmitted power control signal and supplies it to the display module (110).

[0048] Alternatively, in another embodiment, the control board (120) may transmit the load information and DPC mode information of the display panel (118) to the power board (130), and the power board (130) may generate an output voltage (EVDD) that directly considers the load information of the display panel (118) based on the transmitted load information and DPC mode information and supply the output voltage to the display module (110).

[0049] The load of the display panel (118) may refer to the amount of energy consumed by the display panel (118) and may be determined by the driving current used to display an image on the display panel (118). For example, if the display panel (118) requires a large driving current, the load may be large, and if the display panel (118) requires a small driving current, the load may be small.

[0050] For example, if most of the plurality of pixels of the display panel (118) display a white-toned image, the maximum driving current is required for each pixel to display the white-toned image, so the sum of the driving currents required for most of the pixels of the display panel (118) is large, which may mean a large load. Conversely, if most of the plurality of pixels of the display panel (118) display a black-toned image, the minimum driving current, for example, 0 mA or a current value close to it, is required for each pixel to display the black-toned image, so the sum of the driving currents required for most of the pixels of the display panel (118) is small, which may mean a small load. In the above, it has been explained that the load is large when displaying a white-toned image and small when displaying a black-toned image, but the opposite is also possible.

[0051]

[0052] FIG. 2 is a block diagram showing an example of the display module (110) illustrated in FIG. 1.

[0053] Referring to FIG. 2, the display module (110) may include a timing controller (112), a gate driver (114), a data driver (116), and a display panel (118). If the display panel (118) is a liquid crystal display (LCD) panel, the display module (110) may further include a backlight unit (not shown).

[0054] The display panel (118) may include a plurality of pixels that display images or images based on a driving current. The display panel (118) may be a liquid crystal display panel or an organic light emitting diode (OLED) display panel.

[0055] The timing controller (112) can control the gate driver (114) and the data driver (116). That is, the timing controller (112) can output a gate control signal for controlling the gate driver (114) and a data control signal for controlling the data driver (116).

[0056] The gate driver (114) can supply a gate signal, for example, a scan signal, to the display panel (118) in response to the gate control signal. The display panel (118) can activate pixels according to the scan signal. When a pixel is activated, it can mean that an image signal is supplied to the corresponding pixel. If each pixel includes at least one switch, when a pixel is activated, it can mean that the corresponding switching element is turned on by the scan signal.

[0057] The data driver (116) can supply a video signal to the display panel (118) in frame units according to a data control signal.

[0058] Each of the plurality of pixels included in the display panel (118) can operate based on a data signal provided from a data driver (116) and a gate signal provided from a gate driver (114) to output an image. When the display panel (118) is an LCD panel, light emitted from a backlight unit (not shown) can pass through a color filter of each pixel to output an image. When the display panel (118) is an OLED panel, light emitted directly from each pixel can output an image.

[0059] The display panel (118) may include one or more sensing units (119), and the sensing units (119) may detect the driving current flowing to the pixels of the display panel (118). For example, the sensing units (119) may detect the driving current flowing to the pixels of the display panel (118) along the data lines (R1, G1, B1, W1~R) shown in FIG. 3. m , G m , B m , W m ) can be connected to the display panel (118). The detection unit (119) can detect the load of the display panel (118) and transmit the load information to the control board (120). For example, the detection unit (119) can detect the load of the display panel (118) and transmit the load information to the control board (120). For example, the detection unit (119) can detect the load of the display panel (118) and transmit the load information to the control board (120). m , G m , B m , W m ) can detect the state of the load by measuring the driving current flowing on the control board (120). Alternatively, the control board (120) can generate load information based on the output image data.

[0060]

[0061] FIG. 3 is a drawing showing the layout structure of a display panel (118) according to one embodiment of the present disclosure.

[0062] Referring to FIG. 3, the display panel (118) may include a plurality of pixels. In addition, a plurality of sub-pixels (SPr1, SPg1, SPb1, SPw1) may constitute one group pixel. Each sub-pixel (SPr1, SPg1, SPb1, SPw1) may include an organic light-emitting element or a color filter capable of implementing different colors.

[0063]

[0064] FIG. 4 is a diagram showing the structure of a unit pixel according to an embodiment of the present disclosure.

[0065] Referring to FIG. 4, each pixel (CRTm) may include a scan switching element (SW1), a storage capacitor (Cst), a driving switching element (SW2), and an organic light-emitting diode (OLED).

[0066] The scan switching element (SW1) has a scan line connected to the gate terminal, and receives a scan signal (V) input from the gate driver (114). scan ) can be turned on. When the scan switching element (SW1) is turned on, the image signal (V) input from the data driver (116) data ) is transmitted to the gate terminal of the driving switching element (SW2) or one end of the storage capacitor (Cst).

[0067] The storage capacitor (Cst) is formed between the gate terminal and the source terminal of the driving switching element (SW2), and stores a predetermined difference between the image signal level transmitted to one end of the storage capacitor (Cst) and the DC power (Vdd) level transmitted to the other end of the storage capacitor (Cst). For example, when the image signal has different levels according to the PAM (Plus Amplitude Modulation) method, the image signal (V data ) the power level stored in the storage capacitor (Cst) changes depending on the level difference. As another example, if the image signal has different pulse widths according to the PWM (Pulse Width Modulation) method, the image signal (V data ) The power level stored in the storage capacitor (Cst) changes depending on the difference in pulse width.

[0068] The driving switching element (SW2) is turned on according to the power level stored in the storage capacitor (Cst). When the driving switching element (SW2) is turned on, a driving current (I) proportional to the stored power level OLED ) flows into the organic light-emitting diode (OLED). Accordingly, the organic light-emitting diode (OLED) can emit light.

[0069] An organic light emitting diode (OLED) includes an RGBW emission layer (EML) corresponding to a sub-pixel, and may include at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), and may also include a hole blocking layer.

[0070] Each sub-pixel emits white light from an organic light-emitting diode (OLED) and may include separate color filters for color implementation. Green, red, and blue sub-pixels (SP r1 , SP g1 , SP b1 ), a separate color filter may be provided for color implementation. On the other hand, white subpixels (SP w1 ) outputs white light, so a separate color filter may not be required.

[0071] Meanwhile, in Fig. 4, the scan switching element (SW1) and the driving switching element (SW2) are exemplified as being p-type MOSFETs, but n-type MOSFETs, or other switching elements such as JFETs, IGBTs, or SICs may also be used.

[0072]

[0073] FIG. 5 is a block diagram showing a power board (130) according to one embodiment of the present disclosure.

[0074] Referring to FIG. 5, the power board (130) may include a PFC circuit (131), a switching unit (132), an LLC resonant circuit (133), a transformer (134), a rectifier circuit (135), and a power controller (136).

[0075] The PFC circuit (131) is a power factor correction circuit, and may refer to a circuit that improves the power factor of the input power (or input voltage) and outputs it. The switching unit (132) includes at least one switch (e.g., two), and may supply a voltage by the operation of switching according to the control of the power controller (136) to the LLC resonant circuit (133). The LLC resonant circuit (133), the transformer (134), and the rectifier circuit (135) may generate an output direct current voltage (EVDD). The LLC circuit (133) may also be referred to as a resonant tank.

[0076] The power controller (136) can control the switching unit (132) through a switch control signal, and the switch control signal can include a first output (or Ho output) that controls a first switch included in the switching unit (132) and a second output (or Lo output) that controls a second switch included in the switching unit (132).

[0077] The power controller (136) can receive the output DC voltage (EVDD) as feedback and receive DPC mode information (or DPC mode activation information) or load information from the control board (120). Then, the power controller (136) can control the operation of the PFC circuit (131) or the switching unit (132) by considering at least one of the received DPC mode information, load information, or feedback. For example, the power controller (136) can generate a switch control signal and control the operation of at least one switch included in the switching unit (132) by transmitting the generated switch control signal to the switching unit (132). For example, the power controller (136) can adjust the output voltage of the PFC circuit (131).

[0078]

[0079] The switch control signal may be a signal that controls the gate voltage of the switch included in the switching unit (132).

[0080] Conventional gate voltages are switched on and off at a constant Vcc voltage. When hard switching is required during on / off, the gate voltage's off-speed in the gate trace is reduced, or beads, snubbers, etc. are used to improve loss and EMI.

[0081] Meanwhile, in the display device (100), soft switching is performed for high efficiency and miniaturization, and a rapid voltage change occurs when the gate is turned off.

[0082] Figure 6 is a diagram illustrating the problem described above. Figure 6 is a diagram for explaining a problem caused by rapid voltage changes when the gate is turned off in soft switching technology.

[0083] As illustrated in Figure 6, when rapid voltage changes occur, there is a problem of increased EMI impact due to negative reverse voltage ringing. In addition, there is a problem of off-delay occurring in failure mode.

[0084] Accordingly, the present disclosure seeks to improve EMI by controlling the gate voltage applied to the gate. In particular, the present disclosure seeks to reduce EMI and switching loss due to speed changes during switching transitions by sensing the current of an LLC resonant circuit (133) and implementing dynamic gate voltage control, reduce turn-off delay in a failure mode to protect the switch, and improve switch performance by reducing voltage change rates and current change rates.

[0085] It can be applied not only to the display device (100) proposed in the present disclosure, but also to a topology using soft switching.

[0086]

[0087] FIG. 7 is a circuit diagram illustrating an example of a power board (130) according to an embodiment of the present disclosure.

[0088] The circuit diagram of Fig. 7 illustrates a configuration for explaining a method of implementing dynamic gate voltage control by sensing the current of an LLC resonant circuit (133). That is, other configurations may be added in addition to the circuit diagram of Fig. 7. Furthermore, some of the configurations of Fig. 7 may be omitted.

[0089] The power board (130) further includes a current sensing unit (133a) that senses the current of the LLC resonant circuit (133), and the power controller (136) can receive the current value sensed by the current sensing unit (133a). The current sensing unit (133a) may be a current transformer (CT, 133a). The current sensing unit (133a) may be composed of at least one resistor and one capacitor.

[0090] The current value sensed by the current sensing unit (133a) may be the current of the LLC resonant circuit (133). The current sensing unit (133a) may be connected to the LLC resonant circuit (133). In particular, the current sensing unit (133a) may be connected to a node between a capacitor and an inductor of the LLC resonant circuit (133). The current sensing unit (133a) may obtain a current sensing signal (Vcs) that detects a voltage drop across the capacitor of the LLC resonant circuit (133). The current sensing signal (Vcs) may indicate the resonance magnitude of the LLC resonant circuit (133). Meanwhile, the current sensing signal (Vcs) is only an example of a detection signal, and the current sensing unit (133a) may obtain a detection signal other than the current sensing signal (Vcs) of FIG. 7.

[0091] The power controller (136) can obtain a current detection signal (Vcs) through a current sensing unit (133a) and obtain a switch control signal based on the current detection signal (Vcs).

[0092] FIG. 8 is an exemplary drawing for explaining the configuration of a power controller (136) according to an embodiment of the present disclosure.

[0093] The power controller (136) may include at least one of a wave generator (1361), a first switch gate driver (1362), a second switch gate driver (1363), a gate-on level acquisition unit (1364), and an OCP level acquisition unit (1366).

[0094] The wave generator (1361) can determine and generate a switch control signal for controlling the switching unit (132). The wave generator (1361) can generate the switch control signal and transmit it to the first and second switch gate drivers (1362) (1363).

[0095] The first and second switch gate drivers (1362)(1363) can control the switching unit (132) based on the switch control signal received from the wave generator (1361). For example, the first switch gate driver (1362) can control the gate of the first switch (High side switch), and the second switch gate driver (1363) can control the gate of the second switch (Low side switch).

[0096] The gate-on level acquisition unit (1364) can acquire the gate-on levels of each of the first and second switches. The gate-on levels may be gate voltage values ​​when the gates of each of the first and second switches are turned on.

[0097] The gate-on level acquisition unit (1364) may include at least one of a comparator (1364a) and an integrator (1364b). The gate-on level acquisition unit (1364) may acquire the gate-on level based on a difference value obtained by comparing an average value of the current value of the current detection signal (Vcs) integrated by the integrator (1364b) and a preset gate level reference value (Gate level Ref) by the comparator (1364a).

[0098] Specifically, the gate on level acquisition unit (1364) can calculate a higher gate on level as the difference value is smaller, and can calculate a lower gate on level as the difference value is larger. For example, the gate on level acquisition unit (1364) can acquire the gate on level as a first level if the difference value is less than a first value, can acquire the gate on level as a second level lower than the first level if the difference value is greater than or equal to the first value and less than a second value, and can acquire the gate on level as a third level lower than the second level if the difference value is greater than or equal to the second value. However, this is merely an example, and the gate on level acquisition unit (1364) can acquire the gate on level in various ways based on the difference value.

[0099] FIG. 9 is an exemplary diagram illustrating a method for generating a switch control signal according to a gate-on level of a display device according to an embodiment of the present disclosure.

[0100] Fig. 9 (a) shows a switch control signal whose gate-on level is the first level, Fig. 9 (b) shows a switch control signal whose gate-on level is the second level less than the first level, and Fig. 9 (c) shows a switch control signal whose gate-on level is the third level less than the second level.

[0101] The OCP level acquisition unit (1366) can acquire an OCP level for triggering an OCP (Over Current Protection) event. The OCP level acquisition unit (1366) can acquire the OCP level by comparing the current value of the current detection signal (Vcs) with the OCP reference value using a comparator (1366a).

[0102] The wave generator (1361) can receive feedback (F / B), a gate-on level, and an OCP level. The feedback (F / B) can be an output direct current voltage (EVDD). The wave generator (1361) can determine and generate a switch control signal based on the received feedback (F / B), gate-on level, and OCP level.

[0103] Next, with reference to FIG. 10, an operation method of a display device (100) according to an embodiment of the present disclosure will be described.

[0104] FIG. 10 is a flowchart illustrating an operation method of a display device according to an embodiment of the present disclosure.

[0105] The power controller (136) can produce a gate-on level (S10).

[0106] The power controller (136) can acquire the gate-on level through the gate-on level acquisition unit (1364). The method for acquiring the gate-on level is the same as that described above in FIG. 8, and thus, a duplicate description will be omitted.

[0107] The power controller (136) can generate a switch control signal according to the calculated gate-on level (S20).

[0108] The power controller (136) can generate a switch control signal using the gate-on level through the wave generator (1361).

[0109] The power controller (136) can adjust the switch control signal according to the current detection signal (Vcs) (S30).

[0110] The power controller (136) can adjust the switch control signal to decrease the gate voltage according to the current detection signal (Vcs) through the wave generator (1361).

[0111] Next, referring to FIG. 11, a method for a power controller according to an embodiment of the present disclosure to adjust a switch control signal according to a current detection signal will be described.

[0112] FIG. 11 is a flowchart illustrating a method for a display device according to an embodiment of the present disclosure to adjust a switch control signal according to a current detection signal.

[0113] The power controller (136) can control the gate voltage to decrease to a first slope based on the peak section of the current detection signal (Vcs) (S310).

[0114] That is, the power controller (136) can adjust the switch control signal so that the gate voltage decreases to the first slope based on the peak section of the current sensing signal (Vcs).

[0115] FIG. 12 is a drawing for explaining a display device according to an embodiment of the present disclosure in which the gate voltage is controlled to decrease at a first slope based on the peak section of the current detection signal (Vcs).

[0116] Referring to (a) of Fig. 12, it can be confirmed that the gate voltage of the switch constituting the switching unit (132) is maintained at a constant voltage during the on period.

[0117] According to the present disclosure, the power controller (136) can detect a peak section of the current detection signal (Vcs). The peak section may be a section including a point in time when the current value of the current detection signal (Vcs) is detected as a peak. The peak section may be a section including a predetermined time before and after the point in time when the current value of the current detection signal (Vcs) is detected as a peak. The power controller (136) can detect the peak section of the current detection signal (Vcs) by counting the current value of the current detection signal (Vcs) at predetermined cycles.

[0118] When the peak section of the current detection signal (Vcs) is detected, the power controller (136) can adjust the switch control signal so that the gate voltage decreases to the first slope from the peak section.

[0119] Referring to (b) of Fig. 12, it can be confirmed that the gate voltage decreases after the peak section of the current detection signal (Vcs).

[0120] FIG. 13 is a drawing for explaining the effect that occurs when the gate voltage is reduced according to an embodiment of the present disclosure.

[0121] It can be confirmed that the gate voltage (Vg') according to the embodiment of the present disclosure has a smaller gate-on voltage than the conventional gate voltage (Vg), and the slope (dv / dt) decreasing from the peak section is also smaller than the conventional one.

[0122] In this way, according to the present disclosure, the rapid decrease in gate voltage is suppressed, and the effect of reducing gate ringing and switching loss can be confirmed.

[0123] Meanwhile, the power controller (136) may have an off reference level preset. The off reference level may refer to a reference level for turning off the switch. When the gate voltage reaches the off reference level, the gate voltage may be controlled to 0. For example, the off reference level may be 5 V, but this is merely an example.

[0124] According to one embodiment, the power controller (136) can control the gate to turn off when it is detected that the gate voltage has decreased to an off reference level.

[0125] In another embodiment, the power controller (136) may pre-adjust the slope at which the gate voltage decreases before the gate voltage reaches the off reference level. Such an embodiment is described in step S320 of FIG. 11.

[0126] That is, depending on the embodiment, the gate voltage may decrease at a first slope and then turn off, or the gate voltage may decrease at a first slope and then turn off at a second slope.

[0127] The power controller (136) can control the gate voltage to decrease to a second slope based on the threshold of the current detection signal (Vcs) (S320).

[0128] That is, the power controller (136) can adjust the switch control signal so that the gate voltage decreases to the second slope based on the threshold of the current sensing signal (Vcs).

[0129] The threshold can indicate a voltage value that is a predetermined value greater than the off reference level.

[0130] The power controller (136) may adjust the switch control signal so that the gate voltage decreases with a first slope, and when the gate voltage reaches a threshold, adjust the switch control signal so that the gate voltage decreases with a second slope. At this time, the second slope may be greater than the first slope. In this way, when the gate voltage is controlled to decrease rapidly near the off reference level, there is an advantage in that the gate current is reduced, the effect of parasitic inductance is minimized, and stable control of the gate is possible.

[0131] Again, Figure 10 is explained.

[0132] The power controller (136) can control the gate according to the switch control signal (S40).

[0133] FIG. 14 is a diagram showing waveforms of gate voltage, drain voltage, and current according to an embodiment of the present disclosure.

[0134] Fig. 14 (a) shows waveforms of conventional gate voltage, drain voltage, and current, Fig. 14 (b) shows waveforms of gate voltage, drain voltage, and current when the gate voltage is operated in a variable manner according to the present disclosure, and Fig. 14 (c) shows waveforms of gate voltage, drain voltage, and current when the drain-off speed is delayed while the gate voltage is operated in a variable manner according to the present disclosure.

[0135] And, [Table 1] below shows the decrease slope of the gate voltage, gate off time, switching loss, and EMI noise according to (a), (b), and (c) of Fig. 14, respectively.

[0136] dv / dtGate Off timeSwitch lossEMI NoiseNote ①LargeLargeBefore change②LargeSmallSmallMediumCurrent Source Same③SmallMediumMediumSmallCurrent Source Variable

[0137] In this way, according to the embodiment of the present disclosure, the power controller (136) has a technical advantage of reducing ringing and EMI effects as the voltage level is low and the source current is low by varying the voltage applied to the gate of the switching unit (132) based on the current detection signal (Vcs).

[0138] In addition, according to the embodiment of the present disclosure, since the voltage applied to the gate is reduced along a predetermined slope, there is an advantage in that stability can be secured through rapid off when an abnormal event occurs.

[0139] In addition, the power controller (136) can reduce the voltage applied to the gate of the switching unit (132) with a first slope, and then reduce the voltage with a second slope greater than the first slope when the voltage reaches a threshold. That is, the power controller (136) has the advantage of reducing the gate current by controlling the gate voltage before it reaches the off reference level, thereby minimizing the effect of parasitic inductance and enabling stable control of the gate.

[0140] The above description is merely an example of the technical idea of ​​the present invention, and those skilled in the art will appreciate that various modifications and variations can be made without departing from the essential characteristics of the present invention.

[0141] Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of ​​the present invention but to explain it, and the scope of the technical idea of ​​the present invention is not limited by these embodiments.

[0142] The scope of protection of the present invention should be interpreted by the claims below, and all technical ideas within the scope equivalent thereto should be interpreted as being included in the scope of the rights of the present invention.

Claims

1. Display module; and A power board including a switching unit, an LLC resonant circuit and a power controller, and supplying an output voltage to the display module, The above power controller Generate a switch control signal that controls the voltage applied to the gate in the above switching unit, Adjusting the switch control signal based on the current detection signal detected in the LLC resonant circuit. Display device.

2. In claim 1, The above power controller The switch control signal is adjusted so that the gate voltage is varied based on the current detection signal detected in the LLC resonant circuit. Display device.

3. In claim 2, The above power controller Adjusting the switch control signal so that the voltage applied to the gate is reduced based on the current detection signal detected in the LLC resonant circuit. Display device.

4. In claim 1, The above power controller Adjusting the switch control signal so that the voltage applied to the gate is reduced to a first slope based on the peak period of the current detection signal. Display device.

5. In claim 4, The above power controller When the gate voltage reaches a threshold, the switch control signal is adjusted so that the voltage applied to the gate decreases with a second slope, The second slope is greater than the first slope. Display device.

6. In claim 5, The above threshold is A voltage value that is a predetermined value greater than the preset off reference level. Display device.

7. In claim 1, The above power controller Based on the current detection signal, the gate-on level, which is a gate voltage value when the gate is turned on, is calculated, and the switch control signal is adjusted according to the calculated gate-on level. Display device.

8. In claim 7, The above power controller The gate-on level is calculated based on the difference between the average value of the current value of the current detection signal integrated by an integrator and the preset gate level reference value compared by a comparator. Display device.

9. In claim 8, The above power controller The smaller the difference value, the higher the gate-on level is calculated, and the larger the difference value, the lower the gate-on level is calculated. Display device.

10. A method for operating a display device including a display module and a power board, wherein the power board includes a switching unit, an LLC resonant circuit, and a power controller, and supplies an output voltage to the display module. A step of generating a switch control signal that controls the voltage applied to the gate in the switching unit; A step of adjusting the switch control signal based on the current detection signal detected in the LLC resonant circuit; and A step of controlling the gate according to the adjusted switch control signal. How the display device operates.

11. In claim 10, The step of adjusting the above switch control signal is A step of adjusting the switch control signal so that the voltage applied to the gate is reduced to a first slope based on the peak period of the current detection signal. How the display device operates.

12. In claim 11, The step of adjusting the above switch control signal is a step of adjusting the switch control signal so that the voltage applied to the gate is reduced to a second slope when the gate voltage reaches a threshold; The second slope is greater than the first slope. How the display device operates.

13. In claim 12, The above threshold is A voltage value that is a predetermined value greater than the preset off reference level. How the display device operates.

14. In claim 11, Further comprising a step of calculating a gate-on level, which is a gate voltage value when the gate is turned on based on the current detection signal, The step of generating the above switch control signal is A step of generating the switch control signal according to the calculated gate-on level is included. How the display device operates.

15. In claim 14, The step of calculating the above gate on level is A step of calculating the gate-on level based on the difference value obtained by comparing the average value of the current value of the current detection signal integrated by an integrator and the preset gate level reference value by a comparator. How the display device operates.

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