Method, communication device, processing device, and storage medium for transmitting transport block, and method, communication device, processing device, and storage medium for receiving transport block

Abstract

This transmitter may: apply channel coding to C1 information blocks associated with a transport block to generate C1 coded bit blocks each having a length of N_d and C2 parity bit blocks each having a length of N_p; write the C1 coded bit blocks into C1 circular buffers each having a length of N_cb,d; write the C2 parity bit blocks into C2 circular buffers each having a length of N_cb,p; determine transmission bits from the C1 circular buffers and the C2 circular buffers; and transmit the transmission bits over a wireless channel, wherein N_cb,p = N_p and N_cb,d < N_d.

Description

Method for transmitting a transport block, communication device, processing device, and storage medium, and method for receiving a transport block, communication device, processing device, and storage medium

[0001] This specification relates to wireless communication systems.

[0002] Various devices and technologies, such as machine-to-machine (M2M) communication, machine-type communication (MTC), and smartphones and tablet PCs (personal computers) that require high data transmission rates, are emerging and becoming widespread. Consequently, the amount of data required to be processed on cellular networks is rapidly increasing. To meet this rapidly increasing data processing demand, technologies such as carrier aggregation and cognitive radio are being developed to efficiently utilize more frequency bands, while multi-antenna technology and multi-BS cooperation technology are being developed to increase the data capacity transmitted within a limited frequency range.

[0003] As more and more communication devices demand greater capacity, the need for enhanced mobile broadband (eMBB) communications is emerging, surpassing legacy radio access technology (RAT). Furthermore, massive machine type communication (mMTC), which connects multiple devices and objects to provide diverse services anytime, anywhere, is a key issue to be considered in next-generation communications.

[0004] Additionally, discussions are underway on communication systems designed to accommodate reliability- and latency-sensitive services and user equipment (UE). The introduction of next-generation wireless access technologies is being discussed, including enhanced mobile broadband (eMBB), mMTC, and ultra-reliable and low latency communication (URLLC).

[0005] Advances in communication technology are driving the need for increasingly larger transport blocks to be transmitted simultaneously. When errors occur during the transmission of large transport blocks, efficient methods and devices for recovering from transmission errors are required.

[0006] The technical tasks that this specification aims to achieve are not limited to the technical tasks mentioned above, and other technical tasks that are not mentioned will be clearly understood by those skilled in the art related to this specification from the detailed description below.

[0007] In one aspect of the present disclosure, a method for transmitting a transport block by a communication device in a wireless communication system is provided. The method comprises: obtaining C1 information blocks from the transport block, where C1 is a positive integer; applying channel coding to the C1 information blocks to generate C1 coded bit blocks, each having a length of N_d, and C2 parity bit blocks, each having a length of N_p, where C2 is a positive integer; writing the C1 coded bit blocks into C1 circular buffers, each having a length of N_cb,d; writing the C2 parity bit blocks into C2 circular buffers, each having a length of N_cb,p; determining transmission bits in the C1 circular buffers and the C2 circular buffers; and transmitting the transmission bits over a wireless channel, where N_cb,p = N_p and N_cb,d < N_d.

[0008] In another aspect of the present disclosure, a communication device for transmitting a transport block in a wireless communication system is provided. The communication device comprises: at least one transceiver; at least one processor; and at least one computer memory operably connectable to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations, the operations comprising: obtaining C1 information blocks from the transport block, where C1 is a positive integer; applying channel coding to the C1 information blocks to generate C1 coded bit blocks, each having a length N_d, and C2 parity bit blocks, each having a length N_p, where C2 is a positive integer; writing the C1 coded bit blocks into C1 circular buffers, each having a length N_cb,d; writing the C2 parity bit blocks into C2 circular buffers, each having a length N_cb,p; determining transport bits in the C1 circular buffers and the C2 circular buffers; and transmitting the above transmission bits through a wireless channel, wherein N_cb,p = N_p and N_cb,d < N_d.

[0009] In another aspect of the present disclosure, a processing device is provided. The processing device comprises: obtaining C1 information blocks from a transport block, C1 being a positive integer; applying channel coding to the C1 information blocks to generate C1 coded bit blocks, each having a length of N_d, and C2 parity bit blocks, each having a length of N_p, wherein C2 is a positive integer; writing the C1 coded bit blocks into C1 circular buffers, each having a length of N_cb,d; writing the C2 parity bit blocks into C2 circular buffers, each having a length of N_cb,p; determining transmission bits in the C1 circular buffers and the C2 circular buffers; and transmitting the transmission bits over a wireless channel, wherein N_cb,p = N_p and N_cb,d < N_d.

[0010] In another aspect of the present disclosure, a computer-readable storage medium is provided. The storage medium stores at least one program code comprising instructions that, when executed, cause at least one processor to perform operations, the operations comprising: obtaining C1 information blocks from a transport block, where C1 is a positive integer; applying channel coding to the C1 information blocks to generate C1 coded bit blocks, each block having a length N_d, and C2 parity bit blocks, each block having a length N_p, where C2 is a positive integer; writing the C1 coded bit blocks into C1 circular buffers, each block having a length N_cb,d; writing the C2 parity bit blocks into C2 circular buffers, each block having a length N_cb,p; determining transmission bits in the C1 circular buffers and the C2 circular buffers; and transmitting the transmission bits over a wireless channel, where N_cb,p = N_p and N_cb,d < N_d.

[0011] In another aspect of the present disclosure, a method for a communication device to receive a transport block in a wireless communication system is provided. The method comprises: receiving coded bits; and performing channel decoding on the coded bits to obtain the transport block, wherein the coded bits include bits obtained from C1 circular buffers, each having a length of N_cb,p, and C2 circular buffers, each having a length of N_cb,p, wherein C1 and C2 are positive integers, the C1 circular buffers are for C1 coded bit blocks, each having a length of N_d, the C2 circular buffers are for C2 parity bit blocks, each having a length of N_p, the C1 coded bit blocks and the C2 parity bit blocks are generated by channel coding C1 information blocks associated with the transport block, wherein N_cb,p = N_p, and N_cb,d < N_d.

[0012] In another aspect of the present disclosure, a communication device for receiving a transport block in a wireless communication system is provided. The communication device comprises: at least one transceiver; at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations, the operations comprising: receiving coded bits; And performing channel decoding on the coded bits to obtain the transport block, wherein the coded bits include bits obtained from C1 circular buffers, each having a length of N_cb,p, and C2 circular buffers, each having a length of N_cb,p, wherein C1 and C2 are positive integers, the C1 circular buffers are for C1 coded bit blocks, each having a length of N_d, the C2 circular buffers are for C2 parity bit blocks, each having a length of N_p, and the C1 coded bit blocks and the C2 parity bit blocks are generated through channel coding on C1 information blocks associated with the transport block, wherein N_cb,p = N_p, and N_cb,d < N_d.

[0013] In each aspect of the present specification, applying channel coding to the C1 information blocks to generate the C1 coded bit blocks and the C2 parity bit blocks may include: applying outer coding to the C1 information blocks to generate the C2 parity blocks; applying inner coding to each of the C1 information blocks and the C2 parity blocks to generate the C1 coded bit blocks and the C2 parity bit blocks.

[0014] In each aspect of the present specification, applying channel coding to the C1 information blocks to generate the C1 coded bit blocks and the C2 parity bit blocks may include: applying globally coupled low parity check (GC LDPC) coding to the C1 information blocks to generate the C1 coded bit blocks and the C2 parity bit blocks.

[0015] In each aspect of this specification, N_cb,d = FLOOR{N_ref - C2 / C1*(N_d - N_ref)}, where N_ref = FLOOR{TBS_LBRM / (C*R_LBRM)}, and

[0016] Here, C = C1 + C2, TBS_LBRM is a rate matching related buffer size for the transport block, and R_LBRM may be a predetermined code rate.

[0017] For each aspect of this specification, TBS_LBRM may be determined based on i) C1+C2, ii) the size of radio resources for the transmission bits, and iii) the maximum number of multiple input multiple output (MIMO) layers configured for the radio channel.

[0018] In each aspect of the present specification, the transmitted or received coded bits may include: generating a rate-matched output sequence of length E_r from each of the C1 circular buffers and the C2 circular buffers, where E_r is the number of rate-matched bits for the r-th code block, which is an information block or a parity block.

[0019] The above problem solving methods are only some of the examples of this specification, and various examples reflecting the technical features of this specification can be derived and understood by a person having ordinary knowledge in the relevant technical field based on the detailed description below.

[0020] According to some implementations of this specification, wireless communication signals can be transmitted and received efficiently. Consequently, the overall throughput of a wireless communication system can be increased.

[0021] Some implementations of this specification allow a receiver to reduce processing time and power consumption by using external code parity to recover only code blocks that have transmission errors.

[0022] The effects according to this specification are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art related to this specification from the detailed description below.

[0023] To aid in understanding implementations of this specification, the accompanying drawings, which are included as part of the detailed description, provide examples of implementations of this specification and, together with the detailed description, illustrate implementations of this specification:

[0024] Figure 1 illustrates an example of a communication system 1 to which implementations of the present specification are applied;

[0025] FIG. 2 is a block diagram illustrating examples of communication devices capable of performing a method according to the present specification.

[0026] FIG. 3 illustrates another example of a wireless device capable of performing implementation(s) of this specification;

[0027] Figure 4 is the 3rd generation partnership project (3 rd It illustrates an example of a frame structure available in a wireless communication system based on the 3rd Generation Partnership Project (3GPP);

[0028] Figure 5 illustrates a processing process on the transmission side for a transport block (TB);

[0029] Figures 6 and 7 are drawings illustrating a parity check matrix H of a low density parity check (LDPC) code using a bipartite graph;

[0030] Figure 8 illustrates circulant permutation matrices (CPMs);

[0031] Figure 9 illustrates a schematic structure of a basic graph of a low density parity check (LDPC) code;

[0032] Figure 10 is a diagram illustrating the criteria for selecting an LDPC base graph;

[0033] FIG. 11 is a diagram illustrating a rate matching process according to some implementations of the present specification;

[0034] Figure 12 illustrates the encoding operation of the outer code;

[0035] Figure 13 illustrates a globally coupled LDPC (GC LDPC) code;

[0036] Figure 14 illustrates the basic matrix representation of GC LDPC codes;

[0037] Fig. 15 illustrates a schematic structure of a GC LDPC code;

[0038] Figures 16 and 17 illustrate transmissions of parity for forward error correction (FEC);

[0039] Figures 18 through 20 are examples of bits transmitted and bits punctured according to some implementations of the present specification when limited buffer rate matching (LBRM) is applied;

[0040] FIG. 21 illustrates a channel encoding process according to some implementations of the present specification;

[0041] Figure 22 illustrates a channel decoding process according to some implementations of the present specification.

[0042] Hereinafter, implementations according to this specification will be described in detail with reference to the attached drawings. The detailed description provided below, together with the attached drawings, is intended to describe exemplary implementations of this specification and is not intended to represent the only possible implementations of this specification. The detailed description below includes specific details to provide a thorough understanding of this specification. However, one of ordinary skill in the art will appreciate that this specification may be practiced without these specific details.

[0043] In some cases, to avoid ambiguity in the concepts of this specification, known structures and devices may be omitted or illustrated in block diagram form focusing on the core functions of each structure and device. Furthermore, identical components are described using the same drawing reference numerals throughout this specification.

[0044] The techniques, devices, and systems described below can be applied to various wireless multiple access systems. Examples of multiple access systems include code division multiple access (CDMA) systems, frequency division multiple access (FDMA) systems, time division multiple access (TDMA) systems, orthogonal frequency division multiple access (OFDMA) systems, single carrier frequency division multiple access (SC-FDMA) systems, and multi-carrier frequency division multiple access (MC-FDMA) systems. CDMA can be implemented in wireless technologies such as Universal Terrestrial Radio Access (UTRA) or CDMA2000. TDMA can be implemented in wireless technologies such as Global System for Mobile communication (GSM), General Packet Radio Service (GPRS), and Enhanced Data Rates for GSM Evolution (EDGE) (i.e., GERAN). OFDMA can be implemented in wireless technologies such as IEEE (Institute of Electrical and Electronics Engineers) 802.11 (WiFi), IEEE 802.16 (WiMAX), IEEE 802-20, and E-UTRA (evolved-UTRA). UTRA is part of UMTS (Universal Mobile Telecommunication System), and 3GPP (3rd Generation Partnership Project) LTE (Long Term Evolution) is a part of E-UMTS that uses E-UTRA.3GPP LTE adopts OFDMA for the downlink (DL) and SC-FDMA for the uplink (UL). LTE-A (LTE-advanced) is an evolved form of 3GPP LTE.

[0045] For convenience of explanation, the following description assumes that this specification applies to 3GPP-based communication systems, such as LTE and NR. However, the technical features of this specification are not limited to this. For example, although the detailed description below is based on a mobile communication system corresponding to a 3GPP LTE / NR system, it can also be applied to any other mobile communication system, except for features specific to 3GPP LTE / NR.

[0046] For terms and technologies used in this specification that are not specifically explained, reference may be made to 3GPP-based standard documents, such as 3GPP TS 36.211, 3GPP TS 36.212, 3GPP TS 36.213, 3GPP TS 36.321, 3GPP TS 36.300 and 3GPP TS 36.331, 3GPP TS 37.213, 3GPP TS 38.211, 3GPP TS 38.212, 3GPP TS 38.213, 3GPP TS 38.214, 3GPP TS 38.300, 3GPP TS 38.331, etc.

[0047] In the examples of this specification described below, the expression "assumes" that a device "assumes" that the entity transmitting the channel transmits the channel in a manner consistent with the "assume." The entity receiving the channel may mean that, under the assumption that the channel was transmitted in a manner consistent with the "assume," the entity receiving the channel receives or decodes the channel in a manner consistent with the "assume."

[0048] In this specification, UE may be fixed or mobile, and includes various devices that communicate with a BS (base station) to transmit and / or receive user data and / or various control information. UE may be called (Terminal Equipment), MS (Mobile Station), MT (Mobile Terminal), UT (User Terminal), SS (Subscribe Station), wireless device, PDA (Personal Digital Assistant), wireless modem, handheld device, etc. In addition, in this specification, BS generally refers to a fixed station that communicates with UE and / or other BS, and exchanges various data and control information with UE and other BS. BS may be called by other terms such as ABS (Advanced Base Station), NB (Node-B), eNB (evolved-NodeB), BTS (Base Transceiver System), Access Point, PS (Processing Server), etc. In particular, the BS in UTRAN is called a Node-B, the BS in E-UTRAN is called an eNB, and the BS in a new radio access technology network is called a gNB. For convenience of explanation, BSs are collectively referred to as BSs below, regardless of the type or version of communication technology.

[0049] In this specification, a node refers to a fixed point that can transmit / receive radio signals by communicating with a UE. Various types of BSs can be used as nodes regardless of their names. For example, BSs, NBs, eNBs, pico-cell eNBs (PeNBs), home eNBs (HeNBs), relays, and repeaters can be nodes. Furthermore, a node may not be a BS. For example, it can be a radio remote head (RRH) or a radio remote unit (RRU). RRHs, RRUs, etc. generally have a lower power level than the BS. Since an RRH or RRU (hereinafter referred to as RRH / RRU) is generally connected to a BS via a dedicated line such as an optical cable, cooperative communication between an RRH / RRU and a BS can be performed more smoothly than cooperative communication between BSs that are generally connected via a wireless line. Each node is equipped with at least one antenna. The antenna may be a physical antenna, an antenna port, a virtual antenna, or an antenna group. A node is also called a point.

[0050] In this specification, a cell refers to a certain geographical area where one or more nodes provide communication services. Therefore, in this specification, communicating with a specific cell may mean communicating with a BS or node that provides communication services to the specific cell. In addition, the downlink / uplink signal of a specific cell refers to a downlink / uplink signal from / to a BS or node that provides communication services to the specific cell. A cell that provides uplink / downlink communication services to a UE is specifically referred to as a serving cell. In addition, the channel state / quality of a specific cell refers to the channel state / quality of a channel or communication link formed between a BS or node that provides communication services to the specific cell and the UE. In a 3GPP-based communication system, a UE can measure a downlink channel state from a specific node using CRS (Cell-specific Reference Signal) resources transmitted by antenna port(s) of the specific node on CRS resources allocated to the specific node and / or CSI-RS (Channel State Information Reference Signal) resources transmitted.

[0051] Meanwhile, 3GPP-based communication systems use the concept of cells to manage radio resources, and cells associated with radio resources are distinguished from cells in geographical areas.

[0052] A "cell" in a geographical area can be understood as the coverage over which a node can provide a service using a carrier, and a "cell" in a radio resource is associated with a bandwidth (BW), which is a frequency range configured by the carrier. Since downlink coverage, which is the range over which a node can transmit a valid signal, and uplink coverage, which is the range over which a node can receive a valid signal from a UE, depend on the carrier carrying the signal, the coverage of a node is also associated with the coverage of the "cell" of the radio resource used by the node. Therefore, the term "cell" can sometimes be used to mean the coverage of a service provided by a node, sometimes a radio resource, and sometimes the range over which a signal using the radio resource can reach with a valid intensity.

[0053] Meanwhile, the 3GPP communication standard uses the concept of a cell to manage radio resources. A "cell" associated with radio resources is defined as a combination of downlink resources (DL resources) and uplink resources (UL resources), i.e., a combination of a DL component carrier (CC) and an UL CC. A cell can be configured with DL resources alone or a combination of DL resources and UL resources. If carrier aggregation is supported, the linkage between the carrier frequency of the DL resources (or DL ​​CC) and the carrier frequency of the UL resources (or UL CC) can be indicated by system information. For example, the combination of DL resources and UL resources can be indicated by a System Information Block Type 2 (SIB2) linkage. Here, the carrier frequency can be the same as or different from the center frequency of each cell or CC. When carrier aggregation (CA) is established, the UE has only one radio resource control (RRC) connection with the network. One serving cell provides non-access stratum (NAS) mobility information during RRC connection establishment / re-establishment / handover, and one serving cell provides security input during RRC connection re-establishment / handover. Such a cell is called a primary cell (Pcell). A Pcell is a cell operating on the primary frequency where the UE performs initial connection establishment procedures or initiates connection re-establishment procedures.Depending on the UE capability, secondary cells (Scells) can be configured to form a set of serving cells together with Pcells. An Scell ​​can be configured after RRC (Radio Resource Control) connection establishment, and is a cell that provides additional radio resources in addition to the resources of a special cell (SpCell). The carrier corresponding to a Pcell in downlink is called a downlink primary CC (DL PCC), and the carrier corresponding to a Pcell in uplink is called an UL primary CC (DL PCC). The carrier corresponding to an Scell ​​in downlink is called a DL secondary CC (DL SCC), and the carrier corresponding to the Scell ​​in uplink is called an UL secondary CC (UL SCC).

[0054] For dual connectivity (DC) operation, the term SpCell refers to a Pcell of a master cell group (MCG) or a Pcell of a secondary cell group (SCG). A SpCell supports PUCCH transmission and contention-based random access and is always activated. An MCG is a group of serving cells associated with a master node (e.g., BS) and consists of a SpCell (Pcell) and optionally one or more Scells. For a UE configured for DC, an SCG is a subset of serving cells associated with a secondary node and consists of a PSCell and zero or more Scells. A PSCell is the primary Scell ​​of an SCG. For a UE in RRC_CONNECTED state that is not configured for CA or DC, there is only one serving cell consisting solely of Pcells. For a UE in RRC_CONNECTED state configured as CA or DC, the term serving cells refers to the set of cells consisting of SpCell(s) and all Scell(s). In DC, two medium access control (MAC) entities are configured in the UE: one for the MCG and one for the SCG.

[0055] For a UE where CA is set and DC is not set, a Pcell PUCCH group consisting of a Pcell and zero or more Scells and a Scell ​​PUCCH group consisting of only Scell(s) may be set. In the case of an Scell, an Scell ​​(hereinafter referred to as a PUCCH cell) on which a PUCCH associated with the cell is transmitted may be set. An Scell ​​indicated as a PUCCH Scell ​​belongs to an Scell ​​PUCCH group, and PUCCH transmission of the relevant UCI is performed on the PUCCH Scell, and an Scell ​​where a PUCCH Scell ​​is not indicated or is a Pcell indicated as a cell for PUCCH transmission, belongs to a Pcell PUCCH group, and PUCCH transmission of the relevant UCI is performed on the Pcell.

[0056] In a wireless communication system, a UE receives information from a base station (BS) via the downlink (DL), and the UE transmits information to the base station via the uplink (UL). The information transmitted and / or received by the BS and UE includes data and various control information, and various physical channels exist depending on the type and purpose of the information they transmit and / or receive.

[0057] 3GPP-based communication standards define downlink physical channels corresponding to resource elements that carry information originating from higher layers, and downlink physical signals corresponding to resource elements that are used by the physical layer but do not carry information originating from higher layers. For example, the physical downlink shared channel (PDSCH), physical broadcast channel (PBCH), and physical downlink control channel (PDCCH) are defined as downlink physical channels, and reference signals and synchronization signals are defined as downlink physical signals. A reference signal (RS), also referred to as a pilot, refers to a signal with a predefined special waveform that is known to the BS and UE. For example, the demodulation reference signal (DMRS) and the channel state information RS (CSI-RS) are defined as downlink reference signals. 3GPP-based communication standards define uplink physical channels corresponding to resource elements that carry information originating from higher layers, and uplink physical signals corresponding to resource elements that are used by the physical layer but do not carry information originating from higher layers.For example, a physical uplink shared channel (PUSCH), a physical uplink control channel (PUCCH), and a physical random access channel (PRACH) are defined as uplink physical channels, and a demodulation reference signal (DMRS) for uplink control / data signals and a sounding reference signal (SRS) used for uplink channel measurement are defined.

[0058] In this specification, the Physical Downlink Control CHannel (PDCCH) refers to a set of time-frequency resources (e.g., resource elements (REs)) that carry Downlink Control Information (DCI), and the Physical Downlink Shared CHannel (PDSCH) refers to a set of time-frequency resources that carry downlink data. In addition, the Physical Uplink Control CHannel (PUCCH), Physical Uplink Shared CHannel (PUSCH), and Physical Random Access CHannel (PRACH) refer to sets of time-frequency resources that carry Uplink Control Information (UCI), uplink data, and random access signals, respectively. Hereinafter, the expression that a user equipment transmits / receives a PUCCH / PUSCH / PRACH is used with the same meaning as transmitting / receiving uplink control information / uplink data / random access signal on or through the PUCCH / PUSCH / PUCCH / PRACH, respectively. In addition, the expression that a BS transmits / receives a PBCH / PDCCH / PDSCH is used with the same meaning as transmitting broadcast information / downlink control information / downlink data on or through the PBCH / PDCCH / PDSCH, respectively.

[0059] In this specification, radio resources (e.g., time-frequency resources) scheduled or configured by the BS to the UE for transmission or reception of PUCCH / PUSCH / PDSCH are also referred to as PUCCH / PUSCH / PDSCH resources.

[0060] Since the communication device receives SSB, DMRS, CSI-RS, PBCH, PDCCH, PDSCH, PUSCH, and / or PUCCH in the form of radio signals on a cell, it cannot selectively receive through an RF receiver only radio signals including only a specific physical channel or only a specific physical signal, or selectively receive through an RF receiver only radio signals excluding only a specific physical channel or only a physical signal. In actual operation, the communication device first receives radio signals on a cell through an RF receiver, converts the radio signals, which are RF band signals, into baseband signals, and decodes physical signals and / or physical channels within the baseband signals using one or more processors. Thus, in some implementations of the present specification, not receiving a physical signal and / or a physical channel may not actually mean that the communication device does not receive wireless signals containing the physical signal and / or physical channel at all, but rather that it does not attempt to recover the physical signal and / or physical channel from the wireless signals, e.g., does not attempt to decode the physical signal and / or the physical channel.

[0061] As more and more communication devices demand greater communication capacity, the need for improved mobile broadband communication over existing radio access technology (RAT) is emerging. Furthermore, massive MTC, which connects numerous devices and objects to provide diverse services anytime, anywhere, is also a key issue to be considered in next-generation communications. Furthermore, communication system design that considers reliability and latency-sensitive services / UEs is being discussed. The introduction of next-generation RATs that take advanced mobile broadband communication, massive MTC, and URLLC (Ultra-Reliable and Low Latency Communication) into account is currently under discussion. 3GPP is currently conducting studies on next-generation mobile communication systems beyond EPC. For convenience, this technology is referred to as new RAT (NR) or 5G RAT, and a system that uses or supports NR is referred to as an NR system.

[0062] FIG. 1 illustrates an example of a communication system 1 to which implementations of the present specification are applied. Referring to FIG. 1, the communication system (1) applied to the present specification includes a wireless device, a BS, and a network. Here, the wireless device refers to a device that performs communication using a wireless access technology (e.g., 5G NR (New RAT), LTE (e.g., E-UTRA)) and may be referred to as a communication / wireless / 5G device. Although not limited thereto, the wireless device may include a robot (100a), a vehicle (100b-1, 100b-2), an XR (eXtended Reality) device (100c), a hand-held device (100d), a home appliance (100e), an IoT (Internet of Things) device (100f), and an AI device / server (400). For example, the vehicle may include a vehicle equipped with a wireless communication function, an autonomous vehicle, a vehicle capable of performing vehicle-to-vehicle communication, etc. Here, the vehicle may include an Unmanned Aerial Vehicle (UAV) (e.g., a drone). XR devices include AR (Augmented Reality) / VR (Virtual Reality) / MR (Mixed Reality) devices, and may be implemented in the form of a Head-Mounted Device (HMD), a Head-Up Display (HUD) installed in a vehicle, a television, a smartphone, a computer, a wearable device, a home appliance, digital signage, a vehicle, a robot, etc. Mobile devices may include a smartphone, a smart pad, a wearable device (e.g., a smart watch, smart glasses), a computer (e.g., a laptop, etc.), etc. Home appliances may include a TV, a refrigerator, a washing machine, etc. IoT devices may include sensors, smart meters, etc. For example, a BS or network may also be implemented as a wireless device, and a specific wireless device may act as a BS / network node to other wireless devices.

[0063] Wireless devices (100a to 100f) can be connected to a network (300) via a BS (200). Artificial Intelligence (AI) technology can be applied to the wireless devices (100a to 100f), and the wireless devices (100a to 100f) can be connected to an AI server (400) via a network (300). The network (300) can be configured using a 3G network, a 4G (e.g., LTE) network, a 5G (e.g., NR) network, etc. The wireless devices (100a to 100f) can communicate with each other via the BS (200) / network (300), but can also communicate directly (e.g., sidelink communication) without going through the BS / network. For example, vehicles (100b-1, 100b-2) can communicate directly (e.g., V2V (Vehicle to Vehicle) / V2X (Vehicle to Everything) communication). In addition, IoT devices (e.g., sensors) can communicate directly with other IoT devices (e.g., sensors) or other wireless devices (100a to 100f).

[0064] Wireless communication / connection (150a, 150b) can be performed between wireless devices (100a~100f) / BS (200) - BS (200) / wireless devices (100a~100f). Here, the wireless communication / connection can be performed through various wireless access technologies (e.g., 5G NR) for uplink / downlink communication (150a) and sidelink communication (150b) (or D2D communication). Through the wireless communication / connection (150a, 150b), the wireless device and the BS / wireless device can transmit / receive wireless signals to / from each other. To this end, at least some of various configuration information setting processes for transmitting / receiving wireless signals, various signal processing processes (e.g., channel encoding / decoding, modulation / demodulation, resource mapping / demapping, etc.), and resource allocation processes can be performed based on various proposals of this specification.

[0065] FIG. 2 is a block diagram illustrating examples of communication devices capable of performing a method according to the present specification. Referring to FIG. 2, a first wireless device (100) and a second wireless device (200) can transmit and / or receive wireless signals via various wireless access technologies (e.g., LTE, NR). Here, {the first wireless device (100), the second wireless device (200)} can correspond to {the wireless device (100x), the BS (200)} and / or {the wireless device (100x), the wireless device (100x)} of FIG. 1.

[0066] A first wireless device (100) includes one or more processors (102) and one or more memories (104), and may further include one or more transceivers (106) and / or one or more antennas (108). The processor (102) controls the memories (104) and / or the transceivers (106), and may be configured to implement functions, procedures, and / or methods described / suggested below. For example, the processor (102) may process information in the memory (104) to generate first information / signals, and then transmit a wireless signal including the first information / signals via the transceivers (106). In addition, the processor (102) may receive a wireless signal including second information / signals via the transceivers (106), and then store information obtained from signal processing of the second information / signals in the memory (104). The memory (104) may be connected to the processor (102) and may store various information related to the operation of the processor (102). For example, the memory (104) may perform some or all of the processes controlled by the processor (102), or may store software code including commands for performing the procedures and / or methods described / proposed below. Here, the processor (102) and the memory (104) may be part of a communication modem / circuit / chip designed to implement wireless communication technology (e.g., LTE, NR). The transceiver (106) may be connected to the processor (102) and may transmit and / or receive wireless signals via one or more antennas (108). The transceiver (106) may include a transmitter and / or a receiver. The transceiver (106) may be used interchangeably with an RF (Radio Frequency) unit. In this specification, a wireless device may also mean a communication modem / circuit / chip.

[0067] The second wireless device (200) includes one or more processors (202), one or more memories (204), and may further include one or more transceivers (206) and / or one or more antennas (208). The processor (202) controls the memories (204) and / or the transceivers (206), and may be configured to implement the functions, procedures, and / or methods described / suggested below. For example, the processor (202) may process information in the memory (204) to generate third information / signals, and then transmit a wireless signal including the third information / signals via the transceivers (206). In addition, the processor (202) may receive a wireless signal including fourth information / signals via the transceivers (206), and then store information obtained from signal processing of the fourth information / signals in the memory (204). The memory (204) may be connected to the processor (202) and may store various information related to the operation of the processor (202). For example, the memory (204) may perform some or all of the processes controlled by the processor (202), or may store software code including commands for performing the procedures and / or methods described / proposed below. Here, the processor (202) and the memory (204) may be part of a communication modem / circuit / chip designed to implement wireless communication technology (e.g., LTE, NR). The transceiver (206) may be connected to the processor (202) and may transmit and / or receive wireless signals via one or more antennas (208). The transceiver (206) may include a transmitter and / or a receiver. The transceiver (206) may be used interchangeably with an RF unit. In this specification, a wireless device may also mean a communication modem / circuit / chip.

[0068] The wireless communication technology implemented in the wireless device (100, 200) of the present specification may include not only LTE, NR, and 6G, but also Narrowband Internet of Things for low-power communication. At this time, for example, NB-IoT technology may be an example of LPWAN (Low Power Wide Area Network) technology, and may be implemented with standards such as LTE Cat NB1 and / or LTE Cat NB2, and is not limited to the above-described names. Additionally or alternatively, the wireless communication technology implemented in the wireless device (XXX, YYY) of the present specification may perform communication based on LTE-M technology. At this time, for example, LTE-M technology may be an example of LPWAN technology, and may be called by various names such as eMTC (enhanced Machine Type Communication). For example, LTE-M technology can be implemented by at least one of various standards such as 1) LTE CAT 0, 2) LTE Cat M1, 3) LTE Cat M2, 4) LTE non-BL (non-Bandwidth Limited), 5) LTE-MTC, 6) LTE Machine Type Communication, and / or 7) LTE M, and is not limited to the above-described names. Additionally or alternatively, the wireless communication technology implemented in the wireless device (XXX, YYY) of the present specification can include at least one of ZigBee, Bluetooth, and Low Power Wide Area Network (LPWAN) considering low-power communication, and is not limited to the above-described names. For example, ZigBee technology can create PAN (personal area networks) related to small / low-power digital communication based on various standards such as IEEE 802.15.4, and can be called by various names.

[0069] Hereinafter, hardware elements of the wireless device (100, 200) will be described in more detail. Although not limited thereto, one or more protocol layers may be implemented by one or more processors (102, 202). For example, one or more processors (102, 202) may implement one or more layers (e.g., functional layers such as a physical (PHY) layer, a medium access control (MAC) layer, a radio link control (RLC) layer, a packet data convergence protocol (PDCP) layer, a radio resource control (RRC) layer, and a service data adaptation protocol (SDAP) layer). One or more processors (102, 202) may generate one or more protocol data units (PDUs) and / or one or more service data units (SDUs) according to the functions, procedures, proposals, and / or methods disclosed in this document. One or more processors (102, 202) may generate messages, control information, data or information according to the functions, procedures, proposals and / or methods disclosed herein. One or more processors (102, 202) may generate signals (e.g., baseband signals) including PDUs, SDUs, messages, control information, data or information according to the functions, procedures, proposals and / or methods disclosed herein and provide the signals to one or more transceivers (106, 206). One or more processors (102, 202) may receive signals (e.g., baseband signals) from one or more transceivers (106, 206) and obtain PDUs, SDUs, messages, control information, data or information according to the functions, procedures, proposals and / or methods disclosed herein.

[0070] One or more processors (102, 202) may be referred to as a controller, a microcontroller, a microprocessor, or a microcomputer. One or more processors (102, 202) may be implemented by hardware, firmware, software, or a combination thereof. For example, one or more Application Specific Integrated Circuits (ASICs), one or more Digital Signal Processors (DSPs), one or more Digital Signal Processing Devices (DSPDs), one or more Programmable Logic Devices (PLDs), or one or more Field Programmable Gate Arrays (FPGAs) may be included in one or more processors (102, 202). The functions, procedures, proposals, and / or methods disclosed in this document may be implemented using firmware or software, and the firmware or software may be implemented to include modules, procedures, functions, etc. Firmware or software configured to perform the functions, procedures, suggestions and / or methods disclosed in this document may be included in one or more processors (102, 202) or stored in one or more memories (104, 204) and executed by one or more processors (102, 202). The functions, procedures, suggestions and / or methods disclosed in this document may be implemented using firmware or software in the form of codes, instructions and / or sets of instructions.

[0071] One or more memories (104, 204) may be coupled to one or more processors (102, 202) and may store various forms of data, signals, messages, information, programs, codes, instructions, and / or commands. The one or more memories (104, 204) may be configured as ROM, RAM, EPROM, flash memory, hard drives, registers, cache memory, computer-readable storage media, and / or combinations thereof. The one or more memories (104, 204) may be located internally and / or externally to the one or more processors (102, 202). Additionally, the one or more memories (104, 204) may be coupled to the one or more processors (102, 202) via various technologies, such as wired or wireless connections.

[0072] One or more transceivers (106, 206) can transmit user data, control information, wireless signals / channels, etc., as mentioned in the methods and / or flowcharts of this document, to one or more other devices. One or more transceivers (106, 206) can receive user data, control information, wireless signals / channels, etc., as mentioned in the functions, procedures, proposals, methods and / or flowcharts of this document, from one or more other devices. For example, one or more transceivers (106, 206) can be coupled to one or more processors (102, 202) and can transmit and / or receive wireless signals. For example, one or more processors (102, 202) can control one or more transceivers (106, 206) to transmit user data, control information, or wireless signals to one or more other devices. Additionally, one or more processors (102, 202) may control one or more transceivers (106, 206) to receive user data, control information, or wireless signals from one or more other devices. Additionally, one or more transceivers (106, 206) may be coupled to one or more antennas (108, 208), and one or more transceivers (106, 206) may be configured to transmit and / or receive user data, control information, wireless signals / channels, or the like, as referred to in the functions, procedures, proposals, methods, and / or operational flowcharts disclosed in this document, via one or more antennas (108, 208). In this document, one or more antennas may be multiple physical antennas or multiple logical antennas (e.g., antenna ports). One or more transceivers (106, 206) may convert received user data, control information, wireless signals / channels, etc. from RF band signals to baseband signals for processing using one or more processors (102, 202).One or more transceivers (106, 206) may convert user data, control information, wireless signals / channels, etc. processed by one or more processors (102, 202) from baseband signals to RF band signals. For this purpose, one or more transceivers (106, 206) may include an (analog) oscillator and / or filter.

[0073] FIG. 3 illustrates another example of a wireless device capable of performing implementation(s) of the present specification. Referring to FIG. 3, the wireless device (100, 200) corresponds to the wireless device (100, 200) of FIG. 2 and may be composed of various elements, components, units, and / or modules. For example, the wireless device (100, 200) may include a communication unit (110), a control unit (120), a memory unit (130), and an additional component (140). The communication unit may include a communication circuit (112) and a transceiver(s) (114). For example, the communication circuit (112) may include one or more processors (102, 202) and / or one or more memories (104, 204) of FIG. 2. For example, the transceiver(s) (114) may include one or more transceivers (106, 206) and / or one or more antennas (108, 208) of FIG. 2. The control unit (120) is electrically connected to the communication unit (110), the memory unit (130), and the additional components (140) and controls the overall operation of the wireless device. For example, the control unit (120) may control the electrical / mechanical operation of the wireless device based on the program / code / command / information stored in the memory unit (130). In addition, the control unit (120) may transmit information stored in the memory unit (130) to an external device (e.g., another communication device) via a wireless / wired interface through the communication unit (110), or store information received from an external device (e.g., another communication device) via a wireless / wired interface in the memory unit (130).

[0074] The additional configuration (140) may be configured in various ways depending on the type of the wireless device. For example, the additional configuration (140) may include at least one of a power unit / battery, an input / output (I / O) unit, a driving unit, and a computing unit. Although not limited thereto, the wireless device may be implemented in the form of a robot (Fig. 1, 100a), a vehicle (Fig. 1, 100b-1, 100b-2), an XR device (Fig. 1, 100c), a portable device (Fig. 1, 100d), a home appliance (Fig. 1, 100e), an IoT device (Fig. 1, 100f), a UE for digital broadcasting, a hologram device, a public safety device, an MTC device, a medical device, a fintech device (or a financial device), a security device, a climate / environmental device, an AI server / device (Fig. 1, 400), a BS (Fig. 1, 200), a network node, etc. Wireless devices may be mobile or stationary depending on the use / service.

[0075] In FIG. 3, various elements, components, units / parts, and / or modules within the wireless device (100, 200) may be interconnected entirely via a wired interface, or at least some may be wirelessly connected via a communication unit (110). For example, within the wireless device (100, 200), the control unit (120) and the communication unit (110) may be wired, and the control unit (120) and a first unit (e.g., 130, 140) may be wirelessly connected via the communication unit (110). In addition, each element, component, unit / part, and / or module within the wireless device (100, 200) may further include one or more elements. For example, the control unit (120) may be configured with one or more processor sets. For example, the control unit (120) may be configured as a set of a communication control processor, an application processor, an electronic control unit (ECU), a graphics processing processor, a memory control processor, etc. As another example, the memory unit (130) may be configured as a random access memory (RAM), a dynamic RAM (DRAM), a read only memory (ROM), a flash memory, a volatile memory, a non-volatile memory, and / or a combination thereof.

[0076] In this specification, at least one memory (e.g., 104 or 204) can store instructions or programs that, when executed, cause at least one processor operably connected to the at least one memory to perform operations according to some embodiments or implementations of the present specification.

[0077] In this specification, a computer-readable (non-volatile) storage medium can store at least one instruction or computer program, which when executed by at least one processor causes the at least one processor to perform operations according to some embodiments or implementations of this specification.

[0078] In this specification, a processing device or apparatus may include at least one processor and at least one computer memory operatively connected to the at least one processor. The at least one computer memory may store instructions or programs, which, when executed, cause at least one processor operatively connected to the at least one memory to perform operations according to some embodiments or implementations of the present specification.

[0079] In this specification, a computer program may be stored in at least one computer-readable (non-volatile) storage medium and may include program code that, when executed, performs operations according to some implementations of the present specification or causes at least one processor to perform operations according to some implementations of the present specification. The computer program may be provided in the form of a computer program product. The computer program product may include at least one computer-readable (non-volatile) storage medium.

[0080] A communications device of the present specification comprises at least one processor; and at least one computer memory operably connected to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations according to the example(s) of the present specification described below.

[0081] Figure 4 illustrates an example of a frame structure available in a 3GPP-based wireless communication system.

[0082] The structure of the frame in Fig. 4 is merely an example, and the number of subframes, the number of slots, and the number of symbols in the frame can be varied. In an NR system, OFDM numerology (e.g., subcarrier spacing (SCS)) may be set differently between multiple cells aggregated to a single UE. Accordingly, the (absolute time) duration of a time resource (e.g., a subframe, a slot, or a transmission time interval (TTI)) consisting of the same number of symbols may be set differently between the aggregated cells. Here, the symbol may include an OFDM symbol (or a cyclic prefix - orthogonal frequency division multiplexing (CP-OFDM) symbol), an SC-FDMA symbol (or a discrete Fourier transform-spread-OFDM (DFT-s-OFDM) symbol). In this specification, the terms symbol, OFDM-based symbol, OFDM symbol, CP-OFDM symbol, and DFT-s-OFDM symbols are interchangeable.

[0083] Referring to Figure 4, in the NR system, uplink and downlink transmissions are organized into frames. Each frame is T f = (△f max *N f / 100)*T c = 10 ms duration, divided into two half-frames of 5 ms each. Here, T is the basic time unit for NR. c = 1 / (△fmax *N f ) and △f max = 480*10 3 Hz, and N f =4096. For reference, T is the basic time unit for LTE. s = 1 / (△f ref *N f,ref ) and △f ref = 15*10 3 Hz, and N f,ref =2048. T c Wow T s is a constant κ = T s / T c = 64 relationship. Each half-frame consists of 5 subframes, and the duration of a single subframe (SF) is T sf is 1ms. Subframes are further divided into slots, and the number of slots in a subframe depends on the subcarrier spacing. Each slot consists of 14 or 12 OFDM symbols based on the cyclic prefix. For a normal cyclic prefix (CP), each slot consists of 14 OFDM symbols, and for an extended CP, each slot consists of 12 OFDM symbols. The numerology is exponentially scalable with a subcarrier spacing △f = 2. u *Depends on 15 kHz. The following table shows the subcarrier spacing for regular CP △f = 2. u *Number of OFDM symbols per slot at 15 kHz (N) slot symb ), number of slots per frame (N frame,u slot ) and the number of slots per subframe (N subframe,u slot ) is shown.

[0084]

[0085] The following table shows the subcarrier spacing for extended CP △f = 2.u *Indicates the number of OFDM symbols per slot, the number of slots per frame, and the number of slots per subframe at 15 kHz.

[0086]

[0087] For a subcarrier spacing setting u, slots are n in increasing order within a subframe. u s ∈ {0, ..., nsubframe,u slot - 1} and n in increasing order within the frame u s,f ∈ {0, ..., n frame,u slot - Numbered as 1}.

[0088] A slot contains multiple (e.g., 14 or 12) symbols in the time domain. For each numeral (e.g., subcarrier spacing) and carrier, a common resource block (CRB) N is indicated by higher-layer signaling (e.g., radio resource control (RRC) signaling). start,u grid Starting from,N size,u grid,x *N RB sc Dog subcarriers and N subframe,u symb A resource grid of OFDM symbols is defined, where N size,u grid,x is the number of resource blocks (RBs) in the resource grid, and the subscript x is DL for downlink and UL for uplink. N RB sc is the number of subcarriers per RB, and in 3GPP-based wireless communication systems, N RB scis typically 12. For a given antenna port p, subcarrier spacing configuration u, and transmission direction (DL or UL), there is one resource grid. The carrier bandwidth N for subcarrier spacing configuration u size,u grid is given to the UE by higher layer parameters (e.g., RRC parameters) from the network. Each element in the resource grid for antenna port p and subcarrier spacing configuration u is called a resource element (RE), and one complex symbol can be mapped to each RE. Each RE in the resource grid is uniquely identified by an index k in the frequency domain and an index l indicating the symbol position relative to a reference point in the time domain. In an NR system, an RB is defined by 12 consecutive subcarriers in the frequency domain. In an NR system, RBs can be classified into common resource blocks (CRBs) and physical resource blocks (PRBs). CRBs are numbered upwards from 0 in the frequency domain for the subcarrier spacing configuration u. The center of subcarrier 0 of CRB 0 for the subcarrier spacing configuration u coincides with 'Point A', which is a common reference point for the resource block grids. PRBs for subcarrier spacing u are defined within the bandwidth part (BWP) and range from 0 to N. size,u BWP,i -1, where i is the number of the bandwidth part. Common resource block n u CRB and bandwidth part i within physical resource block n PRB The relationship between the two is as follows: n u PRB = n u CRB +N start,u BWP,i , here N start,u BWP,iis a common resource block (BRB) whose bandwidth part starts relative to CRB 0. A BWP comprises multiple consecutive RBs in the frequency domain. For example, a BWP may be a given numeral u within a BWP i on a given carrier. i A subset of contiguous CRBs defined for a carrier. A carrier may include up to N (e.g., 5) BWPs. A UE may be configured to have one or more BWPs on a given component carrier. Data communication is performed through the activated BWPs, and only a predetermined number (e.g., 1) of BWPs configured for the UE may be activated on the carrier.

[0089] A UE configured with carrier aggregation may be configured to use one or more cells. If the UE is configured to have multiple serving cells, the UE may be configured to have one or more cell groups. The UE may be configured to have multiple cell groups associated with different BSs. Alternatively, the UE may be configured to have multiple cell groups associated with a single BS. Each cell group of the UE consists of one or more serving cells, and each cell group includes a single PUCCH cell configured with PUCCH resources. The PUCCH cell may be a Pcell or an Scell ​​configured as a PUCCH cell among the Scells of the corresponding cell group. Each serving cell of the UE belongs to one of the cell groups of the UE and does not belong to multiple cell groups.

[0090] Figure 5 illustrates a processing process on the transmission side for a transport block (TB).

[0091] To enable the receiver to correct errors encountered in wireless signals over the wireless channel, the transmitter encodes the information it sends using a forward error correction code before transmitting it. The receiver demodulates the received signal and then decodes the error correction code to restore the transmitted information. This decoding process corrects errors in the received signal caused by the wireless channel.

[0092] Data arrives at the coding block in the form of up to two transport blocks per TTI per DL / UL cell. The following coding steps can be applied to each transport block in a DL / UL cell:

[0093] - Add a cyclic redundancy check (CRC) to the transport block;

[0094] - Code block segmentation and code block CRC attachment;

[0095] - Channel coding;

[0096] - Rate matching;

[0097] - Code block concatenation.

[0098] In actual communication systems, for ease of implementation, transport blocks larger than a certain size are divided into several smaller data blocks for encoding. These smaller data blocks are called code blocks. While code blocks generally have the same size, due to the size limitations of the channel encoder's internal interleaver, one code block among multiple code blocks may have a different size. After error correction coding is performed on each code block of a given interleaver size, interleaving is performed to reduce the impact of burst errors that occur during transmission over a wireless channel. The data is then mapped to actual radio resources and transmitted. Since the amount of radio resources used in actual transmission is constant, rate matching must be performed on the encoded code blocks to accommodate this. Rate matching is typically achieved through puncturing or repetition. For example, if the amount of wireless resources, i.e., the number of transmission bits that can be transmitted by the wireless resources, is M, and the coded bit sequence, i.e., the number of output bits of the encoder, is N, then if M and N are different, rate matching is performed to adjust the length of the coded bit sequence to match M. If M>N, all or part of the bits of the coded bit sequence are repeated so that the length of the rate-matched sequence becomes equal to M. M <N이면, 레이트 매칭된 시퀀스의 길이가 M과 같아지도록, 코디드 비트 시퀀스의 비트들 중 일부가 펑처링되며, 펑처링된 비트는 전송에서 제외된다.

[0099] That is, in a wireless communication system, the transmitting end encodes data to be transmitted using channel coding having a specific code rate, and then adjusts the code rate of the data to be transmitted through a rate matching process consisting of puncturing and repetition.

[0100] The output bit sequence after rate matching and code block concatenation is modulated into modulation symbols through a modulator according to a modulation scheme. The modulation symbols are mapped to radio resources allocated by the base station and transmitted to the receiver through the radio resources. The decoding process of the channel code is the reverse process of the encoding process, and a decoder corresponding to each encoder of the transmitter is used in the decoding process performed at the receiver. The receiver performs decoding for each code block (CB), then constructs a TB, and finally checks whether the TB CRC passes or fails. In the current LTE / LTE-A system, the CB CRC is used for fast decoding termination. For example, if the CB CRC fails, the receiver can generate a NACK without decoding other CBs.

[0101] There are various types of error-correcting codes. For example, turbo codes consist of a recursive systematic convolution encoder and an interleaver. In practical implementations of turbo codes, an interleaver facilitates parallel decoding, and one such interleaver is the quadratic polynomial permutation (QPP). This QPP interleaver is known to maintain good performance only for a certain data block size. Turbo code performance is known to improve as the data block size increases. However, in actual communication systems, for ease of implementation, data blocks larger than a certain size are divided into several smaller data blocks for encoding. These smaller data blocks are called code blocks. While code blocks typically have the same size, due to the size limitations of the QPP interleaver, one code block among multiple code blocks may have a different size.

[0102] Among error-correcting codes, the low-density parity check (LDPC) code is a linear block code with low density because most of the elements of the parity check matrix H are 0. It was proposed by Gallager in 1962. The LDPC code was so complex that it was impossible to implement with the technology available at the time of its proposal, so it was forgotten until it was rediscovered in 1995 and its excellent performance was proven, and since then, active research on it has been conducted (References: [1] Robert G. Gallager, "Low-Density Parity-Check Codes", The MIT Press, September 15, 1963. [2] D. J. C. McCay, Good error-correcting codes based on very sparse matrices, IEEE Trans. Inform. Theory, IT-45, pp.399-431(1999)). Currently, LDPC codes are mainly used in 802.11n (see 'IEEE P802.11n=D10: 'Draft IEEE Standard for Local Metropolitan networks Specific requirements. Part 11: Wireless LAN Medium Access Control (MAC), and Physical Layer (PHY) specifications: Enhancements for Higher Throughput', March 2006.'), 802.11ac, and digital video broadcasting (DVB). Typically, in standards that apply LDPC (e.g., the DVB standard), encoding is performed using a parity-check matrix instead of a generator matrix.Since the parity check matrix of the LDPC code has a very small number of 1s, it can be decoded through iterative decoding even in very large block sizes. As the block size becomes very large, it shows performance approaching Shannon's channel capacity limit like a turbo code. In the above parity check matrix, the number of 1s included in a row or column is called a weight. The LDPC code can be described by an (nk)*n parity check matrix H. The generator matrix G corresponding to the parity check matrix H can be obtained by the following mathematical formula.

[0103]

[0104]

[0105] Here, c is a codeword, and x is an information bit. The decoder of the receiving device must obtain the information bit (x) from the codeword (c), which is the encoding result by the transmitting device, and finds x by using the property that Hc = 0. That is, when the received codeword is c', the value of Hc' is calculated, and if the result is 0, the k bits in front of c' are determined to be decoded information bits. If the value of Hc' is not 0, a sum-product algorithm through a graph, a belief propagation algorithm, etc. are used to find c' that satisfies the value of Hc' is 0, and x is restored. The check expression Hc' = 0 is c'H according to the relationship between the corresponding information bit and the corresponding generator matrix G. T =0, and thus the check formula can change depending on the relationship between the information bits and the generator matrix G.

[0106] Figures 6 and 7 illustrate the parity check matrix H of an LDPC code using a bipartite graph.

[0107] In the parity check matrix illustrated in Fig. 6(a), a '1' in a row represents an edge connected to a check node in the bipartite graph, and a '1' in a column represents an edge connected to a variable node. Fig. 6(b) illustrates a portion of a bipartite graph corresponding to the parity check matrix illustrated in Fig. 6(a). Referring to Fig. 6(b), the nodes on the left side of the reciprocal graph represent variable nodes, and the nodes on the right side represent check nodes.

[0108] Figure 7 illustrates another parity check matrix and the entire bipartite lines.

[0109] Referring to Fig. 7, since the product of the parity check matrix H and the codeword c' must be '0', the sum of the hard decision values ​​of the variable nodes connected to any check node must be '0'. Mathematical formulas for the hard decision for each check node are exemplified in Fig. 7(b). Checking at a check node whether the sum of the variable node(s) connected to the check node is '0' in this way is called a syndrome check.

[0110] The LDPC code reflected in the NR standard can be classified as a quasi-cyclic LDPC (QC-LDPC) code. The QC-LDPC code has a low encoding / decoding complexity and a structure that is advantageous for parallelization. The parity check matrix of the QC-LDPC code is Z c -by-Z c It can be represented as an m-by-n array of circulant permutation matrices (CPMs). For example, a parity check matrix can be represented as Z for each element in the model matrix or base graph (BG) (also called the base matrix or base code). c-by-Z c CPM or Z c -by-Z c It can be obtained by replacing the zero matrix with a model matrix of size m-by-n or an LDPC BG of size m-by-n (mZ c )-by-(nZ c ) The process of obtaining a parity check matrix is ​​called lifting or expanding.

[0111] Figure 8 illustrates circulant permutation matrices (CPMs). In particular, Figure 8 illustrates a 4x4 CPM. Referring to Figure 8, CMPP a In , a is a circulant shift value, a non-negative integer, and has size Z. c xZ c It is obtained by cyclically shifting the unit matrix I to the right or left a number of times. In Fig. 8, the zero matrix is ​​P ∞ It is expressed as , but it may be expressed differently depending on the definition in the system or standard. For example, depending on the system or standard, the cyclic transition value a = -1 may be used to represent the zero matrix.

[0112] In the model matrix for LDPC, each element represents a cyclic shift value or a zero matrix of CPM. Each element of the LDPC BG is either 0 or 1, and each element of value 0 in the LDPC BG has size Z. c xZ c is replaced by the zero matrix 0, and each element of value 1 in the LDPC BG is CPMI(P i,j ) is replaced by I(P), where i and j are the row and column indices of the element, respectively. i,j ) is the size Z c -by-Z c The identity matrix I of P is moved to the right or left i,jIt is obtained by cyclically transferring as many times as P. i,j The value of P i,j = mod(V i,j , Z c ) can be given by V i,j The value of may correspond to the cyclic shift value of the model matrix and may be predefined depending on the system in which LDPC is used. For example, in 3GPP TS 38.212 Release 15, V i,j The value of set index i LS and LDPC BG are given by Table 5.3.2-2 and Table 5.3.2-3 of 3GPP TS 38.212 Release 15 (see Section 5.3.2 of 3GPSS TS 38.212 Release 15).

[0113] For BG introduced in the NR standard, the first two columns of the base graph, corresponding to variable nodes with high degrees, are punctured. That is, the base graph and the lifting size Z c The first 2Z of the extended parity check matrix based on c The dog columns are punctured. Therefore, the first 2Z of the coded bits obtained after encoding using the parity check matrix c The bits are punctured. In addition, the BG introduced in the NR standard has the feature of a single parity extension to support low code rates. To support various data block sizes (e.g., transport block size or code block size) and to ensure good performance, two BGs are defined, each with eight CPM values ​​(i.e., respective (respective) cyclic shift values ​​for the eight CPMs). In this case, the parity check matrix can be expressed as follows: H = H BG + V i,j , here H BG is LDPC BG, and V i,j represents the cyclic transition value of CPM.

[0114] Fig. 9 illustrates a schematic structure of a basic graph of an LDPC code. In particular, Fig. 9(a) is a schematic structural diagram of LDPC basic graph 1 (BG1) according to the NR standard, and Fig. 9(b) is a schematic structural diagram of LDPC basic graph 2 (BG2) according to the NR standard.

[0115] According to 3GPP TS 38.212 Release 15, BG1 corresponds to K systematic information bits. b =22, supports a minimum code rate of 1 / 3, and is a 46-by-68 matrix. BG2 corresponds to K systematic information bits. b =10, supports a minimum code rate of 1 / 5, and is a 42-by-52 matrix. In general, BG1 is advantageous in terms of performance for large data block sizes, and BG2 is advantageous in terms of decoding latency for small data block sizes and low code rates.

[0116] Figure 10 is a diagram illustrating a criterion for selecting an LDPC base graph. For the (initial) transmission of a transport block having a coding rate R (i.e., code rate R) indicated by a modulation and coding scheme (MCS) index in a control information format that schedules a physical channel carrying a transport block, and for retransmission of the same transport block, each code block of the transport block can be encoded with LDPC BG1 or LDPC BG2. Referring to Figure 10, for example, if A ≤ 292, or if A ≤ 3824 and R ≤ 0.67, or if R ≤ 0.25, LDPC BG2 is used; otherwise, LDPC BG1 is used, where A is the payload size, e.g., TBS.

[0117] Code block size K and BG's K b Using the value, the size Z of CPM can be calculated as follows: Z = K / Kb .

[0118] Depending on the Z value determined by the above formula, CPM sizes (i.e. lifting sizes) can be selected using the following formula: i = {Z∈S j | j∈{1,...,8}}. The following table illustrates various sets of Z values ​​obtained using this formula.

[0119]

[0120] A parity check matrix can be obtained using the BG determined based on the TBS and coding rate R, and the CPM size (i.e., lifting size). For example, K in all sets of lifting sizes in the table above b *Z c Z is the minimum value of Z that makes ≥K' c is found, and for LDPC BG1, K = 22Z c A, for LDPC BG2, K = 10Z ccan be set. Here, K' = B' / C, the number of bits in each code block K, B' = B + C*L, where B is the size of the TB to which the CRC is appended, B = A + L, A is the payload size (i.e., TBS), C is the number of code blocks, and L is the length of the CRC sequence attached to the TB, i.e., the number of CRC bits. The transport block (TB), which is the transmission data, is a MAC PDU, and the transmitter appends, for example, a 24-bit CRC sequence to the TB and performs LDPC encoding. However, if the size of the TB to which the CRC is appended is greater than a certain value, the TB to which the CRC is appended is segmented into multiple code blocks (CB). According to 3GPP TS 38.212 Release 15, for BG1, code block segmentation is performed when the size of the TB with CRC exceeds 8448 bits, and for BG2, code block segmentation is performed when the size of the TB with CRC exceeds 3840 bits. The number of code blocks C obtained based on one TB can be obtained using: C = CEIL{B / (K cb - L)}, where K cb is the maximum code block size and L is the length of the additional CRC sequence attached to each code block, i.e., the number of CRC bits. As mentioned earlier, B is the size of the TB to which the CRC is appended. According to 3GPP TS 38.212 Release 15, K cb For BG1, it is 8448, for BG2, it is 3840, and L is 24. If the number of CBs C > 1, a 24-bit CRC is added to each CB, and then LDPC encoding is performed.

[0121] The bit sequence input for a given code block is c0,c1,c2,c3,...,c K-1 and the bits after encoding are d0,d1,d2,d3,...,d N-1, for each code block encoded by LDPC, for example, the following encoding process can be applied, where K is the number of bits to be encoded and N is the number of bits after encoding:

[0122] > 1) Z in Table 3 c Index i containing LS Find the inset.

[0123] > 2) for k = 2Z c to K-1

[0124] >> if c k ≠ <null>

[0125] >>> d k-2Zc = c k ;

[0126] >> else

[0127] >>> c k = 0;

[0128] >> end if

[0129] > end for

[0130] > 3) N+2Z to be c -K parity bits w=c=[w0,w1,w2,w3,...,c N+2Zc-K-1 ] T , where c = [c0,c1,c2,c3,...,c K-1 ] T ;0 is a column vector with all elements equal to 0. The encoding is performed in GF(2), where GF is the Galois field. In some scenarios, for LDPC BG1, H BG The matrix of can have 46 rows with row indices i=0,1,2,...,45 and 68 columns with column indices j=0,1,2,...,67. In some scenarios, for LDPC BG2, H BG The matrix H can have 42 rows with row indices i=0,1,2,...,41 and 52 columns with column indices j=0,1,2,...,51. The parity check matrix H is defined as follows: BG Each element of Z c -by-Z c It can be obtained by replacing it with a matrix:

[0131] -H BG Each element of my value 0 has size Z c *Z c is replaced by the zero matrix 0;

[0132] -H BG Each element of my value 1 has size Z c *Z c Circular permutation matrix I(P) i,j ) is replaced by I(P), where i and j are the row and column indices of the element, respectively. i,j ) is the size Z c -by-Z c The identity matrix I of P is moved to the right or left i,j It is obtained by cyclically transferring as many times as P. i,j The value of P i,j = mod(V i,j , Z c ) can be given by. For example, for 3GPP TS 38.212 Release 15, V i,j The value of the set index i LS and LDPC BG are given by Table 5.3.2-2 and Table 5.3.2-3 of 3GPP TS 38.212 Release 15 (see Section 5.3.2 of 3GPSS TS 38.212 Release 15).

[0133] > 4) for k = K to N+2Z c -1

[0134] >> d k-2Zc = w k-K ;

[0135] > end for.

[0136] FIG. 11 is a diagram illustrating a rate matching process according to some implementations of this specification.

[0137] In some implementations, rate matching may be performed after channel coding. In 3GPP-based systems, rate matching for coded bits is defined per code block and may consist of sub-block interleaving, bit selection, and bit interleaving. In this specification, the input bit sequence to rate matching is d0, d1, d2, d3, ..., d N-1 After rate matching, the output bit sequence is f0,f1,f2,f3,...,f E-1 The bits input to the sub-block interleaver are coded bits d0,d1,d2,d3,...,d N-1 can be denoted as . The coded bits d0, d1, d2, d3, ..., d N-1 can be divided into multiple sub-blocks. In this specification, the bits output from the sub-block interleaver are y0,y1,y2,y3,...,y N-1 If we denote as, the bit sequence y0,y1,y2,y3,...,y after the sub-block interleaver N-1 is written to a circular buffer of length N.

[0138] Hybrid automatic request (HARQ) is a technology that combines forward error correction (FEC) and automatic repeat request (ARQ). For example, a transmitter transmits all or part of the encoded coded bits using FEC, and a receiver detects errors in the received data and transmits a HARQ-ACK signal indicating an acknowledgment (ARQ) or negative ARQ (NACK) of the received data to the transmitter. If the receiver determines that the received data is error-free or below a certain threshold, the transmitter transmits new data. However, if the received data contains errors, the transmitter retransmits the corresponding data block. The receiver combines the retransmitted data block with previously transmitted data blocks and decodes it again to detect errors. This process can be repeated until no errors are detected or until a predetermined number of errors are detected. The combining method for decoding retransmitted data blocks can be divided into the following two methods.

[0139] * Chase combining: For combining at the receiver, the transmitter retransmits coded bits identical to the initially transmitted coded bits. Chase combining can reduce the error probability through power gain during decoding of retransmitted data blocks.

[0140] * Incremental redundancy (IR): For combining at the receiver, the transmitter retransmits coded bits that are not identical to the coded bits that were initially transmitted. For example, the transmitter sends the redundancy that was not sent in the initial transmission to the receiver in the retransmission. Since the redundancy that was not sent in the previous transmission is sent in the retransmission, the redundancy of the previous transmission and the redundancy of the current transmission are combined to increase the redundancy, which has the effect of lowering the code rate. In other words, incremental redundancy can reduce the error probability through coding gain when decoding retransmitted data blocks. In general, since chase combining corresponds to the case where there is no incremental redundancy among incremental redundancies, chase combining can be interpreted as a special form of incremental redundancy.

[0141] In HARQ operation, the receiver generates an ACK or NACK for received or scheduled packets and provides them to the transmitter. A transmitter that receives a NACK for a transmission can retransmit the requested packet. The bits read from the circular buffer and sent in each retransmission may differ depending on the position of the redundancy version (RV). Referring to Figure 11, there are multiple (e.g., four) RVs that define the starting positions of bits read from the circular buffer.

[0142] The circular buffer is a crucial component for rate matching and enables puncturing and / or repetition of coded bits. Referring to Figure 11, the coded bits or the output bits after sub-block interleaving of the coded bits are sequentially written to the circular buffer for the mother code. The number of coded bits is read sequentially from a time point specified by the RV point within the circular buffer.

[0143] In some scenarios, when a turbo code or an LDPC code is applied to the data channel, limited buffer rate matching (LBRM) is performed, where some of the codewords are not stored in the circular buffer of the transmitter or receiver due to constraints on the circular buffer size. LBRM excludes some of the coded bits corresponding to the mother code rate from the transmit buffer. This has the effect of physically increasing the mother code rate, which can reduce the memory complexity of the receiver and the processing burden, thus bringing about implementation benefits. However, it can also cause performance degradation because the mother code rate increases. Typically, the transport block size (TBS) affected by LBRM depends on the number of coded bits stored in the circular buffer defined by the LBRM. For example, if the number of coded bits stored in the circular buffer can support the mother code rate without applying LBRM, it may be desirable to apply full buffer rate matching for the corresponding TBS. Typically, the code rate that can be supported for the maximum TBS is the mother code rate changed by LBRM.

[0144] For example, according to 3GPP TS 38.212 Release 15, when LBRM is applied, the bits after encoding of each CB are written to a circular buffer assuming the following:

[0145] The bit sequence after encoding is of length N for the r-th code block. cb is written as a circular buffer, where N is the number of bits after encoding when LBRM is not applied. If LBRM is not applied, N cb =N, otherwise N cb =min(N, N ref ) and here N ref = FLOOR{TBS LBRM / (C*R LBRM )}, C is the number of CBs, and R LBRM = 2 / 3, and TBS LBRM is calculated assuming:

[0146] - The maximum number of layers for a TB supported by the UE for the serving cell, which for the uplink shared channel (UL-SCH) is according to the RRC parameter ULmaxRank, if provided;

[0147] - If set by a higher layer (e.g., RRC layer), the maximum modulation order set for the serving cell; otherwise, the maximum modulation order Q. m = 6 is assumed for the downlink shared channel (DL-SCH);

[0148] - Maximum coding rate of 948 / 1024;

[0149] - Physical resource block (PRB) number n PRB = n PRB,LBRM can be given by Table 4, where n for DL-SCH PRB,LBRM The value is determined according to the initial bandwidth part if no other bandwidth part is set for the UE;

[0150] - Number of resource elements N RE =156*n PRB ;

[0151] - C is the number of code blocks in the transport block.

[0152] TBS in NR standard LBRM For further details on the decision, see section 6.1.4.2 of 3GPP TS 38.214 for UL-SCH and section 5.1.3.2 of 3GPP TS 38.214 for DL-SCH / PCH.

[0153]

[0154] Bits of the rate-matching output sequence length E are output as transmission bits from the circular buffer. For example, the redundancy version number for this transmission is rv id Then, the rate-matching output bit sequence e from the circular buffer for the corresponding code block k , k=0,1,2,...,E-1, can be generated according to the following table, where k0 is r iv The value of and the size of the circular buffer N cb , which may be a value determined based on the corresponding channel code.

[0155] > k = 0;

[0156] > j = 0;

[0157] >> while k < E

[0158] >>> if d(k0+j)modNcb≠ <null>

[0159] >>>> e k = d(k0+j)modNcb;

[0160] >>>> k = k+1;

[0161] >>> end if

[0162] >>> j = j+1

[0163] >> end while.

[0164] The input bit sequences for the code block concatenation block are the sequences f r0 , f r1 , f r2 , f r3 ,...,f r(Er-1) , where r=0,...,C-1, and Er is the number of rate-matched bits for the r-th code block. Er may be a value determined based on the size of the radio resource. Rate-matched outputs for different code blocks may be sequentially concatenated through the code block concatenation. In some implementations of the present specification described below, C may be the sum of the number of data code blocks (DCBs) C1 and the number of parity code blocks (PCBs) C2.

[0165] To support communication systems requiring high data rates, more data bits must be transmitted per unit transmission time. Currently, in the 5G standard, transmission data bits are transmitted in the form of transport blocks (TBs). If a TB exceeds a certain size, it is divided into multiple code blocks (CBs), and the transmitter encodes and transmits each CB. In this case, to support higher data rates, the TBS increases, which increases the number of transmitted CBs. Typically, transmission parameters are set to satisfy a certain block error ratio (BLER) for TB transmission. As the number of CBs increases, the error requirements for each CB to satisfy the corresponding BLER also increase. Furthermore, because the entire TB must be retransmitted even if a specific CB fails, HARQ transmission efficiency decreases. To address this situation, the following transmission methods can be considered.

[0166] * Method 1: The transmitter can improve HARQ transmission efficiency by selectively retransmitting only CBs where errors occurred. In this case, the HARQ ACK feedback overhead and the number of control signaling bits increase.

[0167] * Method 2: CB BLER can be improved by having the transmitter perform inter-CB encoding and the receiver perform inter-CB decoding when a CB error occurs. This requires additional decoding, which increases complexity.

[0168] Method 1 has been adopted in the 5G standard. Considering signaling overhead, Method 1 can also be applied by defining multiple CBs as code block groups (CBGs), thereby reducing signaling overhead. However, in communication systems requiring higher data rates, as the TBS increases, the number of CBs within a CBG also increases, potentially reducing the efficiency of Method 1. Therefore, Method 2 is considered in some implementations of this specification described below.

[0169] In some implementations of this specification, for inter-CB encoding, for example, outer codes (i.e., serially concatenated codes) and globally coupled LDPC codes (GC-LDPC) may be used.

[0170] Fig. 12 illustrates an encoding operation of an outer code. Referring to Fig. 12, a transmitter may generate C1 CBs, for example, CB#0 to CB#(C1-1), by adding a CRC generated based on the TB (hereinafter, TB CRC) to a TB and dividing the obtained CRC-added TB. The transmitter may generate an outer code parity by applying an outer encoding to the C1 CRC-added CBs obtained by adding a CB CRC to each of the C1 CBs, where C1 is a positive integer. The transmitter may generate C2 parity blocks (PBs), for example, PB#0 to PB#(C2-1), where C2 is a positive integer, based on the outer code parity. The transmitter may generate C2 CRC-added PBs by adding a CRC generated based on the corresponding PB to each PB. The transmitter may generate an internal code parity by applying an internal encoding (e.g., LDPC encoding) to each of the C1 CRC additional CBs and the C2 CRC additional PBs.

[0171] Various coding schemes can be applied for the outer code. For example, Reed-Solomon (RS) code, raptor code, and / or single parity check code can be applied as the outer code. Generally, the number of parity symbols of (n, k) code is (nk). Here, k can be the length of the input sequence to the encoding (e.g., the size of the CB with the CRC added), and n is the number of coded bits after encoding. If the outer code is applied for data transmission as illustrated in Fig. 12, the error correction capability can be expressed as t = nk. That is, the receiver can correct the error if the number of CBs with errors is t or less, and at this time, the information of the CB with the error can be known using the CRC added to each CB.

[0172] Fig. 13 illustrates a globally coupled LDPC (GC LDPC) code. That is, Fig. 13 illustrates the structure of a parity check matrix of a GC LDPC code. In particular, Fig. 13(a) illustrates the structure of a parity check matrix of a GC LDPC, and Fig. 13(b) illustrates GC LDPC from the perspective of a Tanner graph representation. The construction of GC LDPC codes typically goes through two steps. In the first step, a base matrix (i.e., a base graph) is designed, and then each element of the base matrix is ​​replaced with a CPM or zero matrix of size Z-by-Z.

[0173] Existing TB-based communication of 5G requires additional transmission for the entire TB or additional transmission for some TBs when errors occur in some CBs, which leads to high latency and resource consumption. GC LDPC codes are designed based on multiple constituent block LDPC codes (see the paper "Li, S. Lin, K. Abdel-Ghaffar, W. E. Ryan, and D. J. Costello, "Globally coupled LDPC codes," in Information Theory and Applications Workshop (ITA), Jan. 2016."). GC LDPC codes are a novel extension of traditional LDPC codes by introducing global coupling between variable nodes to enhance error correction capability. The parity check matrix of a GC LDPC code includes a global part that concatenates the parity check matrices of all local codes into a single large matrix and disjoint copies of the block LDPC codes, called local codes. The above local codes, also called local LDPC codes, are connected only by global coupling check nodes, as illustrated in Fig. 13. These global check nodes provide diversity between codes during decoding, thereby improving the error correction performance of the constituent codes. In the global coupling portion at the bottom of the parity check matrix in Fig. 13, the check nodes connect all variable nodes, providing high connectivity for each coded bit, which provides faster convergence of iterative decoding and improves error correction performance. The structure of GC LDPC codes provides high throughput transmission because disjoint local codes can facilitate parallel encoding and decoding.

[0174] For GC LDPC codes, the receiver first decodes the local codes, and if decoding of some local codes fails, decoding is performed on the entire code using global coupling check nodes. This allows the receiver to minimize decoding latency by minimizing the number of times the global check nodes are utilized. In other words, for GC LDPC codes, the receiver can minimize latency and decoding complexity by decoding the global code only when decoding of individual local codes fails through two-stage decoding. If the receiver performs decoding more than a certain number of iterative times in the two-stage decoding process, the error rate performance can be improved through two-stage decoding compared to performing a single decoding of the local codes that make up the GC LDPC code, which improves the TB error rate performance of the LDPC code composed only of local codes.

[0175] Figure 14 illustrates the basic matrix representation of GC LDPC codes. Referring to Figure 14(a), the basic matrix B of GC LDPC codes is divided into two subarrays containing submatrices arranged in different shapes. The upper subarray of the two subarrays contains (L+1) submatrices B. i With a diagonal array of , each submatrix B i is called the local part, where i=0,...,L. The lower subarray among the two subarrays is called the global part, and the matrices G i is a 1-by-(L+1) array. In some implementations of this specification, L+1 may = C1.

[0176] In some implementations, LDPC codes defined in the 5G NR standard can be used as local codes. In this case, submatrix B in Figure 14(a) i can be replaced by the basic graph defined in the 5G NR standard. Since 5G NR LDPC codes are systematic (i.e., information and parity bits are systematically segmented and grouped separately), the submatrix B i is B i =[I i P i ] can be divided into, where I i is the identity matrix. For the global part, the sub-matrix G is used to preserve the rate compatibility of local 5G NR LDPC codes and accommodate the convenience in encoding. i =[X i 0] can be considered. Figure 14(b) illustrates the basic matrix of GC LDPC codes that express submatrices in a systematic form.

[0177] Fig. 15 illustrates a schematic structure of a GC LDPC code. As illustrated in Fig. 15, according to the GC LDPC code, global parity is generated by a global part that has a connection relationship with a plurality of local codes. In the case of LDPC encoding in the NR standard, since the number of code blocks varies according to the TBS, it can be efficient to design the global parity part to be divided according to the length of the local code in terms of scalability of the number of code blocks. Referring to Fig. 15, for example, when the length of the local code is n and the length of the global parity is s, the size of the matrix corresponding to the global part divided by the length of the local code is s*n, the global parity is s*s, and the number of generated global parity bits is s. If the number of local LDPC codes included in the GC LDPC code is C, the parity check matrix of the GC LDPC code can include n*s columns. The global parts of the GC LDPC code form a connection between local codes, so that the local codes are reflected in the global parity. Among the length n of the local code, k may correspond to the length of the code block or the length of the code block with the CB CRC added, and the remainder (nk) may correspond to the length of the parity bits generated by the local code. The C local codes may correspond to the C CBs, respectively (respectively), or may correspond to the C CRC-added CBs, respectively (respectively). The transmitter may generate one or more parity block (PB)(s) ​​using the global parity bits generated by the matrix corresponding to the global parity.For example, if a CRC-added TB obtained by adding a TB CRC is divided into C1 CBs, a parity check matrix of a GC LDPC code including at least C1 local codes can be applied to the C1 CBs to generate C1 coded bit blocks and C2 parity blocks.

[0178] For convenience of explanation, in the following, a CB or a CRC-added CB obtained by adding a CB CRC to a CB is referred to as a data code block (DCB), and a parity block obtained by using parity bits obtained by applying external encoding to CBs or CB CRC-added CBs, or the global parity bits of a GC LDPC code, is referred to as a parity code block (PCB).

[0179] Figures 16 and 17 illustrate transmissions of parity for forward error correction (FEC).

[0180] As mentioned earlier, as the TBS increases, the number of CBs can increase, and as the number of CBs increases, the error requirements for each CB also increase to meet the BLER. Since errors in a specific CB require retransmission of the entire TB, HARQ transmission efficiency also decreases. One solution to this problem is to improve CB BLER during inter-CB decoding through inter-CB encoding.

[0181] Referring to Fig. 16(a), the transmitter can generate parity by applying an FEC code between multiple DCBs and transmit this parity along with the DCBs in the initial transmission. Alternatively, referring to Fig. 16(b), if an error occurs in the initial transmission, the transmitter can transmit parity when performing a retransmission, thereby improving the aforementioned problems.

[0182] Parity generated from multiple DCBs (i.e., external parity) ("Inter-DCB parity" in FIG. 15) can be generated and transmitted as one or more parity code blocks (PCBs), as illustrated in FIG. 17. As illustrated in FIG. 17, the transmitter can generate and transmit parity for each DCB and each PCB by applying a forward error correction code to each DCB and each PCB. The transmitter can add a CRC before applying the forward error correction code to each DCB and each PCB.

[0183] Inter-CB encoding can improve system performance by allowing the receiver to recover from DCBs with errors due to deep fading in a fading channel using DCBs without errors and PCBs. Furthermore, the transmitter can retransmit only a number of PCBs equal to the number of DCBs with errors, rather than retransmitting all DCBs, thereby allowing the receiver to recover from errors. Therefore, applying an external code can reduce retransmission overhead.

[0184] When concatenated codes, such as outer codes or GC LDPC, are introduced, PCBs are generated in addition to the existing DCBs, and thus need to be stored in the transmission buffer. When limited buffer rate matching (LBRM) must be applied, where some codewords are not stored in the transmitter's circular buffer due to constraints on the size of the circular buffer in the transmitter or receiver, the question arises as to how to apply LBRM to the DCBs and PCBs. Below, several implementations of this specification that apply LBRM to DCBs and PCBs when concatenated codes, such as outer codes or GC LDPC codes, are introduced into a communication system are described.

[0185] In some implementations of this specification, when a concatenated code is introduced, it is assumed that the maximum number of PCBs is given, and the maximum size of the transmit buffer can be determined by the maximum value of the combined number of DCBs and PCBs. When a concatenated code is introduced into a communication system, the following approaches can be considered when designing LBRM.

[0186] FIGS. 18 to 20 are examples of coded bits transmitted and punctured coded bits according to some implementations of the present specification when LBRM is applied. When external encoding is applied, DCB / PCB in the description of FIGS. 18 to 20 may mean a coded bit sequence generated by performing internal coding on each of the corresponding DCB / PCB. When encoding using a GC LDPC code is applied, DCB in the description of FIGS. 18 to 20 may mean a coded bit sequence obtained by applying a local LDPC code of the GC LDPC code to the corresponding CB or CRC-added CB, and PCB may correspond to the global parity bit sequence itself or a part thereof obtained through the GC LDPC code.

[0187] <Method 1: Puncturing the same amount of bit(s) for DCB and PCB in the transmit buffer>

[0188] Referring to Figure 18, the size N of the circular buffer when LBRM is applied cb = min(N, N ref ), then in some implementations of this specification, N ref = FLOOR{TBS LBRM / (C*R LBRM )}, C can be defined as the sum of the number of DCBs and the number of PCBs. When the internal encoding is performed using LDPC, in some implementations of this specification, the transmitter can perform puncturing on the end of the transmission buffer corresponding to the parity bits. The punctured bits are not transmitted. Referring to FIG. 18, C1 is the number of DCBs, C2 is the number of PCBs, and in some implementations of this specification, N ref = FLOOR{TBS LBRM / (C*R LBRM )} is set to C = C1+C2. Method 1 can be efficient when DCBs and PCB(s) are transmitted together in the initial transmission. This is because when only DCBs are transmitted in the initial transmission, it is difficult to puncture the DCBs and PCBs in equal amounts, and puncturing the PCBs may cause performance degradation.

[0189] <Method 2: Prioritize puncturing PCB(s) in the transmit buffer>

[0190] Method 2 adjusts the number of PCBs so that it does not exceed the given transmission buffer size.

[0191] For example, referring to Fig. 19(a), the transmitter punctures the PCB(s) first, and then, if necessary, punctures and does not transmit the bits of the DCB. At this time, the puncturing can be performed so that the maximum amount is the same for all DCBs. For example, the number of bits transmitted for each DCB, N ref = FLOOR{TBS LBRM / (C1*R LBRM )}. If it is not necessary to puncture all PCBs, the transmitter does not transmit by puncturing as much as possible for all PCBs, but does not perform puncturing for DCB and stores all coded bits in the transmit buffer.

[0192] In another example, the minimum number of transmitted PCBs C3 may be defined or set by the BS or the UE performing the scheduling. In this case, the transmitter punctures PCB(s) so that the minimum number of transmitted PCBs C3 remains, and punctures DCB(s) if necessary, and does not transmit the punctured bits. Referring to Fig. 19(b), the transmitter punctures as many bits as possible for the transmitted CBs (i.e., DCBs and transmitted PCBs) including the transmitted PCBs, and does not transmit the punctured bits. In this case, the number of bits transmitted in each of the DCBs and the transmitted PCB(s) is N. ref = FLOOR{TBS LBRM / ((C1+C3)*R LBRM ) can be expressed as follows.

[0193] As another example, as in FIG. 19(c), the transmitter may puncture only the DCBs by the same amount of bits as possible for each DCB and not transmit the punctured bits.

[0194] <Method 3: Prioritize puncturing of DCB(s) in the transmit buffer>

[0195] In some implementations of this specification, puncturing may be performed (prioritarily) on the coded bits of DCBs. Implementations of this specification related to method 3 are described with reference to FIG. 20. In some implementations, N ref = FLOOR{TBS LBRM / (C*R LBRM )}, where C = C1+C2. In Fig. 20, N ref,d is the number of coded bits written to the circular buffer after LBRM, i.e., the number of coded bits written to the circular buffer among the coded bits of DCB, and N thr is the minimum number of coded bits required for DCB transmission, i.e., the maximum number of coded bits that can be punctured among the coded bits for DCB. In some implementations, N thr It can be a value provided by signaling to a higher layer, or a value determined by code rate, etc.

[0196] As an example of Method 3, referring to FIG. 20(a), the transmitter may perform puncturing of only the DCBs as evenly as possible for each DCB and not transmit the punctured bits. The receiver may perform decoding assuming this. The number of bits that need to be punctured among the total coded bits for the TB (i.e., the number of coded bits that are not written to the circular buffer) is (C1+C2)(N-N ref ), so (C1+C2)(N - N ref ) coded bits must be excluded from the coded bits of C1 DCBs. For example, if an equal number of coded bits are punctured for C1 DCB buffers, then for each DCB, CEIL{(C1+C2)*(N - N ref ) / C1} = CEIL{(1+C2 / C1)*(N - N ref )} coded bits can be punctured, i.e. excluded from transmission. For each DCB, N ref,d = N - CEIL{(1+C2 / C1)*(N - N ref )} coded bits or N ref,d = FLOOR{N ref - C2 / C2*(N - N ref ) coded bits can be written to the corresponding circular buffer. When generating the global parity of a GC LDPC code, if only information is connected (i.e., only the systematic parts of the parity check matrices of each local code are connected), maintaining the global parity block and preferentially puncturing the DCB(s) can be expected to perform better than puncturing the global parity block. When a GC LDPC code is applied, according to the example of Fig. 20(a), the transmitter can puncture only the DCB(s) as evenly as possible without puncturing the global parity block. As another example of Method 3, the transmitter preferentially punctures as many bits as possible for the DCBs so as not to exceed a given transmission buffer size and does not transmit the punctured bits. After puncturing is performed on all DCBs, puncturing can be performed on the PCB(s) if necessary. The receiver assumes this and performs decoding.

[0197] For example, N thr Let N be the minimum number of coded bits for DCB transmission, i.e., the maximum number of coded bits that can be punctured among the coded bits for DCB. ref,d >= N thr On the other hand, N ref,d = N - CEIL{(1+C2 / C1)*(N - N ref )} or N ref,d = FLOOR{N ref - C2 / C2*(N - N ref }, and puncturing is performed only for DCBs, as in the example of Fig. 20(a), and puncturing does not need to be performed for PCBs.

[0198] However, the transmitter has (N - N) for each DCB thr ) coded bits are punctured within a range not exceeding 10 bits, but puncturing may also be performed for the PCB if fewer bits are punctured in the DCBs than the number of bits that should be punctured for the corresponding TB. For example, N ref,d < N thr If so, at least N in the circular buffer for DCB thr Since the coded bits must be recorded, the maximum number of coded bits that can be punctured for each DCB is (N - N thr ) is the number of coded bits that must be punctured for the corresponding TB (C1+C2)(N - N ref ) among C1*(N - N thr ) are punctured in the coded bits of the DCBs, so the number of bits that need to be punctured for the PCBs is (C1+C2)(N - N ref ) - C1*(N - N thr ) = C2*(N - N ref ) - C1*(N ref - N thr )am.

[0199] After puncturing is performed on all DCBs, when puncturing is performed on PCB(s) if necessary, as shown in Fig. 20(b), in some implementations, at most the same amount of bits are punctured on all PCBs and the punctured bits are not transmitted. For example, in Fig. 20(b), N ref,p = N - CEIL{(N - N ref ) - C1 / C2*(N ref - N thr )} or N ref,p = FLOOR{N ref + C1 / C2*(N ref - N thr )} may be. Therefore, as illustrated in Fig. 20(b), the number of bits not transmitted in the DCB and the number of bits not transmitted in the PCB may not be the same.

[0200] After puncturing is performed on all DCBs, if necessary, when puncturing is performed on a PCB, if the number of bits to be punctured in the PCB(s) is greater than the CB size of the PCB, the entire specific PCB is not punctured and transmitted, as illustrated in Fig. 20(c). That is, if more than a positive integer multiple of the PCB size must be punctured, the transmitter can reduce the number of PCBs to be transmitted and perform puncturing as evenly as possible on the remaining PCB(s). At this time, the same amount of bits are punctured as much as possible on the remaining PCB(s). For example, the number of bits to be punctured on the PCB(s) Z = (C1+C2)(N - N ref ) - C1*(N - N thr ) = C2*(N - N ref ) - C1*(N ref - N thr ) is greater than a positive integer multiple X of the PCB size Y, then CEIL{(Z - X*Y) / (C2 - X)} coded bits can be punctured for each PCB.

[0201] Applying LBRM also reduces the circular buffer size assumed to indicate the RV during HARQ operation, thus changing the RV's position during HARQ operation. In some implementations, for example, the RV's position may be scaled and indicated proportionally to the reduced circular buffer size. In this case, since the transmit buffer sizes for the DCB and the PCB may differ, the RV's position may be defined differently for the DCB and the PCB.

[0202] Puncturing the DCB or PCB in Method 1 to Method 3 means that the bit sequence d0,d1,d2,d3,...,d after internal encoding for the DCB or PCB N-1 Length N for the corresponding CB CB A circular buffer of length N CB Record as much and the remainder (N - N CB ) may mean not recording the bits, where N for DCB CB = N ref and N for PCB CB = N ref,p . Alternatively, puncturing the DCB or PCB in methods 1 to 3 means that the bit sequence d0,d1,d2,d3,...,d after local LDPC encoding for the DCB N-1 Or global parity bit sequence d0,d1,d2,d3,...,d after GC LDPC encoding N-1 length N for the corresponding CB or global parity CB A circular buffer of length N CB Record as much and the remainder (N - N CB ) may mean not recording the bits, where N for DCB CB = N ref and N for global parity CB = N ref,p am.

[0203] In the above description, for convenience of explanation, methods 1 to 3 were described assuming that the number of coded bits N for DCB and the number of coded bits N for PCB are the same, but N for DCB and N for PCB may be different.

[0204] A receiver may receive coded bits transmitted according to any one of the implementations of the present specification described in Methods 1 through 3, and may decode the received coded bits assuming that implementation.

[0205] According to some implementations of this specification, LBRM can be applied when a concatenated coding, such as outer coding or GC LDPC coding, is introduced. According to some implementations of this specification, the system can be implemented efficiently.

[0206] Figure 21 illustrates a channel encoding process according to some implementations of the present specification.

[0207] A communications device or encoder may perform operations according to some implementations of the present disclosure in connection with channel encoding. The communications device or encoder may include at least one transceiver; at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations according to some implementations of the present disclosure. A processing device for the communications device or encoder may include at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer-readable (non-volatile) storage medium may store at least one computer program comprising instructions that, when executed by at least one processor, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer program or computer program product may be recorded on at least one computer-readable (non-volatile) storage medium and may contain instructions that, when executed, cause (at least one processor) to perform operations according to some implementations of the present specification.

[0208] Referring to FIG. 21, a method performed by the communication device, or in the communication device, the encoder, the processing device, the computer-readable (non-volatile) storage medium, and / or the computer program product, the operations may include: obtaining C1 information blocks from a transport block, where C1 is a positive integer; applying channel coding to the C1 information blocks to generate C1 coded bit blocks, each having a length of N_d, and C2 parity bit blocks, each having a length of N_p (S2101), where C2 is a positive integer; writing the C1 coded bit blocks into C1 circular buffers, each having a length of N_cb,d (S2103); writing the C2 parity bit blocks into C2 circular buffers, each having a length of N_cb,p (S2103); determining transmission bits in the C1 circular buffers and the C2 circular buffers; and transmitting the transmission bits over a wireless channel (S2105). In some implementations, N_cb,p = N_p and N_cb,d < N_d (see example in Fig. 20).

[0209] Figure 22 illustrates a channel decoding process according to some implementations of the present specification.

[0210] A communications device or decoder may perform operations according to some implementations of the present disclosure in connection with channel decoding. The communications device may include at least one transceiver; at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations according to some implementations of the present disclosure. A processing device for the communications device or decoder may include at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer-readable (non-volatile) storage medium may store at least one computer program comprising instructions that, when executed by the at least one processor, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer program or computer program product may be recorded on at least one computer-readable (non-volatile) storage medium and may contain instructions that, when executed, cause (at least one processor) to perform operations according to some implementations of the present specification.

[0211] Referring to FIG. 22, in a method performed by the communication device, or in the communication device, the decoder, the processing device, the computer-readable (non-volatile) storage medium, and / or the computer program product, the operations may include: receiving coded bits (S2201); and performing channel decoding on the coded bits to obtain or determine a transport block (S2203). The coded bits include bits obtained from C1 circular buffers, each having a length of N_cb,p, and C2 circular buffers, each having a length of N_cb,p, where C1 and C2 are positive integers, the C1 circular buffers are for C1 coded bit blocks, each having a length of N_d, the C2 circular buffers are for C2 parity bit blocks, each having a length of N_p, and the C1 coded bit blocks and the C2 parity bit blocks may be generated through channel coding for C1 information blocks associated with the transport block. In some implementations, N_cb,p = N_p, and N_cb,d < N_d (see example in FIG. 20(a)).

[0212] In some implementations related to FIG. 21 or FIG. 22, the coded bit block may be a coded bit sequence obtained by applying an internal encoding to the CBs, or a DCB obtained by a local code of the GC LDPC code. In some implementations, the parity bit block may be a coded bit sequence obtained by applying an internal encoding to a parity block obtained by external encoding to the CBs, or a global parity obtained by a global part of the GC LDPC code.

[0213] In some implementations related to FIG. 21 or FIG. 22, applying channel coding to the C1 information blocks to generate the C1 coded bit blocks and the C2 parity bit blocks may include: applying outer coding to the C1 information blocks to generate the C2 parity blocks; applying inner coding to each of the C1 information blocks and the C2 parity blocks to generate the C1 coded bit blocks and the C2 parity bit blocks.

[0214] In some implementations related to FIG. 21 or FIG. 22, applying channel coding to the C1 information blocks to generate the C1 coded bit blocks and the C2 parity bit blocks may include: applying globally coupled low parity check (GC LDPC) coding to the C1 information blocks to generate the C1 coded bit blocks and the C2 parity bit blocks.

[0215] In some implementations related to FIG. 21 or FIG. 22, N_cb,d = FLOOR{N_ref -C2 / C1*(N_d - N_ref)}, where N_ref = FLOOR{TBS_LBRM / (C*R_LBRM)}, where C = C1 + C2, TBS_LBRM is a rate matching related buffer size for the transport block, and R_LBRM may be a predetermined code rate.

[0216] In some implementations related to FIG. 21 or FIG. 22, TBS_LBRM may be determined based on i) C1+C2, ii) the size of radio resources for the transmission bits, and iii) the maximum number of multiple input multiple output (MIMO) layers configured for the radio channel.

[0217] In some implementations related to FIG. 21 or FIG. 22, the transmitted coded bits may include: generating a rate-matched output sequence of length E_r from each of the C1 circular buffers and the C2 circular buffers, where E_r is the number of rate-matched bits for the r-th code block, which is an information block or a parity block.

[0218] As described above, the examples disclosed herein are provided to enable those skilled in the art to implement and practice the present disclosure. While the examples have been described above with reference to the examples of the present disclosure, those skilled in the art will appreciate that various modifications and variations may be made to the examples of the present disclosure. Accordingly, the present disclosure is not intended to be limited to the examples described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0219] Implementations of this specification may be used in wireless communication systems, base stations, user equipment, or other equipment.< / null> < / null>

Claims

When a communication device transmits a transport block in a wireless communication system, Obtain C1 information blocks from the above transport block, where C1 is a positive integer; Channel coding is applied to the above C1 information blocks to generate C1 coded bit blocks, each having a length of N_d, and C2 parity bit blocks, each having a length of N_p, where C2 is a positive integer; Write the above C1 coded bit blocks into C1 circular buffers, each of which has length N_cb,d; Write the above C2 parity bit blocks to C2 cyclic buffers, each of which has length N_cb,p; Determine the transmission bits in the C1 circular buffers and the C2 circular buffers; and comprising transmitting the above transmission bits over a wireless channel, N_cb,p = N_p and N_cb,d < N_d, Method of transmitting transport blocks. In the first paragraph, Applying channel coding to the above C1 information blocks to generate the above C1 coded bit blocks and the above C2 parity bit blocks: Applying external coding to the above C1 information blocks to generate C2 parity blocks; Including generating the C1 coded bit blocks and the C2 parity bit blocks by applying internal coding to each of the C1 information blocks and the C2 parity blocks. Method of transmitting transport blocks. In the first paragraph, Applying channel coding to the above C1 information blocks to generate the above C1 coded bit blocks and the above C2 parity bit blocks: Including generating the C1 coded bit blocks and the C2 parity bit blocks by applying globally coupled low parity check (GC LDPC) coding to the C1 information blocks. Method of transmitting transport blocks. In the first paragraph, N_cb,d = FLOOR{N_ref - C2 / C1*(N_d - N_ref)}, Here, N_ref = FLOOR{TBS_LBRM / (C*R_LBRM)}, where C = C1+C2, TBS_LBRM is the rate matching related buffer size for the transport block, and R_LBRM is a predetermined code rate. Method of transmitting transport blocks. In the first paragraph, Determining the above transmission bits: generating a rate-matched output sequence of length E_r from each of the C1 circular buffers and the C2 circular buffers, wherein E_r is the number of rate-matched bits for the r-th code block, which is an information block or a parity block; Method of transmitting transport blocks. When a communication device transmits a transport block in a wireless communication system, At least one transmitter / receiver; at least one processor; and At least one computer memory operably connectable to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations, said operations comprising: Obtain C1 information blocks from the above transport block, where C1 is a positive integer; Channel coding is applied to the above C1 information blocks to generate C1 coded bit blocks, each having a length of N_d, and C2 parity bit blocks, each having a length of N_p, where C2 is a positive integer; Write the above C1 coded bit blocks into C1 circular buffers, each of which has length N_cb,d; Write the above C2 parity bit blocks to C2 cyclic buffers, each of which has length N_cb,p; Determine the transmission bits in the C1 circular buffers and the C2 circular buffers; and comprising transmitting the above transmission bits over a wireless channel, N_cb,p = N_p and N_cb,d < N_d, Communication device. In a processing device in a wireless communication system, at least one processor; and At least one computer memory operably connectable to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations, said operations comprising: Obtain C1 information blocks from the transport block, where C1 is a positive integer; Channel coding is applied to the above C1 information blocks to generate C1 coded bit blocks, each having a length of N_d, and C2 parity bit blocks, each having a length of N_p, where C2 is a positive integer; Write the above C1 coded bit blocks into C1 circular buffers, each of which has length N_cb,d; Write the above C2 parity bit blocks to C2 cyclic buffers, each of which has length N_cb,p; Determine the transmission bits in the C1 circular buffers and the C2 circular buffers; and comprising transmitting the above transmission bits over a wireless channel, N_cb,p = N_p and N_cb,d < N_d, Processing unit. In a computer-readable storage medium, The storage medium stores at least one program code comprising instructions that, when executed, cause at least one processor to perform operations, the operations comprising: Obtain C1 information blocks from the transport block, where C1 is a positive integer; Channel coding is applied to the above C1 information blocks to generate C1 coded bit blocks, each having a length of N_d, and C2 parity bit blocks, each having a length of N_p, where C2 is a positive integer; Write the above C1 coded bit blocks into C1 circular buffers, each of which has length N_cb,d; Write the above C2 parity bit blocks to C2 cyclic buffers, each of which has length N_cb,p; Determine the transmission bits in the C1 circular buffers and the C2 circular buffers; and comprising transmitting the above transmission bits over a wireless channel, N_cb,p = N_p and N_cb,d < N_d, Storage media. When a communication device receives a transport block in a wireless communication system, Receive coded bits; and It includes performing channel decoding on the coded bits to obtain the transport block, The above coded bits include bits obtained from C1 circular buffers, each of length N_cb,p, and C2 circular buffers, each of length N_cb,p, where C1 and C2 are positive integers, The above C1 circular buffers are each for C1 coded bit blocks of length N_d, and the above C2 circular buffers are each for C2 parity bit blocks of length N_p. The above C1 coded bit blocks and the C2 parity bit blocks are generated through channel coding for the C1 information blocks associated with the transport block, N_cb,p = N_p and N_cb,d < N_d, How to receive transport blocks. When a communication device receives a transport block in a wireless communication system, At least one transmitter / receiver; at least one processor; and At least one computer memory operably connectable to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations, said operations comprising: Receive coded bits; and It includes performing channel decoding on the coded bits to obtain the transport block, The above coded bits include bits obtained from C1 circular buffers, each of length N_cb,p, and C2 circular buffers, each of length N_cb,p, where C1 and C2 are positive integers, The above C1 circular buffers are each for C1 coded bit blocks of length N_d, and the above C2 circular buffers are each for C2 parity bit blocks of length N_p. The above C1 coded bit blocks and the C2 parity bit blocks are generated through channel coding for the C1 information blocks associated with the transport block, N_cb,p = N_p and N_cb,d < N_d, Communication device. In a processing device in a wireless communication system, at least one processor; and At least one computer memory operably connectable to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations, said operations comprising: Receive coded bits; and It includes performing channel decoding on the above coded bits to obtain a transport block, The above coded bits include bits obtained from C1 circular buffers, each of length N_cb,p, and C2 circular buffers, each of length N_cb,p, where C1 and C2 are positive integers, The above C1 circular buffers are each for C1 coded bit blocks of length N_d, and the above C2 circular buffers are each for C2 parity bit blocks of length N_p. The above C1 coded bit blocks and the C2 parity bit blocks are generated through channel coding for the C1 information blocks associated with the transport block, N_cb,p = N_p and N_cb,d < N_d, Processing unit. In a computer-readable storage medium, The storage medium stores at least one program code comprising instructions that, when executed, cause at least one processor to perform operations, the operations comprising: Receive coded bits; and It includes performing channel decoding on the above coded bits to obtain a transport block, The above coded bits include bits obtained from C1 circular buffers, each of length N_cb,p, and C2 circular buffers, each of length N_cb,p, where C1 and C2 are positive integers, The above C1 circular buffers are each for C1 coded bit blocks of length N_d, and the above C2 circular buffers are each for C2 parity bit blocks of length N_p. The above C1 coded bit blocks and the C2 parity bit blocks are generated through channel coding for the C1 information blocks associated with the transport block, N_cb,p = N_p and N_cb,d < N_d, Storage media.

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