Touch-control display panel and display device

Abstract

Provided in the embodiments of the present disclosure are a touch-control display panel and a display device. The touch-control display panel has a display region and a peripheral region assembly located at the periphery of the display region, the peripheral region assembly comprising a first peripheral region located on one side of the display region and a second peripheral region other than the first peripheral region. The touch-control display panel comprises: a substrate; a plurality of binding terminals, which are located in the first peripheral region; a light-emitting functional layer, which is located on one side of the substrate; and a plurality of first spacers, which are located in the second peripheral region, wherein the orthographic projections of the plurality of first spacers on the substrate surround the edge of the light-emitting functional layer, and there is a gap region between said orthographic projections and the edge of the light-emitting functional layer.

Description

Touch display panel and display device Technical Field

[0001] This disclosure relates to the field of display technology, and more particularly to touch display panels and display devices. Background Technology

[0002] With the continuous advancement of technology, display devices such as smartphones and tablets have become an indispensable part of people's lives. As an important component of display devices, the display screen has also been subject to higher requirements. Organic Light-Emitting Diode (OLED) display panels are widely used in display panels because they have advantages over LCD panels, such as being thinner and lighter, brighter, having lower power consumption, faster response, higher definition, better flexibility, and higher luminous efficiency.

[0003] The new generation of touch displays integrates touch and display functions, enriching the ways users interact with the display and enhancing the user experience. Currently, flexible touch displays are formed using the Flex Mesh Layer On Cell (FMLOC) method. The touch layer of this flexible touch display is integrated onto the encapsulation layer of the flexible display substrate. The touch electrodes in the touch layer are connected to touch leads that are transferred to a metal layer on the array substrate outside the display area via adapter holes, and then connected to integrated circuits or flexible circuit boards, achieving the goal of reducing overall module thickness and cost.

[0004] Summary of the Invention

[0005] This disclosure provides a touch display panel and a display device. The touch display panel has a display area and a peripheral area surrounding the display area. The peripheral area includes: a first peripheral area located on one side of the display area, and a second peripheral area outside the first peripheral area; wherein, the touch display panel includes:

[0006] Substrate;

[0007] Multiple bonding terminals are located in the first peripheral area;

[0008] A light-emitting functional layer is located on one side of the substrate;

[0009] A plurality of first spacers are located in the second peripheral region. The orthographic projection of the plurality of first spacers on the substrate is disposed around the edge of the light-emitting functional layer and has a gap region between them and the edge of the light-emitting functional layer.

[0010] In one possible implementation, the touch display panel includes: a plurality of anodes and a first power line; the first power line includes: a first conductive structure located in the peripheral area and made of the same layer and material as the anodes; the first conductive structure has a first boundary facing the display area.

[0011] The plurality of first spacers are projected onto the substrate, located on the side of the first boundary projected onto the substrate toward the display area, and are distributed sequentially along the extension direction of the first boundary.

[0012] In one possible implementation, the display panel includes: a cathode; the first power line further includes: a second conductive structure located in the peripheral area;

[0013] The first conductive structure, the second conductive structure, and the cathode are all located in different layers, and the second conductive structure is electrically connected to the cathode through the first conductive structure.

[0014] In one possible implementation, the display area has a plurality of pixels; the distance between two adjacent first spacers along the direction of extension of the first boundary is 1.5 to 3 times the pixel size.

[0015] In one possible implementation, the minimum width of the gap area is greater than or equal to 50 μm in the direction from the peripheral area to the display area.

[0016] In one possible implementation, the touch display panel includes: a plurality of first touch traces located in the first peripheral area; of the first peripheral area and the second peripheral area, only the second peripheral area is provided with the first spacer.

[0017] In one possible implementation, in the first peripheral area, the line width of the first touch trace is greater than zero and less than or equal to 15 μm.

[0018] In one possible implementation, the touch display panel includes: a plurality of first touch traces located in the first peripheral area; the touch display panel further includes: a plurality of second spacers located in the first peripheral area.

[0019] In one possible implementation, the orthographic projection of the second spacer onto the substrate does not overlap with the orthographic projection of the first touch trace onto the substrate.

[0020] In one possible implementation, the projection of the plurality of second spacers onto the substrate is located at the gap between the projections of two adjacent first touch traces onto the substrate.

[0021] In one possible implementation, the plurality of first touch lines extend along a first direction, and the second spacers are distributed sequentially along the first direction;

[0022] The spacing between two adjacent first touch traces located on both sides of the second spacer is greater than the spacing between the other two adjacent first touch traces.

[0023] In one possible implementation, the distance between the orthographic projection of the second spacer onto the substrate and the orthographic projection of the adjacent first touch trace onto the substrate is greater than or equal to one-quarter of the linewidth of the first touch trace.

[0024] In one possible implementation, the plurality of first touch traces include: at least two first sub-touch traces; the plurality of second spacers are located at the gap between the orthographic projections of two adjacent first sub-touch traces onto the substrate.

[0025] The first sub-touch trace includes: a first trace portion extending along a first direction, and a second trace portion connected to the first trace portion and protruding toward the side away from the second spacer.

[0026] In one possible implementation, the second routing section is a single-layer routing section; the first routing section is a double-layer routing section.

[0027] In one possible implementation, the plurality of first touch traces further include: a plurality of second sub-touch traces located on the side of the first sub-touch traces away from the second spacer;

[0028] The second sub-touch trace adjacent to the first sub-touch trace includes: a third trace portion extending along the first direction and arranged alternately, and a fourth trace portion; the orthographic projection of the third trace portion on the substrate does not overlap with the orthographic projection of the first sub-touch trace portion on the substrate; the orthographic projection of the fourth trace portion on the substrate overlaps with the orthographic projection of the second trace portion on the substrate.

[0029] The third routing section is a double-layer routing section; the fourth routing section is a single-layer routing section, and the fourth routing section and the second routing section are located on different layers.

[0030] In one possible implementation, the plurality of first touch traces further include: a plurality of second sub-touch traces;

[0031] Both the first sub-touch trace and the second sub-touch trace are single-layer traces, and the first sub-touch trace and the second sub-touch trace are traces on different metal layers.

[0032] In one possible implementation, the orthographic projection of the second trace on the substrate overlaps with the orthographic projection of the adjacent second sub-touch trace on the substrate.

[0033] In one possible implementation, the first trace portion has a first spacing with the adjacent second sub-touch trace; the maximum spacing between the second trace portion and the first trace portion in the direction perpendicular to the first spacing is approximately equal to the first spacing.

[0034] In one possible implementation, the orthographic projection shape of the first spacer and / or the second spacer on the substrate includes an annular shape.

[0035] In one possible implementation, the orthographic projection of the second spacer onto the substrate overlaps with the orthographic projection of the two adjacent first touch traces onto the substrate, and also overlaps with the orthographic projection of the gap between the two adjacent first touch traces onto the substrate.

[0036] In one possible implementation, the second spacer is located at the center of the orthographic projection of the substrate, and the gap between two adjacent first touch traces is located within the orthographic projection of the substrate.

[0037] In one possible implementation, the second spacer satisfies the following relationship:

[0038] a1 = 2a2 + a3; where a1 represents the inner diameter of the annular second spacer, a2 represents the line width of the first touch trace, and a3 represents the spacing between adjacent first touch traces.

[0039] In one possible implementation, the plurality of first touch traces include: a third sub-touch trace, and a plurality of fourth sub-touch traces;

[0040] The orthographic projection of the second spacer on the substrate overlaps with the orthographic projection of the third sub-touch trace on the substrate, but does not overlap with the orthographic projection of the fourth sub-touch trace on the substrate.

[0041] The line width of the third sub-touch trace is greater than the line width of the fourth sub-touch trace.

[0042] In one possible implementation, the second spacer is partially located within the orthographic projection of the third sub-touch trace onto the substrate, and partially located within the orthographic projection of the gap between the third sub-touch trace and the adjacent fourth sub-touch trace onto the substrate.

[0043] In one possible implementation, the second spacer has a first outer edge extending along the first direction and a second outer edge; the third sub-touch trace has a third outer edge extending along the first direction and a fourth outer edge.

[0044] The extension lines of the first outer edges of the plurality of second spacers coincide with each other and with the third outer edge; the extension lines of the second outer edges of the plurality of second spacers coincide with each other, and the orthographic projection of the second outer edge on the substrate is located on the side of the fourth outer edge away from the third outer edge.

[0045] In one possible implementation, the linewidth of the third sub-touch trace is 2 to 4 times that of the linewidth of the fourth sub-touch trace.

[0046] This disclosure also provides a display device, which includes the touch display panel as described in this disclosure. Attached Figure Description

[0047] Figure 1 is a cross-sectional schematic diagram of the touch display panel in the display area provided in an embodiment of this disclosure;

[0048] Figure 2 is a schematic diagram of the touch electrodes of the display area provided in an embodiment of this disclosure;

[0049] Figure 3 is a schematic diagram of a touch display panel provided in an embodiment of this disclosure;

[0050] Figure 4A can be one of the enlarged schematic diagrams of a portion of the film layer at the lower left corner of Figure 3;

[0051] Figure 4B can be a second enlarged schematic diagram of a portion of the film layer at the lower left corner of Figure 3;

[0052] Figure 4C can be seen as the third enlarged schematic diagram of a portion of the film layer at the lower left corner of Figure 3;

[0053] Figure 4D can be one of the enlarged schematic diagrams of a portion of the film layer at the lower right corner of Figure 3;

[0054] Figure 4E can be seen as a second enlarged schematic diagram of a portion of the film layer at the lower right corner of Figure 3;

[0055] Figure 4F can be a magnified schematic diagram of part of the film layer at the left border of Figure 3;

[0056] Figure 4G can be seen as an enlarged schematic diagram of a portion of the film layer at the right border of Figure 3.

[0057] Figure 5 is a schematic diagram of the connection between the first power line and the cathode provided in an embodiment of this disclosure;

[0058] Figure 6 is one of the schematic diagrams showing the positions of the first touch line and the second spacer in the first peripheral area provided in the embodiments of this disclosure;

[0059] Figure 7A is a second schematic diagram showing the position of the first touch line and the second spacer in the first peripheral area provided in an embodiment of this disclosure;

[0060] Figure 7B can be a cross-sectional view of Figure 7A at the dashed line A1;

[0061] Figure 7C can be a cross-sectional view of Figure 7A at the dashed line A2;

[0062] Figure 8A is a third schematic diagram showing the position of the first touch line and the second spacer in the first peripheral area provided in the embodiments of this disclosure;

[0063] Figure 8B can be a cross-sectional view of Figure 8A at the dashed line A3;

[0064] Figure 8C can be a cross-sectional view of Figure 8A at the dashed line A4;

[0065] Figure 9 is a fourth schematic diagram showing the position of the first touch line and the second spacer in the first peripheral area provided in the embodiments of this disclosure;

[0066] Figure 10 is the fifth of the schematic diagrams showing the positions of the first touch trace and the second spacer in the first peripheral area provided in the embodiments of this disclosure. Detailed Implementation

[0067] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Furthermore, the embodiments and features in the embodiments of this disclosure can be combined with each other without conflict. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0068] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0069] It should be noted that the dimensions and shapes of the figures in the accompanying drawings do not reflect actual proportions and are intended only to illustrate the content of this disclosure. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

[0070] This disclosure provides a touch display panel using the FMLOC process, where the touch layer is directly fabricated on top of the stacked light-emitting structure layer and encapsulation layer. This reduces the thickness of the touch display panel, facilitating the thinning and lightening of touch display products. As shown in Figure 1, the touch display panel includes: a driving circuit layer 7 located on one side of a substrate 1; a light-emitting device 9 located on the side of the driving circuit layer 7 facing away from the substrate 1; an encapsulation layer 10 located on the side of the light-emitting device 9 facing away from the substrate 1; and a touch layer 6 located on the side of the encapsulation layer 10 facing away from the substrate 1.

[0071] In some embodiments, as shown in FIG1, the encapsulation layer 10 includes a first inorganic encapsulation layer 1001, an organic encapsulation layer 1002, and a second inorganic encapsulation layer 1003 stacked together. The barrier in the peripheral area is used to prevent the organic encapsulation material from overflowing.

[0072] In practice, the touch layer includes multiple touch electrodes and multiple touch traces.

[0073] In some embodiments, as shown in FIG1, the touch layer 6 specifically includes: a second buffer layer 601 located on the side of the encapsulation layer 10 away from the substrate 1, a first touch conductive layer 602 located on the side of the second buffer layer 601 away from the substrate 1, a touch insulating layer 603 located on the side of the first touch conductive layer 602 away from the substrate 1, a second touch conductive layer 604 located on the side of the touch insulating layer 603 away from the substrate 1, and a protective layer 605 located on the side of the second touch conductive layer 604 away from the substrate 1.

[0074] In some embodiments, the first touch conductive layer 602 and the second touch conductive layer 604 include a metal mesh structure composed of interwoven metal wires.

[0075] In specific implementations, the metal mesh structure is formed by interlacing multiple metal wires, resulting in a metal mesh structure comprising multiple meshes. Each mesh is a polygon composed of multiple metal wires, or in other words, the metal mesh is formed by repeating and continuously splicing meshes. The shape of the mesh formed by the metal wires can be rhomboid. Alternatively, the shape of the mesh formed by the metal wires can be triangular, rectangular, hexagonal, etc., or a combination of multiple shapes, such as a combination of pentagons and hexagons. The shape of the mesh formed by the metal wires can include any one or more of triangles, squares, rectangles, rhombuses, trapezoids, pentagons, and hexagons. In specific implementations, the mesh pattern formed by the metal wires can be a regular shape or an irregular shape, and the edges of the mesh can be straight lines or curves; this disclosure does not limit the specific shapes. The edges of the metal mesh structure may also include incomplete mesh patterns.

[0076] In practical implementation, multiple cuts can be set on the grid. For parts that are located in the same layer of the touch conductive layer and need to be insulated from each other, such as when the grid of the first touch electrode and the grid of the second touch electrode are located in the same layer, cuts can be set on the grid pattern set on the whole surface to achieve isolation between the grid of the first touch electrode and the grid of the second touch electrode.

[0077] The touch electrodes provided in this embodiment include a metal mesh structure. The first and second touch electrodes in the form of a metal mesh structure have advantages such as low resistance, small thickness, and fast response speed. This can improve the sensitivity and accuracy of touch recognition.

[0078] In practice, the meshes in the first and second touch conductive layers have the same shape, size, and line width of metal lines, and the meshes in the first, second, and third touch conductive layers have roughly overlapping areas in their orthogonal projection onto the substrate.

[0079] In some embodiments, in the display area 101, the multilayer touch conductive layer includes a plurality of touch electrodes, as shown in FIG2, the plurality of touch electrodes include a plurality of first touch electrodes 11 and a plurality of second touch electrodes 12.

[0080] Multiple first touch electrodes 11 are arranged along a first direction X and extend along a second direction Y. Each first touch electrode 11 includes multiple first sub-electrodes 1101 arranged along the second direction Y, and a bridging electrode 1102 electrically connecting two adjacent first sub-electrodes 1101.

[0081] Multiple second touch electrodes 12 extend along a first direction X and are arranged along a second direction Y; the second touch electrodes 12 include multiple second sub-electrodes 1201 arranged along the first direction X.

[0082] In some embodiments, as shown in FIG2, the first sub-electrode 1101 and the second sub-electrode 1201 are located in the second touch conductive layer 604, and the bridging electrode 1102 is located in the first touch conductive layer 602; in a specific implementation, the bridging electrode 1102 is electrically connected to the first sub-electrode 1101 through a through-hole penetrating the touch insulating layer.

[0083] In some embodiments, the touch traces are located in the first touch conductive layer 602 or the second touch conductive layer 604.

[0084] Alternatively, in some embodiments, the touch trace includes a first sub-trace located on the first touch conductive layer 602 and a second sub-trace located on the second touch conductive layer 604; the second sub-trace is electrically connected to the first sub-trace through a via penetrating the touch insulating layer. That is, the touch trace is a double-layer wiring, and the impedance of the touch trace can be reduced by connecting the first and second sub-traces in parallel.

[0085] In some embodiments, as shown in FIG3, the touch display panel includes: a display area AA and a peripheral area BB. The peripheral area BB includes a first peripheral area BB1 and a second peripheral area BB2 other than the first peripheral area BB1. The first peripheral area BB1 also includes a plurality of bonding terminals 14. The plurality of bonding terminals 14 are used to bond with a driver chip IC.

[0086] One end of the touch trace (shown as gray area 30 in Figure 3 due to the denser touch traces in the peripheral area BB) is electrically connected to the bonding terminal, and the other end of the touch trace 3 is electrically connected to the touch electrode (not shown). Optionally, the touch trace 3 may include a first touch trace 31 located in the first peripheral area BB1, and may also include other touch traces located in the second peripheral area BB2.

[0087] In some embodiments, as shown in FIG1, the light-emitting device 9 includes an anode 901, a light-emitting layer 902, and a cathode 903 stacked together.

[0088] In a specific implementation, if the light-emitting device is an organic light-emitting diode, the light-emitting layer 902 includes at least an organic light-emitting layer, and may also include a light-emitting functional layer, which includes at least one of the following: an electron injection layer, a hole blocking layer, an electron transport layer, a hole transport layer, an electron blocking layer, and a hole injection layer.

[0089] In some embodiments, as shown in FIG1, the driving circuit layer 7 includes a pixel driving circuit that corresponds one-to-one with the light-emitting device 9 and drives the light-emitting device 9 to emit light; the pixel driving circuit includes, for example, a thin-film transistor (TFT) and a capacitor (not shown). The light-emitting device 9 may be, for example, an organic light-emitting diode (OLED) or a quantum dot OLED.

[0090] It should be noted that Figure 1 uses a thin-film transistor (TFT) with a top-gate structure as an example, where the gate G is located on the side of the active layer 701 facing away from the substrate 1. The multilayer insulating layer 4 includes: a first buffer layer 401 between the substrate 1 and the active layer 701; a first gate insulating layer 402 between the gate G and the active layer 701; an interlayer insulating layer 403 between the gate G and the source S and drain D; a passivation layer 407 between the interlayer insulating layer 403 and the source S and drain D; and a passivation layer 407 between the source S and drain D. The first planarization layer 404 between the drain D and the anode 901, and the pixel definition layer 408 located on the side of the anode 901 away from the substrate 1; the pixel definition layer 408 includes a plurality of opening regions 4081, the pixel definition layer 408 covers the edge of the anode 901, the orthographic projection of the opening region 4081 on the substrate 1 falls into the orthographic projection of the anode 901 on the substrate 1, the light-emitting functional layer is located on the side of the anode 901 and the pixel definition layer 408 away from the substrate 1, and the cathode 903 is located on the side of the light-emitting functional layer away from the substrate 1.

[0091] In some embodiments, the anode 901 is connected to the drain D through a via penetrating the first planarization layer 404.

[0092] Alternatively, to avoid the risk of a short circuit between the anode 901 and the drain D, in some embodiments, as shown in FIG1, the touch display panel further includes a first transition electrode 702 located between the first planarization layer 404 and the anode 901, and a second transition electrode 703 located between the first transition electrode 702 and the anode 901.

[0093] The multilayer insulating layer 4 includes: a second planarization layer 405 located between the second transition electrode 703 and the first transition electrode 702, and a third planarization layer 406 located between the second transition electrode 703 and the anode 901. The anode 901 is connected to the second transition electrode 703 through a via penetrating the third planarization layer 406, the second transition electrode 703 is electrically connected to the first transition electrode 702 through a via penetrating the second planarization layer 405, and the first transition electrode 702 is connected to the drain electrode D through a via penetrating the first planarization layer 404.

[0094] In some embodiments, the multilayer insulating layer 4 further includes a spacer layer located on the side of the pixel definition layer 408 opposite to the substrate 1.

[0095] In OLED display technologies, vapor deposition plays a crucial role. However, static electricity is easily generated when the mask comes into contact with / separates from the panel during the vapor deposition process. Adding spacers can mitigate this static electricity. However, the mask risks scratching the spacers, leading to particulate matter. As bezels become narrower, the distance between the display area and the Dam (dam) gradually decreases. The thickness of the organic encapsulation layer (IJP) near the AA (anti-aliasing) area boundary decreases, making it unable to cover the particulate matter generated when the mask scratches the spacers. This causes the touch traces on the encapsulation layer to be overexposed due to the raised terrain in the areas where the particulate matter is located, resulting in touch trace open issues.

[0096] In view of the above, this disclosure provides a touch display panel, as shown in Figures 3 and 4A-4G. Figure 4A can be one of the enlarged schematic diagrams of a portion of the film layer at the lower left corner of Figure 3; Figure 4B can be another enlarged schematic diagram of a portion of the film layer at the lower left corner of Figure 3; Figure 4C can be a third enlarged schematic diagram of a portion of the film layer at the lower left corner of Figure 3; Figure 4D can be one of the enlarged schematic diagrams of a portion of the film layer at the lower right corner of Figure 3; Figure 4E can be another enlarged schematic diagram of a portion of the film layer at the lower right corner of Figure 3; Figure 4F can be an enlarged schematic diagram of a portion of the film layer at the left side border of Figure 3; and Figure 4G can be an enlarged schematic diagram of a portion of the film layer at the right side border of Figure 3. The display panel has a display area AA and a peripheral area BB located around the display area AA. The peripheral area BB includes: a first peripheral area BB1 having multiple bonding terminals 14, and a second peripheral area BB2 other than the first peripheral area BB1. The touch display panel includes:

[0097] Substrate 1;

[0098] A light-emitting functional layer is located on one side of substrate 1;

[0099] Multiple bonding terminals 14 are located in the first peripheral area BB1;

[0100] Multiple first spacers PS1 are located in the second peripheral region BB2. The orthographic projection of the multiple first spacers PS1 on the substrate 1 surrounds the edge f of the light-emitting functional layer and has a gap region H between it and the edge f of the light-emitting functional layer. That is, in Figure 4B or Figure 4E, the area between the edge f and the solid line g. No first spacers PS1 are placed in this gap region H.

[0101] In this embodiment, the plurality of first spacers PS1 disposed in the area outside the edge f of the light-emitting functional layer can improve the static electricity generated by the mask used in the fabrication of the light-emitting functional layer during contact or separation from the display panel, thus protecting the display panel. Moreover, the orthogonal projection of the plurality of first spacers PS1 onto the substrate 1 has a gap region H between it and the edge f of the light-emitting functional layer. That is, by moving the plurality of first spacers PS1 to the area outside the solid line g, a gap region H is formed between the plurality of first spacers PS and the edge f of the light-emitting functional layer. Thus, during the fabrication of the display panel, the mask used in the fabrication of the light-emitting functional layer has a certain amount of room for movement between it and the first spacers PS1 during contact or separation from the display panel, reducing the probability of the mask used in the fabrication of the light-emitting functional layer scratching the first spacers PS1, thereby reducing the probability of subsequent touch traces being broken due to particles generated by scratching the first spacers PS1.

[0102] In one possible implementation, the light-emitting functional layer E can be an electron transport layer, and the edge f of the light-emitting functional layer can be the outer edge of the electron transport layer, which is also the outer edge of the mask used to fabricate the electron transport layer. Optionally, the mask used for the electron transport layer can be an open mask.

[0103] In one possible implementation, as shown in Figures 4A-4G and 5, the touch display panel includes: a first power line VSS; the first power line VSS includes: a first conductive structure VSS1 located in the peripheral area BB and of the same layer and material as the anode 901; the first conductive structure VSS has a first boundary w1 facing the display area AA; a plurality of first spacers PS1 are projected onto the substrate 1, located on the side of the first boundary w1 projected onto the substrate 1 facing the display area AA, and are distributed sequentially along the extension direction of the first boundary w1.

[0104] In this embodiment of the present disclosure, the orthographic projection of a plurality of first spacers PS1 onto the substrate 1 is located on the side of the first boundary w1 onto the substrate 1 facing the display area AA, and is distributed sequentially along the extension direction of the first boundary w1, which can prevent electrostatic discharge from damaging the first power line VSS.

[0105] In one possible implementation, as shown in Figures 4B, 4C, and 4E, at least one of the plurality of first spacers PS1 has a portion of its orthographic projection onto the substrate 1 that overlaps with the orthographic projection of the first boundary w1 onto the substrate 1.

[0106] In one possible implementation, as shown in Figures 4B, 4C, and 4E, the orthographic projection of the outer edge of the first spacer PS1 onto the substrate 1 can coincide with the orthographic projection of the first outer boundary w1 onto the substrate 1.

[0107] In one possible implementation, as shown in Figure 5, the first power line VSS further includes a second conductive structure VSS2 located in the peripheral area BB; the first conductive structure VSS1, the second conductive structure VSS2, and the cathode 903 are all located in different layers, and the second conductive structure VSS2 is electrically connected to the cathode 903 through the first conductive structure VSS1.

[0108] In one possible implementation, referring to Figure 5, the first conductive structure VSS1 can be a ring-shaped structure surrounding the display area AA; the second conductive structure VSS2 can be a frame-shaped structure with an opening in the first peripheral area BB1 of the display panel; the cathode 903 can be a planar structure; the orthographic projection of the second conductive structure VSS2 on the substrate 1 can overlap with the orthographic projection of the first conductive structure VSS1 on the substrate 1, and the two can be connected by drilling at the overlapping position; the orthographic projection of the first conductive structure VSS1 on the substrate 1 can overlap with the orthographic projection of the cathode 903 on the substrate 1, and the two can be electrically connected by drilling at the overlapping position, thereby realizing the electrical connection of the second conductive structure VSS2 and the cathode 903 through the first conductive structure VSS1.

[0109] In one possible implementation, as shown in FIG4C, the first conductive structure VSS1 may have multiple vias K1.

[0110] In another possible implementation, the first conductive structure VSS1 and the second conductive structure VSS2 can also be other shapes. For example, the first conductive structure VSS1 can be a frame-like structure with openings in some positions; the second conductive structure VSS2 is a ring-like structure surrounding the display area AA.

[0111] In one possible implementation, the second conductive structure VSS2 can be in the same layer and material as the source S or the drain D.

[0112] In one possible implementation, the display area AA has multiple pixels; referring to Figure 4C, along the direction extending from the first boundary w1, the spacing d1 between two adjacent first spacers PS1 is 1.5 to 3 times the pixel size. This avoids the increased risk of particulate matter generation due to overly dense arrangement of the first spacers PS1, and also avoids the problem of electrostatic discharge occurring when the first spacers PS1 are too sparsely spaced.

[0113] In one possible implementation, the spacing d1 between two adjacent first spacers PS1 can be 1.5 times, 2 times, 2.5 times, or 3 times the pixel size.

[0114] In one possible implementation, a pixel may include multiple sub-pixels, for example, it may include three sub-pixels: red, green, and blue; the pixel size may be the maximum length in the pixel row direction of the outer contour formed by the three sub-pixels. Optionally, it may be the maximum length in the pixel row direction of the outer contour formed by the three opening regions corresponding to the three sub-pixels in the pixel definition layer 408.

[0115] In one possible implementation, for example, if the pixel size is 62.8 μm, then the distance d1 between two adjacent first spacers PS1 is twice the pixel size, that is, d1 = 2 * 62.8 = 135.6 μm.

[0116] In one possible implementation, as shown in Figures 4B, 4C, and 4E, the minimum width e1 of the gap area H is greater than or equal to 50 μm in the direction from the peripheral area BB to the display area AA.

[0117] In one possible implementation, referring to FIG3, the peripheral area BB includes: a first peripheral area BB1 having multiple bonding terminals 14, and a second peripheral area BB2 other than the first peripheral area BB1; as shown in FIG4B, FIG4C and FIG4E, the touch display panel includes: multiple first touch lines 31 located in the first peripheral area BB1; of the first peripheral area BB1 and the second peripheral area BB2, only the second peripheral area BB2 is provided with a first spacer PS1.

[0118] Due to the current demand for narrow bezels in the first peripheral area BB1 of the display panel, i.e. the bottom bezel area, this area is becoming increasingly narrow. This area usually needs to accommodate a large number of first touch traces 31, resulting in denser and narrower first touch traces 31. In this embodiment, only the second peripheral area BB2 is provided with the first spacer PS1, i.e., the first peripheral area BB1 is no longer provided with the first spacer PS1. This can reduce the probability of the first touch traces 31 breaking due to particles generated by the first spacer PS1.

[0119] In one possible implementation, the first touch trace 31 may include a first touch lead electrically connected to the first touch electrode 11, and / or a second touch lead electrically connected to the second touch electrode 12.

[0120] In one possible implementation, the linewidth of the first touch trace 31 in the first peripheral area BB1 is greater than zero and less than or equal to 15 μm. That is, since the linewidth of the first touch trace 31 in this area is relatively narrow, by removing the spacer in this area, the probability of the first touch trace 31 breaking due to particulate matter generated by the first spacer PS1 can be reduced.

[0121] In some other possible implementations, as shown in Figures 6, 7A-7C, 8A-8C, 9, and 10, the touch display panel includes: multiple first touch traces 31 located in the first peripheral area BB1; the touch display panel also includes: multiple second spacers PS2 located in the first peripheral area BB1. In this embodiment, spacers can also be provided in the first peripheral area BB1. When spacers are provided in the first peripheral area BB1, the shape and position of the first touch traces 31 and / or the second spacers PS2 can be improved by designing them, so that when the second spacers PS2 are provided in the first peripheral area BB1, the probability of the first touch traces 31 being broken due to particles generated by scratches on the second spacers PS2 in that area can also be reduced.

[0122] In some possible implementations, as shown in Figures 6, 7A-7C, and 8A-8C, the orthographic projection of the second spacer PS2 onto the substrate 1 does not overlap with the orthographic projection of the first touch trace 31 onto the substrate 1. In this embodiment, the relative positional relationship between the second spacer PS2 and the first touch trace 31 can be adjusted so that their orthographic projections do not overlap, thereby reducing the probability of particulate matter generated by scratches on the second spacer PS2 causing breakage defects in the first touch trace 31.

[0123] In some possible implementations, as shown in Figures 6, 7A-7C, and 8A-8C, the orthographic projection of a plurality of second spacers PS2 onto the substrate 1 is located at the gap between the orthographic projections of two adjacent first touch traces 31 onto the substrate 1.

[0124] In one possible implementation, referring to FIG6, multiple first touch lines 31 extend along a first direction X, and second spacers PS2 are sequentially distributed along the first direction X. The spacing a4 between two adjacent first touch lines 31 located on both sides of the second spacers PS2 is greater than the spacing a5 between the remaining two adjacent first touch lines 31. For example, as shown in FIG6, the second spacers PS are located between the first first touch line 31 and the second first touch line 31 in the bottom-to-top direction. The spacing a4 between the first first touch line 31 and the second first touch line 31 is greater than the spacing a5 between the second first touch line 31 and the third first touch line 31 in the bottom-to-top direction.

[0125] In this embodiment of the disclosure, by increasing the spacing between two adjacent first touch lines 31 at the location where the second spacer PS2 is set, the overlap of the projections of the second spacer PS2 and the first touch lines 31 is avoided, thereby reducing the probability of the first touch lines 31 being damaged by particles generated by scratches on the second spacer PS2.

[0126] In one possible implementation, as shown in Figure 6, multiple second spacers PS2 can be arranged in a row. Compared to the same number of second spacers PS2 arranged in multiple rows and columns, placing multiple second spacers PS2 in the same row can reduce the space occupied by the second spacers PS2. Furthermore, when it is necessary to ensure that the projections of the second spacers PS2 and the first touch traces 31 do not overlap, distributing multiple second spacers PS2 in the same row can also reduce the space occupied by multiple first touch traces 31 in the first peripheral area BB1, which is beneficial for narrowing the bezel of the display panel.

[0127] In another possible implementation, multiple second spacers PS2 may also be arranged in multiple rows between multiple sets of adjacent first touch lines 31.

[0128] In one possible implementation, referring to FIG6, the distance a6 between the orthographic projection of the second spacer PS2 on the substrate 1 and the orthographic projection of the adjacent first touch trace 31 on the substrate 1 is greater than or equal to one-quarter of the linewidth a2 of the first touch trace 31.

[0129] In one possible implementation, referring to Figure 6, the line width a2 of the first touch trace 31 can range from 3.2μm to 5.1μm; in another possible implementation, the line width a2 of the first touch trace 31 can range from 3.2μm, 3.4μm, 3.5μm, 3.6μm, 3.8μm, 4.0μm, 4.2μm, 4.4μm, 4.6μm, 4.8μm, 5.0μm, or 5.1μm.

[0130] In one possible implementation, the distance a6 between the orthographic projection of the second spacer PS2 on the substrate 1 and the orthographic projection of the adjacent first touch trace 31 on the substrate 1 can be greater than or equal to 1 μm; in another possible implementation, the distance a6 between the orthographic projection of the second spacer PS2 on the substrate 1 and the orthographic projection of the adjacent first touch trace 31 on the substrate 1 is 1 μm, 1.2 μm, 1.4 μm, 1.6 μm, 1.8 μm, or 2 μm.

[0131] In one possible implementation, the distance a6 between the orthographic projection of the second spacer PS2 onto the substrate 1 and the orthographic projection of the adjacent first touch trace 31 onto the substrate 1 can be greater than or equal to 1 μm and less than or equal to the linewidth a2 of the first touch trace 31.

[0132] In another possible embodiment, when the line width of the first touch trace 31 is relatively wide, for example, when the line width of the first touch trace 31 is greater than 5.1 μm and less than 10 μm, the first touch trace 31 can overlap with the orthographic projection portion of the second spacer PS, but the width of the overlapping area in the direction perpendicular to the first direction X is less than 1 μm.

[0133] In one possible implementation, referring to Figures 7A-7C and 8A-8C, where Figure 7B can be a cross-sectional view of Figure 7A at dashed line A1, Figure 7C can be a cross-sectional view of Figure 7A at dashed line A2, Figure 8B can be a cross-sectional view of Figure 8A at dashed line A3, and Figure 8C can be a cross-sectional view of Figure 8A at dashed line A4, the plurality of first touch traces 31 include: at least two first sub-touch traces 311 and a plurality of second sub-touch traces 312; the orthographic projection of a plurality of second spacers PS2 on the substrate 1 is located at the gap between the orthographic projections of two adjacent first sub-touch traces 311 on the substrate 1; the first sub-touch trace 311 includes: a first trace portion 311a extending along a first direction X, and a second trace portion 311b connected to the first trace portion 311a and protruding away from the second spacers PS2.

[0134] In this embodiment, the first sub-touch trace 311 includes a first trace portion 311a and a second trace portion 311b. That is, the first touch trace 31 adjacent to the second spacer PS2 is bent and avoided at the position of the second spacer PS2, so that the first sub-touch trace 311 has a serpentine trace design, thereby avoiding the overlap between the second spacer PS2 and the first touch trace 31, and reducing the probability of the first touch trace 31 being damaged by particles generated by scratches on the second spacer PS2.

[0135] In one possible implementation, as shown in Figures 7A-7C and 8A-8C, the orthographic projection of the second trace portion 311b onto the substrate 1 overlaps with the portion of the orthographic projection of the adjacent second sub-touch trace 312 onto the substrate 1.

[0136] In one possible implementation, as shown in Figures 7A-7C and 8A-8C, the first trace portion 311a has a first spacing b1 with the adjacent second sub-touch trace 312; the maximum spacing b2 between the second trace portion 311b and the first trace portion 311a in the direction perpendicular to the first direction X is approximately equal to the first spacing b1.

[0137] In one possible implementation, as shown in Figures 7A-7C, the second trace portion 311b is a single-layer trace; the first trace portions 311a are all double-layer traces. In this embodiment of the present disclosure, the second trace portion 311b is a single-layer trace, which can avoid electrical connection when the second trace portion 311b overlaps with the adjacent second sub-touch trace 312; the first trace portions 311a are all double-layer traces, which can reduce the problem of decreased touch sensitivity or touch accuracy when the resistance of the first sub-touch trace 311 is larger than that of other first touch traces 31 due to winding.

[0138] In one possible implementation, as shown in Figures 7A-7C, the first sub-touch trace 311 can be electrically connected to the double-layer trace by punching a hole at the first trace portion 311a.

[0139] In one possible implementation, as shown in Figures 7A-7C, the second sub-touch trace 312 adjacent to the first sub-touch trace 311 may also be a single-layer trace in some locations. For example, the second sub-touch trace 312 adjacent to the first sub-touch trace 311 may be a single-layer trace at the location where it overlaps with the second trace portion 311b, in order to avoid electrical connection when the second trace portion 311b overlaps with the adjacent second sub-touch trace 312. Furthermore, the second trace portion 311b and the adjacent second sub-touch trace 312 may use different trace layers at the overlap location to avoid electrical connection.

[0140] In one possible implementation, referring to Figures 7A-7C, the plurality of first touch traces 31 further include: a plurality of second sub-touch traces 312 located on the side of the first sub-touch traces 311 away from the second spacer PS2; the second sub-touch traces 312 adjacent to the first sub-touch traces 311 include: a third trace portion 312a extending along the first direction X and arranged alternately, and a fourth trace portion 312b; the orthographic projection of the third trace portion 312a on the substrate 1 does not overlap with the orthographic projection of the first sub-touch trace portion 311a on the substrate 1; the orthographic projection of the fourth trace portion 312b on the substrate 1 overlaps with the orthographic projection of the second trace portion 311b on the substrate 1; the third trace portion 312a is a double-layer trace; the fourth trace portion 312b is a single-layer trace, and the fourth trace portion 312b and the second trace portion 311b are located on different layers respectively.

[0141] In one possible implementation, as shown in Figures 7A-7C, double-layer routing can be used for the remaining second sub-touch lines 312 that are not adjacent to the first sub-touch line 311.

[0142] In one possible implementation, as shown in Figures 7A-7C, the spacing between the first sub-touch portion 311a of two adjacent first sub-touch traces 311 can be equal to the spacing between the first sub-touch portion 311a and the adjacent second sub-touch trace 312.

[0143] In one possible implementation, as shown in Figures 7A-7C, the linewidth of the first sub-touch trace 311 and / or the second sub-touch trace 312 can be greater than 10 μm.

[0144] In one possible implementation, as shown in Figures 8A-8C, both the first sub-touch trace 311 and the second sub-touch trace 312 are single-layer traces, and the first sub-touch trace 311 and the second sub-touch trace 312 are traces on different metal layers. For example, the first sub-touch trace 311 is made using a first touch conductive layer 602, and the second sub-touch trace 312 is made using a second touch conductive layer 604; or, for another example, the first sub-touch trace 311 is made using a second touch conductive layer 604, and the second sub-touch trace 312 is made using a first touch conductive layer 602.

[0145] In one possible implementation, as shown in Figures 8A-8C, the linewidth of the first sub-touch trace 311 and / or the second sub-touch trace 312 can be less than 10 μm. That is, for locations where the linewidth of the first touch trace 31 is relatively narrow, the first sub-touch trace 311 and the second sub-touch trace 312 can be traced in a single layer.

[0146] In one possible implementation, referring to FIG9, the orthogonal projection of the second spacer PS2 onto the substrate 1 includes a ring shape. In this embodiment of the present disclosure, the second spacer PS2 is set to a ring shape, which ensures that the second spacer PS2 can support the mask plate while reducing the overlap area with the mask plate, thereby reducing the risk of the second spacer PS2 being scratched, and thus reducing the risk of the first touch trace 31 being broken due to particles generated by the scratching of the second spacer PS2.

[0147] In one possible implementation, the orthographic projection shape of the first spacer PS1 onto the substrate 1 may also include an annular shape.

[0148] In one possible implementation, referring to Figure 9, the orthographic projection of the second spacer PS2 onto the substrate 1 overlaps with the orthographic projections of the two adjacent first touch traces 31 onto the substrate 1, and also overlaps with the orthographic projection of the gap between the two adjacent first touch traces 31 onto the substrate 1. This significantly reduces the overlap area between the second spacer PS2 and the first touch traces 31, thereby reducing the risk of breakage of the first touch traces 31 due to particles generated from scratches on the second spacer PS2.

[0149] In one possible implementation, as shown in FIG9, the second spacer PS2 is located at the center O of the orthographic projection of the substrate 1, and the gap between the two adjacent first touch traces 31 is within the orthographic projection of the substrate 1.

[0150] In one possible implementation, as shown in Figure 9, the second spacer PS2 satisfies the following relationship:

[0151] a1 = 2a2 + a3; where a1 represents the inner diameter of the annular second spacer PS2, a2 ​​represents the line width of the first touch trace 31, and a3 represents the spacing between adjacent first touch traces 31.

[0152] In one possible implementation, as shown in Figure 9, for example, a2 = 3.2 μm, a3 = 4 μm, then a1 = 2 * 3.2 + 4 = 10.4 μm.

[0153] In one possible implementation, referring to Figure 9, the difference between the inner and outer radii of the annular second septum PS2 can range from 0.5 μm to 2 μm. In another possible implementation, the difference between the inner and outer radii of the annular second septum PS2 can be 0.5 μm, 0.6 μm, 0.8 μm, 1.0 μm, 1.2 μm, 1.4 μm, 1.6 μm, 1.8 μm, or 2 μm.

[0154] In one possible implementation, referring to FIG10, the plurality of first touch traces 31 include: a third sub-touch trace 313 and a plurality of fourth sub-touch traces 314; the orthographic projection of the second spacer PS2 on the substrate 1 overlaps with the orthographic projection of the third sub-touch trace 313 on the substrate 1, but does not overlap with the orthographic projection of the fourth sub-touch trace 314 on the substrate 1; the linewidth a7 of the third sub-touch trace 313 is greater than the linewidth a8 of the fourth sub-touch trace 314.

[0155] In this embodiment of the disclosure, the first touch trace 31 may also overlap with the second spacer PS2. That is, the second spacer PS2 is placed at the location of the first touch trace 31. In this case, the third sub-touch trace 313 overlapping with the second spacer PS2 can be widened. Thus, even if the second spacer PS2 is scratched and produces particles, the probability of the particles causing the line breakage is relatively small because the third sub-touch trace 313 at the location of the second spacer PS2 is wider.

[0156] In one possible implementation, referring to FIG10, the second spacer PS2 is partially located within the orthographic projection of the third sub-touch trace 313 on the substrate 1, and partially located within the gap between the third sub-touch trace 313 and the adjacent fourth sub-touch trace 314 on the substrate 1.

[0157] In one possible implementation, as shown in FIG10, the orthographic projection of the third sub-touch trace 313 onto the substrate 1 can cover more than half of the area of ​​the second spacer PS2; in another possible implementation, the orthographic projection of the third sub-touch trace 313 onto the substrate 1 can cover six-tenths, seven-tenths, eight-tenths, or nine-tenths of the area of ​​the second spacer PS2.

[0158] In one possible implementation, referring to FIG10, the second spacer PS2 has a first outer edge v1 extending along a first direction X and a second outer edge v2; the third sub-touch trace 313 has a third outer edge v3 extending along the first direction X and a fourth outer edge v4; the extension lines of the first outer edges v1 of the plurality of second spacers PS2 coincide with each other and coincide with the third outer edge v3; the extension lines of the second outer edges v2 of the plurality of second spacers PS2 coincide with each other, and the orthographic projection of the second outer edge v2 on the substrate 1 is located on the side of the fourth outer edge v4 away from the third outer edge v3.

[0159] In one possible implementation, as shown in FIG10, the orthographic projection of the second outer edge v2 onto the substrate 1 is located in the region between the orthographic projection of the fourth outer edge v4 onto the substrate 1 and the adjacent fourth sub-touch trace 314.

[0160] In one possible implementation, as shown in Figure 10, the line width a7 of the third sub-touch trace 313 is 2 to 4 times the line width a8 of the fourth sub-touch trace 314.

[0161] In one possible implementation, referring to FIG10, the linewidth a7 of the third sub-touch trace 313 can be greater than 10 μm; for example, the linewidth a7 of the third sub-touch trace 313 can be greater than 10 μm and less than 15 μm; for example, the linewidth a7 of the third sub-touch trace 313 can be 10 μm, 11 μm, 12 μm, 13 μm, 14 μm, or 15 μm.

[0162] In one possible implementation, referring to Figure 10, the linewidth a8 of the fourth sub-touch trace 314 can range from 3μm to 10μm; for example, the linewidth a8 of the fourth sub-touch trace 314 can be 3μm, 3.2μm, 3.4μm, 3.5μm, 3.8μm, 4μm, 4.5μm, 5μm, 6μm, 7μm, 8μm, 9μm, or 10μm.

[0163] In one possible implementation, as shown in Figures 4B, 4C, and 4E, the touch display panel may further include a plurality of third spacers (PSMs). Some of the third spacers (PSMs) may be located in the display area AA, and some of the third spacers (PSMs) may be located in the second peripheral area BB2. The third spacers (PSMs) may be the main spacers and / or secondary spacers of the display panel.

[0164] In one possible implementation, the first spacer PS1 may be located on the side of the third spacer PSM away from the display area AA.

[0165] In one possible implementation, the density of the third spacer PSM can be greater than the density of the first spacer PS1.

[0166] In one possible implementation, the touch display panel may further include a barrier structure (not shown) surrounding the display area AA, in the first peripheral area BB1 region, at least a portion of the first touch trace 31 may be located on the side of the barrier structure facing the display area AA.

[0167] Based on the same inventive concept, embodiments of this disclosure also provide a display device, including a touch display panel as provided in embodiments of this disclosure.

[0168] The display device provided in this disclosure includes any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. Other essential components of this display device are understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting this disclosure. Implementation of this display device can refer to the embodiments of the display panel described above; repeated details will not be repeated.

[0169] In summary, the touch display panel and display device provided in this disclosure, with multiple first spacers PS1 disposed in the area outside the edge f of the light-emitting functional layer, can improve the static electricity generated by the mask used in fabricating the light-emitting functional layer during contact or separation from the display panel, thus protecting the display panel. Moreover, the projection of the multiple first spacers PS1 onto the substrate 1 has a gap region H between it and the edge f of the light-emitting functional layer. That is, by moving the multiple first spacers PS1 to the area outside the solid line g, a gap region H is formed between the multiple first spacers PS and the edge f of the light-emitting functional layer. Consequently, during the fabrication of the display panel, the mask used in fabricating the light-emitting functional layer has a certain amount of room to move between it and the first spacers PS1 during contact or separation from the display panel, reducing the probability of the mask used in fabricating the light-emitting functional layer scratching the first spacers PS1, and thus reducing the probability of subsequent touch traces being broken due to particles generated from scratching the first spacers PS1.

[0170] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0171] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations to the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A touch display panel having a display area and a peripheral area surrounding the display area, the peripheral area comprising: A first peripheral area located on one side of the display area, and a second peripheral area outside the first peripheral area; wherein, the touch display panel includes: Substrate; Multiple bonding terminals are located in the first peripheral area; A light-emitting functional layer is located on one side of the substrate; A plurality of first spacers are located in the second peripheral region. The orthographic projection of the plurality of first spacers on the substrate is disposed around the edge of the light-emitting functional layer and has a gap region between them and the edge of the light-emitting functional layer.

2. The touch display panel as described in claim 1, wherein, The touch display panel includes: a plurality of anodes and a first power line; the first power line includes: a first conductive structure located in the peripheral area and made of the same layer and material as the anodes; the first conductive structure has a first boundary facing the display area. The plurality of first spacers are projected onto the substrate, located on the side of the first boundary projected onto the substrate toward the display area, and are distributed sequentially along the extension direction of the first boundary.

3. The touch display panel as described in claim 2, wherein, The display panel includes a cathode; the first power line further includes a second conductive structure located in the peripheral area; The first conductive structure, the second conductive structure, and the cathode are all located in different layers, and the second conductive structure is electrically connected to the cathode through the first conductive structure.

4. The touch display panel as described in claim 2 or 3, wherein, The display area has multiple pixels; along the direction of extension of the first boundary, the distance between two adjacent first spacers is 1.5 to 3 times the pixel size.

5. The touch display panel as described in any one of claims 1-4, wherein, In the direction from the peripheral area to the display area, the minimum width of the gap area is greater than or equal to 50 μm.

6. The touch display panel as described in any one of claims 1-5, wherein, The touch display panel includes: multiple first touch lines located in the first peripheral area; of the first peripheral area and the second peripheral area, only the second peripheral area is provided with the first spacer.

7. The touch display panel as claimed in claim 6, wherein, In the first peripheral area, the line width of the first touch trace is greater than zero and less than or equal to 15μm.

8. The touch display panel as described in any one of claims 1-5, wherein, The touch display panel includes: multiple first touch lines located in the first peripheral area; the touch display panel also includes: multiple second spacers located in the first peripheral area.

9. The touch display panel as claimed in claim 8, wherein, The orthographic projection of the second spacer onto the substrate does not overlap with the orthographic projection of the first touch trace onto the substrate.

10. The touch display panel as claimed in claim 9, wherein, The projection of the plurality of second spacers onto the substrate is located in the gap between the projections of two adjacent first touch traces onto the substrate.

11. The touch display panel as claimed in claim 10, wherein, The plurality of first touch lines extend along a first direction, and the second spacers are distributed sequentially along the first direction; The spacing between two adjacent first touch traces located on both sides of the second spacer is greater than the spacing between the other two adjacent first touch traces.

12. The touch display panel as claimed in claim 10 or 11, wherein, The distance between the orthographic projection of the second spacer onto the substrate and the orthographic projection of the adjacent first touch trace onto the substrate is greater than or equal to one-quarter of the linewidth of the first touch trace.

13. The touch display panel as claimed in claim 10, wherein, The plurality of first touch traces include: at least two first sub-touch traces; the plurality of second spacers are located at the gap between the orthographic projections of two adjacent first sub-touch traces on the substrate. The first sub-touch trace includes: a first trace portion extending along a first direction, and a second trace portion connected to the first trace portion and protruding toward the side away from the second spacer.

14. The touch display panel as claimed in claim 13, wherein, The second routing section is a single-layer routing section; the first routing section is a double-layer routing section.

15. The touch display panel as claimed in claim 14, wherein, The plurality of first touch lines also include: a plurality of second sub-touch lines located on the side of the first sub-touch line away from the second spacer; The second sub-touch trace adjacent to the first sub-touch trace includes: a third trace portion extending along the first direction and arranged alternately, and a fourth trace portion; the orthographic projection of the third trace portion on the substrate does not overlap with the orthographic projection of the first sub-touch trace portion on the substrate; the orthographic projection of the fourth trace portion on the substrate overlaps with the orthographic projection of the second trace portion on the substrate. The third routing section is a double-layer routing section; the fourth routing section is a single-layer routing section, and the fourth routing section and the second routing section are located on different layers.

16. The touch display panel as claimed in claim 13, wherein, The multiple first touch lines also include: multiple second sub-touch lines; Both the first sub-touch trace and the second sub-touch trace are single-layer traces, and the first sub-touch trace and the second sub-touch trace are traces on different metal layers.

17. The touch display panel as claimed in any one of claims 13-16, wherein, The orthographic projection of the second trace on the substrate overlaps with the orthographic projection of the adjacent second sub-touch trace on the substrate.

18. The touch display panel as claimed in any one of claims 13-17, wherein, The first trace portion has a first spacing with the adjacent second sub-touch trace portion; the maximum spacing between the second trace portion and the first trace portion in the direction perpendicular to the first spacing is approximately equal to the first spacing.

19. The touch display panel as described in any one of claims 8-18, wherein, The orthographic shape of the first spacer and / or the second spacer on the substrate includes an annular shape.

20. The touch display panel as claimed in claim 19, wherein, The orthographic projection of the second spacer on the substrate overlaps with the orthographic projection of the two adjacent first touch traces on the substrate, and also overlaps with the orthographic projection of the gap between the two adjacent first touch traces on the substrate.

21. The touch display panel as claimed in claim 19 or 20, wherein, The second spacer is located at the center of the orthographic projection of the substrate, and the gap between two adjacent first touch traces is within the orthographic projection of the substrate.

22. The touch display panel as claimed in any one of claims 19-21, wherein, The second spacer satisfies the following relationship: a1 = 2a2 + a3; where a1 represents the inner diameter of the annular second spacer, a2 represents the line width of the first touch trace, and a3 represents the spacing between adjacent first touch traces.

23. The touch display panel as claimed in claim 8, wherein, The multiple first touch lines include: a third sub-touch line, and multiple fourth sub-touch lines; The orthographic projection of the second spacer on the substrate overlaps with the orthographic projection of the third sub-touch trace on the substrate, but does not overlap with the orthographic projection of the fourth sub-touch trace on the substrate. The line width of the third sub-touch trace is greater than the line width of the fourth sub-touch trace.

24. The touch display panel as claimed in claim 23, wherein, The second spacer is partially located within the orthographic projection of the third sub-touch trace on the substrate, and partially located within the orthographic projection of the gap between the third sub-touch trace and the adjacent fourth sub-touch trace on the substrate.

25. The touch display panel as claimed in claim 23 or 24, wherein, The second spacer has a first outer edge extending along the first direction and a second outer edge; the third sub-touch trace has a third outer edge extending along the first direction and a fourth outer edge; The extension lines of the first outer edges of the plurality of second spacers coincide with each other and with the third outer edge; the extension lines of the second outer edges of the plurality of second spacers coincide with each other, and the orthographic projection of the second outer edge on the substrate is located on the side of the fourth outer edge away from the third outer edge.

26. The touch display panel as claimed in any one of claims 23-25, wherein, The line width of the third sub-touch trace is 2 to 4 times that of the line width of the fourth sub-touch trace.

27. A display device, wherein, Including the touch display panel as described in any one of claims 1-26.

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