Display panel, display device, and preparation method for display panel

Abstract

The present application relates to a display panel, a display device, and a preparation method for a display panel. The display panel comprises: a substrate; a drive circuit layer located on the substrate; a first electrode located on the drive circuit layer; a pixel definition layer located on the side of the first electrode away from the substrate, wherein the pixel definition layer is patterned to form pixel openings and partition recesses, the pixel openings expose the first electrode, the partition recesses are located between adjacent pixel openings, and in a direction away from the substrate, the inner diameters of the partition recesses gradually decrease; and a light-emitting functional layer formed on the pixel definition layer, wherein at least part of the light-emitting functional layer is interrupted at side walls of the partition recesses. The drive circuit layer comprises reflective structures, wherein in a direction perpendicular to the substrate, the reflective structures at least partially overlap with the side walls of the partition recesses. On the basis of the above solution, the present application can prevent the light-emitting functional layers between adjacent light-emitting devices from being connected to each other and generating lateral leakage currents, thereby improving the display effect of the display panel.

Description

Display panel, display device, and method for manufacturing display panel

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411188071.9, filed on August 27, 2024, entitled “Display Panel, Display Device and Method for Manufacturing Display Panel”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of display panel technology, and more particularly to display panels, display devices, and methods for manufacturing display panels. Background Technology

[0004] OLED, or Organic Light-Emitting Diode, also known as organic electroluminescent device, refers to the phenomenon where light-emitting materials emit light through carrier injection and recombination under the drive of an electric field.

[0005] Organic Light Emitting Diode (OLED) display panels include light-emitting devices, which include an anode, an emissive layer, emissive functional layers (e.g., electron transport layer, hole transport layer, etc.), and a cathode. The emissive layers of each light-emitting device are independent of each other, but the emissive functional layers are interconnected. This interconnection of emissive functional layers can cause lateral leakage currents between the corresponding emissive functional layers of different light-emitting devices, ultimately affecting the display panel's display performance.

[0006] Summary of the Invention

[0007] To address the aforementioned technical problems, this application provides a display panel, a display device, and a method for manufacturing the display panel.

[0008] In a first aspect, this application provides a display panel, including:

[0009] Substrate;

[0010] The driving circuit layer located on the substrate;

[0011] The first electrode is located on the driving circuit layer;

[0012] A pixel definition layer is located on the side of the first electrode away from the substrate; the pixel definition layer is patterned to form pixel openings and partition grooves; the pixel openings expose the first electrode; the partition grooves are located between adjacent pixel openings; the inner diameter of the partition grooves gradually decreases along the direction away from the substrate;

[0013] A light-emitting functional layer is formed on the pixel definition layer; at least a portion of the light-emitting functional layer is broken at the sidewall of the partition groove;

[0014] The driving circuit layer includes a reflective structure; in a direction perpendicular to the substrate, the reflective structure at least partially overlaps with the sidewall of the partition groove.

[0015] Secondly, based on the same inventive concept, this application also provides a display device, including a display panel as described in any of the first aspects.

[0016] Thirdly, based on the same inventive concept, this application also provides a method for manufacturing a display panel, comprising:

[0017] A driving circuit layer is formed on a substrate, wherein the driving circuit layer includes a reflective structure;

[0018] A first electrode is formed on the driving circuit layer;

[0019] A pixel definition layer is formed on the first electrode, and the pixel definition layer is patterned by exposure, development and etching to form pixel openings and isolation grooves; wherein the pixel openings expose the first electrode; the isolation grooves are located between adjacent pixel openings; the reflective structure at least partially overlaps with the sidewalls of the isolation grooves; the inner diameter of the isolation grooves gradually decreases along the direction away from the substrate;

[0020] A light-emitting functional layer is formed on the pixel definition layer, wherein at least a portion of the light-emitting functional layer is broken at the sidewall of the partition groove.

[0021] The technical solution provided in this application has the following advantages compared with the prior art:

[0022] In the display panel provided in this application, the pixel definition layer is provided with pixel openings and partition grooves, wherein the partition grooves are located between adjacent pixel openings. The driving circuit layer includes a reflective structure, and the sidewalls of the reflective structure and the partition grooves of the pixel definition layer at least partially overlap. Therefore, when exposing the pixel definition layer, due to the reflection of light by the reflective structure, the pixel definition layer at the corresponding position of the reflective structure receives more exposure, forming an exposure enhancement region. During the development and etching process of the pixel definition layer to form the partition grooves, the etching rate of the exposure enhancement region is faster, so that the inner diameter of the partition grooves gradually decreases along the direction away from the substrate. When the light-emitting functional layer is formed by vapor deposition across the entire surface, since the inner diameter of the partition grooves gradually decreases along the direction away from the substrate, at least a portion of the light-emitting functional layer is disconnected at the sidewalls of the partition grooves. Since at least a portion of the light-emitting functional layer is disconnected at the sidewalls of the partition grooves, the problem of lateral leakage current between light-emitting devices through the light-emitting functional layer can be avoided, thereby improving the display effect of the display panel. Attached Figure Description

[0023] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0024] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 is a schematic diagram of the structure of a display panel provided in an embodiment of this application;

[0026] Figure 2 is a schematic diagram illustrating the principle of forming the partition groove according to an embodiment of this application;

[0027] Figure 3 is a schematic diagram of another display panel provided in an embodiment of this application;

[0028] Figure 4 is a schematic diagram of another display panel provided in an embodiment of this application;

[0029] Figure 5 is a structural schematic diagram of another display panel provided in an embodiment of this application;

[0030] Figure 6 is a schematic diagram of another display panel provided in an embodiment of this application;

[0031] Figure 7(a) is a schematic diagram of the structure of another display panel provided in an embodiment of this application;

[0032] Figure 7(b) is an enlarged view of one region of Figure 7(a);

[0033] Figure 8 is another enlarged view of the region in Figure 7(a);

[0034] Figure 9 is a schematic diagram of the structure of another display panel provided in an embodiment of this application;

[0035] Figure 10 is a schematic diagram of another display panel provided in an embodiment of this application;

[0036] Figure 11 is a schematic diagram of another display panel provided in an embodiment of this application;

[0037] Figure 12 is a schematic diagram of a display device provided in an embodiment of this application;

[0038] Figure 13 is a schematic flowchart of a method for manufacturing a display panel according to an embodiment of this application;

[0039] Figure 14 is a schematic diagram of the process of forming a driving circuit layer on a substrate according to an embodiment of this application;

[0040] Figures 15(a)-15(k) are schematic cross-sectional views of a display panel in a manufacturing process provided in an embodiment of this application.

[0041] Figure label:

[0042] 000, Substrate; 100, Driving circuit layer; 101, First electrode; PDL, Pixel definition layer; 102, Pixel aperture; 103, Partition groove; 200, Light-emitting functional layer; 201, Hole injection layer; 202, Hole transport layer; 203, Electron transport layer; 204, Electron injection layer; 300, Light-emitting device; 301, Light-emitting layer; 104, Reflective structure; 400, Exposure enhancement area; 1041, Reflective metal trace; 105, Second electrode; 1042, Notch; 500, Virtual trace; 600, Break. ; PVDD, Positive power signal line; AA, Display area; NA, Non-display area; CE, Middle area; ED, Edge area; 106, Data line; 107, Adapter cable; 108, Connector; PLN1, First insulating layer; PLN2, Second insulating layer; 109, First through hole; 110, Second through hole; 111, Reflective metal layer; 112, Semi-transparent and semi-reflective metal layer; POLY, Active layer; M1, First metal layer; M2, Second metal layer; M3, Third metal layer; M4, Fourth metal layer; 113, Third through hole. Detailed Implementation

[0043] To better understand the above-mentioned objectives, features, and advantages of this application, the solution of this application will be further described below. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0044] Many specific details are set forth in the following description in order to provide a full understanding of this application, but this application may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only some embodiments of this application, and not all embodiments.

[0045] Various modifications and variations can be made to this invention without departing from its spirit or scope, as will be apparent to those skilled in the art. Therefore, this invention is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this invention can be combined with each other without contradiction.

[0046] The following description, in conjunction with the accompanying drawings, provides an exemplary account of the display panel, display device, and method for manufacturing the display panel provided in the embodiments of this application.

[0047] In some existing technical solutions, Organic Light Emitting Diode (OLED) display panels include light-emitting devices, which include an anode, an emissive layer, emissive functional layers (e.g., electron transport layer, hole transport layer, etc.), and a cathode. The emissive layers of each light-emitting device are independent, but the emissive functional layers are interconnected. This interconnection of emissive functional layers can lead to lateral leakage currents between the corresponding emissive functional layers of different light-emitting devices, ultimately affecting the display panel's display performance.

[0048] Based on this, embodiments of this application propose a display panel, a display device, and a method for manufacturing the display panel. Figure 1 is a schematic diagram of the structure of a display panel provided in an embodiment of this application, including:

[0049] Substrate 000.

[0050] The driving circuit layer 100 is located on the substrate 000.

[0051] The first electrode 101 is located on the driving circuit layer 100.

[0052] A pixel definition layer (PDL) is located on the side of the first electrode 101 away from the substrate 000. The PDL is patterned to form pixel openings 102 and partition grooves 103. The pixel openings 102 expose the first electrode 101. The partition grooves 103 are located between adjacent pixel openings 102. The inner diameter of the partition grooves 103 gradually decreases along the direction away from the substrate 000.

[0053] A light-emitting functional layer 200 is formed on the pixel definition layer (PDL). At least a portion of the light-emitting functional layer 200 is broken at the sidewall of the partition groove 103.

[0054] The driving circuit layer 100 includes a reflective structure 104. In a direction perpendicular to the substrate 000, the reflective structure 104 at least partially overlaps with the sidewall of the partition groove 103.

[0055] As shown in Figure 1, for the sake of brevity in illustration and description, some film structures in the display panel are omitted in at least some of the illustrations of the embodiments of this application. The substrate 000 can be a rigid substrate such as glass, or a flexible substrate such as PI. The specific material of the substrate 000 can be selected according to actual design requirements, and this embodiment of the application does not impose specific limitations. The driving circuit layer 100 is used to provide driving signals to the first electrode 101. The various light-emitting devices 300 of the display panel can be arranged in an array. The light-emitting device 300 also includes a light-emitting layer 301, which is located within the pixel opening 102. The pixel opening 102 of the pixel definition layer PDL is used to define the light-emitting area of ​​the light-emitting device 300. The light-emitting functional layer 200 may include, for example, the hole injection layer 201, hole transport layer 202, electron transport layer 203, and electron injection layer 204 shown in Figure 1.

[0056] Figure 2 is a schematic diagram illustrating the principle of forming the partition groove according to an embodiment of this application. Referring to Figures 1 and 2, the driving circuit layer 100 (not shown in Figure 2) of this embodiment includes a reflective structure 104, which reflects the light exposing the pixel definition layer PDL. During the exposure of the pixel definition layer PDL, at the location with the reflective structure 104, the pixel definition layer PDL receives more exposure due to the reflective effect of the reflective structure 104, forming an exposure enhancement region 400. Therefore, during subsequent development and etching of the pixel definition layer PDL, the etching rate of the exposure enhancement region 400 is faster. Therefore, in this embodiment, the reflective structure 104 and the sidewall of the partition groove 103 are at least partially overlapped, so that the inner diameter of the partition groove 103 gradually decreases along the direction away from the substrate (Z direction in Figure 2). Referring to Figure 1, due to the morphology of the partition groove 103, at least a portion of the light-emitting functional layer 200 can be disconnected at the sidewall of the partition groove 103 during the full-surface vapor deposition of the light-emitting functional layer 200. Since at least part of the light-emitting functional layer 200 can be disconnected at the side wall of the partition groove 103, the light-emitting functional layer 200 of the adjacent light-emitting device 300 is disconnected. Therefore, the problem of lateral leakage current between the light-emitting devices 300 through the light-emitting functional layer 200 can be avoided, thereby improving the display effect of the display panel.

[0057] It should be noted that in the embodiments of this application, the terms "above" and "below" are used. Unless otherwise specified, "above" in the embodiments of this application generally refers to the side away from the substrate 000, and "below" generally refers to the side closer to the substrate 000. Since the pixel opening 102 in FIG1 is filled with the light-emitting layer 301 and the light-emitting functional layer 200, the reference numeral for the pixel opening 102 is marked on the location of the light-emitting functional layer 200 by way of example.

[0058] One objective of this application embodiment is to form a partition groove 103 having a gradually decreasing inner diameter along the direction away from the substrate 000. To achieve this objective, this application embodiment provides a reflective structure 104. This reflective structure 104 is defined as a functional structure capable of reflecting light. It can be a metal layer or the like that capable of achieving a reflective effect, and is not limited here.

[0059] Figure 3 is a schematic diagram of another display panel provided in an embodiment of this application. In some embodiments, the reflective structure 104 is disposed around the pixel opening 102. In the direction perpendicular to the substrate, the pixel opening 102 is located within the area surrounded by the reflective structure 104.

[0060] As shown in Figure 3, in this embodiment, a ring of reflective structures 104 can be formed around the pixel opening 102, effectively creating two sets of reflective structures 104 between adjacent pixel openings 102. Since the location of the reflective structures 104 can form an exposure enhancement region, the etching rate of the pixel definition layer corresponding to the exposure enhancement region can be faster. The reflective structures 104 at least partially overlap with the sidewalls of the partition groove, so the inner diameter of the partition groove formed by the above structure gradually decreases in the direction away from the substrate. When a light-emitting functional layer is subsequently formed above the pixel definition layer, at least a portion of the light-emitting functional layer can be disconnected at the sidewalls of the partition groove, thereby avoiding the problem of lateral leakage current between light-emitting devices through the light-emitting functional layer, thus improving the display effect of the display panel.

[0061] Since the reflective structure 104 is arranged around the pixel opening 102, it effectively forms a partition groove around the pixel opening 102. This prevents lateral leakage current between the light-emitting functional layers of adjacent light-emitting devices from occurring in all directions, thus avoiding problems that could affect the display effect of the display panel.

[0062] Figure 4 is a schematic diagram of another display panel provided in this application. In some embodiments, the reflective structure 104 includes two reflective metal traces 1041 located between adjacent pixel openings 102. The reflective metal traces 1041 along the pixel row and column directions are connected to form a mesh.

[0063] As shown in Figure 4, in this embodiment of the application, two reflective metal traces 1041 can be provided in adjacent pixel openings 102, and their cross-sectional structure is similar to that in Figure 1. Alternatively, a partition groove with a gradually decreasing inner diameter in the direction away from the substrate can be formed between adjacent pixel openings 102.

[0064] After the reflective metal trace 1041 extends along the row and column directions, it can form a reflective structure 104 surrounding the pixel opening 102, and further form a partition groove surrounding the pixel opening 102, so as to avoid leakage between the light-emitting functional layers of adjacent light-emitting devices from all directions, thereby avoiding problems that affect the display effect of the display panel.

[0065] Figure 5 is a schematic diagram of another display panel structure provided in an embodiment of this application. In some embodiments, a second electrode 105 is also included, which is located on the side of the light-emitting functional layer facing away from the substrate. A notch 1042 is provided in the reflective structure 104 between adjacent pixel openings 102. The second electrodes 105 corresponding to adjacent pixel openings 102 are connected at the notch 1042.

[0066] Specifically, as shown in Figure 1, the first electrode 101 is generally the anode, while the second electrode 105, located on the side of the light-emitting functional layer away from the substrate, is generally the cathode. The cathode generally has a flat surface structure, and in order to ensure a consistent cathode potential, it is generally necessary to set the cathode to a flat surface structure.

[0067] Because an isolation groove is provided between adjacent light-emitting devices, and the inner diameter of the isolation groove gradually decreases in the direction away from the substrate, the entire film layer prepared after the pixel definition layer will be broken at the sidewall of the isolation groove. Since the potential of the second electrode 105 of each light-emitting device is consistent, in order to avoid the isolation groove separating the second electrode 105 of each light-emitting device, as shown in FIG5, a notch 1042 is provided in the reflective structure 104 between adjacent pixel openings 102 in this embodiment. Then, the second electrode 105 prepared above the pixel definition layer can be connected at the notch 1042 to realize the interconnection of the second electrodes 105 of each light-emitting device and maintain the consistency of potential.

[0068] Furthermore, even if the light-emitting functional layers at the notch 1042 are connected together due to the presence of the notch 1042, the leakage current generated by the light-emitting functional layers at the notch 1042 is very small because the connection area of ​​the electrode layer corresponding to the notch 1042 is relatively small, and it has little impact on the display effect of the display panel.

[0069] In summary, the embodiments of this application, based on the above-described solution, can achieve the electrical connection of the second electrodes 105 of each light-emitting device together, while avoiding leakage current or at least ensuring that the leakage current is very small, thereby improving the display effect of the display panel.

[0070] Figure 6 is a schematic diagram of another display panel provided in an embodiment of this application. In some embodiments, when the gaps 1042 between adjacent pixel openings 102 are respectively located on two reflective metal traces 1041, the gaps 1042 have an angle of less than 90° between the connecting direction parallel to the substrate 000 and the pixel arrangement direction.

[0071] When the distance between the two notches 1042 is close, adjacent light-emitting devices are prone to leakage current between the shortest paths of the two notches 1042, which may affect the display effect of the display panel.

[0072] To further reduce leakage current, this embodiment of the application makes the angle between the line connecting the notches 1042 and the pixel arrangement direction less than 90°. Figure 6 illustrates, exemplarily, the notches 1042 of the two reflective metal traces 1041 in the line connecting direction L1 parallel to the substrate, the first pixel arrangement direction L2, and the second pixel arrangement direction L3. The angle between the line connecting direction L1 and the first pixel arrangement direction L2 is shown as β, and the angle between the line connecting direction L1 and the second pixel arrangement direction L3 is shown as γ. In this embodiment of the application, setting β and / or γ to be less than 90° can maximize the distance between the line connecting the notches 1042 corresponding to the two reflective metal traces 1041 between adjacent pixel openings 102, that is, the two notches 1042 are not on a straight line parallel to the pixel arrangement direction, thereby increasing the distance of the current transmission path. Under the influence of the impedance of the light-emitting functional layer itself, the longer the electron transmission path, the smaller the leakage current conducted to the light-emitting functional layer of the adjacent light-emitting device, which is more conducive to reducing the leakage current caused by the presence of the notches 1042.

[0073] It should be noted that although the structure in Figure 6 is similar to the structure in Figure 4 except for the notch 1042, both can be considered as having two reflective metal traces 1041 arranged between adjacent pixel openings 102 along the row and column directions. However, it should be understood that this is only because the embodiments of this application necessarily require a certain structure to illustrate the implementation. The arrangement of the notch 1042 is not limited to the structure shown in Figure 6. The position of the notch 1042 can be flexibly arranged, and the shape of the reflective structure 104 can also be flexibly arranged. For example, the reflective structure 104 can also be the shape shown in Figure 3.

[0074] In summary, the embodiments of this application can reduce the leakage current caused by the presence of the notch 1042 and improve the display effect of the display panel based on the above technical solutions.

[0075] Figure 7(a) is a schematic diagram of another display panel provided in an embodiment of this application. Figure 7(b) is an enlarged view of the DD' region in Figure 7(a). In some embodiments, the display panel includes a display area AA and non-display areas NA located on opposite sides of the display area AA, with the non-display areas NA and the display area AA arranged along a first direction. The display area AA includes an edge area ED and a middle area CE, with the edge area ED closer to the non-display area NA than the middle area CE.

[0076] The display panel also includes multiple data lines 106 and an adapter cable 107. The data lines 106 extend along a second direction, and the multiple data lines 106 are arranged along a first direction. The adapter cable 107 is electrically connected to the data lines 106 located in the edge region ED, and extends from the edge region ED to the middle region CE. Figures 7(a)-7(b) illustrate the first direction as the X direction and the second direction as the Y direction. In this embodiment, at least a portion of the reflective structure 104 can be reused as the adapter cable 107. Specifically, the partial reflective structure 104 is reused as at least a portion of the adapter cable 107.

[0077] In existing technologies, data lines in display panels typically need to be connected to the driver chip at the bottom of the display panel via fan-out traces. Because these fan-out traces connect the driver chip and the data lines, a large number of them are required. Furthermore, the fan-out traces need to be at a certain angle to allow for sufficient arrangement between the driver chip and the display area, resulting in a relatively large space occupied by the fan-out traces in the vertical direction.

[0078] To compress the bottom bezel of the display panel, this embodiment employs a connector 107 in the display area AA, connecting the data line 106. The connection location is indicated by a black circular shading in Figure 7. The connector 107 and data line 106 can be connected via vias. No connection is made at other overlapping locations shown in Figure 7. This technique, using a fanout in AA (FIAA) method, leads the data line 106, located at the edge region ED of the display area AA, to the middle region CE of the display area AA, further compressing the bottom bezel and reducing its width. Furthermore, since part of the reflective structure 104 is reused as part of the connector 107, the need for additional film layers to form the connector 107 is avoided, preventing the increase in display panel manufacturing processes and thickness.

[0079] Figure 8 is another enlarged view of the area in Figure 7(a). In some embodiments, the partial reflective structure 104 is multiplexed as a virtual trace 500, and there is a break 600 between the virtual trace 500 and the adapter 107.

[0080] Virtual trace 500 is electrically connected to the constant voltage signal lines of the display panel. The constant voltage signal lines include positive power signal lines, negative power signal lines, or reset signal lines.

[0081] In this embodiment of the application, the reflective structure 104, besides being partially reused as the adapter cable 107, can also be partially reused as a virtual trace 500, connected to the constant voltage signal line in the display panel. Figure 8 schematically shows the virtual trace 500 connected to the positive power signal line PVDD via a via, and the via is shown as a black-filled circle. It should be noted that, for the sake of simplicity, Figure 8 only shows a portion of the positive power signal line PVDD in the display area AA.

[0082] Since the adapter cable 107 is connected to some data lines 106, in order to avoid the electrical signal of the virtual trace 500 affecting the signal transmitted on the adapter cable 107, a break 600 is set between the virtual trace 500 and the adapter cable 107.

[0083] In some scenarios, if the reflective structure 104 is made of metal, it is necessary to consider that the floating state of the reflective structure 104 may accumulate static electricity, which can affect the display effect of the display panel. This embodiment of the application can reuse part of the reflective structure 104 as a virtual trace. Firstly, the static electricity accumulated in the virtual trace can be conducted away through the constant voltage signal line, avoiding static electricity accumulation in the virtual trace. Secondly, since the virtual trace is connected to the constant voltage signal line, and the electrical signal in the constant voltage signal line is constant voltage, the accumulation of static charge in the virtual trace has little impact on the voltage of the constant voltage signal in the constant voltage signal line, and therefore has a small impact on the display effect of the display panel. Thirdly, since the virtual trace is electrically connected to the constant voltage signal line, it can increase the cross-sectional area of ​​the transmission path of the constant voltage signal line to a certain extent. As can be seen from the formula for calculating the impedance area of ​​a conductor, the impedance of a conductor is inversely proportional to the cross-sectional area of ​​its transmission path. Therefore, based on the above solution, the impedance of the constant voltage signal line can be reduced, thereby reducing the voltage drop of the constant voltage signal line at different locations, and thus improving the display effect of the display panel.

[0084] In other embodiments, the virtual traces can also be electrically connected to other constant voltage signal lines of the display panel, such as the negative power signal line PVEE or the reset signal line Vref. The negative power signal line PVEE is used to transmit a cathode signal to the second electrode of the light-emitting device, and the reset signal line Vref is used to provide a reset signal to the driving circuit layer.

[0085] Figure 9 is a schematic diagram of another display panel provided in an embodiment of this application. In some embodiments, the display panel further includes a connecting portion 108. The connecting portion 108 and the first electrode 101 are located on the same film layer.

[0086] A first insulating layer PLN1 is provided between the first electrode 101 and the reflective structure 104. A second insulating layer PLN2 is provided between the reflective structure 104 and the data line 106.

[0087] The first insulating layer PLN1 includes a first through hole 109, which exposes the adapter cable 107. The second insulating layer PLN2 includes a second through hole 110, which exposes the data cable 106. The first through hole 109 and the second through hole 110 are connected. The connecting part 108 is located in the first through hole 109 and the second through hole 110, electrically connecting the adapter cable 107 to the data cable 106.

[0088] Specifically, the adapter cable 107 is used to connect the data cable 106 to the bonding area at the bottom of the display panel. In this solution, when the reflective structure 104 is reused as the adapter cable 107, the reflective structure 104 reused as the adapter cable 107 needs to be electrically connected to the data cable 106.

[0089] As shown in Figure 9, in this embodiment of the application, the connecting portion 108 can be fabricated simultaneously during the fabrication of the first electrode 101, meaning the connecting portion 108 is disposed in the same layer as the first electrode 101. Since the first insulating layer PLN1 and the second insulating layer PLN2 are actually in contact with each other, and the first through hole 109 and the second through hole 110 are interconnected, during the fabrication of the connecting portion 108, the connecting portion 108 can overlap the surface of the exposed data line 106, overlap the surface of the exposed reflective structure 104, and be disposed on the inner walls of the first through hole 109 and the second through hole 110. Thus, the purpose of electrically connecting the reflective structure 104 and the data line 106 through the connecting portion 108 is effectively achieved.

[0090] In some embodiments, the first insulating layer PLN1 and the second insulating layer PLN2 are organic layers of the same material.

[0091] As can be understood from the structure shown in Figure 9, the order of fabricating the data line 106 (corresponding film layer), the first insulating layer PLN1, the second insulating layer PLN2, the reflective structure 104 (corresponding film layer), and the connecting part 108 (corresponding film layer) is as follows: ① Fabricating the data line 106; ② Fabricating the second insulating layer PLN2; ③ Fabricating the reflective structure 104; ④ Fabricating the first insulating layer PLN1; ⑤ Fabricating the connecting part 108.

[0092] In this embodiment, the second insulating layer PLN2 is not separately etched to create openings after the entire surface is formed; instead, the reflective structure 104 is directly fabricated. After the reflective structure 104 is formed, the first insulating layer PLN1 is formed, followed by etching to create openings. Since the first insulating layer PLN1 and the second insulating layer PLN2 are made of the same organic material, and the pattern of the reflective structure 104 does not obstruct the etching of the organic layer, the etching directly penetrates the first insulating layer PLN1 and the second insulating layer PLN2, exposing the upper surface of the data line 106, and then forming the connection portion 108. Referring to Figure 10, the lower surface of the connection portion 108 overlaps the upper surface of the reflective structure 104 (used as an adapter cable 107) and the upper surface of the data line 106, thereby achieving an electrical connection between the reflective structure 104 (used as an adapter cable 107) and the data line 106.

[0093] Since the first insulating layer PLN1 and the second insulating layer PLN2 are made of the same material, the same photomask can be used to prepare the first through hole 109 and the second through hole 110, saving one masking process. This transforms the original two etching processes required for the first insulating layer PLN1 and the second insulating layer PLN2 into a single process, simplifying the process flow.

[0094] Figure 10 is a schematic diagram of another display panel provided in an embodiment of this application. In some embodiments, a first insulating layer PLN1 between the first electrode 101 and the reflective structure 104 may be provided on the side of the substrate 000 away from the first insulating layer PLN1, and a protrusion may be formed at the location of the reflective structure 104.

[0095] Since the first insulating layer PLN1 has a protrusion on the side surface facing away from the substrate 000 at the location of the reflective structure 104, a sharp corner structure can be formed at the junction of the side wall and bottom surface of the partition groove 103. When the light-emitting functional layer 200 is deposited, the light-emitting functional layer 200 is discontinuous at the junction of the side wall and bottom surface of the partition groove 103, causing the light-emitting functional layer 200 of adjacent light-emitting devices to be disconnected. Therefore, the leakage problem of the light-emitting functional layer 200 between adjacent light-emitting devices can be prevented.

[0096] The embodiments of this application are not limited to the way that the surface of the first insulating layer PLN1 opposite to the substrate 000 is formed with a protrusion. For example, it can be achieved by setting a relatively thin first insulating layer PLN1.

[0097] In some embodiments, the thickness of the first insulating layer PLN1 is smaller than that of the second insulating layer PLN2.

[0098] As shown in Figure 10, in this embodiment of the application, the thickness of the first insulating layer PLN1 can be less than the thickness of the second insulating layer PLN2. In Figure 10, the thickness of the first insulating layer PLN1 is schematically represented as h1, and the thickness of the second insulating layer PLN2 is schematically represented as h2, where h1 < h2. Since the thickness of the first insulating layer PLN1 is relatively thin, and a reflective structure 104 is provided on the side of the first insulating layer PLN1 facing the substrate 000, under the influence of these two factors, a certain protrusion is formed in the first insulating layer PLN1 at the position corresponding to the reflective structure 104.

[0099] The reflective structure 104 and the sidewall of the partition groove 103 overlap at least partially. Due to the reflective effect of the reflective structure 104, the pixel definition layer (PDL) at the corresponding position of the reflective structure 104 receives more exposure. During subsequent development and etching of the pixel definition layer (PDL), the PDL at the position with more exposure is etched at a faster rate. Since the thickness of the first insulating layer PLN1 is less than that of the second insulating layer PLN2, the first insulating layer PLN1 forms a protrusion at the position corresponding to the reflective structure 104. When the pixel definition layer (PDL) is developed and etched to form the partition groove 103, the bottom surface of the partition groove 103 can also be approximately convex upwards, so that the light-emitting functional layer 200 is disconnected at the sidewall of the partition groove 103, preventing leakage of the light-emitting functional layer 200 between adjacent light-emitting devices.

[0100] Referring again to Figure 10, in the display panel provided in this embodiment, the sidewall of the partition groove 103 can be configured to be concave arc-shaped. Because the sidewall of the partition groove 103 is concave, during the deposition of the light-emitting functional layer 200, the light-emitting functional layer 200 is discontinuous at the junction of the sidewall and bottom surface of the partition groove 103, causing the light-emitting functional layers 200 of adjacent light-emitting devices to be disconnected. Therefore, leakage of the light-emitting functional layer 200 between adjacent light-emitting devices can be prevented.

[0101] Specifically, the principle is explained based on the embodiment corresponding to Figure 10. Since the surface of the first insulating layer PLN1 forms a protrusion, the pixel definition layer PDL forms a corresponding depression at the location where the first insulating layer PLN1 forms a protrusion. Furthermore, in this embodiment, the isolation groove 103 can be prepared using wet etching. Under the effect of the enhanced exposure of the reflective structure 104, the organic matter in the exposure enhancement area reacts more quickly with the etching solution. Wet etching is isotropic; while the exposure enhancement area is being etched, the etching solution also diffuses and reacts towards the tip, causing the sidewall of the isolation groove to have an inwardly concave arc shape. For example, as shown in Figure 10, the bottom corner where the bottom meets the sidewall has a crescent-shaped appearance similar to an acute angle.

[0102] In some implementations, the reflective structure includes a reflective metal layer.

[0103] Specifically, the reflective structure in this embodiment can be made of a single-layer reflective metal layer, which can be made of a metal material with high reflectivity, such as silver (Ag).

[0104] Using a single-layer reflective metal material results in a simpler reflective structure, fewer manufacturing processes, and lower costs.

[0105] Figure 11 is a schematic diagram of another display panel structure provided in an embodiment of this application. In some embodiments, the reflective structure 104 includes a stacked reflective metal layer 111 and a semi-transparent, semi-reflective metal layer 112. The semi-transparent, semi-reflective metal layer 112 is located on the side of the reflective metal layer 111 that faces away from the substrate.

[0106] The distance between the side of the semi-transparent and semi-reflective metal layer 112 away from the substrate and the side of the reflective metal layer 111 away from the substrate is an integer multiple of the exposure wavelength of the pixel definition layer.

[0107] As shown in Figure 11, in order to improve the stability of the reflective structure, the reflective structure 104 can be prepared by multiple layers of film. Figure 11 illustrates the reflective structure 104 prepared by a metal reflective layer with high reflectivity and two semi-transparent and semi-reflective metal layers.

[0108] With this structure, the overall stability of the reflective structure 104 is higher. Furthermore, since the distance between the side of the semi-transparent, semi-reflective metal layer 112 away from the substrate and the side of the reflective metal layer 111 away from the substrate is an integer multiple of the exposure wavelength of the pixel definition layer, the constructive interference of the exposed light helps to further enhance the exposure, forming a more idealized narrow-at-the-top, wide-at-the-bottom partition groove, thus improving the interconnection problem between the light-emitting functional layers of adjacent light-emitting devices. The material of the semi-transparent, semi-reflective metal layer 112 can be, for example, molybdenum (Mo), and is not specifically limited here.

[0109] Figure 12 is a schematic diagram of a display device provided in an embodiment of this application. The display device may include the display panel of any of the above-described display panel embodiments.

[0110] The above-described display panel embodiment can be referred to. Since the display device provided in this application embodiment includes the above-described display panel, it can also achieve the same or at least similar technical effects as the above-described display panel, which will not be repeated here.

[0111] Based on the display panel in the above embodiments, this application also provides a method for manufacturing a display panel. Figure 13 is a schematic flowchart of a method for manufacturing a display panel provided in this application. The method includes:

[0112] S101. A driving circuit layer is formed on the substrate. The driving circuit layer includes a reflective structure.

[0113] S102. Form the first electrode on the driving circuit layer.

[0114] S103. A pixel definition layer is formed on the first electrode, and the pixel definition layer is patterned by exposure, development and etching to form pixel openings and partition grooves.

[0115] In this design, the pixel opening exposes the first electrode. A partition groove is located between adjacent pixel openings. The reflective structure at least partially overlaps with the sidewalls of the partition groove. The inner diameter of the partition groove gradually decreases in the direction away from the substrate.

[0116] S104. A light-emitting functional layer is formed on the pixel definition layer. At least a portion of the light-emitting functional layer is broken at the sidewall of the partition groove.

[0117] The fabrication method provided in this application includes a reflective structure in the fabricated driving circuit layer, which reflects light exposing the pixel definition layer. During pixel definition layer exposure, due to the reflective effect of the reflective structure, the pixel definition layer receives more exposure at locations with the reflective structure, forming an exposure enhancement region. Consequently, during subsequent development and etching of the pixel definition layer, the etching rate of the exposure enhancement region is faster. Therefore, this application embodiment sets the reflective structure to at least partially overlap with the sidewall of the partition groove, so that the inner diameter of the partition groove gradually decreases along the direction away from the substrate. Due to the aforementioned partition groove morphology, during the full-surface vapor deposition of the light-emitting functional layer, at least a portion of the light-emitting functional layer can be disconnected at the sidewall of the partition groove. Since at least a portion of the light-emitting functional layer can be disconnected at the sidewall of the partition groove, the light-emitting functional layers of adjacent light-emitting devices are disconnected, thus avoiding the problem of lateral leakage current between light-emitting devices through the light-emitting functional layers, thereby improving the display effect of the display panel.

[0118] Figure 14 is a schematic flowchart of forming a driving circuit layer on a substrate according to an embodiment of this application. In some embodiments, step S101, forming a driving circuit layer on the substrate, may include:

[0119] S201, Form a data cable.

[0120] S202, A second insulating layer is formed above the data line.

[0121] S203, A reflective structure is formed above the second insulating layer.

[0122] S204. A first insulating layer is formed above the reflective structure.

[0123] S205. Etch the first insulating layer and the second insulating layer to form a first through-hole in the first insulating layer and a second through-hole in the second insulating layer, with the first and second through-holes connected. The first through-hole exposes the adapter cable, and the second through-hole exposes the data cable.

[0124] For example, Figures 15(a)-15(k) are cross-sectional schematic diagrams of a display panel in a fabrication process provided by an embodiment of this application. The driving circuit layer 100, as described in some of the above embodiments, is used to send a driving signal to the first electrode. The driving circuit layer 100 includes, for example, an active layer and multiple metal layers, such as the first metal layer M1, the second metal layer M2, the third metal layer M3, and the fourth metal layer M4 in Figures 15(a)-15(k) (including but not limited to). The active layer is used to fabricate the channel layer in the thin-film transistor; the first metal layer M1 can be used to fabricate the gate of the thin-film transistor; the second metal layer M2 can be used to fabricate the source and drain of the thin-film transistor. In addition, depending on the actual design requirements of the display panel and the wiring arrangement, the first metal layer, the second metal layer, the third metal layer, or the fourth metal layer may be selectively configured to fabricate scan signal lines SCAN, light emission control signal lines EMIT, data lines, reset signal lines, positive power signal lines PVDD, negative power signal lines PVEE, and reset signal lines Vref. It should be noted that this application does not limit which metal layer is used to fabricate the signal lines such as the scan signal line SCAN, the light emission control signal line EMIT, the data line, the reset signal line, the positive power signal line PVDD, the negative power signal line PVEE, and the reset signal line Vref. Those skilled in the art can choose the metal film layer to use according to actual needs, as long as the reasonable wiring and electrical insulation of each signal line are ensured.

[0125] As shown in Figure 15(a), for example, a data line 106 is formed on substrate 000 using a third metal layer M3.

[0126] As shown in Figure 15(b), a second insulating layer PLN2 is provided above the data line 106.

[0127] As shown in Figure 15(c), a fourth metal layer M4 is prepared above the second insulating layer PLN2 and patterned to form a reflective structure 104.

[0128] In some embodiments, the reflective structure 104 may be fabricated from a single-layer reflective metal layer, which may be made of a metal material with high reflectivity, such as silver (Ag). In some embodiments, the reflective structure 104 includes a stacked reflective metal layer and a semi-transparent, semi-reflective metal layer. The semi-transparent, semi-reflective metal layer is located on the side of the reflective metal layer that faces away from the substrate. The distance between the side of the semi-transparent, semi-reflective metal layer facing away from the substrate and the side of the reflective metal layer facing away from the substrate is an integer multiple of the exposure wavelength of the pixel definition layer.

[0129] As shown in Figure 15(d), a first insulating layer PLN1 is formed on top of the reflective structure 104.

[0130] As shown in Figure 15(e), the first insulating layer PLN1 and the second insulating layer PLN2 are etched to form a first via 109 and a second via 110. In addition to forming the first via 109 and the second via 110, etching is also required on the first insulating layer PLN1 and the second insulating layer PLN2 to form a third via 113, which is used to connect the first electrode 101 to the third metal layer M3, thereby connecting the first electrode 101 to the transistor in the drive circuit layer 100.

[0131] In this embodiment, the second insulating layer PLN2 is not separately etched to create openings after the entire surface is formed; instead, a reflective structure 104 is directly fabricated. After the reflective structure 104 is formed, the entire surface of the first insulating layer PLN1 is formed, followed by etching to create openings. Since the first insulating layer PLN1 and the second insulating layer PLN2 are made of the same organic material, and the pattern of the reflective structure 104 does not obstruct the etching of the organic layer, the etching directly penetrates the first insulating layer PLN1 and the second insulating layer PLN2, exposing the upper surface of the data line 106. The same photomask can be used to fabricate the first through-hole 109 and the second through-hole 110, saving one masking process. This transforms the two etching processes that originally required the first insulating layer PLN1 and the second insulating layer PLN2 into a single process, simplifying the process flow.

[0132] Furthermore, this application can reuse the partial reflective structure 104 as a partial adapter cable 107 to achieve the use of FIAA technology and reduce the width of the lower bezel of the display panel. For example, referring to Figure 7 above, the display panel includes a display area AA and non-display areas NA located on opposite sides of the display area AA. The non-display areas NA and the display area AA are arranged along a first direction. The display area AA includes an edge area ED and a middle area CE. The edge area ED is closer to the non-display area NA than the middle area CE. Data lines 106 extend along a second direction, and multiple data lines 106 are arranged along the first direction. The adapter cable 107 is electrically connected to the data line 106 located in the edge area ED through a connecting part 108. The adapter cable 107 extends from the edge area ED to the middle area CE to realize the electrical connection between the data line 106 and the adapter cable 107. As shown in Figure 15(f), a first electrode 101 is prepared on the surface of the first insulating layer PLN1. When forming the first electrode 101 on the driving circuit layer 100, the process also includes forming a connection portion 108, such that the connection portion 108 is located in the first through hole 109 and the second through hole 110, and electrically connecting the adapter cable 107 to the data line 106. Since the first insulating layer PLN1 exposes the reflective structure 104 and the second insulating layer PLN2 exposes the data line 106, the fabricated connection portion 108 overlaps the surface of the reflective structure 104 and the surface of the data line 106, and is also provided on the inner walls of the first through hole 109 and the second through hole 110, so that the reflective structure 104 is connected to the data line 106 through the connection portion 108.

[0133] Furthermore, a pixel definition layer (PDL) is formed above the first electrode 101, as shown in Figure 15(g).

[0134] As shown in Figure 15(h), a mask is used to expose the pixel definition layer (PDL) for patterning. The mask pattern is used to prepare the partition groove 103 and the pixel opening 102. As shown in Figure 15(h), region S1 corresponds to the pattern of the pixel opening 102, and region S2 corresponds to the pattern of the partition groove 103. Since a reflective structure 104 is provided at the corresponding position in region S2, the pixel definition layer (PDL) receives more exposure due to the reflective effect of the reflective structure 104, forming an exposure enhancement region 400.

[0135] Furthermore, in the direction perpendicular to the substrate 000, the reflection effect of the relatively flat connection portion 108 formed above the reflective structure 104 (region P1 in FIG. 15(h)) is better than the reflection effect of the recessed connection portion 108 formed in the first via 109 and the second via 110 (region P2 in FIG. 15(h)). Therefore, there is a difference in the exposure of the pixel definition layer PDL in region P1 of FIG. 15(h) and region P2 of FIG. 15(h), which will also form an etched profile structure with concave arc sidewalls similar to the aforementioned partition groove 103.

[0136] Furthermore, after exposure is complete, the pixel definition layer (PDL) is developed and etched to form pixel openings 102 and partition grooves 103. Based on the above-described embodiment of FIG15(h), the pixel definition layer (PDL) in areas with larger exposure amounts is developed and etched at a faster rate, which can form partition grooves 103 that are narrow at the top and wide at the bottom, as shown in FIG15(i).

[0137] Furthermore, a light-emitting layer 301 and a light-emitting functional layer 200 are formed above the pixel definition layer (PDL), as shown in FIG15(j). In FIG15(j), the exemplary configuration of the light-emitting functional layer 200 includes a hole injection layer 201, a hole transport layer 202, an electron transport layer 203, and an electron injection layer 204. After forming the partition groove 103, the hole injection layer 201 and the hole transport layer 202 are first vapor-deposited across the entire surface, then the light-emitting layer 301 is formed within the pixel opening 102, and then the electron transport layer 203 and the electron injection layer 204 are vapor-deposited across the entire surface. Since the inner diameter of the partition groove 103 gradually decreases in the direction away from the substrate 000, for example, as shown in FIG15(j), the sidewall of the partition groove 103 is concave arc-shaped. When a full-surface light-emitting functional layer 200 is subsequently formed above the pixel definition layer PDL, at least a portion of the light-emitting functional layer 200 can be disconnected at the sidewall of the partition groove 103, thereby avoiding the problem of lateral leakage current between light-emitting devices through the light-emitting functional layer 200, thus improving the display effect of the display panel.

[0138] As shown in Figure 15(k), the second electrode 105 can be formed by vapor deposition over the entire surface. The first electrode 101 is generally an anode, while the second electrode 105, located on the side of the light-emitting functional layer 200 facing away from the substrate 000, is generally a cathode. In order to ensure a consistent cathode potential, the cathode is generally required to be a surface-mount structure.

[0139] Since a partition groove 103 is provided between adjacent light-emitting devices 300, and the inner diameter of the partition groove 103 gradually decreases in the direction away from the substrate, the entire film layer prepared after the pixel definition layer PDL will be broken at the side wall of the partition groove 103.

[0140] To prevent the partition groove 103 from separating the second electrodes 105 of each light-emitting device 300, in some embodiments, when forming the reflective structure 104, a notch 1042 can be provided in the reflective structure 104 between adjacent pixel openings 102 so that the second electrodes 105 corresponding to adjacent pixel openings 102 are connected at the notch 1042 (see the structure in FIG5).

[0141] It should be noted that the manufacturing method of the display panel provided in this application and the above-mentioned display panel are based on the same inventive concept. The structure involved in the manufacturing method can adopt a similar structure to that in the above-mentioned display panel embodiments, and has the same beneficial effects. It will not be described again in the manufacturing method embodiments of the display panel.

[0142] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0143] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, wherein, include: Substrate; The driving circuit layer located on the substrate; The first electrode is located on the driving circuit layer; A pixel definition layer located on the side of the first electrode away from the substrate; The pixel definition layer is patterned to form pixel openings and partition grooves; the pixel openings expose the first electrode; the partition grooves are located between adjacent pixel openings; the inner diameter of the partition grooves gradually decreases along the direction away from the substrate; A light-emitting functional layer is formed on the pixel definition layer; at least a portion of the light-emitting functional layer is broken at the sidewall of the partition groove; The driving circuit layer includes a reflective structure; in a direction perpendicular to the substrate, the reflective structure at least partially overlaps with the sidewall of the partition groove.

2. The display panel according to claim 1, wherein, The reflective structure is disposed around the pixel opening; in the direction perpendicular to the substrate, the pixel opening is located within the area surrounded by the reflective structure.

3. The display panel according to claim 1, wherein, The reflective structure includes two reflective metal traces located between adjacent pixel openings; the reflective metal traces are connected along the pixel row and column directions to form a mesh.

4. The display panel according to claim 1, wherein, It also includes a second electrode, which is located on the side of the light-emitting functional layer away from the substrate; the reflective structure between adjacent pixel openings is provided with a notch; and the second electrode corresponding to the adjacent pixel opening is connected at the notch.

5. The display panel according to claim 4, wherein, When the gaps between adjacent pixel openings are located on the two reflective metal traces, the gaps have an angle of less than 90° between the line direction parallel to the substrate and the pixel arrangement direction.

6. The display panel according to claim 1, wherein, The display panel includes a display area and non-display areas located on opposite sides of the display area, the non-display areas and the display area being arranged along a first direction; the display area includes an edge area and a middle area, the edge area being closer to the non-display area relative to the middle area. The display panel also includes multiple data lines and adapter lines. The data lines extend along a second direction, and the multiple data lines are arranged along a first direction. The adapter lines are electrically connected to the data lines located in the edge region, and the adapter lines extend from the edge region to the middle region. In this embodiment, a portion of the reflective structure is reused as at least a portion of the adapter cable.

7. The display panel according to claim 6, wherein, Part of the aforementioned reflective structure is reused as a virtual trace, and there is a break between the virtual trace and the adapter wire; The virtual trace is electrically connected to the constant voltage signal line of the display panel; the constant voltage signal line includes a positive power signal line, a negative power signal line, or a reset signal line.

8. The display panel according to claim 6, wherein, The display panel further includes a connecting portion; the connecting portion and the first electrode are located on the same film layer; A first insulating layer is disposed between the first electrode and the reflective structure; a second insulating layer is disposed between the reflective structure and the data line; The first insulating layer includes a first through hole, which exposes the adapter cable; the second insulating layer includes a second through hole, which exposes the data line; the first through hole and the second through hole are connected; the connecting portion is located in the first through hole and the second through hole, and electrically connects the adapter cable to the data line.

9. The display panel according to claim 8, wherein, The first insulating layer and the second insulating layer are organic layers of the same material.

10. The display panel according to claim 1, wherein, The thickness of the first insulating layer is smaller than that of the second insulating layer.

11. The display panel according to any one of claims 1-10, wherein, The sidewall of the partition groove is concave arc-shaped.

12. The display panel according to any one of claims 1-10, wherein, The reflective structure includes a reflective metal layer.

13. The display panel according to any one of claims 1-10, wherein, The reflective structure includes a stacked reflective metal layer and a semi-transparent, semi-reflective metal layer; the semi-transparent, semi-reflective metal layer is located on the side of the reflective metal layer that faces away from the substrate. The distance between the side of the semi-transparent and semi-reflective metal layer away from the substrate and the side of the reflective metal layer away from the substrate is an integer multiple of the exposure wavelength of the pixel definition layer.

14. The display panel according to any one of claims 1-10, wherein, The first insulating layer between the first electrode and the reflective structure has a protrusion formed on the side surface facing away from the substrate at the location of the reflective structure.

15. A display device, wherein, Includes the display panel as described in any one of claims 1-14.

16. A method for manufacturing a display panel, wherein, include: A driving circuit layer is formed on a substrate, wherein the driving circuit layer includes a reflective structure; A first electrode is formed on the driving circuit layer; A pixel definition layer is formed on the first electrode, and the pixel definition layer is patterned by exposure, development and etching to form pixel openings and isolation grooves; wherein the pixel openings expose the first electrode; the isolation grooves are located between adjacent pixel openings; the reflective structure at least partially overlaps with the sidewalls of the isolation grooves; the inner diameter of the isolation grooves gradually decreases along the direction away from the substrate; A light-emitting functional layer is formed on the pixel definition layer, wherein at least a portion of the light-emitting function is provided. The layer breaks at the sidewall of the partition groove.

17. The method for manufacturing a display panel according to claim 16, wherein, The formation of the driving circuit layer on the substrate includes: Form a data cable; A second insulating layer is formed above the data line; The reflective structure is formed above the second insulating layer; A first insulating layer is formed above the reflective structure; The first insulating layer and the second insulating layer are etched to form a first through-hole in the first insulating layer and a second through-hole in the second insulating layer. The first through-hole and the second through-hole are connected, wherein the first through-hole exposes the adapter cable and the second through-hole exposes the data line. When forming the first electrode on the driving circuit layer, the method further includes: forming a connection portion such that the connection portion is located in the first through hole and the second through hole, and electrically connecting the adapter cable to the data line; The display panel includes a display area and non-display areas located on opposite sides of the display area, the non-display areas and the display area being arranged along a first direction; the display area includes an edge area and a middle area, the edge area being closer to the non-display area than the middle area; the data lines extend along a second direction, and multiple data lines are arranged along the first direction; the adapter cable is electrically connected to the data lines located in the edge area through the connecting portion, and the adapter cable extends from the edge area to the middle area.

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