Modulation method, storage medium, electronic apparatus, and computer program product

Abstract

Provided in the embodiments of the present disclosure are a modulation method, a storage medium, an electronic apparatus, and a computer program product. The method comprises: shifting a first data sequence, and performing an addition operation on the first data sequence and the shifted first data sequence to obtain a second data sequence; multiplying each data element of the second data sequence by a negative real number, and sequentially inserting same between every adjacent data elements of the first data sequence to obtain a third data sequence; and transmitting the third data sequence.

Description

Modulation methods, storage media, electronic devices and computer program products

[0001] Cross-reference to related applications

[0002] This application is based on and claims priority to Chinese patent application CN202411486932.1, filed on October 23, 2024, entitled “Modulation Method, Storage Medium, Electronic Device and Computer Program Product”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of communications, and more specifically, to a modulation method, a storage medium, an electronic device, and a computer program product. Background Technology

[0004] With the development of wireless communication technology, the capacity and coverage of communication systems are constantly expanding, and the requirements for signal quality are becoming increasingly stringent. The peak-to-average power ratio (PAPR) of communication signals has become a key indicator for measuring signal quality and power amplifier efficiency. An excessively high PAPR can lead to reduced power amplifier efficiency, thereby affecting the coverage capability and signal transmission quality of the communication system.

[0005] In existing communication systems, the PAPR of multi-carrier Orthogonal Frequency Division Multiplexing (OFDM) signals is very high. A high PAPR means that the peak power of the signal is much greater than the average power. This not only leads to nonlinear distortion in the power amplifier but also forces the power amplifier to operate at high power, increasing energy consumption and heat loss, and reducing its efficiency. Although the PAPR of single-carrier Discrete Fourier Transform-Spread-OFDM (DFT-s-OFDM) signals is low, it is still not low enough to meet the low PAPR requirements of future communications. Summary of the Invention

[0006] This disclosure provides a modulation method, a storage medium, an electronic device, and a computer program product.

[0007] According to one embodiment of this disclosure, a modulation method is provided, comprising: shifting a first data sequence and adding the first data sequence to the shifted first data sequence to obtain a second data sequence; multiplying each data element of the second data sequence by a negative real number and sequentially inserting it between each adjacent data element of the first data sequence to obtain a third data sequence; and transmitting the third data sequence.

[0008] According to yet another embodiment of this disclosure, a computer-readable storage medium is also provided, wherein a computer program is stored therein, wherein the computer program is configured to perform the steps in any of the above method embodiments when it is run.

[0009] According to yet another embodiment of this disclosure, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0010] According to yet another embodiment of this disclosure, a computer program product is also provided, including a computer program that, when executed by a processor, implements the steps in any of the above method embodiments. Attached Figure Description

[0011] Figure 1 is a hardware structure block diagram of the computer device on which the modulation method of this disclosure is operated;

[0012] Figure 2 is a flowchart of the modulation method according to an embodiment of the present disclosure;

[0013] Figure 3 is a schematic flowchart illustrating the process of forming a third data sequence from a first data sequence according to an embodiment of this disclosure;

[0014] Figure 4 is a schematic diagram of a first data sequence including the beginning and end sequences according to an embodiment of the present disclosure;

[0015] Figure 5 is a schematic diagram illustrating the principle of performing Fourier transform on the third data sequence according to an embodiment of this disclosure. Detailed Implementation

[0016] The embodiments of this disclosure will be described in detail below with reference to the accompanying drawings and examples.

[0017] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0018] The method embodiments provided in this disclosure can be executed in a mobile terminal, computer device, or similar computing device. Taking running on a computer device as an example, FIG1 is a hardware structure block diagram of the computer device on which the modulation method of this disclosure is run. As shown in FIG1, the computer device 100 may include one or more (only one is shown in FIG1) processors 101 (processor 101 may include, but is not limited to, processing devices such as microprocessors MCUs or programmable logic devices FPGAs) and a memory 102 for storing data. The computer device may also include transmission devices for communication functions and input / output devices. It will be understood by those skilled in the art that the structure shown in FIG1 is only illustrative and does not limit the structure of the computer device. For example, the computer device may also include more or fewer components than shown in FIG1, or have a different configuration than shown in FIG1.

[0019] The memory 102 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the modulation method in this embodiment. The processor 101 executes various functional applications and data processing by running the computer program stored in the memory 102, thereby implementing the above-described method. The memory 102 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 102 may further include memory remotely located relative to the processor 101, and these remote memories can be connected to computer devices via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0020] Transmission devices are used to receive or send data over a network. Specific examples of such networks may include wireless networks provided by a computer equipment's communications provider. In one example, the transmission device includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0021] This disclosure provides a modulation method. Figure 2 is a flowchart of the modulation method according to this disclosure. As shown in Figure 2, the process includes the following steps:

[0022] Step S202: Shift the first data sequence and add the first data sequence to the shifted first data sequence to obtain the second data sequence.

[0023] In one exemplary embodiment, shifting the first data sequence includes: performing a cyclic shift of the first data sequence by a shift amount of 1 bit.

[0024] In one exemplary embodiment, shifting the first data sequence includes: performing a right circular shift or a left circular shift on the first data sequence.

[0025] In one exemplary embodiment, adding the first data sequence to the shifted first data sequence includes adding every two elements at the same position in the first data sequence and the shifted first data sequence.

[0026] In an exemplary embodiment, the first data sequence is obtained by modulating an initial bit sequence, wherein the modulation method includes at least one of the following: real number modulation; imaginary number modulation; complex number modulation; phase shift keying modulation; amplitude shift keying modulation; orthogonal amplitude modulation.

[0027] In one exemplary embodiment, the first data sequence is obtained by modulating an initial bit sequence with π / 2 binary phase shift keying (BPSK).

[0028] In one exemplary embodiment, the first data sequence is obtained by modulating the initial bit sequence and then adding the first and last data sequences, wherein the modulation method of the first and last data sequences is the same as that of the initial bit sequence; or, the first data sequence is obtained by modulating the initial bit sequence after adding the first and last bit sequences.

[0029] Step S204: Multiply each data element of the second data sequence by a negative real number and insert it sequentially between each adjacent data element of the first data sequence to obtain the third data sequence.

[0030] In one exemplary embodiment, the negative real number is Or -1.

[0031] In one exemplary embodiment, multiplying each data element of the second data sequence by a negative real number and inserting it sequentially between each adjacent data element of the first data sequence further includes inserting a data element between the last data element and the first data element of the first data sequence.

[0032] In this embodiment of the disclosure, the method of inserting a data element between the last data element and the first data element of the first data sequence is as follows: the first data sequence and the next first data sequence are connected end to end, and a data element is inserted between the last data element of the first data sequence and the first data element of the next first data sequence.

[0033] In one exemplary embodiment, inserting a data element is the product of the first or last data element of the second data sequence and a negative real number, and inserting a data element is the last or first element of the first data sequence.

[0034] In this embodiment of the disclosure, the last part of the first data sequence is after the last data element of the first data sequence, and the first part of the first data sequence is before the first data element of the first data sequence.

[0035] In one exemplary embodiment, when the shift of the first data sequence is a right circular shift, the product obtained by multiplying the first data element of the second data sequence by a negative real number is inserted at the beginning or end of the first data sequence.

[0036] In one exemplary embodiment, when the shift of the first data sequence is a right circular shift, the product obtained by multiplying the second data element of the second data sequence by a negative real number is inserted between the first data element and the second data element of the first data sequence.

[0037] In one exemplary embodiment, when the shift of the first data sequence is a left circular shift, the product obtained by multiplying the last data element of the second data sequence by a negative real number is inserted at the end or the beginning of the first data sequence.

[0038] In one exemplary embodiment, when the shift of the first data sequence is a left circular shift, the product obtained by multiplying the first data element of the second data sequence by a negative real number is inserted between the first data element and the second data element of the first data sequence.

[0039] In one exemplary embodiment, multiplying each data element of the second data sequence by a negative real number and inserting it sequentially between each adjacent data element of the first data sequence to obtain a third data sequence includes: multiplying each data element of the second data sequence by a negative real number, inserting it sequentially between each adjacent data element of the first data sequence, and performing a convolution operation to obtain the third data sequence.

[0040] In one exemplary embodiment, performing a convolution operation includes: performing a convolution operation with p[1,-1], where p is a constant representing a power factor, p=1, or Or p = 1 / (2cos(π / 8)).

[0041] In this embodiment of the disclosure, each data element of the second data sequence is multiplied by a negative real number and then inserted sequentially between each adjacent data element of the first data sequence to obtain the result, which is then convolved with p[1,-1].

[0042] Step S206: Transmit the third data sequence.

[0043] In one exemplary embodiment, transmitting a third data sequence includes: performing a Fourier transform on the third data sequence, and mapping the Fourier-transformed third data sequence onto time-frequency resources for transmission.

[0044] In an exemplary embodiment, performing a Fourier transform on the third data sequence includes: dividing the third data sequence into M groups of data sequences, performing a Fourier transform on each group of data sequences, with the different groups of data sequences mapped onto different orthogonal frequency division multiplexing symbols, wherein M is greater than or equal to 1.

[0045] In an exemplary embodiment, the Fourier transform is a Discrete Fourier Transform (DFT), and the data elements in the third data sequence after the DFT are mapped onto frequency domain resources according to the order of the subcarriers.

[0046] In one exemplary embodiment, mapping the Fourier-transformed third data sequence to time-frequency resources for transmission includes: performing frequency domain shaping on the Fourier-transformed third data sequence, and mapping the frequency-domain shaped data sequence to time-frequency resources for transmission.

[0047] In one exemplary embodiment, mapping the Fourier-transformed third data sequence to time-frequency resources for transmission includes: multiplying the Fourier-transformed third data sequence by a power factor, and mapping the data sequence multiplied by the power factor to time-frequency resources for transmission.

[0048] The above steps provide a modulation method that shifts a first data sequence and adds the first data sequence to the shifted first data sequence to obtain a second data sequence; each data element of the second data sequence is multiplied by a negative real number and sequentially inserted between each adjacent data element of the first data sequence to obtain a third data sequence; the third data sequence is then transmitted. This embodiment of the present disclosure solves the problem in related technologies where the low PAPR requirement of communication systems cannot be met, achieving the effect of reducing the PAPR of the communication system.

[0049] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the embodiments of this disclosure, or the part that contributes to the related technology, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the embodiments of this disclosure.

[0050] This disclosure also provides a modulation apparatus for implementing the above embodiments and preferred embodiments, which will not be repeated hereafter. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0051] The modulation apparatus of this disclosure includes a shift-add module, an insertion module, and a transmission module. The shift-add module is configured to shift a first data sequence and add the first data sequence to the shifted first data sequence to obtain a second data sequence. The insertion module is configured to multiply each data element of the second data sequence by a negative real number and insert it sequentially between each adjacent data element of the first data sequence to obtain a third data sequence. The transmission module is configured to transmit the third data sequence.

[0052] In this embodiment, the modulation device may further include different modules, and the naming and functional division of the modules may be selected in different ways according to the actual situation, without specific limitations.

[0053] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0054] This disclosure also provides a computer-readable storage medium storing a computer program configured to perform the steps in any of the above method embodiments when executed.

[0055] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0056] This disclosure also provides an electronic device including a memory and a processor, the memory storing a computer program and the processor being configured to run the computer program to perform the steps in any of the above method embodiments.

[0057] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0058] This disclosure also provides a computer program product, including a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0059] In one exemplary embodiment, the computer program product described above includes a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method described in the embodiments of this disclosure.

[0060] Specific examples in the embodiments of this disclosure can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0061] Obviously, those skilled in the art should understand that the modules or steps of the embodiments of this disclosure described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the embodiments of this disclosure are not limited to any particular combination of hardware and software.

[0062] To enable those skilled in the art to better understand the technical solutions of the embodiments of this disclosure, the following description is provided in conjunction with different embodiments.

[0063] Example 1

[0064] In this embodiment of the disclosure, a third data sequence is formed by a first data sequence.

[0065] Figure 3 is a flowchart illustrating the process of forming a third data sequence from a first data sequence according to an embodiment of this disclosure. As shown in Figure 3, the first data sequence is first shifted, and then added to the unshifted first data sequence to obtain a second data sequence. Then, each data element of the second data sequence is multiplied by a negative real number and sequentially inserted between each adjacent data element of the first data sequence to form the third data sequence. The third data sequence is then transmitted.

[0066] Example 2

[0067] In this embodiment of the disclosure, a third data sequence is formed by a first data sequence.

[0068] In this embodiment of the disclosure, the number of data items contained in the first data sequence is set to N, the data items contained in the first data sequence are D1(i), and the first data sequence is expressed by the formula {D1(i), i=0,1,2,...,N-1}.

[0069] The first data sequence is cyclically shifted 1 bit to the left to form the cyclically shifted first data sequence, which is expressed by the formula {D1(i), i=1,2,...,N-1,0}.

[0070] The first data sequence after cyclic shift is added to the first data sequence before shifting to obtain the second data sequence, which can be expressed by the formula:

[0071] {D2(i), i=0,1,2,...,N-1}={D1(i), i=1,2,...,N-1,0}+{D1(i), i=0,1,2,...,N-1};

[0072] In this embodiment of the disclosure, the addition operation is as follows: every two data elements at the same position in the two data sequences are added together, i.e., D1(1)+D1(0), D1(2)+D1(1), ..., and so on.

[0073] Multiply each data element of the second data sequence by a negative real number R to obtain the second data sequence multiplied by the negative real number. The second data sequence multiplied by the negative real number is expressed by the formula: R*{D2(i), i=0,1,2,...,N-1}.

[0074] The second data sequence, multiplied by a negative real number, is inserted sequentially between each adjacent data element of the first data sequence to form the third data sequence, which can be expressed by the formula:

[0075] In this process, the last data element of the second data sequence is multiplied by a negative real number and then inserted at the end of the first data sequence, which is the last data element of the third data sequence.

[0076] Example 3

[0077] In this embodiment of the disclosure, a third data sequence is formed by a first data sequence.

[0078] In this embodiment of the disclosure, a third data sequence is formed by a first data sequence, and the first data sequence is:

[0079] First, the first data sequence is shifted 1 bit to the left in a circular shift, and then added to the first data sequence to obtain the second data sequence, which is: {1j, -1, -1j, 1}.

[0080] Multiply each data element of the second data sequence by Then, it is inserted sequentially between each adjacent data element of the first data sequence to form the third data sequence. The first data element of the second data sequence is multiplied by... Then insert after the first data element of the first data sequence, and multiply the second data element of the second data sequence by... Then insert after the second data element of the first data sequence, and multiply the third data element of the second data sequence by... Then insert after the third data element of the first data sequence, and multiply the last data element of the second data sequence by... It is then inserted at the end of the first data sequence. Therefore, the third data sequence is:

[0081] In other embodiments, the last data element of the second data sequence is multiplied by It can also be inserted at the very beginning of the first data sequence. That is, it can be inserted before the first data element of the first data sequence.

[0082] Example 4

[0083] In this embodiment of the disclosure, a third data sequence is formed by a first data sequence.

[0084] In this embodiment of the disclosure, let N be the number of data items contained in the first data sequence, let D1(i) be the data elements contained in the first data sequence, and let the first data sequence be expressed by the formula {D1(i), i = 0, 1, 2, ..., N-1}.

[0085] The first data sequence is circularly shifted 1 bit to the right to form the first data sequence after circular shifting. The first data sequence after circular shifting is expressed by the formula {D1(i), i=N-1,0,1,2,...,N-2}.

[0086] Then, the first data sequence after circular shifting is added to the first data sequence before shifting to obtain the second data sequence, which can be expressed by the formula:

[0087] {D2(i), i=0,1,2,...,N-1}={D1(i), i=N-1,0,1,2,...,N-2}+{D1(i), i=0,1,2,...,N-1};

[0088] In this embodiment of the disclosure, the addition operation is as follows: every two data elements at the same position in the two data sequences are added together, i.e., D1(N-1)+D1(0), D1(0)+D1(1), ..., and so on.

[0089] Then, each data element of the second data sequence is multiplied by a negative real number R to obtain the second data sequence multiplied by the negative real number. The second data sequence multiplied by the negative real number is expressed by the formula: R*{D2(i), i=0,1,2,...,N-1}.

[0090] Then, the second data sequence, multiplied by a negative real number, is sequentially inserted between each adjacent data element of the first data sequence to form the third data sequence, which can be expressed by the formula:

[0091] In this process, the first data element of the second data sequence is multiplied by a negative real number and then inserted at the beginning of the first data sequence, which is the first data element of the third data sequence.

[0092] Example 5

[0093] In this embodiment of the disclosure, a third data sequence is formed by a first data sequence.

[0094] In this embodiment of the disclosure, a third data sequence is formed by a first data sequence, and the first data sequence is:

[0095] First, the first data sequence is cyclically shifted 1 bit to the right, and then added to the first data sequence to obtain the second data sequence, which is: {1, 1j, -1, -1j}.

[0096] Then multiply each data element of the second data sequence by... Then, it is inserted sequentially between each adjacent data element of the first data sequence to form the third data sequence. The first data element of the second data sequence is multiplied by... Then insert it before the first data sequence, and multiply the second data element of the second data sequence by... Then it is inserted after the first data element of the first data sequence, and the third data element of the second data sequence is multiplied by... Then it is inserted after the second data element of the first data sequence, and the fourth data element of the second data sequence is multiplied by... It is then inserted after the third data element of the first data sequence. Therefore, the third data sequence is:

[0097] In other embodiments, the first data element of the second data sequence is multiplied by... It can also be inserted at the end of the first data sequence.

[0098] Example 6

[0099] In this embodiment of the disclosure, the first data sequence is an example of a π / 2BPSK modulated data sequence.

[0100] In this embodiment of the disclosure, the first data sequence is obtained by performing π / 2 binary phase shift keying (BPSK) modulation on an initial bit sequence.

[0101] In this embodiment of the disclosure, the first data sequence is a π / 2BPSK modulated data sequence, and the first data sequence is used to form the second data sequence according to the method in Embodiment 1.

[0102] Let the first data sequence contain four types of data elements. Shift the first data sequence one bit to the left or one bit to the right, then add it to the unshifted first data sequence to obtain the second data sequence; then multiply each element of the second data sequence by a negative real number. Then, it is inserted sequentially between each adjacent data element of the first data sequence to form the third data sequence.

[0103] Adjacent data elements in the first data sequence are In this case, the data elements of the second data sequence are: The three consecutive data points in the third data sequence are

[0104] Adjacent data elements in the first data sequence are In this case, the data elements of the second data sequence are: The three consecutive data points in the third data sequence are

[0105] Adjacent data elements in the first data sequence are In this case, the data elements of the second data sequence are: The three consecutive data points in the third data sequence are

[0106] Adjacent data elements in the first data sequence are In this case, the data elements of the second data sequence are: The three consecutive data points in the third data sequence are

[0107] Example 7

[0108] In this embodiment of the disclosure, the first data sequence is a π / 2BPSK modulated data sequence.

[0109] In this embodiment of the disclosure, the first data sequence is obtained by performing π / 2 binary phase shift keying (BPSK) modulation on an initial bit sequence.

[0110] In this embodiment of the disclosure, the first data sequence is a π / 2BPSK modulated data sequence, and the first data sequence is used to form the second data sequence according to the method in Embodiment 1.

[0111] Let the first data sequence contain four data elements {1j, -1, -1j, 1}. Shift the first data sequence one bit to the left or one bit to the right, then add it to the unshifted first data sequence to obtain the second data sequence. Then, multiply each element of the second data sequence by a negative real number. Then, it is inserted sequentially between each adjacent data element of the first data sequence to form the third data sequence.

[0112] Given that the adjacent data elements of the first data sequence are {1j, -1}, the data elements of the second data sequence are obtained as follows: The three consecutive data points in the third data sequence are

[0113] Given that the adjacent data elements of the first data sequence are {-1, -1j}, the data elements of the second data sequence are: The three consecutive data points in the third data sequence are

[0114] Given that the adjacent data elements of the first data sequence are {-1j, 1}, the data elements of the second data sequence are obtained as follows: The three consecutive data points in the third data sequence are

[0115] Given that the adjacent data elements of the first data sequence are {1, 1j}, the elements of the second data sequence are: The three consecutive data points in the third data sequence are

[0116] Example 8

[0117] In this embodiment of the disclosure, an example is described of performing a convolution operation with [1,-1] to form a third data sequence.

[0118] In this embodiment of the disclosure, the first data sequence is used to form a second data sequence according to the method of Embodiment 3, and then each data element of the second data sequence is multiplied by... Insert it sequentially between each adjacent data element of the first data sequence, and perform a convolution operation with p[1,-1] to form the third data sequence.

[0119] In this embodiment of the disclosure, the data sequence A third data sequence is formed by convolving p*[1,-1], where p is a power factor. In this embodiment, p takes the value of

[0120] Therefore, the third data sequence is: {p1+p2j, p1-p2j, -p2+p1j, p2+p1j, -p1-p2j, -p1+p2j, p2-p1j, -p2-p1j}, where

[0121] Example 9

[0122] In this embodiment of the disclosure, a first data sequence containing the first and last sequences is illustrated by way of example.

[0123] In this embodiment of the disclosure, the first data sequence is formed by modulating the initial bit sequence and then adding the first and last data sequences, wherein the modulation method of the first and last data sequences is the same as the modulation method of the initial bit sequence. Alternatively, the first data sequence is formed by adding the first and last bit sequences to the initial bit sequence and then modulating it.

[0124] Figure 4 is a schematic diagram of a first data sequence including a start and end sequence according to an embodiment of the present disclosure. As shown in Figure 4, in this embodiment of the present disclosure, the first data sequence is formed by adding a start and end sequence to a modulated data sequence. The modulated data sequence is a π / 2BPSK modulated data sequence, and the start and end sequences are also π / 2BPSK modulated data sequences.

[0125] Example 10

[0126] In this embodiment of the disclosure, the Fourier transform of the third data sequence is described.

[0127] Figure 5 is a schematic diagram illustrating the principle of performing a Fourier transform on the third data sequence according to an embodiment of this disclosure. As shown in Figure 5, in this embodiment, the third data sequence is first divided into M groups of data sequences, and then each of the M groups of data sequences undergoes a Fourier transform to form M groups of Fourier-transformed data sequences. These M groups of Fourier-transformed data sequences are then mapped onto different OFDM symbols, where M>=1. Each group of Fourier-transformed data sequences is mapped onto frequency domain resources according to the subcarrier order of one OFDM symbol. In this embodiment, M=14.

[0128] In other embodiments, the third data sequence is directly subjected to a Fourier transform to form a Fourier-transformed third data sequence, and then the Fourier-transformed third data sequence is mapped onto frequency domain resources in the order of subcarriers.

[0129] In other embodiments, frequency domain shaping is performed on the M sets of Fourier transform data sequences, or the third set of Fourier transform data sequences, before mapping them onto time-frequency resources for transmission. Frequency domain shaping allows for the extraction and mapping of higher-power data onto frequency domain resources.

[0130] The above description is merely a preferred embodiment of this disclosure and is not intended to limit the scope of this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A modulation method, comprising: The first data sequence is shifted, and the first data sequence is added to the shifted first data sequence to obtain the second data sequence; Multiply each data element of the second data sequence by a negative real number and insert it sequentially between each adjacent data element of the first data sequence to obtain the third data sequence; Transmit the third data sequence.

2. The method according to claim 1, wherein, The shifting of the first data sequence includes: The first data sequence is cyclically shifted by a shift amount of 1 bit.

3. The method according to claim 1, wherein, The shifting of the first data sequence includes: The first data sequence is cyclically shifted to the right or to the left.

4. The method according to claim 1, wherein, The addition operation between the first data sequence and the shifted first data sequence includes: Add every two elements at the same position in the first data sequence and the shifted first data sequence.

5. The method according to claim 1, wherein, The negative real number is Or -1.

6. The method according to claim 1, wherein, The step of multiplying each data element of the second data sequence by a negative real number and inserting it sequentially between each adjacent data element of the first data sequence further includes: Insert a data element between the last data element and the first data element of the first data sequence.

7. The method according to claim 6, wherein, The insertion of a data element is the product of the first or last data element of the second data sequence and the negative real number, and the insertion of a data element is at the end or beginning of the first data sequence.

8. The method according to claim 7, wherein, When the shift of the first data sequence is a right circular shift, the product obtained by multiplying the first data element of the second data sequence by a negative real number is inserted at the beginning or end of the first data sequence.

9. The method according to claim 7, wherein, When the shift of the first data sequence is a right circular shift, the product of the second data element of the second data sequence multiplied by a negative real number is inserted between the first data element and the second data element of the first data sequence.

10. The method according to claim 7, wherein, When the shift of the first data sequence is a left circular shift, the product obtained by multiplying the last data element of the second data sequence by a negative real number is inserted at the end or the beginning of the first data sequence.

11. The method according to claim 7, wherein, When the shift of the first data sequence is a left circular shift, the product obtained by multiplying the first data element of the second data sequence by a negative real number is inserted between the first data element and the second data element of the first data sequence.

12. The method according to claim 1, wherein, The first data sequence is obtained by modulating an initial bit sequence, wherein the modulation method includes at least one of the following: Real number modulation; imaginary number modulation; complex number modulation; phase shift keying modulation; amplitude shift keying modulation; quadrature amplitude modulation.

13. The method according to claim 1, wherein, The first data sequence is obtained by performing π / 2 binary phase shift keying (BPSK) modulation on the initial bit sequence.

14. The method according to claim 1, wherein, The first data sequence is obtained by modulating the initial bit sequence and adding the first and last data sequences. The modulation method of the first and last data sequences is the same as that of the initial bit sequence. Alternatively, the first data sequence can be obtained by adding first and last bit sequences to the initial bit sequence and then modulating it.

15. The method according to claim 1, wherein, The step of multiplying each data element of the second data sequence by a negative real number and inserting it sequentially between each adjacent data element of the first data sequence to obtain the third data sequence includes: Each data element of the second data sequence is multiplied by a negative real number and inserted sequentially between each adjacent data element of the first data sequence, and then convolution is performed to obtain the third data sequence.

16. The method according to claim 15, wherein, The convolution operation includes: Perform a convolution operation with p[1,-1], where p is a constant representing the power factor, p=1, or Or p = 1 / (2cos(π / 8)).

17. The method according to claim 1, wherein, The transmission of the third data sequence includes: The third data sequence is subjected to a Fourier transform, and the Fourier transformed third data sequence is mapped onto time-frequency resources for transmission.

18. The method according to claim 17, wherein, Performing a Fourier transform on the third data sequence includes: The third data sequence is divided into M groups of data sequences, and a Fourier transform is performed on each group of data sequences. The data sequences of different groups are mapped onto different orthogonal frequency division multiplexing symbols, where M is greater than or equal to 1.

19. The method of claim 17, wherein, The Fourier transform is the Discrete Fourier Transform (DFT), and the data elements in the third data sequence after the DFT are mapped onto the frequency domain resources according to the order of the subcarriers.

20. The method of claim 17, wherein, The step of mapping the Fourier-transformed third data sequence onto time-frequency resources for transmission includes: The third data sequence after Fourier transform is frequency-domain shaped, and the frequency-domain shaped data sequence is mapped to time-frequency resources for transmission.

21. The method according to claim 17, wherein, The step of mapping the Fourier-transformed third data sequence onto time-frequency resources for transmission includes: The third data sequence after Fourier transform is multiplied by a power factor, and the data sequence after multiplication by the power factor is mapped to time-frequency resources for transmission.

22. A computer-readable storage medium storing a computer program, wherein, When the computer program is executed by a processor, it implements the steps of the method described in any one of claims 1 to 21.

23. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, performs the steps of the method of any one of claims 1 to 21.

24. A computer program product comprising a computer program that, when executed by a processor, implements the steps of the method described in any one of claims 1 to 21.

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