Control circuit for LED display screen, and LED display device
By designing compatible channel selectors and reservation devices, the problems of numerous components and high costs in LED display control circuits were solved, and compatible communication between the receiver card and the controller or memory was achieved, reducing production costs.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- UNILUMIN GRP
- Filing Date
- 2025-06-28
- Publication Date
- 2026-05-21
AI Technical Summary
In existing LED display control circuits, RS232 signals and SPI signals are incompatible, resulting in a large number of components and high costs.
Design an LED display control circuit that uses a channel selector, a control module reserve, a storage module reserve, and a shorting reserve. The channel selector enables compatible communication between the receiving card and the controller or memory, reducing the number of components.
It achieves compatibility between the receiver card and the controller or memory via SPI communication and serial communication, thereby reducing production costs.
Smart Images
Figure CN2025105107_21052026_PF_FP_ABST
Abstract
Description
LED display control circuit and LED display device
[0001] Cross-references
[0002] This application claims priority to Chinese Patent Application No. 202422781638.5, filed on November 13, 2024, entitled "Control Circuit and LED Display Device for LED Display Screen", the entire contents of which are incorporated herein by reference. Technical Field
[0003] This application relates to, but is not limited to, the field of LED display technology, such as a control circuit for an LED display and an LED display device. Background Technology
[0004] A complete LED display device typically includes an LED display screen, a receiver card, a controller, and a flash memory. The receiver card receives data from external devices and sends this data to the controller and / or flash memory. Therefore, the control circuit of the LED display screen needs to be compatible with the connection between the receiver card and the controller and / or flash memory.
[0005] In a typical LED display control circuit, the receiver card connects to the controller via RS232 communication, and to the flash memory via a Serial Peripheral Interface (SPI) communication method. Because RS232 and SPI signals are incompatible, each communication method is connected to a channel selector to enable RS232 serial communication between the receiver card and one of the multiple controllers, or SPI communication between the receiver card and one of the multiple memory cards.
[0006] Public content
[0007] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.
[0008] In view of this, the present disclosure provides a control circuit and an LED display device for an LED display screen to address the issue of numerous components and high cost in the LED display screen control circuit.
[0009] This application provides a control circuit for an LED display screen, including a receiver card, a channel selector, a control module reserve, a storage module reserve, and a short-circuit reserve, wherein...
[0010] The selection signal input terminal of the channel selector is electrically connected to the selection signal output terminal of the receiving card. The first input terminal of the channel selector is electrically connected to the SPI data transmitting terminal of the receiving card. The first output terminal of the channel selector is electrically connected to the serial port data receiving terminal of the control module reservation and the first input terminal of the shorting reservation respectively. The first output terminal of the shorting reservation is electrically connected to the SPI data receiving terminal of the storage module reservation. The SPI data receiving terminal of the storage module reservation is also electrically connected to the SPI data transmitting terminal of the control module reservation.
[0011] The second input terminal of the channel selector is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the channel selector is electrically connected to the second input terminal of the shorting reservation terminal, the second output terminal of the shorting reservation terminal is electrically connected to the SPI chip select input terminal of the storage module reservation terminal, and the SPI chip select input terminal of the storage module reservation terminal is also electrically connected to the SPI chip select output terminal of the control module reservation terminal.
[0012] The third input terminal of the channel selector is electrically connected to the SPI clock output terminal of the receiving card; the third output terminal of the channel selector is electrically connected to the third input terminal of the shorting reservation terminal; the third output terminal of the shorting reservation terminal is electrically connected to the SPI clock input terminal of the storage module reservation terminal; and the SPI clock input terminal of the storage module reservation terminal is also electrically connected to the SPI clock output terminal of the control module reservation terminal.
[0013] The fourth input terminal of the shorting reserve is electrically connected to the SPI data transmitting terminal of the storage module reserve. The fourth output terminal of the shorting reserve is electrically connected to the fourth input terminal of the channel selector. The fourth input terminal of the channel selector is also electrically connected to the SPI data transmitting terminal of the control module reserve. The fourth output terminal of the channel selection output is electrically connected to the SPI data receiving terminal of the receiving card. The SPI data transmitting terminal of the storage module reserve is also electrically connected to the SPI data receiving terminal of the control module reserve.
[0014] Optionally, in the following embodiments of this disclosure, when the controller is inserted into the control module reservation device, the memory is not inserted into the storage module reservation device, and the shorting reservation device is not shorted, the controller communicates with the receiving card via RS232 serial communication through a channel selector; when the memory is inserted into the storage module reservation device, the shorting reservation device is shorted, and the controller is not inserted into the control module reservation device, the memory communicates with the receiving card via SPI communication through a channel selector; when the controller is inserted into the control module reservation device, the memory is inserted into the storage module reservation device, and the shorting reservation device is not shorted, the controller communicates with the receiving card via RS232 serial communication through a channel selector, and the controller communicates with the memory via SPI communication.
[0015] Optionally, in this embodiment of the disclosure, the channel selector includes a selection section and an output section, wherein,
[0016] The selection signal input terminal of the selection unit is electrically connected to the selection signal output terminal of the receiving card, the first data input terminal of the selection unit is electrically connected to the SPI data transmission terminal of the receiving card, the first output terminal of the selection unit is electrically connected to the first input terminal of the output unit, and the first output terminal of the output unit is electrically connected to the serial port data receiving terminal of the control module reservation device and the first input terminal of the shorting reservation device, respectively.
[0017] The second data input terminal of the selection unit is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the selection unit is electrically connected to the second input terminal of the output unit, and the second output terminal of the output unit is electrically connected to the second input terminal of the shorting reserve.
[0018] The third input terminal of the output section is electrically connected to the SPI clock output terminal of the receiving card, and the third output terminal of the output section is electrically connected to the third input terminal of the shorting reserve; and
[0019] The fourth input terminal of the output unit is electrically connected to the fourth output terminal of the shorting reserve and the serial port data transmission terminal of the control module reserve, respectively. The fourth output terminal of the output unit is electrically connected to the third data input terminal of the selection unit, and the third output terminal of the selection unit is electrically connected to the SPI data receiving terminal of the receiving card.
[0020] Optionally, in this embodiment of the disclosure, the selection unit includes a first analog switch chip and a second analog switch chip, wherein,
[0021] The first selection signal input terminal of the first analog switch chip is electrically connected to the first selection signal output terminal of the receiver card; the second selection signal input terminal of the first analog switch chip is electrically connected to the second selection signal output terminal of the receiver card; the first common terminal of the first analog switch chip is electrically connected to the SPI data receiving terminal of the receiver card; the first set of data terminals of the first analog switch chip is electrically connected to the fourth output terminal of the output section; the second common terminal of the first analog switch chip is electrically connected to the SPI chip select output terminal of the receiver card; and the second set of data terminals of the first analog switch chip is electrically connected to the second input terminal of the output section.
[0022] The selection signal input terminal of the second analog switch chip is electrically connected to the third selection signal output terminal of the receiver card, the first common terminal of the second analog switch chip is electrically connected to the SPI data transmission terminal of the receiver card, and the first group data terminal of the second analog switch chip is electrically connected to the first input terminal of the output section.
[0023] Optionally, in this embodiment of the disclosure, the output section includes a first output chip and a second output chip, wherein,
[0024] The first set of input terminals of the first output chip is electrically connected to the first set of data terminals of the second analog switch chip; the first set of output terminals of the first output chip is electrically connected to the serial port data receiving terminal of the control module reserve and the first input terminal of the shorting reserve, respectively; the second set of input terminals of the first output chip is electrically connected to the SPI clock output terminal of the receiving card; and the second set of output terminals of the first output chip is electrically connected to the third input terminal of the shorting reserve.
[0025] The first set of input terminals of the second output chip is electrically connected to the second set of data terminals of the first analog switch chip, and the first set of output terminals of the second output chip is electrically connected to the second input terminal of the shorting reserve. The second set of input terminals of the second output chip is electrically connected to the fourth output terminal of the shorting reserve and the serial port data transmission terminal of the control module reserve, respectively, and the second set of output terminals of the second output chip is electrically connected to the first set of data terminals of the first analog switch chip.
[0026] Optionally, in this embodiment of the disclosure, the control module reserveer includes multiple controller reserve areas, and the storage module reserveer includes multiple memory reserve areas, wherein,
[0027] Each of the controller reserved areas has its serial port data receiving terminal electrically connected to the first set of output terminals of the first output chip, each of the controller reserved areas has its serial port data transmitting terminal electrically connected to the second set of input terminals of the second output chip, each of the controller reserved areas has its SPI chip select output terminal electrically connected to the SPI chip select input terminal of a memory reserved area, each of the controller reserved areas has its SPI clock output terminal electrically connected to the SPI clock input terminal of a memory reserved area, each of the controller reserved areas has its SPI data transmitting terminal electrically connected to the SPI data receiving terminal of a memory reserved area, and each of the controller reserved areas has its SPI data receiving terminal electrically connected to the SPI data transmitting terminal of a memory reserved area.
[0028] Optionally, in this embodiment of the disclosure, the SPI chip select input terminal of each memory reserved area is electrically connected to the SPI chip select output terminal of a controller reserved area and the second output terminal of the shorting reserved area, the SPI clock input terminal of each memory reserved area is electrically connected to the SPI clock output terminal of a controller reserved area and the third output terminal of the shorting reserved area, the SPI data receiving terminal of each memory reserved area is electrically connected to the SPI data transmitting terminal of a controller reserved area and the first input terminal of the shorting reserved area, and the SPI data transmitting terminal of each memory reserved area is electrically connected to the SPI data receiving terminal of a controller reserved area and the fourth input terminal of the shorting reserved area.
[0029] Optionally, in this embodiment of the disclosure, the short-circuit reserve device includes multiple sets of short-circuit sections, each set of short-circuit sections including a first short-circuit reserve area, a second short-circuit reserve area, a third short-circuit reserve area, and a fourth short-circuit reserve area, wherein,
[0030] The first end of each first shorting reserved area is electrically connected to the first set of outputs of the first output chip; the second end of each first shorting reserved area is electrically connected to the SPI data receiving end of a memory reserved area; the first end of each second shorting reserved area is electrically connected to the first set of outputs of the second output chip; the second end of each second shorting reserved area is electrically connected to the SPI chip select input end of a memory reserved area; the first end of each third shorting reserved area is electrically connected to the second set of outputs of the first output chip; the second end of each third shorting reserved area is electrically connected to the SPI clock input end of a memory reserved area; the first end of each fourth shorting reserved area is electrically connected to the second set of inputs of the second output chip; and the second end of each fourth shorting reserved area is electrically connected to the SPI data transmitting end of a memory reserved area.
[0031] Optionally, in the embodiments disclosed herein, the first shorting reserved area, the second shorting reserved area, the third shorting reserved area and the fourth shorting reserved area are connected to zero-ohm resistors or shorting plugs.
[0032] In addition, this application also provides an LED display device, including an LED display screen, a receiving card, and a control circuit for the LED display screen as described above.
[0033] This disclosure provides a control circuit and LED display device for an LED display screen. A control module pre-installer houses multiple controllers, a storage module pre-installer houses multiple memories, a shorting pre-installer houses multiple shorting devices, and a channel selector connects the required channels. Corresponding controllers, memory cards, or shorting devices are placed as needed, enabling the receiving card to communicate with the corresponding controller or memory. Through a channel selector, the controller and receiving card can communicate via serial port, and the memory and receiving card can communicate via SPI, achieving compatibility between SPI and serial communication of the receiving card. This reduces the number of components and lowers production costs.
[0034] The above description is merely an overview of the technical solutions of the embodiments of this disclosure. In order to better understand the technical means of the embodiments of this disclosure and to implement them in accordance with the contents of the specification, and in order to understand the above and other features and advantages of the embodiments of this disclosure, the following are examples of the implementation methods of the embodiments of this disclosure.
[0035] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood. Attached Figure Description
[0036] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of the embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of the embodiments disclosed herein. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:
[0037] Figure 1 is a structural block diagram of a control circuit for an LED display screen according to an embodiment of the present disclosure;
[0038] Figure 2 is a circuit connection diagram of the selection section of the control circuit of an LED display screen according to an embodiment of the present disclosure.
[0039] Figure 3 is a schematic diagram of the circuit connection of the output section of the control circuit of an LED display screen according to an embodiment of the present disclosure.
[0040] Figure 4 is a schematic diagram of a partial circuit connection of the shorting reserve of the control circuit of an LED display screen according to an embodiment of the present disclosure.
[0041] Figure 5 is a simplified schematic diagram of a control circuit for an LED display screen according to an embodiment of this disclosure.
[0042] Figure 6 is a simplified schematic diagram of a control circuit for an LED display screen according to an embodiment of this disclosure.
[0043] in,
[0044] The labels in Figures 1-6 are as follows: 11-Receiver card; 12-Channel selector; 13-Control module reserve; 14-Storage module reserve; 15-Short-circuit reserve; UF1-Second output chip; UF2-First output chip; UF3-Second analog switch chip; UF4-First analog switch chip; U1-Controller reserve area; U2-Memory reserve area; RD1-First short-circuit reserve area; RD2-Second short-circuit reserve area; RD3-Third short-circuit reserve area; RD4-Fourth short-circuit reserve area. Detailed Implementation
[0045] The embodiments of this disclosure will be described in detail below with reference to the accompanying drawings and examples. Unless otherwise specified, the embodiments of this disclosure and the features described therein can be combined with each other.
[0046] To illustrate the technical means and effects adopted in the embodiments of this disclosure, the following detailed description, in conjunction with the accompanying drawings and embodiments, explains the implementation methods, structures, features, and effects according to the embodiments of this disclosure. In the following description, different "embodiments" or "embodiments" do not necessarily refer to the same embodiment. Furthermore, specific features, structures, or characteristics in one or more embodiments can be combined in any suitable form.
[0047] In implementing the embodiments of this disclosure, the applicant discovered that when each communication method is connected to a channel selector, since each channel selector includes several chips, the LED display control circuit not only has many components but also high cost. Therefore, it is possible to design an LED display control circuit with fewer components and lower cost.
[0048] The control circuit of the LED display screen according to an embodiment of the present disclosure is described below with reference to Figures 1 to 6.
[0049] In one embodiment, as shown in FIG1, a control circuit for an LED display screen includes a receiver card 11, a channel selector 12, a control module reserve 13, a storage module reserve 14, and a short-circuit reserve 15.
[0050] The selection signal input terminal of the channel selector 12 is electrically connected to the selection signal output terminal of the receiver card 11. The first input terminal of the channel selector 12 is electrically connected to the SPI data transmission terminal of the receiver card 11. The first output terminal of the channel selector 12 is electrically connected to the serial port data receiving terminal of the control module reservation terminal 13 and the first input terminal of the shorting reservation terminal 15. The first output terminal of the shorting reservation terminal 15 is electrically connected to the SPI data receiving terminal of the storage module reservation terminal 14. The SPI data receiving terminal of the storage module reservation terminal 14 is also electrically connected to the SPI data transmission terminal of the control module reservation terminal 13.
[0051] The second input terminal of the channel selector 12 is electrically connected to the SPI chip select output terminal of the receiver card 11, the second output terminal of the channel selector 12 is electrically connected to the second input terminal of the shorting reserve 15, the second output terminal of the shorting reserve 15 is electrically connected to the SPI chip select input terminal of the storage module reserve 14, and the SPI chip select input terminal of the storage module reserve 14 is also electrically connected to the SPI chip select output terminal of the control module reserve 13.
[0052] The third input terminal of the channel selector 12 is electrically connected to the SPI clock output terminal of the receiver card 11, the third output terminal of the channel selector 12 is electrically connected to the third input terminal of the shorting reserve 15, the third output terminal of the shorting reserve 15 is electrically connected to the SPI clock input terminal of the storage module reserve 14, and the SPI clock input terminal of the storage module reserve 14 is also electrically connected to the SPI clock output terminal of the control module reserve 13.
[0053] The fourth input terminal of the shorting reserve 15 is electrically connected to the SPI data transmitting terminal of the storage module reserve 14. The fourth output terminal of the shorting reserve 15 is electrically connected to the fourth input terminal of the channel selector 12. The fourth input terminal of the channel selector 12 is also electrically connected to the SPI data transmitting terminal of the control module reserve 13. The fourth output terminal of the channel selector output is electrically connected to the SPI data receiving terminal of the receiver card 11. The SPI data transmitting terminal of the storage module reserve 15 is also electrically connected to the SPI data receiving terminal of the control module reserve 13.
[0054] Optionally, the control module reservation space houses multiple controllers, the storage module reservation space houses multiple memories, and the shorting reservation space is equipped with multiple shorting devices. Therefore, the channel selector selects the corresponding channel to connect based on the channel selection signal of the receiving card, enabling SPI data communication between the receiving card and the corresponding controller's serial port data or the memory's SPI data. For example, when the receiving card outputs a 00 selection signal, the first channel of the channel selector is connected, enabling serial communication between the receiving card and the first controller, or SPI communication between the receiving card and the first memory.
[0055] When the controller is installed in the control module reservation, but no memory is installed in the storage module reservation, and no shorting device is installed in the shorting reservation, the controller communicates with the receiving card via RS232 serial communication through the channel selector. When the memory is installed in the storage module reservation, a shorting device is installed in the shorting reservation, and the controller is not installed in the control module reservation, the memory communicates with the receiving card via SPI communication through the channel selector. When the controller is installed in the control module reservation, a memory is installed in the storage module reservation, and no shorting device is installed in the shorting reservation, the controller communicates with the receiving card via RS232 serial communication through the channel selector, and the controller communicates with the memory via SPI communication.
[0056] This application provides a control circuit for an LED display screen. A control module pre-installer houses multiple controllers, a storage module pre-installer houses multiple memories, a shorting pre-installer houses multiple shorting devices, and a channel selector connects the required channels. Corresponding controllers, memory cards, or shorting devices are placed as needed, enabling the receiving card to communicate with the corresponding controller or memory. Through a channel selector, the controller and receiving card can communicate via serial port, and the memory and receiving card can communicate via SPI, achieving compatibility between SPI and serial communication of the receiving card. This reduces the number of components and lowers production costs.
[0057] In one embodiment, the channel selector includes a selection section and an output section, wherein...
[0058] The selection signal input terminal of the selection unit is electrically connected to the selection signal output terminal of the receiving card; the first data input terminal of the selection unit is electrically connected to the SPI data transmission terminal of the receiving card; the first output terminal of the selection unit is electrically connected to the first input terminal of the output unit; and the first output terminal of the output unit is electrically connected to the serial port data receiving terminal of the control module reserve and the first input terminal of the shorting reserve, respectively.
[0059] The second data input terminal of the selection unit is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the selection unit is electrically connected to the second input terminal of the output unit, and the second output terminal of the output unit is electrically connected to the second input terminal of the shorting reserve.
[0060] The third input terminal of the output section is electrically connected to the SPI clock output terminal of the receiver card, and the third output terminal of the output section is electrically connected to the third input terminal of the shorting reserve.
[0061] The fourth input terminal of the output unit is electrically connected to the fourth output terminal of the shorting reserve and the serial data transmission terminal of the control module reserve, respectively. The fourth output terminal of the output unit is electrically connected to the third data input terminal of the selection unit, and the third output terminal of the selection unit is electrically connected to the SPI data receiving terminal of the receiving card.
[0062] In this embodiment, the selection unit is a four-to-one analog switch. Since the control module reservation unit houses multiple controllers and the storage module reservation unit houses multiple memories, a multi-to-one analog switch can be used. Each channel output terminal of the analog switch is connected to a signal of a controller or a memory. The connection of a channel is controlled by a selection signal to determine which channel to connect. The input of the analog switch is connected to the SPI data of the receiving card, and the output of the analog switch is connected to an output device. The output device adopts a bus transceiver to realize asynchronous bidirectional communication between data buses, realizing serial communication between the SPI data of the receiving card and the controller on the control module reservation unit or SPI communication between the memory on the storage module reservation unit.
[0063] In one embodiment, as shown in FIG2, the selection unit includes a first analog switch chip UF4 and a second analog switch chip UF3, wherein...
[0064] The first selection signal input terminal of the first analog switch chip UF4 is electrically connected to the first selection signal output terminal of the receiver card 11. The second selection signal input terminal of the first analog switch chip UF4 is electrically connected to the second selection signal output terminal of the receiver card 11. The first common terminal of the first analog switch chip UF4 is electrically connected to the SPI data receiving terminal of the receiver card 11. The first group of data terminals of the first analog switch chip UF4 is electrically connected to the fourth output terminal of the output section. The second common terminal of the first analog switch chip UF4 is electrically connected to the SPI chip select output terminal of the receiver card 11. The second group of data terminals of the first analog switch chip UF4 is electrically connected to the second input terminal of the output section.
[0065] The selection signal input terminal of the second analog switch chip UF3 is electrically connected to the third selection signal output terminal of the receiver card 11, the first common terminal of the second analog switch chip UF3 is electrically connected to the SPI data transmission terminal of the receiver card 11, and the first data terminal of the second analog switch chip UF3 is electrically connected to the first input terminal of the output section.
[0066] Optionally, as an implementation of this embodiment, the analog switch uses a 74HC4052 chip, which is a dual-channel four-to-one analog switch circuit.
[0067] In the first 74HC4052 chip, the first common terminal is connected to the SPI data receiving terminal of the receiving card. The output terminal of the first set of data is connected one-to-one with the data of the output unit. The second common terminal is connected to the SPI chip select output terminal of the receiving card. The selection signal input terminal is connected to the selection signal input terminal of the receiving card. According to the selection signal, the corresponding channel is connected. For example, 00 connects the first common terminal with its corresponding first channel, so that the serial port data transmitting terminal of the first controller placed in the reserved area of the control module or the fourth output terminal of the shorting reserved terminal is connected to the SPI data receiving terminal of the receiving card. The second common terminal is connected to its corresponding first channel, so that the chip select data input terminal of the first memory placed in the reserved area of the storage module is connected to the chip select data output terminal of the SPI of the receiving card.
[0068] In the second 74HC4052, the first common terminal is connected to the SPI data transmitter of the receiver card. The output terminal of the first set of data is connected one-to-one with a set of data in the output section. According to the selection signal, the corresponding channel is connected. For example, 00 connects the first common terminal with its corresponding first channel, so that the serial port data receiver of the first controller placed in the control module reserved area or the first input terminal in the shorting reserved area is connected to the SPI data transmitter of the receiver card.
[0069] In one embodiment, as shown in FIG3, the output section includes a first output chip UF2 and a second output chip UF1, wherein...
[0070] The first set of input terminals of the first output chip UF2 is electrically connected to the first set of data terminals of the second analog switch chip UF3. The first set of output terminals of the first output chip UF2 is electrically connected to the serial port data receiving terminal of the control module reserve 13 and the first input terminal of the shorting reserve 15, respectively. The second set of input terminals of the first output chip UF2 is electrically connected to the SPI clock output terminal of the receiver card 11. The second set of output terminals of the first output chip UF2 is electrically connected to the third input terminal of the shorting reserve 15.
[0071] The first set of input terminals of the second output chip UF1 is electrically connected to the second set of data terminals of the first analog switch chip UF4. The first set of output terminals of the second output chip UF1 is electrically connected to the second input terminal of the shorting reserve 15. The second set of input terminals of the second output chip UF1 is electrically connected to the fourth output terminal of the shorting reserve 15 and the serial port data transmission terminal of the control module reserve 13, respectively. The second set of output terminals of the second output chip UF1 is electrically connected to the first set of data terminals of the first analog switch chip UF4.
[0072] In this embodiment, the output chip uses the HC245 chip. The main function of the HC245 chip is as an eight-channel bus transceiver to realize asynchronous bidirectional communication between data buses. The HC245 can realize data transmission in two directions through its control port: the DIR pin input determines the direction of data transmission, sending from bus A to bus B, or from bus B to bus A, while the OE pin input serves as an enable terminal, effectively isolating the bus.
[0073] In the first HC245 chip, input data is transmitted from bus A to bus B. The input terminal of the first set of data is connected to the SPI data transmitter of the receiver card, and the output terminal of the first set of data is connected to the serial data receiver of the control module and the first input terminal of the shorting device. The data is transmitted to the SPI data receiver of the memory through the shorting device. The input terminal of the second set of data of the first HC245 chip is connected to the SPI clock output terminal of the receiver card, and the output terminal of the second set of data is connected to the third input terminal of the shorting device. The data is transmitted to the SPI clock input terminal of the memory through the shorting device.
[0074] In the second HC245 chip, input data is also transmitted from bus A to bus B. The input terminal of the first set of data is connected to the SPI chip select output terminal of the receiver card, and the output terminal of the first set of data is connected to the second input terminal of the shorting reserve. The data is transmitted to the SPI chip select input terminal of the memory through the shorting reserve. The input terminal of the second set of data is connected to the fourth output terminal of the shorting reserve and the serial data transmission terminal of the control module reserve, respectively. The output terminal of the second set of data is connected to the first set of data terminals of the first analog switch chip. The data is sent to the SPI data receiving terminal of the receiver card through the first analog switch chip.
[0075] In one embodiment, the control module reservation unit 13 includes multiple controller reservation areas U1, and the storage module reservation unit includes multiple memory reservation areas U2, wherein...
[0076] The serial data receiving end of each controller reserved area U1 is electrically connected to the first set of outputs of the first output chip UF2. The serial data transmitting end of each controller reserved area U1 is electrically connected to the second set of inputs of the second output chip UF1. The SPI chip select output end of each controller reserved area U1 is electrically connected to the SPI chip select input end of a memory reserved area U2. The SPI clock output end of each controller reserved area U1 is electrically connected to the SPI clock input end of a memory reserved area U2. The SPI data transmitting end of each controller reserved area U1 is electrically connected to the SPI data receiving end of a memory reserved area U2. The SPI data receiving end of each controller reserved area U1 is electrically connected to the SPI data transmitting end of a memory reserved area U2.
[0077] Optionally, taking a controller reserved area and a memory reserved area as an example, as shown in Figure 4, when the controller needs to be connected, it is inserted into the controller reserved area, and RS232 serial communication between the controller and the receiving card is realized through the channel selector; when the memory needs to be connected, the memory is inserted into the memory reserved area, the controller acts as the SPI master device, and the memory acts as the SPI slave device. The controller obtains data from the receiving card through serial communication, and then transmits the data to be output to the memory to the memory card through SPI communication.
[0078] In one embodiment, the SPI chip select input of each memory reservation area U2 is electrically connected to the SPI chip select output of a controller reservation area U1 and the second output of the shorting reservation device 15, respectively; the SPI clock input of each memory reservation area U2 is electrically connected to the SPI clock output of a controller reservation area U1 and the third output of the shorting reservation device 15, respectively; the SPI data receiving end of each memory reservation area U2 is electrically connected to the SPI data transmitting end of a controller reservation area U1 and the first input of the shorting reservation device 15, respectively; and the SPI data transmitting end of each memory reservation area U2 is electrically connected to the SPI data receiving end of a controller reservation area U1 and the fourth input of the shorting reservation device, respectively.
[0079] Optionally, taking a controller reserved area and a memory reserved area as an example, as shown in Figure 4, the SPI signal terminal of the memory reserved area is connected to the SPI signal terminal of the controller reserved area. When the controller is inserted in the controller reserved area and the memory is inserted in the memory reserved area, the controller acts as the SPI master device and the memory acts as the SPI slave device. The controller obtains data from the receiving card through serial communication and then transmits the data to be output to the memory through SPI communication.
[0080] When direct SPI communication between the receiving card and the memory with the reserved storage area is required, the reserved area is shorted by inserting a shorting plug. Direct SPI communication between the memory and the receiving card is achieved by shorting the reserved area and the channel selector.
[0081] In one embodiment, the short-circuit reserve device 15 includes multiple sets of short-circuit sections, each set of short-circuit sections including a first short-circuit reserve area RD1, a second short-circuit reserve area RD2, a third short-circuit reserve area RD3, and a fourth short-circuit reserve area RD4, wherein...
[0082] The first end of each first short-circuit reserved area RD1 is electrically connected to the first set of outputs of the first output chip UF2. The second end of each first short-circuit reserved area RD1 is electrically connected to the SPI data receiving end of a memory reserved area U2. The first end of each second short-circuit reserved area RD2 is electrically connected to the first set of outputs of the second output chip UF1. The second end of each second short-circuit reserved area RD2 is electrically connected to the SPI chip select input end of a memory reserved area U2. The first end of each third short-circuit reserved area RD3 is electrically connected to the second set of outputs of the first output chip UF2. The second end of each third short-circuit reserved area RD3 is electrically connected to the SPI clock input end of a memory reserved area U2. The first end of each fourth short-circuit reserved area RD4 is electrically connected to the second set of inputs of the second output chip UF1. The second end of each fourth short-circuit reserved area RD4 is electrically connected to the SPI data transmitting end of a memory reserved area U2.
[0083] Optionally, taking a shorting section as an example, as shown in Figure 4, when the receiving card needs to communicate with the memory in the reserved storage area via SPI, a shorting plug is inserted into the first shorting reserved area, and the first set of output terminals of the first output chip is connected to the SPI data receiving terminal of a reserved memory. A shorting plug is inserted into the second shorting reserved area, and the first set of output terminals of the second output chip is electrically connected to the SPI chip select input terminal of a reserved memory. A shorting plug is inserted into the third shorting reserved area, and the second set of output terminals of the first output chip is electrically connected to the SPI clock input terminal of a reserved memory. A shorting plug is inserted into the fourth shorting reserved area, and the second set of input terminals of the second output chip is connected to the SPI data transmitting terminal of a reserved memory. Therefore, when a shorting plug is inserted into the shorting reserved area, the receiving card directly communicates with the memory in the reserved storage area via SPI. When SPI communication between the receiving card and the memory in the reserved storage area is not required, no shorting plug is inserted into the shorting reserved area.
[0084] In one embodiment, the first shorting reserved area RD1, the second shorting reserved area RD2, the third shorting reserved area RD3, and the fourth shorting reserved area RD4 are connected to zero-ohm resistors or shorting plugs.
[0085] Optionally, a zero-ohm resistor can be set in the shorting reserved area, connected by soldering or pasting, or inserted via a plug-in method. When direct SPI communication between the receiving card and the memory in the storage reserved area is required, the zero-ohm resistor or shorting plug is inserted into the shorting reserved area. When direct communication between the receiving card and the memory in the storage reserved area is not required, the zero-ohm resistor or shorting plug is not inserted into the shorting reserved area.
[0086] Conventional LED display control circuits employ two channel selectors: one for serial communication between the receiver card and the controller, and the other for SPI communication between the receiver card and the memory, as shown in Figure 5. Each channel selector includes several 74HC4052 chips and several HC245 chips, resulting in a relatively large number of components. In contrast, the LED display control circuit provided in this application uses only one channel selector (including a smaller number of 74HC4052 and HC245 chips) to achieve both serial communication between the receiver card and the controller and SPI communication between the receiver card and the memory, as shown in Figure 6. This significantly reduces the number of components used and substantially lowers production costs.
[0087] In addition, this application also provides an LED display device, including an LED display screen, a receiver card, and a control circuit for the LED display screen as described above.
[0088] This application provides an LED display device in which multiple controllers are placed in a control module reservation, multiple memories are placed in a storage module reservation, multiple shorting devices are placed in a shorting reservation, and a channel selector connects the required channels. Corresponding controllers, memory cards, or shorting devices are placed as needed, enabling the receiving card to communicate with the corresponding controller or memory. Through a channel selector, the controller and the receiving card can communicate via serial port, and the memory and the receiving card can communicate via SPI, achieving compatibility between the receiving card's SPI and serial communication. This reduces the number of components and lowers production costs.
[0089] Various modifications can be made to the embodiments described herein. Therefore, the above description should not be considered as limiting, but merely as an example of embodiments. Other modifications can be made within the scope of this application.
[0090] The accompanying drawings, which are included in and form part of this specification, illustrate embodiments of the present application and, together with the general description of the present application given above and the detailed description of the embodiments given below, serve to explain the present application.
[0091] These and other features of this application will be understood from the following description of embodiments given as non-limiting examples with reference to the accompanying drawings.
[0092] Although this application has been described with reference to some examples, those skilled in the art will be able to implement many other equivalent forms of this application.
[0093] The above and other aspects, features and advantages of this application will be understood when taken in conjunction with the accompanying drawings and in view of the following detailed description.
[0094] Embodiments of this application are described thereafter with reference to the accompanying drawings; however, the embodiments described are merely examples of this application and can be implemented in various ways. Well-known and / or repeated functions and structures are not described in detail to avoid unnecessary or redundant details that could obscure the application. Therefore, the structural and functional details described herein are not intended to be limiting, but merely to serve as the basis and representative basis for the claims to teach those skilled in the art to use this application in a variety of substantially any suitable detailed structures.
[0095] This specification may use the phrases “in one embodiment,” “in another embodiment,” “in yet another embodiment,” or “in other embodiments,” all of which may refer to one or more of the same or different embodiments according to this application.
[0096] The above embodiments are merely exemplary embodiments of this application and are not intended to limit this application. The scope of protection of this application is defined by the claims. Those skilled in the art can make various modifications or equivalent substitutions to this application within its substance and scope of protection, and such modifications or equivalent substitutions should also be considered to fall within the scope of protection of this application.
Claims
1. A control circuit for an LED display screen, comprising a receiver card, a channel selector, a control module reserveer, a storage module reserveer, and a short-circuit reserveer, wherein, The selection signal input terminal of the channel selector is electrically connected to the selection signal output terminal of the receiving card. The first input terminal of the channel selector is electrically connected to the serial peripheral interface (SPI) data transmission terminal of the receiving card. The first output terminal of the channel selector is electrically connected to the serial port data receiving terminal of the control module reservation and the first input terminal of the shorting reservation, respectively. The first output terminal of the shorting reservation is electrically connected to the SPI data receiving terminal of the storage module reservation. The SPI data receiving terminal of the storage module reservation is also electrically connected to the SPI data transmission terminal of the control module reservation. The second input terminal of the channel selector is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the channel selector is electrically connected to the second input terminal of the shorting reservation terminal, the second output terminal of the shorting reservation terminal is electrically connected to the SPI chip select input terminal of the storage module reservation terminal, and the SPI chip select input terminal of the storage module reservation terminal is also electrically connected to the SPI chip select output terminal of the control module reservation terminal. The third input terminal of the channel selector is electrically connected to the SPI clock output terminal of the receiving card; the third output terminal of the channel selector is electrically connected to the third input terminal of the shorting reservation terminal; the third output terminal of the shorting reservation terminal is electrically connected to the SPI clock input terminal of the storage module reservation terminal; and the SPI clock input terminal of the storage module reservation terminal is also electrically connected to the SPI clock output terminal of the control module reservation terminal. The fourth input terminal of the shorting reserve is electrically connected to the SPI data transmitting terminal of the storage module reserve. The fourth output terminal of the shorting reserve is electrically connected to the fourth input terminal of the channel selector. The fourth input terminal of the channel selector is also electrically connected to the SPI data transmitting terminal of the control module reserve. The fourth output terminal of the channel selection output is electrically connected to the SPI data receiving terminal of the receiving card. The SPI data transmitting terminal of the storage module reserve is also electrically connected to the SPI data receiving terminal of the control module reserve.
2. The control circuit of the LED display screen according to claim 1, wherein, When the controller is inserted into the control module reservation device, but no memory is inserted into the storage module reservation device, and no shorting device is inserted into the shorting device, the controller communicates with the receiving card via RS232 serial communication through the channel selector. When the memory is inserted into the storage module reservation device, a shorting device is inserted into the shorting device, and the controller is not inserted into the control module reservation device, the memory communicates with the receiving card via SPI communication through the channel selector. When the controller is inserted into the control module reservation device, a memory is inserted into the storage module reservation device, and no shorting device is inserted into the shorting device, the controller communicates with the receiving card via RS232 serial communication through the channel selector, and the controller communicates with the memory via SPI communication. 3.The control circuit of the LED display screen according to claim 1, wherein, The channel selector includes a selection section and an output section, wherein... The selection signal input terminal of the selection unit is electrically connected to the selection signal output terminal of the receiving card, the first data input terminal of the selection unit is electrically connected to the SPI data transmission terminal of the receiving card, the first output terminal of the selection unit is electrically connected to the first input terminal of the output unit, and the first output terminal of the output unit is electrically connected to the serial port data receiving terminal of the control module reservation device and the first input terminal of the shorting reservation device, respectively. The second data input terminal of the selection unit is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the selection unit is electrically connected to the second input terminal of the output unit, and the second output terminal of the output unit is electrically connected to the second input terminal of the shorting reserve. The third input terminal of the output section is electrically connected to the SPI clock output terminal of the receiving card, and the third output terminal of the output section is electrically connected to the third input terminal of the shorting reserve; and The fourth input terminal of the output unit is electrically connected to the fourth output terminal of the shorting reserve and the serial port data transmission terminal of the control module reserve, respectively. The fourth output terminal of the output unit is electrically connected to the third data input terminal of the selection unit, and the third output terminal of the selection unit is electrically connected to the SPI data receiving terminal of the receiving card.
4. The control circuit of the LED display screen according to claim 3, wherein, The selection unit includes a first analog switch chip and a second analog switch chip, wherein... The first selection signal input terminal of the first analog switch chip is electrically connected to the first selection signal output terminal of the receiver card; the second selection signal input terminal of the first analog switch chip is electrically connected to the second selection signal output terminal of the receiver card; the first common terminal of the first analog switch chip is electrically connected to the SPI data receiving terminal of the receiver card; the first set of data terminals of the first analog switch chip is electrically connected to the fourth output terminal of the output section; the second common terminal of the first analog switch chip is electrically connected to the SPI chip select output terminal of the receiver card; and the second set of data terminals of the first analog switch chip is electrically connected to the second input terminal of the output section. The selection signal input terminal of the second analog switch chip is electrically connected to the third selection signal output terminal of the receiver card, the first common terminal of the second analog switch chip is electrically connected to the SPI data transmission terminal of the receiver card, and the first group data terminal of the second analog switch chip is electrically connected to the first input terminal of the output section.
5. The control circuit of the LED display screen according to claim 4, wherein, The output section includes a first output chip and a second output chip, wherein... The first set of input terminals of the first output chip is electrically connected to the first set of data terminals of the second analog switch chip; the first set of output terminals of the first output chip is electrically connected to the serial port data receiving terminal of the control module reserve and the first input terminal of the shorting reserve, respectively; the second set of input terminals of the first output chip is electrically connected to the SPI clock output terminal of the receiving card; and the second set of output terminals of the first output chip is electrically connected to the third input terminal of the shorting reserve. The first set of input terminals of the second output chip is electrically connected to the second set of data terminals of the first analog switch chip, and the first set of output terminals of the second output chip is electrically connected to the second input terminal of the shorting reserve. The second set of input terminals of the second output chip is electrically connected to the fourth output terminal of the shorting reserve and the serial port data transmission terminal of the control module reserve, respectively, and the second set of output terminals of the second output chip is electrically connected to the first set of data terminals of the first analog switch chip.
6. The control circuit of the LED display screen according to claim 5, wherein, The control module reserveer includes multiple controller reserve areas, and the storage module reserveer includes multiple memory reserve areas, wherein... Each of the controller reserved areas has its serial port data receiving terminal electrically connected to the first set of output terminals of the first output chip, each of the controller reserved areas has its serial port data transmitting terminal electrically connected to the second set of input terminals of the second output chip, each of the controller reserved areas has its SPI chip select output terminal electrically connected to the SPI chip select input terminal of a memory reserved area, each of the controller reserved areas has its SPI clock output terminal electrically connected to the SPI clock input terminal of a memory reserved area, each of the controller reserved areas has its SPI data transmitting terminal electrically connected to the SPI data receiving terminal of a memory reserved area, and each of the controller reserved areas has its SPI data receiving terminal electrically connected to the SPI data transmitting terminal of a memory reserved area.
7. The control circuit of the LED display screen according to claim 6, wherein, The SPI chip select input of each memory reserved area is electrically connected to the SPI chip select output of a controller reserved area and the second output of the shorting reserved area, respectively. The SPI clock input of each memory reserved area is electrically connected to the SPI clock output of a controller reserved area and the third output of the shorting reserved area, respectively. The SPI data receiving end of each memory reserved area is electrically connected to the SPI data transmitting end of a controller reserved area and the first input of the shorting reserved area, respectively. The SPI data transmitting end of each memory reserved area is electrically connected to the SPI data receiving end of a controller reserved area and the fourth input of the shorting reserved area, respectively.
8. The control circuit of the LED display screen according to claim 6, wherein, The short-circuit pre-installed device includes multiple sets of short-circuit sections, each set of short-circuit sections including a first short-circuit pre-installed area, a second short-circuit pre-installed area, a third short-circuit pre-installed area, and a fourth short-circuit pre-installed area, wherein... The first end of each first shorting reserved area is electrically connected to the first set of outputs of the first output chip; the second end of each first shorting reserved area is electrically connected to the SPI data receiving end of a memory reserved area; the first end of each second shorting reserved area is electrically connected to the first set of outputs of the second output chip; the second end of each second shorting reserved area is electrically connected to the SPI chip select input end of a memory reserved area; the first end of each third shorting reserved area is electrically connected to the second set of outputs of the first output chip; the second end of each third shorting reserved area is electrically connected to the SPI clock input end of a memory reserved area; the first end of each fourth shorting reserved area is electrically connected to the second set of inputs of the second output chip; and the second end of each fourth shorting reserved area is electrically connected to the SPI data transmitting end of a memory reserved area.
9. The control circuit of the LED display screen according to claim 8, wherein, Zero-ohm resistors or shorting plugs are inserted into the first shorting reserved area, the second shorting reserved area, the third shorting reserved area and the fourth shorting reserved area.
10. An LED display device, comprising an LED display screen, a receiving card, and a control circuit for the LED display screen as described in any one of claims 1-9.