Display panel and display apparatus

Abstract

A display panel, comprising a first haptic control layer (182) and light-emission control traces (22), wherein the orthographic projection of the first haptic control layer (182) on a substrate base (11) overlap in a first region (2003) the orthographic projections of the light-emission control traces (22) on the substrate base (11), so as to form an overlapping region; and a shielding portion (24) is disposed between the first haptic control layer (182) and the light-emission control traces (22), and is located in the first region (2003), and the orthographic projection of the shielding portion (24) on the substrate base (11) overlaps the orthographic projection of the overlapping region on the substrate base (11). The shielding portion (24) can shield the mutual interference between the first haptic control layer (182) and the light-emission control traces (22), and avoid the crosstalk between touch control traces and backplane traces, thereby reducing or eliminating the interference with a touch control signal, and preventing the fluctuation of a report point on a touch screen. Further provided is a display apparatus comprising the above display panel.

Description

Display panel and display device Technical Field

[0001] This invention relates to the field of display technology, and more specifically, to a display panel and a display device. Background Technology

[0002] To enhance user experience, display devices are evolving towards full-screen designs. Among these, punch-hole displays represent a trend in full-screen development, involving the creation of openings in the display panel to increase the screen-to-body ratio.

[0003] To mitigate water and oxygen erosion around the opening, a step can be set on the insulating layer assembly. However, this will cause crosstalk between the touch traces and the light control traces, resulting in excessive interference to the touch signal transmission and causing the touch screen to fluctuate.

[0004] It should be noted that the information in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a display panel and display device.

[0006] According to one aspect of the present invention, a display panel is provided, the display panel having an adjacent display area and an aperture periphery area, the aperture periphery area being located inside the display area, the display panel including a driving backplate, an insulating layer group, a first touch control layer, and a shielding portion, the driving backplate including a substrate and light-emitting control traces, the light-emitting control traces being disposed on one side of the substrate; the insulating layer group being disposed on the side of the light-emitting control traces away from the substrate, the side of the insulating layer group away from the substrate having a step, the step being used to separate a common electrode and / or a light-emitting material layer, the step being located in the aperture periphery area, the step closest to the display area being further away from the display area. One side of the display area is the first region; the first tactile control layer is disposed on the side of the insulating layer group away from the substrate. The orthographic projection of the first tactile control layer on the substrate and the orthographic projection of the light-emitting control line on the substrate overlap in the first region to form an overlapping region; the shielding part and the light-emitting control line are located in the periphery region of the hole and are disposed around the opening. The shielding part is disposed between the first tactile control layer and the light-emitting control line and is at least located in the first region. The orthographic projection of the shielding part on the substrate and the orthographic projection of the overlapping region on the substrate overlap. The shielding part is used to shield the mutual interference between the first tactile control layer and the light-emitting control line.

[0007] In one embodiment of the present invention, the display panel further includes a common electrode disposed between the insulating layer group and the first touch control layer. The common electrode is separated by the step closest to the display area to form a suspended portion. The suspended portion is located in the first region, and the orthographic projection of the suspended portion on the substrate overlaps with the orthographic projection of the shielding portion on the substrate.

[0008] In one embodiment of the present invention, in the periphery region of the hole, the side of the step closest to the display area is a second region, and the part of the common electrode that is not separated by the step is a conductive part. The conductive part is located in the second region, and the orthographic projection of the conductive part on the substrate overlaps with the orthographic projection of the light-emitting control trace on the substrate and the orthographic projection of the first touch control layer on the substrate.

[0009] In one embodiment of the present invention, in the periphery region of the hole, the insulating layer group includes a planarization layer and a first partition structure. The planarization layer is disposed on the side of the light-emitting control trace away from the substrate. The first partition structure is disposed on the side of the planarization layer away from the substrate. The first partition structure includes at least one first partition portion. The first partition portion closest to the display area forms a step with the planarization layer closest to the display area near the edge of the display area. The conductive portion is disposed on the side of the planarization layer away from the substrate. The suspended portion is disposed on the side of the first partition portion away from the substrate. The planarization layer between adjacent first partition portions is on the side away from the substrate.

[0010] In one embodiment of the present invention, the display panel further includes a second touch control layer, which is disposed between the first touch control layer and the common electrode, and a shielding portion is located in the second touch control layer, and the shielding portion is loaded with a ground signal.

[0011] In one embodiment of the present invention, the first touch control layer includes a touch grid, a hole perimeter shielding electrode, and a touch shielding line. The touch grid and the touch shielding line are located in the display area and are disconnected from each other. The hole perimeter shielding electrode is located in the hole perimeter area. The touch shielding line extends from the display area to the hole perimeter area and is connected to the hole perimeter shielding electrode. The touch shielding line is loaded with a ground signal. A touch insulation layer is provided between the first touch control layer and the second touch control layer. The shielding part is connected to the hole perimeter shielding electrode through a first through-hole penetrating the touch insulation layer.

[0012] In one embodiment of the present invention, the display panel further includes a peripheral area located around the display area. The peripheral area is provided with a peripheral grounding wire, and a grounding connection wire is provided between the peripheral grounding wire and the touch shielding wire. The two ends of the grounding connection wire are respectively connected to the touch shielding wire and the peripheral grounding wire.

[0013] In one embodiment of the present invention, the driving backplane includes a gate layer and a source / drain conductive layer. The gate layer is disposed on one side of the substrate, and the source / drain conductive layer is disposed on the side of the gate layer away from the substrate. The display panel further includes a pixel electrode layer, which is disposed between the first isolation structure and the common electrode.

[0014] In one embodiment of the present invention, the light emission control trace is a gate signal line disposed on the gate layer, the shielding portion is disposed on the source-drain conductive layer, and the shielding portion is loaded with a power supply signal or a common signal.

[0015] In one embodiment of the present invention, the source and drain conductive layers further include a power signal line and a first connecting line. The power signal line is located in the display area, and the first connecting line is connected to the power signal line and the shielding portion respectively. The power signal line carries a power signal.

[0016] In one embodiment of the present invention, the source and drain conductive layers further include a common signal line and a second connecting line. The common signal line is located in the display area, and the second connecting line is connected to the common signal line and the shielding part respectively. The common signal line is loaded with a common signal.

[0017] In one embodiment of the present invention, the shielding part is disposed on the pixel electrode layer, the light emission control line is a gate signal line disposed on the gate layer or a data signal line disposed on the source-drain electrode layer, and the shielding part is loaded with a power supply signal or a common signal.

[0018] In one embodiment of the present invention, the source-drain conductive layer further includes a power signal line and a first connecting line. The power signal line is located in the display area. One end of the first connecting line is connected to the power signal line, and the other end is connected to the shielding part through a second via. The power signal line is loaded with a power signal.

[0019] In one embodiment of the present invention, the source and drain conductive layers further include a common signal line and a second connecting line. The common signal line is located in the display area, one end of the second connecting line is connected to the common signal line, and the other end is connected to the shielding part through a third via. The common signal line is loaded with a common signal.

[0020] In one embodiment of the present invention, the shielding portion is separated by the first partition portion to form a plurality of sub-shielding portions. The sub-shielding portions are disposed on the side of the first partition portion away from the substrate. The source-drain conductive layer also includes a source-drain transition portion. The orthographic projection of the source-drain transition portion on the substrate overlaps with the orthographic projection of the two adjacent sub-shielding portions on the substrate. The sub-shielding portions are connected to the two adjacent sub-shielding portions through a fourth via.

[0021] In one embodiment of the present invention, the display panel further includes a transition portion, which is disposed on the side of the second touch control layer away from the substrate. The transition portion is connected to the second touch control layer and is connected to the suspended portion through a fifth via.

[0022] In one embodiment of the present invention, the first partition structure includes at least two first partition portions, which are spaced apart. The suspended portion includes a first suspended portion and a second suspended portion. The first suspended portion is located on the side of the first partition portion away from the substrate, and the second suspended portion is located on the side of the planarization layer away from the substrate. The orthographic projection of the second suspended portion on the substrate is located between the orthographic projections of two adjacent first suspended portions on the substrate.

[0023] In one embodiment of the invention, the display panel further includes a barrier dam disposed on the side of the first partition structure near the opening.

[0024] In one embodiment of the present invention, the aperture periphery area includes a first sub-aperture periphery area and a second sub-aperture periphery area. The first sub-aperture periphery area is located between the edge of the barrier dam near the aperture and the edge of the aperture. The second sub-aperture periphery area is located between the edge of the barrier dam away from the aperture and the edge of the display area. The first sub-aperture periphery area is provided with at least one isolation unit, and the second sub-aperture periphery area is provided with at least one isolation unit. The isolation unit is used to isolate the common electrode and / or the light-emitting material layer.

[0025] According to another aspect of the present invention, a display device is provided, comprising a display panel provided in one aspect and the other aspect of the present invention.

[0026] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0028] Figure 1 is a partial cross-sectional schematic diagram of the display panel in an embodiment of the present invention when the suspended part cannot shield the interference between the touch control layer and the light emission control trace.

[0029] Figure 2 is a cross-sectional schematic diagram of the display panel according to an embodiment of the present invention when the orthographic projection of the shielding part on the substrate overlaps with the orthographic projection of the overlapping area on the substrate.

[0030] Figure 3 is a schematic diagram showing the positional relationship of the first isolation unit, the second isolation unit, the first isolation portion, and the gate signal line in an embodiment of the present invention.

[0031] Figure 4 is a partial cross-sectional schematic diagram of the display panel according to an embodiment of the present invention when the shielding part and the second touch control layer are arranged on the same layer.

[0032] Figure 5 is a cross-sectional schematic diagram of the display panel involved in the embodiment of the present invention when the orthographic projection of the first partition structure on the substrate does not overlap with the first region.

[0033] Figure 6 is a schematic diagram showing the positional relationship between the first partition and the gate signal line in an embodiment of the present invention.

[0034] Figure 7 is a plan view of the periphery of the hole in the display panel according to an embodiment of the present invention when the shielding part and the second touch control layer are arranged on the same layer.

[0035] Figure 8 is a partial planar schematic diagram of the periphery area of ​​the display panel according to an embodiment of the present invention when the shielding part and the second touch control layer are set on the same layer.

[0036] Figure 9 is a partial planar schematic diagram of the display panel involved in the embodiment of the present invention when the two ends of the grounding connection line are connected to the touch grid and the peripheral grounding line respectively.

[0037] Figure 10 is a partial planar schematic diagram of the periphery area of ​​the display panel according to an embodiment of the present invention when the shielding part is connected to the periphery shielding electrode through the first through hole.

[0038] Figure 11 is a cross-sectional schematic diagram of the display panel according to an embodiment of the present invention when the shielding part is provided in the source and drain conductive layer.

[0039] Figure 12 is a planar schematic diagram of the periphery of the hole in the display panel according to the embodiment of the present invention, when the source and drain conductive layer includes a power signal line and a first connecting line, and the first connecting line is connected to the power signal line and the shielding part respectively.

[0040] Figure 13 is a schematic diagram showing the positional relationship between the first partition portion on the substrate, the shielding portion on the substrate, and the gate signal line on the substrate according to an embodiment of the present invention.

[0041] Figure 14 is a plan view of the periphery of the hole in the display panel according to the embodiment of the present invention when the second connecting line is connected to the common signal line and the shielding part respectively.

[0042] Figure 15 is a cross-sectional schematic diagram of the display panel according to an embodiment of the present invention when the shielding part is provided in the pixel electrode layer.

[0043] Figure 16 is a plan view of the periphery of the hole in the display panel according to the embodiment of the present invention, when one end of the first connecting line is connected to the power signal line and the other end is connected to the shielding part through the second via.

[0044] Figure 17 is a plan view of the periphery of the hole in the display panel according to the embodiment of the present invention, when one end of the second connecting line is connected to the common signal line and the other end is connected to the shielding part through the third via.

[0045] Figure 18 is a plan view of the display panel according to the embodiment of the present invention when the adapter is connected to the side of the second touch control layer away from the substrate, and the other part of the adapter passes through the fifth via and is connected to the side of the suspended part away from the substrate.

[0046] Explanation of reference numerals in the attached drawings: 100-Display area; 200-Peripheral area of ​​hole; 2001-Peripheral area of ​​first sub-hole; 2002-Peripheral area of ​​second sub-hole; 2003-First region; 2004-Second region; 300-Opening; 400-Peripheral area; 11-Substrate; 12-Buffer layer; 13-Drive circuit layer; 131-Active portion; 1321-First gate insulating layer; 1322-Second gate insulating layer; 1331-First gate; 1332-Second gate; 134-Interlayer dielectric layer; 135-First source; 136-Drain; 137-Protective layer; 138-Second source; 14-Planing layer; 141-First planarization layer; 142-Second planarization layer; 15-Pixel defining layer; 151-Pixel opening; 152-First isolation opening; 16-Light-emitting layer, 161-Pixel electrode, 162-Light-emitting material layer, 1621-Common layer, 1622-Light-emitting layer group, 1623-Light-emitting insulating layer, 163-Common electrode, 164-Conductive part, 165-Floating part, 1651-First floating part, 1652-Second floating part, 1653-Third floating part, 1654-Fourth floating part, 1655-Fifth floating part; 17-Encapsulation layer, 171-First inorganic encapsulation layer, 172-Organic encapsulation layer, 173-Second inorganic encapsulation layer; 18-Touch control layer, 181-First passivation layer, 182-First touch control layer, 1821-Peripheral shielding electrode, 1822-Touch grid, 1823-Touch shielding line, 183-Touch insulating layer, 184-Second touch control layer; 19-Cover layer; 20-Barrier dam; 201-First insulating layer; 202-Second insulating layer; 203-Third insulating layer; 21-Isolation unit; 211-First isolation unit; 212-Second isolation unit; 22-Light emission control trace; 221-Gate signal line; 23-Isolation layer; 231-Second isolation section; 232-First isolation section; 233-First groove; 234-Second groove; 24-Shielding section; 241-Sub-shielding section; 25-Ground connection line; 26-External grounding line; 27-Power signal line; 28-First connection line; 29-Common signal line; 30-Second connecting line; 31-Adapter section; 32-First via; 33-Second via; 34-Third via; 35-Fifth via; 351-Second etched groove; 352-Third etched groove; 36-Virtual touch trace; 37-Signal shielding trace; 371-Signal shielding section; 372-Bridging shielding section; 38-First etched groove; 39-Source-drain adapter section; 40-Fourth via. Detailed Implementation

[0047] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that the invention will be thorough and complete, and the concept of the exemplary embodiments will be fully conveyed to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore their detailed description will be omitted. Furthermore, the drawings are merely illustrative of the invention and are not necessarily drawn to scale.

[0048] Although relative terms such as "up" and "down" are used in this specification to describe the relative relationship of one component of an icon to another, these terms are used only for convenience, such as according to the orientation of the examples shown in the accompanying drawings. It is understood that if the device of the icon is flipped upside down, the component described as "up" will become the component described as "down." When a structure is "up" of another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is "directly" mounted on the other structure, or that the structure is "indirectly" mounted on the other structure through another structure.

[0049] The terms “a,” “one,” “the,” “the,” and “at least one” are used to indicate the presence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended inclusion and to mean that there may be other elements / components / etc. in addition to the listed elements / components / etc.; the terms “first,” “second,” and “third,” etc., are used only as markers and are not a limitation on the number of objects.

[0050] To enhance user experience, display devices are evolving towards full-screen designs, with punch-hole displays being a key trend. This involves creating openings in the display panel to increase the screen-to-body ratio. To further reduce power consumption, stacked light-emitting devices are used in the emissive layer, reducing the luminous current while maintaining the same brightness, thus lowering power consumption. However, because stacked light-emitting devices exhibit greater crosstalk, it's necessary to isolate the emissive layer from the common electrode to minimize the impact of crosstalk on the display.

[0051] As shown in Figure 1, for a punch-hole screen, in order to achieve a better power-off effect in the periphery area 200 of the hole between the opening 300 and the display area 100, a step can be set on the side of the insulating layer group away from the substrate 11 to block the common electrode 163 extending to the periphery area 200 of the hole, thus better preventing black spots (GDSH) at the edge of the hole. However, since the common electrode 163 around the opening 300 forms a suspended portion 165 when it is blocked, the orthographic projection of the first touch control layer 182 on the substrate 11, the orthographic projection of the light-emitting control line 22 on the substrate 11, and the orthographic projection of the suspended portion 165 on the substrate 11 overlap with each other. The suspended portion 165 cannot shield the interference between the touch control layer 182 and the light-emitting control line 22. When the screen is not lit, the touch is normal. When the screen is lit, the touch signal loaded on the touch control layer 18 and the light-emitting control signal of the light-emitting control line 22 have crosstalk, resulting in greater interference to the transmission of the touch signal, thus causing the touch screen to fluctuate.

[0052] Based on this, the present invention provides a display panel. As shown in Figures 2 to 18, the display panel has a display area 100 and a hole peripheral area 200 arranged adjacently. The hole peripheral area 200 is located inside the display area 100. The display panel includes a driving back plate, an insulating layer group, a first touch control layer 182, and a shielding portion 24. The driving back plate includes a substrate 11 and light-emitting control lines 22. The light-emitting control lines 22 are disposed on one side of the substrate 11. The insulating layer group is disposed on the side of the light-emitting control lines 22 away from the substrate 11. The side of the insulating layer group away from the substrate 11 has a step, which is used to separate the common electrode 163 and / or the light-emitting material layer 162. The step is located in the hole peripheral area 200. The side of the step closest to the display area 100 away from the display area 100 is the first region. 2003; The first tactile control layer 182 is disposed on the side of the insulating layer group away from the substrate 11. The orthographic projection of the first tactile control layer 182 on the substrate 11 overlaps with the orthographic projection of the light-emitting control line 22 on the substrate 11 in the first region 2003, forming an overlapping region; The shielding part 24 and the light-emitting control line 22 are located in the hole peripheral region 200 and are disposed around the opening 300. The shielding part 24 is disposed between the first tactile control layer 182 and the light-emitting control line 22, and is at least located in the first region 2003. The orthographic projection of the shielding part 24 on the substrate 11 overlaps with the orthographic projection of the overlapping region on the substrate 11. The shielding part 24 is used to shield the mutual interference between the first tactile control layer 182 and the light-emitting control line 22.

[0053] The orthographic projection of the first touch control layer 182 on the substrate 11 and the orthographic projection of the light emission control trace 22 on the substrate 11 overlap in the first region 2003, forming an overlapping area. The shielding part 24 is disposed between the first touch control layer 182 and the light emission control trace 22 and is located in the first region 2003. The orthographic projection of the shielding part 24 on the substrate 11 overlaps with the orthographic projection of the overlapping area on the substrate 11. The shielding part 24 can shield the mutual interference between the first touch control layer 182 and the light emission control trace 22, avoid crosstalk between the touch trace and the back panel trace, thereby reducing or eliminating interference to the touch signal and preventing touch screen reporting floating.

[0054] The display panel involved in the embodiments of the present invention will be described in detail below with reference to specific examples.

[0055] As shown in Figure 2, the display panel generally includes a substrate 11, a driving circuit layer 13, and a light-emitting layer 16. The driving circuit layer 13 includes an active layer, a gate layer, and a source / drain conductive layer. The active layer is disposed on one side of the substrate 11. The gate layer includes a first gate 1331 layer and a second gate 1332 layer. The first gate 1331 layer is disposed on the side of the active layer away from the substrate 11, and the second gate 1332 layer is disposed on the side of the first gate 1331 layer away from the substrate 11. The source / drain conductive layer is disposed on the side of the second gate 1332 layer away from the substrate 11. The light-emitting layer 16 includes a pixel electrode 161 layer, a light-emitting material layer 162, and a common electrode 163. The pixel electrode 161 layer is disposed on the side of the driving circuit layer 13 away from the substrate 11, the light-emitting material layer 162 is disposed on the side of the pixel electrode 161 layer away from the substrate 11, and the common electrode 163 is disposed on the side of the light-emitting material layer 162 away from the substrate 11. In addition, the display panel may also include a buffer layer 12, which may be disposed between the substrate 11 and the driving circuit layer 13.

[0056] The substrate 11 can be an inorganic material substrate 11 or an organic material substrate 11. For example, in one embodiment of this disclosure, the material of the substrate 11 can be a glass material such as soda-lime glass, quartz glass, or sapphire glass, or a metal material such as stainless steel, aluminum, or nickel.

[0057] In another embodiment of this disclosure, the substrate 11 may also be a flexible substrate 11, for example, the material of the substrate 11 may be polyimide (PI). The substrate 11 may also be a composite of multiple materials. For example, in one embodiment of this disclosure, the substrate 11 may include a bottom film layer, a pressure-sensitive adhesive layer, a first polyimide layer and a second polyimide layer stacked sequentially.

[0058] In the display area 100, the driving circuit layer 13 is provided with a driving circuit for driving the light-emitting unit. The driving circuit is located in the display area 100, and any driving circuit may include a transistor, which may be a thin-film transistor. The thin-film transistor may be selected from a top-gate thin-film transistor, a bottom-gate thin-film transistor, or a dual-gate thin-film transistor. Taking a top-gate thin-film transistor as an example, the thin-film transistor may include an active part 131, a first gate 1331, a second gate 1332, a first gate insulating layer 1321, a second gate insulating layer 1322, and a source / drain electrode 136, wherein: the active part 131 is located in the active layer, the first gate 1331 is located in the first gate 1331 layer, the second gate 1332 is located in the second gate 1332 layer, and the source / drain electrode 136 is located in the source / drain conductive layer.

[0059] The active portion 131 is disposed on one side of the substrate 11. The material of the active portion 131 can be amorphous silicon semiconductor material, low-temperature polycrystalline silicon semiconductor material, metal oxide semiconductor material, organic semiconductor material, or other types of semiconductor material. Therefore, the thin film transistor can be an N-type thin film transistor or a P-type thin film transistor. The active portion 131 may include a channel region and two doped regions of different doping types located on both sides of the channel region.

[0060] A first gate insulating layer 1321 is disposed on the side of the active portion 131 away from the substrate 11. The first gate insulating layer 1321 can cover the active portion 131 and the substrate 11. A first gate 1331 is disposed on the side of the first gate insulating layer 1321 away from the substrate 11 and is directly opposite to the active portion 131. That is, the projection of the first gate 1331 on the substrate 11 is located within the projection range of the active portion 131 on the substrate 11. For example, the projection of the first gate 1331 on the substrate 11 coincides with the projection of the channel region of the active portion 131 on the substrate 11. A second gate insulating layer 1322 is disposed on the side of the first gate 1331 away from the substrate 11. The second gate insulating layer 1322 can cover the first gate 1331 and the first gate insulating layer 1321. The second gate 1332 is disposed on the side of the second gate insulating layer 1322 away from the substrate 11 and is directly opposite to the active portion 131. The first gate insulating layer 1321 and the second gate insulating layer 1322 are both made of insulating materials such as silicon oxide.

[0061] The thin-film transistor may further include an interlayer dielectric layer 134, which is disposed on the side of the second gate 1332 away from the substrate 11. The interlayer dielectric layer 134 may cover the second gate 1332 and the second gate insulating layer 1322, and both interlayer dielectric layers 134 are made of insulating material. Source and drain electrodes 136 are disposed on the surface of the interlayer dielectric layer 134 away from the substrate 11, and the source and drain electrodes 136 include a first source electrode 135 and a drain electrode 136. The first source electrode 135 and the drain electrode 136 are connected to the active portion 131. For example, the first source electrode 135 and the drain electrode 136 are respectively connected to two doped regions of the corresponding active portion 131 through vias.

[0062] A planarization layer 14 is provided on the side of the source / drain electrode 136 away from the substrate 11. The planarization layer 14 may include a first planarization layer 141, and the surface of the first planarization layer 141 away from the substrate 11 is planar. The source / drain electrode 136 may also include a second source electrode 138, which is connected to the first source electrode 135. A second planarization layer 142 is provided on the side of the second source electrode 138 away from the substrate 11, covering the second source electrode 138 and the first planarization layer 141. A protective layer 137 may also be provided on the side of the first source electrode 135 away from the substrate 11, covering the first source electrode 135 and the drain electrode 136. The first planarization layer 141 covers the protective layer 137. It should be noted that the first source electrode 135 and the drain electrode 136 are located in the first source / drain metal layer of the driving circuit layer 13, and the second source electrode 138 is located in the second source / drain metal layer of the driving circuit layer 13.

[0063] A pixel defining layer 15 is disposed on the side of the first planarization layer 141 or the second planarization layer 142 away from the array substrate. The pixel defining layer 15 has multiple pixel openings 151. The light-emitting layer 16 may include multiple light-emitting units, each disposed within a different pixel opening 151. Each light-emitting unit may include a pixel electrode 161, a light-emitting material layer 162, and a common electrode 163. The pixel electrode 161 is disposed on the pixel electrode layer, located on the surface of the first planarization layer 141 or the second planarization layer 142 away from the substrate 11. The light-emitting material layer 162 is disposed on the surface of the pixel electrode 161 away from the substrate 11, and the common electrode 163 is disposed on the surface of the light-emitting material layer 162 away from the substrate 11. The light-emitting material layer 162 can be driven to emit light through the pixel electrode 161 and the common electrode 163 to display an image.

[0064] Pixel electrode 161 is connected to either the first source 135 or the second source 138. A pixel defining layer 15 is provided on the side of pixel electrode 161 away from the substrate 11. When the thin-film transistor includes only the first source 135, pixel electrode 161 is connected to the first source 135, and the pixel defining layer 15 covers pixel electrode 161 and the first planarization layer 141. When the thin-film transistor also includes the second source 138, pixel electrode 161 is connected to the second source 138, and the pixel defining layer 15 covers pixel electrode 161 and the second planarization layer 142.

[0065] The common electrode 163 can serve as the cathode, and the pixel electrode 161 can serve as the anode. The light-emitting material layer 162 can be driven to emit light by applying a signal to the pixel electrode 161; the specific light-emitting principle will not be detailed here. The light-emitting material layer 162 may contain electroluminescent organic light-emitting materials and can be formed using processes such as vapor deposition. For example, the light-emitting material layer 162 may include a hole injection layer, a hole transport layer, a light generation layer, an electron transport layer, and an electron injection layer sequentially stacked on the pixel electrode 161 layer. It should be noted that the light-emitting material layer 162 may include a red light-emitting material layer 162, a green light-emitting material layer 162, and a blue light-emitting material layer 162, depending on the emitted color.

[0066] When the light-emitting unit is a stacked light-emitting device, the light-emitting material layer 162 includes a common layer 1621 and two light-emitting layer groups 1622. The two light-emitting layer groups 1622 are respectively disposed on the side of the common layer 1621 near the substrate 11 and on the side of the common layer 1621 away from the substrate 11. To prevent crosstalk, a partition groove can be provided between two adjacent pixel openings 151 to isolate the common layer 1621 between the two adjacent pixel openings 151. The partition groove may include a first groove 253 and a first partition opening 152 sequentially disposed along the direction away from the substrate 11. The first groove 253 and the first partition opening 152 are interconnected. The first groove 253 is disposed on the second planarization layer 142, and the first partition opening 152 is disposed on the pixel defining layer 15. The orthographic projection of the first partition opening 152 on the substrate 11 can be arranged within the orthographic projection of the first groove 253 on the substrate 11.

[0067] As shown in Figure 2, the orthographic projection of the first groove 253 on the substrate 11 can also be located within the orthographic projection of the first partition opening 152 on the substrate 11. In order to ensure effective isolation of the common layer 1621, the display panel can also include a partition layer 23. The partition layer 23 is located on the side of the second planarization layer 142 away from the substrate 11. The partition layer 23 includes a second partition structure, which includes a plurality of second partition portions 231. One second partition portion 231 can be provided to extend beyond the edge of the first groove 253, and the common layer 1621 is isolated at the edge of the second partition portion 231.

[0068] It should be noted that the partition layer 23 is generally an inorganic insulating layer, and the material of the partition layer 23 includes at least one of silicon nitride, silicon oxynitride, and silicon oxide.

[0069] To ensure the isolation effect and avoid the situation where one second partition 231 cannot effectively isolate the common layer 1621, two second partitions 231 can be provided between every two pixel openings 151. Both second partitions 231 extend beyond the edge of the first groove 253, so that the orthographic projection of the second partition opening formed between the two second partitions 231 on the substrate 11 is located within the orthographic projection of the first groove 233 on the substrate 11. The common layer 1621 is isolated by the two second partitions 231, thus ensuring the isolation effect.

[0070] Furthermore, the display panel disclosed herein may also include an encapsulation layer 17, which is disposed on the side of the light-emitting layer 16 away from the substrate 11, thereby encapsulating the light-emitting layer 16 and preventing water and oxygen corrosion. The encapsulation layer 17 may be a single-layer or multi-layer structure, and the material of the encapsulation layer 17 may include organic or inorganic materials, without special limitations herein.

[0071] In this embodiment, the encapsulation layer 17 may include a first inorganic encapsulation layer 171, an organic encapsulation layer 172, and a second inorganic encapsulation layer 173. The first inorganic encapsulation layer 171 is disposed on the side of the light-emitting layer 16 away from the substrate 11, the organic encapsulation layer 172 is disposed on the side of the first inorganic encapsulation layer 171 away from the substrate 11, and the second inorganic encapsulation layer 173 is disposed on the side of the organic encapsulation layer 172 away from the substrate 11.

[0072] The display panel also includes a touch control layer 18, which can be a mutual capacitance touch control layer. The touch control layer 18 includes a first passivation layer 181, a first touch control layer 182, a touch insulating layer 183, and a second touch control layer 184. The first passivation layer 181 is disposed on the side of the encapsulation layer 17 away from the substrate 11. The second touch control layer 184 is disposed on the side of the first passivation layer 181 away from the substrate 11. The touch insulating layer 183 is disposed on the side of the second touch control layer 184 away from the substrate 11. The first touch control layer 182 is disposed on the side of the touch insulating layer 183 away from the substrate 11. The cover layer 19 is disposed on the side of the first touch control layer 182 away from the substrate 11.

[0073] As shown in Figure 2, in this embodiment, the display panel has an opening 300, and the peripheral area 200 of the opening is located between the edge of the opening 300 and the edge of the display area 100. Because of the flow of liquid organic encapsulation material, leakage of the liquid organic encapsulation material is likely to occur. To prevent leakage, a barrier dam 20 is provided in the peripheral area 200 of the opening. The barrier dam 20 is located on the side of the protective layer 137 away from the substrate 11, and is arranged around the opening 300. The barrier dam 20 serves to block the organic encapsulation material. The cross-sectional shape of the barrier dam 20 can be rectangular or trapezoidal, and the barrier dam 20 must have at least one side near the display area 100 that is sloped; this is not limited here.

[0074] The stacked pattern of the barrier dam 20 is made of one or more layers of the same material as the first planarization layer 141, the second planarization layer 142, and the pixel defining layer 15. As shown in Figure 2, the stacked pattern of the barrier dam 20 includes a first insulating layer 201, which is made of the same material as the first planarization layer 141. A second insulating layer 202 can also be provided on the first insulating layer 201, which is made of the same material as the second planarization layer 142. A third insulating layer 203 can also be provided on the second insulating layer 202, which is made of the same material as the pixel defining layer 15.

[0075] Referring to Figures 3 and 4, the hole periphery area 200 includes a first sub-hole periphery area 2001 and a second sub-hole periphery area 2002. The first sub-hole periphery area 2001 is located between the edge of the barrier dam 20 near the opening 300 and the edge of the opening 300. The second sub-hole periphery area 2002 is located between the edge of the barrier dam 20 away from the opening 300 and the edge of the display area 100, meaning the second sub-hole periphery area 2002 is located closer to the display area 100, while the first sub-hole periphery area 2001 is located further away from the display area 100 than the second sub-hole periphery area 2002. The hole periphery area 200 has multiple isolation units 21, which include multiple first isolation units 211 and multiple second isolation units 212. The multiple first isolation units 211 are located in the first sub-hole periphery area 2001, and the multiple second isolation units 212 are located in the second sub-hole periphery area 2002. The number of first isolation units 211 is greater than the number of second isolation units 212.

[0076] The partition layer 23 also includes a first partition structure, which is disposed in the peripheral area 2002 of the second sub-hole. The first partition structure includes a plurality of first partition portions 232 arranged sequentially at intervals along the direction away from the display area 100. The first partition portions 232 are arranged around the opening 300, and a partition groove is formed between two adjacent first partition portions 232. There is a step difference between the side of the first partition portion 232 away from the substrate 11 and the side of the partition groove away from the substrate 11. The two sides of the step closest to the display area 100 are the first region 2003 and the second region 2004, respectively. Light emission control lines 22 are provided in both the first region 2003 and the second region 2004.

[0077] The light-emitting control trace 22 is disposed in the peripheral region 2002 of the second sub-via. The light-emitting control trace 22 may include a gate signal line 221, which may be disposed on the same layer as the first gate 1331, the second gate 1332, or both the first and second gates 1331. In other embodiments, the light-emitting control trace 22 may also include a data signal line, which may be disposed on the same layer as the source / drain conductive layer.

[0078] When the light-emitting control line 22 and the second gate 1332 are disposed on the same layer, a protective layer 137 is disposed on the side of the light-emitting control line 22 away from the substrate 11. A first planarization layer 141 is disposed on the side of the protective layer 137 away from the substrate 11. A second planarization layer 142 is disposed on the side of the first planarization layer 141 away from the substrate 11. A second groove 234 is disposed on the second planarization layer 142 between the first partition portion 232 closest to the display area 100 and the edge of the display area 100. A step is formed between the edge of the first partition portion 232 and the bottom of the second groove 234. A common electrode 163 extends from the display area 100 to the peripheral area 2002 of the second sub-hole. The common electrode 163 is isolated by the step closest to the display area 100, forming a conductive portion 164 and a suspended portion 165.

[0079] The first partition structure includes at least two first partition portions 232, which are spaced apart. The suspended portion 165 includes a first suspended portion 1651 and a second suspended portion 1652. The first suspended portion 1651 is located on the side of the first partition portion 232 away from the substrate 11. A second groove 234 is provided between two adjacent first suspended portions 1651, and the second suspended portion 1652 is located at the bottom of the second groove 234 between two adjacent first suspended portions 1651. Firstly, the width of the suspended portion 165 can be increased. Secondly, a drainage channel can be formed between two adjacent first partition portions 232, extending the intrusion path of water and oxygen. It should be noted that, to further ensure that the common electrode 163 is isolated, the width of the second groove 234 can be gradually reduced along the direction away from the substrate 11.

[0080] The suspended portion 165 may further include a third suspended portion 1653, a fourth suspended portion 1654 and a fifth suspended portion 1655. The third suspended portion 1653 is disposed on the side of the isolation unit 21 away from the substrate 11, the fourth suspended portion 1654 is disposed between two adjacent isolation units 21, and the fifth suspended portion 1655 is disposed on the side of the barrier dam 20 away from the substrate 11.

[0081] As shown in Figure 5, the first touch control layer 182 extends to the periphery region 200 of the hole. The orthographic projection of the first touch control layer 182 on the substrate 11 overlaps with the orthographic projection of the light-emitting control trace 22 on the substrate 11 in the first region 2003, forming an overlapping area. The display panel also includes a shielding portion 24, which is disposed on the second touch control layer 184, that is, the shielding portion 24 and the second touch control layer 184 are disposed on the same layer. The shielding portion 24 is located in the first region 2003 and can receive a ground signal. It can be understood that the shielding portion 24 is disposed between the first touch control layer 182 and the light-emitting control trace 22, and the ground signal on the shielding portion 24 can shield the interference between the touch signal of the first touch control layer 182 and the light-emitting control signal of the light-emitting control trace 22.

[0082] The first haptic control layer 182 may include a touch mesh 1822, which may be a metal mesh layer (MM). The second haptic control layer 184 may be a touch bridging layer, which may be a bridge metal layer (BM). The first haptic control layer 182 may also be a bridge metal layer (BM), and the second haptic control layer 184 may be a metal mesh layer (MM).

[0083] As shown in Figures 6 to 10, the specific method for applying a grounding signal to the perforated shielding electrode 1821 is as follows:

[0084] The first tactile control layer 182 includes a touch grid 1822, a hole-peripheral shielding electrode 1821, and a touch shielding line 1823. The touch grid 1822 and the touch shielding line 1823 are located in the display area 100 and are disconnected from each other. The hole-peripheral shielding electrode 1821 is located in the hole-peripheral area 200 and is used to realize the touch function around the opening 300. The touch shielding line 1823 extends from the display area 100 to the hole-peripheral area 200 and is connected to the hole-peripheral shielding electrode 1821. The touch shielding line 1823 is loaded with a ground signal.

[0085] As shown in Figure 9, the display panel also includes a peripheral area 400, which is located around the display area 100. The peripheral area 400 is provided with a peripheral grounding wire 26. A grounding connection wire 25 is provided between the peripheral grounding wire 26 and the touch shielding wire 1823. The two ends of the grounding connection wire 25 are connected to the touch shielding wire 1823 and the peripheral grounding wire 26, respectively. The peripheral grounding wire 26 carries a grounding signal. The grounding signal can be transmitted from the peripheral grounding wire 26 to the touch shielding wire 1823, then from the touch shielding wire 1823 to the perforated shielding electrode 1821, and finally from the perforated shielding electrode 1821 to the shielding part 24.

[0086] The second tactile control layer 184 includes a shielding portion 24, which surrounds the opening 300 and is connected to the periphery shielding electrode 1821 through a first through-hole 32. The grounding signal is then transmitted from the touch grid 1822 to the periphery shielding electrode 1821, and then from the periphery shielding electrode 1821 to the shielding portion 24.

[0087] The display panel also includes a signal shielding trace 37, which comprises a signal shielding section 371 and a bridging shielding section 372. The signal shielding trace 37 is located between the touch grid 1822 and the peripheral ground line 26. The signal shielding section 371 is located on both sides of the ground connection line 25. The bridging shielding section 372 is on a different layer from the two signal shielding sections 371, and its two ends are connected to the two signal shielding sections 371 respectively. Multiple sets of virtual touch traces 36 are provided between the signal shielding trace 37 and the peripheral ground line 26, with two sets of virtual touch traces 36 located on both sides of the ground connection line 25. The signal shielding trace 37 can shield the signals of the virtual touch traces 36, preventing interference from the virtual touch traces 36 to the touch signals.

[0088] As shown in Figure 11, the difference from Figure 5 is that the light-emitting control trace 22 is a gate signal line 221 located on the gate layer, and the shielding portion 24 is located on the source-drain conductive layer. As shown in Figures 12 and 13, the source-drain conductive layer also includes a power signal line 27 and a first connecting line 28. The shielding portion 24 is located in the peripheral area 2002 of the second sub-hole. The power signal line 27 is located in the display area 100. The first connecting line 28 extends from the display area 100 to the peripheral area 2002 of the second sub-hole. The first connecting line 28 is connected to the power signal line 27 and the shielding portion 24 respectively. The power signal line 27 is loaded with a power signal. As shown in Figure 14, the source-drain conductive layer also includes a common signal line 29 and a second connecting line 30. The common signal line 29 is located in the display area 100. The second connecting line 30 extends from the display area 100 to the peripheral area 2002 of the second sub-hole. The second connecting line 30 is connected to the common signal line 29 and the shielding portion 24 respectively. The common signal line 29 is loaded with a common signal and is located between two adjacent power signal lines 27.

[0089] As shown in Figure 15, the difference from Figures 5 and 11 is that the shielding portion 24 is disposed on the pixel electrode 161 layer, and the light-emitting control trace 22 can be a gate signal line 221 disposed on the gate layer or a data signal line disposed on the source / drain electrode layer. A light-emitting insulating layer 1623 is disposed between the common electrode 163 and the shielding portion 24. As shown in Figure 15, the shielding portion 24 is separated by the first partition portion 232 to form a plurality of sub-shielding portions 241. The sub-shielding portions 241 are disposed on the side of the first partition portion 232 away from the substrate 11. The source / drain conductive layer also includes a source / drain transition portion 39. The orthographic projection of the source / drain transition portion 39 on the substrate 11 overlaps with the orthographic projection of two adjacent sub-shielding portions 241 on the substrate 11. The sub-shielding portions 241 are connected to two adjacent sub-shielding portions 241 through the fourth via 40.

[0090] As shown in Figure 16, the source-drain conductive layer also includes a power signal line 27 and a first connecting line 28. A shielding portion 24 is disposed in the peripheral area 2002 of the second sub-hole. The power signal line 27 is located in the display area 100. The first connecting line 28 extends from the display area 100 to the peripheral area 2002 of the second sub-hole. One end of the first connecting line 28 is connected to the power signal line 27, and the other end is connected to the shielding portion 24 through a second via 33. The power signal line 27 carries a power signal. As shown in Figure 17, the source-drain conductive layer also includes a common signal line 29 and a second connecting line 30. The common signal line 29 is located in the display area 100. One end of the second connecting line 30 is connected to the common signal line 29, and the other end is connected to the shielding portion 24 through a third via 34. The common signal line 29 carries a common signal.

[0091] Understandably, the second, third, and fourth vias all penetrate the partition layer, the planarization layer, and partially pass through the protective layer.

[0092] As shown in Figure 18, based on Figure 5, a first etched groove 38 is formed by etching over the touch insulating layer 183, a second etched groove 351 is formed by etching over the first passivation layer 181, and a third etched groove 352 is formed by etching over the encapsulation layer 17. The second etched groove 351 and the third etched groove 352 constitute a fifth via 35. The display panel also includes a transition portion 31. A portion of the transition portion 31 is disposed within the first etched groove 38. The transition portion 31 is connected to the side of the second touch control layer 184 away from the substrate 11. The other portion of the transition portion 31 passes through the fifth via 35 and is connected to the side of the suspended portion 165 away from the substrate 11. The ground signal on the second touch control layer 184 can be transmitted to the suspended portion 165, preventing the suspended portion 165 from coupling with the touch signal loaded on the first touch control layer 182, causing the suspended portion 165 to fail due to power failure, resulting in black spots (GDSH) at the edge of the hole.

[0093] Additionally, it should be noted that the conductive portion 164 extends from the display area 100 to the area of ​​the first partition portion 232 closest to the display area 100. In the display area 100 and the area of ​​the first partition portion 232 closest to the display area 100, the conductive portion 164 can shield the signal between the light-emitting control line 22 and the first touch control layer 182, thereby avoiding crosstalk between the light-emitting control signal loaded on the light-emitting control line 22 and the touch signal loaded on the first touch control layer 182.

[0094] This disclosure also provides a display device, which may include the display panel mentioned above in this disclosure. The specific structure and beneficial effects of the display panel have been described in detail above, and therefore will not be repeated here.

[0095] It should be noted that, in addition to the display panel, the display device also includes other necessary components and parts, such as the casing, circuit board, power cord, etc. Those skilled in the art can make corresponding additions according to the specific usage requirements of the display device, which will not be elaborated here.

[0096] Display devices can be traditional electronic devices, such as mobile phones, computers, televisions, and video recorders, or emerging wearable devices, such as virtual reality devices and augmented reality devices, which will not be listed here.

[0097] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention described herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not invented herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the appended claims.

Claims

1. A display panel, wherein, The display panel has an opening, and the display panel has an adjacent display area and a periphery area around the opening. The periphery area is located inside the display area. The display panel includes: A driving backplane includes a substrate and light-emitting control traces, wherein the light-emitting control traces are disposed on one side of the substrate. An insulating layer group is disposed on the side of the light-emitting control trace away from the substrate. The side of the insulating layer group away from the substrate has a step, which is used to separate the common electrode and / or the light-emitting material layer. The step is located in the periphery area of ​​the hole, and the side of the step closest to the display area away from the display area is a first region. The first tactile control layer is disposed on the side of the insulating layer group away from the substrate. The orthographic projection of the first tactile control layer on the substrate and the orthographic projection of the light-emitting control trace on the substrate overlap in the first region to form an overlapping area. A shielding portion is provided, wherein the shielding portion and the light-emitting control trace are located in the peripheral area of ​​the hole and are arranged around the opening. The shielding portion is disposed between the first tactile control layer and the light-emitting control trace, and is at least located in the first region. The orthographic projection of the shielding portion on the substrate overlaps with the orthographic projection of the overlapping area on the substrate. The shielding portion is used to shield the mutual interference between the first tactile control layer and the light-emitting control trace.

2. The display panel according to claim 1, wherein, The display panel further includes a common electrode, which is disposed between the insulating layer group and the first touch control layer. The common electrode is separated by the step closest to the display area to form a suspended portion. The suspended portion is located in the first region, and the orthographic projection of the suspended portion on the substrate overlaps with the orthographic projection of the shielding portion on the substrate.

3. The display panel according to claim 2, wherein, In the periphery region of the hole, the side of the step closest to the display area is the second region. The part of the common electrode that is not separated by the step is the conductive part. The conductive part is located in the second region. The orthographic projection of the conductive part on the substrate overlaps with the orthographic projection of the light emission control trace on the substrate and the orthographic projection of the first touch control layer on the substrate.

4. The display panel according to claim 3, wherein, In the area surrounding the hole, the insulating layer group includes a planarization layer and a first partition structure. The planarization layer is disposed on the side of the light-emitting control trace away from the substrate. The first partition structure is disposed on the side of the planarization layer away from the substrate. The first partition structure includes at least one first partition portion. The first partition portion closest to the display area forms a step with the planarization layer closest to the display area near the edge of the display area. The conductive portion is disposed on the side of the planarization layer away from the substrate. The suspended portion is disposed on the side of the first partition portion away from the substrate. The planarization layer between adjacent first partition portions is disposed on the side away from the substrate.

5. The display panel according to claim 4, wherein, The display panel further includes a second touch control layer, which is disposed between the first touch control layer and the common electrode. The shielding part is located in the second touch control layer and is loaded with a ground signal.

6. The display panel according to claim 5, wherein, The first touch control layer includes a touch grid, a perforated shielding electrode, and a touch shielding line. The touch grid and the touch shielding line are located in the display area and are disconnected from each other. The perforated shielding electrode is located in the area surrounding the hole. The touch shielding line extends from the display area to the area surrounding the hole and is connected to the perforated shielding electrode. The touch shielding line carries a ground signal. A touch insulating layer is provided between the first touch control layer and the second touch control layer. The shielding part is connected to the perforated shielding electrode through a first through-hole penetrating the touch insulating layer.

7. The display panel according to claim 6, wherein, The display panel also includes a peripheral area located around the display area. The peripheral area is provided with a peripheral grounding wire, and a grounding connection wire is provided between the peripheral grounding wire and the touch shielding wire. The two ends of the grounding connection wire are respectively connected to the touch shielding wire and the peripheral grounding wire.

8. The display panel according to claim 4, wherein, The driving backplane includes a gate layer and a source / drain conductive layer. The gate layer is disposed on one side of the substrate, and the source / drain conductive layer is disposed on the side of the gate layer away from the substrate. The display panel also includes a pixel electrode layer, which is disposed between the first isolation structure and the common electrode.

9. The display panel according to claim 8, wherein, The light emission control trace is a gate signal line located on the gate layer, and the shielding portion is located on the source-drain conductive layer. The shielding portion is loaded with a power supply signal or a common signal.

10. The display panel according to claim 9, wherein, The source and drain conductive layer further includes a power signal line and a first connecting line. The power signal line is located in the display area, and the first connecting line is connected to the power signal line and the shielding part respectively. The power signal line carries the power signal.

11. The display panel according to claim 8, wherein, The source and drain conductive layer further includes a common signal line and a second connecting line. The common signal line is located in the display area, and the second connecting line is connected to the common signal line and the shielding part respectively. The common signal line carries the common signal.

12. The display panel according to claim 8, wherein, The shielding portion is disposed on the pixel electrode layer, the light emission control trace is a gate signal line disposed on the gate layer or a data signal line disposed on the source-drain electrode layer, and the shielding portion is loaded with a power supply signal or a common signal.

13. The display panel according to claim 12, wherein, The source and drain conductive layer further includes a power signal line and a first connecting line. The power signal line is located in the display area. One end of the first connecting line is connected to the power signal line, and the other end is connected to the shielding part through a second via. The power signal line carries the power signal.

14. The display panel according to claim 12, wherein, The source and drain conductive layer also includes a common signal line and a second connecting line. The common signal line is located in the display area. One end of the second connecting line is connected to the common signal line, and the other end is connected to the shielding part through a third via. The common signal line carries the common signal.

15. The display panel according to claim 12, wherein, The shielding portion is separated by the first partition portion to form a plurality of sub-shielding portions. The sub-shielding portions are disposed on the side of the first partition portion away from the substrate. The source-drain conductive layer also includes a source-drain transition portion. The orthographic projection of the source-drain transition portion on the substrate overlaps with the orthographic projection of two adjacent sub-shielding portions on the substrate. The sub-shielding portions are connected to two adjacent sub-shielding portions through a fourth via.

16. The display panel according to claim 5, wherein, The display panel further includes a transition section, which is disposed on the side of the second touch control layer away from the substrate. The transition section is connected to the second touch control layer and is connected to the suspended portion through a fifth via.

17. The display panel according to claim 4, wherein, The first partition structure includes at least two first partition portions, which are spaced apart. The suspended portion includes a first suspended portion and a second suspended portion. The first suspended portion is located on the side of the first partition portion away from the substrate, and the second suspended portion is located on the side of the planarization layer away from the substrate. The orthographic projection of the second suspended portion on the substrate is located between the orthographic projections of two adjacent first suspended portions on the substrate.

18. The display panel according to claim 12, wherein, The display panel also includes a barrier dam, which is located on the side of the first partition structure near the opening.

19. The display panel according to claim 18, wherein, The periphery of the hole includes a first sub-hole periphery and a second sub-hole periphery. The first sub-hole periphery is located between the edge of the barrier dam near the opening and the edge of the opening. The second sub-hole periphery is located between the edge of the barrier dam away from the opening and the edge of the display area. The first sub-hole periphery is provided with at least one isolation unit, and the second sub-hole periphery is provided with at least one isolation unit. The isolation unit is used to isolate the common electrode and / or the light-emitting material layer.

20. A display device, wherein, Includes the display panel as described in any one of claims 1 to 19.

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