Power module and power device
By using a high glass transition temperature encapsulation layer and conductive terminal design, the risks of chip cracking and high junction temperature during the power module packaging process have been solved, enabling the miniaturization and thinning of power modules and improving chip reliability and production efficiency.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- HUAWEI DIGITAL POWER TECH CO LTD
- Filing Date
- 2025-05-14
- Publication Date
- 2026-06-04
Smart Images
Figure CN2025094876_04062026_PF_FP_ABST
Abstract
Description
A power module and power device
[0001] Cross-reference to related applications
[0002] This application claims priority to Chinese Patent Application No. 202411745166.6, filed on November 28, 2024, entitled "A Power Module and Power Device", the entire contents of which are incorporated herein by reference. Technical Field
[0003] This application relates to the field of energy technology, and in particular to a power module and power device. Background Technology
[0004] Power modules are functional modules that combine power devices according to specific functions and then package them into a single unit. They are widely used in power equipment such as servo motors, frequency converters, and inverters. With the rapid development of electrification and digitalization in the energy industry, the application market for power modules has increased significantly. Furthermore, as the number of power modules in power equipment increases, there is a growing demand for higher integration, smaller board area, and thinner thickness to achieve power conversion while avoiding excessively large power equipment sizes. This has led to the development of technologies that utilize embedded processes to package power devices for interconnection.
[0005] However, the current process of encapsulating power devices using the embedded process involves steps such as lamination, laser drilling, and electroplating, which increases the risk of cracking in the power devices. Furthermore, because the glass transition temperature (Tg) of the filler material used in the embedded process is relatively low, it cannot support the embedded packaging of high junction temperature power devices. Summary of the Invention
[0006] This application provides a power module and a power device that improves the reliability of the power module while achieving miniaturization and thinning design, thereby helping to increase the power density of the power device.
[0007] Firstly, this application provides a power module including a pre-packaged module. The pre-packaged module includes a substrate, a chip, and a first packaging layer, wherein the chip is disposed on a first side of the substrate, and the first packaging layer encapsulates the chip. Additionally, the power module also includes a second packaging layer encapsulating the pre-packaged module. In this application, the glass transition temperature of the first packaging layer is higher than that of the second packaging layer. Using the power module design provided in this application, the pre-packaged body can be packaged as a whole. This allows the first packaging layer to protect the chip, reducing the stress directly acting on the chip during the embedded packaging process, thereby reducing the risk of chip cracking. This improves the structural strength of the chip and enhances the overall structural reliability of the power module, while also facilitating miniaturization and thinning of the power module design. Furthermore, since the glass transition temperature of the first packaging layer is higher than that of the second packaging layer, it improves the junction temperature reliability of the chip, supporting embedded packaging of high junction temperature chips, which enhances the market competitiveness of the power module.
[0008] In one possible implementation of this application, the water absorption rate of the first encapsulation layer is lower than that of the second encapsulation layer. This improves the chip's resistance to moisture, thereby enhancing its reliability.
[0009] In one possible implementation of this application, the projection of the chip onto the substrate lies within the outline of the substrate, and the projected area of the chip onto the substrate is smaller than the area of the substrate. This allows for a larger heat dissipation area on the substrate, thereby improving the heat conduction efficiency from the chip to the substrate, which in turn improves the heat dissipation efficiency of the power module.
[0010] To enable electrical connection between the chip and external devices of the power module, the pre-packaged module also includes conductive terminals. These conductive terminals are located on the side of the chip facing away from the substrate and are electrically connected to the chip. Furthermore, the conductive terminals are embedded in the first packaging layer, with the end face of the conductive terminals facing away from the chip exposed by the first packaging layer. This allows the electrical connection terminals of the chip to be led out of the first packaging layer using the conductive terminals, thereby eliminating the need for RDL processing of the chip. This effectively simplifies the chip packaging process and improves the production efficiency of the power module.
[0011] This application does not limit the connection method between the conductive terminals and the chip. For example, the conductive terminals are soldered to the chip's pads to ensure reliable connection. Additionally, in one possible implementation, the projection of the conductive terminal onto the chip lies within the outline of the pad, and the projected area of the conductive terminal on the chip is smaller than the area of the pad. This ensures reliable connection between the conductive terminals and the chip while preventing short circuits caused by solder overflow, thereby improving the yield rate of the power module.
[0012] In one possible implementation of this application, the substrate may also be embedded in the first encapsulation layer, with a second side of the substrate exposed from the first encapsulation layer, wherein the second side is disposed opposite to the first side. This facilitates electrical connection between the chip and other devices in the power circuit via the substrate, and also facilitates heat dissipation of the chip via the substrate.
[0013] In one possible implementation of this application, the power module further includes a first wiring layer and a second wiring layer. Along the direction from the substrate to the chip, the first and second wiring layers are located on opposite sides of the pre-packaged module. The first and second wiring layers are embedded in a second packaging layer, and the ends of the first and second wiring layers facing away from the pre-packaged module are exposed by the second packaging layer. The second packaging layer also includes a first via and a second via. The first wiring layer is electrically connected to the substrate through the first via, and the second wiring layer is electrically connected to conductive terminals through the second via. Thus, the wiring layers and vias respectively lead out the various electrical connection terminals of the chip to the outer surface of the power module, facilitating electrical connection between the power module and other devices in the power circuit. Furthermore, this design effectively reduces the parasitic inductance and resistance of the power circuit where the power module is located, thereby reducing oscillation and electrical stress, which is beneficial for improving system efficiency.
[0014] In addition, the power module also includes a first insulating layer and a first heat sink. The first insulating layer covers a portion of the second encapsulation layer, and the first insulating layer and the first heat sink are in thermally conductive contact. This achieves heat dissipation for the devices encapsulated by the second encapsulation layer while preventing conductive contact between the conductive devices encapsulated by the second encapsulation layer and the first heat sink.
[0015] In one possible implementation of this application, the first encapsulation layer includes a groove, and a portion of the second encapsulation layer is embedded in the groove. This increases the contact area between the second encapsulation layer and the first encapsulation layer, thereby improving the bonding force between them and enhancing the packaging reliability of the power module.
[0016] Secondly, this application also provides a power device, which includes a housing, a circuit board, and a power module. The circuit board and the power module are housed within the housing, and the power module is electrically connected to the circuit board. In the power device provided by this application, the power module has a smaller size, better structural reliability, and better junction temperature reliability of the chip, which is beneficial to improving the power density and operational reliability of the power device. Attached Figure Description
[0017] Figure 1 is a schematic diagram of a photovoltaic power generation system provided in an embodiment of this application;
[0018] Figure 2 is a simplified structural diagram of a power device provided in an embodiment of this application;
[0019] Figure 3 is a schematic diagram of a power module provided in an embodiment of this application;
[0020] Figure 4 is a schematic diagram of another structure of the power module provided in an embodiment of this application;
[0021] Figure 5 is a schematic diagram of another structure of the power module provided in the embodiment of this application;
[0022] Figure 6 is a schematic diagram of another structure of the power module provided in an embodiment of this application;
[0023] Figure 7 is a schematic diagram of another structure of the power module provided in an embodiment of this application;
[0024] Figure 8 is a schematic diagram of another structure of the power module provided in an embodiment of this application;
[0025] Figure 9 is a schematic diagram of another structure of the power module provided in an embodiment of this application;
[0026] Figure 10 is a schematic diagram of another structure of the power module provided in the embodiment of this application;
[0027] Figure 11 is a schematic diagram of another structure of the power module provided in the embodiment of this application.
[0028] Reference numerals: 1000-Photovoltaic module; 2000-Inverter; 3000-Transformer; 4000-Grid; 5000-Load; 100-Power device; 10-Housing; 20-Circuit board; 30-Power module; 40-Heat sink; 1-Pre-packaged module; 101-Substrate; 102-Chip; 1021-Connection layer; 103-First encapsulation layer; 1031-Groove; 104-Conductive terminal; 104a-Copper pad; 104b-Copper pillar; 2-Second encapsulation layer; 201-First via; 202-Second via; 3-First wiring layer; 4-Second wiring layer; 5-First intermediate wiring layer; 6-Second intermediate wiring layer; 7-First insulating layer; 8-First heat sink; 9-Second insulating layer; 11-Second heat sink. Detailed Implementation
[0029] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings. However, the exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein. The same reference numerals in the figures denote the same or similar structures, and therefore repeated descriptions of them will be omitted. The terms expressing position and direction described in the embodiments of this application are illustrative based on the accompanying drawings, but changes can be made as needed, and all such changes are included within the scope of protection of this application. The accompanying drawings of the embodiments of this application are only for illustrating relative positional relationships and do not represent actual scale.
[0030] It should be noted that specific details are set forth in the following description to facilitate understanding of this application. However, the embodiments of this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the embodiments of this application. Therefore, this application is not limited to the specific embodiments disclosed below.
[0031] Power devices are widely used in photovoltaic power generation systems, energy storage systems, and powertrain systems of new energy vehicles to convert current or voltage in these systems. Power devices can include inverters, microinverters, or optimizers in photovoltaic power generation systems; converters in energy storage systems; motor controllers, on-board chargers (OBCs), or microcontroller units (MCUs) in the powertrains of new energy vehicles; or blade power supplies for power stations.
[0032] Taking a photovoltaic (PV) power generation system as an example, Figure 1 is a schematic diagram of an application scenario of the PV power generation system provided in this application embodiment. The PV power generation system includes a PV module 1000, an inverter 2000, and a transformer 3000. The PV module 1000 is a DC power supply composed of solar cells connected in series or parallel, used to convert the energy of sunlight into DC electrical energy. The inverter 2000 is a DC-to-AC power device that converts the DC power output from the PV module 1000 into AC power for output to the transformer 3000. The transformer 3000 then transforms the AC power output from the inverter 2000 and connects it to the AC power grid 4000, thereby achieving grid connection of the PV power generation system. Alternatively, the AC power output from the inverter 2000 can be supplied to a load 5000 to power the load 5000.
[0033] Figure 2 is a simplified structural diagram of a power device provided in an embodiment of this application. Referring to Figure 2, the power device 100 may include a housing 10 and a circuit board 20, a power module 30, and a heat sink 40 housed within the housing 10. The power module 30 is electrically connected to the circuit board 20, and the heat sink 40 is in thermally conductive contact with the power module 30. The circuit board 20 may be a printed circuit board (PCB), a flexible printed circuit board (FPC), or a rigid-flex PCB, etc. The power module 30 is the core component of the power device 100 that realizes the power conversion function. The power module 30 may include multiple ports, such as input positive and negative ports, output positive and negative ports, power supply positive and negative ports, etc. These ports are electrically connected to the circuit board 20, thereby utilizing the circuit board 20 to provide current or voltage input and output, as well as power supply functions, to the power module 30.
[0034] The power module 30 can include various power devices such as chips, inductors, resistors, or capacitors. These power devices are connected in a certain functional combination and then packaged into a whole through packaging technology. With the rapid development of power devices, the number of power modules in power devices is increasing to meet the usage requirements of high-power scenarios. In order to ensure the installation requirements of power devices, it is necessary to avoid the size of power devices being too large. Therefore, higher requirements are placed on the board area and thickness of power modules.
[0035] To meet the design requirements of miniaturization and thinning of power modules, embedded packaging technology is used in the processing of power modules. This means that components such as chips, inductors, resistors and capacitors are embedded in the substrate and interconnected using vias, copper pillars and traces.
[0036] However, in the current industry practice of using embedded packaging technology to manufacture power modules, a redistribution layer (RDL) process is required to redistribute the chip's electrical connection terminals. Then, the power module is manufactured through processes such as lamination, laser drilling, and electroplating. It's understandable that using lamination, laser drilling, and electroplating to interconnect the embedded chip increases the risk of chip cracking. Furthermore, since resin materials are typically used for chip encapsulation, they have a low glass transition temperature (Tg), making them suitable only for packaging chips with lower maximum withstand temperatures and unsuitable for packaging chips with high junction temperatures.
[0037] It's worth noting that high junction temperature chips refer to chips that can withstand higher maximum temperatures, such as operating normally at temperatures above 200°C. If the Tg value of the packaging material is low, the maximum temperature at which it melts is also low, making it unsuitable for packaging high junction temperature chips.
[0038] In view of this, the power module provided in this application improves chip reliability by pre-packaging the chip, which makes it possible to support the packaging of high junction temperature chips using buried packaging technology. This allows for miniaturization and thinning of the power module while ensuring its structural reliability, thus enhancing its market competitiveness. To facilitate understanding of the solution provided in this application, a detailed description will follow with specific embodiments.
[0039] Figure 3 is a schematic diagram of a power module provided in an embodiment of this application. As shown in Figure 3, in this application, the power module may include a pre-packaged module 1, which includes a substrate 101, a chip 102, and a first packaging layer 103. The substrate 101 includes a first surface 1011 and a second surface 1012 disposed opposite to each other. The chip 102 is disposed on the first surface 1011 of the substrate 101, and the first packaging layer 103 encapsulates the chip 102.
[0040] In this application, chip 102 may include integrated circuit (IC) chip, insulated gate bipolar transistor (IGBT), metal-oxide-semiconductor field-effect transistor (MOSFET), diode, or power transistor, etc.
[0041] The substrate 101 can be, for example, a copper plate, an aluminum plate, or other metal or non-metal plate with high thermal and electrical conductivity. In this application, in addition to conducting the heat generated by the chip 102, the substrate 101 can also be connected to the pads of the chip 102 through a solder or other connecting layer 1021 to achieve electrical connection with the chip 102, thereby leading out the electrical connection terminals of the chip 102.
[0042] It is understood that in this application, the projection of chip 102 onto substrate 101 falls within the outline of substrate 101. Furthermore, the projected area of chip 102 onto substrate 101 is smaller than the area of substrate 101. For example, each side of the projection of chip 102 onto substrate 101 is 1 mm or more shorter than the corresponding side of substrate 101. This allows for a larger heat dissipation area on substrate 101, thereby improving the heat conduction efficiency from chip 102 to substrate 101, which is beneficial for improving the heat dissipation efficiency of the power module.
[0043] Referring again to Figure 3, the power module also includes a second encapsulation layer 2, which encapsulates the pre-packaged module 1, thus allowing the pre-packaged module 1 to be packaged as a whole. Since the first encapsulation layer 103 protects the chip 102, the stress directly acting on the chip 102 can be effectively reduced during the encapsulation of the pre-packaged module 1 using the second encapsulation layer 2. This reduces the risk of cracks in the chip 102, improves the structural strength of the chip 102, and enhances the overall structural reliability of the power module. Furthermore, it facilitates the miniaturization and thinning of the power module design.
[0044] Furthermore, in this application, the Tg value of the first packaging layer 103 is greater than the Tg value of the second packaging layer 2. This is beneficial for improving the junction temperature reliability of the chip 102, thereby supporting the embedded packaging of high junction temperature chips, which is conducive to enhancing the market competitiveness of power modules.
[0045] This application does not limit the specific materials of the first encapsulation layer 103 and the second encapsulation layer 2. For example, the first encapsulation layer 103 may be a molding compound, and the second encapsulation layer 2 may be an insulating material such as resin.
[0046] In order to enable the first encapsulation layer 103 to effectively protect the chip 102, in this embodiment of the application, the water absorption rate of the first encapsulation layer 103 can be lower than that of the second encapsulation layer 2, so as to improve the moisture resistance of the chip 102.
[0047] Referring again to Figure 3, the pre-packaged module 1 further includes a conductive terminal 104. This conductive terminal 104 can be located on the side of the chip 102 facing away from the substrate 101, and the conductive terminal 104 is electrically connected to the chip 102. In addition, the conductive terminal 104 is embedded in the first packaging layer 103, and the end face of the conductive terminal 104 facing away from the chip 102 is exposed by the first packaging layer 103. Thus, the conductive terminal 104 can be used to lead out the electrical connection terminals of the chip 102 to the outside of the first packaging layer 103 to realize the electrical connection between the chip 102 and other devices in the power circuit.
[0048] As described above, substrate 101 can also be used for electrical connection between chip 102 of the power module and other devices in the power circuit. In a specific design, substrate 101 can also be embedded in the first encapsulation layer 103, but the second side 1012 of substrate 101 is exposed from the first encapsulation layer 103 to facilitate electrical connection between substrate 101 and other devices in the power circuit.
[0049] Therefore, by adopting the power module design method provided in this application, the process of RDL processing of chip 102 is omitted during the packaging process of chip 102, which effectively simplifies the packaging process of chip 102 and thus helps to improve the production efficiency of power module.
[0050] Furthermore, considering that the conductive terminal 104 can be connected to the pads of the chip 102 via a solder or other connection layer 1021, in this embodiment, the projection of the conductive terminal 104 on the chip 102 can be located within the outline of the pads, and the projected area of the conductive terminal 104 on the chip 102 is smaller than the area of the pads. For example, the length of the projection of the conductive terminal 104 on the chip 102 in each direction is 0.3mm to 0.5mm smaller than that of the pads. This ensures the reliability of the connection between the conductive terminal 104 and the chip 102 while avoiding short circuits caused by solder overflow, thereby improving the product yield of the power module.
[0051] In the embodiment shown in Figure 3, except for the end face used for electrical connection, the substrate 101 and the conductive terminal 104 are all wrapped by the first encapsulation layer 103. Furthermore, the cross-sectional area of the first encapsulation layer 103 can be larger than the cross-sectional area of the substrate 101. This allows the first encapsulation layer 103 to have a larger volume, effectively protecting the chip 102. Additionally, it effectively reduces the diffusion of heat from the chip 102 to the second encapsulation layer 2, thereby improving the structural reliability of the second encapsulation layer 2.
[0052] In this application, the pre-packaged module 1 can be configured as a cube as shown in Figure 3. This reduces the generation of holes or bubbles during the encapsulation process using the second encapsulation layer 2, thereby improving the product yield of the power module. In other possible embodiments of this application, the pre-packaged module 1 can also be configured as other possible regular or irregular shapes.
[0053] Figure 4 is a schematic diagram of another structure of the power module provided in this application embodiment. In the power module shown in Figure 4, the first packaging layer 103 further includes a groove 1031, which is recessed from the surface of the first packaging layer 103 along the arrangement direction from the chip 102 to the substrate 101. This allows a portion of the second packaging layer 2 to be embedded in the groove 1031, which helps to increase the contact area between the second packaging layer 2 and the first packaging layer 103, thereby improving the bonding force between the two and improving the packaging reliability of the power module.
[0054] It is worth mentioning that, in this application, the specific recess direction of the groove 1031 of the first encapsulation layer 103 is not limited. It can also be set as the side or other surface of the first encapsulation layer 103. In addition, the cross-sectional shape of the groove 1031 can be rectangular, semi-circular, trapezoidal or other regular or irregular shapes, and is not limited here.
[0055] Referring to Figures 3 and 4, this application does not limit the specific arrangement of the conductive terminal 104 and the substrate 101. For example, the conductive terminal 104 can be a copper pad 104a or a copper pillar 104b, while the substrate 101 can be a copper plate, which can be specifically selected according to the type of chip 102. For instance, in practical applications, when the chip 102 is an IGBT or MOSFET, since it may include a source, drain, and gate, the source can be led out through the substrate 101, the gate through the copper pillar 104b, and the drain through the copper pad 104a. Similarly, when the chip 102 is a diode, since it includes a source and a drain, the source can be led out through the copper pad 104a, and the drain through the substrate 101.
[0056] In addition, in practical applications, the thickness of the conductive terminal 104 and the substrate 101 can be selected according to heat dissipation requirements and stress balance requirements.
[0057] Referring again to Figures 3 or 4, the power module further includes a first wiring layer 3 and a second wiring layer 4, wherein, along the direction from the substrate 101 to the chip 102, the first wiring layer 3 and the second wiring layer 4 are located on opposite sides of the pre-packaged module 1. The first wiring layer 3 and the second wiring layer 4 are embedded in the second packaging layer 2, and the end faces of the first wiring layer 3 and the second wiring layer 4 facing away from the pre-packaged module 1 are exposed by the second packaging layer 2.
[0058] In addition, the second packaging layer 2 also includes a first via 201 and a second via 202. The first wiring layer 3 can be electrically connected to the substrate 101 through the first via 201, and the second wiring layer 4 can be electrically connected to the conductive terminal 104 through the second via 202. Thus, the various electrical connection terminals of the chip 102 are led out to the outer surface of the power module through the wiring layers and vias, so as to facilitate the electrical connection between the power module and other devices in the power circuit.
[0059] This application does not limit the specific configuration of the first via 201 and the second via 202. Exemplary examples include holes of regular or irregular shapes such as round holes, square holes, trapezoidal holes, or elongated holes. In addition, the first via 201 and the second via 202 can be copper vias, or other metal vias or alloy vias with good conductivity.
[0060] The shape and material of the first wiring layer 3 and the second wiring layer 4 can also be set according to the actual electrical connection requirements, and this application does not specifically limit them.
[0061] It is understood that in this application, the design scheme of using trace layers and vias to bring out the electrical connection terminals of chip 102 to the outside of the power module can effectively reduce the parasitic inductance and resistance of the power circuit where the power module is located, thereby reducing oscillation and electrical stress, which is beneficial to improving system efficiency.
[0062] It is worth mentioning that the number of conductive terminals 104 can also be set according to the type of chip 102 in the actual application. Taking IGBT and MOSFET chips 102 as examples, since both the gate and drain need to be led out through conductive terminals 104, there can be two conductive terminals 104 in this pre-packaged module 1. As shown in Figure 3 or Figure 4, the two conductive terminals 104 are flush with the end face away from the chip 102. This facilitates the control of subsequent processing steps such as vias connected to the conductive terminals 104 during the packaging process of the pre-packaged module 1 using the second packaging layer 2, which is beneficial to improving the product yield of the power module.
[0063] Figure 5 is a schematic diagram of another structure of the power module provided in this application embodiment. Compared with the embodiment shown in Figure 3 above, in the embodiment shown in Figure 5, the power module may further include a first intermediate wiring layer 5 and a second intermediate wiring layer 6. The first intermediate wiring layer 5 is located between the substrate 101 and the first wiring layer 3. The first intermediate wiring layer 5 is electrically connected to the substrate 101 through a first via 201, and is also electrically connected to the first wiring layer 3 through the first via 201. This utilizes the first intermediate wiring layer 5 and the first via 201 to achieve the electrical connection between the first wiring layer 3 and the substrate 101. This allows for a smaller depth of the first via 201, facilitating its processing and reducing the difficulty of process control during the power module packaging process while achieving a reliable electrical connection between the first wiring layer 3 and the substrate 101.
[0064] Similarly, the second intermediate routing layer 6 is located between the conductive terminal 104 and the second routing layer 4. The second intermediate routing layer 6 is electrically connected to the conductive terminal 104 through the second via 202, and is also electrically connected to the second routing layer 4 through the second via 202. This facilitates the processing of the second via 202, thereby reducing the difficulty of process control during the packaging of the power module and improving the product yield of the power module.
[0065] It is understood that this application does not limit the specific number of the first intermediate routing layer 5 and the second intermediate routing layer 6, which can be designed according to the thickness of the second packaging layer 2 or the lead-out requirements of each electrical connection terminal of the chip 102.
[0066] Furthermore, the above description is merely an exemplary embodiment of leading the various electrical connection terminals of chip 102 out of the power module. In other embodiments of this application, other possible methods can be used. For example, vias can be set as bonding wires or other forms. As shown in Figure 6, in the power module, the first wiring layer 3 directly contacts the substrate 101, and the second wiring layer 4 directly contacts the conductive terminal 104, which means that the first via 201 and the second via 202 are omitted. This simplifies the packaging process of the power module and improves the production efficiency of the power module.
[0067] As can be seen from the above description, in this application, the substrate 101 is also used to draw out the heat generated by the chip 102 so that the chip 102 can operate within the temperature range that meets its operating requirements, thereby ensuring the operational reliability of the chip 102.
[0068] Since the substrate 101 extends to the surface of the second encapsulation layer 2 through the first wiring layer 3, in order to achieve effective heat dissipation for the chip 102 in this application, referring to Figures 3 to 6 above, the power module may further include a first insulating layer 7 and a first heat sink 8. The first insulating layer 7 covers a portion of the first wiring layer 3, or in other words, the first insulating layer 7 covers a portion of the second encapsulation layer 2. Furthermore, the first insulating layer 7 and the first heat sink 8 are in thermally conductive contact. This avoids conductive contact between the conductive devices such as the first wiring layer 3, which are encapsulated by the second encapsulation layer 2, and the first heat sink 8, while simultaneously achieving heat conduction from the devices such as the first wiring layer 3 to the first heat sink 8, thereby facilitating heat dissipation for the devices encapsulated by the second encapsulation layer 2.
[0069] It is understood that, in some embodiments of this application, the first insulating layer 7 can cover the portion of the first wiring layer 3 that is opposite to the chip 102, so that the projection of the chip 102 on the first heat sink 8 falls within the outline of the first heat sink 8. This helps to reduce the heat conduction path from the chip 102 to the first heat sink 8, thereby improving the heat dissipation efficiency of the power module. Furthermore, this also exposes the end of the first wiring layer 3, facilitating electrical connection between the first wiring layer 3 and other devices in the power circuit.
[0070] This application does not limit the specific type of the first heat sink 8. It can be an air-cooled heat sink, a liquid-cooled heat sink, or other types of heat sink, as long as it can achieve effective heat exchange with the first wiring layer 3 through the first insulating layer 7. In addition, the first insulating layer 7 can be a thermal interface material layer or other material layer that can both provide insulation protection and conduct heat. This application does not limit it.
[0071] Figure 7 is a schematic diagram of another structure of the power module provided in an embodiment of this application. Unlike the power module described above, in the embodiment shown in Figure 7, the power module further includes a second insulating layer 9 and a second heat sink 11. The second insulating layer 9 covers a portion of the second wiring layer 4, and the second insulating layer 9 is in thermally conductive contact with the second heat sink 11. This allows the conductive terminal 104 to conduct the heat generated by the chip 102 to the second wiring layer 4, and then through the second insulating layer 9 to the second heat sink 11, thereby achieving heat dissipation of the power module. This improves the heat dissipation efficiency of the power module, thus meeting the heat dissipation requirements of the power module in high-power application scenarios.
[0072] In the above embodiments, the description is based on the example of a pre-packaged module 1 comprising a substrate 101 and a chip 102. However, in this application, the number of substrates 101 and chips 102 in the pre-packaged module 1 is not limited. For example, in the embodiment shown in FIG8, two chips 102 are disposed on one substrate 101 of the pre-packaged module 1. As in the embodiment shown in FIG9, the pre-packaged module 1 comprises two substrates 101 and two chips 102, with one chip 102 disposed on each substrate 101. Of course, the specific arrangement of the pre-packaged module 1 is not limited to these examples; it can be configured according to any of the above embodiments. While not listed individually here, all such configurations should be understood to fall within the protection scope of this application.
[0073] Furthermore, the power module may include only one pre-packaged module 1 as described in the above embodiments, or it may include multiple pre-packaged modules 1 as shown in Figure 10. In the power module shown in Figure 10, the multiple pre-packaged modules 1 are arranged in the same direction, meaning that the chip 102 and substrate 101 in each pre-packaged module 1 are arranged in the same order. However, in the power module shown in Figure 11, at least two of the multiple pre-packaged modules 1 may be arranged in opposite directions, meaning that there are at least two pre-packaged modules 1 with different arrangements of the chip 102 and substrate 101. The specific arrangement of the power module in these embodiments is similar to that in the above embodiments, and will not be described in detail here, but they should all be understood to fall within the protection scope of this application.
[0074] In the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions between different embodiments are consistent and can be referenced in each other. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.
[0075] It is worth mentioning that the chip 102 packaging solution described above in this application can be used not only for power module packaging, but also for other module packaging involving chips or other devices, such as the packaging of RF chips and power amplifiers in the antenna field, or the packaging of central processing units (CPUs) and graphics processing units (GPUs) in servers, etc., which will not be listed here one by one.
[0076] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A power module, characterized in that, include: A pre-packaged module, the pre-packaged module including a substrate, a chip and a first packaging layer, the chip being disposed on a first side of the substrate and the first packaging layer encapsulating the chip; A second encapsulation layer is used to encapsulate the pre-encapsulated module; the glass transition temperature of the first encapsulation layer is higher than that of the second encapsulation layer.
2. The power module as described in claim 1, characterized in that, The water absorption rate of the first encapsulation layer is lower than that of the second encapsulation layer.
3. The power module as described in claim 1 or 2, characterized in that, The projection of the chip onto the substrate is within the outline of the substrate, and the projected area of the chip onto the substrate is smaller than the area of the substrate.
4. The power module as described in any one of claims 1 to 3, characterized in that, The pre-packaged module further includes a conductive terminal located on the side of the chip facing away from the substrate and electrically connected to the chip; the conductive terminal is embedded in the first packaging layer, and the end face of the conductive terminal facing away from the chip is exposed by the first packaging layer.
5. The power module as described in claim 4, characterized in that, The conductive terminal is soldered to the pad of the chip, and the projection of the conductive terminal on the chip is within the outline of the pad, and the projected area of the conductive terminal on the chip is smaller than the area of the pad.
6. The power module as described in any one of claims 1-5, characterized in that, The substrate is embedded in the first encapsulation layer, and the second side of the substrate is exposed through the first encapsulation layer, with the second side facing away from the first side.
7. The power module as described in any one of claims 1-6, characterized in that, The power module further includes a first wiring layer and a second wiring layer. Along the direction from the substrate to the chip, the first wiring layer and the second wiring layer are located on opposite sides of the pre-packaged module. The first wiring layer and the second wiring layer are embedded in the second packaging layer, and the end faces of the first wiring layer and the second wiring layer that are away from the pre-packaged module are exposed by the second packaging layer. The second encapsulation layer further includes a first via and a second via. The first wiring layer is electrically connected to the substrate through the first via, and the second wiring layer is electrically connected to the conductive terminal through the second via.
8. The power module as described in any one of claims 1-7, characterized in that, The power module further includes a first insulating layer and a first heat sink, wherein the first insulating layer covers a portion of the second encapsulation layer and the first insulating layer is in thermal contact with the first heat sink.
9. The power module according to any one of claims 1 to 8, characterized in that, The first encapsulation layer includes a groove, and a portion of the second encapsulation layer is embedded in the groove.
10. A power device, characterized in that, The device includes a housing, a circuit board, and a power module as described in any one of claims 1 to 9, wherein the circuit board and the power module are housed within the housing, and the power module is electrically connected to the circuit board.